1/* $OpenBSD: intr.h,v 1.19 2025/05/10 10:01:03 visa Exp $ */
2
3/*
4 * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29#ifndef _MACHINE_INTR_H_
30#define _MACHINE_INTR_H_
31
32#define __USE_MI_SOFTINTR
33
34#include <sys/softintr.h>
35
36/*
37 * The interrupt level ipl is a logical level; per-platform interrupt
38 * code will turn it into the appropriate hardware interrupt masks
39 * values.
40 *
41 * Interrupt sources on the CPU are kept enabled regardless of the
42 * current ipl value; individual hardware sources interrupting while
43 * logically masked are masked on the fly, remembered as pending, and
44 * unmasked at the first splx() opportunity.
45 *
46 * An exception to this rule is the clock interrupt. Clock interrupts
47 * are always allowed to happen, but will (of course!) not be serviced
48 * if logically masked. The reason for this is that clocks usually sit on
49 * INT5 and cannot be easily masked if external hardware masking is used.
50 */
51
52/* Interrupt priority `levels'; not mutually exclusive. */
53#define IPL_NONE 0 /* nothing */
54#define IPL_SOFTINT 1 /* soft interrupts */
55#define IPL_SOFTCLOCK 1 /* soft clock interrupts */
56#define IPL_SOFTNET 2 /* soft network interrupts */
57#define IPL_SOFTTTY 3 /* soft terminal interrupts */
58#define IPL_SOFTHIGH IPL_SOFTTTY /* highest level of soft interrupts */
59#define IPL_BIO 4 /* block I/O */
60#define IPL_AUDIO IPL_BIO
61#define IPL_NET 5 /* network */
62#define IPL_TTY 6 /* terminal */
63#define IPL_VM 7 /* memory allocation */
64#define IPL_CLOCK 8 /* clock */
65#define IPL_STATCLOCK IPL_CLOCK
66#define IPL_SCHED 9 /* everything */
67#define IPL_HIGH 9 /* everything */
68#define IPL_IPI 10 /* interprocessor interrupt */
69#define NIPLS 11 /* number of levels */
70
71#define IPL_MPFLOOR IPL_TTY
72
73/* Interrupt priority 'flags'. */
74#define IPL_MPSAFE 0x100
75
76/* Interrupt sharing types. */
77#define IST_NONE 0 /* none */
78#define IST_PULSE 1 /* pulsed */
79#define IST_EDGE 2 /* edge-triggered */
80#define IST_LEVEL 3 /* level-triggered */
81
82#ifndef _LOCORE
83
84void softintr(int);
85
86#define splbio() splraise(IPL_BIO)
87#define splnet() splraise(IPL_NET)
88#define spltty() splraise(IPL_TTY)
89#define splaudio() splraise(IPL_AUDIO)
90#define splclock() splraise(IPL_CLOCK)
91#define splvm() splraise(IPL_VM)
92#define splhigh() splraise(IPL_HIGH)
93
94#define splsoftclock() splraise(IPL_SOFTCLOCK)
95#define splsoftnet() splraise(IPL_SOFTNET)
96#define splstatclock() splhigh()
97
98#define splsched() splhigh()
99#define spl0() spllower(0)
100
101void splinit(void);
102
103#ifdef DIAGNOSTIC
104/*
105 * Although this function is implemented in MI code, it must be in this MD
106 * header because we don't want this header to include MI includes.
107 */
108void splassert_fail(int, int, const char *);
109extern int splassert_ctl;
110void splassert_check(int, const char *);
111#define splassert(__wantipl) do { \
112 if (splassert_ctl > 0) { \
113 splassert_check(__wantipl, __func__); \
114 } \
115} while (0)
116#define splsoftassert(wantipl) splassert(wantipl)
117#else
118#define splassert(X)
119#define splsoftassert(X)
120#endif
121
122void register_splx_handler(void (*)(int));
123int splraise(int);
124void splx(int);
125int spllower(int);
126
127/*
128 * Interrupt control struct used by interrupt dispatchers
129 * to hold interrupt handler info.
130 */
131
132#include <sys/evcount.h>
133
134struct intrhand {
135 struct intrhand *ih_next;
136 int (*ih_fun)(void *);
137 void *ih_arg;
138 int ih_level;
139 int ih_irq;
140 int ih_flags;
141#define IH_MPSAFE 0x01
142 struct evcount ih_count;
143};
144
145void intr_barrier(void *);
146
147/*
148 * Low level interrupt dispatcher registration data.
149 */
150
151/* Schedule priorities for base interrupts (CPU) */
152#define INTPRI_IPI 0
153#define INTPRI_CLOCK 1
154/* other values are system-specific */
155
156#define NLOWINT 4 /* Number of low level registrations possible */
157
158extern uint32_t idle_mask;
159
160struct trapframe;
161void set_intr(int, uint32_t, uint32_t(*)(uint32_t, struct trapframe *));
162
163uint32_t updateimask(uint32_t);
164void dosoftint(void);
165
166#ifdef MULTIPROCESSOR
167extern uint32_t ipi_mask;
168#define ENABLEIPI() updateimask(~ipi_mask)
169#endif
170
171struct pic {
172 void (*pic_eoi)(int);
173 void (*pic_mask)(int);
174 void (*pic_unmask)(int);
175};
176
177#ifdef CPU_LOONGSON3
178
179void loongson3_intr_init(void);
180void *loongson3_intr_establish(int, int, int (*)(void *), void*,
181 const char *);
182void loongson3_intr_disestablish(void *);
183void *loongson3_ht_intr_establish(int, int, int (*)(void *), void*,
184 const char *);
185void loongson3_ht_intr_disestablish(void *);
186
187void loongson3_register_ht_pic(const struct pic *);
188
189#endif /* CPU_LOONGSON3 */
190
191#endif /* _LOCORE */
192
193#endif /* _MACHINE_INTR_H_ */