1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 2001 David E. O'Brien
5 * Copyright (c) 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 */
39
40#ifndef _POWERPC_INCLUDE_PARAM_H_
41#define _POWERPC_INCLUDE_PARAM_H_
42
43/*
44 * Machine dependent constants for PowerPC
45 */
46
47#include <machine/_align.h>
48
49#ifndef MACHINE
50#define MACHINE "powerpc"
51#endif
52#ifndef MACHINE_ARCH
53#ifdef __powerpc64__
54#if defined(__LITTLE_ENDIAN__)
55#define MACHINE_ARCH "powerpc64le"
56#else
57#define MACHINE_ARCH "powerpc64"
58#endif
59#else
60#ifdef __SPE__
61#define MACHINE_ARCH "powerpcspe"
62#else
63#define MACHINE_ARCH "powerpc"
64#endif
65#endif
66#endif
67#define MID_MACHINE MID_POWERPC
68#ifdef __powerpc64__
69#ifndef MACHINE_ARCH32
70#define MACHINE_ARCH32 "powerpc"
71#endif
72#endif
73
74#ifdef SMP
75#ifndef MAXCPU
76#define MAXCPU 256
77#endif
78#else
79#define MAXCPU 1
80#endif
81
82#ifndef MAXMEMDOM
83#define MAXMEMDOM 8
84#endif
85
86#define ALIGNBYTES _ALIGNBYTES
87#define ALIGN(p) _ALIGN(p)
88/*
89 * ALIGNED_POINTER is a boolean macro that checks whether an address
90 * is valid to fetch data elements of type t from on this architecture.
91 * This does not reflect the optimal alignment, just the possibility
92 * (within reasonable limits).
93 */
94#define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0)
95
96/*
97 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
98 * architecture. It should be used with appropriate caution.
99 */
100#define CACHE_LINE_SHIFT 7
101#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
102
103#define PAGE_SHIFT 12
104#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
105#define PAGE_MASK (PAGE_SIZE - 1)
106#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
107#define NPDEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
108
109#define L1_PAGE_SIZE_SHIFT 39
110#define L1_PAGE_SIZE (1UL<<L1_PAGE_SIZE_SHIFT)
111#define L1_PAGE_MASK (L1_PAGE_SIZE-1)
112
113#define L2_PAGE_SIZE_SHIFT 30
114#define L2_PAGE_SIZE (1UL<<L2_PAGE_SIZE_SHIFT)
115#define L2_PAGE_MASK (L2_PAGE_SIZE-1)
116
117#define L3_PAGE_SIZE_SHIFT 21
118#define L3_PAGE_SIZE (1UL<<L3_PAGE_SIZE_SHIFT)
119#define L3_PAGE_MASK (L3_PAGE_SIZE-1)
120
121#define MAXPAGESIZES 3 /* maximum number of supported page sizes */
122
123#define RELOCATABLE_KERNEL 1 /* kernel may relocate during startup */
124
125#ifndef KSTACK_PAGES
126#ifdef __powerpc64__
127#define KSTACK_PAGES 12 /* includes pcb */
128#else
129#define KSTACK_PAGES 4 /* includes pcb */
130#endif
131#endif
132#define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
133#define USPACE (kstack_pages * PAGE_SIZE) /* total size of pcb */
134
135#define COPYFAULT 0x1
136#define FUSUFAULT 0x2
137
138/*
139 * Mach derived conversion macros
140 */
141#define trunc_2mpage(x) ((unsigned long)(x) & ~L3_PAGE_MASK)
142#define round_2mpage(x) ((((unsigned long)(x)) + L3_PAGE_MASK) & ~L3_PAGE_MASK)
143#define trunc_1gpage(x) ((unsigned long)(x) & ~L2_PAGE_MASK)
144
145#define powerpc_btop(x) ((x) >> PAGE_SHIFT)
146#define powerpc_ptob(x) ((x) << PAGE_SHIFT)
147
148#define btoc(x) ((vm_offset_t)(((x)+PAGE_MASK)>>PAGE_SHIFT))
149
150#endif /* !_POWERPC_INCLUDE_PARAM_H_ */