| 1 | /* Restartable Sequences Linux riscv architecture header. |
| 2 | Copyright (C) 2021-2026 Free Software Foundation, Inc. |
| 3 | |
| 4 | The GNU C Library is free software; you can redistribute it and/or |
| 5 | modify it under the terms of the GNU Lesser General Public |
| 6 | License as published by the Free Software Foundation; either |
| 7 | version 2.1 of the License, or (at your option) any later version. |
| 8 | |
| 9 | The GNU C Library is distributed in the hope that it will be useful, |
| 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 12 | Lesser General Public License for more details. |
| 13 | |
| 14 | You should have received a copy of the GNU Lesser General Public |
| 15 | License along with the GNU C Library; if not, see |
| 16 | <https://www.gnu.org/licenses/>. */ |
| 17 | |
| 18 | #include <bits/endian.h> |
| 19 | |
| 20 | #ifndef _SYS_RSEQ_H |
| 21 | # error "Never use <bits/rseq.h> directly; include <sys/rseq.h> instead." |
| 22 | #endif |
| 23 | |
| 24 | /* RSEQ_SIG is a signature required before each abort handler code. |
| 25 | |
| 26 | It is a 32-bit value that maps to actual architecture code compiled |
| 27 | into applications and libraries. It needs to be defined for each |
| 28 | architecture. When choosing this value, it needs to be taken into |
| 29 | account that generating invalid instructions may have ill effects on |
| 30 | tools like objdump, and may also have impact on the CPU speculative |
| 31 | execution efficiency in some cases. |
| 32 | |
| 33 | Select the instruction "csrw mhartid, x0" as the RSEQ_SIG. Unlike |
| 34 | other architectures, the ebreak instruction has no immediate field for |
| 35 | distinguishing purposes. Hence, ebreak is not suitable as RSEQ_SIG. |
| 36 | "csrw mhartid, x0" can also satisfy the RSEQ requirement because it |
| 37 | is an uncommon instruction and will raise an illegal instruction |
| 38 | exception when executed in all modes. */ |
| 39 | |
| 40 | #if __BYTE_ORDER == __LITTLE_ENDIAN |
| 41 | #define RSEQ_SIG	0xf1401073 |
| 42 | #else |
| 43 | /* RSEQ is currently only supported on Little-Endian. */ |
| 44 | #endif |