1/* $OpenBSD: cpufunc.h,v 1.7 2026/04/05 11:48:17 kettenis Exp $ */
2
3/*-
4 * Copyright (c) 2014 Andrew Turner
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/cpu/include/cpufunc.h 299683 2016-05-13 16:03:50Z andrew $
29 */
30
31#ifndef _MACHINE_CPUFUNC_H_
32#define _MACHINE_CPUFUNC_H_
33
34static __inline void
35breakpoint(void)
36{
37 __asm("ebreak");
38}
39
40#ifdef _KERNEL
41
42#include <machine/riscvreg.h>
43
44#define rdcycle() csr_read(cycle)
45#define rdtime() csr_read(time)
46#define rdinstret() csr_read(instret)
47#define rdhpmcounter(n) csr_read(hpmcounter##n)
48
49static __inline void
50fence_i(void)
51{
52 __asm volatile("fence.i" ::: "memory");
53}
54
55static __inline void
56sfence_vma(void)
57{
58 __asm volatile("sfence.vma" ::: "memory");
59}
60
61static __inline void
62sfence_vma_page(uintptr_t addr)
63{
64 __asm volatile("sfence.vma %0"
65 :
66 : "r" (addr)
67 : "memory");
68}
69
70// XXX ASIDs in riscv64 are only 16 bits.
71static __inline void
72sfence_vma_asid(uint64_t asid)
73{
74 __asm volatile("sfence.vma x0, %0"
75 :
76 : "r" (asid)
77 : "memory");
78}
79
80static __inline void
81sfence_vma_page_asid(uintptr_t addr, uint64_t asid)
82{
83 __asm volatile("sfence.vma %0, %1"
84 :
85 : "r" (addr), "r" (asid)
86 : "memory");
87}
88
89extern int64_t dcache_line_size;
90extern int64_t icache_line_size;
91
92extern void (*cpu_dcache_wbinv_range)(vaddr_t, vsize_t);
93extern void (*cpu_dcache_inv_range)(vaddr_t, vsize_t);
94extern void (*cpu_dcache_wb_range)(vaddr_t, vsize_t);
95
96static __inline void
97load_satp(uint64_t val)
98{
99 __asm volatile("csrw satp, %0" :: "r"(val));
100}
101
102#endif /* _KERNEL */
103#endif /* _MACHINE_CPUFUNC_H_ */