| 1 | /*	$NetBSD: cgtworeg.h,v 1.6 2023/03/28 20:01:57 andvar Exp $ */ |
| 2 | |
| 3 | /* |
| 4 | * Copyright (c) 1994 Dennis Ferguson |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * 1. Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * 2. Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 21 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 22 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 23 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 25 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | /* cgtworeg.h - CG2 colour frame buffer definitions |
| 29 | * |
| 30 | * The mapped memory looks like: |
| 31 | * |
| 32 | * offset contents |
| 33 | * 0x000000 bit plane map - 1st (of 8) plane used by the X server in -mono mode |
| 34 | * 0x100000 pixel map - used by the X server in color mode |
| 35 | * 0x200000 raster op mode memory map - unused by X server |
| 36 | * 0x300000 random control registers (lots of spaces in between) |
| 37 | * 0x310000 shadow colour map |
| 38 | */ |
| 39 | |
| 40 | /* Frame buffer memory size and depth */ |
| 41 | #define	CG2_FBSIZE	(1024 * 1024) |
| 42 | #define	CG2_N_PLANE	8 |
| 43 | |
| 44 | /* Screen dimensions */ |
| 45 | #define	CG2_WIDTH	1152 |
| 46 | #define	CG2_HEIGHT	900 |
| 47 | |
| 48 | /* Colourmap size */ |
| 49 | #define CG2_CMSIZE	256 |
| 50 | |
| 51 | #define CG2_BITPLANE_OFF	0 |
| 52 | #define CG2_BITPLANE_SIZE	0x100000 |
| 53 | #define CG2_PIXMAP_OFF		(CG2_BITPLANE_OFF + CG2_BITPLANE_SIZE) |
| 54 | #define CG2_PIXMAP_SIZE		0x100000 |
| 55 | #define CG2_ROPMEM_OFF		(CG2_PIXMAP_OFF + CG2_PIXMAP_SIZE) |
| 56 | #define CG2_ROPMEM_SIZE		0x100000 |
| 57 | #define CG2_CTLREG_OFF		(CG2_ROPMEM_OFF + CG2_ROPMEM_SIZE) |
| 58 | #define CG2_CTLREG_SIZE		0x010600 |
| 59 | #define CG2_MAPPED_SIZE		(CG2_CTLREG_OFF + CG2_CTLREG_SIZE) |
| 60 | |
| 61 | |
| 62 | /* arrangement of bit plane mode memory */ |
| 63 | union bitplane { |
| 64 | 	u_short word[CG2_HEIGHT][CG2_WIDTH/(CG2_N_PLANE * sizeof(u_short))]; |
| 65 | 	u_short plane[CG2_FBSIZE/(CG2_N_PLANE * sizeof(u_short))]; |
| 66 | }; |
| 67 | |
| 68 | /* arrangement of pixel mode memory */ |
| 69 | union byteplane { |
| 70 | 	u_char pixel[CG2_HEIGHT][CG2_WIDTH]; |
| 71 | 	u_char frame[CG2_FBSIZE]; |
| 72 | }; |
| 73 | |
| 74 | |
| 75 | /* |
| 76 | * Structure describing the first two megabytes of the frame buffer. |
| 77 | * Normal memory maps in bit plane and pixel modes |
| 78 | */ |
| 79 | struct cg2memfb { |
| 80 | 	union bitplane memplane[CG2_N_PLANE];	/* bit plane map */ |
| 81 | 	union byteplane pixplane;		/* pixel map */ |
| 82 | }; |
| 83 | |
| 84 | |
| 85 | /* |
| 86 | * Control/status register. The X server only appears to use update_cmap |
| 87 | * and video_enab. |
| 88 | */ |
| 89 | struct cg2statusreg { |
| 90 | 	u_int reserved : 2;	/* not used */ |
| 91 | u_int fastread : 1;	/* r/o: has some feature I don't understand */ |
| 92 | u_int id : 1;		/* r/o: ext status and ID registers exist */ |
| 93 | u_int resolution : 4;	/* screen resolution, 0 means 1152x900 */ |
| 94 | u_int retrace : 1;	/* r/o: retrace in progress */ |
| 95 | u_int inpend : 1;	/* r/o: interrupt request */ |
| 96 | u_int ropmode : 3;	/* ?? */ |
| 97 | u_int inten : 1;	/* interrupt enable (for end of retrace) */ |
| 98 | u_int update_cmap : 1;	/* copy/use shadow colour map */ |
| 99 | u_int video_enab : 1;	/* enable video */ |
| 100 | }; |
| 101 | |
| 102 | |
| 103 | /* |
| 104 | * Extended status register. Unused by X server |
| 105 | */ |
| 106 | struct cg2_extstatus { |
| 107 | 	u_int gpintreq : 1;	/* interrupt request */ |
| 108 | 	u_int gpintdis : 1;	/* interrupt disable */ |
| 109 | 	u_int reserved : 13;	/* unused */ |
| 110 | 	u_int gpbus : 1;	/* bus enabled */ |
| 111 | }; |
| 112 | |
| 113 | |
| 114 | /* |
| 115 | * Double buffer control register. It appears that (some of?) the |
| 116 | * cg2 cards support a pair of memory sets, referred to as `A' and |
| 117 | * `B', which can be swapped to allow atomic screen updates. This |
| 118 | * controls them. |
| 119 | */ |
| 120 | struct dblbufreg { |
| 121 | 	u_int display_b : 1;	/* display memory B (set) or A (reset) */ |
| 122 | 	u_int read_b : 1;	/* access memory B (set) or A (reset) */ |
| 123 | 	u_int nowrite_b : 1;	/* when set, writes don't update memory B */ |
| 124 | 	u_int nowrite_a : 1;	/* when set, writes don't update memory A */ |
| 125 | 	u_int read_ecmap : 1;	/* copy from(clear)/to(set) shadow colour map */ |
| 126 | 	u_int fast_read : 1;	/* fast reads, but wrong data */ |
| 127 | 	u_int wait : 1;		/* when set, remains so to end up v. retrace */ |
| 128 | 	u_int update_ecmap : 1;	/* copy/use shadow colour map */ |
| 129 | u_int reserved : 8; |
| 130 | }; |
| 131 | |
| 132 | |
| 133 | /* |
| 134 | * Zoom register, apparently present on Sun-2 colour boards only. See |
| 135 | * the Sun documentation, I don't know anyone who still has a Sun-2. |
| 136 | */ |
| 137 | struct cg2_zoom { |
| 138 | 	union { |
| 139 | 		u_short reg; |
| 140 | 		u_char reg_pad[4096]; |
| 141 | 	} wordpan; |
| 142 | 	union { |
| 143 | 		struct { |
| 144 | 			u_int unused : 8; |
| 145 | 			u_int lineoff : 4; |
| 146 | 			u_int pixzoom : 4; |
| 147 | 		} reg; |
| 148 | 		u_short word; |
| 149 | 		u_char reg_pad[4096]; |
| 150 | 	} zoom; |
| 151 | union { |
| 152 | 		struct { |
| 153 | 			u_int unused : 8; |
| 154 | 			u_int lorigin : 4; |
| 155 | 			u_int pixeloff : 4; |
| 156 | 		} reg; |
| 157 | 		u_short word; |
| 158 | 		u_char reg_pad[4096]; |
| 159 | 	} pixpan; |
| 160 | 	union { |
| 161 | 		u_short reg; |
| 162 | 		u_char reg_pad[4096]; |
| 163 | 	} varzoom; |
| 164 | }; |
| 165 | |
| 166 | |
| 167 | /* |
| 168 | * Miscellany. On the Sun-3 these registers exist in place of the above. |
| 169 | */ |
| 170 | struct cg2_nozoom { |
| 171 | 	union {				/* double buffer register (see above) */ |
| 172 | 		struct dblbufreg reg; |
| 173 | 		u_short word; |
| 174 | 		u_char reg_pad[4096]; |
| 175 | 	} dblbuf; |
| 176 | 	union {				/* start of DMA window */ |
| 177 | 		u_short reg; |
| 178 | 		u_char reg_pad[4096]; |
| 179 | 	} dmabase; |
| 180 | 	union {				/* DMA window size */ |
| 181 | 		u_short reg;		/* actually 8 bits. reg*16 == size */ |
| 182 | 		u_char reg_pad[4096]; |
| 183 | 	} dmawidth; |
| 184 | 	union {				/* frame count */ |
| 185 | 		u_short reg;		/* actually 8 bits only. r/o */ |
| 186 | 		u_char reg_pad[4096]; |
| 187 | 	} framecnt; |
| 188 | }; |
| 189 | |
| 190 | |
| 191 | /* |
| 192 | * Raster op control registers. X doesn't use this, but documented here |
| 193 | * for future reference. |
| 194 | */ |
| 195 | struct memropc { |
| 196 | 	u_short mrc_dest; |
| 197 | 	u_short mrc_source1; |
| 198 | 	u_short mrc_source2; |
| 199 | 	u_short mrc_pattern; |
| 200 | 	u_short mrc_mask1; |
| 201 | 	u_short mrc_mask2; |
| 202 | 	u_short mrc_shift; |
| 203 | 	u_short mrc_op; |
| 204 | 	u_short mrc_width; |
| 205 | 	u_short mrc_opcount; |
| 206 | 	u_short mrc_decoderout; |
| 207 | 	u_short mrc_x11; |
| 208 | 	u_short mrc_x12; |
| 209 | 	u_short mrc_x13; |
| 210 | 	u_short mrc_x14; |
| 211 | 	u_short mrc_x15; |
| 212 | }; |
| 213 | |
| 214 | |
| 215 | /* |
| 216 | * Last chunk of the frame buffer (i.e. from offset 0x200000 and above). |
| 217 | * Exists separately from struct cg2memfb apparently because Sun software |
| 218 | * avoids mapping the latter, though X uses it. |
| 219 | */ |
| 220 | struct cg2fb { |
| 221 | 	union {			/* raster op mode frame memory */ |
| 222 | 		union bitplane ropplane[CG2_N_PLANE]; |
| 223 | 		union byteplane roppixel; |
| 224 | 	} ropio; |
| 225 | 	union {			/* raster op control unit (1 per plane) */ |
| 226 | 		struct memropc ropregs; |
| 227 | 		struct { |
| 228 | 			u_char pad[2048]; |
| 229 | 			struct memropc ropregs; |
| 230 | 		} prime; |
| 231 | 		u_char reg_pad[4096]; |
| 232 | 	} ropcontrol[9]; |
| 233 | 	union {			/* status register */ |
| 234 | 		struct cg2statusreg reg; |
| 235 | 		u_short word; |
| 236 | 		u_char reg_pad[4096]; |
| 237 | 	} status; |
| 238 | 	union {			/* per-plane mask register */ |
| 239 | 		u_short reg;	/* 8 bit mask register - set means plane r/w */ |
| 240 | 		u_char reg_pad[4096]; |
| 241 | 	} ppmask; |
| 242 | 	union {			/* miscellaneous registers */ |
| 243 | 		struct cg2_zoom zoom; |
| 244 | 		struct cg2_nozoom nozoom; |
| 245 | 	} misc; |
| 246 | 	union {			/* interrupt vector */ |
| 247 | 		u_short reg; |
| 248 | 		u_char reg_pad[32]; |
| 249 | 	} intrptvec; |
| 250 | 	union {			 /* board ID */ |
| 251 | 		u_short reg; |
| 252 | 		u_char reg_pad[16]; |
| 253 | 	} id; |
| 254 | 	union {			 /* extended status */ |
| 255 | 		struct cg2_extstatus reg; |
| 256 | 		u_short word; |
| 257 | 		u_char reg_pad[16]; |
| 258 | 	} extstatus; |
| 259 | 	union {			 /* auxiliary raster op mode register (?)*/ |
| 260 | 		u_short reg; |
| 261 | 		u_char reg_pad[4032]; |
| 262 | 	} ropmode; |
| 263 | 	u_short redmap[CG2_CMSIZE];	/* shadow colour maps */ |
| 264 | 	u_short greenmap[CG2_CMSIZE]; |
| 265 | 	u_short bluemap[CG2_CMSIZE]; |
| 266 | }; |