1/* $OpenBSD: db_machdep.h,v 1.23 2022/10/21 18:55:42 miod Exp $ */
2/* $NetBSD: db_machdep.h,v 1.12 2001/07/07 15:16:13 eeh Exp $ */
3
4/*
5 * Mach Operating System
6 * Copyright (c) 1991,1990 Carnegie Mellon University
7 * All Rights Reserved.
8 *
9 * Permission to use, copy, modify and distribute this software and its
10 * documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie Mellon
27 * the rights to redistribute these changes.
28 */
29
30#ifndef _MACHINE_DB_MACHDEP_H_
31#define _MACHINE_DB_MACHDEP_H_
32
33/*
34 * Machine-dependent defines for new kernel debugger.
35 */
36
37#include <uvm/uvm_extern.h>
38
39#include <machine/frame.h>
40#include <machine/psl.h>
41#include <machine/trap.h>
42#include <machine/reg.h>
43
44/* end of mangling */
45
46typedef long db_expr_t; /* expression - signed */
47
48struct trapstate {
49 int64_t tstate;
50 int64_t tpc;
51 int64_t tnpc;
52 int64_t tt;
53};
54#if 1
55typedef struct {
56 struct trapframe ddb_tf;
57 struct frame ddb_fr;
58 struct trapstate ddb_ts[5];
59 int ddb_tl;
60 struct fpstate ddb_fpstate;
61} db_regs_t;
62#else
63typedef struct db_regs {
64 struct trapregs dbr_traps[4];
65 int dbr_y;
66 char dbr_tl;
67 char dbr_canrestore;
68 char dbr_cansave;
69 char dbr_cleanwin;
70 char dbr_cwp;
71 char dbr_wstate;
72 int64_t dbr_g[8];
73 int64_t dbr_ag[8];
74 int64_t dbr_ig[8];
75 int64_t dbr_mg[8];
76 int64_t dbr_out[8];
77 int64_t dbr_local[8];
78 int64_t dbr_in[8];
79} db_regs_t;
80#endif
81
82extern db_regs_t ddb_regs; /* register state */
83#define DDB_TF (&ddb_regs.ddb_tf)
84#define DDB_FR (&ddb_regs.ddb_fr)
85#define DDB_FP (&ddb_regs.ddb_fpstate)
86
87#define PC_REGS(regs) ((vaddr_t)(regs)->ddb_tf.tf_pc)
88#define SET_PC_REGS(regs, value) (regs)->ddb_tf.tf_pc = (int32_t)(value)
89#define PC_ADVANCE(regs) do { \
90 vaddr_t n = (regs)->ddb_tf.tf_npc; \
91 (regs)->ddb_tf.tf_pc = n; \
92 (regs)->ddb_tf.tf_npc = n + 4; \
93} while(0)
94
95#define BKPT_INST 0x91d02001 /* breakpoint instruction */
96#define BKPT_SIZE (4) /* size of breakpoint inst */
97#define BKPT_SET(inst) (BKPT_INST)
98
99#define IS_BREAKPOINT_TRAP(type, code) \
100 ((type) == T_BREAKPOINT || (type) == T_KGDB_EXEC)
101#define IS_WATCHPOINT_TRAP(type, code) \
102 ((type) ==T_PA_WATCHPT || (type) == T_VA_WATCHPT)
103
104/*
105 * Sparc cpus have no hardware single-step.
106 */
107#define SOFTWARE_SSTEP
108
109int db_inst_trap_return(int inst);
110int db_inst_return(int inst);
111int db_inst_call(int inst);
112int db_inst_branch(int inst);
113int db_inst_unconditional_flow_transfer(int inst);
114vaddr_t db_branch_taken(int inst, vaddr_t pc, db_regs_t *regs);
115
116#define inst_trap_return(ins) db_inst_trap_return(ins)
117#define inst_return(ins) db_inst_return(ins)
118#define inst_call(ins) db_inst_call(ins)
119#define inst_branch(ins) db_inst_branch(ins)
120#define inst_unconditional_flow_transfer(ins) \
121 db_inst_unconditional_flow_transfer(ins)
122#define branch_taken(ins, pc, fun, regs) \
123 db_branch_taken((ins), (pc), (regs))
124
125/* see note in db_interface.c about reversed breakpoint addrs */
126#define next_instr_address(pc, bd) \
127 ((bd) ? (pc) : ddb_regs.ddb_tf.tf_npc)
128
129#define DB_MACHINE_COMMANDS
130
131void db_machine_init(void);
132int db_ktrap(int, struct trapframe *);
133
134int db_enter_ddb(void);
135void db_startcpu(struct cpu_info *);
136void db_stopcpu(struct cpu_info *);
137
138#define DDB_STATE_NOT_RUNNING 0
139#define DDB_STATE_RUNNING 1
140#define DDB_STATE_EXITING 2
141
142/* Register device-specific method for triggering XIRs. */
143void db_register_xir(void (*)(void *, int), void *);
144
145#endif /* _MACHINE_DB_MACHDEP_H_ */