1/* $OpenBSD: pci_machdep.h,v 1.38 2020/06/23 01:21:29 jmatthew Exp $ */
2/* $NetBSD: pci_machdep.h,v 1.7 2001/07/20 00:07:14 eeh Exp $ */
3
4/*
5 * Copyright (c) 1999 Matthew R. Green
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#ifndef _MACHINE_PCI_MACHDEP_H_
31#define _MACHINE_PCI_MACHDEP_H_
32
33/*
34 * Forward declarations.
35 */
36struct pci_attach_args;
37
38/*
39 * define some bits used to glue into the common PCI code.
40 */
41
42#define __HAVE_PCI_MSIX
43
44typedef struct sparc_pci_chipset *pci_chipset_tag_t;
45
46#define PCI_INTR_INTX 0x00000000
47#define PCI_INTR_MSI 0x80000000
48#define PCI_INTR_MSIX 0x40000000
49#define PCI_INTR_TYPE_MASK 0xc0000000
50#define PCI_INTR_TYPE(_ih) ((_ih) & PCI_INTR_TYPE_MASK)
51
52#define PCI_INTR_TAG_MASK 0x00ffff00
53#define PCI_INTR_TAG(_ih) ((_ih) & PCI_INTR_TAG_MASK)
54
55#define PCI_INTR_VEC_MASK 0x000000ff
56#define PCI_INTR_VEC(_ih) ((_ih) & PCI_INTR_VEC_MASK)
57typedef u_int pci_intr_handle_t;
58
59/*
60 * The stuuuuuuupid allegedly MI PCI code expects pcitag_t to be a
61 * scalar type. But we really need to store both the OFW node and
62 * the bus/device/function info in it. (We'd like to store more,
63 * like all the ofw properties, but we don't need to.) Luckily,
64 * both are 32-bit values, so we can squeeze them into a u_int64_t
65 * with a little help from some macros.
66 */
67
68#define PCITAG_NODE(x) (int)(((x)>>32)&0xffffffff)
69#define PCITAG_OFFSET(x) ((x)&0xffffffff)
70#define PCITAG_BUS(t) ((PCITAG_OFFSET(t)>>16)&0xff)
71#define PCITAG_DEV(t) ((PCITAG_OFFSET(t)>>11)&0x1f)
72#define PCITAG_FUN(t) ((PCITAG_OFFSET(t)>>8)&0x7)
73#define PCITAG_CREATE(n,b,d,f) (((u_int64_t)(n)<<32)|((b)<<16)|((d)<<11)|((f)<<8))
74#define PCITAG_SETNODE(t,n) ((t)&0xffffffff)|(((n)<<32)
75typedef u_int64_t pcitag_t;
76
77struct sparc_pci_chipset {
78 void *cookie;
79 bus_space_tag_t bustag;
80 bus_space_handle_t bushandle;
81 int rootnode; /* PCI controller */
82 int busnode[256];
83 int (*conf_size)(pci_chipset_tag_t, pcitag_t);
84 pcireg_t (*conf_read)(pci_chipset_tag_t, pcitag_t, int);
85 void (*conf_write)(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
86 int (*intr_map)(struct pci_attach_args *, pci_intr_handle_t *);
87 int (*probe_device_hook)(void *, struct pci_attach_args *);
88};
89
90void pci_attach_hook(struct device *, struct device *,
91 struct pcibus_attach_args *);
92int pci_probe_device_hook(pci_chipset_tag_t,
93 struct pci_attach_args *);
94int pci_bus_maxdevs(pci_chipset_tag_t, int);
95pcitag_t pci_make_tag(pci_chipset_tag_t, int, int, int);
96void pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
97 int *);
98int pci_conf_size(pci_chipset_tag_t, pcitag_t);
99pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
100void pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
101 pcireg_t);
102int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
103int pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *);
104int pci_intr_map_msix(struct pci_attach_args *, int,
105 pci_intr_handle_t *);
106int pci_intr_line(pci_chipset_tag_t, pci_intr_handle_t);
107const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
108void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
109 int, int (*)(void *), void *, const char *);
110void *pci_intr_establish_cpu(pci_chipset_tag_t, pci_intr_handle_t,
111 int, struct cpu_info *,
112 int (*)(void *), void *, const char *);
113void pci_intr_disestablish(pci_chipset_tag_t, void *);
114
115void pci_msi_enable(pci_chipset_tag_t, pcitag_t, bus_addr_t, int);
116void pci_msix_enable(pci_chipset_tag_t, pcitag_t, bus_space_tag_t,
117 int, bus_addr_t, uint32_t);
118int pci_msix_table_map(pci_chipset_tag_t, pcitag_t,
119 bus_space_tag_t, bus_space_handle_t *);
120void pci_msix_table_unmap(pci_chipset_tag_t, pcitag_t,
121 bus_space_tag_t, bus_space_handle_t);
122
123int sparc64_pci_enumerate_bus(struct pci_softc *,
124 int (*match)(struct pci_attach_args *),
125 struct pci_attach_args *);
126
127#define PCI_MACHDEP_ENUMERATE_BUS sparc64_pci_enumerate_bus
128
129#define pci_min_powerstate(c, t) (PCI_PMCSR_STATE_D3)
130#define pci_set_powerstate_md(c, t, s, p)
131
132#define pciide_machdep_compat_intr_establish(a, b, c, d, e) (NULL)
133#define pciide_machdep_compat_intr_disestablish(a, b) do { } while (0)
134
135#define pci_dev_postattach(a, b)
136
137#endif /* _MACHINE_PCI_MACHDEP_H_ */