| 1 | /*	$OpenBSD: pmap.h,v 1.41 2025/09/18 14:54:33 kettenis Exp $	*/ |
| 2 | /*	$NetBSD: pmap.h,v 1.16 2001/04/22 23:19:30 thorpej Exp $	*/ |
| 3 | |
| 4 | /*- |
| 5 | * Copyright (C) 1995, 1996 Wolfgang Solfrank. |
| 6 | * Copyright (C) 1995, 1996 TooLs GmbH. |
| 7 | * All rights reserved. |
| 8 | * |
| 9 | * Redistribution and use in source and binary forms, with or without |
| 10 | * modification, are permitted provided that the following conditions |
| 11 | * are met: |
| 12 | * 1. Redistributions of source code must retain the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer. |
| 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer in the |
| 16 | * documentation and/or other materials provided with the distribution. |
| 17 | * 3. All advertising materials mentioning features or use of this software |
| 18 | * must display the following acknowledgement: |
| 19 | *	This product includes software developed by TooLs GmbH. |
| 20 | * 4. The name of TooLs GmbH may not be used to endorse or promote products |
| 21 | * derived from this software without specific prior written permission. |
| 22 | * |
| 23 | * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR |
| 24 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 25 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 26 | * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 27 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 28 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 29 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 31 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 32 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ |
| 34 | |
| 35 | #ifndef	_MACHINE_PMAP_H_ |
| 36 | #define	_MACHINE_PMAP_H_ |
| 37 | |
| 38 | #ifndef _LOCORE |
| 39 | #ifdef	_KERNEL |
| 40 | #include <sys/queue.h> |
| 41 | #endif |
| 42 | #include <sys/mutex.h> |
| 43 | #endif |
| 44 | |
| 45 | #define __HAVE_PMAP_PURGE |
| 46 | |
| 47 | /* |
| 48 | * This scheme uses 2-level page tables. |
| 49 | * |
| 50 | * While we're still in 32-bit mode we do the following: |
| 51 | * |
| 52 | * offset:						13 bits |
| 53 | * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits |
| 54 | * 2nd level: 512 32-bit pointers in the pmap for 	 9 bits |
| 55 | *							------- |
| 56 | * total:						32 bits |
| 57 | * |
| 58 | * In 64-bit mode the Spitfire and Blackbird CPUs support only |
| 59 | * 44-bit virtual addresses. All addresses between |
| 60 | * 0x0000 07ff ffff ffff and 0xffff f800 0000 0000 are in the |
| 61 | * "VA hole" and trap, so we don't have to track them. However, |
| 62 | * we do need to keep them in mind during PT walking. If they |
| 63 | * ever change the size of the address "hole" we need to rework |
| 64 | * all the page table handling. |
| 65 | * |
| 66 | * offset:						13 bits |
| 67 | * 1st level: 1024 64-bit TTEs in an 8K page for	10 bits |
| 68 | * 2nd level: 1024 64-bit pointers in an 8K page for 	10 bits |
| 69 | * 3rd level: 1024 64-bit pointers in the segmap for 	10 bits |
| 70 | *							------- |
| 71 | * total:						43 bits |
| 72 | * |
| 73 | * Of course, this means for 32-bit spaces we always have a (practically) |
| 74 | * wasted page for the segmap (only one entry used) and half a page wasted |
| 75 | * for the page directory. We still have need of one extra bit 8^(. |
| 76 | */ |
| 77 | |
| 78 | #define HOLESHIFT	(43) |
| 79 | |
| 80 | #define PTSZ	(PAGE_SIZE/8) |
| 81 | #define PDSZ	(PTSZ) |
| 82 | #define STSZ	(PTSZ) |
| 83 | |
| 84 | #define PTSHIFT		(13) |
| 85 | #define	PDSHIFT		(10+PTSHIFT) |
| 86 | #define STSHIFT		(10+PDSHIFT) |
| 87 | |
| 88 | #define PTMASK		(PTSZ-1) |
| 89 | #define PDMASK		(PDSZ-1) |
| 90 | #define STMASK		(STSZ-1) |
| 91 | |
| 92 | #ifndef _LOCORE |
| 93 | |
| 94 | #define va_to_seg(v)	(int)((((paddr_t)(v))>>STSHIFT)&STMASK) |
| 95 | #define va_to_dir(v)	(int)((((paddr_t)(v))>>PDSHIFT)&PDMASK) |
| 96 | #define va_to_pte(v)	(int)((((paddr_t)(v))>>PTSHIFT)&PTMASK) |
| 97 | |
| 98 | #ifdef	_KERNEL |
| 99 | |
| 100 | /* |
| 101 | * Support for big page sizes. This maps the page size to the |
| 102 | * page bits. |
| 103 | */ |
| 104 | struct page_size_map { |
| 105 | 	u_int64_t mask; |
| 106 | 	u_int64_t code; |
| 107 | #ifdef DEBUG |
| 108 | 	u_int64_t use; |
| 109 | #endif |
| 110 | }; |
| 111 | extern const struct page_size_map page_size_map[]; |
| 112 | |
| 113 | struct pmap { |
| 114 | 	struct mutex pm_mtx; |
| 115 | 	int pm_ctx;		/* Current context */ |
| 116 | 	int pm_refs;		/* ref count */ |
| 117 | 	/* |
| 118 | 	 * This contains 64-bit pointers to pages that contain |
| 119 | 	 * 1024 64-bit pointers to page tables. All addresses |
| 120 | 	 * are physical. |
| 121 | 	 * |
| 122 | 	 * !!! Only touch this through pseg_get() and pseg_set() !!! |
| 123 | 	 */ |
| 124 | 	paddr_t pm_physaddr;	/* physical address of pm_segs */ |
| 125 | 	int64_t *pm_segs; |
| 126 | |
| 127 | 	struct pmap_statistics pm_stats; |
| 128 | }; |
| 129 | |
| 130 | /* |
| 131 | * This comes from the PROM and is used to map prom entries. |
| 132 | */ |
| 133 | struct prom_map { |
| 134 | 	u_int64_t	vstart; |
| 135 | 	u_int64_t	vsize; |
| 136 | 	u_int64_t	tte; |
| 137 | }; |
| 138 | |
| 139 | #define PMAP_NC		0x001	/* Set the E bit in the page */ |
| 140 | #define PMAP_NVC	0x002	/* Don't enable the virtual cache */ |
| 141 | #define PMAP_NOCACHE	PMAP_NC |
| 142 | #define PMAP_LITTLE	0x004	/* Map in little endian mode */ |
| 143 | /* Large page size hints -- we really should use another param to pmap_enter() */ |
| 144 | #define PMAP_8K		0x000 |
| 145 | #define PMAP_64K	0x008	/* Use 64K page */ |
| 146 | #define PMAP_512K	0x010 |
| 147 | #define PMAP_4M		0x018 |
| 148 | #define PMAP_SZ_TO_TTE(x)	(((x)&0x018)<<58) |
| 149 | /* If these bits are different in va's to the same PA then there is an aliasing in the d$ */ |
| 150 | #define VA_ALIAS_ALIGN	(1<<14) |
| 151 | #define VA_ALIAS_MASK	(VA_ALIAS_ALIGN - 1) |
| 152 | |
| 153 | typedef	struct pmap *pmap_t; |
| 154 | |
| 155 | extern struct pmap kernel_pmap_; |
| 156 | #define	pmap_kernel()	(&kernel_pmap_) |
| 157 | |
| 158 | /* int pmap_change_wiring(pmap_t pm, vaddr_t va, boolean_t wired); */ |
| 159 | #define	pmap_resident_count(pm)		((pm)->pm_stats.resident_count) |
| 160 | #define	pmap_update(pm)			/* nothing (yet) */ |
| 161 | |
| 162 | #define pmap_proc_iflush(p,va,len)	/* nothing */ |
| 163 | #define pmap_init_percpu()		do { /* nothing */ } while (0) |
| 164 | |
| 165 | void	pmap_bootstrap(u_long, u_long, u_int, u_int); |
| 166 | int	pmap_copyinsn(pmap_t, vaddr_t, uint32_t *); |
| 167 | |
| 168 | /* make sure all page mappings are modulo 16K to prevent d$ aliasing */ |
| 169 | #define PMAP_PREFER |
| 170 | /* pmap prefer alignment */ |
| 171 | #define PMAP_PREFER_ALIGN()	(VA_ALIAS_ALIGN) |
| 172 | /* pmap prefer offset in alignment */ |
| 173 | #define PMAP_PREFER_OFFSET(of)	((of) & VA_ALIAS_MASK) |
| 174 | |
| 175 | #define PMAP_CHECK_COPYIN	CPU_ISSUN4V |
| 176 | |
| 177 | #define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ |
| 178 | |
| 179 | /* SPARC specific? */ |
| 180 | int	pmap_dumpsize(void); |
| 181 | int	pmap_dumpmmu(int (*)(dev_t, daddr_t, caddr_t, size_t), daddr_t); |
| 182 | int	pmap_pa_exists(paddr_t); |
| 183 | |
| 184 | /* SPARC64 specific */ |
| 185 | int	ctx_alloc(struct pmap*); |
| 186 | void	ctx_free(struct pmap*); |
| 187 | |
| 188 | #endif	/* _KERNEL */ |
| 189 | |
| 190 | /* |
| 191 | * For each struct vm_page, there is a list of all currently valid virtual |
| 192 | * mappings of that page. |
| 193 | */ |
| 194 | typedef struct pv_entry { |
| 195 | 	struct pv_entry	*pv_next;	/* next pv_entry */ |
| 196 | 	struct pmap	*pv_pmap;	/* pmap where mapping lies */ |
| 197 | 	vaddr_t		 pv_va;		/* virtual address for mapping */ |
| 198 | } *pv_entry_t; |
| 199 | /* PV flags encoded in the low bits of the VA of the first pv_entry */ |
| 200 | |
| 201 | struct vm_page_md { |
| 202 | 	struct mutex pvmtx; |
| 203 | 	struct pv_entry pvent; |
| 204 | }; |
| 205 | |
| 206 | #define VM_MDPAGE_INIT(pg) do {			\ |
| 207 | 	mtx_init(&(pg)->mdpage.pvmtx, IPL_VM);	\ |
| 208 | 	(pg)->mdpage.pvent.pv_next = NULL;	\ |
| 209 | 	(pg)->mdpage.pvent.pv_pmap = NULL;	\ |
| 210 | 	(pg)->mdpage.pvent.pv_va = 0;		\ |
| 211 | } while (0) |
| 212 | |
| 213 | #endif	/* _LOCORE */ |
| 214 | #endif	/* _MACHINE_PMAP_H_ */ |