| 1 | /*	$OpenBSD: cpu.h,v 1.192 2024/06/18 12:37:29 jsg Exp $	*/ |
| 2 | /*	$NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $	*/ |
| 3 | |
| 4 | /*- |
| 5 | * Copyright (c) 1990 The Regents of the University of California. |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * This code is derived from software contributed to Berkeley by |
| 9 | * William Jolitz. |
| 10 | * |
| 11 | * Redistribution and use in source and binary forms, with or without |
| 12 | * modification, are permitted provided that the following conditions |
| 13 | * are met: |
| 14 | * 1. Redistributions of source code must retain the above copyright |
| 15 | * notice, this list of conditions and the following disclaimer. |
| 16 | * 2. Redistributions in binary form must reproduce the above copyright |
| 17 | * notice, this list of conditions and the following disclaimer in the |
| 18 | * documentation and/or other materials provided with the distribution. |
| 19 | * 3. Neither the name of the University nor the names of its contributors |
| 20 | * may be used to endorse or promote products derived from this software |
| 21 | * without specific prior written permission. |
| 22 | * |
| 23 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 29 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 30 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 31 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 32 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 33 | * SUCH DAMAGE. |
| 34 | * |
| 35 | *	@(#)cpu.h	5.4 (Berkeley) 5/9/91 |
| 36 | */ |
| 37 | |
| 38 | #ifndef _MACHINE_CPU_H_ |
| 39 | #define _MACHINE_CPU_H_ |
| 40 | |
| 41 | /* |
| 42 | * Definitions unique to i386 cpu support. |
| 43 | */ |
| 44 | #ifdef _KERNEL |
| 45 | #include <machine/frame.h> |
| 46 | #include <machine/psl.h> |
| 47 | #include <machine/segments.h> |
| 48 | #include <machine/intrdefs.h> |
| 49 | #include <machine/tss.h> |
| 50 | |
| 51 | #ifdef MULTIPROCESSOR |
| 52 | #include <machine/i82489reg.h> |
| 53 | #include <machine/i82489var.h> |
| 54 | #endif |
| 55 | |
| 56 | #endif /* _KERNEL */ |
| 57 | |
| 58 | /* |
| 59 | * Arguments to hardclock, softclock and statclock |
| 60 | * encapsulate the previous machine state in an opaque |
| 61 | * clockframe; for now, use generic intrframe. |
| 62 | * |
| 63 | * XXX intrframe has a lot of gunk we don't need. |
| 64 | */ |
| 65 | #define clockframe intrframe |
| 66 | |
| 67 | #include <sys/clockintr.h> |
| 68 | #include <sys/device.h> |
| 69 | #include <sys/sched.h> |
| 70 | #include <sys/sensors.h> |
| 71 | #include <sys/srp.h> |
| 72 | #include <uvm/uvm_percpu.h> |
| 73 | |
| 74 | struct intrsource; |
| 75 | |
| 76 | #ifdef _KERNEL |
| 77 | /* XXX stuff to move to cpuvar.h later */ |
| 78 | struct cpu_info { |
| 79 | 	u_int32_t	ci_kern_cr3;	/* U+K page table */ |
| 80 | 	u_int32_t	ci_scratch;	/* for U<-->K transition */ |
| 81 | |
| 82 | #define ci_PAGEALIGN	ci_dev |
| 83 | 	struct device *ci_dev;		/* our device */ |
| 84 | 	struct cpu_info *ci_self;	/* pointer to this structure */ |
| 85 | 	struct schedstate_percpu ci_schedstate; /* scheduler state */ |
| 86 | 	struct cpu_info *ci_next;	/* next cpu */ |
| 87 | |
| 88 | 	/* |
| 89 | 	 * Public members. |
| 90 | 	 */ |
| 91 | 	struct proc *ci_curproc; 	/* current owner of the processor */ |
| 92 | 	cpuid_t ci_cpuid; 		/* our CPU ID */ |
| 93 | 	u_int ci_apicid;		/* our APIC ID */ |
| 94 | 	u_int ci_acpi_proc_id; |
| 95 | 	u_int32_t ci_randseed; |
| 96 | |
| 97 | 	u_int32_t ci_kern_esp;		/* kernel-only stack */ |
| 98 | 	u_int32_t ci_intr_esp;		/* U<-->K trampoline stack */ |
| 99 | 	u_int32_t ci_user_cr3;		/* U-K page table */ |
| 100 | |
| 101 | #if defined(MULTIPROCESSOR) |
| 102 | 	struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; |
| 103 | #define __HAVE_UVM_PERCPU |
| 104 | 	struct uvm_pmr_cache	ci_uvm; |
| 105 | #endif |
| 106 | |
| 107 | 	/* |
| 108 | 	 * Private members. |
| 109 | 	 */ |
| 110 | 	struct proc *ci_fpcurproc;	/* current owner of the FPU */ |
| 111 | 	struct proc *ci_fpsaveproc; |
| 112 | 	int ci_fpsaving;		/* save in progress */ |
| 113 | |
| 114 | 	struct pcb *ci_curpcb;		/* VA of current HW PCB */ |
| 115 | 	struct pcb *ci_idle_pcb;	/* VA of current PCB */ |
| 116 | 	struct pmap *ci_curpmap; |
| 117 | |
| 118 | 	struct intrsource *ci_isources[MAX_INTR_SOURCES]; |
| 119 | 	u_int32_t	ci_ipending; |
| 120 | 	int		ci_ilevel; |
| 121 | 	int		ci_idepth; |
| 122 | 	u_int32_t	ci_imask[NIPL]; |
| 123 | 	u_int32_t	ci_iunmask[NIPL]; |
| 124 | #ifdef DIAGNOSTIC |
| 125 | 	int		ci_mutex_level; |
| 126 | #endif |
| 127 | |
| 128 | 	paddr_t		ci_idle_pcb_paddr; /* PA of idle PCB */ |
| 129 | 	volatile u_long	ci_flags;	/* flags; see below */ |
| 130 | 	u_int32_t	ci_ipis; 	/* interprocessor interrupts pending */ |
| 131 | |
| 132 | 	u_int32_t	ci_level; |
| 133 | 	u_int32_t	ci_vendor[4]; |
| 134 | 	u_int32_t	ci_signature;		/* X86 cpuid type */ |
| 135 | 	u_int32_t	ci_family;		/* extended cpuid family */ |
| 136 | 	u_int32_t	ci_model;		/* extended cpuid model */ |
| 137 | 	u_int32_t	ci_feature_flags;	/* X86 CPUID feature bits */ |
| 138 | 	u_int32_t	ci_feature_sefflags_ebx;/* more CPUID feature bits */ |
| 139 | 	u_int32_t	ci_feature_sefflags_ecx;/* more CPUID feature bits */ |
| 140 | 	u_int32_t	ci_feature_sefflags_edx;/* more CPUID feature bits */ |
| 141 | 	u_int32_t	ci_feature_tpmflags;	/* thermal & power bits */ |
| 142 | 	u_int32_t	cpu_class;		/* CPU class */ |
| 143 | 	u_int32_t	ci_cflushsz;		/* clflush cache-line size */ |
| 144 | |
| 145 | 	int		ci_inatomic; |
| 146 | |
| 147 | 	struct cpu_functions *ci_func;	/* start/stop functions */ |
| 148 | 	void (*cpu_setup)(struct cpu_info *);	/* proc-dependant init */ |
| 149 | |
| 150 | 	struct device	*ci_acpicpudev; |
| 151 | 	volatile u_int	ci_mwait; |
| 152 | #define	MWAIT_IN_IDLE		0x1	/* don't need IPI to wake */ |
| 153 | #define	MWAIT_KEEP_IDLING	0x2	/* cleared by other cpus to wake me */ |
| 154 | #define	MWAIT_ONLY		0x4	/* set if all idle states use mwait */ |
| 155 | #define	MWAIT_IDLING		(MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) |
| 156 | |
| 157 | 	int		ci_want_resched; |
| 158 | |
| 159 | 	union descriptor *ci_gdt; |
| 160 | 	struct i386tss	*ci_tss; |
| 161 | 	struct i386tss	*ci_nmi_tss; |
| 162 | |
| 163 | 	volatile int ci_ddb_paused;	/* paused due to other proc in ddb */ |
| 164 | #define CI_DDB_RUNNING		0 |
| 165 | #define CI_DDB_SHOULDSTOP	1 |
| 166 | #define CI_DDB_STOPPED		2 |
| 167 | #define CI_DDB_ENTERDDB		3 |
| 168 | #define CI_DDB_INDDB		4 |
| 169 | |
| 170 | 	struct ksensordev	ci_sensordev; |
| 171 | 	struct ksensor		ci_sensor; |
| 172 | #if defined(GPROF) || defined(DDBPROF) |
| 173 | 	struct gmonparam	*ci_gmon; |
| 174 | 	struct clockintr	ci_gmonclock; |
| 175 | #endif |
| 176 | 	struct clockqueue	ci_queue; |
| 177 | 	char			ci_panicbuf[512]; |
| 178 | }; |
| 179 | |
| 180 | /* |
| 181 | * Processor flag notes: The "primary" CPU has certain MI-defined |
| 182 | * roles (mostly relating to hardclock handling); we distinguish |
| 183 | * between the processor which booted us, and the processor currently |
| 184 | * holding the "primary" role just to give us the flexibility later to |
| 185 | * change primaries should we be sufficiently twisted. |
| 186 | */ |
| 187 | |
| 188 | #define	CPUF_BSP	0x0001		/* CPU is the original BSP */ |
| 189 | #define	CPUF_AP		0x0002		/* CPU is an AP */ |
| 190 | #define	CPUF_SP		0x0004		/* CPU is only processor */ |
| 191 | #define	CPUF_PRIMARY	0x0008		/* CPU is active primary processor */ |
| 192 | #define	CPUF_APIC_CD	0x0010		/* CPU has apic configured */ |
| 193 | #define	CPUF_CONST_TSC	0x0020		/* CPU has constant TSC */ |
| 194 | |
| 195 | #define	CPUF_PRESENT	0x1000		/* CPU is present */ |
| 196 | #define	CPUF_RUNNING	0x2000		/* CPU is running */ |
| 197 | #define CPUF_VMM	0x4000		/* CPU is executing in VMM mode */ |
| 198 | |
| 199 | /* |
| 200 | * We statically allocate the CPU info for the primary CPU (or, |
| 201 | * the only CPU on uniprocessors), and the primary CPU is the |
| 202 | * first CPU on the CPU info list. |
| 203 | */ |
| 204 | struct cpu_info_full; |
| 205 | extern struct cpu_info_full cpu_info_full_primary; |
| 206 | #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + PAGE_SIZE*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) |
| 207 | |
| 208 | extern struct cpu_info *cpu_info_list; |
| 209 | |
| 210 | #define	CPU_INFO_ITERATOR		int |
| 211 | #define	CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \ |
| 212 | 					 ci != NULL; ci = ci->ci_next) |
| 213 | |
| 214 | #define CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) |
| 215 | |
| 216 | #ifdef MULTIPROCESSOR |
| 217 | |
| 218 | #define MAXCPUS			32	/* because we use a bitmask */ |
| 219 | |
| 220 | #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci)) |
| 221 | #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci)) |
| 222 | #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci)) |
| 223 | |
| 224 | static struct cpu_info *curcpu(void); |
| 225 | |
| 226 | static __inline struct cpu_info * |
| 227 | curcpu(void) |
| 228 | { |
| 229 | 	struct cpu_info *ci; |
| 230 | |
| 231 | 	/* Can't include sys/param.h for offsetof() since it includes us */ |
| 232 | 	__asm volatile("movl %%fs:%1, %0" : |
| 233 | 		"=r" (ci) : "m" |
| 234 | 		(*(struct cpu_info * const *)&((struct cpu_info *)0)->ci_self)); |
| 235 | 	return ci; |
| 236 | } |
| 237 | #define cpu_number() 		(curcpu()->ci_cpuid) |
| 238 | |
| 239 | #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY) |
| 240 | #define CPU_IS_RUNNING(ci)	((ci)->ci_flags & CPUF_RUNNING) |
| 241 | |
| 242 | extern struct cpu_info	*cpu_info[MAXCPUS]; |
| 243 | |
| 244 | extern void cpu_boot_secondary_processors(void); |
| 245 | extern void cpu_init_idle_pcbs(void); |
| 246 | |
| 247 | void cpu_kick(struct cpu_info *); |
| 248 | void cpu_unidle(struct cpu_info *); |
| 249 | |
| 250 | #define CPU_BUSY_CYCLE()	__asm volatile("pause": : : "memory") |
| 251 | |
| 252 | #else /* MULTIPROCESSOR */ |
| 253 | |
| 254 | #define MAXCPUS			1 |
| 255 | |
| 256 | #define cpu_number()		0 |
| 257 | #define	curcpu()		(&cpu_info_primary) |
| 258 | |
| 259 | #define CPU_IS_PRIMARY(ci)	1 |
| 260 | #define CPU_IS_RUNNING(ci)	1 |
| 261 | |
| 262 | #define cpu_kick(ci) |
| 263 | #define cpu_unidle(ci) |
| 264 | |
| 265 | #define CPU_BUSY_CYCLE()	__asm volatile ("" ::: "memory") |
| 266 | |
| 267 | #endif |
| 268 | |
| 269 | #include <machine/cpufunc.h> |
| 270 | |
| 271 | #define aston(p)	((p)->p_md.md_astpending = 1) |
| 272 | |
| 273 | #define curpcb			curcpu()->ci_curpcb |
| 274 | |
| 275 | unsigned int cpu_rnd_messybits(void); |
| 276 | |
| 277 | /* |
| 278 | * Preempt the current process if in interrupt from user mode, |
| 279 | * or after the current trap/syscall if in system mode. |
| 280 | */ |
| 281 | extern void need_resched(struct cpu_info *); |
| 282 | #define clear_resched(ci) (ci)->ci_want_resched = 0 |
| 283 | |
| 284 | #define	CLKF_USERMODE(frame)	USERMODE((frame)->if_cs, (frame)->if_eflags) |
| 285 | #define	CLKF_PC(frame)		((frame)->if_eip) |
| 286 | #define	CLKF_INTR(frame)	(IDXSEL((frame)->if_cs) == GICODE_SEL) |
| 287 | |
| 288 | /* |
| 289 | * This is used during profiling to integrate system time. |
| 290 | */ |
| 291 | #define	PROC_PC(p)		((p)->p_md.md_regs->tf_eip) |
| 292 | #define	PROC_STACK(p)		((p)->p_md.md_regs->tf_esp) |
| 293 | |
| 294 | /* |
| 295 | * Give a profiling tick to the current process when the user profiling |
| 296 | * buffer pages are invalid. On the i386, request an ast to send us |
| 297 | * through trap(), marking the proc as needing a profiling tick. |
| 298 | */ |
| 299 | #define	need_proftick(p)	aston(p) |
| 300 | |
| 301 | /* |
| 302 | * Notify the current process (p) that it has a signal pending, |
| 303 | * process as soon as possible. |
| 304 | */ |
| 305 | void signotify(struct proc *); |
| 306 | |
| 307 | /* |
| 308 | * We need a machine-independent name for this. |
| 309 | */ |
| 310 | extern void (*delay_func)(int); |
| 311 | void delay_fini(void(*)(int)); |
| 312 | void delay_init(void(*)(int), int); |
| 313 | struct timeval; |
| 314 | |
| 315 | #define	DELAY(x)		(*delay_func)(x) |
| 316 | #define delay(x)		(*delay_func)(x) |
| 317 | |
| 318 | /* |
| 319 | * High resolution clock support (Pentium only) |
| 320 | */ |
| 321 | void	calibrate_cyclecounter(void); |
| 322 | |
| 323 | /* |
| 324 | * pull in #defines for kinds of processors |
| 325 | */ |
| 326 | #include <machine/cputypes.h> |
| 327 | |
| 328 | struct cpu_cpuid_nameclass { |
| 329 | 	const char *cpu_id; |
| 330 | 	int cpu_vendor; |
| 331 | 	const char *cpu_vendorname; |
| 332 | 	struct cpu_cpuid_family { |
| 333 | 		int cpu_class; |
| 334 | 		const char *cpu_models[CPU_MAXMODEL+2]; |
| 335 | 		void (*cpu_setup)(struct cpu_info *); |
| 336 | 	} cpu_family[CPU_MAXFAMILY - CPU_MINFAMILY + 1]; |
| 337 | }; |
| 338 | |
| 339 | struct cpu_cpuid_feature { |
| 340 | 	int feature_bit; |
| 341 | 	const char *feature_name; |
| 342 | }; |
| 343 | |
| 344 | /* locore.s */ |
| 345 | extern int cpu_id; |
| 346 | extern char cpu_vendor[]; /* note: NOT nul-terminated */ |
| 347 | extern char cpu_brandstr[]; |
| 348 | extern int cpuid_level; |
| 349 | extern int cpu_miscinfo; |
| 350 | extern int cpu_feature; |
| 351 | extern int ecpu_feature; |
| 352 | extern int cpu_ecxfeature; |
| 353 | extern int ecpu_ecxfeature; |
| 354 | extern int cpu_cache_eax; |
| 355 | extern int cpu_cache_ebx; |
| 356 | extern int cpu_cache_ecx; |
| 357 | extern int cpu_cache_edx; |
| 358 | extern int cpu_perf_eax; |
| 359 | extern int cpu_perf_ebx; |
| 360 | extern int cpu_perf_edx; |
| 361 | extern int cpu_apmi_edx; |
| 362 | extern int cpu_pae;	/* cpu has both PAE and NX features */ |
| 363 | |
| 364 | /* cpu.c */ |
| 365 | extern u_int cpu_mwait_size; |
| 366 | extern u_int cpu_mwait_states; |
| 367 | extern void cpu_update_nmi_cr3(vaddr_t); |
| 368 | extern void cpu_tsx_disable(struct cpu_info *); |
| 369 | |
| 370 | /* machdep.c */ |
| 371 | extern int cpu_apmhalt; |
| 372 | extern int cpu_class; |
| 373 | extern char cpu_model[]; |
| 374 | extern const struct cpu_cpuid_nameclass i386_cpuid_cpus[]; |
| 375 | extern void (*cpu_idle_enter_fcn)(void); |
| 376 | extern void (*cpu_idle_cycle_fcn)(void); |
| 377 | extern void (*cpu_idle_leave_fcn)(void); |
| 378 | extern void (*cpu_suspend_cycle_fcn)(void); |
| 379 | |
| 380 | extern int cpuspeed; |
| 381 | |
| 382 | #if !defined(SMALL_KERNEL) |
| 383 | #define BUS66 6667 |
| 384 | #define BUS100 10000 |
| 385 | #define BUS133 13333 |
| 386 | #define BUS166 16667 |
| 387 | #define BUS200 20000 |
| 388 | #define BUS266 26667 |
| 389 | #define BUS333 33333 |
| 390 | extern int bus_clock; |
| 391 | #endif |
| 392 | |
| 393 | /* F00F bug fix stuff for pentium cpu */ |
| 394 | extern int cpu_f00f_bug; |
| 395 | void fix_f00f(void); |
| 396 | |
| 397 | /* dkcsum.c */ |
| 398 | void	dkcsumattach(void); |
| 399 | |
| 400 | extern int i386_use_fxsave; |
| 401 | extern int i386_has_sse; |
| 402 | extern int i386_has_sse2; |
| 403 | |
| 404 | extern void (*update_cpuspeed)(void); |
| 405 | |
| 406 | extern void (*initclock_func)(void); |
| 407 | extern void (*startclock_func)(void); |
| 408 | |
| 409 | /* machdep.c */ |
| 410 | void	dumpconf(void); |
| 411 | void	cpu_reset(void); |
| 412 | void	i386_proc0_tss_init(void); |
| 413 | void	i386_init_pcb_tss(struct cpu_info *); |
| 414 | void	cpuid(u_int32_t, u_int32_t *); |
| 415 | |
| 416 | /* locore.s */ |
| 417 | struct region_descriptor; |
| 418 | void	lgdt(struct region_descriptor *); |
| 419 | |
| 420 | struct pcb; |
| 421 | void	savectx(struct pcb *); |
| 422 | void	proc_trampoline(void); |
| 423 | |
| 424 | /* clock.c */ |
| 425 | void	startclocks(void); |
| 426 | void	rtcinit(void); |
| 427 | void	rtcstart(void); |
| 428 | void	rtcstop(void); |
| 429 | void	i8254_delay(int); |
| 430 | void	i8254_initclocks(void); |
| 431 | void	i8254_startclock(void); |
| 432 | void	i8254_start_both_clocks(void); |
| 433 | void	i8254_inittimecounter(void); |
| 434 | void	i8254_inittimecounter_simple(void); |
| 435 | |
| 436 | #if !defined(SMALL_KERNEL) |
| 437 | /* est.c */ |
| 438 | void	est_init(struct cpu_info *, int); |
| 439 | void	est_setperf(int); |
| 440 | /* longrun.c */ |
| 441 | void	longrun_init(void); |
| 442 | void	longrun_setperf(int); |
| 443 | /* p4tcc.c */ |
| 444 | void	p4tcc_init(int, int); |
| 445 | void	p4tcc_setperf(int); |
| 446 | /* powernow.c */ |
| 447 | void	k6_powernow_init(void); |
| 448 | void	k6_powernow_setperf(int); |
| 449 | /* powernow-k7.c */ |
| 450 | void	k7_powernow_init(void); |
| 451 | void	k7_powernow_setperf(int); |
| 452 | /* powernow-k8.c */ |
| 453 | void 	k8_powernow_init(void); |
| 454 | void 	k8_powernow_setperf(int); |
| 455 | /* k1x-pstate.c */ |
| 456 | void k1x_init(struct cpu_info *); |
| 457 | void k1x_setperf(int); |
| 458 | #endif |
| 459 | |
| 460 | /* npx.c */ |
| 461 | void	npxsave_proc(struct proc *, int); |
| 462 | void	npxsave_cpu(struct cpu_info *, int); |
| 463 | |
| 464 | /* isa_machdep.c */ |
| 465 | void	isa_defaultirq(void); |
| 466 | int	isa_nmi(void); |
| 467 | |
| 468 | /* pmap.c */ |
| 469 | void	pmap_bootstrap(vaddr_t); |
| 470 | |
| 471 | /* vm_machdep.c */ |
| 472 | int	kvtop(caddr_t); |
| 473 | |
| 474 | #ifdef MULTIPROCESSOR |
| 475 | /* mp_setperf.c */ |
| 476 | void	mp_setperf_init(void); |
| 477 | #endif |
| 478 | |
| 479 | int	cpu_paenable(void *); |
| 480 | #endif /* _KERNEL */ |
| 481 | |
| 482 | /* |
| 483 | * CTL_MACHDEP definitions. |
| 484 | */ |
| 485 | #define	CPU_CONSDEV		1	/* dev_t: console terminal device */ |
| 486 | #define	CPU_BIOS		2	/* BIOS variables */ |
| 487 | #define	CPU_BLK2CHR		3	/* convert blk maj into chr one */ |
| 488 | #define	CPU_CHR2BLK		4	/* convert chr maj into blk one */ |
| 489 | #define CPU_ALLOWAPERTURE	5	/* allow mmap of /dev/xf86 */ |
| 490 | #define CPU_CPUVENDOR		6	/* cpuid vendor string */ |
| 491 | #define CPU_CPUID		7	/* cpuid */ |
| 492 | #define CPU_CPUFEATURE		8	/* cpuid features */ |
| 493 | #define CPU_KBDRESET		10	/* keyboard reset under pcvt */ |
| 494 | #define CPU_OSFXSR		13	/* uses FXSAVE/FXRSTOR */ |
| 495 | #define CPU_SSE			14	/* supports SSE */ |
| 496 | #define CPU_SSE2		15	/* supports SSE2 */ |
| 497 | #define CPU_XCRYPT		16	/* supports VIA xcrypt in userland */ |
| 498 | #define CPU_LIDACTION		18	/* action caused by lid close */ |
| 499 | #define CPU_FORCEUKBD		19	/* Force ukbd(4) as console keyboard */ |
| 500 | #define CPU_MAXID		20	/* number of valid machdep ids */ |
| 501 | |
| 502 | #define	CTL_MACHDEP_NAMES { \ |
| 503 | 	{ 0, 0 }, \ |
| 504 | 	{ "console_device", CTLTYPE_STRUCT }, \ |
| 505 | 	{ "bios", CTLTYPE_INT }, \ |
| 506 | 	{ "blk2chr", CTLTYPE_STRUCT }, \ |
| 507 | 	{ "chr2blk", CTLTYPE_STRUCT }, \ |
| 508 | 	{ "allowaperture", CTLTYPE_INT }, \ |
| 509 | 	{ "cpuvendor", CTLTYPE_STRING }, \ |
| 510 | 	{ "cpuid", CTLTYPE_INT }, \ |
| 511 | 	{ "cpufeature", CTLTYPE_INT }, \ |
| 512 | 	{ 0, 0 }, \ |
| 513 | 	{ "kbdreset", CTLTYPE_INT }, \ |
| 514 | 	{ 0, 0 }, \ |
| 515 | 	{ 0, 0 }, \ |
| 516 | 	{ "osfxsr", CTLTYPE_INT }, \ |
| 517 | 	{ "sse", CTLTYPE_INT }, \ |
| 518 | 	{ "sse2", CTLTYPE_INT }, \ |
| 519 | 	{ "xcrypt", CTLTYPE_INT }, \ |
| 520 | 	{ 0, 0 }, \ |
| 521 | 	{ "lidaction", CTLTYPE_INT }, \ |
| 522 | 	{ "forceukbd", CTLTYPE_INT }, \ |
| 523 | } |
| 524 | |
| 525 | /* |
| 526 | * This needs to be included late since it relies on definitions higher |
| 527 | * up in this file. |
| 528 | */ |
| 529 | #if defined(MULTIPROCESSOR) && defined(_KERNEL) |
| 530 | #include <sys/mplock.h> |
| 531 | #endif |
| 532 | |
| 533 | #endif /* !_MACHINE_CPU_H_ */ |