1/* $OpenBSD: cpu.h,v 1.185 2026/03/31 16:46:22 deraadt Exp $ */
2/* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */
3
4/*-
5 * Copyright (c) 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91
36 */
37
38#ifndef _MACHINE_CPU_H_
39#define _MACHINE_CPU_H_
40
41/*
42 * Definitions unique to x86-64 cpu support.
43 */
44#ifdef _KERNEL
45#include <machine/frame.h>
46#include <machine/segments.h> /* USERMODE */
47#include <machine/intrdefs.h>
48#endif /* _KERNEL */
49
50#include <sys/clockintr.h>
51#include <sys/device.h>
52#include <sys/rwlock.h>
53#include <sys/sched.h>
54#include <sys/sensors.h>
55#include <sys/srp.h>
56#include <sys/xcall.h>
57#include <uvm/uvm_percpu.h>
58
59#ifdef _KERNEL
60
61/* VMXON region (Intel) */
62struct vmxon_region {
63 uint32_t vr_revision;
64};
65
66/*
67 * VMX for Intel CPUs
68 */
69struct vmx {
70 uint64_t vmx_cr0_fixed0;
71 uint64_t vmx_cr0_fixed1;
72 uint64_t vmx_cr4_fixed0;
73 uint64_t vmx_cr4_fixed1;
74 uint32_t vmx_vmxon_revision;
75 uint32_t vmx_msr_table_size;
76 uint32_t vmx_cr3_tgt_count;
77 uint8_t vmx_has_l1_flush_msr;
78 uint64_t vmx_invept_mode;
79};
80
81/*
82 * SVM for AMD CPUs
83 */
84struct svm {
85 uint32_t svm_max_asid;
86 uint8_t svm_flush_by_asid;
87 uint8_t svm_vmcb_clean;
88 uint8_t svm_decode_assist;
89};
90
91union vmm_cpu_cap {
92 struct vmx vcc_vmx;
93 struct svm vcc_svm;
94};
95
96enum cpu_vendor {
97 CPUV_UNKNOWN,
98 CPUV_AMD,
99 CPUV_INTEL,
100 CPUV_VIA,
101};
102
103/*
104 * Locks used to protect struct members in this file:
105 * I immutable after creation
106 * a atomic operations
107 * o owned (read/modified only) by this CPU
108 */
109struct x86_64_tss;
110struct vcpu;
111struct cpu_info {
112 /*
113 * The beginning of this structure in mapped in the userspace "u-k"
114 * page tables, so that these first couple members can be accessed
115 * from the trampoline code. The ci_PAGEALIGN member defines where
116 * the part that is *not* visible begins, so don't put anything
117 * above it that must be kept hidden from userspace!
118 */
119 u_int64_t ci_kern_cr3; /* [o] U+K page table */
120 u_int64_t ci_scratch; /* [o] for U<-->K transition */
121
122#define ci_PAGEALIGN ci_dev
123 struct device *ci_dev; /* [I] */
124 struct cpu_info *ci_self; /* [I] */
125 struct cpu_info *ci_next; /* [I] */
126
127 u_int ci_cpuid; /* [I] */
128 u_int ci_apicid; /* [I] */
129 u_int ci_acpi_proc_id; /* [I] */
130 u_int32_t ci_randseed; /* [o] */
131
132 u_int64_t ci_kern_rsp; /* [o] kernel-only stack */
133 u_int64_t ci_intr_rsp; /* [o] U<-->K trampoline stack */
134 u_int64_t ci_user_cr3; /* [o] U-K page table */
135
136 /* bits for mitigating Micro-architectural Data Sampling */
137 char ci_mds_tmp[64]; /* [o] 64-byte aligned */
138 void *ci_mds_buf; /* [I] */
139
140 struct proc *ci_curproc; /* [o] */
141 struct schedstate_percpu ci_schedstate; /* scheduler state */
142
143 struct pmap *ci_proc_pmap; /* active, non-kernel pmap */
144 struct pmap *ci_user_pmap; /* [o] last pmap used in userspace */
145 struct pcb *ci_curpcb; /* [o] */
146 struct pcb *ci_idle_pcb; /* [o] */
147
148 u_int ci_pflags; /* [o] */
149#define CPUPF_USERSEGS 0x01 /* CPU has curproc's segs and FS.base */
150#define CPUPF_USERXSTATE 0x02 /* CPU has curproc's xsave state */
151
152 struct intrsource *ci_isources[MAX_INTR_SOURCES];
153 u_int64_t ci_ipending;
154 int ci_ilevel;
155 int ci_idepth;
156 int ci_handled_intr_level;
157 u_int64_t ci_imask[NIPL];
158 u_int64_t ci_iunmask[NIPL];
159#ifdef DIAGNOSTIC
160 int ci_mutex_level;
161#endif
162
163 volatile u_int ci_flags; /* [a] */
164 u_int32_t ci_ipis; /* [a] */
165
166 enum cpu_vendor ci_vendor; /* [I] mapped from cpuid(0) */
167 u_int32_t ci_cpuid_level; /* [I] cpuid(0).eax */
168 u_int32_t ci_feature_flags; /* [I] */
169 u_int32_t ci_feature_eflags; /* [I] */
170 u_int32_t ci_feature_sefflags_ebx;/* [I] */
171 u_int32_t ci_feature_sefflags_ecx;/* [I] */
172 u_int32_t ci_feature_sefflags_edx;/* [I] */
173 u_int32_t ci_feature_amdspec_ebx; /* [I] */
174 u_int32_t ci_feature_amdsev_eax; /* [I] */
175 u_int32_t ci_feature_amdsev_ebx; /* [I] */
176 u_int32_t ci_feature_amdsev_ecx; /* [I] */
177 u_int32_t ci_feature_amdsev_edx; /* [I] */
178 u_int32_t ci_feature_tpmflags; /* [I] */
179 u_int32_t ci_pnfeatset; /* [I] */
180 u_int32_t ci_efeature_eax; /* [I] */
181 u_int32_t ci_efeature_ecx; /* [I] */
182 u_int32_t ci_brand[12]; /* [I] */
183 u_int32_t ci_signature; /* [I] */
184 u_int32_t ci_family; /* [I] */
185 u_int32_t ci_model; /* [I] */
186 u_int32_t ci_cflushsz; /* [I] */
187
188 int ci_inatomic; /* [o] */
189
190#define __HAVE_CPU_TOPOLOGY
191 u_int32_t ci_cputype; /* [I] */
192 u_int32_t ci_smt_id; /* [I] */
193 u_int32_t ci_core_id; /* [I] */
194 u_int32_t ci_pkg_id; /* [I] */
195
196 struct cpu_functions *ci_func; /* [I] */
197 void (*cpu_setup)(struct cpu_info *); /* [I] */
198
199 struct device *ci_acpicpudev; /* [I] */
200 volatile u_int ci_mwait; /* [a] */
201#define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */
202#define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */
203#define MWAIT_ONLY 0x4 /* set if all idle states use mwait */
204#define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING)
205
206 int ci_want_resched;
207
208 struct x86_64_tss *ci_tss; /* [o] */
209 void *ci_gdt; /* [o] */
210
211 volatile int ci_ddb_paused;
212#define CI_DDB_RUNNING 0
213#define CI_DDB_SHOULDSTOP 1
214#define CI_DDB_STOPPED 2
215#define CI_DDB_ENTERDDB 3
216#define CI_DDB_INDDB 4
217
218#ifdef MULTIPROCESSOR
219 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM];
220 struct xcall_cpu ci_xcall;
221#define __HAVE_UVM_PERCPU
222 struct uvm_pmr_cache ci_uvm; /* [o] page cache */
223#endif
224
225 struct ksensordev ci_sensordev;
226 struct ksensor ci_sensor;
227 struct ksensor ci_hz_sensor;
228 u_int64_t ci_hz_mperf;
229 u_int64_t ci_hz_aperf;
230#if defined(GPROF) || defined(DDBPROF)
231 struct gmonparam *ci_gmon;
232 struct clockintr ci_gmonclock;
233#endif
234 u_int32_t ci_vmm_flags;
235#define CI_VMM_VMX (1 << 0)
236#define CI_VMM_SVM (1 << 1)
237#define CI_VMM_RVI (1 << 2)
238#define CI_VMM_EPT (1 << 3)
239#define CI_VMM_DIS (1 << 4)
240 union vmm_cpu_cap ci_vmm_cap;
241 paddr_t ci_vmxon_region_pa;
242 struct vmxon_region *ci_vmxon_region;
243 paddr_t ci_vmcs_pa;
244 struct rwlock ci_vmcs_lock;
245 struct pmap *ci_ept_pmap; /* [o] last used EPT pmap */
246 struct vcpu *ci_guest_vcpu; /* [o] last vcpu resumed */
247
248 char ci_panicbuf[512];
249
250 struct clockqueue ci_queue;
251};
252
253#define CPUF_BSP 0x0001 /* CPU is the original BSP */
254#define CPUF_AP 0x0002 /* CPU is an AP */
255#define CPUF_SP 0x0004 /* CPU is only processor */
256#define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */
257
258#define CPUF_IDENTIFY 0x0010 /* CPU may now identify */
259#define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */
260
261#define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */
262#define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */
263
264#define CPUF_PRESENT 0x1000 /* CPU is present */
265#define CPUF_RUNNING 0x2000 /* CPU is running */
266#define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */
267#define CPUF_GO 0x8000 /* CPU should start running */
268#define CPUF_PARK 0x10000 /* CPU should self-park in real mode */
269#define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */
270
271#define PROC_PC(p) ((p)->p_md.md_regs->tf_rip)
272#define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp)
273
274struct cpu_info_full;
275extern struct cpu_info_full cpu_info_full_primary;
276#define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN)))
277
278extern struct cpu_info *cpu_info_list;
279
280#define CPU_INFO_ITERATOR int
281#define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \
282 ci != NULL; ci = ci->ci_next)
283
284#define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
285
286/*
287 * Preempt the current process if in interrupt from user mode,
288 * or after the current trap/syscall if in system mode.
289 */
290extern void need_resched(struct cpu_info *);
291#define clear_resched(ci) (ci)->ci_want_resched = 0
292
293#if defined(MULTIPROCESSOR)
294
295#define MAXCPUS 255
296
297#define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci))
298#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
299#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
300
301#define curcpu() ({struct cpu_info *__ci; \
302 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \
303 :"n" (offsetof(struct cpu_info, ci_self))); \
304 __ci;})
305#define cpu_number() (curcpu()->ci_cpuid)
306
307#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
308#define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING)
309
310extern struct cpu_info *cpu_info[MAXCPUS];
311
312void cpu_boot_secondary_processors(void);
313
314void cpu_kick(struct cpu_info *);
315void cpu_unidle(struct cpu_info *);
316
317#define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory")
318
319#else /* !MULTIPROCESSOR */
320
321#define MAXCPUS 1
322
323#ifdef _KERNEL
324#define curcpu() (&cpu_info_primary)
325
326#define cpu_kick(ci)
327#define cpu_unidle(ci)
328
329#define CPU_BUSY_CYCLE() __asm volatile ("" ::: "memory")
330
331#endif
332
333/*
334 * definitions of cpu-dependent requirements
335 * referenced in generic code
336 */
337#define cpu_number() 0
338#define CPU_IS_PRIMARY(ci) 1
339#define CPU_IS_RUNNING(ci) 1
340
341#endif /* MULTIPROCESSOR */
342
343#include <machine/cpufunc.h>
344#include <machine/psl.h>
345
346static inline unsigned int
347cpu_rnd_messybits(void)
348{
349 unsigned int hi, lo;
350
351 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo));
352
353 return (hi ^ lo);
354}
355
356#endif /* _KERNEL */
357
358#ifdef MULTIPROCESSOR
359#include <sys/mplock.h>
360#endif
361
362#define aston(p) ((p)->p_md.md_astpending = 1)
363
364#define curpcb curcpu()->ci_curpcb
365
366/*
367 * Arguments to hardclock, softclock and statclock
368 * encapsulate the previous machine state in an opaque
369 * clockframe; for now, use generic intrframe.
370 */
371#define clockframe intrframe
372
373#define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags)
374#define CLKF_PC(frame) ((frame)->if_rip)
375#define CLKF_INTR(frame) (curcpu()->ci_idepth > 1)
376
377/*
378 * Give a profiling tick to the current process when the user profiling
379 * buffer pages are invalid. On the i386, request an ast to send us
380 * through usertrap(), marking the proc as needing a profiling tick.
381 */
382#define need_proftick(p) aston(p)
383
384void signotify(struct proc *);
385
386/*
387 * We need a machine-independent name for this.
388 */
389extern void (*delay_func)(int);
390void delay_fini(void (*)(int));
391void delay_init(void (*)(int), int);
392struct timeval;
393
394#define DELAY(x) (*delay_func)(x)
395#define delay(x) (*delay_func)(x)
396
397
398#ifdef _KERNEL
399/* cpu.c */
400extern int cpu_feature;
401extern int cpu_ebxfeature;
402extern int cpu_ecxfeature;
403extern int ecpu_ecxfeature;
404extern int cpu_sev_guestmode;
405extern int cpu_id;
406extern char cpu_vendor[];
407extern int cpuid_level;
408extern int cpu_meltdown;
409extern u_int cpu_mwait_size;
410extern u_int cpu_mwait_states;
411
412int cpu_suspend_primary(void);
413
414/* cacheinfo.c */
415void x86_print_cacheinfo(struct cpu_info *);
416
417/* identcpu.c */
418void identifycpu(struct cpu_info *);
419int cpu_amd64speed(int *);
420extern int cpuspeed;
421extern int amd64_pos_cbit;
422extern int amd64_min_noes_asid;
423
424/* machdep.c */
425void dumpconf(void);
426void cpu_set_vendor(struct cpu_info *, int _level, const char *_vendor);
427void cpu_reset(void);
428void x86_64_proc0_tss_ldt_init(void);
429int amd64_pa_used(paddr_t);
430#define cpu_idle_enter() do { /* nothing */ } while (0)
431extern void (*cpu_idle_cycle_fcn)(void);
432extern void (*cpu_suspend_cycle_fcn)(void);
433#define cpu_idle_cycle() (*cpu_idle_cycle_fcn)()
434#define cpu_idle_leave() do { /* nothing */ } while (0)
435extern void (*initclock_func)(void);
436extern void (*startclock_func)(void);
437extern int hibernate_delay;
438
439struct region_descriptor;
440void lgdt(struct region_descriptor *);
441
442struct pcb;
443void savectx(struct pcb *);
444void proc_trampoline(void);
445
446/* clock.c */
447void startclocks(void);
448void rtcinit(void);
449void rtcstart(void);
450void rtcstop(void);
451int rtcalarm_suspend(struct timeval *tv);
452void rtcalarm_resume(void);
453int rtcalarm_fired(void);
454void i8254_delay(int);
455void i8254_initclocks(void);
456void i8254_startclock(void);
457void i8254_start_both_clocks(void);
458void i8254_inittimecounter(void);
459void i8254_inittimecounter_simple(void);
460
461/* i8259.c */
462void i8259_default_setup(void);
463
464void cpu_init_msrs(struct cpu_info *);
465void cpu_fix_msrs(struct cpu_info *);
466void cpu_tsx_disable(struct cpu_info *);
467
468/* dkcsum.c */
469void dkcsumattach(void);
470
471/* bus_machdep.c */
472void x86_bus_space_init(void);
473void x86_bus_space_mallocok(void);
474
475/* powernow-k8.c */
476void k8_powernow_init(struct cpu_info *);
477void k8_powernow_setperf(int);
478
479/* k1x-pstate.c */
480void k1x_init(struct cpu_info *);
481void k1x_setperf(int);
482
483void est_init(struct cpu_info *);
484void est_setperf(int);
485
486#ifdef MULTIPROCESSOR
487/* mp_setperf.c */
488void mp_setperf_init(void);
489#endif
490
491#endif /* _KERNEL */
492
493/*
494 * CTL_MACHDEP definitions.
495 */
496#define CPU_CONSDEV 1 /* dev_t: console terminal device */
497#define CPU_BIOS 2 /* BIOS variables */
498#define CPU_BLK2CHR 3 /* convert blk maj into chr one */
499#define CPU_CHR2BLK 4 /* convert chr maj into blk one */
500#define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */
501#define CPU_CPUVENDOR 6 /* cpuid vendor string */
502#define CPU_CPUID 7 /* cpuid */
503#define CPU_CPUFEATURE 8 /* cpuid features */
504#define CPU_KBDRESET 10 /* keyboard reset under pcvt */
505#define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */
506#define CPU_HIBERNATEDELAY 13 /* hibernate delay after suspend */
507#define CPU_LIDACTION 14 /* action caused by lid close */
508#define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */
509#define CPU_TSCFREQ 16 /* TSC frequency */
510#define CPU_INVARIANTTSC 17 /* has invariant TSC */
511#define CPU_PWRACTION 18 /* action caused by power button */
512#define CPU_RETPOLINE 19 /* cpu requires retpoline pattern */
513#define CPU_VMMODE 20 /* virtualization mode */
514#define CPU_MAXID 21 /* number of valid machdep ids */
515
516#define CTL_MACHDEP_NAMES { \
517 { 0, 0 }, \
518 { "console_device", CTLTYPE_STRUCT }, \
519 { "bios", CTLTYPE_INT }, \
520 { "blk2chr", CTLTYPE_STRUCT }, \
521 { "chr2blk", CTLTYPE_STRUCT }, \
522 { "allowaperture", CTLTYPE_INT }, \
523 { "cpuvendor", CTLTYPE_STRING }, \
524 { "cpuid", CTLTYPE_INT }, \
525 { "cpufeature", CTLTYPE_INT }, \
526 { 0, 0 }, \
527 { "kbdreset", CTLTYPE_INT }, \
528 { 0, 0 }, \
529 { "xcrypt", CTLTYPE_INT }, \
530 { "hibernatedelay", CTLTYPE_INT }, \
531 { "lidaction", CTLTYPE_INT }, \
532 { "forceukbd", CTLTYPE_INT }, \
533 { "tscfreq", CTLTYPE_QUAD }, \
534 { "invarianttsc", CTLTYPE_INT }, \
535 { "pwraction", CTLTYPE_INT }, \
536 { "retpoline", CTLTYPE_INT }, \
537 { "vmmode", CTLTYPE_STRING }, \
538}
539
540#endif /* !_MACHINE_CPU_H_ */