| 1 | /*	$OpenBSD: pctr.h,v 1.7 2019/08/26 12:41:47 pirofti Exp $	*/ |
| 2 | |
| 3 | /* |
| 4 | * Pentium performance counter driver for OpenBSD. |
| 5 | * Copyright 1996 David Mazieres <dm@lcs.mit.edu>. |
| 6 | * |
| 7 | * Modification and redistribution in source and binary forms is |
| 8 | * permitted provided that due credit is given to the author and the |
| 9 | * OpenBSD project by leaving this copyright notice intact. |
| 10 | */ |
| 11 | |
| 12 | #ifndef _MACHINE_PCTR_H_ |
| 13 | #define _MACHINE_PCTR_H_ |
| 14 | |
| 15 | #include <sys/ioccom.h> |
| 16 | |
| 17 | typedef u_int64_t	pctrval; |
| 18 | |
| 19 | #define PCTR_NUM	4 |
| 20 | |
| 21 | struct pctrst { |
| 22 | 	u_int pctr_fn[PCTR_NUM];	/* Current settings of counters */ |
| 23 | 	pctrval pctr_tsc;		/* Free-running 64-bit cycle counter */ |
| 24 | 	pctrval	pctr_hwc[PCTR_NUM];	/* Values of the hardware counters */ |
| 25 | }; |
| 26 | |
| 27 | /* Bit values in fn fields and PIOCS ioctl's */ |
| 28 | #define PCTR_U		0x010000	/* Monitor user-level events */ |
| 29 | #define PCTR_K		0x020000	/* Monitor kernel-level events */ |
| 30 | #define PCTR_E		0x040000	/* Edge detect */ |
| 31 | #define PCTR_EN		0x400000	/* Enable counters (counter 0 only) */ |
| 32 | #define PCTR_I		0x800000	/* Invert counter mask */ |
| 33 | |
| 34 | /* Unit Mask values to distinguish cache coherent states */ |
| 35 | #define PCTR_UM_M	0x0800		/* Modified cache lines */ |
| 36 | #define PCTR_UM_E	0x0400		/* Exclusive cache lines */ |
| 37 | #define PCTR_UM_S	0x0200		/* Shared cache lines */ |
| 38 | #define PCTR_UM_I	0x0100		/* Invalid cache lines */ |
| 39 | #define PCTR_UM_MESI	(PCTR_UM_M|PCTR_UM_E|PCTR_UM_S|PCTR_UM_I) |
| 40 | #define PCTR_UM_A	0x2000		/* Any initiator */ |
| 41 | |
| 42 | #define PCTR_UM_SHIFT	8		/* Left shift for unit mask */ |
| 43 | #define PCTR_CM_SHIFT	24		/* Left shift for counter mask */ |
| 44 | |
| 45 | /* ioctl to set which counter a device tracks */ |
| 46 | #define PCIOCRD	_IOR('c', 1, struct pctrst)	/* Read counter value */ |
| 47 | #define PCIOCS0	_IOW('c', 8, unsigned int)	/* Set counter 0 function */ |
| 48 | #define PCIOCS1 _IOW('c', 9, unsigned int)	/* Set counter 1 function */ |
| 49 | #define PCIOCS2 _IOW('c', 10, unsigned int)	/* Set counter 2 function */ |
| 50 | #define PCIOCS3 _IOW('c', 11, unsigned int)	/* Set counter 3 function */ |
| 51 | |
| 52 | #define _PATH_PCTR	"/dev/pctr" |
| 53 | |
| 54 | #define rdpmc(pmc)						\ |
| 55 | ({								\ |
| 56 | 	u_int32_t hi, lo;					\ |
| 57 | 	__asm volatile("rdpmc"					\ |
| 58 | 	 : "=d" (hi), "=a" (lo) : "c" (pmc));		\ |
| 59 | 	hi &= 0xffffff;						\ |
| 60 | 	(((u_int64_t)hi << 32) | (u_int64_t)lo);		\ |
| 61 | }) |
| 62 | |
| 63 | #ifdef _KERNEL |
| 64 | |
| 65 | void	pctrattach(int); |
| 66 | int	pctropen(dev_t, int, int, struct proc *); |
| 67 | int	pctrclose(dev_t, int, int, struct proc *); |
| 68 | int	pctrioctl(dev_t, u_long, caddr_t, int, struct proc *); |
| 69 | void	pctr_reload(struct cpu_info *); |
| 70 | void	pctr_resume(struct cpu_info *); |
| 71 | |
| 72 | #endif /* _KERNEL */ |
| 73 | #endif /* ! _MACHINE_PCTR_H_ */ |