1#if !defined(_SOFT_FLOAT) && !defined(__NO_FPRS__)
2.global feclearexcept
3.type feclearexcept,@function
4feclearexcept:
5 andis. 3,3,0x3e00
6 /* if (r3 & FE_INVALID) r3 |= all_invalid_flags */
7 andis. 0,3,0x2000
8 stwu 1,-16(1)
9 beq- 0,1f
10 oris 3,3,0x01f8
11 ori 3,3,0x0700
121:
13 /*
14 * note: fpscr contains various fpu status and control
15 * flags and we dont check if r3 may alter other flags
16 * than the exception related ones
17 * ufpscr &= ~r3
18 */
19 mffs 0
20 stfd 0,8(1)
21 lwz 9,12(1)
22 andc 9,9,3
23 stw 9,12(1)
24 lfd 0,8(1)
25 mtfsf 255,0
26
27 /* return 0 */
28 li 3,0
29 addi 1,1,16
30 blr
31
32.global feraiseexcept
33.type feraiseexcept,@function
34feraiseexcept:
35 andis. 3,3,0x3e00
36 /* if (r3 & FE_INVALID) r3 |= software_invalid_flag */
37 andis. 0,3,0x2000
38 stwu 1,-16(1)
39 beq- 0,1f
40 ori 3,3,0x0400
411:
42 /* fpscr |= r3 */
43 mffs 0
44 stfd 0,8(1)
45 lwz 9,12(1)
46 or 9,9,3
47 stw 9,12(1)
48 lfd 0,8(1)
49 mtfsf 255,0
50
51 /* return 0 */
52 li 3,0
53 addi 1,1,16
54 blr
55
56.global fetestexcept
57.type fetestexcept,@function
58fetestexcept:
59 andis. 3,3,0x3e00
60 /* return r3 & fpscr */
61 stwu 1,-16(1)
62 mffs 0
63 stfd 0,8(1)
64 lwz 9,12(1)
65 addi 1,1,16
66 and 3,3,9
67 blr
68
69.global fegetround
70.type fegetround,@function
71fegetround:
72 /* return fpscr & 3 */
73 stwu 1,-16(1)
74 mffs 0
75 stfd 0,8(1)
76 lwz 3,12(1)
77 addi 1,1,16
78 clrlwi 3,3,30
79 blr
80
81.global __fesetround
82.hidden __fesetround
83.type __fesetround,@function
84__fesetround:
85 /*
86 * note: invalid input is not checked, r3 < 4 must hold
87 * fpscr = (fpscr & -4U) | r3
88 */
89 stwu 1,-16(1)
90 mffs 0
91 stfd 0,8(1)
92 lwz 9,12(1)
93 clrrwi 9,9,2
94 or 9,9,3
95 stw 9,12(1)
96 lfd 0,8(1)
97 mtfsf 255,0
98
99 /* return 0 */
100 li 3,0
101 addi 1,1,16
102 blr
103
104.global fegetenv
105.type fegetenv,@function
106fegetenv:
107 /* *r3 = fpscr */
108 mffs 0
109 stfd 0,0(3)
110 /* return 0 */
111 li 3,0
112 blr
113
114.global fesetenv
115.type fesetenv,@function
116fesetenv:
117 cmpwi 3, -1
118 bne 1f
119 mflr 4
120 bl 2f
121 .zero 8
1222: mflr 3
123 mtlr 4
1241: /* fpscr = *r3 */
125 lfd 0,0(3)
126 mtfsf 255,0
127 /* return 0 */
128 li 3,0
129 blr
130#endif