| 1 | //! This file is auto-generated by tools/update_cpu_features.zig. |
| 2 | |
| 3 | const std = @import("../std.zig"); |
| 4 | const CpuFeature = std.Target.Cpu.Feature; |
| 5 | const CpuModel = std.Target.Cpu.Model; |
| 6 | |
| 7 | pub const Feature = enum { |
| 8 | @"32bit", |
| 9 | @"32s", |
| 10 | @"64bit", |
| 11 | d, |
| 12 | div32, |
| 13 | f, |
| 14 | frecipe, |
| 15 | la_global_with_abs, |
| 16 | la_global_with_pcrel, |
| 17 | la_local_with_abs, |
| 18 | lam_bh, |
| 19 | lamcas, |
| 20 | lasx, |
| 21 | lbt, |
| 22 | ld_seq_sa, |
| 23 | lsx, |
| 24 | lvz, |
| 25 | prefer_w_inst, |
| 26 | relax, |
| 27 | scq, |
| 28 | ual, |
| 29 | }; |
| 30 | |
| 31 | pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet; |
| 32 | pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas; |
| 33 | pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny; |
| 34 | pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll; |
| 35 | |
| 36 | pub const all_features = blk: { |
| 37 | const len = @typeInfo(Feature).@"enum".field_names.len; |
| 38 | std.debug.assert(len <= CpuFeature.Set.needed_bit_count); |
| 39 | var result: [len]CpuFeature = undefined; |
| 40 | result[@backingInt(Feature.@"32bit")] = .{ |
| 41 | .llvm_name = "32bit", |
| 42 | .description = "LA32 Basic Integer and Privilege Instruction Set", |
| 43 | .dependencies = featureSet(&[_]Feature{}), |
| 44 | }; |
| 45 | result[@backingInt(Feature.@"32s")] = .{ |
| 46 | .llvm_name = "32s", |
| 47 | .description = "LA32 Standard Basic Instruction Extension", |
| 48 | .dependencies = featureSet(&[_]Feature{}), |
| 49 | }; |
| 50 | result[@backingInt(Feature.@"64bit")] = .{ |
| 51 | .llvm_name = "64bit", |
| 52 | .description = "LA64 Basic Integer and Privilege Instruction Set", |
| 53 | .dependencies = featureSet(&[_]Feature{ |
| 54 | .@"32s", |
| 55 | }), |
| 56 | }; |
| 57 | result[@backingInt(Feature.d)] = .{ |
| 58 | .llvm_name = "d", |
| 59 | .description = "'D' (Double-Precision Floating-Point)", |
| 60 | .dependencies = featureSet(&[_]Feature{ |
| 61 | .f, |
| 62 | }), |
| 63 | }; |
| 64 | result[@backingInt(Feature.div32)] = .{ |
| 65 | .llvm_name = "div32", |
| 66 | .description = "Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended", |
| 67 | .dependencies = featureSet(&[_]Feature{}), |
| 68 | }; |
| 69 | result[@backingInt(Feature.f)] = .{ |
| 70 | .llvm_name = "f", |
| 71 | .description = "'F' (Single-Precision Floating-Point)", |
| 72 | .dependencies = featureSet(&[_]Feature{}), |
| 73 | }; |
| 74 | result[@backingInt(Feature.frecipe)] = .{ |
| 75 | .llvm_name = "frecipe", |
| 76 | .description = "Support frecipe.{s/d} and frsqrte.{s/d} instructions", |
| 77 | .dependencies = featureSet(&[_]Feature{}), |
| 78 | }; |
| 79 | result[@backingInt(Feature.la_global_with_abs)] = .{ |
| 80 | .llvm_name = "la-global-with-abs", |
| 81 | .description = "Expand la.global as la.abs", |
| 82 | .dependencies = featureSet(&[_]Feature{}), |
| 83 | }; |
| 84 | result[@backingInt(Feature.la_global_with_pcrel)] = .{ |
| 85 | .llvm_name = "la-global-with-pcrel", |
| 86 | .description = "Expand la.global as la.pcrel", |
| 87 | .dependencies = featureSet(&[_]Feature{}), |
| 88 | }; |
| 89 | result[@backingInt(Feature.la_local_with_abs)] = .{ |
| 90 | .llvm_name = "la-local-with-abs", |
| 91 | .description = "Expand la.local as la.abs", |
| 92 | .dependencies = featureSet(&[_]Feature{}), |
| 93 | }; |
| 94 | result[@backingInt(Feature.lam_bh)] = .{ |
| 95 | .llvm_name = "lam-bh", |
| 96 | .description = "Support amswap[_db].{b/h} and amadd[_db].{b/h} instructions", |
| 97 | .dependencies = featureSet(&[_]Feature{}), |
| 98 | }; |
| 99 | result[@backingInt(Feature.lamcas)] = .{ |
| 100 | .llvm_name = "lamcas", |
| 101 | .description = "Support amcas[_db].{b/h/w/d}", |
| 102 | .dependencies = featureSet(&[_]Feature{}), |
| 103 | }; |
| 104 | result[@backingInt(Feature.lasx)] = .{ |
| 105 | .llvm_name = "lasx", |
| 106 | .description = "'LASX' (Loongson Advanced SIMD Extension)", |
| 107 | .dependencies = featureSet(&[_]Feature{ |
| 108 | .lsx, |
| 109 | }), |
| 110 | }; |
| 111 | result[@backingInt(Feature.lbt)] = .{ |
| 112 | .llvm_name = "lbt", |
| 113 | .description = "'LBT' (Loongson Binary Translation Extension)", |
| 114 | .dependencies = featureSet(&[_]Feature{}), |
| 115 | }; |
| 116 | result[@backingInt(Feature.ld_seq_sa)] = .{ |
| 117 | .llvm_name = "ld-seq-sa", |
| 118 | .description = "Don't use a same-address load-load barrier (dbar 0x700)", |
| 119 | .dependencies = featureSet(&[_]Feature{}), |
| 120 | }; |
| 121 | result[@backingInt(Feature.lsx)] = .{ |
| 122 | .llvm_name = "lsx", |
| 123 | .description = "'LSX' (Loongson SIMD Extension)", |
| 124 | .dependencies = featureSet(&[_]Feature{ |
| 125 | .d, |
| 126 | }), |
| 127 | }; |
| 128 | result[@backingInt(Feature.lvz)] = .{ |
| 129 | .llvm_name = "lvz", |
| 130 | .description = "'LVZ' (Loongson Virtualization Extension)", |
| 131 | .dependencies = featureSet(&[_]Feature{}), |
| 132 | }; |
| 133 | result[@backingInt(Feature.prefer_w_inst)] = .{ |
| 134 | .llvm_name = "prefer-w-inst", |
| 135 | .description = "Prefer instructions with W suffix", |
| 136 | .dependencies = featureSet(&[_]Feature{}), |
| 137 | }; |
| 138 | result[@backingInt(Feature.relax)] = .{ |
| 139 | .llvm_name = "relax", |
| 140 | .description = "Enable Linker relaxation", |
| 141 | .dependencies = featureSet(&[_]Feature{}), |
| 142 | }; |
| 143 | result[@backingInt(Feature.scq)] = .{ |
| 144 | .llvm_name = "scq", |
| 145 | .description = "Support sc.q instruction", |
| 146 | .dependencies = featureSet(&[_]Feature{}), |
| 147 | }; |
| 148 | result[@backingInt(Feature.ual)] = .{ |
| 149 | .llvm_name = "ual", |
| 150 | .description = "Allow memory accesses to be unaligned", |
| 151 | .dependencies = featureSet(&[_]Feature{}), |
| 152 | }; |
| 153 | const ti = @typeInfo(Feature); |
| 154 | for (&result, 0..) |*elem, i| { |
| 155 | elem.index = i; |
| 156 | elem.name = ti.@"enum".field_names[i]; |
| 157 | } |
| 158 | break :blk result; |
| 159 | }; |
| 160 | |
| 161 | pub const cpu = struct { |
| 162 | pub const generic_la32: CpuModel = .{ |
| 163 | .name = "generic_la32", |
| 164 | .llvm_name = "generic-la32", |
| 165 | .features = featureSet(&[_]Feature{ |
| 166 | .@"32bit", |
| 167 | }), |
| 168 | }; |
| 169 | pub const generic_la64: CpuModel = .{ |
| 170 | .name = "generic_la64", |
| 171 | .llvm_name = null, |
| 172 | .features = featureSet(&[_]Feature{ |
| 173 | .@"64bit", |
| 174 | }), |
| 175 | }; |
| 176 | pub const la32rv1_0: CpuModel = .{ |
| 177 | .name = "la32rv1_0", |
| 178 | .llvm_name = null, |
| 179 | .features = featureSet(&[_]Feature{ |
| 180 | .@"32bit", |
| 181 | .ual, |
| 182 | }), |
| 183 | }; |
| 184 | pub const la32v1_0: CpuModel = .{ |
| 185 | .name = "la32v1_0", |
| 186 | .llvm_name = null, |
| 187 | .features = featureSet(&[_]Feature{ |
| 188 | .@"32bit", |
| 189 | .@"32s", |
| 190 | .d, |
| 191 | .ual, |
| 192 | }), |
| 193 | }; |
| 194 | pub const la464: CpuModel = .{ |
| 195 | .name = "la464", |
| 196 | .llvm_name = "la464", |
| 197 | .features = featureSet(&[_]Feature{ |
| 198 | .@"64bit", |
| 199 | .lasx, |
| 200 | .lbt, |
| 201 | .lvz, |
| 202 | .ual, |
| 203 | }), |
| 204 | }; |
| 205 | pub const la64v1_0: CpuModel = .{ |
| 206 | .name = "la64v1_0", |
| 207 | .llvm_name = null, |
| 208 | .features = featureSet(&[_]Feature{ |
| 209 | .@"64bit", |
| 210 | .lsx, |
| 211 | .ual, |
| 212 | }), |
| 213 | }; |
| 214 | pub const la64v1_1: CpuModel = .{ |
| 215 | .name = "la64v1_1", |
| 216 | .llvm_name = null, |
| 217 | .features = featureSet(&[_]Feature{ |
| 218 | .@"64bit", |
| 219 | .div32, |
| 220 | .frecipe, |
| 221 | .lam_bh, |
| 222 | .lamcas, |
| 223 | .ld_seq_sa, |
| 224 | .lsx, |
| 225 | .scq, |
| 226 | .ual, |
| 227 | }), |
| 228 | }; |
| 229 | pub const la664: CpuModel = .{ |
| 230 | .name = "la664", |
| 231 | .llvm_name = "la664", |
| 232 | .features = featureSet(&[_]Feature{ |
| 233 | .@"64bit", |
| 234 | .div32, |
| 235 | .frecipe, |
| 236 | .lam_bh, |
| 237 | .lamcas, |
| 238 | .lasx, |
| 239 | .lbt, |
| 240 | .ld_seq_sa, |
| 241 | .lvz, |
| 242 | .scq, |
| 243 | .ual, |
| 244 | }), |
| 245 | }; |
| 246 | }; |