1#skip amdgcn-amdhsa-none-baseline-whole-llvm-lld-pic
2#skip amdgcn-amdpal-none-baseline-whole-llvm-lld-pic
3#skip amdgcn-mesa3d-none-baseline-whole-llvm-lld-pic
4
5#skip csky-freestanding-eabi-baseline-whole-llvm-lld-pic
6#skip csky-freestanding-eabihf-baseline-whole-llvm-lld-pic
7#skip csky-linux-eabi-baseline-whole-llvm-lld-pic
8#skip csky-linux-eabihf-baseline-whole-llvm-lld-pic
9#skip csky-linux-gnueabi-baseline-whole-llvm-lld-pic
10#skip csky-linux-gnueabihf-baseline-whole-llvm-lld-pic
11
12#skip bpfeb-freestanding-none-baseline-whole-llvm-lld-pic
13
14#skip bpfel-freestanding-none-baseline-whole-llvm-lld-pic
15
16#skip loongarch32-freestanding-none-baseline-whole-llvm-lld-pic
17#skip loongarch32-linux-gnu-baseline-whole-llvm-lld-pic
18#skip loongarch32-linux-gnuf32-baseline-whole-llvm-lld-pic
19#skip loongarch32-linux-gnusf-baseline-whole-llvm-lld-pic
20#skip loongarch32-linux-musl-baseline-whole-llvm-lld-pic
21#skip loongarch32-linux-muslf32-baseline-whole-llvm-lld-pic
22#skip loongarch32-linux-muslsf-baseline-whole-llvm-lld-pic
23#skip loongarch32-linux-none-baseline-whole-llvm-lld-pic
24#skip loongarch32-uefi-none-baseline-whole-llvm-lld-pic
25
26#skip loongarch64-freestanding-none-baseline-whole-llvm-lld-pic
27#skip loongarch64-linux-gnu-baseline-whole-llvm-lld-pic
28#skip loongarch64-linux-gnuf32-baseline-whole-llvm-lld-pic
29#skip loongarch64-linux-gnusf-baseline-whole-llvm-lld-pic
30#skip loongarch64-linux-musl-baseline-whole-llvm-lld-pic
31#skip loongarch64-linux-muslf32-baseline-whole-llvm-lld-pic
32#skip loongarch64-linux-muslsf-baseline-whole-llvm-lld-pic
33#skip loongarch64-linux-none-baseline-whole-llvm-lld-pic
34#skip loongarch64-uefi-none-baseline-whole-llvm-lld-pic
35
36#skip nvptx-cuda-none-baseline-whole-llvm-lld-pic
37#skip nvptx-nvcl-none-baseline-whole-llvm-lld-pic
38
39#skip nvptx64-cuda-none-baseline-whole-llvm-lld-pic
40#skip nvptx64-nvcl-none-baseline-whole-llvm-lld-pic
41
42#skip riscv32-freestanding-none-baseline-whole-llvm-lld-pic
43#skip riscv32-linux-gnu-baseline-whole-llvm-lld-pic
44#skip riscv32-linux-musl-baseline-whole-llvm-lld-pic
45#skip riscv32-linux-none-baseline-whole-llvm-lld-pic
46#skip riscv32-netbsd-none-baseline-whole-llvm-lld-pic
47#skip riscv32-rtems-none-baseline-whole-llvm-lld-pic
48#skip riscv32-uefi-none-baseline-whole-llvm-lld-pic
49#skip riscv32be-freestanding-none-baseline-whole-llvm-lld-pic
50
51#skip riscv64-freebsd-none-baseline-whole-llvm-lld-pic
52#skip riscv64-freestanding-none-baseline-whole-llvm-lld-pic
53#skip riscv64-fuchsia-none-baseline-whole-llvm-lld-pic
54#skip riscv64-haiku-none-baseline-whole-llvm-lld-pic
55#skip riscv64-hurd-gnu-baseline-whole-llvm-lld-pic
56#skip riscv64-linux-android-baseline-whole-llvm-lld-pic
57#skip riscv64-linux-gnu-baseline-whole-llvm-lld-pic
58#skip riscv64-linux-musl-baseline-whole-llvm-lld-pic
59#skip riscv64-linux-none-baseline-whole-llvm-lld-pic
60#skip riscv64-netbsd-none-baseline-whole-llvm-lld-pic
61#skip riscv64-openbsd-none-baseline-whole-llvm-lld-pic
62#skip riscv64-rtems-none-baseline-whole-llvm-lld-pic
63#skip riscv64-serenity-none-baseline-whole-llvm-lld-pic
64#skip riscv64-uefi-none-baseline-whole-llvm-lld-pic
65#skip riscv64be-freestanding-none-baseline-whole-llvm-lld-pic
66
67#skip spirv32-opencl-none-baseline-whole-llvm-lld-pic
68#skip spirv32-opengl-none-baseline-whole-llvm-lld-pic
69#skip spirv32-vulkan-none-baseline-whole-llvm-lld-pic
70
71#skip spirv64-amdhsa-none-baseline-whole-llvm-lld-pic
72#skip spirv64-opencl-none-baseline-whole-llvm-lld-pic
73#skip spirv64-vulkan-none-baseline-whole-llvm-lld-pic
74
75#skip x86_64-linux-gnux32-baseline-whole-llvm-new-pic
76#skip x86_64-linux-muslx32-baseline-whole-llvm-new-pic
77#skip x86_64-linux-x32-baseline-whole-llvm-new-pic
78
79#obj {
80--name test -fno-lld -fno-new-linker -ofmt=llvmir
81-Mroot=test.zig
82#}
83
84#write test.zig {
85export fn entry(arr: *const [16]u8) @Vector(16, u8) {
86 return arr.*;
87}
88#}
89#update "one vector load"
90#check llvm {
91define #...<16 x i8> @test.entry(#...) #...{
92#...
93 %1 = alloca [16 x i8], align 1#...
94 %3 = load <16 x i8>, ptr %1, align 1#...
95 ret <16 x i8> %3#...
96#}
97
98#write test.zig {
99export fn entry(a: *@Vector(8, u8), b: *@Vector(8, u8), src: [*]const u8) void {
100 const q: @Vector(16, u8) = src[0..16].*;
101 a.* = @shuffle(u8, q, undefined, @Vector(8, i32){ 0, 1, 2, 3, 4, 5, 6, 7 });
102 b.* = @shuffle(u8, q, undefined, @Vector(8, i32){ 7, 8, 9, 10, 11, 12, 13, 14 });
103}
104#}
105#update "feeding overlapping shuffles"
106#check llvm {
107define #...void @test.entry(ptr #...%0, ptr #...%1, #...) #...{
108#...
109 %11 = load <16 x i8>, ptr %#...
110 %12 = shufflevector <16 x i8> %11, #...
111 store <8 x i8> %12, ptr %0, align 8#...
112 %13 = shufflevector <16 x i8> %11, #...
113 store <8 x i8> %13, ptr %1, align 8#...
114 ret void#...
115}
116#}