authorgravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2026-06-26 01:08:08-04:00
committergravatar for jacobly@ziglang.orgJacob Young <jacobly@ziglang.org> 2026-07-27 14:35:12-04:00
log0c0be6da880fd1a6bdd3266125d6c5bcaac2803f
tree630652d279009d6e67e9b1f149fc1335153ad790
parent1e4b0e0022fcbda51032fe555d948ae59db3f640

llvm: implement c cabi for s390x

Closes #35799

6 files changed, 121 insertions(+), 130 deletions(-)

CMakeLists.txt+1
......@@ -358,6 +358,7 @@ set(ZIG_STAGE2_SOURCES
358358 src/codegen/c/type/render_defs.zig
359359 src/codegen/llvm.zig
360360 src/codegen/llvm/bindings.zig
361 src/codegen/s390x/abi.zig
361362 src/crash_report.zig
362363 src/dev.zig
363364 src/libs/freebsd.zig
src/codegen/aarch64/abi.zig+1-1
......@@ -1,4 +1,4 @@
1const assert = @import("std").debug.assert;
1const assert = std.debug.assert;
22const std = @import("std");
33const InternPool = @import("../../InternPool.zig");
44const Type = @import("../../Type.zig");
src/codegen/llvm/FuncGen.zig+28-3
......@@ -6808,6 +6808,24 @@ const ParamTypeIterator = struct {
68086808 },
68096809 }
68106810 },
6811 .s390x_sysv, .s390x_sysv_vx => {
6812 it.zig_index += 1;
6813 switch (s390x_c_abi.classifyType(ty, .arg, zcu)) {
6814 .none => return .no_bits,
6815 .double_or_float, .vector, .simple => {
6816 it.llvm_index += 1;
6817 return .byval;
6818 },
6819 .simple_aggregate => {
6820 it.llvm_index += 1;
6821 return .abi_sized_int;
6822 },
6823 .pointer => {
6824 it.llvm_index += 1;
6825 return .byref_mut;
6826 },
6827 }
6828 },
68116829 .wasm_mvp => switch (wasm_c_abi.classifyType(ty, zcu)) {
68126830 .direct => |scalar_ty| {
68136831 if (isScalar(zcu, ty)) {
......@@ -7086,6 +7104,12 @@ pub fn fnReturnStrat(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Err
70867104 return .{ .mem_cast = try o.builder.structType(.normal, types[0..types_len]) };
70877105 },
70887106 },
7107 .s390x_sysv, .s390x_sysv_vx => return switch (s390x_c_abi.classifyType(ret_ty, .ret, zcu)) {
7108 .none => .void,
7109 .double_or_float, .vector, .simple => .by_val,
7110 .simple_aggregate => unreachable,
7111 .pointer => .sret,
7112 },
70897113 .wasm_mvp => switch (wasm_c_abi.classifyType(ret_ty, zcu)) {
70907114 .direct => |scalar_ty| if (scalar_ty.toIntern() == ret_ty.toIntern()) {
70917115 assert(!isByRef(ret_ty, zcu));
......@@ -7823,12 +7847,13 @@ const Builder = std.zig.llvm.Builder;
78237847const assert = std.debug.assert;
78247848const math = std.math;
78257849
7826const x86_64_abi = @import("../x86_64/abi.zig");
7827const wasm_c_abi = @import("../wasm/abi.zig");
78287850const aarch64_c_abi = @import("../aarch64/abi.zig");
78297851const arm_c_abi = @import("../arm/abi.zig");
7830const riscv_c_abi = @import("../riscv64/abi.zig");
78317852const mips_c_abi = @import("../mips/abi.zig");
7853const riscv_c_abi = @import("../riscv64/abi.zig");
7854const s390x_c_abi = @import("../s390x/abi.zig");
7855const wasm_c_abi = @import("../wasm/abi.zig");
7856const x86_64_abi = @import("../x86_64/abi.zig");
78327857
78337858const Zcu = @import("../../Zcu.zig");
78347859const Air = @import("../../Air.zig");
src/codegen/s390x/abi.zig created+90
......@@ -0,0 +1,90 @@
1const assert = std.debug.assert;
2const std = @import("std");
3const InternPool = @import("../../InternPool.zig");
4const Type = @import("../../Type.zig");
5const Zcu = @import("../../Zcu.zig");
6
7pub const Context = enum { ret, arg };
8
9pub const Class = enum {
10 none,
11 double_or_float,
12 vector,
13 simple,
14 simple_aggregate,
15 pointer,
16};
17
18pub fn classifyType(ty: Type, context: Context, zcu: *Zcu) Class {
19 tag: switch (ty.zigTypeTag(zcu)) {
20 .type,
21 .comptime_float,
22 .comptime_int,
23 .undefined,
24 .null,
25 .error_union,
26 .error_set,
27 .@"fn",
28 .@"opaque",
29 .frame,
30 .@"anyframe",
31 .enum_literal,
32 .spirv,
33 => unreachable,
34 .void, .noreturn => return .none,
35 .bool => return .simple,
36 .int, .@"enum" => return switch (ty.intInfo(zcu).bits) {
37 0 => .none,
38 1...64 => .simple,
39 else => .pointer,
40 },
41 .float => return switch (ty.floatBits(zcu.getTarget())) {
42 16, 32, 64 => .double_or_float,
43 else => .pointer,
44 },
45 .pointer, .optional => return .simple,
46 .array => switch (ty.arrayLen(zcu)) {
47 0 => return .none,
48 1 => switch (context) {
49 .ret => {},
50 .arg => return classifyType(ty.childType(zcu), context, zcu),
51 },
52 else => {},
53 },
54 .@"struct", .@"union" => |tag| switch (ty.containerLayout(zcu)) {
55 .auto => unreachable,
56 .@"extern" => switch (context) {
57 .ret => {},
58 .arg => {
59 var class: Class = .none;
60 for (0..switch (tag) {
61 else => unreachable,
62 .@"struct" => ty.structFieldCount(zcu),
63 .@"union" => ty.unionTagTypeHypothetical(zcu).enumFieldCount(zcu),
64 }) |field_index| {
65 switch (tag) {
66 else => unreachable,
67 .@"struct" => if (ty.structFieldIsComptime(field_index, zcu)) continue,
68 .@"union" => {},
69 }
70 const field_class = classifyType(ty.fieldType(field_index, zcu), context, zcu);
71 if (field_class == .none) continue;
72 if (class != .none) break :tag;
73 class = field_class;
74 }
75 return class;
76 },
77 },
78 .@"packed" => return classifyType(ty.backingIntType(zcu), context, zcu),
79 },
80 .vector => return if (ty.abiSize(zcu) <= 16) .vector else .pointer,
81 }
82 return switch (ty.abiSize(zcu)) {
83 0 => .none,
84 1, 2, 4, 8 => switch (context) {
85 .ret => .pointer,
86 .arg => .simple_aggregate,
87 },
88 else => .pointer,
89 };
90}
test/c_abi/cfuncs.c-12
......@@ -15564,7 +15564,6 @@ void run_c_tests(void) {
1556415564#ifndef __loongarch__
1556515565#ifndef ZIG_MIPS64
1556615566#ifndef __powerpc__
15567#ifndef __s390x__
1556815567 {
1556915568 struct Struct_i32_i32 s = {1, 2};
1557015569 zig_struct_i32_i32(s);
......@@ -15573,13 +15572,11 @@ void run_c_tests(void) {
1557315572#endif
1557415573#endif
1557515574#endif
15576#endif
1557715575
1557815576#ifndef __hexagon__
1557915577#ifndef __loongarch__
1558015578#ifndef ZIG_MIPS64
1558115579#ifndef __powerpc__
15582#ifndef __s390x__
1558315580 {
1558415581 struct BigStruct s = {1, 2, 3, 4, 5};
1558515582 zig_big_struct(s);
......@@ -15588,7 +15585,6 @@ void run_c_tests(void) {
1558815585#endif
1558915586#endif
1559015587#endif
15591#endif
1559215588
1559315589#ifndef ZIG_NO_I128
1559415590 {
......@@ -15613,7 +15609,6 @@ void run_c_tests(void) {
1561315609#ifndef __loongarch__
1561415610#ifndef ZIG_MIPS64
1561515611#ifndef __powerpc__
15616#ifndef __s390x__
1561715612 {
1561815613 struct SplitStructInts s = {1234, 100, 1337};
1561915614 zig_split_struct_ints(s);
......@@ -15623,13 +15618,11 @@ void run_c_tests(void) {
1562315618#endif
1562415619#endif
1562515620#endif
15626#endif
1562715621
1562815622#ifndef __hexagon__
1562915623#ifndef __loongarch__
1563015624#ifndef ZIG_MIPS64
1563115625#ifndef __powerpc__
15632#ifndef __s390x__
1563315626 {
1563415627 struct MedStructMixed s = {1234, 100.0f, 1337.0f};
1563515628 zig_med_struct_mixed(s);
......@@ -15638,14 +15631,12 @@ void run_c_tests(void) {
1563815631#endif
1563915632#endif
1564015633#endif
15641#endif
1564215634
1564315635#ifndef __hexagon__
1564415636#ifndef __i386__
1564515637#ifndef __loongarch__
1564615638#ifndef ZIG_MIPS64
1564715639#ifndef __powerpc__
15648#ifndef __s390x__
1564915640 {
1565015641 struct SplitStructMixed s = {1234, 100, 1337.0f};
1565115642 zig_split_struct_mixed(s);
......@@ -15655,13 +15646,11 @@ void run_c_tests(void) {
1565515646#endif
1565615647#endif
1565715648#endif
15658#endif
1565915649
1566015650#ifndef __hexagon__
1566115651#ifndef __loongarch__
1566215652#ifndef ZIG_MIPS64
1566315653#ifndef __powerpc__
15664#ifndef __s390x__
1566515654 {
1566615655 struct BigStruct s = {30, 31, 32, 33, 34};
1566715656 struct BigStruct res = zig_big_struct_both(s);
......@@ -15674,7 +15663,6 @@ void run_c_tests(void) {
1567415663#endif
1567515664#endif
1567615665#endif
15677#endif
1567815666#endif
1567915667
1568015668 {
test/c_abi/main.zig+1-114
......@@ -13,7 +13,7 @@ const expectEqual = std.testing.expectEqual;
1313const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isArm() and
1414 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32() and builtin.cpu.arch != .riscv32 and
1515 builtin.cpu.arch != .hexagon and
16 builtin.cpu.arch != .s390x; // https://github.com/llvm/llvm-project/issues/168460
16 builtin.cpu.arch != .s390x;
1717
1818const have_f128 = builtin.cpu.arch.isWasm() or (builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin() and builtin.abi != .msvc);
1919const have_f80 = builtin.cpu.arch.isX86() and builtin.abi != .msvc;
......@@ -5136,7 +5136,6 @@ test "@Vector(24, u8)" {
51365136 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
51375137 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
51385138 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5139 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
51405139
51415140 const v = c_ret_vector_24_u8();
51425141 try expect(v[0] == 57);
......@@ -5220,7 +5219,6 @@ test "@Vector(32, u8)" {
52205219 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
52215220 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
52225221 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5223 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
52245222
52255223 const v = c_ret_vector_32_u8();
52265224 try expect(v[0] == 69);
......@@ -5330,7 +5328,6 @@ test "@Vector(48, u8)" {
53305328 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
53315329 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
53325330 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5333 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
53345331
53355332 const v = c_ret_vector_48_u8();
53365333 try expect(v[0] == 29);
......@@ -5473,7 +5470,6 @@ test "@Vector(64, u8)" {
54735470 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
54745471 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
54755472 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5476 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
54775473
54785474 const v = c_ret_vector_64_u8();
54795475 try expect(v[0] == 53);
......@@ -5668,7 +5664,6 @@ test "@Vector(96, u8)" {
56685664 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
56695665 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
56705666 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5671 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
56725667
56735668 const v = c_ret_vector_96_u8();
56745669 try expect(v[0] == 82);
......@@ -5931,7 +5926,6 @@ test "@Vector(128, u8)" {
59315926 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
59325927 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
59335928 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
5934 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
59355929
59365930 const v = c_ret_vector_128_u8();
59375931 try expect(v[0] == 30);
......@@ -6296,7 +6290,6 @@ test "@Vector(192, u8)" {
62966290 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
62976291 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
62986292 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
6299 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
63006293
63016294 const v = c_ret_vector_192_u8();
63026295 try expect(v[0] == 70);
......@@ -6797,7 +6790,6 @@ test "@Vector(256, u8)" {
67976790 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
67986791 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
67996792 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
6800 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
68016793
68026794 const v = c_ret_vector_256_u8();
68036795 try expect(v[0] == 66);
......@@ -7502,7 +7494,6 @@ test "@Vector(384, u8)" {
75027494 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
75037495 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
75047496 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
7505 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
75067497
75077498 const v = c_ret_vector_384_u8();
75087499 try expect(v[0] == 46);
......@@ -8479,7 +8470,6 @@ test "@Vector(512, u8)" {
84798470 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
84808471 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
84818472 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
8482 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
84838473
84848474 const v = c_ret_vector_512_u8();
84858475 try expect(v[0] == 38);
......@@ -9250,7 +9240,6 @@ test "@Vector(12, u16)" {
92509240 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
92519241 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
92529242 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9253 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
92549243
92559244 const v = c_ret_vector_12_u16();
92569245 try expect(v[0] == 121);
......@@ -9300,7 +9289,6 @@ test "@Vector(16, u16)" {
93009289 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
93019290 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
93029291 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9303 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
93049292
93059293 const v = c_ret_vector_16_u16();
93069294 try expect(v[0] == 177);
......@@ -9366,7 +9354,6 @@ test "@Vector(24, u16)" {
93669354 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
93679355 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
93689356 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9369 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
93709357
93719358 const v = c_ret_vector_24_u16();
93729359 try expect(v[0] == 257);
......@@ -9450,7 +9437,6 @@ test "@Vector(32, u16)" {
94509437 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
94519438 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
94529439 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9453 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
94549440
94559441 const v = c_ret_vector_32_u16();
94569442 try expect(v[0] == 369);
......@@ -9560,7 +9546,6 @@ test "@Vector(48, u16)" {
95609546 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
95619547 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
95629548 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9563 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
95649549
95659550 const v = c_ret_vector_48_u16();
95669551 try expect(v[0] == 529);
......@@ -9704,7 +9689,6 @@ test "@Vector(64, u16)" {
97049689 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
97059690 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
97069691 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9707 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
97089692
97099693 const v = c_ret_vector_64_u16();
97109694 try expect(v[0] == 753);
......@@ -9899,7 +9883,6 @@ test "@Vector(96, u16)" {
98999883 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
99009884 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
99019885 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
9902 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
99039886
99049887 const v = c_ret_vector_96_u16();
99059888 try expect(v[0] == 1082);
......@@ -10162,7 +10145,6 @@ test "@Vector(128, u16)" {
1016210145 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1016310146 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1016410147 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10165 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1016610148
1016710149 const v = c_ret_vector_128_u16();
1016810150 try expect(v[0] == 1530);
......@@ -10527,7 +10509,6 @@ test "@Vector(192, u16)" {
1052710509 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1052810510 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1052910511 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10530 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1053110512
1053210513 const v = c_ret_vector_192_u16();
1053310514 try expect(v[0] == 2170);
......@@ -11028,7 +11009,6 @@ test "@Vector(256, u16)" {
1102811009 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1102911010 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1103011011 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11031 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1103211012
1103311013 const v = c_ret_vector_256_u16();
1103411014 try expect(v[0] == 3066);
......@@ -11445,7 +11425,6 @@ test "@Vector(6, u32)" {
1144511425 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1144611426 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1144711427 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11448 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1144911428
1145011429 const v = c_ret_vector_6_u32();
1145111430 try expect(v[0] == 53);
......@@ -11481,7 +11460,6 @@ test "@Vector(8, u32)" {
1148111460 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
1148211461 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1148311462 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11484 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1148511463
1148611464 const v = c_ret_vector_8_u32();
1148711465 try expect(v[0] == 81);
......@@ -11524,7 +11502,6 @@ test "@Vector(12, u32)" {
1152411502 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1152511503 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1152611504 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11527 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1152811505
1152911506 const v = c_ret_vector_12_u32();
1153011507 try expect(v[0] == 121);
......@@ -11574,7 +11551,6 @@ test "@Vector(16, u32)" {
1157411551 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
1157511552 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1157611553 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11577 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1157811554
1157911555 const v = c_ret_vector_16_u32();
1158011556 try expect(v[0] == 177);
......@@ -11640,7 +11616,6 @@ test "@Vector(24, u32)" {
1164011616 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1164111617 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1164211618 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11643 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1164411619
1164511620 const v = c_ret_vector_24_u32();
1164611621 try expect(v[0] == 257);
......@@ -11725,7 +11700,6 @@ test "@Vector(32, u32)" {
1172511700 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1172611701 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1172711702 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11728 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1172911703
1173011704 const v = c_ret_vector_32_u32();
1173111705 try expect(v[0] == 369);
......@@ -11835,7 +11809,6 @@ test "@Vector(48, u32)" {
1183511809 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1183611810 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1183711811 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11838 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1183911812
1184011813 const v = c_ret_vector_48_u32();
1184111814 try expect(v[0] == 529);
......@@ -11979,7 +11952,6 @@ test "@Vector(64, u32)" {
1197911952 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1198011953 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1198111954 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
11982 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1198311955
1198411956 const v = c_ret_vector_64_u32();
1198511957 try expect(v[0] == 753);
......@@ -12174,7 +12146,6 @@ test "@Vector(96, u32)" {
1217412146 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1217512147 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1217612148 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12177 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1217812149
1217912150 const v = c_ret_vector_96_u32();
1218012151 try expect(v[0] == 1082);
......@@ -12437,7 +12408,6 @@ test "@Vector(128, u32)" {
1243712408 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1243812409 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1243912410 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12440 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1244112411
1244212412 const v = c_ret_vector_128_u32();
1244312413 try expect(v[0] == 1530);
......@@ -12644,7 +12614,6 @@ test "@Vector(3, u64)" {
1264412614 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1264512615 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1264612616 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12647 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1264812617
1264912618 const v = c_ret_vector_3_u64();
1265012619 try expect(v[0] == 19);
......@@ -12673,7 +12642,6 @@ test "@Vector(4, u64)" {
1267312642 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
1267412643 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1267512644 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12676 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1267712645
1267812646 const v = c_ret_vector_4_u64();
1267912647 try expect(v[0] == 33);
......@@ -12740,7 +12708,6 @@ test "@Vector(8, u64)" {
1274012708 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
1274112709 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1274212710 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12743 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1274412711
1274512712 const v = c_ret_vector_8_u64();
1274612713 try expect(v[0] == 81);
......@@ -12832,7 +12799,6 @@ test "@Vector(16, u64)" {
1283212799 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1283312800 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1283412801 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12835 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1283612802
1283712803 const v = c_ret_vector_16_u64();
1283812804 try expect(v[0] == 177);
......@@ -12981,7 +12947,6 @@ test "@Vector(32, u64)" {
1298112947 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1298212948 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1298312949 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
12984 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1298512950
1298612951 const v = c_ret_vector_32_u64();
1298712952 try expect(v[0] == 369);
......@@ -13233,7 +13198,6 @@ test "@Vector(64, u64)" {
1323313198 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1323413199 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1323513200 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13236 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1323713201
1323813202 const v = c_ret_vector_64_u64();
1323913203 try expect(v[0] == 753);
......@@ -13449,7 +13413,6 @@ test "@Vector(6, f32)" {
1344913413 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1345013414 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1345113415 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13452 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1345313416
1345413417 const v = c_ret_vector_6_f32();
1345513418 try expect(v[0] == 53);
......@@ -13486,7 +13449,6 @@ test "@Vector(8, f32)" {
1348613449 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1348713450 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1348813451 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13489 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1349013452
1349113453 const v = c_ret_vector_8_f32();
1349213454 try expect(v[0] == 81);
......@@ -13529,7 +13491,6 @@ test "@Vector(12, f32)" {
1352913491 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1353013492 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1353113493 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13532 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1353313494
1353413495 const v = c_ret_vector_12_f32();
1353513496 try expect(v[0] == 121);
......@@ -13580,7 +13541,6 @@ test "@Vector(16, f32)" {
1358013541 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1358113542 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1358213543 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13583 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1358413544
1358513545 const v = c_ret_vector_16_f32();
1358613546 try expect(v[0] == 177);
......@@ -13646,7 +13606,6 @@ test "@Vector(24, f32)" {
1364613606 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1364713607 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1364813608 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13649 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1365013609
1365113610 const v = c_ret_vector_24_f32();
1365213611 try expect(v[0] == 257);
......@@ -13731,7 +13690,6 @@ test "@Vector(32, f32)" {
1373113690 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1373213691 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1373313692 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13734 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1373513693
1373613694 const v = c_ret_vector_32_f32();
1373713695 try expect(v[0] == 369);
......@@ -13841,7 +13799,6 @@ test "@Vector(48, f32)" {
1384113799 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1384213800 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1384313801 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13844 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1384513802
1384613803 const v = c_ret_vector_48_f32();
1384713804 try expect(v[0] == 529);
......@@ -13985,7 +13942,6 @@ test "@Vector(64, f32)" {
1398513942 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1398613943 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1398713944 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
13988 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1398913945
1399013946 const v = c_ret_vector_64_f32();
1399113947 try expect(v[0] == 753);
......@@ -14180,7 +14136,6 @@ test "@Vector(96, f32)" {
1418014136 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1418114137 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1418214138 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14183 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1418414139
1418514140 const v = c_ret_vector_96_f32();
1418614141 try expect(v[0] == 1082);
......@@ -14443,7 +14398,6 @@ test "@Vector(128, f32)" {
1444314398 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1444414399 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1444514400 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14446 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1444714401
1444814402 const v = c_ret_vector_128_f32();
1444914403 try expect(v[0] == 1530);
......@@ -14651,7 +14605,6 @@ test "@Vector(3, f64)" {
1465114605 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1465214606 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1465314607 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14654 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1465514608
1465614609 const v = c_ret_vector_3_f64();
1465714610 try expect(v[0] == 19);
......@@ -14680,7 +14633,6 @@ test "@Vector(4, f64)" {
1468014633 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1468114634 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1468214635 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14683 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1468414636 if (builtin.cpu.arch.isArm()) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/35899
1468514637
1468614638 const v = c_ret_vector_4_f64();
......@@ -14714,7 +14666,6 @@ test "@Vector(6, f64)" {
1471414666 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1471514667 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1471614668 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14717 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1471814669
1471914670 const v = c_ret_vector_6_f64();
1472014671 try expect(v[0] == 53);
......@@ -14750,7 +14701,6 @@ test "@Vector(8, f64)" {
1475014701 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1475114702 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1475214703 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14753 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1475414704 if (builtin.cpu.arch.isArm()) return error.SkipZigTest; // https://codeberg.org/ziglang/zig/issues/35899
1475514705
1475614706 const v = c_ret_vector_8_f64();
......@@ -14794,7 +14744,6 @@ test "@Vector(12, f64)" {
1479414744 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1479514745 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1479614746 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14797 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1479814747
1479914748 const v = c_ret_vector_12_f64();
1480014749 try expect(v[0] == 121);
......@@ -14845,7 +14794,6 @@ test "@Vector(16, f64)" {
1484514794 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1484614795 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1484714796 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14848 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1484914797
1485014798 const v = c_ret_vector_16_f64();
1485114799 try expect(v[0] == 177);
......@@ -14911,7 +14859,6 @@ test "@Vector(24, f64)" {
1491114859 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1491214860 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1491314861 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14914 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1491514862
1491614863 const v = c_ret_vector_24_f64();
1491714864 try expect(v[0] == 257);
......@@ -14996,7 +14943,6 @@ test "@Vector(32, f64)" {
1499614943 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1499714944 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1499814945 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
14999 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1500014946
1500114947 const v = c_ret_vector_32_f64();
1500214948 try expect(v[0] == 369);
......@@ -15106,7 +15052,6 @@ test "@Vector(48, f64)" {
1510615052 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1510715053 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1510815054 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
15109 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1511015055
1511115056 const v = c_ret_vector_48_f64();
1511215057 try expect(v[0] == 529);
......@@ -15250,7 +15195,6 @@ test "@Vector(64, f64)" {
1525015195 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1525115196 if (builtin.cpu.arch.isMIPS32()) return error.SkipZigTest;
1525215197 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
15253 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1525415198
1525515199 const v = c_ret_vector_64_f64();
1525615200 try expect(v[0] == 753);
......@@ -15345,7 +15289,6 @@ extern fn c_test_struct_u8() void;
1534515289test "struct u8" {
1534615290 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1534715291 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15348 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1534915292 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1535015293
1535115294 const s = c_ret_struct_u8();
......@@ -15377,7 +15320,6 @@ test "struct u8, u8" {
1537715320 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1537815321 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1537915322 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15380 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1538115323 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1538215324
1538315325 const s = c_ret_struct_u8_u8();
......@@ -15412,7 +15354,6 @@ test "struct u8, u8, u8" {
1541215354 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1541315355 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1541415356 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15415 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1541615357 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1541715358
1541815359 const s = c_ret_struct_u8_u8_u8();
......@@ -15450,7 +15391,6 @@ test "struct u8, u8, u8, u8" {
1545015391 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1545115392 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1545215393 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15453 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1545415394 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1545515395
1545615396 const s = c_ret_struct_u8_u8_u8_u8();
......@@ -15481,7 +15421,6 @@ extern fn c_test_struct_u16() void;
1548115421test "struct u16" {
1548215422 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1548315423 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15484 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1548515424 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1548615425
1548715426 const s = c_ret_struct_u16();
......@@ -15513,7 +15452,6 @@ test "struct u16, u16" {
1551315452 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1551415453 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1551515454 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15516 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1551715455 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1551815456
1551915457 const s = c_ret_struct_u16_u16();
......@@ -15549,7 +15487,6 @@ test "struct u16, u16, u16" {
1554915487 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1555015488 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1555115489 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15552 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1555315490 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1555415491
1555515492 const s = c_ret_struct_u16_u16_u16();
......@@ -15588,7 +15525,6 @@ test "struct u16, u16, u16, u16" {
1558815525 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1558915526 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1559015527 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15591 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1559215528 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1559315529
1559415530 const s = c_ret_struct_u16_u16_u16_u16();
......@@ -15619,7 +15555,6 @@ extern fn c_test_struct_u32() void;
1561915555test "struct u32" {
1562015556 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1562115557 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15622 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1562315558 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1562415559
1562515560 const s = c_ret_struct_u32();
......@@ -15651,7 +15586,6 @@ test "struct u32, u32" {
1565115586 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1565215587 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1565315588 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15654 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1565515589 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1565615590
1565715591 const s = c_ret_struct_u32_u32();
......@@ -15686,7 +15620,6 @@ test "struct u32, u32, u32" {
1568615620 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1568715621 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1568815622 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15689 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1569015623
1569115624 const s = c_ret_struct_u32_u32_u32();
1569215625 try expect(s.a == 8);
......@@ -15723,7 +15656,6 @@ test "struct u32, u32, u32, u32" {
1572315656 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1572415657 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1572515658 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15726 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1572715659
1572815660 const s = c_ret_struct_u32_u32_u32_u32();
1572915661 try expect(s.a == 10);
......@@ -15753,7 +15685,6 @@ extern fn c_test_struct_u64() void;
1575315685test "struct u64" {
1575415686 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1575515687 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15756 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1575715688 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1575815689
1575915690 const s = c_ret_struct_u64();
......@@ -15831,7 +15762,6 @@ extern fn c_test_struct_u64_u64() void;
1583115762test "struct u64, u64" {
1583215763 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1583315764 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15834 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1583515765
1583615766 const s = c_ret_struct_u64_u64();
1583715767 try expect(s.a == 21);
......@@ -15872,7 +15802,6 @@ test "struct u64, u64, u64" {
1587215802 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1587315803 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1587415804 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15875 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1587615805
1587715806 const s = c_ret_struct_u64_u64_u64();
1587815807 try expect(s.a == 8);
......@@ -15908,7 +15837,6 @@ test "struct u64, u64, u64, u64" {
1590815837 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1590915838 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1591015839 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
15911 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1591215840
1591315841 const s = c_ret_struct_u64_u64_u64_u64();
1591415842 try expect(s.a == 10);
......@@ -15938,7 +15866,6 @@ extern fn c_test_struct_f32() void;
1593815866test "struct f32" {
1593915867 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1594015868 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
15941 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1594215869 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1594315870
1594415871 const s = c_ret_struct_f32();
......@@ -15971,7 +15898,6 @@ test "struct f32, f32" {
1597115898 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1597215899 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1597315900 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
15974 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1597515901 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1597615902
1597715903 const s = c_ret_struct_f32_f32();
......@@ -16007,7 +15933,6 @@ test "struct f32, f32, f32" {
1600715933 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1600815934 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1600915935 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16010 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1601115936
1601215937 const s = c_ret_struct_f32_f32_f32();
1601315938 try expect(s.a == 8);
......@@ -16045,7 +15970,6 @@ test "struct f32, f32, f32, f32" {
1604515970 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1604615971 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1604715972 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16048 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1604915973
1605015974 const s = c_ret_struct_f32_f32_f32_f32();
1605115975 try expect(s.a == 10);
......@@ -16085,7 +16009,6 @@ test "struct f32, f32, f32, f32, f32" {
1608516009 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1608616010 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1608716011 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16088 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1608916012
1609016013 const s = c_ret_struct_f32_f32_f32_f32_f32();
1609116014 try expect(s.a == 12);
......@@ -16120,7 +16043,6 @@ test "struct f32 align(8)" {
1612016043 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1612116044 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1612216045 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
16123 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1612416046 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1612516047
1612616048 const s = c_ret_struct_f32a8();
......@@ -16154,7 +16076,6 @@ test "struct f32 align(8), f32 align(8)" {
1615416076 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1615516077 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1615616078 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
16157 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1615816079 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1615916080
1616016081 const s = c_ret_struct_f32a8_f32a8();
......@@ -16188,7 +16109,6 @@ test "struct {f32, f32}, f32" {
1618816109 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1618916110 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1619016111 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16191 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1619216112
1619316113 const s = c_ret_struct_f32f32_f32();
1619416114 try expect(s.a.b == 1.0);
......@@ -16222,7 +16142,6 @@ test "struct f32, {f32, f32}" {
1622216142 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1622316143 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1622416144 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16225 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1622616145
1622716146 const s = c_ret_struct_f32_f32f32();
1622816147 try expect(s.a == 1.0);
......@@ -16252,7 +16171,6 @@ test "struct f64" {
1625216171 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
1625316172 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1625416173 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
16255 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1625616174 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1625716175
1625816176 const s = c_ret_struct_f64();
......@@ -16283,7 +16201,6 @@ test "struct f64, f64" {
1628316201 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;
1628416202 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1628516203 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16286 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1628716204
1628816205 const s = c_ret_struct_f64_f64();
1628916206 try expect(s.a == 6);
......@@ -16316,7 +16233,6 @@ test "struct f64, f64, f64" {
1631616233 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1631716234 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1631816235 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16319 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1632016236
1632116237 const s = c_ret_struct_f64_f64_f64();
1632216238 try expect(s.a == 8);
......@@ -16352,7 +16268,6 @@ test "struct f64, f64, f64, f64" {
1635216268 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1635316269 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1635416270 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16355 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1635616271
1635716272 const s = c_ret_struct_f64_f64_f64_f64();
1635816273 try expect(s.a == 10);
......@@ -16391,7 +16306,6 @@ test "struct f64, f64, f64, f64, f64" {
1639116306 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
1639216307 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1639316308 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
16394 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1639516309
1639616310 const s = c_ret_struct_f64_f64_f64_f64_f64();
1639716311 try expect(s.a == 12);
......@@ -16431,7 +16345,6 @@ test "struct{u32,union{u32,struct{u32,u32}}}" {
1643116345 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
1643216346 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1643316347 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
16434 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1643516348
1643616349 const s = c_ret_struct_u32_union_u32_u32u32();
1643716350 try expect(s.a == 1);
......@@ -16453,7 +16366,6 @@ test "struct i32 i32" {
1645316366 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1645416367 if (builtin.cpu.arch.isRiscv32()) return error.SkipZigTest;
1645516368 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16456 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1645716369 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1645816370
1645916371 const s: Struct_i32_i32 = .{
......@@ -16487,7 +16399,6 @@ test "big struct" {
1648716399 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1648816400 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1648916401 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16490 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1649116402
1649216403 const s = BigStruct{
1649316404 .a = 1,
......@@ -16516,7 +16427,6 @@ test "big union" {
1651616427 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1651716428 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1651816429 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16519 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1652016430
1652116431 const x = BigUnion{
1652216432 .a = BigStruct{
......@@ -16552,7 +16462,6 @@ test "medium struct of ints and floats" {
1655216462 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1655316463 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1655416464 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16555 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1655616465
1655716466 const s = MedStructMixed{
1655816467 .a = 1234,
......@@ -16633,7 +16542,6 @@ test "split struct of ints" {
1663316542 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1663416543 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1663516544 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16636 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1663716545
1663816546 const s = SplitStructInt{
1663916547 .a = 1234,
......@@ -16663,7 +16571,6 @@ test "split struct of ints and floats" {
1666316571 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1666416572 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1666516573 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16666 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1666716574
1666816575 const s = SplitStructMixed{
1666916576 .a = 1234,
......@@ -16690,7 +16597,6 @@ test "sret and byval together" {
1669016597 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1669116598 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1669216599 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16693 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1669416600
1669516601 const s = BigStruct{
1669616602 .a = 1,
......@@ -16805,7 +16711,6 @@ test "Struct with array as padding." {
1680516711 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1680616712 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1680716713 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16808 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1680916714
1681016715 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
1681116716
......@@ -16833,7 +16738,6 @@ test "Float array like struct" {
1683316738 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1683416739 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1683516740 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16836 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1683716741
1683816742 c_float_array_struct(.{
1683916743 .origin = .{
......@@ -16869,7 +16773,6 @@ test "DC: Zig passes to C" {
1686916773 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1687016774 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1687116775 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16872 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1687316776 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));
1687416777}
1687516778test "DC: Zig returns to C" {
......@@ -16877,7 +16780,6 @@ test "DC: Zig returns to C" {
1687716780 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
1687816781 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1687916782 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16880 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1688116783 try expectOk(c_assert_ret_DC());
1688216784}
1688316785test "DC: C passes to Zig" {
......@@ -16886,7 +16788,6 @@ test "DC: C passes to Zig" {
1688616788 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1688716789 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1688816790 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16889 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1689016791 try expectOk(c_send_DC());
1689116792}
1689216793test "DC: C returns to Zig" {
......@@ -16894,7 +16795,6 @@ test "DC: C returns to Zig" {
1689416795 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
1689516796 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1689616797 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16897 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1689816798 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());
1689916799}
1690016800
......@@ -16922,14 +16822,12 @@ test "CFF: Zig passes to C" {
1692216822 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1692316823 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1692416824 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16925 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1692616825 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));
1692716826}
1692816827test "CFF: Zig returns to C" {
1692916828 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1693016829 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1693116830 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16932 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1693316831 try expectOk(c_assert_ret_CFF());
1693416832}
1693516833test "CFF: C passes to Zig" {
......@@ -16939,7 +16837,6 @@ test "CFF: C passes to Zig" {
1693916837 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1694016838 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1694116839 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16942 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1694316840
1694416841 try expectOk(c_send_CFF());
1694516842}
......@@ -16948,7 +16845,6 @@ test "CFF: C returns to Zig" {
1694816845 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1694916846 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1695016847 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16951 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1695216848 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());
1695316849}
1695416850pub extern fn c_assert_CFF(lv: CFF) c_int;
......@@ -16975,7 +16871,6 @@ test "PD: Zig passes to C" {
1697516871 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1697616872 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1697716873 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16978 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1697916874 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1698016875 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));
1698116876}
......@@ -16983,7 +16878,6 @@ test "PD: Zig returns to C" {
1698316878 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1698416879 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1698516880 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
16986 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1698716881 try expectOk(c_assert_ret_PD());
1698816882}
1698916883test "PD: C passes to Zig" {
......@@ -16991,7 +16885,6 @@ test "PD: C passes to Zig" {
1699116885 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1699216886 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1699316887 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
16994 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1699516888 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1699616889 try expectOk(c_send_PD());
1699716890}
......@@ -16999,7 +16892,6 @@ test "PD: C returns to Zig" {
1699916892 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1700016893 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1700116894 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
17002 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1700316895 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());
1700416896}
1700516897pub extern fn c_assert_PD(lv: PD) c_int;
......@@ -17033,7 +16925,6 @@ extern fn c_modify_by_ref_param(ByRef) ByRef;
1703316925test "C function modifies by ref param" {
1703416926 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1703516927 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
17036 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1703716928
1703816929 const res = c_modify_by_ref_param(.{ .val = 1, .arr = undefined });
1703916930 try expect(res.val == 42);
......@@ -17058,7 +16949,6 @@ test "C function that takes byval struct called via function pointer" {
1705816949 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1705916950 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1706016951 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
17061 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1706216952
1706316953 var fn_ptr = &c_func_ptr_byval;
1706416954 _ = &fn_ptr;
......@@ -17211,7 +17101,6 @@ test "Stdcall ABI structs" {
1721117101 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
1721217102 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1721317103 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
17214 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1721517104 if (builtin.cpu.arch == .x86 and builtin.os.tag == .windows) return error.SkipZigTest;
1721617105
1721717106 const res = stdcall_coord2(
......@@ -17228,7 +17117,6 @@ test "Stdcall ABI big union" {
1722817117 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1722917118 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1723017119 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
17231 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1723217120
1723317121 const x = BigUnion{
1723417122 .a = BigStruct{
......@@ -17304,7 +17192,6 @@ test "byval tail callsite attribute" {
1730417192 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
1730517193 if (builtin.cpu.arch.isLoongArch()) return error.SkipZigTest;
1730617194 if (builtin.cpu.arch == .hexagon) return error.SkipZigTest;
17307 if (builtin.cpu.arch == .s390x) return error.SkipZigTest;
1730817195
1730917196 // Originally reported at https://github.com/ziglang/zig/issues/16290
1731017197 // the bug was that the extern function had the byval attribute, but