Commit 179a6e61e8be2e5736e9cab9661f04269907247c | zig

lib/compiler/aro/aro/target.zig+2-36

...	...	@@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type {
17	17	.riscv64,
18	18	.powerpc64,
19	19	.powerpc64le,
20		.tce,
21		.tcele,
22	20	.ve,
23	21	=> return .{ .specifier = .long },
24	22
...	...	@@ -54,8 +52,6 @@ pub fn intPtrType(target: std.Target) Type {
54	52	.riscv32,
55	53	.xcore,
56	54	.hexagon,
57		.tce,
58		.tcele,
59	55	.m68k,
60	56	.spir,
61	57	.spirv32,
...	...	@@ -153,7 +149,7 @@ pub fn isTlsSupported(target: std.Target) bool {
153	149	return supported;
154	150	}
155	151	return switch (target.cpu.arch) {
156		.tce, .tcele, .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,
	152	.bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,
157	153	else => true,
158	154	};
159	155	}
...	...	@@ -470,25 +466,18 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
470	466	.mipsel,
471	467	.powerpc,
472	468	.powerpcle,
473		.r600,
474	469	.riscv32,
475	470	.sparc,
476	471	.sparcel,
477		.tce,
478		.tcele,
479	472	.thumb,
480	473	.thumbeb,
481	474	.x86,
482	475	.xcore,
483	476	.nvptx,
484		.amdil,
485		.hsail,
486	477	.spir,
487	478	.kalimba,
488		.shave,
489	479	.lanai,
490	480	.wasm32,
491		.renderscript32,
492	481	.aarch64_32,
493	482	.spirv32,
494	483	.loongarch32,
...	...	@@ -498,13 +487,10 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
498	487
499	488	.aarch64 => copy.cpu.arch = .arm,
500	489	.aarch64_be => copy.cpu.arch = .armeb,
501		.amdil64 => copy.cpu.arch = .amdil,
502	490	.nvptx64 => copy.cpu.arch = .nvptx,
503	491	.wasm64 => copy.cpu.arch = .wasm32,
504		.hsail64 => copy.cpu.arch = .hsail,
505	492	.spir64 => copy.cpu.arch = .spir,
506	493	.spirv64 => copy.cpu.arch = .spirv32,
507		.renderscript64 => copy.cpu.arch = .renderscript32,
508	494	.loongarch64 => copy.cpu.arch = .loongarch32,
509	495	.mips64 => copy.cpu.arch = .mips,
510	496	.mips64el => copy.cpu.arch = .mipsel,
...	...	@@ -529,12 +515,8 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
529	515	.lanai,
530	516	.m68k,
531	517	.msp430,
532		.r600,
533		.shave,
534	518	.sparcel,
535	519	.spu_2,
536		.tce,
537		.tcele,
538	520	.xcore,
539	521	.xtensa,
540	522	=> return null,
...	...	@@ -544,13 +526,10 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
544	526	.amdgcn,
545	527	.bpfeb,
546	528	.bpfel,
547		.amdil64,
548	529	.nvptx64,
549	530	.wasm64,
550		.hsail64,
551	531	.spir64,
552	532	.spirv64,
553		.renderscript64,
554	533	.loongarch64,
555	534	.mips64,
556	535	.mips64el,
...	...	@@ -564,17 +543,14 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
564	543	=> {}, // Already 64 bit
565	544
566	545	.aarch64_32 => copy.cpu.arch = .aarch64,
567		.amdil => copy.cpu.arch = .amdil64,
568	546	.arm => copy.cpu.arch = .aarch64,
569	547	.armeb => copy.cpu.arch = .aarch64_be,
570		.hsail => copy.cpu.arch = .hsail64,
571	548	.loongarch32 => copy.cpu.arch = .loongarch64,
572	549	.mips => copy.cpu.arch = .mips64,
573	550	.mipsel => copy.cpu.arch = .mips64el,
574	551	.nvptx => copy.cpu.arch = .nvptx64,
575	552	.powerpc => copy.cpu.arch = .powerpc64,
576	553	.powerpcle => copy.cpu.arch = .powerpc64le,
577		.renderscript32 => copy.cpu.arch = .renderscript64,
578	554	.riscv32 => copy.cpu.arch = .riscv64,
579	555	.sparc => copy.cpu.arch = .sparc64,
580	556	.spir => copy.cpu.arch = .spir64,
...	...	@@ -620,7 +596,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
620	596	.powerpcle => "powerpcle",
621	597	.powerpc64 => "powerpc64",
622	598	.powerpc64le => "powerpc64le",
623		.r600 => "r600",
624	599	.amdgcn => "amdgcn",
625	600	.riscv32 => "riscv32",
626	601	.riscv64 => "riscv64",
...	...	@@ -628,8 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
628	603	.sparc64 => "sparc64",
629	604	.sparcel => "sparcel",
630	605	.s390x => "s390x",
631		.tce => "tce",
632		.tcele => "tcele",
633	606	.thumb => "thumb",
634	607	.thumbeb => "thumbeb",
635	608	.x86 => "i386",
...	...	@@ -638,21 +611,14 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
638	611	.xtensa => "xtensa",
639	612	.nvptx => "nvptx",
640	613	.nvptx64 => "nvptx64",
641		.amdil => "amdil",
642		.amdil64 => "amdil64",
643		.hsail => "hsail",
644		.hsail64 => "hsail64",
645	614	.spir => "spir",
646	615	.spir64 => "spir64",
647	616	.spirv32 => "spirv32",
648	617	.spirv64 => "spirv64",
649	618	.kalimba => "kalimba",
650		.shave => "shave",
651	619	.lanai => "lanai",
652	620	.wasm32 => "wasm32",
653	621	.wasm64 => "wasm64",
654		.renderscript32 => "renderscript32",
655		.renderscript64 => "renderscript64",
656	622	.ve => "ve",
657	623	// Note: spu_2 is not supported in LLVM; this is the Zig arch name
658	624	.spu_2 => "spu_2",
...	...	@@ -668,7 +634,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
668	634	.freebsd => "freebsd",
669	635	.fuchsia => "fuchsia",
670	636	.linux => "linux",
671		.lv2 => "lv2",
	637	.ps3 => "lv2",
672	638	.netbsd => "netbsd",
673	639	.openbsd => "openbsd",
674	640	.solaris => "solaris",

lib/std/Target.zig+28-99

...	...	@@ -24,7 +24,7 @@ pub const Os = struct {
24	24	fuchsia,
25	25	ios,
26	26	linux,
27		lv2,
	27	ps3,
28	28	macos,
29	29	netbsd,
30	30	openbsd,
...	...	@@ -63,6 +63,11 @@ pub const Os = struct {
63	63	illumos,
64	64	other,
65	65
	66	// LLVM tags deliberately omitted:
	67	// - kfreebsd
	68	// - darwin
	69	// - nacl
	70
66	71	pub inline fn isDarwin(tag: Tag) bool {
67	72	return switch (tag) {
68	73	.ios, .macos, .watchos, .tvos, .visionos => true,
...	...	@@ -138,7 +143,7 @@ pub const Os = struct {
138	143	.ananas,
139	144	.cloudabi,
140	145	.fuchsia,
141		.lv2,
	146	.ps3,
142	147	.zos,
143	148	.haiku,
144	149	.minix,
...	...	@@ -370,7 +375,7 @@ pub const Os = struct {
370	375	.ananas,
371	376	.cloudabi,
372	377	.fuchsia,
373		.lv2,
	378	.ps3,
374	379	.zos,
375	380	.haiku,
376	381	.minix,
...	...	@@ -557,7 +562,7 @@ pub const Os = struct {
557	562	.ananas,
558	563	.cloudabi,
559	564	.fuchsia,
560		.lv2,
	565	.ps3,
561	566	.zos,
562	567	.minix,
563	568	.rtems,
...	...	@@ -653,13 +658,17 @@ pub const Abi = enum {
653	658	amplification,
654	659	ohos,
655	660
	661	// LLVM tags deliberately omitted:
	662	// - gnuf64
	663	// - coreclr
	664
656	665	pub fn default(arch: Cpu.Arch, os: Os) Abi {
657	666	return if (arch.isWasm()) .musl else switch (os.tag) {
658	667	.freestanding,
659	668	.ananas,
660	669	.cloudabi,
661	670	.dragonfly,
662		.lv2,
	671	.ps3,
663	672	.zos,
664	673	.minix,
665	674	.rtems,
...	...	@@ -994,7 +1003,6 @@ pub const Cpu = struct {
994	1003	powerpcle,
995	1004	powerpc64,
996	1005	powerpc64le,
997		r600,
998	1006	amdgcn,
999	1007	riscv32,
1000	1008	riscv64,
...	...	@@ -1002,8 +1010,6 @@ pub const Cpu = struct {
1002	1010	sparc64,
1003	1011	sparcel,
1004	1012	s390x,
1005		tce,
1006		tcele,
1007	1013	thumb,
1008	1014	thumbeb,
1009	1015	x86,
...	...	@@ -1012,25 +1018,30 @@ pub const Cpu = struct {
1012	1018	xtensa,
1013	1019	nvptx,
1014	1020	nvptx64,
1015		amdil,
1016		amdil64,
1017		hsail,
1018		hsail64,
1019	1021	spir,
1020	1022	spir64,
1021	1023	spirv,
1022	1024	spirv32,
1023	1025	spirv64,
1024	1026	kalimba,
1025		shave,
1026	1027	lanai,
1027	1028	wasm32,
1028	1029	wasm64,
1029		renderscript32,
1030		renderscript64,
1031	1030	ve,
1032	1031	spu_2,
1033	1032
	1033	// LLVM tags deliberately omitted:
	1034	// - r600
	1035	// - le32
	1036	// - le64
	1037	// - amdil
	1038	// - amdil64
	1039	// - hsail
	1040	// - hsail64
	1041	// - shave
	1042	// - renderscript32
	1043	// - renderscript64
	1044
1034	1045	pub inline fn isX86(arch: Arch) bool {
1035	1046	return switch (arch) {
1036	1047	.x86, .x86_64 => true,
...	...	@@ -1148,26 +1159,19 @@ pub const Cpu = struct {
1148	1159	.mips => .MIPS,
1149	1160	.mipsel => .MIPS_RS3_LE,
1150	1161	.powerpc, .powerpcle => .PPC,
1151		.r600 => .NONE,
1152	1162	.riscv32 => .RISCV,
1153	1163	.sparc => .SPARC,
1154	1164	.sparcel => .SPARC,
1155		.tce => .NONE,
1156		.tcele => .NONE,
1157	1165	.thumb => .ARM,
1158	1166	.thumbeb => .ARM,
1159	1167	.x86 => .@"386",
1160	1168	.xcore => .XCORE,
1161	1169	.xtensa => .XTENSA,
1162	1170	.nvptx => .NONE,
1163		.amdil => .NONE,
1164		.hsail => .NONE,
1165	1171	.spir => .NONE,
1166	1172	.kalimba => .CSR_KALIMBA,
1167		.shave => .NONE,
1168	1173	.lanai => .LANAI,
1169	1174	.wasm32 => .NONE,
1170		.renderscript32 => .NONE,
1171	1175	.aarch64_32 => .AARCH64,
1172	1176	.aarch64 => .AARCH64,
1173	1177	.aarch64_be => .AARCH64,
...	...	@@ -1178,11 +1182,8 @@ pub const Cpu = struct {
1178	1182	.riscv64 => .RISCV,
1179	1183	.x86_64 => .X86_64,
1180	1184	.nvptx64 => .NONE,
1181		.amdil64 => .NONE,
1182		.hsail64 => .NONE,
1183	1185	.spir64 => .NONE,
1184	1186	.wasm64 => .NONE,
1185		.renderscript64 => .NONE,
1186	1187	.amdgcn => .AMDGPU,
1187	1188	.bpfel => .BPF,
1188	1189	.bpfeb => .BPF,
...	...	@@ -1212,26 +1213,19 @@ pub const Cpu = struct {
1212	1213	.mips => .Unknown,
1213	1214	.mipsel => .Unknown,
1214	1215	.powerpc, .powerpcle => .POWERPC,
1215		.r600 => .Unknown,
1216	1216	.riscv32 => .RISCV32,
1217	1217	.sparc => .Unknown,
1218	1218	.sparcel => .Unknown,
1219		.tce => .Unknown,
1220		.tcele => .Unknown,
1221	1219	.thumb => .Thumb,
1222	1220	.thumbeb => .Thumb,
1223	1221	.x86 => .I386,
1224	1222	.xcore => .Unknown,
1225	1223	.xtensa => .Unknown,
1226	1224	.nvptx => .Unknown,
1227		.amdil => .Unknown,
1228		.hsail => .Unknown,
1229	1225	.spir => .Unknown,
1230	1226	.kalimba => .Unknown,
1231		.shave => .Unknown,
1232	1227	.lanai => .Unknown,
1233	1228	.wasm32 => .Unknown,
1234		.renderscript32 => .Unknown,
1235	1229	.aarch64_32 => .ARM64,
1236	1230	.aarch64 => .ARM64,
1237	1231	.aarch64_be => .ARM64,
...	...	@@ -1242,11 +1236,8 @@ pub const Cpu = struct {
1242	1236	.riscv64 => .RISCV64,
1243	1237	.x86_64 => .X64,
1244	1238	.nvptx64 => .Unknown,
1245		.amdil64 => .Unknown,
1246		.hsail64 => .Unknown,
1247	1239	.spir64 => .Unknown,
1248	1240	.wasm64 => .Unknown,
1249		.renderscript64 => .Unknown,
1250	1241	.amdgcn => .Unknown,
1251	1242	.bpfel => .Unknown,
1252	1243	.bpfeb => .Unknown,
...	...	@@ -1270,14 +1261,10 @@ pub const Cpu = struct {
1270	1261	.aarch64_32,
1271	1262	.aarch64,
1272	1263	.amdgcn,
1273		.amdil,
1274		.amdil64,
1275	1264	.bpfel,
1276	1265	.csky,
1277	1266	.xtensa,
1278	1267	.hexagon,
1279		.hsail,
1280		.hsail64,
1281	1268	.kalimba,
1282	1269	.mipsel,
1283	1270	.mips64el,
...	...	@@ -1285,10 +1272,8 @@ pub const Cpu = struct {
1285	1272	.nvptx,
1286	1273	.nvptx64,
1287	1274	.sparcel,
1288		.tcele,
1289	1275	.powerpcle,
1290	1276	.powerpc64le,
1291		.r600,
1292	1277	.riscv32,
1293	1278	.riscv64,
1294	1279	.x86,
...	...	@@ -1299,9 +1284,6 @@ pub const Cpu = struct {
1299	1284	.thumb,
1300	1285	.spir,
1301	1286	.spir64,
1302		.renderscript32,
1303		.renderscript64,
1304		.shave,
1305	1287	.ve,
1306	1288	.spu_2,
1307	1289	// GPU bitness is opaque. For now, assume little endian.
...	...	@@ -1325,7 +1307,6 @@ pub const Cpu = struct {
1325	1307	.thumbeb,
1326	1308	.sparc,
1327	1309	.sparc64,
1328		.tce,
1329	1310	.lanai,
1330	1311	.s390x,
1331	1312	=> .big,
...	...	@@ -1780,22 +1761,12 @@ pub const DynamicLinker = struct {
1780	1761	.hexagon,
1781	1762	.m68k,
1782	1763	.msp430,
1783		.r600,
1784	1764	.amdgcn,
1785		.tce,
1786		.tcele,
1787	1765	.xcore,
1788		.amdil,
1789		.amdil64,
1790		.hsail,
1791		.hsail64,
1792	1766	.spir,
1793	1767	.spir64,
1794	1768	.kalimba,
1795		.shave,
1796	1769	.lanai,
1797		.renderscript32,
1798		.renderscript64,
1799	1770	.ve,
1800	1771	.dxil,
1801	1772	.loongarch32,
...	...	@@ -1834,7 +1805,7 @@ pub const DynamicLinker = struct {
1834	1805	.ananas,
1835	1806	.cloudabi,
1836	1807	.fuchsia,
1837		.lv2,
	1808	.ps3,
1838	1809	.zos,
1839	1810	.minix,
1840	1811	.rtems,
...	...	@@ -1884,24 +1855,17 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1884	1855	.mipsel,
1885	1856	.powerpc,
1886	1857	.powerpcle,
1887		.r600,
1888	1858	.riscv32,
1889	1859	.sparcel,
1890		.tce,
1891		.tcele,
1892	1860	.thumb,
1893	1861	.thumbeb,
1894	1862	.x86,
1895	1863	.xcore,
1896	1864	.nvptx,
1897		.amdil,
1898		.hsail,
1899	1865	.spir,
1900	1866	.kalimba,
1901		.shave,
1902	1867	.lanai,
1903	1868	.wasm32,
1904		.renderscript32,
1905	1869	.aarch64_32,
1906	1870	.spirv32,
1907	1871	.loongarch32,
...	...	@@ -1918,11 +1882,8 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1918	1882	.riscv64,
1919	1883	.x86_64,
1920	1884	.nvptx64,
1921		.amdil64,
1922		.hsail64,
1923	1885	.spir64,
1924	1886	.wasm64,
1925		.renderscript64,
1926	1887	.amdgcn,
1927	1888	.bpfel,
1928	1889	.bpfeb,
...	...	@@ -2070,12 +2031,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2070	2031	.long, .ulong, .float, .double, .longdouble => return 32,
2071	2032	.longlong, .ulonglong => return 64,
2072	2033	},
2073		.tce, .tcele => switch (c_type) {
2074		.char => return 8,
2075		.short, .ushort => return 16,
2076		.int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2077		.float, .double, .longdouble => return 32,
2078		},
2079	2034	.mips64, .mips64el => switch (c_type) {
2080	2035	.char => return 8,
2081	2036	.short, .ushort => return 16,
...	...	@@ -2165,12 +2120,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2165	2120	.long, .ulong, .float, .double, .longdouble => return 32,
2166	2121	.longlong, .ulonglong => return 64,
2167	2122	},
2168		.tce, .tcele => switch (c_type) {
2169		.char => return 8,
2170		.short, .ushort => return 16,
2171		.int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2172		.float, .double, .longdouble => return 32,
2173		},
2174	2123	.mips64, .mips64el => switch (c_type) {
2175	2124	.char => return 8,
2176	2125	.short, .ushort => return 16,
...	...	@@ -2351,7 +2300,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2351	2300	},
2352	2301
2353	2302	.cloudabi,
2354		.lv2,
	2303	.ps3,
2355	2304	.zos,
2356	2305	.rtems,
2357	2306	.aix,
...	...	@@ -2418,15 +2367,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2418	2367	.xcore,
2419	2368	.dxil,
2420	2369	.loongarch32,
2421		.tce,
2422		.tcele,
2423		.amdil,
2424		.hsail,
2425	2370	.spir,
2426	2371	.spirv32,
2427	2372	.kalimba,
2428		.shave,
2429		.renderscript32,
2430	2373	.ve,
2431	2374	.spu_2,
2432	2375	.xtensa,
...	...	@@ -2434,11 +2377,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2434	2377
2435	2378	.aarch64_32,
2436	2379	.amdgcn,
2437		.amdil64,
2438	2380	.bpfel,
2439	2381	.bpfeb,
2440	2382	.hexagon,
2441		.hsail64,
2442	2383	.loongarch64,
2443	2384	.m68k,
2444	2385	.mips,
...	...	@@ -2449,11 +2390,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2449	2390	.lanai,
2450	2391	.nvptx,
2451	2392	.nvptx64,
2452		.r600,
2453	2393	.s390x,
2454	2394	.spir64,
2455	2395	.spirv64,
2456		.renderscript64,
2457	2396	=> 8,
2458	2397
2459	2398	.aarch64,
...	...	@@ -2537,15 +2476,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2537	2476	.xcore,
2538	2477	.dxil,
2539	2478	.loongarch32,
2540		.tce,
2541		.tcele,
2542		.amdil,
2543		.hsail,
2544	2479	.spir,
2545	2480	.spirv32,
2546	2481	.kalimba,
2547		.shave,
2548		.renderscript32,
2549	2482	.ve,
2550	2483	.spu_2,
2551	2484	.xtensa,
...	...	@@ -2559,11 +2492,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2559	2492	.thumbeb,
2560	2493	.aarch64_32,
2561	2494	.amdgcn,
2562		.amdil64,
2563	2495	.bpfel,
2564	2496	.bpfeb,
2565	2497	.hexagon,
2566		.hsail64,
2567	2498	.x86,
2568	2499	.loongarch64,
2569	2500	.m68k,
...	...	@@ -2575,11 +2506,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2575	2506	.lanai,
2576	2507	.nvptx,
2577	2508	.nvptx64,
2578		.r600,
2579	2509	.s390x,
2580	2510	.spir64,
2581	2511	.spirv64,
2582		.renderscript64,
2583	2512	=> 8,
2584	2513
2585	2514	.aarch64,

src/Type.zig-10

...	...	@@ -1599,7 +1599,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1599	1599	.mipsel,
1600	1600	.powerpc,
1601	1601	.powerpcle,
1602		.r600,
1603	1602	.amdgcn,
1604	1603	.riscv32,
1605	1604	.sparc,
...	...	@@ -1649,20 +1648,11 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1649	1648	.csky,
1650	1649	.arc,
1651	1650	.m68k,
1652		.tce,
1653		.tcele,
1654		.amdil,
1655		.hsail,
1656	1651	.spir,
1657	1652	.kalimba,
1658		.renderscript32,
1659	1653	.spirv,
1660	1654	.spirv32,
1661		.shave,
1662		.amdil64,
1663		.hsail64,
1664	1655	.spir64,
1665		.renderscript64,
1666	1656	.ve,
1667	1657	.spirv64,
1668	1658	.dxil,

src/Zcu.zig-10

...	...	@@ -3246,24 +3246,17 @@ pub fn atomicPtrAlignment(
3246	3246	.nvptx,
3247	3247	.powerpc,
3248	3248	.powerpcle,
3249		.r600,
3250	3249	.riscv32,
3251	3250	.sparc,
3252	3251	.sparcel,
3253		.tce,
3254		.tcele,
3255	3252	.thumb,
3256	3253	.thumbeb,
3257	3254	.x86,
3258	3255	.xcore,
3259		.amdil,
3260		.hsail,
3261	3256	.spir,
3262	3257	.kalimba,
3263	3258	.lanai,
3264		.shave,
3265	3259	.wasm32,
3266		.renderscript32,
3267	3260	.csky,
3268	3261	.spirv32,
3269	3262	.dxil,
...	...	@@ -3282,11 +3275,8 @@ pub fn atomicPtrAlignment(
3282	3275	.riscv64,
3283	3276	.sparc64,
3284	3277	.s390x,
3285		.amdil64,
3286		.hsail64,
3287	3278	.spir64,
3288	3279	.wasm64,
3289		.renderscript64,
3290	3280	.ve,
3291	3281	.spirv64,
3292	3282	.loongarch64,

src/codegen/llvm.zig+2-32

...	...	@@ -65,7 +65,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
65	65	.powerpcle => "powerpcle",
66	66	.powerpc64 => "powerpc64",
67	67	.powerpc64le => "powerpc64le",
68		.r600 => "r600",
69	68	.amdgcn => "amdgcn",
70	69	.riscv32 => "riscv32",
71	70	.riscv64 => "riscv64",
...	...	@@ -73,8 +72,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
73	72	.sparc64 => "sparc64",
74	73	.sparcel => "sparcel",
75	74	.s390x => "s390x",
76		.tce => "tce",
77		.tcele => "tcele",
78	75	.thumb => "thumb",
79	76	.thumbeb => "thumbeb",
80	77	.x86 => "i386",
...	...	@@ -83,22 +80,15 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
83	80	.xtensa => "xtensa",
84	81	.nvptx => "nvptx",
85	82	.nvptx64 => "nvptx64",
86		.amdil => "amdil",
87		.amdil64 => "amdil64",
88		.hsail => "hsail",
89		.hsail64 => "hsail64",
90	83	.spir => "spir",
91	84	.spir64 => "spir64",
92	85	.spirv => "spirv",
93	86	.spirv32 => "spirv32",
94	87	.spirv64 => "spirv64",
95	88	.kalimba => "kalimba",
96		.shave => "shave",
97	89	.lanai => "lanai",
98	90	.wasm32 => "wasm32",
99	91	.wasm64 => "wasm64",
100		.renderscript32 => "renderscript32",
101		.renderscript64 => "renderscript64",
102	92	.ve => "ve",
103	93	.spu_2 => return error.@"LLVM backend does not support SPU Mark II",
104	94	};
...	...	@@ -111,7 +101,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
111	101	.freebsd => "freebsd",
112	102	.fuchsia => "fuchsia",
113	103	.linux => "linux",
114		.lv2 => "lv2",
	104	.ps3 => "lv2",
115	105	.netbsd => "netbsd",
116	106	.openbsd => "openbsd",
117	107	.solaris, .illumos => "solaris",
...	...	@@ -231,7 +221,7 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
231	221	.fuchsia => .Fuchsia,
232	222	.ios => .IOS,
233	223	.linux => .Linux,
234		.lv2 => .Lv2,
	224	.ps3 => .Lv2,
235	225	.macos => .MacOSX,
236	226	.netbsd => .NetBSD,
237	227	.openbsd => .OpenBSD,
...	...	@@ -289,7 +279,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
289	279	.powerpcle => .ppcle,
290	280	.powerpc64 => .ppc64,
291	281	.powerpc64le => .ppc64le,
292		.r600 => .r600,
293	282	.amdgcn => .amdgcn,
294	283	.riscv32 => .riscv32,
295	284	.riscv64 => .riscv64,
...	...	@@ -297,8 +286,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
297	286	.sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.
298	287	.sparcel => .sparcel,
299	288	.s390x => .systemz,
300		.tce => .tce,
301		.tcele => .tcele,
302	289	.thumb => .thumb,
303	290	.thumbeb => .thumbeb,
304	291	.x86 => .x86,
...	...	@@ -307,22 +294,15 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
307	294	.xtensa => .xtensa,
308	295	.nvptx => .nvptx,
309	296	.nvptx64 => .nvptx64,
310		.amdil => .amdil,
311		.amdil64 => .amdil64,
312		.hsail => .hsail,
313		.hsail64 => .hsail64,
314	297	.spir => .spir,
315	298	.spir64 => .spir64,
316	299	.spirv => .spirv,
317	300	.spirv32 => .spirv32,
318	301	.spirv64 => .spirv64,
319	302	.kalimba => .kalimba,
320		.shave => .shave,
321	303	.lanai => .lanai,
322	304	.wasm32 => .wasm32,
323	305	.wasm64 => .wasm64,
324		.renderscript32 => .renderscript32,
325		.renderscript64 => .renderscript64,
326	306	.ve => .ve,
327	307	.spu_2 => .UnknownArch,
328	308	};
...	...	@@ -12092,22 +12072,12 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12092	12072	},
12093	12073
12094	12074	// LLVM backends that have no initialization functions.
12095		.tce,
12096		.tcele,
12097		.r600,
12098		.amdil,
12099		.amdil64,
12100		.hsail,
12101		.hsail64,
12102		.shave,
12103	12075	.spir,
12104	12076	.spir64,
12105	12077	.spirv,
12106	12078	.spirv32,
12107	12079	.spirv64,
12108	12080	.kalimba,
12109		.renderscript32,
12110		.renderscript64,
12111	12081	.dxil,
12112	12082	=> {},
12113	12083

src/target.zig-10

...	...	@@ -135,7 +135,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
135	135	.powerpcle,
136	136	.powerpc64,
137	137	.powerpc64le,
138		.r600,
139	138	.amdgcn,
140	139	.riscv32,
141	140	.riscv64,
...	...	@@ -143,8 +142,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
143	142	.sparc64,
144	143	.sparcel,
145	144	.s390x,
146		.tce,
147		.tcele,
148	145	.thumb,
149	146	.thumbeb,
150	147	.x86,
...	...	@@ -153,22 +150,15 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
153	150	.xtensa,
154	151	.nvptx,
155	152	.nvptx64,
156		.amdil,
157		.amdil64,
158		.hsail,
159		.hsail64,
160	153	.spir,
161	154	.spir64,
162	155	.spirv,
163	156	.spirv32,
164	157	.spirv64,
165	158	.kalimba,
166		.shave,
167	159	.lanai,
168	160	.wasm32,
169	161	.wasm64,
170		.renderscript32,
171		.renderscript64,
172	162	.ve,
173	163	=> true,
174	164

test/behavior/align.zig-1

...	...	@@ -94,7 +94,6 @@ test "alignment and size of structs with 128-bit fields" {
94	94	.mipsel,
95	95	.powerpc,
96	96	.powerpcle,
97		.r600,
98	97	.amdgcn,
99	98	.riscv32,
100	99	.sparc,

test/llvm_targets.zig-1

...	...	@@ -76,7 +76,6 @@ const targets = [_]std.Target.Query{
76	76	.{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .gnu },
77	77	.{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .musl },
78	78	.{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .none },
79		//.{ .cpu_arch = .r600, .os_tag = .mesa3d, .abi = .none },
80	79	.{ .cpu_arch = .riscv32, .os_tag = .freestanding, .abi = .none },
81	80	.{ .cpu_arch = .riscv32, .os_tag = .linux, .abi = .none },
82	81	.{ .cpu_arch = .riscv64, .os_tag = .freestanding, .abi = .none },

author	Andrew Kelley <andrew@ziglang.org> 2024-07-21 19:24:04-07:00
committer	GitHub <noreply@github.com> 2024-07-21 19:24:04-07:00
log	179a6e61e8be2e5736e9cab9661f04269907247c
tree	daecae4f223366436fe050efd6ff98dee92467ae
parent	956ba8f61ce308bd7a4e74c1ba12ba8f13e87f1e
parent	be9841335e4038798dc40c9b265cd9094336e622
signature	Signed by PGP key B5690EEEBB952194

Merge pull request #20708 from alexrp/target-cleanup-2