authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-07-21 19:24:04-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-07-21 19:24:04-07:00
log179a6e61e8be2e5736e9cab9661f04269907247c
treedaecae4f223366436fe050efd6ff98dee92467ae
parent956ba8f61ce308bd7a4e74c1ba12ba8f13e87f1e
parentbe9841335e4038798dc40c9b265cd9094336e622
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20708 from alexrp/target-cleanup-2

`std.Target`: Remove more dead architecture tags.

8 files changed, 32 insertions(+), 199 deletions(-)

lib/compiler/aro/aro/target.zig+2-36
...@@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type {...@@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type {
17 .riscv64,17 .riscv64,
18 .powerpc64,18 .powerpc64,
19 .powerpc64le,19 .powerpc64le,
20 .tce,
21 .tcele,
22 .ve,20 .ve,
23 => return .{ .specifier = .long },21 => return .{ .specifier = .long },
2422
...@@ -54,8 +52,6 @@ pub fn intPtrType(target: std.Target) Type {...@@ -54,8 +52,6 @@ pub fn intPtrType(target: std.Target) Type {
54 .riscv32,52 .riscv32,
55 .xcore,53 .xcore,
56 .hexagon,54 .hexagon,
57 .tce,
58 .tcele,
59 .m68k,55 .m68k,
60 .spir,56 .spir,
61 .spirv32,57 .spirv32,
...@@ -153,7 +149,7 @@ pub fn isTlsSupported(target: std.Target) bool {...@@ -153,7 +149,7 @@ pub fn isTlsSupported(target: std.Target) bool {
153 return supported;149 return supported;
154 }150 }
155 return switch (target.cpu.arch) {151 return switch (target.cpu.arch) {
156 .tce, .tcele, .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,152 .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false,
157 else => true,153 else => true,
158 };154 };
159}155}
...@@ -470,25 +466,18 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -470,25 +466,18 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
470 .mipsel,466 .mipsel,
471 .powerpc,467 .powerpc,
472 .powerpcle,468 .powerpcle,
473 .r600,
474 .riscv32,469 .riscv32,
475 .sparc,470 .sparc,
476 .sparcel,471 .sparcel,
477 .tce,
478 .tcele,
479 .thumb,472 .thumb,
480 .thumbeb,473 .thumbeb,
481 .x86,474 .x86,
482 .xcore,475 .xcore,
483 .nvptx,476 .nvptx,
484 .amdil,
485 .hsail,
486 .spir,477 .spir,
487 .kalimba,478 .kalimba,
488 .shave,
489 .lanai,479 .lanai,
490 .wasm32,480 .wasm32,
491 .renderscript32,
492 .aarch64_32,481 .aarch64_32,
493 .spirv32,482 .spirv32,
494 .loongarch32,483 .loongarch32,
...@@ -498,13 +487,10 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -498,13 +487,10 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
498487
499 .aarch64 => copy.cpu.arch = .arm,488 .aarch64 => copy.cpu.arch = .arm,
500 .aarch64_be => copy.cpu.arch = .armeb,489 .aarch64_be => copy.cpu.arch = .armeb,
501 .amdil64 => copy.cpu.arch = .amdil,
502 .nvptx64 => copy.cpu.arch = .nvptx,490 .nvptx64 => copy.cpu.arch = .nvptx,
503 .wasm64 => copy.cpu.arch = .wasm32,491 .wasm64 => copy.cpu.arch = .wasm32,
504 .hsail64 => copy.cpu.arch = .hsail,
505 .spir64 => copy.cpu.arch = .spir,492 .spir64 => copy.cpu.arch = .spir,
506 .spirv64 => copy.cpu.arch = .spirv32,493 .spirv64 => copy.cpu.arch = .spirv32,
507 .renderscript64 => copy.cpu.arch = .renderscript32,
508 .loongarch64 => copy.cpu.arch = .loongarch32,494 .loongarch64 => copy.cpu.arch = .loongarch32,
509 .mips64 => copy.cpu.arch = .mips,495 .mips64 => copy.cpu.arch = .mips,
510 .mips64el => copy.cpu.arch = .mipsel,496 .mips64el => copy.cpu.arch = .mipsel,
...@@ -529,12 +515,8 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -529,12 +515,8 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
529 .lanai,515 .lanai,
530 .m68k,516 .m68k,
531 .msp430,517 .msp430,
532 .r600,
533 .shave,
534 .sparcel,518 .sparcel,
535 .spu_2,519 .spu_2,
536 .tce,
537 .tcele,
538 .xcore,520 .xcore,
539 .xtensa,521 .xtensa,
540 => return null,522 => return null,
...@@ -544,13 +526,10 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -544,13 +526,10 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
544 .amdgcn,526 .amdgcn,
545 .bpfeb,527 .bpfeb,
546 .bpfel,528 .bpfel,
547 .amdil64,
548 .nvptx64,529 .nvptx64,
549 .wasm64,530 .wasm64,
550 .hsail64,
551 .spir64,531 .spir64,
552 .spirv64,532 .spirv64,
553 .renderscript64,
554 .loongarch64,533 .loongarch64,
555 .mips64,534 .mips64,
556 .mips64el,535 .mips64el,
...@@ -564,17 +543,14 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -564,17 +543,14 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
564 => {}, // Already 64 bit543 => {}, // Already 64 bit
565544
566 .aarch64_32 => copy.cpu.arch = .aarch64,545 .aarch64_32 => copy.cpu.arch = .aarch64,
567 .amdil => copy.cpu.arch = .amdil64,
568 .arm => copy.cpu.arch = .aarch64,546 .arm => copy.cpu.arch = .aarch64,
569 .armeb => copy.cpu.arch = .aarch64_be,547 .armeb => copy.cpu.arch = .aarch64_be,
570 .hsail => copy.cpu.arch = .hsail64,
571 .loongarch32 => copy.cpu.arch = .loongarch64,548 .loongarch32 => copy.cpu.arch = .loongarch64,
572 .mips => copy.cpu.arch = .mips64,549 .mips => copy.cpu.arch = .mips64,
573 .mipsel => copy.cpu.arch = .mips64el,550 .mipsel => copy.cpu.arch = .mips64el,
574 .nvptx => copy.cpu.arch = .nvptx64,551 .nvptx => copy.cpu.arch = .nvptx64,
575 .powerpc => copy.cpu.arch = .powerpc64,552 .powerpc => copy.cpu.arch = .powerpc64,
576 .powerpcle => copy.cpu.arch = .powerpc64le,553 .powerpcle => copy.cpu.arch = .powerpc64le,
577 .renderscript32 => copy.cpu.arch = .renderscript64,
578 .riscv32 => copy.cpu.arch = .riscv64,554 .riscv32 => copy.cpu.arch = .riscv64,
579 .sparc => copy.cpu.arch = .sparc64,555 .sparc => copy.cpu.arch = .sparc64,
580 .spir => copy.cpu.arch = .spir64,556 .spir => copy.cpu.arch = .spir64,
...@@ -620,7 +596,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -620,7 +596,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
620 .powerpcle => "powerpcle",596 .powerpcle => "powerpcle",
621 .powerpc64 => "powerpc64",597 .powerpc64 => "powerpc64",
622 .powerpc64le => "powerpc64le",598 .powerpc64le => "powerpc64le",
623 .r600 => "r600",
624 .amdgcn => "amdgcn",599 .amdgcn => "amdgcn",
625 .riscv32 => "riscv32",600 .riscv32 => "riscv32",
626 .riscv64 => "riscv64",601 .riscv64 => "riscv64",
...@@ -628,8 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -628,8 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
628 .sparc64 => "sparc64",603 .sparc64 => "sparc64",
629 .sparcel => "sparcel",604 .sparcel => "sparcel",
630 .s390x => "s390x",605 .s390x => "s390x",
631 .tce => "tce",
632 .tcele => "tcele",
633 .thumb => "thumb",606 .thumb => "thumb",
634 .thumbeb => "thumbeb",607 .thumbeb => "thumbeb",
635 .x86 => "i386",608 .x86 => "i386",
...@@ -638,21 +611,14 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -638,21 +611,14 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
638 .xtensa => "xtensa",611 .xtensa => "xtensa",
639 .nvptx => "nvptx",612 .nvptx => "nvptx",
640 .nvptx64 => "nvptx64",613 .nvptx64 => "nvptx64",
641 .amdil => "amdil",
642 .amdil64 => "amdil64",
643 .hsail => "hsail",
644 .hsail64 => "hsail64",
645 .spir => "spir",614 .spir => "spir",
646 .spir64 => "spir64",615 .spir64 => "spir64",
647 .spirv32 => "spirv32",616 .spirv32 => "spirv32",
648 .spirv64 => "spirv64",617 .spirv64 => "spirv64",
649 .kalimba => "kalimba",618 .kalimba => "kalimba",
650 .shave => "shave",
651 .lanai => "lanai",619 .lanai => "lanai",
652 .wasm32 => "wasm32",620 .wasm32 => "wasm32",
653 .wasm64 => "wasm64",621 .wasm64 => "wasm64",
654 .renderscript32 => "renderscript32",
655 .renderscript64 => "renderscript64",
656 .ve => "ve",622 .ve => "ve",
657 // Note: spu_2 is not supported in LLVM; this is the Zig arch name623 // Note: spu_2 is not supported in LLVM; this is the Zig arch name
658 .spu_2 => "spu_2",624 .spu_2 => "spu_2",
...@@ -668,7 +634,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -668,7 +634,7 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
668 .freebsd => "freebsd",634 .freebsd => "freebsd",
669 .fuchsia => "fuchsia",635 .fuchsia => "fuchsia",
670 .linux => "linux",636 .linux => "linux",
671 .lv2 => "lv2",637 .ps3 => "lv2",
672 .netbsd => "netbsd",638 .netbsd => "netbsd",
673 .openbsd => "openbsd",639 .openbsd => "openbsd",
674 .solaris => "solaris",640 .solaris => "solaris",
lib/std/Target.zig+28-99
...@@ -24,7 +24,7 @@ pub const Os = struct {...@@ -24,7 +24,7 @@ pub const Os = struct {
24 fuchsia,24 fuchsia,
25 ios,25 ios,
26 linux,26 linux,
27 lv2,27 ps3,
28 macos,28 macos,
29 netbsd,29 netbsd,
30 openbsd,30 openbsd,
...@@ -63,6 +63,11 @@ pub const Os = struct {...@@ -63,6 +63,11 @@ pub const Os = struct {
63 illumos,63 illumos,
64 other,64 other,
6565
66 // LLVM tags deliberately omitted:
67 // - kfreebsd
68 // - darwin
69 // - nacl
70
66 pub inline fn isDarwin(tag: Tag) bool {71 pub inline fn isDarwin(tag: Tag) bool {
67 return switch (tag) {72 return switch (tag) {
68 .ios, .macos, .watchos, .tvos, .visionos => true,73 .ios, .macos, .watchos, .tvos, .visionos => true,
...@@ -138,7 +143,7 @@ pub const Os = struct {...@@ -138,7 +143,7 @@ pub const Os = struct {
138 .ananas,143 .ananas,
139 .cloudabi,144 .cloudabi,
140 .fuchsia,145 .fuchsia,
141 .lv2,146 .ps3,
142 .zos,147 .zos,
143 .haiku,148 .haiku,
144 .minix,149 .minix,
...@@ -370,7 +375,7 @@ pub const Os = struct {...@@ -370,7 +375,7 @@ pub const Os = struct {
370 .ananas,375 .ananas,
371 .cloudabi,376 .cloudabi,
372 .fuchsia,377 .fuchsia,
373 .lv2,378 .ps3,
374 .zos,379 .zos,
375 .haiku,380 .haiku,
376 .minix,381 .minix,
...@@ -557,7 +562,7 @@ pub const Os = struct {...@@ -557,7 +562,7 @@ pub const Os = struct {
557 .ananas,562 .ananas,
558 .cloudabi,563 .cloudabi,
559 .fuchsia,564 .fuchsia,
560 .lv2,565 .ps3,
561 .zos,566 .zos,
562 .minix,567 .minix,
563 .rtems,568 .rtems,
...@@ -653,13 +658,17 @@ pub const Abi = enum {...@@ -653,13 +658,17 @@ pub const Abi = enum {
653 amplification,658 amplification,
654 ohos,659 ohos,
655660
661 // LLVM tags deliberately omitted:
662 // - gnuf64
663 // - coreclr
664
656 pub fn default(arch: Cpu.Arch, os: Os) Abi {665 pub fn default(arch: Cpu.Arch, os: Os) Abi {
657 return if (arch.isWasm()) .musl else switch (os.tag) {666 return if (arch.isWasm()) .musl else switch (os.tag) {
658 .freestanding,667 .freestanding,
659 .ananas,668 .ananas,
660 .cloudabi,669 .cloudabi,
661 .dragonfly,670 .dragonfly,
662 .lv2,671 .ps3,
663 .zos,672 .zos,
664 .minix,673 .minix,
665 .rtems,674 .rtems,
...@@ -994,7 +1003,6 @@ pub const Cpu = struct {...@@ -994,7 +1003,6 @@ pub const Cpu = struct {
994 powerpcle,1003 powerpcle,
995 powerpc64,1004 powerpc64,
996 powerpc64le,1005 powerpc64le,
997 r600,
998 amdgcn,1006 amdgcn,
999 riscv32,1007 riscv32,
1000 riscv64,1008 riscv64,
...@@ -1002,8 +1010,6 @@ pub const Cpu = struct {...@@ -1002,8 +1010,6 @@ pub const Cpu = struct {
1002 sparc64,1010 sparc64,
1003 sparcel,1011 sparcel,
1004 s390x,1012 s390x,
1005 tce,
1006 tcele,
1007 thumb,1013 thumb,
1008 thumbeb,1014 thumbeb,
1009 x86,1015 x86,
...@@ -1012,25 +1018,30 @@ pub const Cpu = struct {...@@ -1012,25 +1018,30 @@ pub const Cpu = struct {
1012 xtensa,1018 xtensa,
1013 nvptx,1019 nvptx,
1014 nvptx64,1020 nvptx64,
1015 amdil,
1016 amdil64,
1017 hsail,
1018 hsail64,
1019 spir,1021 spir,
1020 spir64,1022 spir64,
1021 spirv,1023 spirv,
1022 spirv32,1024 spirv32,
1023 spirv64,1025 spirv64,
1024 kalimba,1026 kalimba,
1025 shave,
1026 lanai,1027 lanai,
1027 wasm32,1028 wasm32,
1028 wasm64,1029 wasm64,
1029 renderscript32,
1030 renderscript64,
1031 ve,1030 ve,
1032 spu_2,1031 spu_2,
10331032
1033 // LLVM tags deliberately omitted:
1034 // - r600
1035 // - le32
1036 // - le64
1037 // - amdil
1038 // - amdil64
1039 // - hsail
1040 // - hsail64
1041 // - shave
1042 // - renderscript32
1043 // - renderscript64
1044
1034 pub inline fn isX86(arch: Arch) bool {1045 pub inline fn isX86(arch: Arch) bool {
1035 return switch (arch) {1046 return switch (arch) {
1036 .x86, .x86_64 => true,1047 .x86, .x86_64 => true,
...@@ -1148,26 +1159,19 @@ pub const Cpu = struct {...@@ -1148,26 +1159,19 @@ pub const Cpu = struct {
1148 .mips => .MIPS,1159 .mips => .MIPS,
1149 .mipsel => .MIPS_RS3_LE,1160 .mipsel => .MIPS_RS3_LE,
1150 .powerpc, .powerpcle => .PPC,1161 .powerpc, .powerpcle => .PPC,
1151 .r600 => .NONE,
1152 .riscv32 => .RISCV,1162 .riscv32 => .RISCV,
1153 .sparc => .SPARC,1163 .sparc => .SPARC,
1154 .sparcel => .SPARC,1164 .sparcel => .SPARC,
1155 .tce => .NONE,
1156 .tcele => .NONE,
1157 .thumb => .ARM,1165 .thumb => .ARM,
1158 .thumbeb => .ARM,1166 .thumbeb => .ARM,
1159 .x86 => .@"386",1167 .x86 => .@"386",
1160 .xcore => .XCORE,1168 .xcore => .XCORE,
1161 .xtensa => .XTENSA,1169 .xtensa => .XTENSA,
1162 .nvptx => .NONE,1170 .nvptx => .NONE,
1163 .amdil => .NONE,
1164 .hsail => .NONE,
1165 .spir => .NONE,1171 .spir => .NONE,
1166 .kalimba => .CSR_KALIMBA,1172 .kalimba => .CSR_KALIMBA,
1167 .shave => .NONE,
1168 .lanai => .LANAI,1173 .lanai => .LANAI,
1169 .wasm32 => .NONE,1174 .wasm32 => .NONE,
1170 .renderscript32 => .NONE,
1171 .aarch64_32 => .AARCH64,1175 .aarch64_32 => .AARCH64,
1172 .aarch64 => .AARCH64,1176 .aarch64 => .AARCH64,
1173 .aarch64_be => .AARCH64,1177 .aarch64_be => .AARCH64,
...@@ -1178,11 +1182,8 @@ pub const Cpu = struct {...@@ -1178,11 +1182,8 @@ pub const Cpu = struct {
1178 .riscv64 => .RISCV,1182 .riscv64 => .RISCV,
1179 .x86_64 => .X86_64,1183 .x86_64 => .X86_64,
1180 .nvptx64 => .NONE,1184 .nvptx64 => .NONE,
1181 .amdil64 => .NONE,
1182 .hsail64 => .NONE,
1183 .spir64 => .NONE,1185 .spir64 => .NONE,
1184 .wasm64 => .NONE,1186 .wasm64 => .NONE,
1185 .renderscript64 => .NONE,
1186 .amdgcn => .AMDGPU,1187 .amdgcn => .AMDGPU,
1187 .bpfel => .BPF,1188 .bpfel => .BPF,
1188 .bpfeb => .BPF,1189 .bpfeb => .BPF,
...@@ -1212,26 +1213,19 @@ pub const Cpu = struct {...@@ -1212,26 +1213,19 @@ pub const Cpu = struct {
1212 .mips => .Unknown,1213 .mips => .Unknown,
1213 .mipsel => .Unknown,1214 .mipsel => .Unknown,
1214 .powerpc, .powerpcle => .POWERPC,1215 .powerpc, .powerpcle => .POWERPC,
1215 .r600 => .Unknown,
1216 .riscv32 => .RISCV32,1216 .riscv32 => .RISCV32,
1217 .sparc => .Unknown,1217 .sparc => .Unknown,
1218 .sparcel => .Unknown,1218 .sparcel => .Unknown,
1219 .tce => .Unknown,
1220 .tcele => .Unknown,
1221 .thumb => .Thumb,1219 .thumb => .Thumb,
1222 .thumbeb => .Thumb,1220 .thumbeb => .Thumb,
1223 .x86 => .I386,1221 .x86 => .I386,
1224 .xcore => .Unknown,1222 .xcore => .Unknown,
1225 .xtensa => .Unknown,1223 .xtensa => .Unknown,
1226 .nvptx => .Unknown,1224 .nvptx => .Unknown,
1227 .amdil => .Unknown,
1228 .hsail => .Unknown,
1229 .spir => .Unknown,1225 .spir => .Unknown,
1230 .kalimba => .Unknown,1226 .kalimba => .Unknown,
1231 .shave => .Unknown,
1232 .lanai => .Unknown,1227 .lanai => .Unknown,
1233 .wasm32 => .Unknown,1228 .wasm32 => .Unknown,
1234 .renderscript32 => .Unknown,
1235 .aarch64_32 => .ARM64,1229 .aarch64_32 => .ARM64,
1236 .aarch64 => .ARM64,1230 .aarch64 => .ARM64,
1237 .aarch64_be => .ARM64,1231 .aarch64_be => .ARM64,
...@@ -1242,11 +1236,8 @@ pub const Cpu = struct {...@@ -1242,11 +1236,8 @@ pub const Cpu = struct {
1242 .riscv64 => .RISCV64,1236 .riscv64 => .RISCV64,
1243 .x86_64 => .X64,1237 .x86_64 => .X64,
1244 .nvptx64 => .Unknown,1238 .nvptx64 => .Unknown,
1245 .amdil64 => .Unknown,
1246 .hsail64 => .Unknown,
1247 .spir64 => .Unknown,1239 .spir64 => .Unknown,
1248 .wasm64 => .Unknown,1240 .wasm64 => .Unknown,
1249 .renderscript64 => .Unknown,
1250 .amdgcn => .Unknown,1241 .amdgcn => .Unknown,
1251 .bpfel => .Unknown,1242 .bpfel => .Unknown,
1252 .bpfeb => .Unknown,1243 .bpfeb => .Unknown,
...@@ -1270,14 +1261,10 @@ pub const Cpu = struct {...@@ -1270,14 +1261,10 @@ pub const Cpu = struct {
1270 .aarch64_32,1261 .aarch64_32,
1271 .aarch64,1262 .aarch64,
1272 .amdgcn,1263 .amdgcn,
1273 .amdil,
1274 .amdil64,
1275 .bpfel,1264 .bpfel,
1276 .csky,1265 .csky,
1277 .xtensa,1266 .xtensa,
1278 .hexagon,1267 .hexagon,
1279 .hsail,
1280 .hsail64,
1281 .kalimba,1268 .kalimba,
1282 .mipsel,1269 .mipsel,
1283 .mips64el,1270 .mips64el,
...@@ -1285,10 +1272,8 @@ pub const Cpu = struct {...@@ -1285,10 +1272,8 @@ pub const Cpu = struct {
1285 .nvptx,1272 .nvptx,
1286 .nvptx64,1273 .nvptx64,
1287 .sparcel,1274 .sparcel,
1288 .tcele,
1289 .powerpcle,1275 .powerpcle,
1290 .powerpc64le,1276 .powerpc64le,
1291 .r600,
1292 .riscv32,1277 .riscv32,
1293 .riscv64,1278 .riscv64,
1294 .x86,1279 .x86,
...@@ -1299,9 +1284,6 @@ pub const Cpu = struct {...@@ -1299,9 +1284,6 @@ pub const Cpu = struct {
1299 .thumb,1284 .thumb,
1300 .spir,1285 .spir,
1301 .spir64,1286 .spir64,
1302 .renderscript32,
1303 .renderscript64,
1304 .shave,
1305 .ve,1287 .ve,
1306 .spu_2,1288 .spu_2,
1307 // GPU bitness is opaque. For now, assume little endian.1289 // GPU bitness is opaque. For now, assume little endian.
...@@ -1325,7 +1307,6 @@ pub const Cpu = struct {...@@ -1325,7 +1307,6 @@ pub const Cpu = struct {
1325 .thumbeb,1307 .thumbeb,
1326 .sparc,1308 .sparc,
1327 .sparc64,1309 .sparc64,
1328 .tce,
1329 .lanai,1310 .lanai,
1330 .s390x,1311 .s390x,
1331 => .big,1312 => .big,
...@@ -1780,22 +1761,12 @@ pub const DynamicLinker = struct {...@@ -1780,22 +1761,12 @@ pub const DynamicLinker = struct {
1780 .hexagon,1761 .hexagon,
1781 .m68k,1762 .m68k,
1782 .msp430,1763 .msp430,
1783 .r600,
1784 .amdgcn,1764 .amdgcn,
1785 .tce,
1786 .tcele,
1787 .xcore,1765 .xcore,
1788 .amdil,
1789 .amdil64,
1790 .hsail,
1791 .hsail64,
1792 .spir,1766 .spir,
1793 .spir64,1767 .spir64,
1794 .kalimba,1768 .kalimba,
1795 .shave,
1796 .lanai,1769 .lanai,
1797 .renderscript32,
1798 .renderscript64,
1799 .ve,1770 .ve,
1800 .dxil,1771 .dxil,
1801 .loongarch32,1772 .loongarch32,
...@@ -1834,7 +1805,7 @@ pub const DynamicLinker = struct {...@@ -1834,7 +1805,7 @@ pub const DynamicLinker = struct {
1834 .ananas,1805 .ananas,
1835 .cloudabi,1806 .cloudabi,
1836 .fuchsia,1807 .fuchsia,
1837 .lv2,1808 .ps3,
1838 .zos,1809 .zos,
1839 .minix,1810 .minix,
1840 .rtems,1811 .rtems,
...@@ -1884,24 +1855,17 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1884,24 +1855,17 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1884 .mipsel,1855 .mipsel,
1885 .powerpc,1856 .powerpc,
1886 .powerpcle,1857 .powerpcle,
1887 .r600,
1888 .riscv32,1858 .riscv32,
1889 .sparcel,1859 .sparcel,
1890 .tce,
1891 .tcele,
1892 .thumb,1860 .thumb,
1893 .thumbeb,1861 .thumbeb,
1894 .x86,1862 .x86,
1895 .xcore,1863 .xcore,
1896 .nvptx,1864 .nvptx,
1897 .amdil,
1898 .hsail,
1899 .spir,1865 .spir,
1900 .kalimba,1866 .kalimba,
1901 .shave,
1902 .lanai,1867 .lanai,
1903 .wasm32,1868 .wasm32,
1904 .renderscript32,
1905 .aarch64_32,1869 .aarch64_32,
1906 .spirv32,1870 .spirv32,
1907 .loongarch32,1871 .loongarch32,
...@@ -1918,11 +1882,8 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1918,11 +1882,8 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1918 .riscv64,1882 .riscv64,
1919 .x86_64,1883 .x86_64,
1920 .nvptx64,1884 .nvptx64,
1921 .amdil64,
1922 .hsail64,
1923 .spir64,1885 .spir64,
1924 .wasm64,1886 .wasm64,
1925 .renderscript64,
1926 .amdgcn,1887 .amdgcn,
1927 .bpfel,1888 .bpfel,
1928 .bpfeb,1889 .bpfeb,
...@@ -2070,12 +2031,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2070,12 +2031,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2070 .long, .ulong, .float, .double, .longdouble => return 32,2031 .long, .ulong, .float, .double, .longdouble => return 32,
2071 .longlong, .ulonglong => return 64,2032 .longlong, .ulonglong => return 64,
2072 },2033 },
2073 .tce, .tcele => switch (c_type) {
2074 .char => return 8,
2075 .short, .ushort => return 16,
2076 .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2077 .float, .double, .longdouble => return 32,
2078 },
2079 .mips64, .mips64el => switch (c_type) {2034 .mips64, .mips64el => switch (c_type) {
2080 .char => return 8,2035 .char => return 8,
2081 .short, .ushort => return 16,2036 .short, .ushort => return 16,
...@@ -2165,12 +2120,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2165,12 +2120,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2165 .long, .ulong, .float, .double, .longdouble => return 32,2120 .long, .ulong, .float, .double, .longdouble => return 32,
2166 .longlong, .ulonglong => return 64,2121 .longlong, .ulonglong => return 64,
2167 },2122 },
2168 .tce, .tcele => switch (c_type) {
2169 .char => return 8,
2170 .short, .ushort => return 16,
2171 .int, .uint, .long, .ulong, .longlong, .ulonglong => return 32,
2172 .float, .double, .longdouble => return 32,
2173 },
2174 .mips64, .mips64el => switch (c_type) {2123 .mips64, .mips64el => switch (c_type) {
2175 .char => return 8,2124 .char => return 8,
2176 .short, .ushort => return 16,2125 .short, .ushort => return 16,
...@@ -2351,7 +2300,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2351,7 +2300,7 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2351 },2300 },
23522301
2353 .cloudabi,2302 .cloudabi,
2354 .lv2,2303 .ps3,
2355 .zos,2304 .zos,
2356 .rtems,2305 .rtems,
2357 .aix,2306 .aix,
...@@ -2418,15 +2367,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2418,15 +2367,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2418 .xcore,2367 .xcore,
2419 .dxil,2368 .dxil,
2420 .loongarch32,2369 .loongarch32,
2421 .tce,
2422 .tcele,
2423 .amdil,
2424 .hsail,
2425 .spir,2370 .spir,
2426 .spirv32,2371 .spirv32,
2427 .kalimba,2372 .kalimba,
2428 .shave,
2429 .renderscript32,
2430 .ve,2373 .ve,
2431 .spu_2,2374 .spu_2,
2432 .xtensa,2375 .xtensa,
...@@ -2434,11 +2377,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2434,11 +2377,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
24342377
2435 .aarch64_32,2378 .aarch64_32,
2436 .amdgcn,2379 .amdgcn,
2437 .amdil64,
2438 .bpfel,2380 .bpfel,
2439 .bpfeb,2381 .bpfeb,
2440 .hexagon,2382 .hexagon,
2441 .hsail64,
2442 .loongarch64,2383 .loongarch64,
2443 .m68k,2384 .m68k,
2444 .mips,2385 .mips,
...@@ -2449,11 +2390,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2449,11 +2390,9 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2449 .lanai,2390 .lanai,
2450 .nvptx,2391 .nvptx,
2451 .nvptx64,2392 .nvptx64,
2452 .r600,
2453 .s390x,2393 .s390x,
2454 .spir64,2394 .spir64,
2455 .spirv64,2395 .spirv64,
2456 .renderscript64,
2457 => 8,2396 => 8,
24582397
2459 .aarch64,2398 .aarch64,
...@@ -2537,15 +2476,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2537,15 +2476,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2537 .xcore,2476 .xcore,
2538 .dxil,2477 .dxil,
2539 .loongarch32,2478 .loongarch32,
2540 .tce,
2541 .tcele,
2542 .amdil,
2543 .hsail,
2544 .spir,2479 .spir,
2545 .spirv32,2480 .spirv32,
2546 .kalimba,2481 .kalimba,
2547 .shave,
2548 .renderscript32,
2549 .ve,2482 .ve,
2550 .spu_2,2483 .spu_2,
2551 .xtensa,2484 .xtensa,
...@@ -2559,11 +2492,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2559,11 +2492,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2559 .thumbeb,2492 .thumbeb,
2560 .aarch64_32,2493 .aarch64_32,
2561 .amdgcn,2494 .amdgcn,
2562 .amdil64,
2563 .bpfel,2495 .bpfel,
2564 .bpfeb,2496 .bpfeb,
2565 .hexagon,2497 .hexagon,
2566 .hsail64,
2567 .x86,2498 .x86,
2568 .loongarch64,2499 .loongarch64,
2569 .m68k,2500 .m68k,
...@@ -2575,11 +2506,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2575,11 +2506,9 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2575 .lanai,2506 .lanai,
2576 .nvptx,2507 .nvptx,
2577 .nvptx64,2508 .nvptx64,
2578 .r600,
2579 .s390x,2509 .s390x,
2580 .spir64,2510 .spir64,
2581 .spirv64,2511 .spirv64,
2582 .renderscript64,
2583 => 8,2512 => 8,
25842513
2585 .aarch64,2514 .aarch64,
src/Type.zig-10
...@@ -1599,7 +1599,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1599,7 +1599,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1599 .mipsel,1599 .mipsel,
1600 .powerpc,1600 .powerpc,
1601 .powerpcle,1601 .powerpcle,
1602 .r600,
1603 .amdgcn,1602 .amdgcn,
1604 .riscv32,1603 .riscv32,
1605 .sparc,1604 .sparc,
...@@ -1649,20 +1648,11 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1649,20 +1648,11 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1649 .csky,1648 .csky,
1650 .arc,1649 .arc,
1651 .m68k,1650 .m68k,
1652 .tce,
1653 .tcele,
1654 .amdil,
1655 .hsail,
1656 .spir,1651 .spir,
1657 .kalimba,1652 .kalimba,
1658 .renderscript32,
1659 .spirv,1653 .spirv,
1660 .spirv32,1654 .spirv32,
1661 .shave,
1662 .amdil64,
1663 .hsail64,
1664 .spir64,1655 .spir64,
1665 .renderscript64,
1666 .ve,1656 .ve,
1667 .spirv64,1657 .spirv64,
1668 .dxil,1658 .dxil,
src/Zcu.zig-10
...@@ -3246,24 +3246,17 @@ pub fn atomicPtrAlignment(...@@ -3246,24 +3246,17 @@ pub fn atomicPtrAlignment(
3246 .nvptx,3246 .nvptx,
3247 .powerpc,3247 .powerpc,
3248 .powerpcle,3248 .powerpcle,
3249 .r600,
3250 .riscv32,3249 .riscv32,
3251 .sparc,3250 .sparc,
3252 .sparcel,3251 .sparcel,
3253 .tce,
3254 .tcele,
3255 .thumb,3252 .thumb,
3256 .thumbeb,3253 .thumbeb,
3257 .x86,3254 .x86,
3258 .xcore,3255 .xcore,
3259 .amdil,
3260 .hsail,
3261 .spir,3256 .spir,
3262 .kalimba,3257 .kalimba,
3263 .lanai,3258 .lanai,
3264 .shave,
3265 .wasm32,3259 .wasm32,
3266 .renderscript32,
3267 .csky,3260 .csky,
3268 .spirv32,3261 .spirv32,
3269 .dxil,3262 .dxil,
...@@ -3282,11 +3275,8 @@ pub fn atomicPtrAlignment(...@@ -3282,11 +3275,8 @@ pub fn atomicPtrAlignment(
3282 .riscv64,3275 .riscv64,
3283 .sparc64,3276 .sparc64,
3284 .s390x,3277 .s390x,
3285 .amdil64,
3286 .hsail64,
3287 .spir64,3278 .spir64,
3288 .wasm64,3279 .wasm64,
3289 .renderscript64,
3290 .ve,3280 .ve,
3291 .spirv64,3281 .spirv64,
3292 .loongarch64,3282 .loongarch64,
src/codegen/llvm.zig+2-32
...@@ -65,7 +65,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -65,7 +65,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
65 .powerpcle => "powerpcle",65 .powerpcle => "powerpcle",
66 .powerpc64 => "powerpc64",66 .powerpc64 => "powerpc64",
67 .powerpc64le => "powerpc64le",67 .powerpc64le => "powerpc64le",
68 .r600 => "r600",
69 .amdgcn => "amdgcn",68 .amdgcn => "amdgcn",
70 .riscv32 => "riscv32",69 .riscv32 => "riscv32",
71 .riscv64 => "riscv64",70 .riscv64 => "riscv64",
...@@ -73,8 +72,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -73,8 +72,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
73 .sparc64 => "sparc64",72 .sparc64 => "sparc64",
74 .sparcel => "sparcel",73 .sparcel => "sparcel",
75 .s390x => "s390x",74 .s390x => "s390x",
76 .tce => "tce",
77 .tcele => "tcele",
78 .thumb => "thumb",75 .thumb => "thumb",
79 .thumbeb => "thumbeb",76 .thumbeb => "thumbeb",
80 .x86 => "i386",77 .x86 => "i386",
...@@ -83,22 +80,15 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -83,22 +80,15 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
83 .xtensa => "xtensa",80 .xtensa => "xtensa",
84 .nvptx => "nvptx",81 .nvptx => "nvptx",
85 .nvptx64 => "nvptx64",82 .nvptx64 => "nvptx64",
86 .amdil => "amdil",
87 .amdil64 => "amdil64",
88 .hsail => "hsail",
89 .hsail64 => "hsail64",
90 .spir => "spir",83 .spir => "spir",
91 .spir64 => "spir64",84 .spir64 => "spir64",
92 .spirv => "spirv",85 .spirv => "spirv",
93 .spirv32 => "spirv32",86 .spirv32 => "spirv32",
94 .spirv64 => "spirv64",87 .spirv64 => "spirv64",
95 .kalimba => "kalimba",88 .kalimba => "kalimba",
96 .shave => "shave",
97 .lanai => "lanai",89 .lanai => "lanai",
98 .wasm32 => "wasm32",90 .wasm32 => "wasm32",
99 .wasm64 => "wasm64",91 .wasm64 => "wasm64",
100 .renderscript32 => "renderscript32",
101 .renderscript64 => "renderscript64",
102 .ve => "ve",92 .ve => "ve",
103 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",93 .spu_2 => return error.@"LLVM backend does not support SPU Mark II",
104 };94 };
...@@ -111,7 +101,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -111,7 +101,7 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
111 .freebsd => "freebsd",101 .freebsd => "freebsd",
112 .fuchsia => "fuchsia",102 .fuchsia => "fuchsia",
113 .linux => "linux",103 .linux => "linux",
114 .lv2 => "lv2",104 .ps3 => "lv2",
115 .netbsd => "netbsd",105 .netbsd => "netbsd",
116 .openbsd => "openbsd",106 .openbsd => "openbsd",
117 .solaris, .illumos => "solaris",107 .solaris, .illumos => "solaris",
...@@ -231,7 +221,7 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {...@@ -231,7 +221,7 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
231 .fuchsia => .Fuchsia,221 .fuchsia => .Fuchsia,
232 .ios => .IOS,222 .ios => .IOS,
233 .linux => .Linux,223 .linux => .Linux,
234 .lv2 => .Lv2,224 .ps3 => .Lv2,
235 .macos => .MacOSX,225 .macos => .MacOSX,
236 .netbsd => .NetBSD,226 .netbsd => .NetBSD,
237 .openbsd => .OpenBSD,227 .openbsd => .OpenBSD,
...@@ -289,7 +279,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -289,7 +279,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
289 .powerpcle => .ppcle,279 .powerpcle => .ppcle,
290 .powerpc64 => .ppc64,280 .powerpc64 => .ppc64,
291 .powerpc64le => .ppc64le,281 .powerpc64le => .ppc64le,
292 .r600 => .r600,
293 .amdgcn => .amdgcn,282 .amdgcn => .amdgcn,
294 .riscv32 => .riscv32,283 .riscv32 => .riscv32,
295 .riscv64 => .riscv64,284 .riscv64 => .riscv64,
...@@ -297,8 +286,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -297,8 +286,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
297 .sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.286 .sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.
298 .sparcel => .sparcel,287 .sparcel => .sparcel,
299 .s390x => .systemz,288 .s390x => .systemz,
300 .tce => .tce,
301 .tcele => .tcele,
302 .thumb => .thumb,289 .thumb => .thumb,
303 .thumbeb => .thumbeb,290 .thumbeb => .thumbeb,
304 .x86 => .x86,291 .x86 => .x86,
...@@ -307,22 +294,15 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -307,22 +294,15 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
307 .xtensa => .xtensa,294 .xtensa => .xtensa,
308 .nvptx => .nvptx,295 .nvptx => .nvptx,
309 .nvptx64 => .nvptx64,296 .nvptx64 => .nvptx64,
310 .amdil => .amdil,
311 .amdil64 => .amdil64,
312 .hsail => .hsail,
313 .hsail64 => .hsail64,
314 .spir => .spir,297 .spir => .spir,
315 .spir64 => .spir64,298 .spir64 => .spir64,
316 .spirv => .spirv,299 .spirv => .spirv,
317 .spirv32 => .spirv32,300 .spirv32 => .spirv32,
318 .spirv64 => .spirv64,301 .spirv64 => .spirv64,
319 .kalimba => .kalimba,302 .kalimba => .kalimba,
320 .shave => .shave,
321 .lanai => .lanai,303 .lanai => .lanai,
322 .wasm32 => .wasm32,304 .wasm32 => .wasm32,
323 .wasm64 => .wasm64,305 .wasm64 => .wasm64,
324 .renderscript32 => .renderscript32,
325 .renderscript64 => .renderscript64,
326 .ve => .ve,306 .ve => .ve,
327 .spu_2 => .UnknownArch,307 .spu_2 => .UnknownArch,
328 };308 };
...@@ -12092,22 +12072,12 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -12092,22 +12072,12 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12092 },12072 },
1209312073
12094 // LLVM backends that have no initialization functions.12074 // LLVM backends that have no initialization functions.
12095 .tce,
12096 .tcele,
12097 .r600,
12098 .amdil,
12099 .amdil64,
12100 .hsail,
12101 .hsail64,
12102 .shave,
12103 .spir,12075 .spir,
12104 .spir64,12076 .spir64,
12105 .spirv,12077 .spirv,
12106 .spirv32,12078 .spirv32,
12107 .spirv64,12079 .spirv64,
12108 .kalimba,12080 .kalimba,
12109 .renderscript32,
12110 .renderscript64,
12111 .dxil,12081 .dxil,
12112 => {},12082 => {},
1211312083
src/target.zig-10
...@@ -135,7 +135,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -135,7 +135,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
135 .powerpcle,135 .powerpcle,
136 .powerpc64,136 .powerpc64,
137 .powerpc64le,137 .powerpc64le,
138 .r600,
139 .amdgcn,138 .amdgcn,
140 .riscv32,139 .riscv32,
141 .riscv64,140 .riscv64,
...@@ -143,8 +142,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -143,8 +142,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
143 .sparc64,142 .sparc64,
144 .sparcel,143 .sparcel,
145 .s390x,144 .s390x,
146 .tce,
147 .tcele,
148 .thumb,145 .thumb,
149 .thumbeb,146 .thumbeb,
150 .x86,147 .x86,
...@@ -153,22 +150,15 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -153,22 +150,15 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
153 .xtensa,150 .xtensa,
154 .nvptx,151 .nvptx,
155 .nvptx64,152 .nvptx64,
156 .amdil,
157 .amdil64,
158 .hsail,
159 .hsail64,
160 .spir,153 .spir,
161 .spir64,154 .spir64,
162 .spirv,155 .spirv,
163 .spirv32,156 .spirv32,
164 .spirv64,157 .spirv64,
165 .kalimba,158 .kalimba,
166 .shave,
167 .lanai,159 .lanai,
168 .wasm32,160 .wasm32,
169 .wasm64,161 .wasm64,
170 .renderscript32,
171 .renderscript64,
172 .ve,162 .ve,
173 => true,163 => true,
174164
test/behavior/align.zig-1
...@@ -94,7 +94,6 @@ test "alignment and size of structs with 128-bit fields" {...@@ -94,7 +94,6 @@ test "alignment and size of structs with 128-bit fields" {
94 .mipsel,94 .mipsel,
95 .powerpc,95 .powerpc,
96 .powerpcle,96 .powerpcle,
97 .r600,
98 .amdgcn,97 .amdgcn,
99 .riscv32,98 .riscv32,
100 .sparc,99 .sparc,
test/llvm_targets.zig-1
...@@ -76,7 +76,6 @@ const targets = [_]std.Target.Query{...@@ -76,7 +76,6 @@ const targets = [_]std.Target.Query{
76 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .gnu },76 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .gnu },
77 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .musl },77 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .musl },
78 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .none },78 .{ .cpu_arch = .powerpc64le, .os_tag = .linux, .abi = .none },
79 //.{ .cpu_arch = .r600, .os_tag = .mesa3d, .abi = .none },
80 .{ .cpu_arch = .riscv32, .os_tag = .freestanding, .abi = .none },79 .{ .cpu_arch = .riscv32, .os_tag = .freestanding, .abi = .none },
81 .{ .cpu_arch = .riscv32, .os_tag = .linux, .abi = .none },80 .{ .cpu_arch = .riscv32, .os_tag = .linux, .abi = .none },
82 .{ .cpu_arch = .riscv64, .os_tag = .freestanding, .abi = .none },81 .{ .cpu_arch = .riscv64, .os_tag = .freestanding, .abi = .none },