| author |  Ali Chraghi <alichraghi@proton.me> 2026-07-08 17:06:51+03:30 |
| committer | Ali Chraghi <alichraghi@proton.me> 2026-07-10 11:39:54+03:30 |
| log | 48821ea886e29c5568cd2036cd46ca435550aaa3 |
| tree | c85b326e9246fb71526873a261cb2ce8f66069e3 |
| parent | c498b66434412616a97328a7f7a05014aa5183dc |
spirv: always emit int64 cap for spirv64
3 files changed, 15 insertions(+), 8 deletions(-)
lib- std
- src
- codegen
- spirv
- link
lib/std/Target.zig+2-1
| ... | ... | @@ -2334,7 +2334,8 @@ pub fn supportsAddressSpace( |
| 2334 | 2334 | .constant => (is_gpu and (context == null or context == .constant)) or |
| 2335 | 2335 | (is_spirv and (context == null or context == .constant or context == .pointer)), |
| 2336 | 2336 | .param => is_nvptx, |
| 2337 | .input, .output, .uniform, .push_constant, .storage_buffer, .physical_storage_buffer => is_spirv, | |
| 2337 | .input, .output, .uniform, .push_constant, .storage_buffer => is_spirv, | |
| 2338 | .physical_storage_buffer => arch == .spirv64, | |
| 2338 | 2339 | .externref, .funcref => target.cpu.has(.wasm, .reference_types), |
| 2339 | 2340 | }; |
| 2340 | 2341 | } |
src/codegen/spirv/CodeGen.zig+7-4
| ... | ... | @@ -53,9 +53,12 @@ tracked_allocas: std.AutoHashMapUnmanaged(Id, ?Id) = .empty, |
| 53 | 53 | loop_switches: std.AutoHashMapUnmanaged(Air.Inst.Index, LoopSwitch) = .empty, |
| 54 | 54 | id_scratch: std.ArrayList(Id) = .empty, |
| 55 | 55 | |
| 56 | fn hasInt64(target: *const std.Target) bool { | |
| 57 | return target.cpu.arch == .spirv64 or target.cpu.has(.spirv, .int64); | |
| 58 | } | |
| 59 | ||
| 56 | 60 | fn bigIntBits(cg: *const CodeGen) u16 { |
| 57 | const target = cg.zcu.getTarget(); | |
| 58 | return if (target.cpu.has(.spirv, .int64)) 64 else 32; | |
| 61 | return if (hasInt64(cg.zcu.getTarget())) 64 else 32; | |
| 59 | 62 | } |
| 60 | 63 | |
| 61 | 64 | fn limbType(cg: *const CodeGen) Type { |
| ... | ... | @@ -487,7 +490,7 @@ pub fn backingIntBits(cg: *const CodeGen, bits: u16) struct { u16, bool } { |
| 487 | 490 | .{ .bits = 8, .enabled = target.cpu.has(.spirv, .int8) }, |
| 488 | 491 | .{ .bits = 16, .enabled = target.cpu.has(.spirv, .int16) }, |
| 489 | 492 | .{ .bits = 32, .enabled = true }, |
| 490 | .{ .bits = 64, .enabled = target.cpu.has(.spirv, .int64) or target.cpu.arch == .spirv64 }, | |
| 493 | .{ .bits = 64, .enabled = hasInt64(target) }, | |
| 491 | 494 | }; |
| 492 | 495 | |
| 493 | 496 | for (ints) |int| { |
| ... | ... | @@ -5273,7 +5276,7 @@ fn airMulOverflow(cg: *CodeGen, inst: Air.Inst.Index) !?Id { |
| 5273 | 5276 | // of the result too. |
| 5274 | 5277 | |
| 5275 | 5278 | const target = cg.zcu.getTarget(); |
| 5276 | const largest_int_bits: u16 = if (target.cpu.has(.spirv, .int64) or target.cpu.arch == .spirv64) 64 else 32; | |
| 5279 | const largest_int_bits: u16 = if (hasInt64(target)) 64 else 32; | |
| 5277 | 5280 | // If non-null, the number of bits that the multiplication should be performed in. If |
| 5278 | 5281 | // null, we have to use wide multiplication. |
| 5279 | 5282 | const maybe_op_ty_bits: ?u16 = switch (info.bits) { |
src/link/SpirV.zig+6-3
| ... | ... | @@ -621,9 +621,12 @@ fn emitPreamble( |
| 621 | 621 | }, |
| 622 | 622 | else => unreachable, |
| 623 | 623 | } |
| 624 | if (target.os.tag == .vulkan and target.cpu.arch == .spirv64) { | |
| 625 | caps.insert(.physical_storage_buffer_addresses); | |
| 626 | try exts.put(gpa, "SPV_KHR_physical_storage_buffer", {}); | |
| 624 | if (target.cpu.arch == .spirv64) { | |
| 625 | caps.insert(.int64); | |
| 626 | if (target.os.tag == .vulkan) { | |
| 627 | caps.insert(.physical_storage_buffer_addresses); | |
| 628 | try exts.put(gpa, "SPV_KHR_physical_storage_buffer", {}); | |
| 629 | } | |
| 627 | 630 | } |
| 628 | 631 | if (has_linkage) caps.insert(.linkage); |
| 629 | 632 |