authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-05 05:49:02+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-05 08:04:39+02:00
log7b905d6a2b8f6fadc55e6c58a3d558a3d5899326
treeb4d8081c6bf04246cd36aa1678a205647caaa486
parentc36ab59a3b1f303af44e55bfa194ab922f57b11a

std.zig.system: detect aarch64 CPU model/features on FreeBSD

ref https://codeberg.org/ziglang/zig/issues/36724

2 files changed, 36 insertions(+), 0 deletions(-)

lib/std/zig/system.zig+2
...@@ -15,6 +15,7 @@ pub const NativePaths = @import("system/NativePaths.zig");...@@ -15,6 +15,7 @@ pub const NativePaths = @import("system/NativePaths.zig");
15pub const windows = @import("system/windows.zig");15pub const windows = @import("system/windows.zig");
16pub const darwin = @import("system/darwin.zig");16pub const darwin = @import("system/darwin.zig");
17pub const linux = @import("system/linux.zig");17pub const linux = @import("system/linux.zig");
18pub const freebsd = @import("system/freebsd.zig");
1819
19pub const Executor = union(enum) {20pub const Executor = union(enum) {
20 native,21 native,
...@@ -543,6 +544,7 @@ fn detectNativeCpuAndFeatures(io: Io, cpu_arch: Target.Cpu.Arch, os: Target.Os,...@@ -543,6 +544,7 @@ fn detectNativeCpuAndFeatures(io: Io, cpu_arch: Target.Cpu.Arch, os: Target.Os,
543 }544 }
544545
545 switch (builtin.os.tag) {546 switch (builtin.os.tag) {
547 .freebsd => return freebsd.detectNativeCpuAndFeatures(),
546 .linux => return linux.detectNativeCpuAndFeatures(io),548 .linux => return linux.detectNativeCpuAndFeatures(io),
547 .macos => return darwin.macos.detectNativeCpuAndFeatures(),549 .macos => return darwin.macos.detectNativeCpuAndFeatures(),
548 .windows => return windows.detectNativeCpuAndFeatures(),550 .windows => return windows.detectNativeCpuAndFeatures(),
lib/std/zig/system/freebsd.zig created+34
...@@ -0,0 +1,34 @@
1const builtin = @import("builtin");
2const std = @import("std");
3
4const native_arch = builtin.target.cpu.arch;
5
6inline fn getAArch64CpuFeature(comptime feat_reg: []const u8) u64 {
7 return asm ("mrs %[ret], " ++ feat_reg
8 : [ret] "=r" (-> u64),
9 );
10}
11
12pub fn detectNativeCpuAndFeatures() ?std.Target.Cpu {
13 return switch (native_arch) {
14 .aarch64, .aarch64_be => b: {
15 const registers = [12]u64{
16 getAArch64CpuFeature("MIDR_EL1"),
17 getAArch64CpuFeature("ID_AA64PFR0_EL1"),
18 getAArch64CpuFeature("ID_AA64PFR1_EL1"),
19 getAArch64CpuFeature("ID_AA64DFR0_EL1"),
20 getAArch64CpuFeature("ID_AA64DFR1_EL1"),
21 getAArch64CpuFeature("ID_AA64AFR0_EL1"),
22 getAArch64CpuFeature("ID_AA64AFR1_EL1"),
23 getAArch64CpuFeature("ID_AA64ISAR0_EL1"),
24 getAArch64CpuFeature("ID_AA64ISAR1_EL1"),
25 getAArch64CpuFeature("ID_AA64MMFR0_EL1"),
26 getAArch64CpuFeature("ID_AA64MMFR1_EL1"),
27 getAArch64CpuFeature("ID_AA64MMFR2_EL1"),
28 };
29
30 break :b @import("arm.zig").aarch64.detectNativeCpuAndFeatures(native_arch, registers);
31 },
32 else => null,
33 };
34}