| ... | @@ -1724,7 +1724,13 @@ fn airUnaryMath(self: *Self, inst: Air.Inst.Index) !void { | ... | @@ -1724,7 +1724,13 @@ fn airUnaryMath(self: *Self, inst: Air.Inst.Index) !void { |
| 1724 | return self.finishAir(inst, result, .{ un_op, .none, .none }); | 1724 | return self.finishAir(inst, result, .{ un_op, .none, .none }); |
| 1725 | } | 1725 | } |
| 1726 | | 1726 | |
| 1727 | fn reuseOperand(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, op_index: Liveness.OperandInt, mcv: MCValue) bool { | 1727 | fn reuseOperand( |
| | 1728 | self: *Self, |
| | 1729 | inst: Air.Inst.Index, |
| | 1730 | operand: Air.Inst.Ref, |
| | 1731 | op_index: Liveness.OperandInt, |
| | 1732 | mcv: MCValue, |
| | 1733 | ) bool { |
| 1728 | if (!self.liveness.operandDies(inst, op_index)) | 1734 | if (!self.liveness.operandDies(inst, op_index)) |
| 1729 | return false; | 1735 | return false; |
| 1730 | | 1736 | |
| ... | @@ -2267,13 +2273,14 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: | ... | @@ -2267,13 +2273,14 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: |
| 2267 | // A potential opportunity for future optimization here would be keeping track | 2273 | // A potential opportunity for future optimization here would be keeping track |
| 2268 | // of the fact that the instruction is available both as an immediate | 2274 | // of the fact that the instruction is available both as an immediate |
| 2269 | // and as a register. | 2275 | // and as a register. |
| | 2276 | // TODO consolidate with limitImmediateType() function |
| 2270 | switch (src_mcv) { | 2277 | switch (src_mcv) { |
| 2271 | .immediate => |imm| { | 2278 | .immediate => |imm| { |
| 2272 | if (imm > math.maxInt(u31)) { | 2279 | if (imm > math.maxInt(u31)) { |
| 2273 | dst_mcv.freezeIfRegister(&self.register_manager); | 2280 | dst_mcv.freezeIfRegister(&self.register_manager); |
| 2274 | defer dst_mcv.unfreezeIfRegister(&self.register_manager); | 2281 | defer dst_mcv.unfreezeIfRegister(&self.register_manager); |
| 2275 | | 2282 | |
| 2276 | src_mcv = try self.copyToNewRegister(inst, Type.u64, src_mcv); | 2283 | src_mcv = MCValue{ .register = try self.copyToTmpRegister(Type.usize, src_mcv) }; |
| 2277 | } | 2284 | } |
| 2278 | }, | 2285 | }, |
| 2279 | else => {}, | 2286 | else => {}, |
| ... | @@ -2907,7 +2914,7 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void { | ... | @@ -2907,7 +2914,7 @@ fn airCmp(self: *Self, inst: Air.Inst.Index, op: math.CompareOperator) !void { |
| 2907 | // Either one, but not both, can be a memory operand. | 2914 | // Either one, but not both, can be a memory operand. |
| 2908 | // Source operand can be an immediate, 8 bits or 32 bits. | 2915 | // Source operand can be an immediate, 8 bits or 32 bits. |
| 2909 | const dst_mcv = if (lhs.isImmediate() or (lhs.isMemory() and rhs.isMemory())) | 2916 | const dst_mcv = if (lhs.isImmediate() or (lhs.isMemory() and rhs.isMemory())) |
| 2910 | try self.copyToNewRegister(inst, ty, lhs) | 2917 | MCValue{ .register = try self.copyToTmpRegister(ty, lhs) } |
| 2911 | else | 2918 | else |
| 2912 | lhs; | 2919 | lhs; |
| 2913 | // This instruction supports only signed 32-bit immediates at most. | 2920 | // This instruction supports only signed 32-bit immediates at most. |