authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-09-27 01:09:42+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-03 02:39:12+02:00
log85bf1e2b1fdc960e7e612307aecaac3a125fdfe6
tree6d1772f859f0712ff5936cd6b96efcab249e8a9b
parent8ee52f99ceab6a05b931eeb48825c00fd26ac486
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

llvm: Implement sub-architecture translation in targetTriple().

1 files changed, 74 insertions(+), 4 deletions(-)

src/codegen/llvm.zig+74-4
......@@ -37,10 +37,20 @@ const compilerRtIntAbbrev = target_util.compilerRtIntAbbrev;
3737
3838const Error = error{ OutOfMemory, CodegenFail };
3939
40fn subArchName(features: std.Target.Cpu.Feature.Set, arch: anytype, mappings: anytype) ?[]const u8 {
41 inline for (mappings) |mapping| {
42 if (arch.featureSetHas(features, mapping[0])) return mapping[1];
43 }
44
45 return null;
46}
47
4048pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
4149 var llvm_triple = std.ArrayList(u8).init(allocator);
4250 defer llvm_triple.deinit();
4351
52 const features = target.cpu.features;
53
4454 const llvm_arch = switch (target.cpu.arch) {
4555 .arm => "arm",
4656 .armeb => "armeb",
......@@ -55,10 +65,11 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
5565 .loongarch32 => "loongarch32",
5666 .loongarch64 => "loongarch64",
5767 .m68k => "m68k",
58 .mips => "mips",
59 .mipsel => "mipsel",
60 .mips64 => "mips64",
61 .mips64el => "mips64el",
68 // MIPS sub-architectures are a bit irregular, so we handle them manually here.
69 .mips => if (std.Target.mips.featureSetHas(features, .mips32r6)) "mipsisa32r6" else "mips",
70 .mipsel => if (std.Target.mips.featureSetHas(features, .mips32r6)) "mipsisa32r6el" else "mipsel",
71 .mips64 => if (std.Target.mips.featureSetHas(features, .mips64r6)) "mipsisa64r6" else "mips64",
72 .mips64el => if (std.Target.mips.featureSetHas(features, .mips64r6)) "mipsisa64r6el" else "mips64el",
6273 .msp430 => "msp430",
6374 .powerpc => "powerpc",
6475 .powerpcle => "powerpcle",
......@@ -90,8 +101,67 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
90101 .spu_2,
91102 => unreachable, // Gated by hasLlvmSupport().
92103 };
104
93105 try llvm_triple.appendSlice(llvm_arch);
94106
107 const llvm_sub_arch: ?[]const u8 = switch (target.cpu.arch) {
108 .arm, .armeb, .thumb, .thumbeb => subArchName(features, std.Target.arm, .{
109 .{ .v4t, "v4t" },
110 .{ .v5t, "v5t" },
111 .{ .v5te, "v5te" },
112 .{ .v5tej, "v5tej" },
113 .{ .v6, "v6" },
114 .{ .v6k, "v6k" },
115 .{ .v6kz, "v6kz" },
116 .{ .v6m, "v6m" },
117 .{ .v6t2, "v6t2" },
118 // v7k and v7s imply v7a so they have to be tested first.
119 .{ .v7k, "v7k" },
120 .{ .v7s, "v7s" },
121 .{ .v7a, "v7a" },
122 .{ .v7em, "v7em" },
123 .{ .v7m, "v7m" },
124 .{ .v7r, "v7r" },
125 .{ .v7ve, "v7ve" },
126 .{ .v8a, "v8a" },
127 .{ .v8_1a, "v8.1a" },
128 .{ .v8_2a, "v8.2a" },
129 .{ .v8_3a, "v8.3a" },
130 .{ .v8_4a, "v8.4a" },
131 .{ .v8_5a, "v8.5a" },
132 .{ .v8_6a, "v8.6a" },
133 .{ .v8_7a, "v8.7a" },
134 .{ .v8_8a, "v8.8a" },
135 .{ .v8_9a, "v8.9a" },
136 .{ .v8m, "v8m.base" },
137 .{ .v8m_main, "v8m.main" },
138 .{ .v8_1m_main, "v8.1m.main" },
139 .{ .v8r, "v8r" },
140 .{ .v9a, "v9a" },
141 .{ .v9_1a, "v9.1a" },
142 .{ .v9_2a, "v9.2a" },
143 .{ .v9_3a, "v9.3a" },
144 .{ .v9_4a, "v9.4a" },
145 .{ .v9_5a, "v9.5a" },
146 }),
147 .powerpc => subArchName(features, std.Target.powerpc, .{
148 .{ .spe, "spe" },
149 }),
150 .spirv => subArchName(features, std.Target.spirv, .{
151 .{ .v1_5, "1.5" },
152 }),
153 .spirv32, .spirv64 => subArchName(features, std.Target.spirv, .{
154 .{ .v1_5, "1.5" },
155 .{ .v1_4, "1.4" },
156 .{ .v1_3, "1.3" },
157 .{ .v1_2, "1.2" },
158 .{ .v1_1, "1.1" },
159 }),
160 else => null,
161 };
162
163 if (llvm_sub_arch) |sub| try llvm_triple.appendSlice(sub);
164
95165 // Unlike CPU backends, GPU backends actually care about the vendor tag.
96166 try llvm_triple.appendSlice(switch (target.cpu.arch) {
97167 .amdgcn => if (target.os.tag == .mesa3d) "-mesa-" else "-amd-",