authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-07 02:21:57+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-09-07 02:28:09+02:00
loga098e693f0498cf87e9eac488ae715915de2fb3d
treee92c7bd13cce318b765bc6b8602ddf9a6351afbd
parent603798d409a963ccdf5ab2273a6a02ef04d0952b
signature Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.zig.system.linux: some corrections to sparc CPU model list

1 files changed, 16 insertions(+), 7 deletions(-)

lib/std/zig/system/linux.zig+16-7
...@@ -13,23 +13,32 @@ const SparcCpuinfoImpl = struct {...@@ -13,23 +13,32 @@ const SparcCpuinfoImpl = struct {
13 model: ?*const Target.Cpu.Model = null,13 model: ?*const Target.Cpu.Model = null,
1414
15 const cpu_names = .{15 const cpu_names = .{
16 .{ "SuperSparc", &Target.sparc.cpu.supersparc },
17 .{ "HyperSparc", &Target.sparc.cpu.hypersparc },
18 .{ "SpitFire", &Target.sparc.cpu.ultrasparc },
19 .{ "BlackBird", &Target.sparc.cpu.ultrasparc },16 .{ "BlackBird", &Target.sparc.cpu.ultrasparc },
20 .{ "Sabre", &Target.sparc.cpu.ultrasparc },
21 .{ "Hummingbird", &Target.sparc.cpu.ultrasparc },
22 .{ "Cheetah", &Target.sparc.cpu.ultrasparc3 },17 .{ "Cheetah", &Target.sparc.cpu.ultrasparc3 },
23 .{ "Jalapeno", &Target.sparc.cpu.ultrasparc3 },18 .{ "Hummingbird", &Target.sparc.cpu.ultrasparc },
19 .{ "HyperSparc", &Target.sparc.cpu.hypersparc },
24 .{ "Jaguar", &Target.sparc.cpu.ultrasparc3 },20 .{ "Jaguar", &Target.sparc.cpu.ultrasparc3 },
21 .{ "Jalapeno", &Target.sparc.cpu.ultrasparc3 },
22 .{ "LEON", &Target.sparc.cpu.leon3 },
23 .{ "MB86904", &Target.sparc.cpu.v8 },
24 .{ "MB86907", &Target.sparc.cpu.v8 },
25 .{ "MicroSparc II", &Target.sparc.cpu.v8 },
26 .{ "MicroSparc", &Target.sparc.cpu.v8 },
25 .{ "Panther", &Target.sparc.cpu.ultrasparc3 },27 .{ "Panther", &Target.sparc.cpu.ultrasparc3 },
28 .{ "Sabre", &Target.sparc.cpu.ultrasparc },
26 .{ "Serrano", &Target.sparc.cpu.ultrasparc3 },29 .{ "Serrano", &Target.sparc.cpu.ultrasparc3 },
30 .{ "SPARC-M6", &Target.sparc.cpu.niagara4 },
31 .{ "SPARC-M7", &Target.sparc.cpu.niagara4 },
32 .{ "SPARC-M8", &Target.sparc.cpu.niagara4 },
33 .{ "SPARC-SN", &Target.sparc.cpu.niagara4 },
34 .{ "SPARC64-X", &Target.sparc.cpu.ultrasparc3 },
35 .{ "SpitFire", &Target.sparc.cpu.ultrasparc },
36 .{ "SuperSparc", &Target.sparc.cpu.supersparc },
27 .{ "UltraSparc T1", &Target.sparc.cpu.niagara },37 .{ "UltraSparc T1", &Target.sparc.cpu.niagara },
28 .{ "UltraSparc T2", &Target.sparc.cpu.niagara2 },38 .{ "UltraSparc T2", &Target.sparc.cpu.niagara2 },
29 .{ "UltraSparc T3", &Target.sparc.cpu.niagara3 },39 .{ "UltraSparc T3", &Target.sparc.cpu.niagara3 },
30 .{ "UltraSparc T4", &Target.sparc.cpu.niagara4 },40 .{ "UltraSparc T4", &Target.sparc.cpu.niagara4 },
31 .{ "UltraSparc T5", &Target.sparc.cpu.niagara4 },41 .{ "UltraSparc T5", &Target.sparc.cpu.niagara4 },
32 .{ "LEON", &Target.sparc.cpu.leon3 },
33 };42 };
3443
35 fn line_hook(self: *SparcCpuinfoImpl, key: []const u8, value: []const u8) !bool {44 fn line_hook(self: *SparcCpuinfoImpl, key: []const u8, value: []const u8) !bool {