authorgravatar for thatlemon@gmail.comLemonBoy <thatlemon@gmail.com> 2020-12-09 16:48:02+01:00
committergravatar for thatlemon@gmail.comLemonBoy <thatlemon@gmail.com> 2020-12-09 16:48:02+01:00
logafd491c07e7b69b0bdeaa2304c71e87b66a8a64a
tree21867f5291a7286f4308607ed4fae507253d0d19
parent518168edb2378039ba5c058c6e71ea4bc12d704b

compiler-rt: Fix compilation of clzsi for armv6 targets

1 files changed, 9 insertions(+), 13 deletions(-)

lib/std/special/compiler_rt/clzsi2.zig+9-13
...@@ -3,7 +3,8 @@...@@ -3,7 +3,8 @@
3// This file is part of [zig](https://ziglang.org/), which is MIT licensed.3// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
4// The MIT license requires this copyright notice to be included in all copies4// The MIT license requires this copyright notice to be included in all copies
5// and substantial portions of the software.5// and substantial portions of the software.
6const builtin = @import("builtin");6const std = @import("std");
7const builtin = std.builtin;
78
8fn __clzsi2_generic(a: i32) callconv(.C) i32 {9fn __clzsi2_generic(a: i32) callconv(.C) i32 {
9 @setRuntimeSafety(builtin.is_test);10 @setRuntimeSafety(builtin.is_test);
...@@ -25,8 +26,6 @@ fn __clzsi2_generic(a: i32) callconv(.C) i32 {...@@ -25,8 +26,6 @@ fn __clzsi2_generic(a: i32) callconv(.C) i32 {
25}26}
2627
27fn __clzsi2_thumb1() callconv(.Naked) void {28fn __clzsi2_thumb1() callconv(.Naked) void {
28 @setRuntimeSafety(builtin.is_test);
29
30 // Similar to the generic version with the last two rounds replaced by a LUT29 // Similar to the generic version with the last two rounds replaced by a LUT
31 asm volatile (30 asm volatile (
32 \\ movs r1, #3231 \\ movs r1, #32
...@@ -59,8 +58,6 @@ fn __clzsi2_thumb1() callconv(.Naked) void {...@@ -59,8 +58,6 @@ fn __clzsi2_thumb1() callconv(.Naked) void {
59}58}
6059
61fn __clzsi2_arm32() callconv(.Naked) void {60fn __clzsi2_arm32() callconv(.Naked) void {
62 @setRuntimeSafety(builtin.is_test);
63
64 asm volatile (61 asm volatile (
65 \\ // Assumption: n != 062 \\ // Assumption: n != 0
66 \\ // r0: n63 \\ // r0: n
...@@ -107,14 +104,13 @@ fn __clzsi2_arm32() callconv(.Naked) void {...@@ -107,14 +104,13 @@ fn __clzsi2_arm32() callconv(.Naked) void {
107 unreachable;104 unreachable;
108}105}
109106
110pub const __clzsi2 = blk: {107pub const __clzsi2 = switch (std.Target.current.cpu.arch) {
111 if (builtin.arch.isARM()) {108 .arm, .armeb => if (std.Target.arm.featureSetHas(std.Target.current.cpu.features, .noarm))
112 break :blk __clzsi2_arm32;109 __clzsi2_thumb1
113 } else if (builtin.arch.isThumb()) {110 else
114 break :blk __clzsi2_thumb1;111 __clzsi2_arm32,
115 } else {112 .thumb, .thumbeb => __clzsi2_thumb1,
116 break :blk __clzsi2_generic;113 else => __clzsi2_generic,
117 }
118};114};
119115
120test "test clzsi2" {116test "test clzsi2" {