| ... | ... | @@ -3,7 +3,8 @@ |
| 3 | 3 | // This file is part of [zig](https://ziglang.org/), which is MIT licensed. |
| 4 | 4 | // The MIT license requires this copyright notice to be included in all copies |
| 5 | 5 | // and substantial portions of the software. |
| 6 | | const builtin = @import("builtin"); |
| 6 | const std = @import("std"); |
| 7 | const builtin = std.builtin; |
| 7 | 8 | |
| 8 | 9 | fn __clzsi2_generic(a: i32) callconv(.C) i32 { |
| 9 | 10 | @setRuntimeSafety(builtin.is_test); |
| ... | ... | @@ -25,8 +26,6 @@ fn __clzsi2_generic(a: i32) callconv(.C) i32 { |
| 25 | 26 | } |
| 26 | 27 | |
| 27 | 28 | fn __clzsi2_thumb1() callconv(.Naked) void { |
| 28 | | @setRuntimeSafety(builtin.is_test); |
| 29 | | |
| 30 | 29 | // Similar to the generic version with the last two rounds replaced by a LUT |
| 31 | 30 | asm volatile ( |
| 32 | 31 | \\ movs r1, #32 |
| ... | ... | @@ -59,8 +58,6 @@ fn __clzsi2_thumb1() callconv(.Naked) void { |
| 59 | 58 | } |
| 60 | 59 | |
| 61 | 60 | fn __clzsi2_arm32() callconv(.Naked) void { |
| 62 | | @setRuntimeSafety(builtin.is_test); |
| 63 | | |
| 64 | 61 | asm volatile ( |
| 65 | 62 | \\ // Assumption: n != 0 |
| 66 | 63 | \\ // r0: n |
| ... | ... | @@ -107,14 +104,13 @@ fn __clzsi2_arm32() callconv(.Naked) void { |
| 107 | 104 | unreachable; |
| 108 | 105 | } |
| 109 | 106 | |
| 110 | | pub const __clzsi2 = blk: { |
| 111 | | if (builtin.arch.isARM()) { |
| 112 | | break :blk __clzsi2_arm32; |
| 113 | | } else if (builtin.arch.isThumb()) { |
| 114 | | break :blk __clzsi2_thumb1; |
| 115 | | } else { |
| 116 | | break :blk __clzsi2_generic; |
| 117 | | } |
| 107 | pub const __clzsi2 = switch (std.Target.current.cpu.arch) { |
| 108 | .arm, .armeb => if (std.Target.arm.featureSetHas(std.Target.current.cpu.features, .noarm)) |
| 109 | __clzsi2_thumb1 |
| 110 | else |
| 111 | __clzsi2_arm32, |
| 112 | .thumb, .thumbeb => __clzsi2_thumb1, |
| 113 | else => __clzsi2_generic, |
| 118 | 114 | }; |
| 119 | 115 | |
| 120 | 116 | test "test clzsi2" { |