authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-08-07 01:08:44-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-08-07 01:08:44-07:00
logb071b10ce83609199577ff077fb117ed62c98fe7
treee7ab9b6278e96a518e9a668783715d7d23b204b5
parent8268d7be52fdcff9dde3020f65aeb48b76f4397e
parent7d88bd0b9c4ca12235769a04c45842dab3b54827
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20894 from alexrp/target-cleanup-4

`std.Target`: Minor rework to some `isArch()` functions, fix some related issues throughout `std`

12 files changed, 94 insertions(+), 98 deletions(-)

lib/compiler/aro/aro/Toolchain.zig+1-1
...@@ -89,7 +89,7 @@ pub fn discover(tc: *Toolchain) !void {...@@ -89,7 +89,7 @@ pub fn discover(tc: *Toolchain) !void {
89 .{ .unknown = {} } // TODO89 .{ .unknown = {} } // TODO
90 else if (target.cpu.arch.isMIPS())90 else if (target.cpu.arch.isMIPS())
91 .{ .unknown = {} } // TODO91 .{ .unknown = {} } // TODO
92 else if (target.cpu.arch.isPPC())92 else if (target.cpu.arch.isPowerPC())
93 .{ .unknown = {} } // TODO93 .{ .unknown = {} } // TODO
94 else if (target.cpu.arch == .ve)94 else if (target.cpu.arch == .ve)
95 .{ .unknown = {} } // TODO95 .{ .unknown = {} } // TODO
lib/compiler/aro/aro/target.zig+1-1
...@@ -264,7 +264,7 @@ pub fn systemCompiler(target: std.Target) LangOpts.Compiler {...@@ -264,7 +264,7 @@ pub fn systemCompiler(target: std.Target) LangOpts.Compiler {
264pub fn hasFloat128(target: std.Target) bool {264pub fn hasFloat128(target: std.Target) bool {
265 if (target.cpu.arch.isWasm()) return true;265 if (target.cpu.arch.isWasm()) return true;
266 if (target.isDarwin()) return false;266 if (target.isDarwin()) return false;
267 if (target.cpu.arch.isPPC() or target.cpu.arch.isPPC64()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);267 if (target.cpu.arch.isPowerPC()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
268 return switch (target.os.tag) {268 return switch (target.os.tag) {
269 .dragonfly,269 .dragonfly,
270 .haiku,270 .haiku,
lib/compiler_rt/common.zig+1-1
...@@ -22,7 +22,7 @@ pub const want_aeabi = switch (builtin.abi) {...@@ -22,7 +22,7 @@ pub const want_aeabi = switch (builtin.abi) {
22 },22 },
23 else => false,23 else => false,
24};24};
25pub const want_ppc_abi = builtin.cpu.arch.isPPC() or builtin.cpu.arch.isPPC64();25pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();
2626
27pub const want_float_exceptions = !builtin.cpu.arch.isWasm();27pub const want_float_exceptions = !builtin.cpu.arch.isWasm();
2828
lib/std/Target.zig+25-3
...@@ -1084,6 +1084,13 @@ pub const Cpu = struct {...@@ -1084,6 +1084,13 @@ pub const Cpu = struct {
1084 };1084 };
1085 }1085 }
10861086
1087 pub inline fn isLoongArch(arch: Arch) bool {
1088 return switch (arch) {
1089 .loongarch32, .loongarch64 => true,
1090 else => false,
1091 };
1092 }
1093
1087 pub inline fn isRISCV(arch: Arch) bool {1094 pub inline fn isRISCV(arch: Arch) bool {
1088 return switch (arch) {1095 return switch (arch) {
1089 .riscv32, .riscv64 => true,1096 .riscv32, .riscv64 => true,
...@@ -1092,20 +1099,35 @@ pub const Cpu = struct {...@@ -1092,20 +1099,35 @@ pub const Cpu = struct {
1092 }1099 }
10931100
1094 pub inline fn isMIPS(arch: Arch) bool {1101 pub inline fn isMIPS(arch: Arch) bool {
1102 return arch.isMIPS32() or arch.isMIPS64();
1103 }
1104
1105 pub inline fn isMIPS32(arch: Arch) bool {
1095 return switch (arch) {1106 return switch (arch) {
1096 .mips, .mipsel, .mips64, .mips64el => true,1107 .mips, .mipsel => true,
1097 else => false,1108 else => false,
1098 };1109 };
1099 }1110 }
11001111
1101 pub inline fn isPPC(arch: Arch) bool {1112 pub inline fn isMIPS64(arch: Arch) bool {
1113 return switch (arch) {
1114 .mips64, .mips64el => true,
1115 else => false,
1116 };
1117 }
1118
1119 pub inline fn isPowerPC(arch: Arch) bool {
1120 return arch.isPowerPC32() or arch.isPowerPC64();
1121 }
1122
1123 pub inline fn isPowerPC32(arch: Arch) bool {
1102 return switch (arch) {1124 return switch (arch) {
1103 .powerpc, .powerpcle => true,1125 .powerpc, .powerpcle => true,
1104 else => false,1126 else => false,
1105 };1127 };
1106 }1128 }
11071129
1108 pub inline fn isPPC64(arch: Arch) bool {1130 pub inline fn isPowerPC64(arch: Arch) bool {
1109 return switch (arch) {1131 return switch (arch) {
1110 .powerpc64, .powerpc64le => true,1132 .powerpc64, .powerpc64le => true,
1111 else => false,1133 else => false,
lib/std/os/linux.zig+8-10
...@@ -16,8 +16,7 @@ const native_arch = builtin.cpu.arch;...@@ -16,8 +16,7 @@ const native_arch = builtin.cpu.arch;
16const native_abi = builtin.abi;16const native_abi = builtin.abi;
17const native_endian = native_arch.endian();17const native_endian = native_arch.endian();
18const is_mips = native_arch.isMIPS();18const is_mips = native_arch.isMIPS();
19const is_ppc = native_arch.isPPC();19const is_ppc = native_arch.isPowerPC();
20const is_ppc64 = native_arch.isPPC64();
21const is_sparc = native_arch.isSPARC();20const is_sparc = native_arch.isSPARC();
22const iovec = std.posix.iovec;21const iovec = std.posix.iovec;
23const iovec_const = std.posix.iovec_const;22const iovec_const = std.posix.iovec_const;
...@@ -434,10 +433,9 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {...@@ -434,10 +433,9 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {
434// Some architectures (and some syscalls) require 64bit parameters to be passed433// Some architectures (and some syscalls) require 64bit parameters to be passed
435// in a even-aligned register pair.434// in a even-aligned register pair.
436const require_aligned_register_pair =435const require_aligned_register_pair =
437 builtin.cpu.arch.isPPC() or436 builtin.cpu.arch.isPowerPC32() or
438 builtin.cpu.arch.isMIPS() or437 builtin.cpu.arch.isMIPS32() or
439 builtin.cpu.arch.isARM() or438 builtin.cpu.arch.isArmOrThumb();
440 builtin.cpu.arch.isThumb();
441439
442// Split a 64bit value into a {LSB,MSB} pair.440// Split a 64bit value into a {LSB,MSB} pair.
443// The LE/BE variants specify the endianness to assume.441// The LE/BE variants specify the endianness to assume.
...@@ -2228,7 +2226,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const...@@ -2228,7 +2226,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
2228}2226}
22292227
2230pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {2228pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
2231 if (comptime native_arch.isARM() or native_arch.isPPC()) {2229 if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) {
2232 // These architectures reorder the arguments so that a register is not skipped to align the2230 // These architectures reorder the arguments so that a register is not skipped to align the
2233 // register number that `offset` is passed in.2231 // register number that `offset` is passed in.
22342232
...@@ -3575,7 +3573,7 @@ pub const SO = if (is_mips) struct {...@@ -3575,7 +3573,7 @@ pub const SO = if (is_mips) struct {
3575 pub const RCVTIMEO_NEW = 66;3573 pub const RCVTIMEO_NEW = 66;
3576 pub const SNDTIMEO_NEW = 67;3574 pub const SNDTIMEO_NEW = 67;
3577 pub const DETACH_REUSEPORT_BPF = 68;3575 pub const DETACH_REUSEPORT_BPF = 68;
3578} else if (is_ppc or is_ppc64) struct {3576} else if (is_ppc) struct {
3579 pub const DEBUG = 1;3577 pub const DEBUG = 1;
3580 pub const REUSEADDR = 2;3578 pub const REUSEADDR = 2;
3581 pub const TYPE = 3;3579 pub const TYPE = 3;
...@@ -4023,8 +4021,8 @@ pub const T = struct {...@@ -4023,8 +4021,8 @@ pub const T = struct {
4023 pub const IOCSPGRP = if (is_mips) 0x741d else 0x5410;4021 pub const IOCSPGRP = if (is_mips) 0x741d else 0x5410;
4024 pub const IOCOUTQ = if (is_mips) 0x7472 else 0x5411;4022 pub const IOCOUTQ = if (is_mips) 0x7472 else 0x5411;
4025 pub const IOCSTI = if (is_mips) 0x5472 else 0x5412;4023 pub const IOCSTI = if (is_mips) 0x5472 else 0x5412;
4026 pub const IOCGWINSZ = if (is_mips or is_ppc64) 0x40087468 else 0x5413;4024 pub const IOCGWINSZ = if (is_mips or is_ppc) 0x40087468 else 0x5413;
4027 pub const IOCSWINSZ = if (is_mips or is_ppc64) 0x80087467 else 0x5414;4025 pub const IOCSWINSZ = if (is_mips or is_ppc) 0x80087467 else 0x5414;
4028 pub const IOCMGET = if (is_mips) 0x741d else 0x5415;4026 pub const IOCMGET = if (is_mips) 0x741d else 0x5415;
4029 pub const IOCMBIS = if (is_mips) 0x741b else 0x5416;4027 pub const IOCMBIS = if (is_mips) 0x741b else 0x5416;
4030 pub const IOCMBIC = if (is_mips) 0x741c else 0x5417;4028 pub const IOCMBIC = if (is_mips) 0x741c else 0x5417;
lib/std/simd.zig+2-2
...@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)...@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
18 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;18 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
19 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;19 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
20 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;20 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
21 } else if (cpu.arch.isARM()) {21 } else if (cpu.arch.isArmOrThumb()) {
22 if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;22 if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;
23 } else if (cpu.arch.isAARCH64()) {23 } else if (cpu.arch.isAARCH64()) {
24 // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit24 // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit
...@@ -26,7 +26,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)...@@ -26,7 +26,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
26 // TODO: Check on this return when bigger values are more common26 // TODO: Check on this return when bigger values are more common
27 if (std.Target.aarch64.featureSetHas(cpu.features, .sve)) break :blk 128;27 if (std.Target.aarch64.featureSetHas(cpu.features, .sve)) break :blk 128;
28 if (std.Target.aarch64.featureSetHas(cpu.features, .neon)) break :blk 128;28 if (std.Target.aarch64.featureSetHas(cpu.features, .neon)) break :blk 128;
29 } else if (cpu.arch.isPPC() or cpu.arch.isPPC64()) {29 } else if (cpu.arch.isPowerPC()) {
30 if (std.Target.powerpc.featureSetHas(cpu.features, .altivec)) break :blk 128;30 if (std.Target.powerpc.featureSetHas(cpu.features, .altivec)) break :blk 128;
31 } else if (cpu.arch.isMIPS()) {31 } else if (cpu.arch.isMIPS()) {
32 if (std.Target.mips.featureSetHas(cpu.features, .msa)) break :blk 128;32 if (std.Target.mips.featureSetHas(cpu.features, .msa)) break :blk 128;
lib/std/start.zig+1-1
...@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {...@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {
495 // ARMv6 targets (and earlier) have no support for TLS in hardware.495 // ARMv6 targets (and earlier) have no support for TLS in hardware.
496 // FIXME: Elide the check for targets >= ARMv7 when the target feature API496 // FIXME: Elide the check for targets >= ARMv7 when the target feature API
497 // becomes less verbose (and more usable).497 // becomes less verbose (and more usable).
498 if (comptime native_arch.isARM()) {498 if (comptime native_arch.isArmOrThumb()) {
499 if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {499 if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {
500 // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls500 // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls
501 // For the time being use a simple trap instead of a @panic call to501 // For the time being use a simple trap instead of a @panic call to
src/codegen/llvm.zig+2-2
...@@ -399,7 +399,7 @@ const DataLayoutBuilder = struct {...@@ -399,7 +399,7 @@ const DataLayoutBuilder = struct {
399 else if (self.target.cpu.arch == .powerpc64 and399 else if (self.target.cpu.arch == .powerpc64 and
400 self.target.os.tag != .freebsd and self.target.abi != .musl)400 self.target.os.tag != .freebsd and self.target.abi != .musl)
401 try writer.writeAll("-Fi64")401 try writer.writeAll("-Fi64")
402 else if (self.target.cpu.arch.isPPC() or self.target.cpu.arch.isPPC64())402 else if (self.target.cpu.arch.isPowerPC())
403 try writer.writeAll("-Fn32");403 try writer.writeAll("-Fn32");
404 if (self.target.cpu.arch != .hexagon) {404 if (self.target.cpu.arch != .hexagon) {
405 if (self.target.cpu.arch == .arc or self.target.cpu.arch == .s390x)405 if (self.target.cpu.arch == .arc or self.target.cpu.arch == .s390x)
...@@ -659,7 +659,7 @@ const DataLayoutBuilder = struct {...@@ -659,7 +659,7 @@ const DataLayoutBuilder = struct {
659 128 => abi = 64,659 128 => abi = 64,
660 else => {},660 else => {},
661 }661 }
662 } else if ((self.target.cpu.arch.isPPC64() and self.target.os.tag == .linux and662 } else if ((self.target.cpu.arch.isPowerPC64() and self.target.os.tag == .linux and
663 (size == 256 or size == 512)) or663 (size == 256 or size == 512)) or
664 (self.target.cpu.arch.isNvptx() and (size == 16 or size == 32)))664 (self.target.cpu.arch.isNvptx() and (size == 16 or size == 32)))
665 {665 {
src/glibc.zig+9-9
...@@ -392,9 +392,9 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile, prog_node: std.Progre...@@ -392,9 +392,9 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile, prog_node: std.Progre
392392
393fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![]const u8 {393fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![]const u8 {
394 const arch = comp.getTarget().cpu.arch;394 const arch = comp.getTarget().cpu.arch;
395 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;395 const is_ppc = arch.isPowerPC();
396 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;396 const is_aarch64 = arch.isAARCH64();
397 const is_sparc = arch == .sparc or arch == .sparc64;397 const is_sparc = arch.isSPARC();
398 const is_64 = comp.getTarget().ptrBitWidth() == 64;398 const is_64 = comp.getTarget().ptrBitWidth() == 64;
399399
400 const s = path.sep_str;400 const s = path.sep_str;
...@@ -412,7 +412,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![...@@ -412,7 +412,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
412 try result.appendSlice("sparc" ++ s ++ "sparc32");412 try result.appendSlice("sparc" ++ s ++ "sparc32");
413 }413 }
414 }414 }
415 } else if (arch.isARM()) {415 } else if (arch.isArmOrThumb()) {
416 try result.appendSlice("arm");416 try result.appendSlice("arm");
417 } else if (arch.isMIPS()) {417 } else if (arch.isMIPS()) {
418 if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {418 if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {
...@@ -529,10 +529,10 @@ fn add_include_dirs_arch(...@@ -529,10 +529,10 @@ fn add_include_dirs_arch(
529 dir: []const u8,529 dir: []const u8,
530) error{OutOfMemory}!void {530) error{OutOfMemory}!void {
531 const arch = target.cpu.arch;531 const arch = target.cpu.arch;
532 const is_x86 = arch == .x86 or arch == .x86_64;532 const is_x86 = arch.isX86();
533 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;533 const is_aarch64 = arch.isAARCH64();
534 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;534 const is_ppc = arch.isPowerPC();
535 const is_sparc = arch == .sparc or arch == .sparc64;535 const is_sparc = arch.isSPARC();
536 const is_64 = target.ptrBitWidth() == 64;536 const is_64 = target.ptrBitWidth() == 64;
537537
538 const s = path.sep_str;538 const s = path.sep_str;
...@@ -562,7 +562,7 @@ fn add_include_dirs_arch(...@@ -562,7 +562,7 @@ fn add_include_dirs_arch(
562 try args.append("-I");562 try args.append("-I");
563 try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));563 try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));
564 }564 }
565 } else if (arch.isARM()) {565 } else if (arch.isArmOrThumb()) {
566 if (opt_nptl) |nptl| {566 if (opt_nptl) |nptl| {
567 try args.append("-I");567 try args.append("-I");
568 try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));568 try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));
src/libunwind.zig+1-1
...@@ -131,7 +131,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr...@@ -131,7 +131,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
131 if (!comp.config.any_non_single_threaded) {131 if (!comp.config.any_non_single_threaded) {
132 try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");132 try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
133 }133 }
134 if (target.cpu.arch.isARM() and target.abi.floatAbi() == .hard) {134 if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) {
135 try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");135 try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
136 }136 }
137 try cflags.append("-Wno-bitwise-conditional-parentheses");137 try cflags.append("-Wno-bitwise-conditional-parentheses");
test/behavior/union.zig+1-1
...@@ -1903,7 +1903,7 @@ test "reinterpret packed union" {...@@ -1903,7 +1903,7 @@ test "reinterpret packed union" {
1903 try comptime S.doTheTest();1903 try comptime S.doTheTest();
19041904
1905 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO1905 if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
1906 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest; // TODO1906 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest; // TODO
1907 if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; // TODO1907 if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; // TODO
1908 try S.doTheTest();1908 try S.doTheTest();
1909}1909}
test/c_abi/main.zig+42-66
...@@ -11,7 +11,7 @@ const print = std.debug.print;...@@ -11,7 +11,7 @@ const print = std.debug.print;
11const expect = std.testing.expect;11const expect = std.testing.expect;
12const expectEqual = std.testing.expectEqual;12const expectEqual = std.testing.expectEqual;
13const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and13const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and
14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPPC();14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();
1515
16const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();16const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();
17const have_f80 = builtin.cpu.arch.isX86();17const have_f80 = builtin.cpu.arch.isX86();
...@@ -123,8 +123,7 @@ test "C ABI floats" {...@@ -123,8 +123,7 @@ test "C ABI floats" {
123}123}
124124
125test "C ABI long double" {125test "C ABI long double" {
126 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;126 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
127 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
128127
129 c_long_double(12.34);128 c_long_double(12.34);
130}129}
...@@ -182,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;...@@ -182,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
182extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;181extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
183182
184const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and183const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
185 !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC() and !builtin.cpu.arch.isRISCV();184 !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
186185
187test "C ABI complex float" {186test "C ABI complex float" {
188 if (!complex_abi_compatible) return error.SkipZigTest;187 if (!complex_abi_compatible) return error.SkipZigTest;
...@@ -324,7 +323,7 @@ extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, us...@@ -324,7 +323,7 @@ extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, us
324323
325test "C ABI struct u64 u64" {324test "C ABI struct u64 u64" {
326 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;325 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
327 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;326 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
328327
329 const s = c_ret_struct_u64_u64();328 const s = c_ret_struct_u64_u64();
330 try expect(s.a == 21);329 try expect(s.a == 21);
...@@ -361,7 +360,7 @@ extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;...@@ -361,7 +360,7 @@ extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
361360
362test "C ABI struct {f32,f32} f32" {361test "C ABI struct {f32,f32} f32" {
363 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;362 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
364 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;363 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
365364
366 const s = c_ret_struct_f32f32_f32();365 const s = c_ret_struct_f32f32_f32();
367 try expect(s.a.b == 1.0);366 try expect(s.a.b == 1.0);
...@@ -391,7 +390,7 @@ extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;...@@ -391,7 +390,7 @@ extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
391390
392test "C ABI struct f32 {f32,f32}" {391test "C ABI struct f32 {f32,f32}" {
393 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;392 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
394 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;393 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
395394
396 const s = c_ret_struct_f32_f32f32();395 const s = c_ret_struct_f32_f32f32();
397 try expect(s.a == 1.0);396 try expect(s.a == 1.0);
...@@ -426,8 +425,7 @@ extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;...@@ -426,8 +425,7 @@ extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
426425
427test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {426test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {
428 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;427 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
429 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;428 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
430 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
431429
432 const s = c_ret_struct_u32_union_u32_u32u32();430 const s = c_ret_struct_u32_union_u32_u32u32();
433 try expect(s.a == 1);431 try expect(s.a == 1);
...@@ -447,7 +445,7 @@ extern fn c_big_struct(BigStruct) void;...@@ -447,7 +445,7 @@ extern fn c_big_struct(BigStruct) void;
447445
448test "C ABI big struct" {446test "C ABI big struct" {
449 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;447 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
450 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;448 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
451449
452 const s = BigStruct{450 const s = BigStruct{
453 .a = 1,451 .a = 1,
...@@ -473,7 +471,7 @@ const BigUnion = extern union {...@@ -473,7 +471,7 @@ const BigUnion = extern union {
473extern fn c_big_union(BigUnion) void;471extern fn c_big_union(BigUnion) void;
474472
475test "C ABI big union" {473test "C ABI big union" {
476 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;474 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
477475
478 const x = BigUnion{476 const x = BigUnion{
479 .a = BigStruct{477 .a = BigStruct{
...@@ -506,8 +504,7 @@ extern fn c_ret_med_struct_mixed() MedStructMixed;...@@ -506,8 +504,7 @@ extern fn c_ret_med_struct_mixed() MedStructMixed;
506504
507test "C ABI medium struct of ints and floats" {505test "C ABI medium struct of ints and floats" {
508 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;506 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
509 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;507 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
510 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
511508
512 const s = MedStructMixed{509 const s = MedStructMixed{
513 .a = 1234,510 .a = 1234,
...@@ -539,8 +536,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;...@@ -539,8 +536,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;
539test "C ABI small struct of ints" {536test "C ABI small struct of ints" {
540 if (builtin.cpu.arch == .x86) return error.SkipZigTest;537 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
541 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;538 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
542 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;539 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
543 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
544540
545 const s = SmallStructInts{541 const s = SmallStructInts{
546 .a = 1,542 .a = 1,
...@@ -573,8 +569,7 @@ extern fn c_ret_med_struct_ints() MedStructInts;...@@ -573,8 +569,7 @@ extern fn c_ret_med_struct_ints() MedStructInts;
573569
574test "C ABI medium struct of ints" {570test "C ABI medium struct of ints" {
575 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;571 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
576 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;572 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
577 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
578573
579 const s = MedStructInts{574 const s = MedStructInts{
580 .x = 1,575 .x = 1,
...@@ -652,8 +647,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;...@@ -652,8 +647,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;
652test "C ABI split struct of ints" {647test "C ABI split struct of ints" {
653 if (builtin.cpu.arch == .x86) return error.SkipZigTest;648 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
654 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;649 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
655 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;650 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
656 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
657651
658 const s = SplitStructInt{652 const s = SplitStructInt{
659 .a = 1234,653 .a = 1234,
...@@ -680,8 +674,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;...@@ -680,8 +674,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;
680test "C ABI split struct of ints and floats" {674test "C ABI split struct of ints and floats" {
681 if (builtin.cpu.arch == .x86) return error.SkipZigTest;675 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
682 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;676 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
683 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;677 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
684 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
685678
686 const s = SplitStructMixed{679 const s = SplitStructMixed{
687 .a = 1234,680 .a = 1234,
...@@ -708,7 +701,7 @@ extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;...@@ -708,7 +701,7 @@ extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;
708701
709test "C ABI sret and byval together" {702test "C ABI sret and byval together" {
710 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;703 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
711 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;704 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
712705
713 const s = BigStruct{706 const s = BigStruct{
714 .a = 1,707 .a = 1,
...@@ -760,8 +753,7 @@ extern fn c_big_struct_floats(Vector5) void;...@@ -760,8 +753,7 @@ extern fn c_big_struct_floats(Vector5) void;
760753
761test "C ABI structs of floats as parameter" {754test "C ABI structs of floats as parameter" {
762 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;755 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
763 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;756 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
764 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
765757
766 const v3 = Vector3{758 const v3 = Vector3{
767 .x = 3.0,759 .x = 3.0,
...@@ -800,8 +792,7 @@ export fn zig_multiple_struct_ints(x: Rect, y: Rect) void {...@@ -800,8 +792,7 @@ export fn zig_multiple_struct_ints(x: Rect, y: Rect) void {
800}792}
801793
802test "C ABI structs of ints as multiple parameters" {794test "C ABI structs of ints as multiple parameters" {
803 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;795 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
804 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
805796
806 const r1 = Rect{797 const r1 = Rect{
807 .left = 1,798 .left = 1,
...@@ -838,7 +829,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {...@@ -838,7 +829,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {
838829
839test "C ABI structs of floats as multiple parameters" {830test "C ABI structs of floats as multiple parameters" {
840 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;831 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
841 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;832 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
842833
843 const r1 = FloatRect{834 const r1 = FloatRect{
844 .left = 1,835 .left = 1,
...@@ -951,8 +942,7 @@ extern fn c_ret_struct_with_array() StructWithArray;...@@ -951,8 +942,7 @@ extern fn c_ret_struct_with_array() StructWithArray;
951test "Struct with array as padding." {942test "Struct with array as padding." {
952 if (builtin.cpu.arch == .x86) return error.SkipZigTest;943 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
953 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;944 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
954 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;945 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
955 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
956946
957 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });947 c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
958948
...@@ -977,7 +967,7 @@ extern fn c_ret_float_array_struct() FloatArrayStruct;...@@ -977,7 +967,7 @@ extern fn c_ret_float_array_struct() FloatArrayStruct;
977967
978test "Float array like struct" {968test "Float array like struct" {
979 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;969 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
980 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;970 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
981971
982 c_float_array_struct(.{972 c_float_array_struct(.{
983 .origin = .{973 .origin = .{
...@@ -1004,7 +994,7 @@ extern fn c_ret_small_vec() SmallVec;...@@ -1004,7 +994,7 @@ extern fn c_ret_small_vec() SmallVec;
1004994
1005test "small simd vector" {995test "small simd vector" {
1006 if (builtin.cpu.arch == .x86) return error.SkipZigTest;996 if (builtin.cpu.arch == .x86) return error.SkipZigTest;
1007 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;997 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1008998
1009 c_small_vec(.{ 1, 2 });999 c_small_vec(.{ 1, 2 });
10101000
...@@ -1022,7 +1012,7 @@ test "medium simd vector" {...@@ -1022,7 +1012,7 @@ test "medium simd vector" {
1022 if (builtin.zig_backend == .stage2_x86_64 and1012 if (builtin.zig_backend == .stage2_x86_64 and
1023 !comptime std.Target.x86.featureSetHas(builtin.cpu.features, .avx)) return error.SkipZigTest;1013 !comptime std.Target.x86.featureSetHas(builtin.cpu.features, .avx)) return error.SkipZigTest;
10241014
1025 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;1015 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
10261016
1027 c_medium_vec(.{ 1, 2, 3, 4 });1017 c_medium_vec(.{ 1, 2, 3, 4 });
10281018
...@@ -1042,7 +1032,7 @@ test "big simd vector" {...@@ -1042,7 +1032,7 @@ test "big simd vector" {
1042 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;1032 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
10431033
1044 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;1034 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
1045 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;1035 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
1046 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;1036 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;
10471037
1048 c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });1038 c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });
...@@ -5352,7 +5342,7 @@ extern fn c_ret_ptr_size_float_struct() Vector2;...@@ -5352,7 +5342,7 @@ extern fn c_ret_ptr_size_float_struct() Vector2;
5352test "C ABI pointer sized float struct" {5342test "C ABI pointer sized float struct" {
5353 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5343 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5354 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5344 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5355 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5345 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
53565346
5357 c_ptr_size_float_struct(.{ .x = 1, .y = 2 });5347 c_ptr_size_float_struct(.{ .x = 1, .y = 2 });
53585348
...@@ -5374,29 +5364,25 @@ const DC = extern struct { v1: f64, v2: u8 };...@@ -5374,29 +5364,25 @@ const DC = extern struct { v1: f64, v2: u8 };
5374test "DC: Zig passes to C" {5364test "DC: Zig passes to C" {
5375 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5365 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5376 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5366 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5377 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5367 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5378 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5379 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));5368 try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));
5380}5369}
5381test "DC: Zig returns to C" {5370test "DC: Zig returns to C" {
5382 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5371 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5383 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5372 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5384 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5373 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5385 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5386 try expectOk(c_assert_ret_DC());5374 try expectOk(c_assert_ret_DC());
5387}5375}
5388test "DC: C passes to Zig" {5376test "DC: C passes to Zig" {
5389 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5377 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5390 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5378 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5391 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5379 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5392 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5393 try expectOk(c_send_DC());5380 try expectOk(c_send_DC());
5394}5381}
5395test "DC: C returns to Zig" {5382test "DC: C returns to Zig" {
5396 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5383 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5397 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;5384 if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
5398 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5385 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5399 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5400 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());5386 try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());
5401}5387}
54025388
...@@ -5421,14 +5407,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };...@@ -5421,14 +5407,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };
5421test "CFF: Zig passes to C" {5407test "CFF: Zig passes to C" {
5422 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;5408 if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;
5423 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5409 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5424 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5410 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5425 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5426 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));5411 try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));
5427}5412}
5428test "CFF: Zig returns to C" {5413test "CFF: Zig returns to C" {
5429 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5414 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5430 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5415 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5431 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5432 try expectOk(c_assert_ret_CFF());5416 try expectOk(c_assert_ret_CFF());
5433}5417}
5434test "CFF: C passes to Zig" {5418test "CFF: C passes to Zig" {
...@@ -5436,8 +5420,7 @@ test "CFF: C passes to Zig" {...@@ -5436,8 +5420,7 @@ test "CFF: C passes to Zig" {
5436 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;5420 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
5437 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;5421 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
5438 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5422 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5439 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5423 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5440 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
54415424
5442 try expectOk(c_send_CFF());5425 try expectOk(c_send_CFF());
5443}5426}
...@@ -5445,8 +5428,7 @@ test "CFF: C returns to Zig" {...@@ -5445,8 +5428,7 @@ test "CFF: C returns to Zig" {
5445 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;5428 if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
5446 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;5429 if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
5447 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5430 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5448 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5431 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5449 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5450 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());5432 try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());
5451}5433}
5452pub extern fn c_assert_CFF(lv: CFF) c_int;5434pub extern fn c_assert_CFF(lv: CFF) c_int;
...@@ -5470,26 +5452,22 @@ const PD = extern struct { v1: ?*anyopaque, v2: f64 };...@@ -5470,26 +5452,22 @@ const PD = extern struct { v1: ?*anyopaque, v2: f64 };
54705452
5471test "PD: Zig passes to C" {5453test "PD: Zig passes to C" {
5472 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5454 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5473 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5455 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5474 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5475 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));5456 try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));
5476}5457}
5477test "PD: Zig returns to C" {5458test "PD: Zig returns to C" {
5478 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5459 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5479 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5460 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5480 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5481 try expectOk(c_assert_ret_PD());5461 try expectOk(c_assert_ret_PD());
5482}5462}
5483test "PD: C passes to Zig" {5463test "PD: C passes to Zig" {
5484 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5464 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5485 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5465 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5486 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5487 try expectOk(c_send_PD());5466 try expectOk(c_send_PD());
5488}5467}
5489test "PD: C returns to Zig" {5468test "PD: C returns to Zig" {
5490 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5469 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5491 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5470 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5492 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
5493 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());5471 try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());
5494}5472}
5495pub extern fn c_assert_PD(lv: PD) c_int;5473pub extern fn c_assert_PD(lv: PD) c_int;
...@@ -5521,7 +5499,7 @@ const ByRef = extern struct {...@@ -5521,7 +5499,7 @@ const ByRef = extern struct {
5521extern fn c_modify_by_ref_param(ByRef) ByRef;5499extern fn c_modify_by_ref_param(ByRef) ByRef;
55225500
5523test "C function modifies by ref param" {5501test "C function modifies by ref param" {
5524 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5502 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55255503
5526 const res = c_modify_by_ref_param(.{ .val = 1, .arr = undefined });5504 const res = c_modify_by_ref_param(.{ .val = 1, .arr = undefined });
5527 try expect(res.val == 42);5505 try expect(res.val == 42);
...@@ -5543,7 +5521,7 @@ const ByVal = extern struct {...@@ -5543,7 +5521,7 @@ const ByVal = extern struct {
5543extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;5521extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;
5544test "C function that takes byval struct called via function pointer" {5522test "C function that takes byval struct called via function pointer" {
5545 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;5523 if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
5546 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5524 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
55475525
5548 var fn_ptr = &c_func_ptr_byval;5526 var fn_ptr = &c_func_ptr_byval;
5549 _ = &fn_ptr;5527 _ = &fn_ptr;
...@@ -5574,8 +5552,7 @@ const f16_struct = extern struct {...@@ -5574,8 +5552,7 @@ const f16_struct = extern struct {
5574extern fn c_f16_struct(f16_struct) f16_struct;5552extern fn c_f16_struct(f16_struct) f16_struct;
5575test "f16 struct" {5553test "f16 struct" {
5576 if (builtin.target.cpu.arch.isMIPS()) return error.SkipZigTest;5554 if (builtin.target.cpu.arch.isMIPS()) return error.SkipZigTest;
5577 if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
5578 if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;
5579 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;5556 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;
55805557
5581 const a = c_f16_struct(.{ .a = 12 });5558 const a = c_f16_struct(.{ .a = 12 });
...@@ -5690,8 +5667,7 @@ const Coord2 = extern struct {...@@ -5690,8 +5667,7 @@ const Coord2 = extern struct {
5690extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;5667extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;
5691test "Stdcall ABI structs" {5668test "Stdcall ABI structs" {
5692 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5669 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5693 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5670 if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
5694 if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
56955671
5696 const res = stdcall_coord2(5672 const res = stdcall_coord2(
5697 .{ .x = 0x1111, .y = 0x2222 },5673 .{ .x = 0x1111, .y = 0x2222 },
...@@ -5704,7 +5680,7 @@ test "Stdcall ABI structs" {...@@ -5704,7 +5680,7 @@ test "Stdcall ABI structs" {
57045680
5705extern fn stdcall_big_union(BigUnion) callconv(stdcall_callconv) void;5681extern fn stdcall_big_union(BigUnion) callconv(stdcall_callconv) void;
5706test "Stdcall ABI big union" {5682test "Stdcall ABI big union" {
5707 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5683 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
57085684
5709 const x = BigUnion{5685 const x = BigUnion{
5710 .a = BigStruct{5686 .a = BigStruct{
...@@ -5776,7 +5752,7 @@ const byval_tail_callsite_attr = struct {...@@ -5776,7 +5752,7 @@ const byval_tail_callsite_attr = struct {
57765752
5777test "byval tail callsite attribute" {5753test "byval tail callsite attribute" {
5778 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5754 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5779 if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;5755 if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
57805756
5781 // Originally reported at https://github.com/ziglang/zig/issues/162905757 // Originally reported at https://github.com/ziglang/zig/issues/16290
5782 // the bug was that the extern function had the byval attribute, but5758 // the bug was that the extern function had the byval attribute, but