authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-03-02 14:53:02+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-03-02 14:53:02+01:00
logc9d1db7e8eda6374bfc5ba51097e24d93ab91ddb
tree939a84bc006c6bbf24f89c050b95a3f577dc1b78
parent350bf9db131dd5573da0d06d38e40746c99a8a34

x64: fix incorrect calc of rdi spill stack loc for backpatching


2 files changed, 7 insertions(+), 2 deletions(-)

src/arch/x86_64/CodeGen.zig+6-1
...@@ -472,10 +472,14 @@ fn gen(self: *Self) InnerError!void {...@@ -472,10 +472,14 @@ fn gen(self: *Self) InnerError!void {
472 .regs = 0,472 .regs = 0,
473 .disp = mem.alignForwardGeneric(u32, self.next_stack_offset, 8),473 .disp = mem.alignForwardGeneric(u32, self.next_stack_offset, 8),
474 };474 };
475 var disp = data.disp + 8;
475 inline for (callee_preserved_regs) |reg, i| {476 inline for (callee_preserved_regs) |reg, i| {
476 if (self.register_manager.isRegAllocated(reg)) {477 if (self.register_manager.isRegAllocated(reg)) {
477 if (reg.to64() == .rdi) {478 if (reg.to64() == .rdi) {
478 for (self.ret_backpatches.items) |inst| {479 for (self.ret_backpatches.items) |inst| {
480 log.debug(".rdi was spilled, backpatching with mov from stack at offset {}", .{
481 -@intCast(i32, disp),
482 });
479 const ops = Mir.Ops.decode(self.mir_instructions.items(.ops)[inst]);483 const ops = Mir.Ops.decode(self.mir_instructions.items(.ops)[inst]);
480 self.mir_instructions.set(inst, Mir.Inst{484 self.mir_instructions.set(inst, Mir.Inst{
481 .tag = .mov,485 .tag = .mov,
...@@ -484,12 +488,13 @@ fn gen(self: *Self) InnerError!void {...@@ -484,12 +488,13 @@ fn gen(self: *Self) InnerError!void {
484 .reg2 = .rbp,488 .reg2 = .rbp,
485 .flags = 0b01,489 .flags = 0b01,
486 }).encode(),490 }).encode(),
487 .data = .{ .imm = @bitCast(u32, -@intCast(i32, self.max_end_stack + 8)) },491 .data = .{ .imm = @bitCast(u32, -@intCast(i32, disp)) },
488 });492 });
489 }493 }
490 }494 }
491 data.regs |= 1 << @intCast(u5, i);495 data.regs |= 1 << @intCast(u5, i);
492 self.max_end_stack += 8;496 self.max_end_stack += 8;
497 disp += 8;
493 }498 }
494 }499 }
495 break :blk try self.addExtra(data);500 break :blk try self.addExtra(data);
test/behavior/cast.zig+1-1
...@@ -19,7 +19,7 @@ test "integer literal to pointer cast" {...@@ -19,7 +19,7 @@ test "integer literal to pointer cast" {
1919
20test "peer type resolution: ?T and T" {20test "peer type resolution: ?T and T" {
21 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;21 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
22 if (builtin.zig_backend == .stage2_x86_64 or builtin.zig_backend == .stage2_arm) return error.SkipZigTest;22 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
2323
24 try expect(peerTypeTAndOptionalT(true, false).? == 0);24 try expect(peerTypeTAndOptionalT(true, false).? == 0);
25 try expect(peerTypeTAndOptionalT(false, false).? == 3);25 try expect(peerTypeTAndOptionalT(false, false).? == 3);