| ... | ... | @@ -472,10 +472,14 @@ fn gen(self: *Self) InnerError!void { |
| 472 | 472 | .regs = 0, |
| 473 | 473 | .disp = mem.alignForwardGeneric(u32, self.next_stack_offset, 8), |
| 474 | 474 | }; |
| 475 | var disp = data.disp + 8; |
| 475 | 476 | inline for (callee_preserved_regs) |reg, i| { |
| 476 | 477 | if (self.register_manager.isRegAllocated(reg)) { |
| 477 | 478 | if (reg.to64() == .rdi) { |
| 478 | 479 | for (self.ret_backpatches.items) |inst| { |
| 480 | log.debug(".rdi was spilled, backpatching with mov from stack at offset {}", .{ |
| 481 | -@intCast(i32, disp), |
| 482 | }); |
| 479 | 483 | const ops = Mir.Ops.decode(self.mir_instructions.items(.ops)[inst]); |
| 480 | 484 | self.mir_instructions.set(inst, Mir.Inst{ |
| 481 | 485 | .tag = .mov, |
| ... | ... | @@ -484,12 +488,13 @@ fn gen(self: *Self) InnerError!void { |
| 484 | 488 | .reg2 = .rbp, |
| 485 | 489 | .flags = 0b01, |
| 486 | 490 | }).encode(), |
| 487 | | .data = .{ .imm = @bitCast(u32, -@intCast(i32, self.max_end_stack + 8)) }, |
| 491 | .data = .{ .imm = @bitCast(u32, -@intCast(i32, disp)) }, |
| 488 | 492 | }); |
| 489 | 493 | } |
| 490 | 494 | } |
| 491 | 495 | data.regs |= 1 << @intCast(u5, i); |
| 492 | 496 | self.max_end_stack += 8; |
| 497 | disp += 8; |
| 493 | 498 | } |
| 494 | 499 | } |
| 495 | 500 | break :blk try self.addExtra(data); |