authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-10-03 08:34:19+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2024-11-03 09:29:30+01:00
logc9e67e71c146d9a9c217d3f47e75258a1ffeedd9
tree4c39477d16c9dc77dd53a254d11d601025fb3919
parent4e843b4e2b8c7cd48ecbd80a59036f1f72a997ca
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm().

The old isARM() function was a portability trap. With the name it had, it seemed like the obviously correct function to use, but it didn't include Thumb. In the vast majority of cases where someone wants to ask "is the target Arm?", Thumb *should* be included. There are exactly 3 cases in the codebase where we do actually need to exclude Thumb, although one of those is in Aro and mirrors a check in Clang that is itself likely a bug. These rare cases can just add an extra isThumb() check.

27 files changed, 64 insertions(+), 71 deletions(-)

lib/compiler/aro/aro/toolchains/Linux.zig+1-1
...@@ -40,7 +40,7 @@ fn buildExtraOpts(self: *Linux, tc: *const Toolchain) !void {...@@ -40,7 +40,7 @@ fn buildExtraOpts(self: *Linux, tc: *const Toolchain) !void {
40 self.extra_opts.appendAssumeCapacity("relro");40 self.extra_opts.appendAssumeCapacity("relro");
41 }41 }
4242
43 if (target.cpu.arch.isARM() or target.cpu.arch.isAARCH64() or is_android) {43 if ((target.cpu.arch.isArm() and !target.cpu.arch.isThumb()) or target.cpu.arch.isAARCH64() or is_android) {
44 try self.extra_opts.ensureUnusedCapacity(gpa, 2);44 try self.extra_opts.ensureUnusedCapacity(gpa, 2);
45 self.extra_opts.appendAssumeCapacity("-z");45 self.extra_opts.appendAssumeCapacity("-z");
46 self.extra_opts.appendAssumeCapacity("max-page-size=4096");46 self.extra_opts.appendAssumeCapacity("max-page-size=4096");
lib/compiler_rt/arm.zig+3-5
...@@ -10,7 +10,7 @@ pub const panic = common.panic;...@@ -10,7 +10,7 @@ pub const panic = common.panic;
1010
11comptime {11comptime {
12 if (!builtin.is_test) {12 if (!builtin.is_test) {
13 if (arch.isArmOrThumb()) {13 if (arch.isArm()) {
14 @export(&__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = common.linkage, .visibility = common.visibility });14 @export(&__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = common.linkage, .visibility = common.visibility });
15 @export(&__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = common.linkage, .visibility = common.visibility });15 @export(&__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = common.linkage, .visibility = common.visibility });
16 @export(&__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = common.linkage, .visibility = common.visibility });16 @export(&__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = common.linkage, .visibility = common.visibility });
...@@ -206,7 +206,7 @@ fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 {...@@ -206,7 +206,7 @@ fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 {
206}206}
207207
208test "__aeabi_frsub" {208test "__aeabi_frsub" {
209 if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;209 if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest;
210 const inf32 = std.math.inf(f32);210 const inf32 = std.math.inf(f32);
211 const maxf32 = std.math.floatMax(f32);211 const maxf32 = std.math.floatMax(f32);
212 const frsub_data = [_][3]f32{212 const frsub_data = [_][3]f32{
...@@ -226,14 +226,13 @@ test "__aeabi_frsub" {...@@ -226,14 +226,13 @@ test "__aeabi_frsub" {
226 [_]f32{ maxf32, -maxf32, -inf32 },226 [_]f32{ maxf32, -maxf32, -inf32 },
227 [_]f32{ -maxf32, maxf32, inf32 },227 [_]f32{ -maxf32, maxf32, inf32 },
228 };228 };
229 if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
230 for (frsub_data) |data| {229 for (frsub_data) |data| {
231 try std.testing.expectApproxEqAbs(data[2], __aeabi_frsub(data[0], data[1]), 0.001);230 try std.testing.expectApproxEqAbs(data[2], __aeabi_frsub(data[0], data[1]), 0.001);
232 }231 }
233}232}
234233
235test "__aeabi_drsub" {234test "__aeabi_drsub" {
236 if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;235 if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest;
237 const inf64 = std.math.inf(f64);236 const inf64 = std.math.inf(f64);
238 const maxf64 = std.math.floatMax(f64);237 const maxf64 = std.math.floatMax(f64);
239 const frsub_data = [_][3]f64{238 const frsub_data = [_][3]f64{
...@@ -253,7 +252,6 @@ test "__aeabi_drsub" {...@@ -253,7 +252,6 @@ test "__aeabi_drsub" {
253 [_]f64{ maxf64, -maxf64, -inf64 },252 [_]f64{ maxf64, -maxf64, -inf64 },
254 [_]f64{ -maxf64, maxf64, inf64 },253 [_]f64{ -maxf64, maxf64, inf64 },
255 };254 };
256 if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
257 for (frsub_data) |data| {255 for (frsub_data) |data| {
258 try std.testing.expectApproxEqAbs(data[2], __aeabi_drsub(data[0], data[1]), 0.000001);256 try std.testing.expectApproxEqAbs(data[2], __aeabi_drsub(data[0], data[1]), 0.000001);
259 }257 }
lib/compiler_rt/clzsi2_test.zig+1-1
...@@ -268,7 +268,7 @@ test "clzsi2" {...@@ -268,7 +268,7 @@ test "clzsi2" {
268 try test__clzsi2(0xFE000000, 0);268 try test__clzsi2(0xFE000000, 0);
269 try test__clzsi2(0xFF000000, 0);269 try test__clzsi2(0xFF000000, 0);
270 // arm and thumb1 assume input a != 0270 // arm and thumb1 assume input a != 0
271 if (!builtin.cpu.arch.isArmOrThumb())271 if (!builtin.cpu.arch.isArm())
272 try test__clzsi2(0x00000000, 32);272 try test__clzsi2(0x00000000, 32);
273 try test__clzsi2(0x00000001, 31);273 try test__clzsi2(0x00000001, 31);
274 try test__clzsi2(0x00000002, 30);274 try test__clzsi2(0x00000002, 30);
lib/compiler_rt/common.zig+1-1
...@@ -29,7 +29,7 @@ pub const want_aeabi = switch (builtin.abi) {...@@ -29,7 +29,7 @@ pub const want_aeabi = switch (builtin.abi) {
29 },29 },
30 else => false,30 else => false,
31};31};
32pub const want_mingw_arm_abi = builtin.cpu.arch.isArmOrThumb() and builtin.target.isMinGW();32pub const want_mingw_arm_abi = builtin.cpu.arch.isArm() and builtin.target.isMinGW();
3333
34pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();34pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();
3535
lib/std/Target.zig+7-10
...@@ -1379,31 +1379,28 @@ pub const Cpu = struct {...@@ -1379,31 +1379,28 @@ pub const Cpu = struct {
1379 };1379 };
1380 }1380 }
13811381
1382 pub inline fn isARM(arch: Arch) bool {1382 /// Note that this includes Thumb.
1383 pub inline fn isArm(arch: Arch) bool {
1383 return switch (arch) {1384 return switch (arch) {
1384 .arm, .armeb => true,1385 .arm, .armeb => true,
1385 else => false,1386 else => arch.isThumb(),
1386 };1387 };
1387 }1388 }
13881389
1389 pub inline fn isAARCH64(arch: Arch) bool {1390 pub inline fn isThumb(arch: Arch) bool {
1390 return switch (arch) {1391 return switch (arch) {
1391 .aarch64, .aarch64_be => true,1392 .thumb, .thumbeb => true,
1392 else => false,1393 else => false,
1393 };1394 };
1394 }1395 }
13951396
1396 pub inline fn isThumb(arch: Arch) bool {1397 pub inline fn isAARCH64(arch: Arch) bool {
1397 return switch (arch) {1398 return switch (arch) {
1398 .thumb, .thumbeb => true,1399 .aarch64, .aarch64_be => true,
1399 else => false,1400 else => false,
1400 };1401 };
1401 }1402 }
14021403
1403 pub inline fn isArmOrThumb(arch: Arch) bool {
1404 return arch.isARM() or arch.isThumb();
1405 }
1406
1407 pub inline fn isWasm(arch: Arch) bool {1404 pub inline fn isWasm(arch: Arch) bool {
1408 return switch (arch) {1405 return switch (arch) {
1409 .wasm32, .wasm64 => true,1406 .wasm32, .wasm64 => true,
lib/std/math/gamma.zig+1-1
...@@ -263,7 +263,7 @@ test gamma {...@@ -263,7 +263,7 @@ test gamma {
263}263}
264264
265test "gamma.special" {265test "gamma.special" {
266 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234266 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
267267
268 inline for (&.{ f32, f64 }) |T| {268 inline for (&.{ f32, f64 }) |T| {
269 try expect(std.math.isNan(gamma(T, -std.math.nan(T))));269 try expect(std.math.isNan(gamma(T, -std.math.nan(T))));
lib/std/math/isnan.zig+1-1
...@@ -32,7 +32,7 @@ test isSignalNan {...@@ -32,7 +32,7 @@ test isSignalNan {
32 // TODO: Signalling NaN values get converted to quiet NaN values in32 // TODO: Signalling NaN values get converted to quiet NaN values in
33 // some cases where they shouldn't such that this can fail.33 // some cases where they shouldn't such that this can fail.
34 // See https://github.com/ziglang/zig/issues/1436634 // See https://github.com/ziglang/zig/issues/14366
35 if (!builtin.cpu.arch.isArmOrThumb() and35 if (!builtin.cpu.arch.isArm() and
36 !builtin.cpu.arch.isAARCH64() and36 !builtin.cpu.arch.isAARCH64() and
37 !builtin.cpu.arch.isPowerPC() and37 !builtin.cpu.arch.isPowerPC() and
38 builtin.zig_backend != .stage2_c)38 builtin.zig_backend != .stage2_c)
lib/std/os/linux.zig+2-2
...@@ -506,7 +506,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {...@@ -506,7 +506,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {
506const require_aligned_register_pair =506const require_aligned_register_pair =
507 builtin.cpu.arch.isPowerPC32() or507 builtin.cpu.arch.isPowerPC32() or
508 builtin.cpu.arch.isMIPS32() or508 builtin.cpu.arch.isMIPS32() or
509 builtin.cpu.arch.isArmOrThumb();509 builtin.cpu.arch.isArm();
510510
511// Split a 64bit value into a {LSB,MSB} pair.511// Split a 64bit value into a {LSB,MSB} pair.
512// The LE/BE variants specify the endianness to assume.512// The LE/BE variants specify the endianness to assume.
...@@ -2331,7 +2331,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const...@@ -2331,7 +2331,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
2331}2331}
23322332
2333pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {2333pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
2334 if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) {2334 if (comptime native_arch.isArm() or native_arch.isPowerPC32()) {
2335 // These architectures reorder the arguments so that a register is not skipped to align the2335 // These architectures reorder the arguments so that a register is not skipped to align the
2336 // register number that `offset` is passed in.2336 // register number that `offset` is passed in.
23372337
lib/std/simd.zig+1-1
...@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)...@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
18 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;18 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
19 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;19 if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
20 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;20 if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
21 } else if (cpu.arch.isArmOrThumb()) {21 } else if (cpu.arch.isArm()) {
22 if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;22 if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;
23 } else if (cpu.arch.isAARCH64()) {23 } else if (cpu.arch.isAARCH64()) {
24 // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit24 // SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit
lib/std/start.zig+1-1
...@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {...@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {
495 // ARMv6 targets (and earlier) have no support for TLS in hardware.495 // ARMv6 targets (and earlier) have no support for TLS in hardware.
496 // FIXME: Elide the check for targets >= ARMv7 when the target feature API496 // FIXME: Elide the check for targets >= ARMv7 when the target feature API
497 // becomes less verbose (and more usable).497 // becomes less verbose (and more usable).
498 if (comptime native_arch.isArmOrThumb()) {498 if (comptime native_arch.isArm()) {
499 if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {499 if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {
500 // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls500 // FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls
501 // For the time being use a simple trap instead of a @panic call to501 // For the time being use a simple trap instead of a @panic call to
lib/std/zig/system.zig+1-1
...@@ -401,7 +401,7 @@ pub fn resolveTargetQuery(query: Target.Query) DetectError!Target {...@@ -401,7 +401,7 @@ pub fn resolveTargetQuery(query: Target.Query) DetectError!Target {
401 }401 }
402402
403 // https://github.com/llvm/llvm-project/issues/105978403 // https://github.com/llvm/llvm-project/issues/105978
404 if (result.cpu.arch.isArmOrThumb() and result.floatAbi() == .soft) {404 if (result.cpu.arch.isArm() and result.floatAbi() == .soft) {
405 result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2));405 result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2));
406 }406 }
407407
src/codegen/c.zig+1-1
...@@ -5190,7 +5190,7 @@ fn asmInputNeedsLocal(f: *Function, constraint: []const u8, value: CValue) bool...@@ -5190,7 +5190,7 @@ fn asmInputNeedsLocal(f: *Function, constraint: []const u8, value: CValue) bool
5190 return switch (constraint[0]) {5190 return switch (constraint[0]) {
5191 '{' => true,5191 '{' => true,
5192 'i', 'r' => false,5192 'i', 'r' => false,
5193 'I' => !target.cpu.arch.isArmOrThumb(),5193 'I' => !target.cpu.arch.isArm(),
5194 else => switch (value) {5194 else => switch (value) {
5195 .constant => |val| switch (dg.pt.zcu.intern_pool.indexToKey(val.toIntern())) {5195 .constant => |val| switch (dg.pt.zcu.intern_pool.indexToKey(val.toIntern())) {
5196 .ptr => |ptr| if (ptr.byte_offset == 0) switch (ptr.base_addr) {5196 .ptr => |ptr| if (ptr.byte_offset == 0) switch (ptr.base_addr) {
src/codegen/llvm.zig+3-3
...@@ -494,7 +494,7 @@ const DataLayoutBuilder = struct {...@@ -494,7 +494,7 @@ const DataLayoutBuilder = struct {
494 if (idx != size) try writer.print(":{d}", .{idx});494 if (idx != size) try writer.print(":{d}", .{idx});
495 }495 }
496 }496 }
497 if (self.target.cpu.arch.isArmOrThumb())497 if (self.target.cpu.arch.isArm())
498 try writer.writeAll("-Fi8") // for thumb interwork498 try writer.writeAll("-Fi8") // for thumb interwork
499 else if (self.target.cpu.arch == .powerpc64 and499 else if (self.target.cpu.arch == .powerpc64 and
500 self.target.os.tag != .freebsd and500 self.target.os.tag != .freebsd and
...@@ -761,7 +761,7 @@ const DataLayoutBuilder = struct {...@@ -761,7 +761,7 @@ const DataLayoutBuilder = struct {
761 else => {},761 else => {},
762 }762 }
763 },763 },
764 .vector => if (self.target.cpu.arch.isArmOrThumb()) {764 .vector => if (self.target.cpu.arch.isArm()) {
765 switch (size) {765 switch (size) {
766 128 => abi = 64,766 128 => abi = 64,
767 else => {},767 else => {},
...@@ -827,7 +827,7 @@ const DataLayoutBuilder = struct {...@@ -827,7 +827,7 @@ const DataLayoutBuilder = struct {
827 else => {},827 else => {},
828 },828 },
829 .aggregate => if (self.target.os.tag == .uefi or self.target.os.tag == .windows or829 .aggregate => if (self.target.os.tag == .uefi or self.target.os.tag == .windows or
830 self.target.cpu.arch.isArmOrThumb())830 self.target.cpu.arch.isArm())
831 {831 {
832 pref = @min(pref, self.target.ptrBitWidth());832 pref = @min(pref, self.target.ptrBitWidth());
833 } else switch (self.target.cpu.arch) {833 } else switch (self.target.cpu.arch) {
src/glibc.zig+2-2
...@@ -440,7 +440,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![...@@ -440,7 +440,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
440 try result.appendSlice("sparc" ++ s ++ "sparc32");440 try result.appendSlice("sparc" ++ s ++ "sparc32");
441 }441 }
442 }442 }
443 } else if (arch.isARM()) {443 } else if (arch.isArm()) {
444 try result.appendSlice("arm");444 try result.appendSlice("arm");
445 } else if (arch.isMIPS()) {445 } else if (arch.isMIPS()) {
446 if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {446 if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {
...@@ -604,7 +604,7 @@ fn add_include_dirs_arch(...@@ -604,7 +604,7 @@ fn add_include_dirs_arch(
604 try args.append("-I");604 try args.append("-I");
605 try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));605 try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));
606 }606 }
607 } else if (arch.isARM()) {607 } else if (arch.isArm()) {
608 if (opt_nptl) |nptl| {608 if (opt_nptl) |nptl| {
609 try args.append("-I");609 try args.append("-I");
610 try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));610 try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));
src/libunwind.zig+1-1
...@@ -136,7 +136,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr...@@ -136,7 +136,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
136 if (!comp.config.any_non_single_threaded) {136 if (!comp.config.any_non_single_threaded) {
137 try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");137 try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
138 }138 }
139 if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) {139 if (target.cpu.arch.isArm() and target.abi.floatAbi() == .hard) {
140 try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");140 try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
141 }141 }
142 try cflags.append("-Wno-bitwise-conditional-parentheses");142 try cflags.append("-Wno-bitwise-conditional-parentheses");
src/link/Coff.zig+4-6
...@@ -1865,12 +1865,10 @@ fn linkWithLLD(coff: *Coff, arena: Allocator, tid: Zcu.PerThread.Id, prog_node:...@@ -1865,12 +1865,10 @@ fn linkWithLLD(coff: *Coff, arena: Allocator, tid: Zcu.PerThread.Id, prog_node:
1865 try argv.append("-MACHINE:X86");1865 try argv.append("-MACHINE:X86");
1866 } else if (target.cpu.arch == .x86_64) {1866 } else if (target.cpu.arch == .x86_64) {
1867 try argv.append("-MACHINE:X64");1867 try argv.append("-MACHINE:X64");
1868 } else if (target.cpu.arch.isARM()) {1868 } else if (target.cpu.arch == .thumb) {
1869 if (target.ptrBitWidth() == 32) {1869 try argv.append("-MACHINE:ARM");
1870 try argv.append("-MACHINE:ARM");1870 } else if (target.cpu.arch == .aarch64) {
1871 } else {1871 try argv.append("-MACHINE:ARM64");
1872 try argv.append("-MACHINE:ARM64");
1873 }
1874 }1872 }
18751873
1876 for (comp.force_undefined_symbols.keys()) |symbol| {1874 for (comp.force_undefined_symbols.keys()) |symbol| {
src/link/Elf.zig+1-1
...@@ -1823,7 +1823,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s...@@ -1823,7 +1823,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s
1823 }1823 }
18241824
1825 if (link_mode == .static) {1825 if (link_mode == .static) {
1826 if (target.cpu.arch.isArmOrThumb()) {1826 if (target.cpu.arch.isArm()) {
1827 try argv.append("-Bstatic");1827 try argv.append("-Bstatic");
1828 } else {1828 } else {
1829 try argv.append("-static");1829 try argv.append("-static");
test/behavior/cast.zig+2-2
...@@ -124,7 +124,7 @@ test "@floatFromInt(f80)" {...@@ -124,7 +124,7 @@ test "@floatFromInt(f80)" {
124 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO124 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
125 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO125 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
126 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;126 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
127 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;127 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
128 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;128 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
129 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;129 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
130130
...@@ -1362,7 +1362,7 @@ test "cast f16 to wider types" {...@@ -1362,7 +1362,7 @@ test "cast f16 to wider types" {
1362 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1362 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1363 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1363 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1364 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1364 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1365 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1365 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1366 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1366 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1367 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1367 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
13681368
test/behavior/eval.zig+1-1
...@@ -522,7 +522,7 @@ test "runtime 128 bit integer division" {...@@ -522,7 +522,7 @@ test "runtime 128 bit integer division" {
522 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO522 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
523 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO523 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
524 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;524 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
525 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;525 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
526 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;526 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
527 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;527 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
528528
test/behavior/floatop.zig+7-7
...@@ -126,7 +126,7 @@ test "cmp f16" {...@@ -126,7 +126,7 @@ test "cmp f16" {
126 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;126 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
127 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;127 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
128 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;128 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
129 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234129 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
130130
131 try testCmp(f16);131 try testCmp(f16);
132 try comptime testCmp(f16);132 try comptime testCmp(f16);
...@@ -135,7 +135,7 @@ test "cmp f16" {...@@ -135,7 +135,7 @@ test "cmp f16" {
135test "cmp f32/f64" {135test "cmp f32/f64" {
136 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO136 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
137 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;137 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
138 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234138 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
139139
140 try testCmp(f32);140 try testCmp(f32);
141 try comptime testCmp(f32);141 try comptime testCmp(f32);
...@@ -146,7 +146,7 @@ test "cmp f32/f64" {...@@ -146,7 +146,7 @@ test "cmp f32/f64" {
146test "cmp f128" {146test "cmp f128" {
147 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO147 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
148 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO148 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
149 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;149 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
150 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;150 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
151 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;151 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
152 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;152 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
...@@ -1009,7 +1009,7 @@ test "@abs f32/f64" {...@@ -1009,7 +1009,7 @@ test "@abs f32/f64" {
1009test "@abs f80/f128/c_longdouble" {1009test "@abs f80/f128/c_longdouble" {
1010 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1010 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1011 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1011 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1012 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1012 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1013 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1013 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1014 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1014 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1015 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1015 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...@@ -1134,7 +1134,7 @@ test "@floor f32/f64" {...@@ -1134,7 +1134,7 @@ test "@floor f32/f64" {
1134test "@floor f80/f128/c_longdouble" {1134test "@floor f80/f128/c_longdouble" {
1135 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1135 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1136 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1136 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1137 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1137 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1138 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1138 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1139 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1139 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1140 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1140 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...@@ -1232,7 +1232,7 @@ test "@ceil f32/f64" {...@@ -1232,7 +1232,7 @@ test "@ceil f32/f64" {
1232test "@ceil f80/f128/c_longdouble" {1232test "@ceil f80/f128/c_longdouble" {
1233 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1233 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1234 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1234 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1235 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1235 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1236 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1236 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1237 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1237 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1238 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1238 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...@@ -1330,7 +1330,7 @@ test "@trunc f32/f64" {...@@ -1330,7 +1330,7 @@ test "@trunc f32/f64" {
1330test "@trunc f80/f128/c_longdouble" {1330test "@trunc f80/f128/c_longdouble" {
1331 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1331 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1332 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO1332 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1333 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1333 if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1334 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1334 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1335 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1335 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1336 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1336 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
test/behavior/math.zig+7-7
...@@ -780,7 +780,7 @@ test "128-bit multiplication" {...@@ -780,7 +780,7 @@ test "128-bit multiplication" {
780 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO780 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
781 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;781 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
782 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;782 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
783 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;783 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
784 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;784 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
785785
786 {786 {
...@@ -1369,7 +1369,7 @@ test "remainder division" {...@@ -1369,7 +1369,7 @@ test "remainder division" {
1369 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1369 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1370 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1370 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1371 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1371 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1372 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1372 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1373 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1373 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
13741374
1375 if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) {1375 if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) {
...@@ -1522,7 +1522,7 @@ test "@round f80" {...@@ -1522,7 +1522,7 @@ test "@round f80" {
1522 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1522 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1523 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1523 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1524 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1524 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1525 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1525 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1526 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1526 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1527 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1527 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
15281528
...@@ -1535,7 +1535,7 @@ test "@round f128" {...@@ -1535,7 +1535,7 @@ test "@round f128" {
1535 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO1535 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1536 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO1536 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1537 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1537 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1538 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;1538 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1539 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1539 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1540 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1540 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
15411541
...@@ -1579,7 +1579,7 @@ test "NaN comparison" {...@@ -1579,7 +1579,7 @@ test "NaN comparison" {
1579 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1579 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1580 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1580 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1581 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1581 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1582 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/212341582 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
15831583
1584 try testNanEqNan(f16);1584 try testNanEqNan(f16);
1585 try testNanEqNan(f32);1585 try testNanEqNan(f32);
...@@ -1735,7 +1735,7 @@ test "runtime comparison to NaN is comptime-known" {...@@ -1735,7 +1735,7 @@ test "runtime comparison to NaN is comptime-known" {
1735 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1735 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1736 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1736 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1737 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1737 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1738 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/212341738 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
17391739
1740 const S = struct {1740 const S = struct {
1741 fn doTheTest(comptime F: type, x: F) void {1741 fn doTheTest(comptime F: type, x: F) void {
...@@ -1766,7 +1766,7 @@ test "runtime int comparison to inf is comptime-known" {...@@ -1766,7 +1766,7 @@ test "runtime int comparison to inf is comptime-known" {
1766 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;1766 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1767 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;1767 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1768 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;1768 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1769 if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/212341769 if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
17701770
1771 const S = struct {1771 const S = struct {
1772 fn doTheTest(comptime F: type, x: u32) void {1772 fn doTheTest(comptime F: type, x: u32) void {
test/behavior/maximum_minimum.zig+1-1
...@@ -122,7 +122,7 @@ test "@min/max for floats" {...@@ -122,7 +122,7 @@ test "@min/max for floats" {
122 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO122 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
123 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO123 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
124 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;124 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
125 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;125 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
126 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;126 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
127 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;127 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
128128
test/behavior/muladd.zig+4-4
...@@ -58,7 +58,7 @@ test "@mulAdd f80" {...@@ -58,7 +58,7 @@ test "@mulAdd f80" {
58 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO58 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
59 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO59 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
60 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;60 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
61 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;61 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
62 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;62 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
63 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;63 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
6464
...@@ -79,7 +79,7 @@ test "@mulAdd f128" {...@@ -79,7 +79,7 @@ test "@mulAdd f128" {
79 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO79 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
80 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO80 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
81 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;81 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
82 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;82 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
83 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;83 if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
84 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;84 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
8585
...@@ -189,7 +189,7 @@ test "vector f80" {...@@ -189,7 +189,7 @@ test "vector f80" {
189 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO189 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
190 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO190 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
191 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;191 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
192 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;192 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
193 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;193 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
194194
195 try comptime vector80();195 try comptime vector80();
...@@ -216,7 +216,7 @@ test "vector f128" {...@@ -216,7 +216,7 @@ test "vector f128" {
216 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO216 if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
217 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO217 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
218 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;218 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
219 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;219 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
220 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;220 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
221221
222 try comptime vector128();222 try comptime vector128();
test/behavior/saturating_arithmetic.zig+2-2
...@@ -164,7 +164,7 @@ test "saturating multiplication <= 32 bits" {...@@ -164,7 +164,7 @@ test "saturating multiplication <= 32 bits" {
164 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO164 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
165 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO165 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
166 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;166 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
167 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;167 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
168 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;168 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
169169
170 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {170 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {
...@@ -264,7 +264,7 @@ test "saturating multiplication" {...@@ -264,7 +264,7 @@ test "saturating multiplication" {
264 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO264 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
265 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO265 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
266 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;266 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
267 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;267 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
268 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;268 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
269269
270 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {270 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {
test/behavior/struct.zig+3-3
...@@ -419,7 +419,7 @@ test "packed struct 24bits" {...@@ -419,7 +419,7 @@ test "packed struct 24bits" {
419 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO419 if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
420 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO420 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
421 if (builtin.cpu.arch == .wasm32) return error.SkipZigTest; // TODO421 if (builtin.cpu.arch == .wasm32) return error.SkipZigTest; // TODO
422 if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO422 if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO
423 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO423 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
424 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;424 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
425425
...@@ -818,7 +818,7 @@ test "non-packed struct with u128 entry in union" {...@@ -818,7 +818,7 @@ test "non-packed struct with u128 entry in union" {
818 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO818 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
819 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO819 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
820 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;820 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
821 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;821 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
822 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;822 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
823823
824 const U = union(enum) {824 const U = union(enum) {
...@@ -941,7 +941,7 @@ test "tuple assigned to variable" {...@@ -941,7 +941,7 @@ test "tuple assigned to variable" {
941941
942test "comptime struct field" {942test "comptime struct field" {
943 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO943 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
944 if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO944 if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO
945945
946 const T = struct {946 const T = struct {
947 a: i32,947 a: i32,
test/behavior/vector.zig+2-2
...@@ -101,7 +101,7 @@ test "vector float operators" {...@@ -101,7 +101,7 @@ test "vector float operators" {
101 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO101 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
102 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO102 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
103 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;103 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
104 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;104 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
105 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO105 if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
106106
107 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .aarch64) {107 if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .aarch64) {
...@@ -753,7 +753,7 @@ test "vector reduce operation" {...@@ -753,7 +753,7 @@ test "vector reduce operation" {
753 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO753 if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
754 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO754 if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
755 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;755 if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
756 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;756 if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
757 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;757 if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
758 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21091758 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21091
759759
test/c_abi/main.zig+3-3
...@@ -10,7 +10,7 @@ const builtin = @import("builtin");...@@ -10,7 +10,7 @@ const builtin = @import("builtin");
10const print = std.debug.print;10const print = std.debug.print;
11const expect = std.testing.expect;11const expect = std.testing.expect;
12const expectEqual = std.testing.expectEqual;12const expectEqual = std.testing.expectEqual;
13const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and13const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isArm() and
14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();14 !builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();
1515
16const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();16const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();
...@@ -181,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;...@@ -181,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
181extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;181extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
182182
183const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and183const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
184 !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();184 !builtin.cpu.arch.isArm() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
185185
186test "C ABI complex float" {186test "C ABI complex float" {
187 if (!complex_abi_compatible) return error.SkipZigTest;187 if (!complex_abi_compatible) return error.SkipZigTest;
...@@ -5553,7 +5553,7 @@ extern fn c_f16_struct(f16_struct) f16_struct;...@@ -5553,7 +5553,7 @@ extern fn c_f16_struct(f16_struct) f16_struct;
5553test "f16 struct" {5553test "f16 struct" {
5554 if (builtin.target.cpu.arch.isMIPS64()) return error.SkipZigTest;5554 if (builtin.target.cpu.arch.isMIPS64()) return error.SkipZigTest;
5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;5555 if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
5556 if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;5556 if (builtin.cpu.arch.isArm() and builtin.mode != .Debug) return error.SkipZigTest;
55575557
5558 const a = c_f16_struct(.{ .a = 12 });5558 const a = c_f16_struct(.{ .a = 12 });
5559 try expect(a.a == 34);5559 try expect(a.a == 34);