Commit c9e67e71c146d9a9c217d3f47e75258a1ffeedd9 | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2024-10-03 08:34:19+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2024-11-03 09:29:30+01:00
log	c9e67e71c146d9a9c217d3f47e75258a1ffeedd9
tree	4c39477d16c9dc77dd53a254d11d601025fb3919
parent	4e843b4e2b8c7cd48ecbd80a59036f1f72a997ca
signature	Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm().

The old isARM() function was a portability trap. With the name it had, it seemed
like the obviously correct function to use, but it didn't include Thumb. In the
vast majority of cases where someone wants to ask "is the target Arm?", Thumb
*should* be included.

There are exactly 3 cases in the codebase where we do actually need to exclude
Thumb, although one of those is in Aro and mirrors a check in Clang that is
itself likely a bug. These rare cases can just add an extra isThumb() check.

27 files changed, 64 insertions(+), 71 deletions(-)

lib
- compiler
  - aro
    aro
    toolchains
    Linux.zig
- compiler_rt
- std
  - Target.zig
  - math
    gamma.zig
    isnan.zig
  - os
    linux.zig
  - simd.zig
  - start.zig
  - zig
    system.zig
src
- codegen
  - c.zig
  - llvm.zig
- glibc.zig
- libunwind.zig
- link
  - Coff.zig
  - Elf.zig
test
- behavior
- c_abi
  - main.zig

lib/compiler/aro/aro/toolchains/Linux.zig+1-1

...	...	@@ -40,7 +40,7 @@ fn buildExtraOpts(self: Linux, tc: const Toolchain) !void {
40	40	self.extra_opts.appendAssumeCapacity("relro");
41	41	}
42	42
43		if (target.cpu.arch.isARM() or target.cpu.arch.isAARCH64() or is_android) {
	43	if ((target.cpu.arch.isArm() and !target.cpu.arch.isThumb()) or target.cpu.arch.isAARCH64() or is_android) {
44	44	try self.extra_opts.ensureUnusedCapacity(gpa, 2);
45	45	self.extra_opts.appendAssumeCapacity("-z");
46	46	self.extra_opts.appendAssumeCapacity("max-page-size=4096");

lib/compiler_rt/arm.zig+3-5

...	...	@@ -10,7 +10,7 @@ pub const panic = common.panic;
10	10
11	11	comptime {
12	12	if (!builtin.is_test) {
13		if (arch.isArmOrThumb()) {
	13	if (arch.isArm()) {
14	14	@export(&__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = common.linkage, .visibility = common.visibility });
15	15	@export(&__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = common.linkage, .visibility = common.visibility });
16	16	@export(&__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = common.linkage, .visibility = common.visibility });
...	...	@@ -206,7 +206,7 @@ fn __aeabi_drsub(a: f64, b: f64) callconv(.AAPCS) f64 {
206	206	}
207	207
208	208	test "__aeabi_frsub" {
209		if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
	209	if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest;
210	210	const inf32 = std.math.inf(f32);
211	211	const maxf32 = std.math.floatMax(f32);
212	212	const frsub_data = [_][3]f32{
...	...	@@ -226,14 +226,13 @@ test "__aeabi_frsub" {
226	226	[_]f32{ maxf32, -maxf32, -inf32 },
227	227	[_]f32{ -maxf32, maxf32, inf32 },
228	228	};
229		if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
230	229	for (frsub_data) \|data\| {
231	230	try std.testing.expectApproxEqAbs(data[2], __aeabi_frsub(data[0], data[1]), 0.001);
232	231	}
233	232	}
234	233
235	234	test "__aeabi_drsub" {
236		if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
	235	if (!builtin.cpu.arch.isArm() or builtin.cpu.arch.isThumb()) return error.SkipZigTest;
237	236	const inf64 = std.math.inf(f64);
238	237	const maxf64 = std.math.floatMax(f64);
239	238	const frsub_data = [_][3]f64{
...	...	@@ -253,7 +252,6 @@ test "__aeabi_drsub" {
253	252	[_]f64{ maxf64, -maxf64, -inf64 },
254	253	[_]f64{ -maxf64, maxf64, inf64 },
255	254	};
256		if (!builtin.cpu.arch.isARM()) return error.SkipZigTest;
257	255	for (frsub_data) \|data\| {
258	256	try std.testing.expectApproxEqAbs(data[2], __aeabi_drsub(data[0], data[1]), 0.000001);
259	257	}

lib/compiler_rt/clzsi2_test.zig+1-1

...	...	@@ -268,7 +268,7 @@ test "clzsi2" {
268	268	try test__clzsi2(0xFE000000, 0);
269	269	try test__clzsi2(0xFF000000, 0);
270	270	// arm and thumb1 assume input a != 0
271		if (!builtin.cpu.arch.isArmOrThumb())
	271	if (!builtin.cpu.arch.isArm())
272	272	try test__clzsi2(0x00000000, 32);
273	273	try test__clzsi2(0x00000001, 31);
274	274	try test__clzsi2(0x00000002, 30);

lib/compiler_rt/common.zig+1-1

...	...	@@ -29,7 +29,7 @@ pub const want_aeabi = switch (builtin.abi) {
29	29	},
30	30	else => false,
31	31	};
32		pub const want_mingw_arm_abi = builtin.cpu.arch.isArmOrThumb() and builtin.target.isMinGW();
	32	pub const want_mingw_arm_abi = builtin.cpu.arch.isArm() and builtin.target.isMinGW();
33	33
34	34	pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();
35	35

lib/std/Target.zig+7-10

...	...	@@ -1379,31 +1379,28 @@ pub const Cpu = struct {
1379	1379	};
1380	1380	}
1381	1381
1382		pub inline fn isARM(arch: Arch) bool {
	1382	/// Note that this includes Thumb.
	1383	pub inline fn isArm(arch: Arch) bool {
1383	1384	return switch (arch) {
1384	1385	.arm, .armeb => true,
1385		else => false,
	1386	else => arch.isThumb(),
1386	1387	};
1387	1388	}
1388	1389
1389		pub inline fn isAARCH64(arch: Arch) bool {
	1390	pub inline fn isThumb(arch: Arch) bool {
1390	1391	return switch (arch) {
1391		.aarch64, .aarch64_be => true,
	1392	.thumb, .thumbeb => true,
1392	1393	else => false,
1393	1394	};
1394	1395	}
1395	1396
1396		pub inline fn isThumb(arch: Arch) bool {
	1397	pub inline fn isAARCH64(arch: Arch) bool {
1397	1398	return switch (arch) {
1398		.thumb, .thumbeb => true,
	1399	.aarch64, .aarch64_be => true,
1399	1400	else => false,
1400	1401	};
1401	1402	}
1402	1403
1403		pub inline fn isArmOrThumb(arch: Arch) bool {
1404		return arch.isARM() or arch.isThumb();
1405		}
1406
1407	1404	pub inline fn isWasm(arch: Arch) bool {
1408	1405	return switch (arch) {
1409	1406	.wasm32, .wasm64 => true,

lib/std/math/gamma.zig+1-1

...	...	@@ -263,7 +263,7 @@ test gamma {
263	263	}
264	264
265	265	test "gamma.special" {
266		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	266	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
267	267
268	268	inline for (&.{ f32, f64 }) \|T\| {
269	269	try expect(std.math.isNan(gamma(T, -std.math.nan(T))));

lib/std/math/isnan.zig+1-1

...	...	@@ -32,7 +32,7 @@ test isSignalNan {
32	32	// TODO: Signalling NaN values get converted to quiet NaN values in
33	33	// some cases where they shouldn't such that this can fail.
34	34	// See https://github.com/ziglang/zig/issues/14366
35		if (!builtin.cpu.arch.isArmOrThumb() and
	35	if (!builtin.cpu.arch.isArm() and
36	36	!builtin.cpu.arch.isAARCH64() and
37	37	!builtin.cpu.arch.isPowerPC() and
38	38	builtin.zig_backend != .stage2_c)

lib/std/os/linux.zig+2-2

...	...	@@ -506,7 +506,7 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {
506	506	const require_aligned_register_pair =
507	507	builtin.cpu.arch.isPowerPC32() or
508	508	builtin.cpu.arch.isMIPS32() or
509		builtin.cpu.arch.isArmOrThumb();
	509	builtin.cpu.arch.isArm();
510	510
511	511	// Split a 64bit value into a {LSB,MSB} pair.
512	512	// The LE/BE variants specify the endianness to assume.
...	...	@@ -2331,7 +2331,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
2331	2331	}
2332	2332
2333	2333	pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
2334		if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) {
	2334	if (comptime native_arch.isArm() or native_arch.isPowerPC32()) {
2335	2335	// These architectures reorder the arguments so that a register is not skipped to align the
2336	2336	// register number that `offset` is passed in.
2337	2337

lib/std/simd.zig+1-1

...	...	@@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
18	18	if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
19	19	if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
20	20	if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
21		} else if (cpu.arch.isArmOrThumb()) {
	21	} else if (cpu.arch.isArm()) {
22	22	if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;
23	23	} else if (cpu.arch.isAARCH64()) {
24	24	// SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit

lib/std/start.zig+1-1

...	...	@@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {
495	495	// ARMv6 targets (and earlier) have no support for TLS in hardware.
496	496	// FIXME: Elide the check for targets >= ARMv7 when the target feature API
497	497	// becomes less verbose (and more usable).
498		if (comptime native_arch.isArmOrThumb()) {
	498	if (comptime native_arch.isArm()) {
499	499	if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {
500	500	// FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls
501	501	// For the time being use a simple trap instead of a @panic call to

lib/std/zig/system.zig+1-1

...	...	@@ -401,7 +401,7 @@ pub fn resolveTargetQuery(query: Target.Query) DetectError!Target {
401	401	}
402	402
403	403	// https://github.com/llvm/llvm-project/issues/105978
404		if (result.cpu.arch.isArmOrThumb() and result.floatAbi() == .soft) {
	404	if (result.cpu.arch.isArm() and result.floatAbi() == .soft) {
405	405	result.cpu.features.removeFeature(@intFromEnum(Target.arm.Feature.vfp2));
406	406	}
407	407

src/codegen/c.zig+1-1

...	...	@@ -5190,7 +5190,7 @@ fn asmInputNeedsLocal(f: *Function, constraint: []const u8, value: CValue) bool
5190	5190	return switch (constraint[0]) {
5191	5191	'{' => true,
5192	5192	'i', 'r' => false,
5193		'I' => !target.cpu.arch.isArmOrThumb(),
	5193	'I' => !target.cpu.arch.isArm(),
5194	5194	else => switch (value) {
5195	5195	.constant => \|val\| switch (dg.pt.zcu.intern_pool.indexToKey(val.toIntern())) {
5196	5196	.ptr => \|ptr\| if (ptr.byte_offset == 0) switch (ptr.base_addr) {

src/codegen/llvm.zig+3-3

...	...	@@ -494,7 +494,7 @@ const DataLayoutBuilder = struct {
494	494	if (idx != size) try writer.print(":{d}", .{idx});
495	495	}
496	496	}
497		if (self.target.cpu.arch.isArmOrThumb())
	497	if (self.target.cpu.arch.isArm())
498	498	try writer.writeAll("-Fi8") // for thumb interwork
499	499	else if (self.target.cpu.arch == .powerpc64 and
500	500	self.target.os.tag != .freebsd and
...	...	@@ -761,7 +761,7 @@ const DataLayoutBuilder = struct {
761	761	else => {},
762	762	}
763	763	},
764		.vector => if (self.target.cpu.arch.isArmOrThumb()) {
	764	.vector => if (self.target.cpu.arch.isArm()) {
765	765	switch (size) {
766	766	128 => abi = 64,
767	767	else => {},
...	...	@@ -827,7 +827,7 @@ const DataLayoutBuilder = struct {
827	827	else => {},
828	828	},
829	829	.aggregate => if (self.target.os.tag == .uefi or self.target.os.tag == .windows or
830		self.target.cpu.arch.isArmOrThumb())
	830	self.target.cpu.arch.isArm())
831	831	{
832	832	pref = @min(pref, self.target.ptrBitWidth());
833	833	} else switch (self.target.cpu.arch) {

src/glibc.zig+2-2

...	...	@@ -440,7 +440,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
440	440	try result.appendSlice("sparc" ++ s ++ "sparc32");
441	441	}
442	442	}
443		} else if (arch.isARM()) {
	443	} else if (arch.isArm()) {
444	444	try result.appendSlice("arm");
445	445	} else if (arch.isMIPS()) {
446	446	if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {
...	...	@@ -604,7 +604,7 @@ fn add_include_dirs_arch(
604	604	try args.append("-I");
605	605	try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));
606	606	}
607		} else if (arch.isARM()) {
	607	} else if (arch.isArm()) {
608	608	if (opt_nptl) \|nptl\| {
609	609	try args.append("-I");
610	610	try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));

src/libunwind.zig+1-1

...	...	@@ -136,7 +136,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
136	136	if (!comp.config.any_non_single_threaded) {
137	137	try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
138	138	}
139		if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) {
	139	if (target.cpu.arch.isArm() and target.abi.floatAbi() == .hard) {
140	140	try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
141	141	}
142	142	try cflags.append("-Wno-bitwise-conditional-parentheses");

src/link/Coff.zig+4-6

...	...	@@ -1865,12 +1865,10 @@ fn linkWithLLD(coff: *Coff, arena: Allocator, tid: Zcu.PerThread.Id, prog_node:
1865	1865	try argv.append("-MACHINE:X86");
1866	1866	} else if (target.cpu.arch == .x86_64) {
1867	1867	try argv.append("-MACHINE:X64");
1868		} else if (target.cpu.arch.isARM()) {
1869		if (target.ptrBitWidth() == 32) {
1870		try argv.append("-MACHINE:ARM");
1871		} else {
1872		try argv.append("-MACHINE:ARM64");
1873		}
	1868	} else if (target.cpu.arch == .thumb) {
	1869	try argv.append("-MACHINE:ARM");
	1870	} else if (target.cpu.arch == .aarch64) {
	1871	try argv.append("-MACHINE:ARM64");
1874	1872	}
1875	1873
1876	1874	for (comp.force_undefined_symbols.keys()) \|symbol\| {

src/link/Elf.zig+1-1

...	...	@@ -1823,7 +1823,7 @@ fn linkWithLLD(self: *Elf, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: s
1823	1823	}
1824	1824
1825	1825	if (link_mode == .static) {
1826		if (target.cpu.arch.isArmOrThumb()) {
	1826	if (target.cpu.arch.isArm()) {
1827	1827	try argv.append("-Bstatic");
1828	1828	} else {
1829	1829	try argv.append("-static");

test/behavior/cast.zig+2-2

...	...	@@ -124,7 +124,7 @@ test "@floatFromInt(f80)" {
124	124	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
125	125	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
126	126	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
127		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	127	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
128	128	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
129	129	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
130	130
...	...	@@ -1362,7 +1362,7 @@ test "cast f16 to wider types" {
1362	1362	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1363	1363	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1364	1364	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1365		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1365	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1366	1366	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1367	1367	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1368	1368

test/behavior/eval.zig+1-1

...	...	@@ -522,7 +522,7 @@ test "runtime 128 bit integer division" {
522	522	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
523	523	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
524	524	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
525		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	525	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
526	526	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
527	527	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
528	528

test/behavior/floatop.zig+7-7

...	...	@@ -126,7 +126,7 @@ test "cmp f16" {
126	126	if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
127	127	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
128	128	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
129		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	129	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
130	130
131	131	try testCmp(f16);
132	132	try comptime testCmp(f16);
...	...	@@ -135,7 +135,7 @@ test "cmp f16" {
135	135	test "cmp f32/f64" {
136	136	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
137	137	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
138		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	138	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
139	139
140	140	try testCmp(f32);
141	141	try comptime testCmp(f32);
...	...	@@ -146,7 +146,7 @@ test "cmp f32/f64" {
146	146	test "cmp f128" {
147	147	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
148	148	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
149		if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	149	if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
150	150	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
151	151	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
152	152	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
...	...	@@ -1009,7 +1009,7 @@ test "@abs f32/f64" {
1009	1009	test "@abs f80/f128/c_longdouble" {
1010	1010	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1011	1011	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1012		if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1012	if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1013	1013	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1014	1014	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1015	1015	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...	...	@@ -1134,7 +1134,7 @@ test "@floor f32/f64" {
1134	1134	test "@floor f80/f128/c_longdouble" {
1135	1135	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1136	1136	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1137		if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1137	if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1138	1138	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1139	1139	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1140	1140	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...	...	@@ -1232,7 +1232,7 @@ test "@ceil f32/f64" {
1232	1232	test "@ceil f80/f128/c_longdouble" {
1233	1233	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1234	1234	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1235		if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1235	if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1236	1236	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1237	1237	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1238	1238	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
...	...	@@ -1330,7 +1330,7 @@ test "@trunc f32/f64" {
1330	1330	test "@trunc f80/f128/c_longdouble" {
1331	1331	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1332	1332	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
1333		if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1333	if (builtin.zig_backend == .stage2_c and builtin.cpu.arch.isArm()) return error.SkipZigTest;
1334	1334	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1335	1335	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1336	1336	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;

test/behavior/math.zig+7-7

...	...	@@ -780,7 +780,7 @@ test "128-bit multiplication" {
780	780	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
781	781	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
782	782	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
783		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	783	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
784	784	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
785	785
786	786	{
...	...	@@ -1369,7 +1369,7 @@ test "remainder division" {
1369	1369	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1370	1370	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1371	1371	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1372		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1372	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1373	1373	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1374	1374
1375	1375	if (builtin.zig_backend == .stage2_llvm and builtin.os.tag == .windows) {
...	...	@@ -1522,7 +1522,7 @@ test "@round f80" {
1522	1522	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1523	1523	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1524	1524	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1525		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1525	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1526	1526	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1527	1527	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1528	1528
...	...	@@ -1535,7 +1535,7 @@ test "@round f128" {
1535	1535	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
1536	1536	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
1537	1537	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1538		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	1538	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
1539	1539	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1540	1540	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1541	1541
...	...	@@ -1579,7 +1579,7 @@ test "NaN comparison" {
1579	1579	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1580	1580	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1581	1581	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1582		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1582	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1583	1583
1584	1584	try testNanEqNan(f16);
1585	1585	try testNanEqNan(f32);
...	...	@@ -1735,7 +1735,7 @@ test "runtime comparison to NaN is comptime-known" {
1735	1735	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1736	1736	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1737	1737	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1738		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1738	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1739	1739
1740	1740	const S = struct {
1741	1741	fn doTheTest(comptime F: type, x: F) void {
...	...	@@ -1766,7 +1766,7 @@ test "runtime int comparison to inf is comptime-known" {
1766	1766	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1767	1767	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
1768	1768	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
1769		if (builtin.cpu.arch.isArmOrThumb() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
	1769	if (builtin.cpu.arch.isArm() and builtin.target.floatAbi() == .soft) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21234
1770	1770
1771	1771	const S = struct {
1772	1772	fn doTheTest(comptime F: type, x: u32) void {

test/behavior/maximum_minimum.zig+1-1

...	...	@@ -122,7 +122,7 @@ test "@min/max for floats" {
122	122	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
123	123	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
124	124	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
125		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	125	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
126	126	if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
127	127	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
128	128

test/behavior/muladd.zig+4-4

...	...	@@ -58,7 +58,7 @@ test "@mulAdd f80" {
58	58	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
59	59	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
60	60	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
61		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	61	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
62	62	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
63	63	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
64	64
...	...	@@ -79,7 +79,7 @@ test "@mulAdd f128" {
79	79	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
80	80	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
81	81	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
82		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	82	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
83	83	if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
84	84	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
85	85
...	...	@@ -189,7 +189,7 @@ test "vector f80" {
189	189	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
190	190	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
191	191	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
192		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	192	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
193	193	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
194	194
195	195	try comptime vector80();
...	...	@@ -216,7 +216,7 @@ test "vector f128" {
216	216	if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
217	217	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
218	218	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
219		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	219	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
220	220	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
221	221
222	222	try comptime vector128();

test/behavior/saturating_arithmetic.zig+2-2

...	...	@@ -164,7 +164,7 @@ test "saturating multiplication <= 32 bits" {
164	164	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
165	165	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
166	166	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
167		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	167	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
168	168	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
169	169
170	170	if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {
...	...	@@ -264,7 +264,7 @@ test "saturating multiplication" {
264	264	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
265	265	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
266	266	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
267		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	267	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
268	268	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
269	269
270	270	if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .wasm32) {

test/behavior/struct.zig+3-3

...	...	@@ -419,7 +419,7 @@ test "packed struct 24bits" {
419	419	if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
420	420	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
421	421	if (builtin.cpu.arch == .wasm32) return error.SkipZigTest; // TODO
422		if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO
	422	if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO
423	423	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
424	424	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
425	425
...	...	@@ -818,7 +818,7 @@ test "non-packed struct with u128 entry in union" {
818	818	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
819	819	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
820	820	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
821		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	821	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
822	822	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
823	823
824	824	const U = union(enum) {
...	...	@@ -941,7 +941,7 @@ test "tuple assigned to variable" {
941	941
942	942	test "comptime struct field" {
943	943	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
944		if (comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest; // TODO
	944	if (comptime builtin.cpu.arch.isArm()) return error.SkipZigTest; // TODO
945	945
946	946	const T = struct {
947	947	a: i32,

test/behavior/vector.zig+2-2

...	...	@@ -101,7 +101,7 @@ test "vector float operators" {
101	101	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
102	102	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
103	103	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
104		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	104	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
105	105	if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
106	106
107	107	if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .aarch64) {
...	...	@@ -753,7 +753,7 @@ test "vector reduce operation" {
753	753	if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
754	754	if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
755	755	if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
756		if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArmOrThumb()) return error.SkipZigTest;
	756	if (builtin.zig_backend == .stage2_c and comptime builtin.cpu.arch.isArm()) return error.SkipZigTest;
757	757	if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
758	758	if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21091
759	759

test/c_abi/main.zig+3-3

...	...	@@ -10,7 +10,7 @@ const builtin = @import("builtin");
10	10	const print = std.debug.print;
11	11	const expect = std.testing.expect;
12	12	const expectEqual = std.testing.expectEqual;
13		const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and
	13	const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isArm() and
14	14	!builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();
15	15
16	16	const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();
...	...	@@ -181,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
181	181	extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
182	182
183	183	const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
184		!builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
	184	!builtin.cpu.arch.isArm() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
185	185
186	186	test "C ABI complex float" {
187	187	if (!complex_abi_compatible) return error.SkipZigTest;
...	...	@@ -5553,7 +5553,7 @@ extern fn c_f16_struct(f16_struct) f16_struct;
5553	5553	test "f16 struct" {
5554	5554	if (builtin.target.cpu.arch.isMIPS64()) return error.SkipZigTest;
5555	5555	if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
5556		if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;
	5556	if (builtin.cpu.arch.isArm() and builtin.mode != .Debug) return error.SkipZigTest;
5557	5557
5558	5558	const a = c_f16_struct(.{ .a = 12 });
5559	5559	try expect(a.a == 34);