authorgravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-03 15:10:16+01:00
committergravatar for kubkon@jakubkonka.comJakub Konka <kubkon@jakubkonka.com> 2022-02-03 17:55:22+01:00
loge0b1170b676c04d1293970c717e13bdc01584671
tree30e369b2173470b0c399cfb4d7cbbdd518086265
parentcfceec15e10a30a595dbbb5300acdb2d17e16d75

x64: swap out register exceptions for freeze/unfreeze api

1 files changed, 99 insertions(+), 55 deletions(-)

src/arch/x86_64/CodeGen.zig+99-55
......@@ -21,7 +21,7 @@ const Emit = @import("Emit.zig");
2121const Liveness = @import("../../Liveness.zig");
2222const Mir = @import("Mir.zig");
2323const Module = @import("../../Module.zig");
24const RegisterManager = @import("../../register_manager.zig").RegisterManager;
24const RegisterManagerFn = @import("../../register_manager.zig").RegisterManager;
2525const Target = std.Target;
2626const Type = @import("../../type.zig").Type;
2727const TypedValue = @import("../../TypedValue.zig");
......@@ -33,6 +33,8 @@ const InnerError = error{
3333 CodegenFail,
3434};
3535
36const RegisterManager = RegisterManagerFn(Self, Register, &callee_preserved_regs);
37
3638gpa: Allocator,
3739air: Air,
3840liveness: Liveness,
......@@ -73,7 +75,7 @@ branch_stack: *std.ArrayList(Branch),
7375// Key is the block instruction
7476blocks: std.AutoHashMapUnmanaged(Air.Inst.Index, BlockData) = .{},
7577
76register_manager: RegisterManager(Self, Register, &callee_preserved_regs) = .{},
78register_manager: RegisterManager = .{},
7779/// Maps offset to what is stored there.
7880stack: std.AutoHashMapUnmanaged(u32, StackAllocation) = .{},
7981
......@@ -169,6 +171,24 @@ pub const MCValue = union(enum) {
169171 else => false,
170172 };
171173 }
174
175 fn freezeIfRegister(mcv: MCValue, mgr: *RegisterManager) void {
176 switch (mcv) {
177 .register => |reg| {
178 mgr.freezeRegs(&.{reg});
179 },
180 else => {},
181 }
182 }
183
184 fn unfreezeIfRegister(mcv: MCValue, mgr: *RegisterManager) void {
185 switch (mcv) {
186 .register => |reg| {
187 mgr.unfreezeRegs(&.{reg});
188 },
189 else => {},
190 }
191 }
172192};
173193
174194const Branch = struct {
......@@ -836,20 +856,6 @@ fn copyToNewRegister(self: *Self, reg_owner: Air.Inst.Index, ty: Type, mcv: MCVa
836856 return MCValue{ .register = reg };
837857}
838858
839/// Like `copyToNewRegister` but allows to specify a list of excluded registers which
840/// will not be selected for allocation. This can be done via `exceptions` slice.
841fn copyToNewRegisterWithExceptions(
842 self: *Self,
843 reg_owner: Air.Inst.Index,
844 ty: Type,
845 mcv: MCValue,
846 exceptions: []const Register,
847) !MCValue {
848 const reg = try self.register_manager.allocReg(reg_owner, exceptions);
849 try self.genSetReg(ty, reg, mcv);
850 return MCValue{ .register = reg };
851}
852
853859fn airAlloc(self: *Self, inst: Air.Inst.Index) !void {
854860 const stack_offset = try self.allocMemPtr(inst);
855861 return self.finishAir(inst, .{ .ptr_stack_offset = @intCast(i32, stack_offset) }, .{ .none, .none, .none });
......@@ -897,8 +903,9 @@ fn airIntCast(self: *Self, inst: Air.Inst.Index) !void {
897903 return self.fail("TODO implement intCast for abi sizes larger than 8", .{});
898904 }
899905
900 if (operand.isRegister()) self.register_manager.freezeRegs(&.{operand.register});
901 defer if (operand.isRegister()) self.register_manager.unfreezeRegs(&.{operand.register});
906 operand.freezeIfRegister(&self.register_manager);
907 defer operand.unfreezeIfRegister(&self.register_manager);
908
902909 break :blk try self.copyToNewRegister(inst, dest_ty, operand);
903910 };
904911
......@@ -1366,8 +1373,7 @@ fn airPtrSlicePtrPtr(self: *Self, inst: Air.Inst.Index) !void {
13661373}
13671374
13681375fn elemOffset(self: *Self, index_ty: Type, index: MCValue, elem_size: u64) !Register {
1369 const reg = try self.register_manager.allocReg(null, &.{});
1370 try self.genSetReg(index_ty, reg, index);
1376 const reg = try self.copyToTmpRegister(index_ty, index);
13711377 try self.genIMulOpMir(index_ty, .{ .register = reg }, .{ .immediate = elem_size });
13721378 return reg;
13731379}
......@@ -1376,16 +1382,26 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
13761382 const is_volatile = false; // TODO
13771383 const bin_op = self.air.instructions.items(.data)[inst].bin_op;
13781384 const result: MCValue = if (!is_volatile and self.liveness.isUnused(inst)) .dead else result: {
1379 const slice_mcv = try self.resolveInst(bin_op.lhs);
13801385 const slice_ty = self.air.typeOf(bin_op.lhs);
1386 const slice_mcv = try self.resolveInst(bin_op.lhs);
1387 slice_mcv.freezeIfRegister(&self.register_manager);
1388 defer slice_mcv.unfreezeIfRegister(&self.register_manager);
1389
13811390 const elem_ty = slice_ty.childType();
13821391 const elem_size = elem_ty.abiSize(self.target.*);
13831392 var buf: Type.SlicePtrFieldTypeBuffer = undefined;
13841393 const slice_ptr_field_type = slice_ty.slicePtrFieldType(&buf);
1394
13851395 const index_ty = self.air.typeOf(bin_op.rhs);
13861396 const index_mcv = try self.resolveInst(bin_op.rhs);
1397 index_mcv.freezeIfRegister(&self.register_manager);
1398 defer index_mcv.unfreezeIfRegister(&self.register_manager);
1399
13871400 const offset_reg = try self.elemOffset(index_ty, index_mcv, elem_size);
1388 const addr_reg = try self.register_manager.allocReg(null, &.{offset_reg});
1401 self.register_manager.freezeRegs(&.{offset_reg});
1402 defer self.register_manager.unfreezeRegs(&.{offset_reg});
1403
1404 const addr_reg = try self.register_manager.allocReg(null, &.{});
13891405 switch (slice_mcv) {
13901406 .stack_offset => |off| {
13911407 // mov reg, [rbp - 8]
......@@ -1401,7 +1417,7 @@ fn airSliceElemVal(self: *Self, inst: Air.Inst.Index) !void {
14011417 },
14021418 else => return self.fail("TODO implement slice_elem_val when slice is {}", .{slice_mcv}),
14031419 }
1404 // TODO we could allocate register here, but need to except addr register and potentially
1420 // TODO we could allocate register here, but need to expect addr register and potentially
14051421 // offset register.
14061422 const dst_mcv = try self.allocRegOrMem(inst, false);
14071423 try self.genBinMathOpMir(.add, slice_ptr_field_type, .{ .register = addr_reg.to64() }, .{
......@@ -1427,14 +1443,23 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void {
14271443 const bin_op = self.air.instructions.items(.data)[inst].bin_op;
14281444 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
14291445 const array_ty = self.air.typeOf(bin_op.lhs);
1430 const array = try self.resolveInst(bin_op.lhs);
14311446 const array_abi_size = array_ty.abiSize(self.target.*);
1447 const array = try self.resolveInst(bin_op.lhs);
1448 array.freezeIfRegister(&self.register_manager);
1449 defer array.unfreezeIfRegister(&self.register_manager);
1450
14321451 const elem_ty = array_ty.childType();
14331452 const elem_abi_size = elem_ty.abiSize(self.target.*);
14341453 const index_ty = self.air.typeOf(bin_op.rhs);
14351454 const index = try self.resolveInst(bin_op.rhs);
1455 index.freezeIfRegister(&self.register_manager);
1456 defer index.unfreezeIfRegister(&self.register_manager);
1457
14361458 const offset_reg = try self.elemOffset(index_ty, index, elem_abi_size);
1437 const addr_reg = try self.register_manager.allocReg(null, &.{offset_reg});
1459 self.register_manager.freezeRegs(&.{offset_reg});
1460 defer self.register_manager.unfreezeRegs(&.{offset_reg});
1461
1462 const addr_reg = try self.register_manager.allocReg(null, &.{});
14381463 switch (array) {
14391464 .stack_offset => |off| {
14401465 // lea reg, [rbp]
......@@ -1449,7 +1474,7 @@ fn airArrayElemVal(self: *Self, inst: Air.Inst.Index) !void {
14491474 },
14501475 else => return self.fail("TODO implement array_elem_val when array is {}", .{array}),
14511476 }
1452 // TODO we could allocate register here, but need to except addr register and potentially
1477 // TODO we could allocate register here, but need to expect addr register and potentially
14531478 // offset register.
14541479 const dst_mcv = try self.allocRegOrMem(inst, false);
14551480 try self.genBinMathOpMir(.add, array_ty, .{ .register = addr_reg.to64() }, .{ .register = offset_reg.to64() });
......@@ -1475,12 +1500,17 @@ fn airPtrElemPtr(self: *Self, inst: Air.Inst.Index) !void {
14751500 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
14761501 const ptr_ty = self.air.typeOf(extra.lhs);
14771502 const ptr = try self.resolveInst(extra.lhs);
1503 ptr.freezeIfRegister(&self.register_manager);
1504 defer ptr.unfreezeIfRegister(&self.register_manager);
1505
14781506 const elem_ty = ptr_ty.elemType2();
14791507 const elem_abi_size = elem_ty.abiSize(self.target.*);
14801508 const index_ty = self.air.typeOf(extra.rhs);
14811509 const index = try self.resolveInst(extra.rhs);
1482 const offset_reg = try self.elemOffset(index_ty, index, elem_abi_size);
1510 index.freezeIfRegister(&self.register_manager);
1511 defer index.unfreezeIfRegister(&self.register_manager);
14831512
1513 const offset_reg = try self.elemOffset(index_ty, index, elem_abi_size);
14841514 self.register_manager.freezeRegs(&.{offset_reg});
14851515 defer self.register_manager.unfreezeRegs(&.{offset_reg});
14861516
......@@ -1587,6 +1617,9 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
15871617 return self.fail("TODO implement loading from MCValue.embedded_in_code", .{});
15881618 },
15891619 .register => |reg| {
1620 self.register_manager.freezeRegs(&.{reg});
1621 defer self.register_manager.unfreezeRegs(&.{reg});
1622
15901623 switch (dst_mcv) {
15911624 .dead => unreachable,
15921625 .undef => unreachable,
......@@ -1607,16 +1640,15 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
16071640 },
16081641 .stack_offset => |off| {
16091642 if (abi_size <= 8) {
1610 const tmp_reg = try self.register_manager.allocReg(null, &.{reg});
1643 const tmp_reg = try self.register_manager.allocReg(null, &.{});
16111644 try self.load(.{ .register = tmp_reg }, ptr, ptr_ty);
16121645 return self.genSetStack(elem_ty, off, MCValue{ .register = tmp_reg });
16131646 }
16141647
1615 const regs = try self.register_manager.allocRegs(
1616 3,
1617 .{ null, null, null },
1618 &.{ reg, .rax, .rcx },
1619 );
1648 self.register_manager.freezeRegs(&.{ .rax, .rcx });
1649 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx });
1650
1651 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
16201652 const addr_reg = regs[0];
16211653 const count_reg = regs[1];
16221654 const tmp_reg = regs[2];
......@@ -1634,7 +1666,7 @@ fn load(self: *Self, dst_mcv: MCValue, ptr: MCValue, ptr_ty: Type) InnerError!vo
16341666 try self.register_manager.getReg(.rcx, null);
16351667
16361668 // TODO allow for abi size to be u64
1637 try self.genSetReg(Type.initTag(.u32), count_reg, .{ .immediate = @intCast(u32, abi_size) });
1669 try self.genSetReg(Type.u32, count_reg, .{ .immediate = @intCast(u32, abi_size) });
16381670
16391671 return self.genInlineMemcpy(
16401672 -(off + @intCast(i32, abi_size)),
......@@ -1786,8 +1818,8 @@ fn store(self: *Self, ptr: MCValue, value: MCValue, ptr_ty: Type, value_ty: Type
17861818 // TODO: in case the address fits in an imm32 we can use [ds:imm32]
17871819 // instead of wasting an instruction copying the address to a register
17881820
1789 if (value.isRegister()) self.register_manager.freezeRegs(&.{value.register});
1790 defer if (value.isRegister()) self.register_manager.unfreezeRegs(&.{value.register});
1821 value.freezeIfRegister(&self.register_manager);
1822 defer value.unfreezeIfRegister(&self.register_manager);
17911823
17921824 const addr_reg = try self.copyToTmpRegister(ptr_ty, .{ .immediate = addr });
17931825 // to get the actual address of the value we want to modify we have to go through the GOT
......@@ -2012,22 +2044,16 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs:
20122044 }
20132045 } else {
20142046 if (lhs.isMemory()) {
2015 dst_mcv = if (rhs.isRegister())
2016 // If the allocated register is the same as the rhs register, don't allocate that one
2017 // and instead spill a subsequent one. Otherwise, this can result in a miscompilation
2018 // in the presence of several binary operations performed in a single block.
2019 try self.copyToNewRegisterWithExceptions(inst, dst_ty, lhs, &.{rhs.register})
2020 else
2021 try self.copyToNewRegister(inst, dst_ty, lhs);
2047 rhs.freezeIfRegister(&self.register_manager);
2048 defer rhs.unfreezeIfRegister(&self.register_manager);
2049
2050 dst_mcv = try self.copyToNewRegister(inst, dst_ty, lhs);
20222051 src_mcv = rhs;
20232052 } else {
2024 dst_mcv = if (lhs.isRegister())
2025 // If the allocated register is the same as the rhs register, don't allocate that one
2026 // and instead spill a subsequent one. Otherwise, this can result in a miscompilation
2027 // in the presence of several binary operations performed in a single block.
2028 try self.copyToNewRegisterWithExceptions(inst, dst_ty, rhs, &.{lhs.register})
2029 else
2030 try self.copyToNewRegister(inst, dst_ty, rhs);
2053 lhs.freezeIfRegister(&self.register_manager);
2054 defer lhs.unfreezeIfRegister(&self.register_manager);
2055
2056 dst_mcv = try self.copyToNewRegister(inst, dst_ty, rhs);
20312057 src_mcv = lhs;
20322058 }
20332059 }
......@@ -2039,7 +2065,11 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs:
20392065 switch (src_mcv) {
20402066 .immediate => |imm| {
20412067 if (imm > math.maxInt(u31)) {
2042 src_mcv = MCValue{ .register = try self.copyToTmpRegister(Type.initTag(.u64), src_mcv) };
2068 dst_mcv.freezeIfRegister(&self.register_manager);
2069 defer dst_mcv.unfreezeIfRegister(&self.register_manager);
2070
2071 const tmp_reg = try self.copyToTmpRegister(Type.u64, src_mcv);
2072 src_mcv = MCValue{ .register = tmp_reg };
20432073 }
20442074 },
20452075 else => {},
......@@ -2901,6 +2931,8 @@ fn airIsNullPtr(self: *Self, inst: Air.Inst.Index) !void {
29012931 const un_op = self.air.instructions.items(.data)[inst].un_op;
29022932 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
29032933 const operand_ptr = try self.resolveInst(un_op);
2934 operand_ptr.freezeIfRegister(&self.register_manager);
2935 defer operand_ptr.unfreezeIfRegister(&self.register_manager);
29042936 const operand: MCValue = blk: {
29052937 if (self.reuseOperand(inst, un_op, 0, operand_ptr)) {
29062938 // The MCValue that holds the pointer can be re-used as the value.
......@@ -2930,6 +2962,8 @@ fn airIsNonNullPtr(self: *Self, inst: Air.Inst.Index) !void {
29302962 const un_op = self.air.instructions.items(.data)[inst].un_op;
29312963 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
29322964 const operand_ptr = try self.resolveInst(un_op);
2965 operand_ptr.freezeIfRegister(&self.register_manager);
2966 defer operand_ptr.unfreezeIfRegister(&self.register_manager);
29332967 const operand: MCValue = blk: {
29342968 if (self.reuseOperand(inst, un_op, 0, operand_ptr)) {
29352969 // The MCValue that holds the pointer can be re-used as the value.
......@@ -2959,6 +2993,8 @@ fn airIsErrPtr(self: *Self, inst: Air.Inst.Index) !void {
29592993 const un_op = self.air.instructions.items(.data)[inst].un_op;
29602994 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
29612995 const operand_ptr = try self.resolveInst(un_op);
2996 operand_ptr.freezeIfRegister(&self.register_manager);
2997 defer operand_ptr.unfreezeIfRegister(&self.register_manager);
29622998 const operand: MCValue = blk: {
29632999 if (self.reuseOperand(inst, un_op, 0, operand_ptr)) {
29643000 // The MCValue that holds the pointer can be re-used as the value.
......@@ -2988,6 +3024,8 @@ fn airIsNonErrPtr(self: *Self, inst: Air.Inst.Index) !void {
29883024 const un_op = self.air.instructions.items(.data)[inst].un_op;
29893025 const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
29903026 const operand_ptr = try self.resolveInst(un_op);
3027 operand_ptr.freezeIfRegister(&self.register_manager);
3028 defer operand_ptr.unfreezeIfRegister(&self.register_manager);
29913029 const operand: MCValue = blk: {
29923030 if (self.reuseOperand(inst, un_op, 0, operand_ptr)) {
29933031 // The MCValue that holds the pointer can be re-used as the value.
......@@ -3345,7 +3383,10 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
33453383 return self.genSetStackArg(ty, stack_offset, MCValue{ .register = reg });
33463384 }
33473385
3348 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{ .rax, .rcx });
3386 self.register_manager.freezeRegs(&.{ .rax, .rcx });
3387 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx });
3388
3389 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
33493390 const addr_reg = regs[0];
33503391 const count_reg = regs[1];
33513392 const tmp_reg = regs[2];
......@@ -3363,7 +3404,7 @@ fn genSetStackArg(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerE
33633404 });
33643405
33653406 // TODO allow for abi_size to be u64
3366 try self.genSetReg(Type.initTag(.u32), count_reg, .{ .immediate = @intCast(u32, abi_size) });
3407 try self.genSetReg(Type.u32, count_reg, .{ .immediate = @intCast(u32, abi_size) });
33673408 try self.genInlineMemcpy(
33683409 -(stack_offset + @intCast(i32, abi_size)),
33693410 .rsp,
......@@ -3510,7 +3551,10 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
35103551 return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
35113552 }
35123553
3513 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{ .rax, .rcx, .rbp });
3554 self.register_manager.freezeRegs(&.{ .rax, .rcx, .rbp });
3555 defer self.register_manager.unfreezeRegs(&.{ .rax, .rcx, .rbp });
3556
3557 const regs = try self.register_manager.allocRegs(3, .{ null, null, null }, &.{});
35143558 const addr_reg = regs[0];
35153559 const count_reg = regs[1];
35163560 const tmp_reg = regs[2];
......@@ -3528,7 +3572,7 @@ fn genSetStack(self: *Self, ty: Type, stack_offset: i32, mcv: MCValue) InnerErro
35283572 });
35293573
35303574 // TODO allow for abi_size to be u64
3531 try self.genSetReg(Type.initTag(.u32), count_reg, .{ .immediate = @intCast(u32, abi_size) });
3575 try self.genSetReg(Type.u32, count_reg, .{ .immediate = @intCast(u32, abi_size) });
35323576
35333577 return self.genInlineMemcpy(
35343578 -(stack_offset + @intCast(i32, abi_size)),