authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-27 13:32:39-05:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2020-01-27 13:32:39-05:00
loge2778c03e07c23d60861b90474859b9d8a62bce8
treeacd9f43605fcbea6fe9d1edf4694081fc003f819
parent1a08c0d40b8c6e72532762281365a5105116dc00
parentd8965002593c111069862e7de06402ee77b2b614
signature Commit is signed but in an unrecognized format.

Merge branch 'master' into ir-clean-up-vars

100 files changed, 28526 insertions(+), 11063 deletions(-)

CMakeLists.txt+18-12
......@@ -608,25 +608,25 @@ else()
608608 set(LIBUSERLAND_RELEASE_MODE "true")
609609endif()
610610
611set(BUILD_LIBUSERLAND_COMMAND zig0 build
612 --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
613 "-Doutput-dir=${CMAKE_BINARY_DIR}"
614 "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
615 "-Dlib-files-only"
616 --prefix "${CMAKE_INSTALL_PREFIX}"
617 libuserland
611set(BUILD_LIBUSERLAND_ARGS "build"
612 --override-lib-dir "${CMAKE_SOURCE_DIR}/lib"
613 "-Doutput-dir=${CMAKE_BINARY_DIR}"
614 "-Drelease=${LIBUSERLAND_RELEASE_MODE}"
615 "-Dlib-files-only"
616 --prefix "${CMAKE_INSTALL_PREFIX}"
617 libuserland
618618)
619619
620620# When using Visual Studio build system generator we default to libuserland install.
621621if(MSVC)
622622 set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Disable copying lib/ files to install prefix")
623623 if(NOT ZIG_SKIP_INSTALL_LIB_FILES)
624 set(BUILD_LIBUSERLAND_COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)
624 set(BUILD_LIBUSERLAND_ARGS ${BUILD_LIBUSERLAND_ARGS} install)
625625 endif()
626626endif()
627627
628628add_custom_target(zig_build_libuserland ALL
629 COMMAND ${BUILD_LIBUSERLAND_COMMAND}
629 COMMAND zig0 ${BUILD_LIBUSERLAND_ARGS}
630630 DEPENDS zig0
631631 BYPRODUCTS "${LIBUSERLAND}"
632632 WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
......@@ -647,6 +647,12 @@ add_dependencies(zig zig_build_libuserland)
647647
648648install(TARGETS zig DESTINATION bin)
649649
650# CODE has no effect with Visual Studio build system generator
651install(CODE "message(\"-- Installing: /opt/zig/lib\")")
652install(CODE "execute_process(COMMAND ${BUILD_LIBUSERLAND_COMMAND} install)")
650# CODE has no effect with Visual Studio build system generator.
651if(NOT MSVC)
652 get_target_property(zig0_BINARY_DIR zig0 BINARY_DIR)
653 install(CODE "set(zig0_EXE \"${zig0_BINARY_DIR}/zig0\")")
654 install(CODE "set(INSTALL_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\" install)")
655 install(CODE "set(BUILD_LIBUSERLAND_ARGS \"${BUILD_LIBUSERLAND_ARGS}\")")
656 install(CODE "set(CMAKE_SOURCE_DIR \"${CMAKE_SOURCE_DIR}\")")
657 install(SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/cmake/install.cmake)
658endif()
CONTRIBUTING.md+20-15
......@@ -51,23 +51,28 @@ knowledge of Zig internals.**
5151
5252### Editing Source Code
5353
54First, build the Stage 1 compiler as described in [the Building section](#building).
55
56One modification you may want to make is adding `-DZIG_SKIP_INSTALL_LIB_FILES=ON`
57to the cmake line. If you use the build directory as a working directory to run
58tests with, zig will find the lib files in the source directory, and they will not
59be "installed" every time you run `make`. This will allow you to make modifications
60directly to the standard library, for example, and have them effective immediately.
61Note that if you already ran `make` or `make install` with the default cmake
62settings, there will already be a `lib/` directory in your build directory. When
63executed from the build directory, zig will find this instead of the source lib/
64directory. Remove the unwanted directory so that the desired one can be found.
54First, build the Stage 1 compiler as described in [Building from Source](README.md#Building-from-Source).
55
56Zig locates lib files relative to executable path by searching up the
57filesystem tree for a sub-path of `lib/zig/std/std.zig` or `lib/std/std.zig`.
58Typically the former is an install and the latter a git working tree which
59contains the build directory.
60
61During development it is not necessary to perform installs when modifying
62stage1 or userland sources and in fact it is faster and simpler to run,
63test and debug from a git working tree.
64
65- `make` is typically sufficient to build zig during development iterations.
66- `make install` performs a build __and__ install.
67- `msbuild -p:Configuration=Release INSTALL.vcxproj` on Windows performs a
68build and install. To avoid install, pass cmake option `-DZIG_SKIP_INSTALL_LIB_FILES=ON`.
6569
6670To test changes, do the following from the build directory:
6771
681. Run `make install` (on POSIX) or
721. Run `make` (on POSIX) or
6973 `msbuild -p:Configuration=Release INSTALL.vcxproj` (on Windows).
702. `bin/zig build test` (on POSIX) or `bin\zig.exe build test` (on Windows).
742. `$BUILD_DIR/zig build test` (on POSIX) or
75 `$BUILD_DIR/Release\zig.exe build test` (on Windows).
7176
7277That runs the whole test suite, which does a lot of extra testing that you
7378likely won't always need, and can take upwards of 1 hour. This is what the
......@@ -85,8 +90,8 @@ Another example is choosing a different set of things to test. For example,
8590not the other ones. Combining this suggestion with the previous one, you could
8691do this:
8792
88`bin/zig build test-std -Dskip-release` (on POSIX) or
89`bin\zig.exe build test-std -Dskip-release` (on Windows).
93`$BUILD_DIR/bin/zig build test-std -Dskip-release` (on POSIX) or
94`$BUILD_DIR/Release\zig.exe build test-std -Dskip-release` (on Windows).
9095
9196This will run only the standard library tests, in debug mode only, for all
9297targets (it will cross-compile the tests for non-native targets but not run
cmake/install.cmake created+37
......@@ -0,0 +1,37 @@
1message("-- Installing: ${CMAKE_INSTALL_PREFIX}/lib")
2
3if(NOT EXISTS ${zig0_EXE})
4 message("::")
5 message(":: ERROR: Executable not found")
6 message(":: (execute_process)")
7 message("::")
8 message(":: executable: ${zig0_EXE}")
9 message("::")
10 message(FATAL_ERROR)
11endif()
12
13execute_process(COMMAND ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS}
14 WORKING_DIRECTORY ${CMAKE_SOURCE_DIR}
15 RESULT_VARIABLE _result
16)
17if(_result)
18 message("::")
19 message(":: ERROR: ${_result}")
20 message(":: (execute_process)")
21
22 string(REPLACE ";" " " s_INSTALL_LIBUSERLAND_ARGS "${INSTALL_LIBUSERLAND_ARGS}")
23 message("::")
24 message(":: argv: ${zig0_EXE} ${s_INSTALL_LIBUSERLAND_ARGS} install")
25
26 set(_args ${zig0_EXE} ${INSTALL_LIBUSERLAND_ARGS})
27 list(LENGTH _args _len)
28 math(EXPR _len "${_len} - 1")
29 message("::")
30 foreach(_i RANGE 0 ${_len})
31 list(GET _args ${_i} _arg)
32 message(":: argv[${_i}]: ${_arg}")
33 endforeach()
34
35 message("::")
36 message(FATAL_ERROR)
37endif()
doc/langref.html.in+41
......@@ -2893,6 +2893,47 @@ test "switch using enum literals" {
28932893}
28942894 {#code_end#}
28952895 {#header_close#}
2896
2897 {#header_open|Non-exhaustive enum#}
2898 <p>
2899 A Non-exhaustive enum can be created by adding a trailing '_' field.
2900 It must specify a tag type and cannot consume every enumeration value.
2901 </p>
2902 <p>
2903 {#link|@intToEnum#} on a non-exhaustive enum cannot fail.
2904 </p>
2905 <p>
2906 A switch on a non-exhaustive enum can include a '_' prong as an alternative to an {#syntax#}else{#endsyntax#} prong
2907 with the difference being that it makes it a compile error if all the known tag names are not handled by the switch.
2908 </p>
2909 {#code_begin|test#}
2910const std = @import("std");
2911const assert = std.debug.assert;
2912
2913const Number = enum(u8) {
2914 One,
2915 Two,
2916 Three,
2917 _,
2918};
2919
2920test "switch on non-exhaustive enum" {
2921 const number = Number.One;
2922 const result = switch (number) {
2923 .One => true,
2924 .Two,
2925 .Three => false,
2926 _ => false,
2927 };
2928 assert(result);
2929 const is_one = switch (number) {
2930 .One => true,
2931 else => false,
2932 };
2933 assert(is_one);
2934}
2935 {#code_end#}
2936 {#header_close#}
28962937 {#header_close#}
28972938
28982939 {#header_open|union#}
lib/std/buffer.zig+3-3
......@@ -57,11 +57,11 @@ pub const Buffer = struct {
5757
5858 /// The caller owns the returned memory. The Buffer becomes null and
5959 /// is safe to `deinit`.
60 pub fn toOwnedSlice(self: *Buffer) []u8 {
60 pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
6161 const allocator = self.list.allocator;
62 const result = allocator.shrink(self.list.items, self.len());
62 const result = self.list.toOwnedSlice();
6363 self.* = initNull(allocator);
64 return result;
64 return result[0 .. result.len - 1 :0];
6565 }
6666
6767 pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {
lib/std/build.zig+43-2
......@@ -484,6 +484,7 @@ pub const Builder = struct {
484484 .arch = builtin.arch,
485485 .os = builtin.os,
486486 .abi = builtin.abi,
487 .cpu_features = builtin.cpu_features,
487488 },
488489 }).linuxTriple(self.allocator);
489490
......@@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {
13751376 .arch = target_arch,
13761377 .os = target_os,
13771378 .abi = target_abi,
1379 .cpu_features = target_arch.getBaselineCpuFeatures(),
13781380 },
13791381 });
13801382 }
......@@ -1687,7 +1689,9 @@ pub const LibExeObjStep = struct {
16871689 }
16881690
16891691 pub fn addAssemblyFile(self: *LibExeObjStep, path: []const u8) void {
1690 self.link_objects.append(LinkObject{ .AssemblyFile = self.builder.dupe(path) }) catch unreachable;
1692 self.link_objects.append(LinkObject{
1693 .AssemblyFile = .{ .path = self.builder.dupe(path) },
1694 }) catch unreachable;
16911695 }
16921696
16931697 pub fn addAssemblyFileFromWriteFileStep(self: *LibExeObjStep, wfs: *WriteFileStep, basename: []const u8) void {
......@@ -1968,9 +1972,46 @@ pub const LibExeObjStep = struct {
19681972
19691973 switch (self.target) {
19701974 .Native => {},
1971 .Cross => {
1975 .Cross => |cross| {
19721976 try zig_args.append("-target");
19731977 try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);
1978
1979 const all_features = self.target.getArch().allFeaturesList();
1980 var populated_cpu_features = cross.cpu_features.cpu.features;
1981 populated_cpu_features.populateDependencies(all_features);
1982
1983 if (populated_cpu_features.eql(cross.cpu_features.features)) {
1984 // The CPU name alone is sufficient.
1985 // If it is the baseline CPU, no command line args are required.
1986 if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
1987 try zig_args.append("-target-cpu");
1988 try zig_args.append(cross.cpu_features.cpu.name);
1989 }
1990 } else {
1991 try zig_args.append("-target-cpu");
1992 try zig_args.append(cross.cpu_features.cpu.name);
1993
1994 try zig_args.append("-target-feature");
1995 var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
1996 for (all_features) |feature, i_usize| {
1997 const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
1998 const in_cpu_set = populated_cpu_features.isEnabled(i);
1999 const in_actual_set = cross.cpu_features.features.isEnabled(i);
2000 if (in_cpu_set and !in_actual_set) {
2001 try feature_str_buffer.appendByte('-');
2002 try feature_str_buffer.append(feature.name);
2003 try feature_str_buffer.appendByte(',');
2004 } else if (!in_cpu_set and in_actual_set) {
2005 try feature_str_buffer.appendByte('+');
2006 try feature_str_buffer.append(feature.name);
2007 try feature_str_buffer.appendByte(',');
2008 }
2009 }
2010 if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
2011 feature_str_buffer.shrink(feature_str_buffer.len() - 1);
2012 }
2013 try zig_args.append(feature_str_buffer.toSliceConst());
2014 }
19742015 },
19752016 }
19762017
lib/std/builtin.zig+10
......@@ -1,5 +1,8 @@
11pub usingnamespace @import("builtin");
22
3/// Deprecated: use `std.Target.Os`.
4pub const Target = std.Target;
5
36/// Deprecated: use `std.Target.Os`.
47pub const Os = std.Target.Os;
58
......@@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
1518/// Deprecated: use `std.Target.SubSystem`.
1619pub const SubSystem = std.Target.SubSystem;
1720
21/// Deprecated: use `std.Target.CpuFeatures`.
22pub const CpuFeatures = std.Target.CpuFeatures;
23
24/// Deprecated: use `std.Target.Cpu`.
25pub const Cpu = std.Target.Cpu;
26
1827/// `explicit_subsystem` is missing when the subsystem is automatically detected,
1928/// so Zig standard library has the subsystem detection logic here. This should generally be
2029/// used rather than `explicit_subsystem`.
......@@ -254,6 +263,7 @@ pub const TypeInfo = union(enum) {
254263 tag_type: type,
255264 fields: []EnumField,
256265 decls: []Declaration,
266 is_exhaustive: bool,
257267 };
258268
259269 /// This data structure is used by the Zig language code generation and
lib/std/c.zig+3-3
......@@ -185,7 +185,7 @@ pub extern "c" fn getaddrinfo(
185185 noalias service: [*:0]const u8,
186186 noalias hints: *const addrinfo,
187187 noalias res: **addrinfo,
188) c_int;
188) EAI;
189189
190190pub extern "c" fn freeaddrinfo(res: *addrinfo) void;
191191
......@@ -197,9 +197,9 @@ pub extern "c" fn getnameinfo(
197197 noalias serv: [*]u8,
198198 servlen: socklen_t,
199199 flags: u32,
200) c_int;
200) EAI;
201201
202pub extern "c" fn gai_strerror(errcode: c_int) [*:0]const u8;
202pub extern "c" fn gai_strerror(errcode: EAI) [*:0]const u8;
203203
204204pub extern "c" fn poll(fds: [*]pollfd, nfds: nfds_t, timeout: c_int) c_int;
205205
lib/std/c/darwin.zig+36-28
......@@ -7,7 +7,10 @@ usingnamespace @import("../os/bits.zig");
77
88extern "c" fn __error() *c_int;
99pub extern "c" fn _NSGetExecutablePath(buf: [*]u8, bufsize: *u32) c_int;
10pub extern "c" fn _dyld_image_count() u32;
1011pub extern "c" fn _dyld_get_image_header(image_index: u32) ?*mach_header;
12pub extern "c" fn _dyld_get_image_vmaddr_slide(image_index: u32) usize;
13pub extern "c" fn _dyld_get_image_name(image_index: u32) [*:0]const u8;
1114
1215pub extern "c" fn __getdirentries64(fd: c_int, buf_ptr: [*]u8, buf_len: usize, basep: *i64) isize;
1316
......@@ -70,47 +73,52 @@ pub const AI_NUMERICHOST = 0x00000004;
7073/// prevent service name resolution
7174pub const AI_NUMERICSERV = 0x00001000;
7275
73/// address family for hostname not supported
74pub const EAI_ADDRFAMILY = 1;
76pub const EAI = extern enum(c_int) {
77 /// address family for hostname not supported
78 ADDRFAMILY = 1,
7579
76/// temporary failure in name resolution
77pub const EAI_AGAIN = 2;
80 /// temporary failure in name resolution
81 AGAIN = 2,
7882
79/// invalid value for ai_flags
80pub const EAI_BADFLAGS = 3;
83 /// invalid value for ai_flags
84 BADFLAGS = 3,
8185
82/// non-recoverable failure in name resolution
83pub const EAI_FAIL = 4;
86 /// non-recoverable failure in name resolution
87 FAIL = 4,
8488
85/// ai_family not supported
86pub const EAI_FAMILY = 5;
89 /// ai_family not supported
90 FAMILY = 5,
8791
88/// memory allocation failure
89pub const EAI_MEMORY = 6;
92 /// memory allocation failure
93 MEMORY = 6,
9094
91/// no address associated with hostname
92pub const EAI_NODATA = 7;
95 /// no address associated with hostname
96 NODATA = 7,
9397
94/// hostname nor servname provided, or not known
95pub const EAI_NONAME = 8;
98 /// hostname nor servname provided, or not known
99 NONAME = 8,
96100
97/// servname not supported for ai_socktype
98pub const EAI_SERVICE = 9;
101 /// servname not supported for ai_socktype
102 SERVICE = 9,
99103
100/// ai_socktype not supported
101pub const EAI_SOCKTYPE = 10;
104 /// ai_socktype not supported
105 SOCKTYPE = 10,
102106
103/// system error returned in errno
104pub const EAI_SYSTEM = 11;
107 /// system error returned in errno
108 SYSTEM = 11,
105109
106/// invalid value for hints
107pub const EAI_BADHINTS = 12;
110 /// invalid value for hints
111 BADHINTS = 12,
108112
109/// resolved protocol is unknown
110pub const EAI_PROTOCOL = 13;
113 /// resolved protocol is unknown
114 PROTOCOL = 13,
115
116 /// argument buffer overflow
117 OVERFLOW = 14,
118
119 _,
120};
111121
112/// argument buffer overflow
113pub const EAI_OVERFLOW = 14;
114122pub const EAI_MAX = 15;
115123
116124pub const pthread_mutex_t = extern struct {
lib/std/c/freebsd.zig+32-28
......@@ -23,47 +23,51 @@ pub const pthread_attr_t = extern struct {
2323 __align: c_long,
2424};
2525
26/// address family for hostname not supported
27pub const EAI_ADDRFAMILY = 1;
26pub const EAI = extern enum(c_int) {
27 /// address family for hostname not supported
28 ADDRFAMILY = 1,
2829
29/// name could not be resolved at this time
30pub const EAI_AGAIN = 2;
30 /// name could not be resolved at this time
31 AGAIN = 2,
3132
32/// flags parameter had an invalid value
33pub const EAI_BADFLAGS = 3;
33 /// flags parameter had an invalid value
34 BADFLAGS = 3,
3435
35/// non-recoverable failure in name resolution
36pub const EAI_FAIL = 4;
36 /// non-recoverable failure in name resolution
37 FAIL = 4,
3738
38/// address family not recognized
39pub const EAI_FAMILY = 5;
39 /// address family not recognized
40 FAMILY = 5,
4041
41/// memory allocation failure
42pub const EAI_MEMORY = 6;
42 /// memory allocation failure
43 MEMORY = 6,
4344
44/// no address associated with hostname
45pub const EAI_NODATA = 7;
45 /// no address associated with hostname
46 NODATA = 7,
4647
47/// name does not resolve
48pub const EAI_NONAME = 8;
48 /// name does not resolve
49 NONAME = 8,
4950
50/// service not recognized for socket type
51pub const EAI_SERVICE = 9;
51 /// service not recognized for socket type
52 SERVICE = 9,
5253
53/// intended socket type was not recognized
54pub const EAI_SOCKTYPE = 10;
54 /// intended socket type was not recognized
55 SOCKTYPE = 10,
5556
56/// system error returned in errno
57pub const EAI_SYSTEM = 11;
57 /// system error returned in errno
58 SYSTEM = 11,
5859
59/// invalid value for hints
60pub const EAI_BADHINTS = 12;
60 /// invalid value for hints
61 BADHINTS = 12,
6162
62/// resolved protocol is unknown
63pub const EAI_PROTOCOL = 13;
63 /// resolved protocol is unknown
64 PROTOCOL = 13,
6465
65/// argument buffer overflow
66pub const EAI_OVERFLOW = 14;
66 /// argument buffer overflow
67 OVERFLOW = 14,
68
69 _,
70};
6771
6872pub const EAI_MAX = 15;
6973
lib/std/c/linux.zig+22-18
......@@ -32,25 +32,29 @@ pub const NI_NAMEREQD = 0x08;
3232pub const NI_DGRAM = 0x10;
3333pub const NI_NUMERICSCOPE = 0x100;
3434
35pub const EAI_BADFLAGS = -1;
36pub const EAI_NONAME = -2;
37pub const EAI_AGAIN = -3;
38pub const EAI_FAIL = -4;
39pub const EAI_FAMILY = -6;
40pub const EAI_SOCKTYPE = -7;
41pub const EAI_SERVICE = -8;
42pub const EAI_MEMORY = -10;
43pub const EAI_SYSTEM = -11;
44pub const EAI_OVERFLOW = -12;
35pub const EAI = extern enum(c_int) {
36 BADFLAGS = -1,
37 NONAME = -2,
38 AGAIN = -3,
39 FAIL = -4,
40 FAMILY = -6,
41 SOCKTYPE = -7,
42 SERVICE = -8,
43 MEMORY = -10,
44 SYSTEM = -11,
45 OVERFLOW = -12,
4546
46pub const EAI_NODATA = -5;
47pub const EAI_ADDRFAMILY = -9;
48pub const EAI_INPROGRESS = -100;
49pub const EAI_CANCELED = -101;
50pub const EAI_NOTCANCELED = -102;
51pub const EAI_ALLDONE = -103;
52pub const EAI_INTR = -104;
53pub const EAI_IDN_ENCODE = -105;
47 NODATA = -5,
48 ADDRFAMILY = -9,
49 INPROGRESS = -100,
50 CANCELED = -101,
51 NOTCANCELED = -102,
52 ALLDONE = -103,
53 INTR = -104,
54 IDN_ENCODE = -105,
55
56 _,
57};
5458
5559pub extern "c" fn getrandom(buf_ptr: [*]u8, buf_len: usize, flags: c_uint) isize;
5660pub extern "c" fn sched_getaffinity(pid: c_int, size: usize, set: *cpu_set_t) c_int;
lib/std/debug.zig+451-620
......@@ -81,10 +81,20 @@ pub fn getSelfDebugInfo() !*DebugInfo {
8181 }
8282}
8383
84fn wantTtyColor() bool {
84pub fn detectTTYConfig() TTY.Config {
8585 var bytes: [128]u8 = undefined;
8686 const allocator = &std.heap.FixedBufferAllocator.init(bytes[0..]).allocator;
87 return if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| true else |_| stderr_file.isTty();
87 if (process.getEnvVarOwned(allocator, "ZIG_DEBUG_COLOR")) |_| {
88 return .escape_codes;
89 } else |_| {
90 if (stderr_file.supportsAnsiEscapeCodes()) {
91 return .escape_codes;
92 } else if (builtin.os == .windows and stderr_file.isTty()) {
93 return .windows_api;
94 } else {
95 return .no_color;
96 }
97 }
8898}
8999
90100/// Tries to print the current stack trace to stderr, unbuffered, and ignores any error returned.
......@@ -99,7 +109,7 @@ pub fn dumpCurrentStackTrace(start_addr: ?usize) void {
99109 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
100110 return;
101111 };
102 writeCurrentStackTrace(stderr, debug_info, wantTtyColor(), start_addr) catch |err| {
112 writeCurrentStackTrace(stderr, debug_info, detectTTYConfig(), start_addr) catch |err| {
103113 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
104114 return;
105115 };
......@@ -118,16 +128,16 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
118128 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
119129 return;
120130 };
121 const tty_color = wantTtyColor();
122 printSourceAtAddress(debug_info, stderr, ip, tty_color) catch return;
131 const tty_config = detectTTYConfig();
132 printSourceAtAddress(debug_info, stderr, ip, tty_config) catch return;
123133 const first_return_address = @intToPtr(*const usize, bp + @sizeOf(usize)).*;
124 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_color) catch return;
134 printSourceAtAddress(debug_info, stderr, first_return_address - 1, tty_config) catch return;
125135 var it = StackIterator{
126136 .first_addr = null,
127137 .fp = bp,
128138 };
129139 while (it.next()) |return_address| {
130 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_color) catch return;
140 printSourceAtAddress(debug_info, stderr, return_address - 1, tty_config) catch return;
131141 }
132142}
133143
......@@ -191,7 +201,7 @@ pub fn dumpStackTrace(stack_trace: builtin.StackTrace) void {
191201 stderr.print("Unable to dump stack trace: Unable to open debug info: {}\n", .{@errorName(err)}) catch return;
192202 return;
193203 };
194 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, wantTtyColor()) catch |err| {
204 writeStackTrace(stack_trace, stderr, getDebugInfoAllocator(), debug_info, detectTTYConfig()) catch |err| {
195205 stderr.print("Unable to dump stack trace: {}\n", .{@errorName(err)}) catch return;
196206 return;
197207 };
......@@ -264,7 +274,7 @@ pub fn writeStackTrace(
264274 out_stream: var,
265275 allocator: *mem.Allocator,
266276 debug_info: *DebugInfo,
267 tty_color: bool,
277 tty_config: TTY.Config,
268278) !void {
269279 if (builtin.strip_debug_info) return error.MissingDebugInfo;
270280 var frame_index: usize = 0;
......@@ -275,7 +285,7 @@ pub fn writeStackTrace(
275285 frame_index = (frame_index + 1) % stack_trace.instruction_addresses.len;
276286 }) {
277287 const return_address = stack_trace.instruction_addresses[frame_index];
278 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
288 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
279289 }
280290}
281291
......@@ -319,20 +329,25 @@ pub const StackIterator = struct {
319329 }
320330};
321331
322pub fn writeCurrentStackTrace(out_stream: var, debug_info: *DebugInfo, tty_color: bool, start_addr: ?usize) !void {
332pub fn writeCurrentStackTrace(
333 out_stream: var,
334 debug_info: *DebugInfo,
335 tty_config: TTY.Config,
336 start_addr: ?usize,
337) !void {
323338 if (builtin.os == .windows) {
324 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_color, start_addr);
339 return writeCurrentStackTraceWindows(out_stream, debug_info, tty_config, start_addr);
325340 }
326341 var it = StackIterator.init(start_addr);
327342 while (it.next()) |return_address| {
328 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_color);
343 try printSourceAtAddress(debug_info, out_stream, return_address - 1, tty_config);
329344 }
330345}
331346
332347pub fn writeCurrentStackTraceWindows(
333348 out_stream: var,
334349 debug_info: *DebugInfo,
335 tty_color: bool,
350 tty_config: TTY.Config,
336351 start_addr: ?usize,
337352) !void {
338353 var addr_buf: [1024]usize = undefined;
......@@ -345,23 +360,28 @@ pub fn writeCurrentStackTraceWindows(
345360 return;
346361 } else 0;
347362 for (addrs[start_i..]) |addr| {
348 try printSourceAtAddress(debug_info, out_stream, addr, tty_color);
363 try printSourceAtAddress(debug_info, out_stream, addr - 1, tty_config);
349364 }
350365}
351366
352367/// TODO once https://github.com/ziglang/zig/issues/3157 is fully implemented,
353368/// make this `noasync fn` and remove the individual noasync calls.
354pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
369pub fn printSourceAtAddress(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
355370 if (builtin.os == .windows) {
356 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_color);
371 return noasync printSourceAtAddressWindows(debug_info, out_stream, address, tty_config);
357372 }
358373 if (comptime std.Target.current.isDarwin()) {
359 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_color);
374 return noasync printSourceAtAddressMacOs(debug_info, out_stream, address, tty_config);
360375 }
361 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_color);
376 return noasync printSourceAtAddressPosix(debug_info, out_stream, address, tty_config);
362377}
363378
364fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_address: usize, tty_color: bool) !void {
379fn printSourceAtAddressWindows(
380 di: *DebugInfo,
381 out_stream: var,
382 relocated_address: usize,
383 tty_config: TTY.Config,
384) !void {
365385 const allocator = getDebugInfoAllocator();
366386 const base_address = process.getBaseAddress();
367387 const relative_address = relocated_address - base_address;
......@@ -379,16 +399,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
379399 }
380400 } else {
381401 // we have no information to add to the address
382 if (tty_color) {
383 try out_stream.print("???:?:?: ", .{});
384 setTtyColor(TtyColor.Dim);
385 try out_stream.print("0x{x} in ??? (???)", .{relocated_address});
386 setTtyColor(TtyColor.Reset);
387 try out_stream.print("\n\n\n", .{});
388 } else {
389 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{relocated_address});
390 }
391 return;
402 return printLineInfo(out_stream, null, relocated_address, "???", "???", tty_config, printLineFromFileAnyOs);
392403 };
393404
394405 const mod = &di.modules[mod_index];
......@@ -401,7 +412,7 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
401412 if (prefix.RecordLen < 2)
402413 return error.InvalidDebugInfo;
403414 switch (prefix.RecordKind) {
404 pdb.SymbolKind.S_LPROC32 => {
415 .S_LPROC32, .S_GPROC32 => {
405416 const proc_sym = @ptrCast(*pdb.ProcSym, &mod.symbols[symbol_i + @sizeOf(pdb.RecordPrefix)]);
406417 const vaddr_start = coff_section.header.virtual_address + proc_sym.CodeOffset;
407418 const vaddr_end = vaddr_start + proc_sym.CodeSize;
......@@ -510,137 +521,86 @@ fn printSourceAtAddressWindows(di: *DebugInfo, out_stream: var, relocated_addres
510521 }
511522 };
512523
513 if (tty_color) {
514 setTtyColor(TtyColor.White);
515 if (opt_line_info) |li| {
516 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
517 } else {
518 try out_stream.print("???:?:?", .{});
519 }
520 setTtyColor(TtyColor.Reset);
521 try out_stream.print(": ", .{});
522 setTtyColor(TtyColor.Dim);
523 try out_stream.print("0x{x} in {} ({})", .{ relocated_address, symbol_name, obj_basename });
524 setTtyColor(TtyColor.Reset);
525
526 if (opt_line_info) |line_info| {
527 try out_stream.print("\n", .{});
528 if (printLineFromFileAnyOs(out_stream, line_info)) {
529 if (line_info.column == 0) {
530 try out_stream.write("\n");
531 } else {
532 {
533 var col_i: usize = 1;
534 while (col_i < line_info.column) : (col_i += 1) {
535 try out_stream.writeByte(' ');
536 }
537 }
538 setTtyColor(TtyColor.Green);
539 try out_stream.write("^");
540 setTtyColor(TtyColor.Reset);
541 try out_stream.write("\n");
542 }
543 } else |err| switch (err) {
544 error.EndOfFile => {},
545 error.FileNotFound => {
546 setTtyColor(TtyColor.Dim);
547 try out_stream.write("file not found\n\n");
548 setTtyColor(TtyColor.White);
549 },
550 else => return err,
551 }
552 } else {
553 try out_stream.print("\n\n\n", .{});
554 }
555 } else {
556 if (opt_line_info) |li| {
557 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n\n\n", .{
558 li.file_name,
559 li.line,
560 li.column,
561 relocated_address,
562 symbol_name,
563 obj_basename,
564 });
565 } else {
566 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{
567 relocated_address,
568 symbol_name,
569 obj_basename,
570 });
571 }
572 }
524 try printLineInfo(
525 out_stream,
526 opt_line_info,
527 relocated_address,
528 symbol_name,
529 obj_basename,
530 tty_config,
531 printLineFromFileAnyOs,
532 );
573533}
574534
575const TtyColor = enum {
576 Red,
577 Green,
578 Cyan,
579 White,
580 Dim,
581 Bold,
582 Reset,
583};
535pub const TTY = struct {
536 pub const Color = enum {
537 Red,
538 Green,
539 Cyan,
540 White,
541 Dim,
542 Bold,
543 Reset,
544 };
584545
585/// TODO this is a special case hack right now. clean it up and maybe make it part of std.fmt
586fn setTtyColor(tty_color: TtyColor) void {
587 if (stderr_file.supportsAnsiEscapeCodes()) {
588 switch (tty_color) {
589 TtyColor.Red => {
590 stderr_file.write(RED) catch return;
591 },
592 TtyColor.Green => {
593 stderr_file.write(GREEN) catch return;
594 },
595 TtyColor.Cyan => {
596 stderr_file.write(CYAN) catch return;
597 },
598 TtyColor.White, TtyColor.Bold => {
599 stderr_file.write(WHITE) catch return;
600 },
601 TtyColor.Dim => {
602 stderr_file.write(DIM) catch return;
603 },
604 TtyColor.Reset => {
605 stderr_file.write(RESET) catch return;
606 },
607 }
608 } else {
609 const S = struct {
610 var attrs: windows.WORD = undefined;
611 var init_attrs = false;
612 };
613 if (!S.init_attrs) {
614 S.init_attrs = true;
615 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
616 // TODO handle error
617 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
618 S.attrs = info.wAttributes;
619 }
546 pub const Config = enum {
547 no_color,
548 escape_codes,
549 // TODO give this a payload of file handle
550 windows_api,
551
552 fn setColor(conf: Config, out_stream: var, color: Color) void {
553 switch (conf) {
554 .no_color => return,
555 .escape_codes => switch (color) {
556 .Red => out_stream.write(RED) catch return,
557 .Green => out_stream.write(GREEN) catch return,
558 .Cyan => out_stream.write(CYAN) catch return,
559 .White, .Bold => out_stream.write(WHITE) catch return,
560 .Dim => out_stream.write(DIM) catch return,
561 .Reset => out_stream.write(RESET) catch return,
562 },
563 .windows_api => if (builtin.os == .windows) {
564 const S = struct {
565 var attrs: windows.WORD = undefined;
566 var init_attrs = false;
567 };
568 if (!S.init_attrs) {
569 S.init_attrs = true;
570 var info: windows.CONSOLE_SCREEN_BUFFER_INFO = undefined;
571 // TODO handle error
572 _ = windows.kernel32.GetConsoleScreenBufferInfo(stderr_file.handle, &info);
573 S.attrs = info.wAttributes;
574 }
620575
621 // TODO handle errors
622 switch (tty_color) {
623 TtyColor.Red => {
624 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
625 },
626 TtyColor.Green => {
627 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
628 },
629 TtyColor.Cyan => {
630 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
631 },
632 TtyColor.White, TtyColor.Bold => {
633 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
634 },
635 TtyColor.Dim => {
636 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
637 },
638 TtyColor.Reset => {
639 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
640 },
576 // TODO handle errors
577 switch (color) {
578 .Red => {
579 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_INTENSITY) catch {};
580 },
581 .Green => {
582 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_INTENSITY) catch {};
583 },
584 .Cyan => {
585 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
586 },
587 .White, .Bold => {
588 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_RED | windows.FOREGROUND_GREEN | windows.FOREGROUND_BLUE | windows.FOREGROUND_INTENSITY) catch {};
589 },
590 .Dim => {
591 _ = windows.SetConsoleTextAttribute(stderr_file.handle, windows.FOREGROUND_INTENSITY) catch {};
592 },
593 .Reset => {
594 _ = windows.SetConsoleTextAttribute(stderr_file.handle, S.attrs) catch {};
595 },
596 }
597 } else {
598 unreachable;
599 },
600 }
641601 }
642 }
643}
602 };
603};
644604
645605fn populateModule(di: *DebugInfo, mod: *Module) !void {
646606 if (mod.populated)
......@@ -706,17 +666,12 @@ fn machoSearchSymbols(symbols: []const MachoSymbol, address: usize) ?*const Mach
706666 return null;
707667}
708668
709fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
669fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
710670 const base_addr = process.getBaseAddress();
711671 const adjusted_addr = 0x100000000 + (address - base_addr);
712672
713673 const symbol = machoSearchSymbols(di.symbols, adjusted_addr) orelse {
714 if (tty_color) {
715 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
716 } else {
717 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
718 }
719 return;
674 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFileAnyOs);
720675 };
721676
722677 const symbol_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + symbol.nlist.n_strx));
......@@ -724,78 +679,70 @@ fn printSourceAtAddressMacOs(di: *DebugInfo, out_stream: var, address: usize, tt
724679 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
725680 break :blk fs.path.basename(ofile_path);
726681 } else "???";
727 if (getLineNumberInfoMacOs(di, symbol.*, adjusted_addr)) |line_info| {
728 defer line_info.deinit();
729 try printLineInfo(
730 out_stream,
731 line_info,
732 address,
733 symbol_name,
734 compile_unit_name,
735 tty_color,
736 printLineFromFileAnyOs,
737 );
738 } else |err| switch (err) {
739 error.MissingDebugInfo, error.InvalidDebugInfo => {
740 if (tty_color) {
741 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n\n\n", .{
742 address, symbol_name, compile_unit_name,
743 });
744 } else {
745 try out_stream.print("???:?:?: 0x{x} in {} ({})\n\n\n", .{ address, symbol_name, compile_unit_name });
746 }
747 },
682
683 const line_info = getLineNumberInfoMacOs(di, symbol.*, adjusted_addr) catch |err| switch (err) {
684 error.MissingDebugInfo, error.InvalidDebugInfo => null,
748685 else => return err,
749 }
686 };
687 defer if (line_info) |li| li.deinit();
688
689 try printLineInfo(
690 out_stream,
691 line_info,
692 address,
693 symbol_name,
694 compile_unit_name,
695 tty_config,
696 printLineFromFileAnyOs,
697 );
750698}
751699
752pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_color: bool) !void {
753 return debug_info.printSourceAtAddress(out_stream, address, tty_color, printLineFromFileAnyOs);
700pub fn printSourceAtAddressPosix(debug_info: *DebugInfo, out_stream: var, address: usize, tty_config: TTY.Config) !void {
701 return debug_info.printSourceAtAddress(out_stream, address, tty_config, printLineFromFileAnyOs);
754702}
755703
756704fn printLineInfo(
757705 out_stream: var,
758 line_info: LineInfo,
706 line_info: ?LineInfo,
759707 address: usize,
760708 symbol_name: []const u8,
761709 compile_unit_name: []const u8,
762 tty_color: bool,
710 tty_config: TTY.Config,
763711 comptime printLineFromFile: var,
764712) !void {
765 if (tty_color) {
766 try out_stream.print(WHITE ++ "{}:{}:{}" ++ RESET ++ ": " ++ DIM ++ "0x{x} in {} ({})" ++ RESET ++ "\n", .{
767 line_info.file_name,
768 line_info.line,
769 line_info.column,
770 address,
771 symbol_name,
772 compile_unit_name,
773 });
774 if (printLineFromFile(out_stream, line_info)) {
775 if (line_info.column == 0) {
776 try out_stream.write("\n");
777 } else {
778 {
779 var col_i: usize = 1;
780 while (col_i < line_info.column) : (col_i += 1) {
781 try out_stream.writeByte(' ');
782 }
783 }
784 try out_stream.write(GREEN ++ "^" ++ RESET ++ "\n");
713 tty_config.setColor(out_stream, .White);
714
715 if (line_info) |*li| {
716 try out_stream.print("{}:{}:{}", .{ li.file_name, li.line, li.column });
717 } else {
718 try out_stream.print("???:?:?", .{});
719 }
720
721 tty_config.setColor(out_stream, .Reset);
722 try out_stream.write(": ");
723 tty_config.setColor(out_stream, .Dim);
724 try out_stream.print("0x{x} in {} ({})", .{ address, symbol_name, compile_unit_name });
725 tty_config.setColor(out_stream, .Reset);
726 try out_stream.write("\n");
727
728 // Show the matching source code line if possible
729 if (line_info) |li| {
730 if (noasync printLineFromFile(out_stream, li)) {
731 if (li.column > 0) {
732 // The caret already takes one char
733 const space_needed = @intCast(usize, li.column - 1);
734
735 try out_stream.writeByteNTimes(' ', space_needed);
736 tty_config.setColor(out_stream, .Green);
737 try out_stream.write("^");
738 tty_config.setColor(out_stream, .Reset);
785739 }
740 try out_stream.write("\n");
786741 } else |err| switch (err) {
787742 error.EndOfFile, error.FileNotFound => {},
743 error.BadPathName => {},
788744 else => return err,
789745 }
790 } else {
791 try out_stream.print("{}:{}:{}: 0x{x} in {} ({})\n", .{
792 line_info.file_name,
793 line_info.line,
794 line_info.column,
795 address,
796 symbol_name,
797 compile_unit_name,
798 });
799746 }
800747}
801748
......@@ -1016,59 +963,61 @@ pub fn openDwarfDebugInfo(di: *DwarfInfo, allocator: *mem.Allocator) !void {
1016963
1017964pub fn openElfDebugInfo(
1018965 allocator: *mem.Allocator,
1019 elf_seekable_stream: *DwarfSeekableStream,
1020 elf_in_stream: *DwarfInStream,
966 data: []u8,
1021967) !DwarfInfo {
1022 var efile = try elf.Elf.openStream(allocator, elf_seekable_stream, elf_in_stream);
1023 errdefer efile.close();
968 var seekable_stream = io.SliceSeekableInStream.init(data);
969 var efile = try elf.Elf.openStream(
970 allocator,
971 @ptrCast(*DwarfSeekableStream, &seekable_stream.seekable_stream),
972 @ptrCast(*DwarfInStream, &seekable_stream.stream),
973 );
974 defer efile.close();
975
976 const debug_info = (try efile.findSection(".debug_info")) orelse
977 return error.MissingDebugInfo;
978 const debug_abbrev = (try efile.findSection(".debug_abbrev")) orelse
979 return error.MissingDebugInfo;
980 const debug_str = (try efile.findSection(".debug_str")) orelse
981 return error.MissingDebugInfo;
982 const debug_line = (try efile.findSection(".debug_line")) orelse
983 return error.MissingDebugInfo;
984 const opt_debug_ranges = try efile.findSection(".debug_ranges");
1024985
1025986 var di = DwarfInfo{
1026 .dwarf_seekable_stream = elf_seekable_stream,
1027 .dwarf_in_stream = elf_in_stream,
1028987 .endian = efile.endian,
1029 .debug_info = (try findDwarfSectionFromElf(&efile, ".debug_info")) orelse return error.MissingDebugInfo,
1030 .debug_abbrev = (try findDwarfSectionFromElf(&efile, ".debug_abbrev")) orelse return error.MissingDebugInfo,
1031 .debug_str = (try findDwarfSectionFromElf(&efile, ".debug_str")) orelse return error.MissingDebugInfo,
1032 .debug_line = (try findDwarfSectionFromElf(&efile, ".debug_line")) orelse return error.MissingDebugInfo,
1033 .debug_ranges = (try findDwarfSectionFromElf(&efile, ".debug_ranges")),
1034 .abbrev_table_list = undefined,
1035 .compile_unit_list = undefined,
1036 .func_list = undefined,
988 .debug_info = (data[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)]),
989 .debug_abbrev = (data[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)]),
990 .debug_str = (data[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)]),
991 .debug_line = (data[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)]),
992 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
993 data[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
994 else
995 null,
1037996 };
997
998 efile.close();
999
10381000 try openDwarfDebugInfo(&di, allocator);
10391001 return di;
10401002}
10411003
10421004fn openSelfDebugInfoPosix(allocator: *mem.Allocator) !DwarfInfo {
1043 const S = struct {
1044 var self_exe_file: File = undefined;
1045 var self_exe_mmap_seekable: io.SliceSeekableInStream = undefined;
1046 };
1047
1048 S.self_exe_file = try fs.openSelfExe();
1049 errdefer S.self_exe_file.close();
1005 var exe_file = try fs.openSelfExe();
1006 errdefer exe_file.close();
10501007
1051 const self_exe_len = math.cast(usize, try S.self_exe_file.getEndPos()) catch return error.DebugInfoTooLarge;
1052 const self_exe_mmap_len = mem.alignForward(self_exe_len, mem.page_size);
1053 const self_exe_mmap = try os.mmap(
1008 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
1009 return error.DebugInfoTooLarge;
1010 const exe_mmap = try os.mmap(
10541011 null,
1055 self_exe_mmap_len,
1012 exe_len,
10561013 os.PROT_READ,
10571014 os.MAP_SHARED,
1058 S.self_exe_file.handle,
1015 exe_file.handle,
10591016 0,
10601017 );
1061 errdefer os.munmap(self_exe_mmap);
1018 errdefer os.munmap(exe_mmap);
10621019
1063 S.self_exe_mmap_seekable = io.SliceSeekableInStream.init(self_exe_mmap);
1064
1065 return openElfDebugInfo(
1066 allocator,
1067 // TODO https://github.com/ziglang/zig/issues/764
1068 @ptrCast(*DwarfSeekableStream, &S.self_exe_mmap_seekable.seekable_stream),
1069 // TODO https://github.com/ziglang/zig/issues/764
1070 @ptrCast(*DwarfInStream, &S.self_exe_mmap_seekable.stream),
1071 );
1020 return openElfDebugInfo(allocator, exe_mmap);
10721021}
10731022
10741023fn openSelfDebugInfoMacOs(allocator: *mem.Allocator) !DebugInfo {
......@@ -1195,83 +1144,56 @@ const MachoSymbol = struct {
11951144 }
11961145};
11971146
1198const MachOFile = struct {
1199 bytes: []align(@alignOf(macho.mach_header_64)) const u8,
1200 sect_debug_info: ?*const macho.section_64,
1201 sect_debug_line: ?*const macho.section_64,
1202};
1203
12041147pub const DwarfSeekableStream = io.SeekableStream(anyerror, anyerror);
12051148pub const DwarfInStream = io.InStream(anyerror);
12061149
12071150pub const DwarfInfo = struct {
1208 dwarf_seekable_stream: *DwarfSeekableStream,
1209 dwarf_in_stream: *DwarfInStream,
12101151 endian: builtin.Endian,
1211 debug_info: Section,
1212 debug_abbrev: Section,
1213 debug_str: Section,
1214 debug_line: Section,
1215 debug_ranges: ?Section,
1216 abbrev_table_list: ArrayList(AbbrevTableHeader),
1217 compile_unit_list: ArrayList(CompileUnit),
1218 func_list: ArrayList(Func),
1219
1220 pub const Section = struct {
1221 offset: u64,
1222 size: u64,
1223 };
1152 // No memory is owned by the DwarfInfo
1153 debug_info: []u8,
1154 debug_abbrev: []u8,
1155 debug_str: []u8,
1156 debug_line: []u8,
1157 debug_ranges: ?[]u8,
1158 // Filled later by the initializer
1159 abbrev_table_list: ArrayList(AbbrevTableHeader) = undefined,
1160 compile_unit_list: ArrayList(CompileUnit) = undefined,
1161 func_list: ArrayList(Func) = undefined,
12241162
12251163 pub fn allocator(self: DwarfInfo) *mem.Allocator {
12261164 return self.abbrev_table_list.allocator;
12271165 }
12281166
1229 pub fn readString(self: *DwarfInfo) ![]u8 {
1230 return readStringRaw(self.allocator(), self.dwarf_in_stream);
1231 }
1232
12331167 /// This function works in freestanding mode.
12341168 /// fn printLineFromFile(out_stream: var, line_info: LineInfo) !void
12351169 pub fn printSourceAtAddress(
12361170 self: *DwarfInfo,
12371171 out_stream: var,
12381172 address: usize,
1239 tty_color: bool,
1173 tty_config: TTY.Config,
12401174 comptime printLineFromFile: var,
12411175 ) !void {
12421176 const compile_unit = self.findCompileUnit(address) catch {
1243 if (tty_color) {
1244 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? (???)" ++ RESET ++ "\n\n\n", .{address});
1245 } else {
1246 try out_stream.print("???:?:?: 0x{x} in ??? (???)\n\n\n", .{address});
1247 }
1248 return;
1177 return printLineInfo(out_stream, null, address, "???", "???", tty_config, printLineFromFile);
12491178 };
1179
12501180 const compile_unit_name = try compile_unit.die.getAttrString(self, DW.AT_name);
1251 if (self.getLineNumberInfo(compile_unit.*, address)) |line_info| {
1252 defer line_info.deinit();
1253 const symbol_name = self.getSymbolName(address) orelse "???";
1254 try printLineInfo(
1255 out_stream,
1256 line_info,
1257 address,
1258 symbol_name,
1259 compile_unit_name,
1260 tty_color,
1261 printLineFromFile,
1262 );
1263 } else |err| switch (err) {
1264 error.MissingDebugInfo, error.InvalidDebugInfo => {
1265 if (tty_color) {
1266 try out_stream.print("???:?:?: " ++ DIM ++ "0x{x} in ??? ({})" ++ RESET ++ "\n\n\n", .{
1267 address, compile_unit_name,
1268 });
1269 } else {
1270 try out_stream.print("???:?:?: 0x{x} in ??? ({})\n\n\n", .{ address, compile_unit_name });
1271 }
1272 },
1181 const symbol_name = self.getSymbolName(address) orelse "???";
1182 const line_info = self.getLineNumberInfo(compile_unit.*, address) catch |err| switch (err) {
1183 error.MissingDebugInfo, error.InvalidDebugInfo => null,
12731184 else => return err,
1274 }
1185 };
1186 defer if (line_info) |li| li.deinit();
1187
1188 try printLineInfo(
1189 out_stream,
1190 line_info,
1191 address,
1192 symbol_name,
1193 compile_unit_name,
1194 tty_config,
1195 printLineFromFile,
1196 );
12751197 }
12761198
12771199 fn getSymbolName(di: *DwarfInfo, address: u64) ?[]const u8 {
......@@ -1287,35 +1209,38 @@ pub const DwarfInfo = struct {
12871209 }
12881210
12891211 fn scanAllFunctions(di: *DwarfInfo) !void {
1290 const debug_info_end = di.debug_info.offset + di.debug_info.size;
1291 var this_unit_offset = di.debug_info.offset;
1212 var s = io.SliceSeekableInStream.init(di.debug_info);
1213 var this_unit_offset: u64 = 0;
12921214
1293 while (this_unit_offset < debug_info_end) {
1294 try di.dwarf_seekable_stream.seekTo(this_unit_offset);
1215 while (true) {
1216 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1217 error.EndOfStream => return,
1218 else => return err,
1219 };
12951220
12961221 var is_64: bool = undefined;
1297 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1222 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
12981223 if (unit_length == 0) return;
12991224 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
13001225
1301 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1226 const version = try s.stream.readInt(u16, di.endian);
13021227 if (version < 2 or version > 5) return error.InvalidDebugInfo;
13031228
1304 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1229 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
13051230
1306 const address_size = try di.dwarf_in_stream.readByte();
1231 const address_size = try s.stream.readByte();
13071232 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
13081233
1309 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
1234 const compile_unit_pos = try s.seekable_stream.getPos();
13101235 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
13111236
1312 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
1237 try s.seekable_stream.seekTo(compile_unit_pos);
13131238
13141239 const next_unit_pos = this_unit_offset + next_offset;
13151240
1316 while ((try di.dwarf_seekable_stream.getPos()) < next_unit_pos) {
1317 const die_obj = (try di.parseDie(abbrev_table, is_64)) orelse continue;
1318 const after_die_offset = try di.dwarf_seekable_stream.getPos();
1241 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1242 const die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse continue;
1243 const after_die_offset = try s.seekable_stream.getPos();
13191244
13201245 switch (die_obj.tag_id) {
13211246 DW.TAG_subprogram, DW.TAG_inlined_subroutine, DW.TAG_subroutine, DW.TAG_entry_point => {
......@@ -1331,14 +1256,14 @@ pub const DwarfInfo = struct {
13311256 // Follow the DIE it points to and repeat
13321257 const ref_offset = try this_die_obj.getAttrRef(DW.AT_abstract_origin);
13331258 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1334 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
1335 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1259 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1260 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
13361261 } else if (this_die_obj.getAttr(DW.AT_specification)) |ref| {
13371262 // Follow the DIE it points to and repeat
13381263 const ref_offset = try this_die_obj.getAttrRef(DW.AT_specification);
13391264 if (ref_offset > next_offset) return error.InvalidDebugInfo;
1340 try di.dwarf_seekable_stream.seekTo(this_unit_offset + ref_offset);
1341 this_die_obj = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1265 try s.seekable_stream.seekTo(this_unit_offset + ref_offset);
1266 this_die_obj = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
13421267 } else {
13431268 break :x null;
13441269 }
......@@ -1376,12 +1301,10 @@ pub const DwarfInfo = struct {
13761301 .pc_range = pc_range,
13771302 });
13781303 },
1379 else => {
1380 continue;
1381 },
1304 else => {},
13821305 }
13831306
1384 try di.dwarf_seekable_stream.seekTo(after_die_offset);
1307 try s.seekable_stream.seekTo(after_die_offset);
13851308 }
13861309
13871310 this_unit_offset += next_offset;
......@@ -1389,32 +1312,35 @@ pub const DwarfInfo = struct {
13891312 }
13901313
13911314 fn scanAllCompileUnits(di: *DwarfInfo) !void {
1392 const debug_info_end = di.debug_info.offset + di.debug_info.size;
1393 var this_unit_offset = di.debug_info.offset;
1315 var s = io.SliceSeekableInStream.init(di.debug_info);
1316 var this_unit_offset: u64 = 0;
13941317
1395 while (this_unit_offset < debug_info_end) {
1396 try di.dwarf_seekable_stream.seekTo(this_unit_offset);
1318 while (true) {
1319 s.seekable_stream.seekTo(this_unit_offset) catch |err| switch (err) {
1320 error.EndOfStream => return,
1321 else => return err,
1322 };
13971323
13981324 var is_64: bool = undefined;
1399 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1325 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
14001326 if (unit_length == 0) return;
14011327 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
14021328
1403 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1329 const version = try s.stream.readInt(u16, di.endian);
14041330 if (version < 2 or version > 5) return error.InvalidDebugInfo;
14051331
1406 const debug_abbrev_offset = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1332 const debug_abbrev_offset = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
14071333
1408 const address_size = try di.dwarf_in_stream.readByte();
1334 const address_size = try s.stream.readByte();
14091335 if (address_size != @sizeOf(usize)) return error.InvalidDebugInfo;
14101336
1411 const compile_unit_pos = try di.dwarf_seekable_stream.getPos();
1337 const compile_unit_pos = try s.seekable_stream.getPos();
14121338 const abbrev_table = try di.getAbbrevTable(debug_abbrev_offset);
14131339
1414 try di.dwarf_seekable_stream.seekTo(compile_unit_pos);
1340 try s.seekable_stream.seekTo(compile_unit_pos);
14151341
14161342 const compile_unit_die = try di.allocator().create(Die);
1417 compile_unit_die.* = (try di.parseDie(abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
1343 compile_unit_die.* = (try di.parseDie(&s.stream, abbrev_table, is_64)) orelse return error.InvalidDebugInfo;
14181344
14191345 if (compile_unit_die.tag_id != DW.TAG_compile_unit) return error.InvalidDebugInfo;
14201346
......@@ -1458,28 +1384,38 @@ pub const DwarfInfo = struct {
14581384 if (compile_unit.pc_range) |range| {
14591385 if (target_address >= range.start and target_address < range.end) return compile_unit;
14601386 }
1461 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
1462 var base_address: usize = 0;
1463 if (di.debug_ranges) |debug_ranges| {
1464 try di.dwarf_seekable_stream.seekTo(debug_ranges.offset + ranges_offset);
1387 if (di.debug_ranges) |debug_ranges| {
1388 if (compile_unit.die.getAttrSecOffset(DW.AT_ranges)) |ranges_offset| {
1389 var s = io.SliceSeekableInStream.init(debug_ranges);
1390
1391 // All the addresses in the list are relative to the value
1392 // specified by DW_AT_low_pc or to some other value encoded
1393 // in the list itself
1394 var base_address = try compile_unit.die.getAttrAddr(DW.AT_low_pc);
1395
1396 try s.seekable_stream.seekTo(ranges_offset);
1397
14651398 while (true) {
1466 const begin_addr = try di.dwarf_in_stream.readIntLittle(usize);
1467 const end_addr = try di.dwarf_in_stream.readIntLittle(usize);
1399 const begin_addr = try s.stream.readIntLittle(usize);
1400 const end_addr = try s.stream.readIntLittle(usize);
14681401 if (begin_addr == 0 and end_addr == 0) {
14691402 break;
14701403 }
1404 // This entry selects a new value for the base address
14711405 if (begin_addr == maxInt(usize)) {
1472 base_address = begin_addr;
1406 base_address = end_addr;
14731407 continue;
14741408 }
1475 if (target_address >= begin_addr and target_address < end_addr) {
1409 if (target_address >= base_address + begin_addr and target_address < base_address + end_addr) {
14761410 return compile_unit;
14771411 }
14781412 }
1413
1414 return error.InvalidDebugInfo;
1415 } else |err| {
1416 if (err != error.MissingDebugInfo) return err;
1417 continue;
14791418 }
1480 } else |err| {
1481 if (err != error.MissingDebugInfo) return err;
1482 continue;
14831419 }
14841420 }
14851421 return error.MissingDebugInfo;
......@@ -1493,30 +1429,33 @@ pub const DwarfInfo = struct {
14931429 return &header.table;
14941430 }
14951431 }
1496 try di.dwarf_seekable_stream.seekTo(di.debug_abbrev.offset + abbrev_offset);
14971432 try di.abbrev_table_list.append(AbbrevTableHeader{
14981433 .offset = abbrev_offset,
1499 .table = try di.parseAbbrevTable(),
1434 .table = try di.parseAbbrevTable(abbrev_offset),
15001435 });
15011436 return &di.abbrev_table_list.items[di.abbrev_table_list.len - 1].table;
15021437 }
15031438
1504 fn parseAbbrevTable(di: *DwarfInfo) !AbbrevTable {
1439 fn parseAbbrevTable(di: *DwarfInfo, offset: u64) !AbbrevTable {
1440 var s = io.SliceSeekableInStream.init(di.debug_abbrev);
1441
1442 try s.seekable_stream.seekTo(offset);
15051443 var result = AbbrevTable.init(di.allocator());
1444 errdefer result.deinit();
15061445 while (true) {
1507 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
1446 const abbrev_code = try leb.readULEB128(u64, &s.stream);
15081447 if (abbrev_code == 0) return result;
15091448 try result.append(AbbrevTableEntry{
15101449 .abbrev_code = abbrev_code,
1511 .tag_id = try leb.readULEB128(u64, di.dwarf_in_stream),
1512 .has_children = (try di.dwarf_in_stream.readByte()) == DW.CHILDREN_yes,
1450 .tag_id = try leb.readULEB128(u64, &s.stream),
1451 .has_children = (try s.stream.readByte()) == DW.CHILDREN_yes,
15131452 .attrs = ArrayList(AbbrevAttr).init(di.allocator()),
15141453 });
15151454 const attrs = &result.items[result.len - 1].attrs;
15161455
15171456 while (true) {
1518 const attr_id = try leb.readULEB128(u64, di.dwarf_in_stream);
1519 const form_id = try leb.readULEB128(u64, di.dwarf_in_stream);
1457 const attr_id = try leb.readULEB128(u64, &s.stream);
1458 const form_id = try leb.readULEB128(u64, &s.stream);
15201459 if (attr_id == 0 and form_id == 0) break;
15211460 try attrs.append(AbbrevAttr{
15221461 .attr_id = attr_id,
......@@ -1526,8 +1465,8 @@ pub const DwarfInfo = struct {
15261465 }
15271466 }
15281467
1529 fn parseDie(di: *DwarfInfo, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
1530 const abbrev_code = try leb.readULEB128(u64, di.dwarf_in_stream);
1468 fn parseDie(di: *DwarfInfo, in_stream: var, abbrev_table: *const AbbrevTable, is_64: bool) !?Die {
1469 const abbrev_code = try leb.readULEB128(u64, in_stream);
15311470 if (abbrev_code == 0) return null;
15321471 const table_entry = getAbbrevTableEntry(abbrev_table, abbrev_code) orelse return error.InvalidDebugInfo;
15331472
......@@ -1540,63 +1479,63 @@ pub const DwarfInfo = struct {
15401479 for (table_entry.attrs.toSliceConst()) |attr, i| {
15411480 result.attrs.items[i] = Die.Attr{
15421481 .id = attr.attr_id,
1543 .value = try parseFormValue(di.allocator(), di.dwarf_in_stream, attr.form_id, is_64),
1482 .value = try parseFormValue(di.allocator(), in_stream, attr.form_id, is_64),
15441483 };
15451484 }
15461485 return result;
15471486 }
15481487
15491488 fn getLineNumberInfo(di: *DwarfInfo, compile_unit: CompileUnit, target_address: usize) !LineInfo {
1489 var s = io.SliceSeekableInStream.init(di.debug_line);
1490
15501491 const compile_unit_cwd = try compile_unit.die.getAttrString(di, DW.AT_comp_dir);
15511492 const line_info_offset = try compile_unit.die.getAttrSecOffset(DW.AT_stmt_list);
15521493
1553 assert(line_info_offset < di.debug_line.size);
1554
1555 try di.dwarf_seekable_stream.seekTo(di.debug_line.offset + line_info_offset);
1494 try s.seekable_stream.seekTo(line_info_offset);
15561495
15571496 var is_64: bool = undefined;
1558 const unit_length = try readInitialLength(@TypeOf(di.dwarf_in_stream.readFn).ReturnType.ErrorSet, di.dwarf_in_stream, &is_64);
1497 const unit_length = try readInitialLength(@TypeOf(s.stream.readFn).ReturnType.ErrorSet, &s.stream, &is_64);
15591498 if (unit_length == 0) {
15601499 return error.MissingDebugInfo;
15611500 }
15621501 const next_offset = unit_length + (if (is_64) @as(usize, 12) else @as(usize, 4));
15631502
1564 const version = try di.dwarf_in_stream.readInt(u16, di.endian);
1503 const version = try s.stream.readInt(u16, di.endian);
15651504 // TODO support 3 and 5
15661505 if (version != 2 and version != 4) return error.InvalidDebugInfo;
15671506
1568 const prologue_length = if (is_64) try di.dwarf_in_stream.readInt(u64, di.endian) else try di.dwarf_in_stream.readInt(u32, di.endian);
1569 const prog_start_offset = (try di.dwarf_seekable_stream.getPos()) + prologue_length;
1507 const prologue_length = if (is_64) try s.stream.readInt(u64, di.endian) else try s.stream.readInt(u32, di.endian);
1508 const prog_start_offset = (try s.seekable_stream.getPos()) + prologue_length;
15701509
1571 const minimum_instruction_length = try di.dwarf_in_stream.readByte();
1510 const minimum_instruction_length = try s.stream.readByte();
15721511 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
15731512
15741513 if (version >= 4) {
15751514 // maximum_operations_per_instruction
1576 _ = try di.dwarf_in_stream.readByte();
1515 _ = try s.stream.readByte();
15771516 }
15781517
1579 const default_is_stmt = (try di.dwarf_in_stream.readByte()) != 0;
1580 const line_base = try di.dwarf_in_stream.readByteSigned();
1518 const default_is_stmt = (try s.stream.readByte()) != 0;
1519 const line_base = try s.stream.readByteSigned();
15811520
1582 const line_range = try di.dwarf_in_stream.readByte();
1521 const line_range = try s.stream.readByte();
15831522 if (line_range == 0) return error.InvalidDebugInfo;
15841523
1585 const opcode_base = try di.dwarf_in_stream.readByte();
1524 const opcode_base = try s.stream.readByte();
15861525
15871526 const standard_opcode_lengths = try di.allocator().alloc(u8, opcode_base - 1);
15881527
15891528 {
15901529 var i: usize = 0;
15911530 while (i < opcode_base - 1) : (i += 1) {
1592 standard_opcode_lengths[i] = try di.dwarf_in_stream.readByte();
1531 standard_opcode_lengths[i] = try s.stream.readByte();
15931532 }
15941533 }
15951534
15961535 var include_directories = ArrayList([]u8).init(di.allocator());
15971536 try include_directories.append(compile_unit_cwd);
15981537 while (true) {
1599 const dir = try di.readString();
1538 const dir = try readStringRaw(di.allocator(), &s.stream);
16001539 if (dir.len == 0) break;
16011540 try include_directories.append(dir);
16021541 }
......@@ -1605,11 +1544,11 @@ pub const DwarfInfo = struct {
16051544 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
16061545
16071546 while (true) {
1608 const file_name = try di.readString();
1547 const file_name = try readStringRaw(di.allocator(), &s.stream);
16091548 if (file_name.len == 0) break;
1610 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
1611 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
1612 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
1549 const dir_index = try leb.readULEB128(usize, &s.stream);
1550 const mtime = try leb.readULEB128(usize, &s.stream);
1551 const len_bytes = try leb.readULEB128(usize, &s.stream);
16131552 try file_entries.append(FileEntry{
16141553 .file_name = file_name,
16151554 .dir_index = dir_index,
......@@ -1618,30 +1557,32 @@ pub const DwarfInfo = struct {
16181557 });
16191558 }
16201559
1621 try di.dwarf_seekable_stream.seekTo(prog_start_offset);
1560 try s.seekable_stream.seekTo(prog_start_offset);
16221561
1623 while (true) {
1624 const opcode = try di.dwarf_in_stream.readByte();
1562 const next_unit_pos = line_info_offset + next_offset;
1563
1564 while ((try s.seekable_stream.getPos()) < next_unit_pos) {
1565 const opcode = try s.stream.readByte();
16251566
16261567 if (opcode == DW.LNS_extended_op) {
1627 const op_size = try leb.readULEB128(u64, di.dwarf_in_stream);
1568 const op_size = try leb.readULEB128(u64, &s.stream);
16281569 if (op_size < 1) return error.InvalidDebugInfo;
1629 var sub_op = try di.dwarf_in_stream.readByte();
1570 var sub_op = try s.stream.readByte();
16301571 switch (sub_op) {
16311572 DW.LNE_end_sequence => {
16321573 prog.end_sequence = true;
16331574 if (try prog.checkLineMatch()) |info| return info;
1634 return error.MissingDebugInfo;
1575 prog.reset();
16351576 },
16361577 DW.LNE_set_address => {
1637 const addr = try di.dwarf_in_stream.readInt(usize, di.endian);
1578 const addr = try s.stream.readInt(usize, di.endian);
16381579 prog.address = addr;
16391580 },
16401581 DW.LNE_define_file => {
1641 const file_name = try di.readString();
1642 const dir_index = try leb.readULEB128(usize, di.dwarf_in_stream);
1643 const mtime = try leb.readULEB128(usize, di.dwarf_in_stream);
1644 const len_bytes = try leb.readULEB128(usize, di.dwarf_in_stream);
1582 const file_name = try readStringRaw(di.allocator(), &s.stream);
1583 const dir_index = try leb.readULEB128(usize, &s.stream);
1584 const mtime = try leb.readULEB128(usize, &s.stream);
1585 const len_bytes = try leb.readULEB128(usize, &s.stream);
16451586 try file_entries.append(FileEntry{
16461587 .file_name = file_name,
16471588 .dir_index = dir_index,
......@@ -1651,7 +1592,7 @@ pub const DwarfInfo = struct {
16511592 },
16521593 else => {
16531594 const fwd_amt = math.cast(isize, op_size - 1) catch return error.InvalidDebugInfo;
1654 try di.dwarf_seekable_stream.seekBy(fwd_amt);
1595 try s.seekable_stream.seekBy(fwd_amt);
16551596 },
16561597 }
16571598 } else if (opcode >= opcode_base) {
......@@ -1670,19 +1611,19 @@ pub const DwarfInfo = struct {
16701611 prog.basic_block = false;
16711612 },
16721613 DW.LNS_advance_pc => {
1673 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
1614 const arg = try leb.readULEB128(usize, &s.stream);
16741615 prog.address += arg * minimum_instruction_length;
16751616 },
16761617 DW.LNS_advance_line => {
1677 const arg = try leb.readILEB128(i64, di.dwarf_in_stream);
1618 const arg = try leb.readILEB128(i64, &s.stream);
16781619 prog.line += arg;
16791620 },
16801621 DW.LNS_set_file => {
1681 const arg = try leb.readULEB128(usize, di.dwarf_in_stream);
1622 const arg = try leb.readULEB128(usize, &s.stream);
16821623 prog.file = arg;
16831624 },
16841625 DW.LNS_set_column => {
1685 const arg = try leb.readULEB128(u64, di.dwarf_in_stream);
1626 const arg = try leb.readULEB128(u64, &s.stream);
16861627 prog.column = arg;
16871628 },
16881629 DW.LNS_negate_stmt => {
......@@ -1696,14 +1637,14 @@ pub const DwarfInfo = struct {
16961637 prog.address += inc_addr;
16971638 },
16981639 DW.LNS_fixed_advance_pc => {
1699 const arg = try di.dwarf_in_stream.readInt(u16, di.endian);
1640 const arg = try s.stream.readInt(u16, di.endian);
17001641 prog.address += arg;
17011642 },
17021643 DW.LNS_set_prologue_end => {},
17031644 else => {
17041645 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
17051646 const len_bytes = standard_opcode_lengths[opcode - 1];
1706 try di.dwarf_seekable_stream.seekBy(len_bytes);
1647 try s.seekable_stream.seekBy(len_bytes);
17071648 },
17081649 }
17091650 }
......@@ -1713,9 +1654,17 @@ pub const DwarfInfo = struct {
17131654 }
17141655
17151656 fn getString(di: *DwarfInfo, offset: u64) ![]u8 {
1716 const pos = di.debug_str.offset + offset;
1717 try di.dwarf_seekable_stream.seekTo(pos);
1718 return di.readString();
1657 if (offset > di.debug_str.len)
1658 return error.InvalidDebugInfo;
1659 const casted_offset = math.cast(usize, offset) catch
1660 return error.InvalidDebugInfo;
1661
1662 // Valid strings always have a terminating zero byte
1663 if (mem.indexOfScalarPos(u8, di.debug_str, casted_offset, 0)) |last| {
1664 return di.debug_str[casted_offset..last];
1665 }
1666
1667 return error.InvalidDebugInfo;
17191668 }
17201669};
17211670
......@@ -1727,7 +1676,7 @@ pub const DebugInfo = switch (builtin.os) {
17271676
17281677 const OFileTable = std.HashMap(
17291678 *macho.nlist_64,
1730 MachOFile,
1679 DwarfInfo,
17311680 std.hash_map.getHashPtrAddrFn(*macho.nlist_64),
17321681 std.hash_map.getTrivialEqlFn(*macho.nlist_64),
17331682 );
......@@ -1888,6 +1837,7 @@ const LineNumberProgram = struct {
18881837 basic_block: bool,
18891838 end_sequence: bool,
18901839
1840 default_is_stmt: bool,
18911841 target_address: usize,
18921842 include_dirs: []const []const u8,
18931843 file_entries: *ArrayList(FileEntry),
......@@ -1900,6 +1850,25 @@ const LineNumberProgram = struct {
19001850 prev_basic_block: bool,
19011851 prev_end_sequence: bool,
19021852
1853 // Reset the state machine following the DWARF specification
1854 pub fn reset(self: *LineNumberProgram) void {
1855 self.address = 0;
1856 self.file = 1;
1857 self.line = 1;
1858 self.column = 0;
1859 self.is_stmt = self.default_is_stmt;
1860 self.basic_block = false;
1861 self.end_sequence = false;
1862 // Invalidate all the remaining fields
1863 self.prev_address = 0;
1864 self.prev_file = undefined;
1865 self.prev_line = undefined;
1866 self.prev_column = undefined;
1867 self.prev_is_stmt = undefined;
1868 self.prev_basic_block = undefined;
1869 self.prev_end_sequence = undefined;
1870 }
1871
19031872 pub fn init(is_stmt: bool, include_dirs: []const []const u8, file_entries: *ArrayList(FileEntry), target_address: usize) LineNumberProgram {
19041873 return LineNumberProgram{
19051874 .address = 0,
......@@ -1911,6 +1880,7 @@ const LineNumberProgram = struct {
19111880 .end_sequence = false,
19121881 .include_dirs = include_dirs,
19131882 .file_entries = file_entries,
1883 .default_is_stmt = is_stmt,
19141884 .target_address = target_address,
19151885 .prev_address = 0,
19161886 .prev_file = undefined,
......@@ -2100,24 +2070,32 @@ fn getAbbrevTableEntry(abbrev_table: *const AbbrevTable, abbrev_code: u64) ?*con
21002070 return null;
21012071}
21022072
2103fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: usize) !LineInfo {
2073fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, address: usize) !LineInfo {
21042074 const ofile = symbol.ofile orelse return error.MissingDebugInfo;
21052075 const gop = try di.ofiles.getOrPut(ofile);
2106 const mach_o_file = if (gop.found_existing) &gop.kv.value else blk: {
2076 const dwarf_info = if (gop.found_existing) &gop.kv.value else blk: {
21072077 errdefer _ = di.ofiles.remove(ofile);
21082078 const ofile_path = mem.toSliceConst(u8, @ptrCast([*:0]const u8, di.strings.ptr + ofile.n_strx));
21092079
2110 gop.kv.value = MachOFile{
2111 .bytes = try std.fs.cwd().readFileAllocAligned(
2112 di.ofiles.allocator,
2113 ofile_path,
2114 maxInt(usize),
2115 @alignOf(macho.mach_header_64),
2116 ),
2117 .sect_debug_info = null,
2118 .sect_debug_line = null,
2119 };
2120 const hdr = @ptrCast(*const macho.mach_header_64, gop.kv.value.bytes.ptr);
2080 var exe_file = try std.fs.openFileAbsoluteC(ofile_path, .{});
2081 errdefer exe_file.close();
2082
2083 const exe_len = math.cast(usize, try exe_file.getEndPos()) catch
2084 return error.DebugInfoTooLarge;
2085 const exe_mmap = try os.mmap(
2086 null,
2087 exe_len,
2088 os.PROT_READ,
2089 os.MAP_SHARED,
2090 exe_file.handle,
2091 0,
2092 );
2093 errdefer os.munmap(exe_mmap);
2094
2095 const hdr = @ptrCast(
2096 *const macho.mach_header_64,
2097 @alignCast(@alignOf(macho.mach_header_64), exe_mmap.ptr),
2098 );
21212099 if (hdr.magic != std.macho.MH_MAGIC_64) return error.InvalidDebugInfo;
21222100
21232101 const hdr_base = @ptrCast([*]const u8, hdr);
......@@ -2126,181 +2104,75 @@ fn getLineNumberInfoMacOs(di: *DebugInfo, symbol: MachoSymbol, target_address: u
21262104 const segcmd = while (ncmd != 0) : (ncmd -= 1) {
21272105 const lc = @ptrCast(*const std.macho.load_command, ptr);
21282106 switch (lc.cmd) {
2129 std.macho.LC_SEGMENT_64 => break @ptrCast(*const std.macho.segment_command_64, @alignCast(@alignOf(std.macho.segment_command_64), ptr)),
2107 std.macho.LC_SEGMENT_64 => {
2108 break @ptrCast(
2109 *const std.macho.segment_command_64,
2110 @alignCast(@alignOf(std.macho.segment_command_64), ptr),
2111 );
2112 },
21302113 else => {},
21312114 }
21322115 ptr = @alignCast(@alignOf(std.macho.load_command), ptr + lc.cmdsize);
21332116 } else {
21342117 return error.MissingDebugInfo;
21352118 };
2119
2120 var opt_debug_line: ?*const macho.section_64 = null;
2121 var opt_debug_info: ?*const macho.section_64 = null;
2122 var opt_debug_abbrev: ?*const macho.section_64 = null;
2123 var opt_debug_str: ?*const macho.section_64 = null;
2124 var opt_debug_ranges: ?*const macho.section_64 = null;
2125
21362126 const sections = @ptrCast([*]const macho.section_64, @alignCast(@alignOf(macho.section_64), ptr + @sizeOf(std.macho.segment_command_64)))[0..segcmd.nsects];
21372127 for (sections) |*sect| {
2138 if (sect.flags & macho.SECTION_TYPE == macho.S_REGULAR and
2139 (sect.flags & macho.SECTION_ATTRIBUTES) & macho.S_ATTR_DEBUG == macho.S_ATTR_DEBUG)
2140 {
2141 const sect_name = mem.toSliceConst(u8, @ptrCast([*:0]const u8, &sect.sectname));
2142 if (mem.eql(u8, sect_name, "__debug_line")) {
2143 gop.kv.value.sect_debug_line = sect;
2144 } else if (mem.eql(u8, sect_name, "__debug_info")) {
2145 gop.kv.value.sect_debug_info = sect;
2146 }
2128 // The section name may not exceed 16 chars and a trailing null may
2129 // not be present
2130 const name = if (mem.indexOfScalar(u8, sect.sectname[0..], 0)) |last|
2131 sect.sectname[0..last]
2132 else
2133 sect.sectname[0..];
2134
2135 if (mem.eql(u8, name, "__debug_line")) {
2136 opt_debug_line = sect;
2137 } else if (mem.eql(u8, name, "__debug_info")) {
2138 opt_debug_info = sect;
2139 } else if (mem.eql(u8, name, "__debug_abbrev")) {
2140 opt_debug_abbrev = sect;
2141 } else if (mem.eql(u8, name, "__debug_str")) {
2142 opt_debug_str = sect;
2143 } else if (mem.eql(u8, name, "__debug_ranges")) {
2144 opt_debug_ranges = sect;
21472145 }
21482146 }
21492147
2150 break :blk &gop.kv.value;
2151 };
2152
2153 const sect_debug_line = mach_o_file.sect_debug_line orelse return error.MissingDebugInfo;
2154 var ptr = mach_o_file.bytes.ptr + sect_debug_line.offset;
2155
2156 var is_64: bool = undefined;
2157 const unit_length = try readInitialLengthMem(&ptr, &is_64);
2158 if (unit_length == 0) return error.MissingDebugInfo;
2159
2160 const version = readIntMem(&ptr, u16, builtin.Endian.Little);
2161 // TODO support 3 and 5
2162 if (version != 2 and version != 4) return error.InvalidDebugInfo;
2163
2164 const prologue_length = if (is_64)
2165 readIntMem(&ptr, u64, builtin.Endian.Little)
2166 else
2167 readIntMem(&ptr, u32, builtin.Endian.Little);
2168 const prog_start = ptr + prologue_length;
2169
2170 const minimum_instruction_length = readByteMem(&ptr);
2171 if (minimum_instruction_length == 0) return error.InvalidDebugInfo;
2172
2173 if (version >= 4) {
2174 // maximum_operations_per_instruction
2175 ptr += 1;
2176 }
2177
2178 const default_is_stmt = readByteMem(&ptr) != 0;
2179 const line_base = readByteSignedMem(&ptr);
2180
2181 const line_range = readByteMem(&ptr);
2182 if (line_range == 0) return error.InvalidDebugInfo;
2183
2184 const opcode_base = readByteMem(&ptr);
2185
2186 const standard_opcode_lengths = ptr[0 .. opcode_base - 1];
2187 ptr += opcode_base - 1;
2188
2189 var include_directories = ArrayList([]const u8).init(di.allocator());
2190 try include_directories.append("");
2191 while (true) {
2192 const dir = readStringMem(&ptr);
2193 if (dir.len == 0) break;
2194 try include_directories.append(dir);
2195 }
2196
2197 var file_entries = ArrayList(FileEntry).init(di.allocator());
2198 var prog = LineNumberProgram.init(default_is_stmt, include_directories.toSliceConst(), &file_entries, target_address);
2148 var debug_line = opt_debug_line orelse
2149 return error.MissingDebugInfo;
2150 var debug_info = opt_debug_info orelse
2151 return error.MissingDebugInfo;
2152 var debug_str = opt_debug_str orelse
2153 return error.MissingDebugInfo;
2154 var debug_abbrev = opt_debug_abbrev orelse
2155 return error.MissingDebugInfo;
21992156
2200 while (true) {
2201 const file_name = readStringMem(&ptr);
2202 if (file_name.len == 0) break;
2203 const dir_index = try leb.readULEB128Mem(usize, &ptr);
2204 const mtime = try leb.readULEB128Mem(usize, &ptr);
2205 const len_bytes = try leb.readULEB128Mem(usize, &ptr);
2206 try file_entries.append(FileEntry{
2207 .file_name = file_name,
2208 .dir_index = dir_index,
2209 .mtime = mtime,
2210 .len_bytes = len_bytes,
2211 });
2212 }
2157 gop.kv.value = DwarfInfo{
2158 .endian = .Little,
2159 .debug_info = exe_mmap[@intCast(usize, debug_info.offset)..@intCast(usize, debug_info.offset + debug_info.size)],
2160 .debug_abbrev = exe_mmap[@intCast(usize, debug_abbrev.offset)..@intCast(usize, debug_abbrev.offset + debug_abbrev.size)],
2161 .debug_str = exe_mmap[@intCast(usize, debug_str.offset)..@intCast(usize, debug_str.offset + debug_str.size)],
2162 .debug_line = exe_mmap[@intCast(usize, debug_line.offset)..@intCast(usize, debug_line.offset + debug_line.size)],
2163 .debug_ranges = if (opt_debug_ranges) |debug_ranges|
2164 exe_mmap[@intCast(usize, debug_ranges.offset)..@intCast(usize, debug_ranges.offset + debug_ranges.size)]
2165 else
2166 null,
2167 };
2168 try openDwarfDebugInfo(&gop.kv.value, di.allocator());
22132169
2214 ptr = prog_start;
2215 while (true) {
2216 const opcode = readByteMem(&ptr);
2217
2218 if (opcode == DW.LNS_extended_op) {
2219 const op_size = try leb.readULEB128Mem(u64, &ptr);
2220 if (op_size < 1) return error.InvalidDebugInfo;
2221 var sub_op = readByteMem(&ptr);
2222 switch (sub_op) {
2223 DW.LNE_end_sequence => {
2224 prog.end_sequence = true;
2225 if (try prog.checkLineMatch()) |info| return info;
2226 return error.MissingDebugInfo;
2227 },
2228 DW.LNE_set_address => {
2229 const addr = readIntMem(&ptr, usize, builtin.Endian.Little);
2230 prog.address = symbol.reloc + addr;
2231 },
2232 DW.LNE_define_file => {
2233 const file_name = readStringMem(&ptr);
2234 const dir_index = try leb.readULEB128Mem(usize, &ptr);
2235 const mtime = try leb.readULEB128Mem(usize, &ptr);
2236 const len_bytes = try leb.readULEB128Mem(usize, &ptr);
2237 try file_entries.append(FileEntry{
2238 .file_name = file_name,
2239 .dir_index = dir_index,
2240 .mtime = mtime,
2241 .len_bytes = len_bytes,
2242 });
2243 },
2244 else => {
2245 ptr += op_size - 1;
2246 },
2247 }
2248 } else if (opcode >= opcode_base) {
2249 // special opcodes
2250 const adjusted_opcode = opcode - opcode_base;
2251 const inc_addr = minimum_instruction_length * (adjusted_opcode / line_range);
2252 const inc_line = @as(i32, line_base) + @as(i32, adjusted_opcode % line_range);
2253 prog.line += inc_line;
2254 prog.address += inc_addr;
2255 if (try prog.checkLineMatch()) |info| return info;
2256 prog.basic_block = false;
2257 } else {
2258 switch (opcode) {
2259 DW.LNS_copy => {
2260 if (try prog.checkLineMatch()) |info| return info;
2261 prog.basic_block = false;
2262 },
2263 DW.LNS_advance_pc => {
2264 const arg = try leb.readULEB128Mem(usize, &ptr);
2265 prog.address += arg * minimum_instruction_length;
2266 },
2267 DW.LNS_advance_line => {
2268 const arg = try leb.readILEB128Mem(i64, &ptr);
2269 prog.line += arg;
2270 },
2271 DW.LNS_set_file => {
2272 const arg = try leb.readULEB128Mem(usize, &ptr);
2273 prog.file = arg;
2274 },
2275 DW.LNS_set_column => {
2276 const arg = try leb.readULEB128Mem(u64, &ptr);
2277 prog.column = arg;
2278 },
2279 DW.LNS_negate_stmt => {
2280 prog.is_stmt = !prog.is_stmt;
2281 },
2282 DW.LNS_set_basic_block => {
2283 prog.basic_block = true;
2284 },
2285 DW.LNS_const_add_pc => {
2286 const inc_addr = minimum_instruction_length * ((255 - opcode_base) / line_range);
2287 prog.address += inc_addr;
2288 },
2289 DW.LNS_fixed_advance_pc => {
2290 const arg = readIntMem(&ptr, u16, builtin.Endian.Little);
2291 prog.address += arg;
2292 },
2293 DW.LNS_set_prologue_end => {},
2294 else => {
2295 if (opcode - 1 >= standard_opcode_lengths.len) return error.InvalidDebugInfo;
2296 const len_bytes = standard_opcode_lengths[opcode - 1];
2297 ptr += len_bytes;
2298 },
2299 }
2300 }
2301 }
2170 break :blk &gop.kv.value;
2171 };
23022172
2303 return error.MissingDebugInfo;
2173 const o_file_address = address - symbol.reloc;
2174 const compile_unit = try dwarf_info.findCompileUnit(o_file_address);
2175 return dwarf_info.getLineNumberInfo(compile_unit.*, o_file_address);
23042176}
23052177
23062178const Func = struct {
......@@ -2308,47 +2180,6 @@ const Func = struct {
23082180 name: ?[]u8,
23092181};
23102182
2311fn readIntMem(ptr: *[*]const u8, comptime T: type, endian: builtin.Endian) T {
2312 // TODO https://github.com/ziglang/zig/issues/863
2313 const size = (T.bit_count + 7) / 8;
2314 const result = mem.readIntSlice(T, ptr.*[0..size], endian);
2315 ptr.* += size;
2316 return result;
2317}
2318
2319fn readByteMem(ptr: *[*]const u8) u8 {
2320 const result = ptr.*[0];
2321 ptr.* += 1;
2322 return result;
2323}
2324
2325fn readByteSignedMem(ptr: *[*]const u8) i8 {
2326 return @bitCast(i8, readByteMem(ptr));
2327}
2328
2329fn readInitialLengthMem(ptr: *[*]const u8, is_64: *bool) !u64 {
2330 // TODO this code can be improved with https://github.com/ziglang/zig/issues/863
2331 const first_32_bits = mem.readIntSliceLittle(u32, ptr.*[0..4]);
2332 is_64.* = (first_32_bits == 0xffffffff);
2333 if (is_64.*) {
2334 ptr.* += 4;
2335 const result = mem.readIntSliceLittle(u64, ptr.*[0..8]);
2336 ptr.* += 8;
2337 return result;
2338 } else {
2339 if (first_32_bits >= 0xfffffff0) return error.InvalidDebugInfo;
2340 ptr.* += 4;
2341 // TODO this cast should not be needed
2342 return @as(u64, first_32_bits);
2343 }
2344}
2345
2346fn readStringMem(ptr: *[*]const u8) [:0]const u8 {
2347 const result = mem.toSliceConst(u8, @ptrCast([*:0]const u8, ptr.*));
2348 ptr.* += result.len + 1;
2349 return result;
2350}
2351
23522183fn readInitialLength(comptime E: type, in_stream: *io.InStream(E), is_64: *bool) !u64 {
23532184 const first_32_bits = try in_stream.readIntLittle(u32);
23542185 is_64.* = (first_32_bits == 0xffffffff);
lib/std/dynamic_library.zig+1-1
......@@ -277,7 +277,7 @@ pub const WindowsDynLib = struct {
277277 }
278278
279279 pub fn openC(path_c: [*:0]const u8) !WindowsDynLib {
280 const path_w = try windows.cStrToPrefixedFileW(path);
280 const path_w = try windows.cStrToPrefixedFileW(path_c);
281281 return openW(&path_w);
282282 }
283283
lib/std/fmt.zig+16-6
......@@ -431,7 +431,7 @@ pub fn formatType(
431431 },
432432 else => return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) }),
433433 },
434 .Many => {
434 .Many, .C => {
435435 if (ptr_info.child == u8) {
436436 if (fmt.len > 0 and fmt[0] == 's') {
437437 const len = mem.len(u8, value);
......@@ -449,9 +449,6 @@ pub fn formatType(
449449 }
450450 return format(context, Errors, output, "{}@{x}", .{ @typeName(ptr_info.child), @ptrToInt(value.ptr) });
451451 },
452 .C => {
453 return format(context, Errors, output, "{}@{x}", .{ @typeName(T.Child), @ptrToInt(value) });
454 },
455452 },
456453 .Array => |info| {
457454 const Slice = @Type(builtin.TypeInfo{
......@@ -1138,6 +1135,11 @@ fn countSize(size: *usize, bytes: []const u8) (error{}!void) {
11381135 size.* += bytes.len;
11391136}
11401137
1138pub fn allocPrint0(allocator: *mem.Allocator, comptime fmt: []const u8, args: var) AllocPrintError![:0]u8 {
1139 const result = try allocPrint(allocator, fmt ++ "\x00", args);
1140 return result[0 .. result.len - 1 :0];
1141}
1142
11411143test "bufPrintInt" {
11421144 var buffer: [100]u8 = undefined;
11431145 const buf = buffer[0..];
......@@ -1285,8 +1287,16 @@ test "pointer" {
12851287}
12861288
12871289test "cstr" {
1288 try testFmt("cstr: Test C\n", "cstr: {s}\n", .{"Test C"});
1289 try testFmt("cstr: Test C \n", "cstr: {s:10}\n", .{"Test C"});
1290 try testFmt(
1291 "cstr: Test C\n",
1292 "cstr: {s}\n",
1293 .{@ptrCast([*c]const u8, "Test C")},
1294 );
1295 try testFmt(
1296 "cstr: Test C \n",
1297 "cstr: {s:10}\n",
1298 .{@ptrCast([*c]const u8, "Test C")},
1299 );
12901300}
12911301
12921302test "filesize" {
lib/std/fmt/parse_float.zig+4
......@@ -382,6 +382,10 @@ pub fn parseFloat(comptime T: type, s: []const u8) !T {
382382}
383383
384384test "fmt.parseFloat" {
385 if (std.Target.current.isWindows()) {
386 // TODO https://github.com/ziglang/zig/issues/508
387 return error.SkipZigTest;
388 }
385389 const testing = std.testing;
386390 const expect = testing.expect;
387391 const expectEqual = testing.expectEqual;
lib/std/hash/benchmark.zig+2-2
......@@ -47,11 +47,11 @@ const hashes = [_]Hash{
4747 .name = "adler32",
4848 },
4949 Hash{
50 .ty = hash.crc.Crc32WithPoly(hash.crc.Polynomial.IEEE),
50 .ty = hash.crc.Crc32WithPoly(.IEEE),
5151 .name = "crc32-slicing-by-8",
5252 },
5353 Hash{
54 .ty = hash.crc.Crc32SmallWithPoly(hash.crc.Polynomial.IEEE),
54 .ty = hash.crc.Crc32SmallWithPoly(.IEEE),
5555 .name = "crc32-half-byte-lookup",
5656 },
5757 Hash{
lib/std/hash/crc.zig+14-13
......@@ -9,17 +9,18 @@ const std = @import("../std.zig");
99const debug = std.debug;
1010const testing = std.testing;
1111
12pub const Polynomial = struct {
13 pub const IEEE = 0xedb88320;
14 pub const Castagnoli = 0x82f63b78;
15 pub const Koopman = 0xeb31d82e;
12pub const Polynomial = enum(u32) {
13 IEEE = 0xedb88320,
14 Castagnoli = 0x82f63b78,
15 Koopman = 0xeb31d82e,
16 _,
1617};
1718
1819// IEEE is by far the most common CRC and so is aliased by default.
19pub const Crc32 = Crc32WithPoly(Polynomial.IEEE);
20pub const Crc32 = Crc32WithPoly(.IEEE);
2021
2122// slicing-by-8 crc32 implementation.
22pub fn Crc32WithPoly(comptime poly: u32) type {
23pub fn Crc32WithPoly(comptime poly: Polynomial) type {
2324 return struct {
2425 const Self = @This();
2526 const lookup_tables = comptime block: {
......@@ -31,7 +32,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
3132 var j: usize = 0;
3233 while (j < 8) : (j += 1) {
3334 if (crc & 1 == 1) {
34 crc = (crc >> 1) ^ poly;
35 crc = (crc >> 1) ^ @enumToInt(poly);
3536 } else {
3637 crc = (crc >> 1);
3738 }
......@@ -100,7 +101,7 @@ pub fn Crc32WithPoly(comptime poly: u32) type {
100101}
101102
102103test "crc32 ieee" {
103 const Crc32Ieee = Crc32WithPoly(Polynomial.IEEE);
104 const Crc32Ieee = Crc32WithPoly(.IEEE);
104105
105106 testing.expect(Crc32Ieee.hash("") == 0x00000000);
106107 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
......@@ -108,7 +109,7 @@ test "crc32 ieee" {
108109}
109110
110111test "crc32 castagnoli" {
111 const Crc32Castagnoli = Crc32WithPoly(Polynomial.Castagnoli);
112 const Crc32Castagnoli = Crc32WithPoly(.Castagnoli);
112113
113114 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
114115 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
......@@ -116,7 +117,7 @@ test "crc32 castagnoli" {
116117}
117118
118119// half-byte lookup table implementation.
119pub fn Crc32SmallWithPoly(comptime poly: u32) type {
120pub fn Crc32SmallWithPoly(comptime poly: Polynomial) type {
120121 return struct {
121122 const Self = @This();
122123 const lookup_table = comptime block: {
......@@ -127,7 +128,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
127128 var j: usize = 0;
128129 while (j < 8) : (j += 1) {
129130 if (crc & 1 == 1) {
130 crc = (crc >> 1) ^ poly;
131 crc = (crc >> 1) ^ @enumToInt(poly);
131132 } else {
132133 crc = (crc >> 1);
133134 }
......@@ -164,7 +165,7 @@ pub fn Crc32SmallWithPoly(comptime poly: u32) type {
164165}
165166
166167test "small crc32 ieee" {
167 const Crc32Ieee = Crc32SmallWithPoly(Polynomial.IEEE);
168 const Crc32Ieee = Crc32SmallWithPoly(.IEEE);
168169
169170 testing.expect(Crc32Ieee.hash("") == 0x00000000);
170171 testing.expect(Crc32Ieee.hash("a") == 0xe8b7be43);
......@@ -172,7 +173,7 @@ test "small crc32 ieee" {
172173}
173174
174175test "small crc32 castagnoli" {
175 const Crc32Castagnoli = Crc32SmallWithPoly(Polynomial.Castagnoli);
176 const Crc32Castagnoli = Crc32SmallWithPoly(.Castagnoli);
176177
177178 testing.expect(Crc32Castagnoli.hash("") == 0x00000000);
178179 testing.expect(Crc32Castagnoli.hash("a") == 0xc1d04330);
lib/std/http/headers.zig+1-1
......@@ -172,7 +172,7 @@ pub const Headers = struct {
172172 var dex = HeaderIndexList.init(self.allocator);
173173 try dex.append(n - 1);
174174 errdefer dex.deinit();
175 _ = try self.index.put(name, dex);
175 _ = try self.index.put(name_dup, dex);
176176 }
177177 self.data.appendAssumeCapacity(entry);
178178 }
lib/std/io/out_stream.zig+8-4
......@@ -45,10 +45,14 @@ pub fn OutStream(comptime WriteError: type) type {
4545 }
4646
4747 pub fn writeByteNTimes(self: *Self, byte: u8, n: usize) Error!void {
48 const slice = @as(*const [1]u8, &byte)[0..];
49 var i: usize = 0;
50 while (i < n) : (i += 1) {
51 try self.writeFn(self, slice);
48 var bytes: [256]u8 = undefined;
49 mem.set(u8, bytes[0..], byte);
50
51 var remaining: usize = n;
52 while (remaining > 0) {
53 const to_write = std.math.min(remaining, bytes.len);
54 try self.writeFn(self, bytes[0..to_write]);
55 remaining -= to_write;
5256 }
5357 }
5458
lib/std/io/test.zig+4
......@@ -547,6 +547,10 @@ fn testSerializerDeserializer(comptime endian: builtin.Endian, comptime packing:
547547}
548548
549549test "Serializer/Deserializer generic" {
550 if (std.Target.current.isWindows()) {
551 // TODO https://github.com/ziglang/zig/issues/508
552 return error.SkipZigTest;
553 }
550554 try testSerializerDeserializer(builtin.Endian.Big, .Byte);
551555 try testSerializerDeserializer(builtin.Endian.Little, .Byte);
552556 try testSerializerDeserializer(builtin.Endian.Big, .Bit);
lib/std/math/fabs.zig+4
......@@ -95,6 +95,10 @@ test "math.fabs64.special" {
9595}
9696
9797test "math.fabs128.special" {
98 if (std.Target.current.isWindows()) {
99 // TODO https://github.com/ziglang/zig/issues/508
100 return error.SkipZigTest;
101 }
98102 expect(math.isPositiveInf(fabs(math.inf(f128))));
99103 expect(math.isPositiveInf(fabs(-math.inf(f128))));
100104 expect(math.isNan(fabs(math.nan(f128))));
lib/std/math/isinf.zig+12
......@@ -74,6 +74,10 @@ pub fn isNegativeInf(x: var) bool {
7474}
7575
7676test "math.isInf" {
77 if (std.Target.current.isWindows()) {
78 // TODO https://github.com/ziglang/zig/issues/508
79 return error.SkipZigTest;
80 }
7781 expect(!isInf(@as(f16, 0.0)));
7882 expect(!isInf(@as(f16, -0.0)));
7983 expect(!isInf(@as(f32, 0.0)));
......@@ -93,6 +97,10 @@ test "math.isInf" {
9397}
9498
9599test "math.isPositiveInf" {
100 if (std.Target.current.isWindows()) {
101 // TODO https://github.com/ziglang/zig/issues/508
102 return error.SkipZigTest;
103 }
96104 expect(!isPositiveInf(@as(f16, 0.0)));
97105 expect(!isPositiveInf(@as(f16, -0.0)));
98106 expect(!isPositiveInf(@as(f32, 0.0)));
......@@ -112,6 +120,10 @@ test "math.isPositiveInf" {
112120}
113121
114122test "math.isNegativeInf" {
123 if (std.Target.current.isWindows()) {
124 // TODO https://github.com/ziglang/zig/issues/508
125 return error.SkipZigTest;
126 }
115127 expect(!isNegativeInf(@as(f16, 0.0)));
116128 expect(!isNegativeInf(@as(f16, -0.0)));
117129 expect(!isNegativeInf(@as(f32, 0.0)));
lib/std/math/isnan.zig+4
......@@ -16,6 +16,10 @@ pub fn isSignalNan(x: var) bool {
1616}
1717
1818test "math.isNan" {
19 if (std.Target.current.isWindows()) {
20 // TODO https://github.com/ziglang/zig/issues/508
21 return error.SkipZigTest;
22 }
1923 expect(isNan(math.nan(f16)));
2024 expect(isNan(math.nan(f32)));
2125 expect(isNan(math.nan(f64)));
lib/std/mem.zig+3
......@@ -175,6 +175,7 @@ pub const Allocator = struct {
175175
176176 const old_byte_slice = @sliceToBytes(old_mem);
177177 const byte_count = math.mul(usize, @sizeOf(T), new_n) catch return Error.OutOfMemory;
178 // Note: can't set shrunk memory to undefined as memory shouldn't be modified on realloc failure
178179 const byte_slice = try self.reallocFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
179180 assert(byte_slice.len == byte_count);
180181 if (new_n > old_mem.len) {
......@@ -221,6 +222,7 @@ pub const Allocator = struct {
221222 const byte_count = @sizeOf(T) * new_n;
222223
223224 const old_byte_slice = @sliceToBytes(old_mem);
225 @memset(old_byte_slice.ptr + byte_count, undefined, old_byte_slice.len - byte_count);
224226 const byte_slice = self.shrinkFn(self, old_byte_slice, Slice.alignment, byte_count, new_alignment);
225227 assert(byte_slice.len == byte_count);
226228 return @bytesToSlice(T, @alignCast(new_alignment, byte_slice));
......@@ -234,6 +236,7 @@ pub const Allocator = struct {
234236 const bytes_len = bytes.len + @boolToInt(Slice.sentinel != null);
235237 if (bytes_len == 0) return;
236238 const non_const_ptr = @intToPtr([*]u8, @ptrToInt(bytes.ptr));
239 @memset(non_const_ptr, undefined, bytes_len);
237240 const shrink_result = self.shrinkFn(self, non_const_ptr[0..bytes_len], Slice.alignment, 0, 1);
238241 assert(shrink_result.len == 0);
239242 }
lib/std/meta.zig+18
......@@ -556,3 +556,21 @@ pub fn refAllDecls(comptime T: type) void {
556556 if (!builtin.is_test) return;
557557 _ = declarations(T);
558558}
559
560/// Returns a slice of pointers to public declarations of a namespace.
561pub fn declList(comptime Namespace: type, comptime Decl: type) []const *const Decl {
562 const S = struct {
563 fn declNameLessThan(lhs: *const Decl, rhs: *const Decl) bool {
564 return mem.lessThan(u8, lhs.name, rhs.name);
565 }
566 };
567 comptime {
568 const decls = declarations(Namespace);
569 var array: [decls.len]*const Decl = undefined;
570 for (decls) |decl, i| {
571 array[i] = &@field(Namespace, decl.name);
572 }
573 std.sort.sort(*const Decl, &array, S.declNameLessThan);
574 return &array;
575 }
576}
lib/std/net.zig+12-12
......@@ -452,18 +452,18 @@ pub fn getAddressList(allocator: *mem.Allocator, name: []const u8, port: u16) !*
452452 };
453453 var res: *os.addrinfo = undefined;
454454 switch (os.system.getaddrinfo(name_c.ptr, @ptrCast([*:0]const u8, port_c.ptr), &hints, &res)) {
455 0 => {},
456 c.EAI_ADDRFAMILY => return error.HostLacksNetworkAddresses,
457 c.EAI_AGAIN => return error.TemporaryNameServerFailure,
458 c.EAI_BADFLAGS => unreachable, // Invalid hints
459 c.EAI_FAIL => return error.NameServerFailure,
460 c.EAI_FAMILY => return error.AddressFamilyNotSupported,
461 c.EAI_MEMORY => return error.OutOfMemory,
462 c.EAI_NODATA => return error.HostLacksNetworkAddresses,
463 c.EAI_NONAME => return error.UnknownHostName,
464 c.EAI_SERVICE => return error.ServiceUnavailable,
465 c.EAI_SOCKTYPE => unreachable, // Invalid socket type requested in hints
466 c.EAI_SYSTEM => switch (os.errno(-1)) {
455 @intToEnum(os.system.EAI, 0) => {},
456 .ADDRFAMILY => return error.HostLacksNetworkAddresses,
457 .AGAIN => return error.TemporaryNameServerFailure,
458 .BADFLAGS => unreachable, // Invalid hints
459 .FAIL => return error.NameServerFailure,
460 .FAMILY => return error.AddressFamilyNotSupported,
461 .MEMORY => return error.OutOfMemory,
462 .NODATA => return error.HostLacksNetworkAddresses,
463 .NONAME => return error.UnknownHostName,
464 .SERVICE => return error.ServiceUnavailable,
465 .SOCKTYPE => unreachable, // Invalid socket type requested in hints
466 .SYSTEM => switch (os.errno(-1)) {
467467 else => |e| return os.unexpectedErrno(e),
468468 },
469469 else => unreachable,
lib/std/os/bits/linux.zig+1-1
......@@ -18,7 +18,7 @@ pub usingnamespace switch (builtin.arch) {
1818 else => struct {},
1919};
2020
21const is_mips = builtin.arch == .mipsel;
21const is_mips = builtin.arch.isMIPS();
2222
2323pub const pid_t = i32;
2424pub const fd_t = i32;
lib/std/os/linux/tls.zig+1-1
......@@ -211,7 +211,7 @@ pub fn initTLS() ?*elf.Phdr {
211211
212212 if (tls_phdr) |phdr| {
213213 // If the cpu is arm-based, check if it supports the TLS register
214 if (builtin.arch == builtin.Arch.arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
214 if (builtin.arch == .arm and at_hwcap & std.os.linux.HWCAP_TLS == 0) {
215215 // If the CPU does not support TLS via a coprocessor register,
216216 // a kernel helper function can be used instead on certain linux kernels.
217217 // See linux/arch/arm/include/asm/tls.h and musl/src/thread/arm/__set_thread_area.c.
lib/std/special/compiler_rt.zig+54-71
......@@ -16,42 +16,42 @@ comptime {
1616 else => {},
1717 }
1818
19 @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });
20 @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });
21 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });
19 @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__lesf2", .linkage = linkage });
20 @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__ledf2", .linkage = linkage });
21 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__letf2", .linkage = linkage });
2222
23 @export(@import("compiler_rt/comparesf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });
24 @export(@import("compiler_rt/comparedf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });
25 @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });
23 @export(@import("compiler_rt/compareXf2.zig").__gesf2, .{ .name = "__gesf2", .linkage = linkage });
24 @export(@import("compiler_rt/compareXf2.zig").__gedf2, .{ .name = "__gedf2", .linkage = linkage });
25 @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__getf2", .linkage = linkage });
2626
2727 if (!is_test) {
28 @export(@import("compiler_rt/comparesf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });
29 @export(@import("compiler_rt/comparedf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });
30 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });
28 @export(@import("compiler_rt/compareXf2.zig").__lesf2, .{ .name = "__cmpsf2", .linkage = linkage });
29 @export(@import("compiler_rt/compareXf2.zig").__ledf2, .{ .name = "__cmpdf2", .linkage = linkage });
30 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__cmptf2", .linkage = linkage });
3131
32 @export(@import("compiler_rt/comparesf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });
33 @export(@import("compiler_rt/comparedf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });
34 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });
32 @export(@import("compiler_rt/compareXf2.zig").__eqsf2, .{ .name = "__eqsf2", .linkage = linkage });
33 @export(@import("compiler_rt/compareXf2.zig").__eqdf2, .{ .name = "__eqdf2", .linkage = linkage });
34 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__eqtf2", .linkage = linkage });
3535
36 @export(@import("compiler_rt/comparesf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });
37 @export(@import("compiler_rt/comparedf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });
38 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });
36 @export(@import("compiler_rt/compareXf2.zig").__ltsf2, .{ .name = "__ltsf2", .linkage = linkage });
37 @export(@import("compiler_rt/compareXf2.zig").__ltdf2, .{ .name = "__ltdf2", .linkage = linkage });
38 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__lttf2", .linkage = linkage });
3939
40 @export(@import("compiler_rt/comparesf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });
41 @export(@import("compiler_rt/comparedf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });
42 @export(@import("compiler_rt/comparetf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });
40 @export(@import("compiler_rt/compareXf2.zig").__nesf2, .{ .name = "__nesf2", .linkage = linkage });
41 @export(@import("compiler_rt/compareXf2.zig").__nedf2, .{ .name = "__nedf2", .linkage = linkage });
42 @export(@import("compiler_rt/compareXf2.zig").__letf2, .{ .name = "__netf2", .linkage = linkage });
4343
44 @export(@import("compiler_rt/comparesf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });
45 @export(@import("compiler_rt/comparedf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });
46 @export(@import("compiler_rt/comparetf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });
44 @export(@import("compiler_rt/compareXf2.zig").__gtsf2, .{ .name = "__gtsf2", .linkage = linkage });
45 @export(@import("compiler_rt/compareXf2.zig").__gtdf2, .{ .name = "__gtdf2", .linkage = linkage });
46 @export(@import("compiler_rt/compareXf2.zig").__getf2, .{ .name = "__gttf2", .linkage = linkage });
4747
4848 @export(@import("compiler_rt/extendXfYf2.zig").__extendhfsf2, .{ .name = "__gnu_h2f_ieee", .linkage = linkage });
4949 @export(@import("compiler_rt/truncXfYf2.zig").__truncsfhf2, .{ .name = "__gnu_f2h_ieee", .linkage = linkage });
5050 }
5151
52 @export(@import("compiler_rt/comparesf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });
53 @export(@import("compiler_rt/comparedf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });
54 @export(@import("compiler_rt/comparetf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });
52 @export(@import("compiler_rt/compareXf2.zig").__unordsf2, .{ .name = "__unordsf2", .linkage = linkage });
53 @export(@import("compiler_rt/compareXf2.zig").__unorddf2, .{ .name = "__unorddf2", .linkage = linkage });
54 @export(@import("compiler_rt/compareXf2.zig").__unordtf2, .{ .name = "__unordtf2", .linkage = linkage });
5555
5656 @export(@import("compiler_rt/addXf3.zig").__addsf3, .{ .name = "__addsf3", .linkage = linkage });
5757 @export(@import("compiler_rt/addXf3.zig").__adddf3, .{ .name = "__adddf3", .linkage = linkage });
......@@ -130,6 +130,7 @@ comptime {
130130 @export(@import("compiler_rt/int.zig").__udivmoddi4, .{ .name = "__udivmoddi4", .linkage = linkage });
131131 @export(@import("compiler_rt/popcountdi2.zig").__popcountdi2, .{ .name = "__popcountdi2", .linkage = linkage });
132132
133 @export(@import("compiler_rt/int.zig").__mulsi3, .{ .name = "__mulsi3", .linkage = linkage });
133134 @export(@import("compiler_rt/muldi3.zig").__muldi3, .{ .name = "__muldi3", .linkage = linkage });
134135 @export(@import("compiler_rt/int.zig").__divmoddi4, .{ .name = "__divmoddi4", .linkage = linkage });
135136 @export(@import("compiler_rt/int.zig").__divsi3, .{ .name = "__divsi3", .linkage = linkage });
......@@ -146,7 +147,9 @@ comptime {
146147 @export(@import("compiler_rt/negXf2.zig").__negsf2, .{ .name = "__negsf2", .linkage = linkage });
147148 @export(@import("compiler_rt/negXf2.zig").__negdf2, .{ .name = "__negdf2", .linkage = linkage });
148149
149 if (is_arm_arch and !is_arm_64 and !is_test) {
150 @export(@import("compiler_rt/clzsi2.zig").__clzsi2, .{ .name = "__clzsi2", .linkage = linkage });
151
152 if (builtin.arch.isARM() and !is_test) {
150153 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr0, .{ .name = "__aeabi_unwind_cpp_pr0", .linkage = linkage });
151154 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr1, .{ .name = "__aeabi_unwind_cpp_pr1", .linkage = linkage });
152155 @export(@import("compiler_rt/arm.zig").__aeabi_unwind_cpp_pr2, .{ .name = "__aeabi_unwind_cpp_pr2", .linkage = linkage });
......@@ -177,7 +180,9 @@ comptime {
177180 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr4", .linkage = linkage });
178181 @export(@import("compiler_rt/arm.zig").__aeabi_memclr, .{ .name = "__aeabi_memclr8", .linkage = linkage });
179182
180 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
183 if (builtin.os == .linux) {
184 @export(@import("compiler_rt/arm.zig").__aeabi_read_tp, .{ .name = "__aeabi_read_tp", .linkage = linkage });
185 }
181186
182187 @export(@import("compiler_rt/extendXfYf2.zig").__aeabi_f2d, .{ .name = "__aeabi_f2d", .linkage = linkage });
183188 @export(@import("compiler_rt/floatsiXf.zig").__aeabi_i2d, .{ .name = "__aeabi_i2d", .linkage = linkage });
......@@ -222,20 +227,29 @@ comptime {
222227 @export(@import("compiler_rt/divsf3.zig").__aeabi_fdiv, .{ .name = "__aeabi_fdiv", .linkage = linkage });
223228 @export(@import("compiler_rt/divdf3.zig").__aeabi_ddiv, .{ .name = "__aeabi_ddiv", .linkage = linkage });
224229
225 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });
226 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });
227 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
228 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
229 @export(@import("compiler_rt/arm/aeabi_fcmp.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
230 @export(@import("compiler_rt/comparesf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
231
232 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
233 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
234 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
235 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
236 @export(@import("compiler_rt/arm/aeabi_dcmp.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
237 @export(@import("compiler_rt/comparedf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
230 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpeq, .{ .name = "__aeabi_fcmpeq", .linkage = linkage });
231 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmplt, .{ .name = "__aeabi_fcmplt", .linkage = linkage });
232 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmple, .{ .name = "__aeabi_fcmple", .linkage = linkage });
233 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpge, .{ .name = "__aeabi_fcmpge", .linkage = linkage });
234 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpgt, .{ .name = "__aeabi_fcmpgt", .linkage = linkage });
235 @export(@import("compiler_rt/compareXf2.zig").__aeabi_fcmpun, .{ .name = "__aeabi_fcmpun", .linkage = linkage });
236
237 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpeq, .{ .name = "__aeabi_dcmpeq", .linkage = linkage });
238 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmplt, .{ .name = "__aeabi_dcmplt", .linkage = linkage });
239 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmple, .{ .name = "__aeabi_dcmple", .linkage = linkage });
240 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpge, .{ .name = "__aeabi_dcmpge", .linkage = linkage });
241 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpgt, .{ .name = "__aeabi_dcmpgt", .linkage = linkage });
242 @export(@import("compiler_rt/compareXf2.zig").__aeabi_dcmpun, .{ .name = "__aeabi_dcmpun", .linkage = linkage });
243 }
244
245 if (builtin.arch == .i386 and builtin.abi == .msvc) {
246 // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
247 @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
248 @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
249 @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
250 @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
238251 }
252
239253 if (builtin.os == .windows) {
240254 // Default stack-probe functions emitted by LLVM
241255 if (is_mingw) {
......@@ -254,13 +268,6 @@ comptime {
254268
255269 switch (builtin.arch) {
256270 .i386 => {
257 // Don't let LLVM apply the stdcall name mangling on those MSVC
258 // builtin functions
259 @export(@import("compiler_rt/aulldiv.zig")._alldiv, .{ .name = "\x01__alldiv", .linkage = strong_linkage });
260 @export(@import("compiler_rt/aulldiv.zig")._aulldiv, .{ .name = "\x01__aulldiv", .linkage = strong_linkage });
261 @export(@import("compiler_rt/aullrem.zig")._allrem, .{ .name = "\x01__allrem", .linkage = strong_linkage });
262 @export(@import("compiler_rt/aullrem.zig")._aullrem, .{ .name = "\x01__aullrem", .linkage = strong_linkage });
263
264271 @export(@import("compiler_rt/divti3.zig").__divti3, .{ .name = "__divti3", .linkage = linkage });
265272 @export(@import("compiler_rt/modti3.zig").__modti3, .{ .name = "__modti3", .linkage = linkage });
266273 @export(@import("compiler_rt/multi3.zig").__multi3, .{ .name = "__multi3", .linkage = linkage });
......@@ -295,16 +302,12 @@ comptime {
295302 @export(@import("compiler_rt/mulodi4.zig").__mulodi4, .{ .name = "__mulodi4", .linkage = linkage });
296303}
297304
298const std = @import("std");
299const assert = std.debug.assert;
300const testing = std.testing;
301
302305// Avoid dragging in the runtime safety mechanisms into this .o file,
303306// unless we're trying to test this file.
304307pub fn panic(msg: []const u8, error_return_trace: ?*builtin.StackTrace) noreturn {
305308 @setCold(true);
306309 if (is_test) {
307 std.debug.panic("{}", .{msg});
310 @import("std").debug.panic("{}", .{msg});
308311 } else {
309312 unreachable;
310313 }
......@@ -320,23 +323,3 @@ extern var __stack_chk_guard: usize = blk: {
320323 buf[@sizeOf(usize) - 2] = '\n';
321324 break :blk @bitCast(usize, buf);
322325};
323
324const is_arm_64 = switch (builtin.arch) {
325 builtin.Arch.aarch64,
326 builtin.Arch.aarch64_be,
327 => true,
328 else => false,
329};
330
331const is_arm_arch = switch (builtin.arch) {
332 builtin.Arch.arm,
333 builtin.Arch.armeb,
334 builtin.Arch.aarch64,
335 builtin.Arch.aarch64_be,
336 builtin.Arch.thumb,
337 builtin.Arch.thumbeb,
338 => true,
339 else => false,
340};
341
342const is_arm_32 = is_arm_arch and !is_arm_64;
lib/std/special/compiler_rt/addXf3_test.zig+8
......@@ -31,6 +31,10 @@ fn test__addtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
3131}
3232
3333test "addtf3" {
34 if (@import("std").Target.current.isWindows()) {
35 // TODO https://github.com/ziglang/zig/issues/508
36 return error.SkipZigTest;
37 }
3438 test__addtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
3539
3640 // NaN + any = NaN
......@@ -71,6 +75,10 @@ fn test__subtf3(a: f128, b: f128, expected_hi: u64, expected_lo: u64) void {
7175}
7276
7377test "subtf3" {
78 if (@import("std").Target.current.isWindows()) {
79 // TODO https://github.com/ziglang/zig/issues/508
80 return error.SkipZigTest;
81 }
7482 // qNaN - any = qNaN
7583 test__subtf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
7684
lib/std/special/compiler_rt/arm/aeabi_dcmp.zig deleted-95
......@@ -1,95 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_dcmp.S
4
5const ConditionalOperator = enum {
6 Eq,
7 Lt,
8 Le,
9 Ge,
10 Gt,
11};
12
13pub fn __aeabi_dcmpeq() callconv(.Naked) noreturn {
14 @setRuntimeSafety(false);
15 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Eq});
16 unreachable;
17}
18
19pub fn __aeabi_dcmplt() callconv(.Naked) noreturn {
20 @setRuntimeSafety(false);
21 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Lt});
22 unreachable;
23}
24
25pub fn __aeabi_dcmple() callconv(.Naked) noreturn {
26 @setRuntimeSafety(false);
27 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Le});
28 unreachable;
29}
30
31pub fn __aeabi_dcmpge() callconv(.Naked) noreturn {
32 @setRuntimeSafety(false);
33 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Ge});
34 unreachable;
35}
36
37pub fn __aeabi_dcmpgt() callconv(.Naked) noreturn {
38 @setRuntimeSafety(false);
39 @call(.{ .modifier = .always_inline }, aeabi_dcmp, .{.Gt});
40 unreachable;
41}
42
43fn aeabi_dcmp(comptime cond: ConditionalOperator) void {
44 @setRuntimeSafety(false);
45 asm volatile (
46 \\ push { r4, lr }
47 );
48
49 switch (cond) {
50 .Eq => asm volatile (
51 \\ bl __eqdf2
52 \\ cmp r0, #0
53 \\ beq 1f
54 \\ movs r0, #0
55 \\ pop { r4, pc }
56 \\ 1:
57 ),
58 .Lt => asm volatile (
59 \\ bl __ltdf2
60 \\ cmp r0, #0
61 \\ blt 1f
62 \\ movs r0, #0
63 \\ pop { r4, pc }
64 \\ 1:
65 ),
66 .Le => asm volatile (
67 \\ bl __ledf2
68 \\ cmp r0, #0
69 \\ ble 1f
70 \\ movs r0, #0
71 \\ pop { r4, pc }
72 \\ 1:
73 ),
74 .Ge => asm volatile (
75 \\ bl __ltdf2
76 \\ cmp r0, #0
77 \\ bge 1f
78 \\ movs r0, #0
79 \\ pop { r4, pc }
80 \\ 1:
81 ),
82 .Gt => asm volatile (
83 \\ bl __gtdf2
84 \\ cmp r0, #0
85 \\ bgt 1f
86 \\ movs r0, #0
87 \\ pop { r4, pc }
88 \\ 1:
89 ),
90 }
91 asm volatile (
92 \\ movs r0, #1
93 \\ pop { r4, pc }
94 );
95}
lib/std/special/compiler_rt/arm/aeabi_fcmp.zig deleted-95
......@@ -1,95 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/arm/aeabi_fcmp.S
4
5const ConditionalOperator = enum {
6 Eq,
7 Lt,
8 Le,
9 Ge,
10 Gt,
11};
12
13pub fn __aeabi_fcmpeq() callconv(.Naked) noreturn {
14 @setRuntimeSafety(false);
15 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Eq});
16 unreachable;
17}
18
19pub fn __aeabi_fcmplt() callconv(.Naked) noreturn {
20 @setRuntimeSafety(false);
21 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Lt});
22 unreachable;
23}
24
25pub fn __aeabi_fcmple() callconv(.Naked) noreturn {
26 @setRuntimeSafety(false);
27 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Le});
28 unreachable;
29}
30
31pub fn __aeabi_fcmpge() callconv(.Naked) noreturn {
32 @setRuntimeSafety(false);
33 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Ge});
34 unreachable;
35}
36
37pub fn __aeabi_fcmpgt() callconv(.Naked) noreturn {
38 @setRuntimeSafety(false);
39 @call(.{ .modifier = .always_inline }, aeabi_fcmp, .{.Gt});
40 unreachable;
41}
42
43fn aeabi_fcmp(comptime cond: ConditionalOperator) void {
44 @setRuntimeSafety(false);
45 asm volatile (
46 \\ push { r4, lr }
47 );
48
49 switch (cond) {
50 .Eq => asm volatile (
51 \\ bl __eqsf2
52 \\ cmp r0, #0
53 \\ beq 1f
54 \\ movs r0, #0
55 \\ pop { r4, pc }
56 \\ 1:
57 ),
58 .Lt => asm volatile (
59 \\ bl __ltsf2
60 \\ cmp r0, #0
61 \\ blt 1f
62 \\ movs r0, #0
63 \\ pop { r4, pc }
64 \\ 1:
65 ),
66 .Le => asm volatile (
67 \\ bl __lesf2
68 \\ cmp r0, #0
69 \\ ble 1f
70 \\ movs r0, #0
71 \\ pop { r4, pc }
72 \\ 1:
73 ),
74 .Ge => asm volatile (
75 \\ bl __ltsf2
76 \\ cmp r0, #0
77 \\ bge 1f
78 \\ movs r0, #0
79 \\ pop { r4, pc }
80 \\ 1:
81 ),
82 .Gt => asm volatile (
83 \\ bl __gtsf2
84 \\ cmp r0, #0
85 \\ bgt 1f
86 \\ movs r0, #0
87 \\ pop { r4, pc }
88 \\ 1:
89 ),
90 }
91 asm volatile (
92 \\ movs r0, #1
93 \\ pop { r4, pc }
94 );
95}
lib/std/special/compiler_rt/clzsi2.zig created+116
......@@ -0,0 +1,116 @@
1const builtin = @import("builtin");
2
3fn __clzsi2_generic(a: i32) callconv(.C) i32 {
4 @setRuntimeSafety(builtin.is_test);
5
6 var x = @bitCast(u32, a);
7 var n: i32 = 32;
8
9 // Count first bit set using binary search, from Hacker's Delight
10 var y: u32 = 0;
11 inline for ([_]i32{ 16, 8, 4, 2, 1 }) |shift| {
12 y = x >> shift;
13 if (y != 0) {
14 n = n - shift;
15 x = y;
16 }
17 }
18
19 return n - @bitCast(i32, x);
20}
21
22fn __clzsi2_thumb1() callconv(.Naked) void {
23 @setRuntimeSafety(builtin.is_test);
24
25 // Similar to the generic version with the last two rounds replaced by a LUT
26 asm volatile (
27 \\ movs r1, #32
28 \\ lsrs r2, r0, #16
29 \\ beq 1f
30 \\ subs r1, #16
31 \\ movs r0, r2
32 \\ 1:
33 \\ lsrs r2, r0, #8
34 \\ beq 1f
35 \\ subs r1, #8
36 \\ movs r0, r2
37 \\ 1:
38 \\ lsrs r2, r0, #4
39 \\ beq 1f
40 \\ subs r1, #4
41 \\ movs r0, r2
42 \\ 1:
43 \\ ldr r3, =LUT
44 \\ ldrb r0, [r3, r0]
45 \\ subs r0, r1, r0
46 \\ bx lr
47 \\ .p2align 2
48 \\ LUT:
49 \\ .byte 4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0
50 );
51
52 unreachable;
53}
54
55fn __clzsi2_arm32() callconv(.Naked) void {
56 @setRuntimeSafety(builtin.is_test);
57
58 asm volatile (
59 \\ // Assumption: n != 0
60 \\ // r0: n
61 \\ // r1: count of leading zeros in n + 1
62 \\ // r2: scratch register for shifted r0
63 \\ mov r1, #1
64 \\
65 \\ // Basic block:
66 \\ // if ((r0 >> SHIFT) == 0)
67 \\ // r1 += SHIFT;
68 \\ // else
69 \\ // r0 >>= SHIFT;
70 \\ // for descending powers of two as SHIFT.
71 \\ lsrs r2, r0, #16
72 \\ movne r0, r2
73 \\ addeq r1, #16
74 \\
75 \\ lsrs r2, r0, #8
76 \\ movne r0, r2
77 \\ addeq r1, #8
78 \\
79 \\ lsrs r2, r0, #4
80 \\ movne r0, r2
81 \\ addeq r1, #4
82 \\
83 \\ lsrs r2, r0, #2
84 \\ movne r0, r2
85 \\ addeq r1, #2
86 \\
87 \\ // The basic block invariants at this point are (r0 >> 2) == 0 and
88 \\ // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1.
89 \\ //
90 \\ // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1)f
91 \\ // ---+----------------+----------------+------------+--------------
92 \\ // 1 | 1 | 0 | 0 | 1
93 \\ // 2 | 0 | 1 | -1 | 0
94 \\ // 3 | 0 | 1 | -1 | 0
95 \\ //
96 \\ // The r1's initial value of 1 compensates for the 1 here.
97 \\ sub r0, r1, r0, lsr #1
98 \\ bx lr
99 );
100
101 unreachable;
102}
103
104pub const __clzsi2 = blk: {
105 if (builtin.arch.isARM()) {
106 break :blk __clzsi2_arm32;
107 } else if (builtin.arch.isThumb()) {
108 break :blk __clzsi2_thumb1;
109 } else {
110 break :blk __clzsi2_generic;
111 }
112};
113
114test "test clzsi2" {
115 _ = @import("clzsi2_test.zig");
116}
lib/std/special/compiler_rt/clzsi2_test.zig created+292
......@@ -0,0 +1,292 @@
1const clzsi2 = @import("clzsi2.zig");
2const testing = @import("std").testing;
3
4fn test__clzsi2(a: u32, expected: i32) void {
5 var nakedClzsi2 = clzsi2.__clzsi2;
6 var actualClzsi2 = @ptrCast(fn (a: i32) callconv(.C) i32, nakedClzsi2);
7 var x = @intCast(i32, a);
8 var result = actualClzsi2(x);
9 testing.expectEqual(expected, result);
10}
11
12test "clzsi2" {
13 test__clzsi2(0x00800000, 8);
14 test__clzsi2(0x01000000, 7);
15 test__clzsi2(0x02000000, 6);
16 test__clzsi2(0x03000000, 6);
17 test__clzsi2(0x04000000, 5);
18 test__clzsi2(0x05000000, 5);
19 test__clzsi2(0x06000000, 5);
20 test__clzsi2(0x07000000, 5);
21 test__clzsi2(0x08000000, 4);
22 test__clzsi2(0x09000000, 4);
23 test__clzsi2(0x0A000000, 4);
24 test__clzsi2(0x0B000000, 4);
25 test__clzsi2(0x0C000000, 4);
26 test__clzsi2(0x0D000000, 4);
27 test__clzsi2(0x0E000000, 4);
28 test__clzsi2(0x0F000000, 4);
29 test__clzsi2(0x10000000, 3);
30 test__clzsi2(0x11000000, 3);
31 test__clzsi2(0x12000000, 3);
32 test__clzsi2(0x13000000, 3);
33 test__clzsi2(0x14000000, 3);
34 test__clzsi2(0x15000000, 3);
35 test__clzsi2(0x16000000, 3);
36 test__clzsi2(0x17000000, 3);
37 test__clzsi2(0x18000000, 3);
38 test__clzsi2(0x19000000, 3);
39 test__clzsi2(0x1A000000, 3);
40 test__clzsi2(0x1B000000, 3);
41 test__clzsi2(0x1C000000, 3);
42 test__clzsi2(0x1D000000, 3);
43 test__clzsi2(0x1E000000, 3);
44 test__clzsi2(0x1F000000, 3);
45 test__clzsi2(0x20000000, 2);
46 test__clzsi2(0x21000000, 2);
47 test__clzsi2(0x22000000, 2);
48 test__clzsi2(0x23000000, 2);
49 test__clzsi2(0x24000000, 2);
50 test__clzsi2(0x25000000, 2);
51 test__clzsi2(0x26000000, 2);
52 test__clzsi2(0x27000000, 2);
53 test__clzsi2(0x28000000, 2);
54 test__clzsi2(0x29000000, 2);
55 test__clzsi2(0x2A000000, 2);
56 test__clzsi2(0x2B000000, 2);
57 test__clzsi2(0x2C000000, 2);
58 test__clzsi2(0x2D000000, 2);
59 test__clzsi2(0x2E000000, 2);
60 test__clzsi2(0x2F000000, 2);
61 test__clzsi2(0x30000000, 2);
62 test__clzsi2(0x31000000, 2);
63 test__clzsi2(0x32000000, 2);
64 test__clzsi2(0x33000000, 2);
65 test__clzsi2(0x34000000, 2);
66 test__clzsi2(0x35000000, 2);
67 test__clzsi2(0x36000000, 2);
68 test__clzsi2(0x37000000, 2);
69 test__clzsi2(0x38000000, 2);
70 test__clzsi2(0x39000000, 2);
71 test__clzsi2(0x3A000000, 2);
72 test__clzsi2(0x3B000000, 2);
73 test__clzsi2(0x3C000000, 2);
74 test__clzsi2(0x3D000000, 2);
75 test__clzsi2(0x3E000000, 2);
76 test__clzsi2(0x3F000000, 2);
77 test__clzsi2(0x40000000, 1);
78 test__clzsi2(0x41000000, 1);
79 test__clzsi2(0x42000000, 1);
80 test__clzsi2(0x43000000, 1);
81 test__clzsi2(0x44000000, 1);
82 test__clzsi2(0x45000000, 1);
83 test__clzsi2(0x46000000, 1);
84 test__clzsi2(0x47000000, 1);
85 test__clzsi2(0x48000000, 1);
86 test__clzsi2(0x49000000, 1);
87 test__clzsi2(0x4A000000, 1);
88 test__clzsi2(0x4B000000, 1);
89 test__clzsi2(0x4C000000, 1);
90 test__clzsi2(0x4D000000, 1);
91 test__clzsi2(0x4E000000, 1);
92 test__clzsi2(0x4F000000, 1);
93 test__clzsi2(0x50000000, 1);
94 test__clzsi2(0x51000000, 1);
95 test__clzsi2(0x52000000, 1);
96 test__clzsi2(0x53000000, 1);
97 test__clzsi2(0x54000000, 1);
98 test__clzsi2(0x55000000, 1);
99 test__clzsi2(0x56000000, 1);
100 test__clzsi2(0x57000000, 1);
101 test__clzsi2(0x58000000, 1);
102 test__clzsi2(0x59000000, 1);
103 test__clzsi2(0x5A000000, 1);
104 test__clzsi2(0x5B000000, 1);
105 test__clzsi2(0x5C000000, 1);
106 test__clzsi2(0x5D000000, 1);
107 test__clzsi2(0x5E000000, 1);
108 test__clzsi2(0x5F000000, 1);
109 test__clzsi2(0x60000000, 1);
110 test__clzsi2(0x61000000, 1);
111 test__clzsi2(0x62000000, 1);
112 test__clzsi2(0x63000000, 1);
113 test__clzsi2(0x64000000, 1);
114 test__clzsi2(0x65000000, 1);
115 test__clzsi2(0x66000000, 1);
116 test__clzsi2(0x67000000, 1);
117 test__clzsi2(0x68000000, 1);
118 test__clzsi2(0x69000000, 1);
119 test__clzsi2(0x6A000000, 1);
120 test__clzsi2(0x6B000000, 1);
121 test__clzsi2(0x6C000000, 1);
122 test__clzsi2(0x6D000000, 1);
123 test__clzsi2(0x6E000000, 1);
124 test__clzsi2(0x6F000000, 1);
125 test__clzsi2(0x70000000, 1);
126 test__clzsi2(0x71000000, 1);
127 test__clzsi2(0x72000000, 1);
128 test__clzsi2(0x73000000, 1);
129 test__clzsi2(0x74000000, 1);
130 test__clzsi2(0x75000000, 1);
131 test__clzsi2(0x76000000, 1);
132 test__clzsi2(0x77000000, 1);
133 test__clzsi2(0x78000000, 1);
134 test__clzsi2(0x79000000, 1);
135 test__clzsi2(0x7A000000, 1);
136 test__clzsi2(0x7B000000, 1);
137 test__clzsi2(0x7C000000, 1);
138 test__clzsi2(0x7D000000, 1);
139 test__clzsi2(0x7E000000, 1);
140 test__clzsi2(0x7F000000, 1);
141 test__clzsi2(0x80000000, 0);
142 test__clzsi2(0x81000000, 0);
143 test__clzsi2(0x82000000, 0);
144 test__clzsi2(0x83000000, 0);
145 test__clzsi2(0x84000000, 0);
146 test__clzsi2(0x85000000, 0);
147 test__clzsi2(0x86000000, 0);
148 test__clzsi2(0x87000000, 0);
149 test__clzsi2(0x88000000, 0);
150 test__clzsi2(0x89000000, 0);
151 test__clzsi2(0x8A000000, 0);
152 test__clzsi2(0x8B000000, 0);
153 test__clzsi2(0x8C000000, 0);
154 test__clzsi2(0x8D000000, 0);
155 test__clzsi2(0x8E000000, 0);
156 test__clzsi2(0x8F000000, 0);
157 test__clzsi2(0x90000000, 0);
158 test__clzsi2(0x91000000, 0);
159 test__clzsi2(0x92000000, 0);
160 test__clzsi2(0x93000000, 0);
161 test__clzsi2(0x94000000, 0);
162 test__clzsi2(0x95000000, 0);
163 test__clzsi2(0x96000000, 0);
164 test__clzsi2(0x97000000, 0);
165 test__clzsi2(0x98000000, 0);
166 test__clzsi2(0x99000000, 0);
167 test__clzsi2(0x9A000000, 0);
168 test__clzsi2(0x9B000000, 0);
169 test__clzsi2(0x9C000000, 0);
170 test__clzsi2(0x9D000000, 0);
171 test__clzsi2(0x9E000000, 0);
172 test__clzsi2(0x9F000000, 0);
173 test__clzsi2(0xA0000000, 0);
174 test__clzsi2(0xA1000000, 0);
175 test__clzsi2(0xA2000000, 0);
176 test__clzsi2(0xA3000000, 0);
177 test__clzsi2(0xA4000000, 0);
178 test__clzsi2(0xA5000000, 0);
179 test__clzsi2(0xA6000000, 0);
180 test__clzsi2(0xA7000000, 0);
181 test__clzsi2(0xA8000000, 0);
182 test__clzsi2(0xA9000000, 0);
183 test__clzsi2(0xAA000000, 0);
184 test__clzsi2(0xAB000000, 0);
185 test__clzsi2(0xAC000000, 0);
186 test__clzsi2(0xAD000000, 0);
187 test__clzsi2(0xAE000000, 0);
188 test__clzsi2(0xAF000000, 0);
189 test__clzsi2(0xB0000000, 0);
190 test__clzsi2(0xB1000000, 0);
191 test__clzsi2(0xB2000000, 0);
192 test__clzsi2(0xB3000000, 0);
193 test__clzsi2(0xB4000000, 0);
194 test__clzsi2(0xB5000000, 0);
195 test__clzsi2(0xB6000000, 0);
196 test__clzsi2(0xB7000000, 0);
197 test__clzsi2(0xB8000000, 0);
198 test__clzsi2(0xB9000000, 0);
199 test__clzsi2(0xBA000000, 0);
200 test__clzsi2(0xBB000000, 0);
201 test__clzsi2(0xBC000000, 0);
202 test__clzsi2(0xBD000000, 0);
203 test__clzsi2(0xBE000000, 0);
204 test__clzsi2(0xBF000000, 0);
205 test__clzsi2(0xC0000000, 0);
206 test__clzsi2(0xC1000000, 0);
207 test__clzsi2(0xC2000000, 0);
208 test__clzsi2(0xC3000000, 0);
209 test__clzsi2(0xC4000000, 0);
210 test__clzsi2(0xC5000000, 0);
211 test__clzsi2(0xC6000000, 0);
212 test__clzsi2(0xC7000000, 0);
213 test__clzsi2(0xC8000000, 0);
214 test__clzsi2(0xC9000000, 0);
215 test__clzsi2(0xCA000000, 0);
216 test__clzsi2(0xCB000000, 0);
217 test__clzsi2(0xCC000000, 0);
218 test__clzsi2(0xCD000000, 0);
219 test__clzsi2(0xCE000000, 0);
220 test__clzsi2(0xCF000000, 0);
221 test__clzsi2(0xD0000000, 0);
222 test__clzsi2(0xD1000000, 0);
223 test__clzsi2(0xD2000000, 0);
224 test__clzsi2(0xD3000000, 0);
225 test__clzsi2(0xD4000000, 0);
226 test__clzsi2(0xD5000000, 0);
227 test__clzsi2(0xD6000000, 0);
228 test__clzsi2(0xD7000000, 0);
229 test__clzsi2(0xD8000000, 0);
230 test__clzsi2(0xD9000000, 0);
231 test__clzsi2(0xDA000000, 0);
232 test__clzsi2(0xDB000000, 0);
233 test__clzsi2(0xDC000000, 0);
234 test__clzsi2(0xDD000000, 0);
235 test__clzsi2(0xDE000000, 0);
236 test__clzsi2(0xDF000000, 0);
237 test__clzsi2(0xE0000000, 0);
238 test__clzsi2(0xE1000000, 0);
239 test__clzsi2(0xE2000000, 0);
240 test__clzsi2(0xE3000000, 0);
241 test__clzsi2(0xE4000000, 0);
242 test__clzsi2(0xE5000000, 0);
243 test__clzsi2(0xE6000000, 0);
244 test__clzsi2(0xE7000000, 0);
245 test__clzsi2(0xE8000000, 0);
246 test__clzsi2(0xE9000000, 0);
247 test__clzsi2(0xEA000000, 0);
248 test__clzsi2(0xEB000000, 0);
249 test__clzsi2(0xEC000000, 0);
250 test__clzsi2(0xED000000, 0);
251 test__clzsi2(0xEE000000, 0);
252 test__clzsi2(0xEF000000, 0);
253 test__clzsi2(0xF0000000, 0);
254 test__clzsi2(0xF1000000, 0);
255 test__clzsi2(0xF2000000, 0);
256 test__clzsi2(0xF3000000, 0);
257 test__clzsi2(0xF4000000, 0);
258 test__clzsi2(0xF5000000, 0);
259 test__clzsi2(0xF6000000, 0);
260 test__clzsi2(0xF7000000, 0);
261 test__clzsi2(0xF8000000, 0);
262 test__clzsi2(0xF9000000, 0);
263 test__clzsi2(0xFA000000, 0);
264 test__clzsi2(0xFB000000, 0);
265 test__clzsi2(0xFC000000, 0);
266 test__clzsi2(0xFD000000, 0);
267 test__clzsi2(0xFE000000, 0);
268 test__clzsi2(0xFF000000, 0);
269 test__clzsi2(0x00000001, 31);
270 test__clzsi2(0x00000002, 30);
271 test__clzsi2(0x00000004, 29);
272 test__clzsi2(0x00000008, 28);
273 test__clzsi2(0x00000010, 27);
274 test__clzsi2(0x00000020, 26);
275 test__clzsi2(0x00000040, 25);
276 test__clzsi2(0x00000080, 24);
277 test__clzsi2(0x00000100, 23);
278 test__clzsi2(0x00000200, 22);
279 test__clzsi2(0x00000400, 21);
280 test__clzsi2(0x00000800, 20);
281 test__clzsi2(0x00001000, 19);
282 test__clzsi2(0x00002000, 18);
283 test__clzsi2(0x00004000, 17);
284 test__clzsi2(0x00008000, 16);
285 test__clzsi2(0x00010000, 15);
286 test__clzsi2(0x00020000, 14);
287 test__clzsi2(0x00040000, 13);
288 test__clzsi2(0x00080000, 12);
289 test__clzsi2(0x00100000, 11);
290 test__clzsi2(0x00200000, 10);
291 test__clzsi2(0x00400000, 9);
292}
lib/std/special/compiler_rt/compareXf2.zig created+253
......@@ -0,0 +1,253 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7
8const LE = extern enum(i32) {
9 Less = -1,
10 Equal = 0,
11 Greater = 1,
12 Unordered = 1,
13};
14
15const GE = extern enum(i32) {
16 Less = -1,
17 Equal = 0,
18 Greater = 1,
19 Unordered = -1,
20};
21
22pub fn cmp(comptime T: type, comptime RT: type, a: T, b: T) RT {
23 @setRuntimeSafety(builtin.is_test);
24
25 const srep_t = @IntType(true, T.bit_count);
26 const rep_t = @IntType(false, T.bit_count);
27
28 const significandBits = std.math.floatMantissaBits(T);
29 const exponentBits = std.math.floatExponentBits(T);
30 const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
31 const absMask = signBit - 1;
32 const infRep = @bitCast(rep_t, std.math.inf(T));
33
34 const aInt = @bitCast(srep_t, a);
35 const bInt = @bitCast(srep_t, b);
36 const aAbs = @bitCast(rep_t, aInt) & absMask;
37 const bAbs = @bitCast(rep_t, bInt) & absMask;
38
39 // If either a or b is NaN, they are unordered.
40 if (aAbs > infRep or bAbs > infRep) return .Unordered;
41
42 // If a and b are both zeros, they are equal.
43 if ((aAbs | bAbs) == 0) return .Equal;
44
45 // If at least one of a and b is positive, we get the same result comparing
46 // a and b as signed integers as we would with a fp_ting-point compare.
47 if ((aInt & bInt) >= 0) {
48 if (aInt < bInt) {
49 return .Less;
50 } else if (aInt == bInt) {
51 return .Equal;
52 } else return .Greater;
53 }
54
55 // Otherwise, both are negative, so we need to flip the sense of the
56 // comparison to get the correct result. (This assumes a twos- or ones-
57 // complement integer representation; if integers are represented in a
58 // sign-magnitude representation, then this flip is incorrect).
59 else {
60 if (aInt > bInt) {
61 return .Less;
62 } else if (aInt == bInt) {
63 return .Equal;
64 } else return .Greater;
65 }
66}
67
68pub fn unordcmp(comptime T: type, a: T, b: T) i32 {
69 @setRuntimeSafety(builtin.is_test);
70
71 const rep_t = @IntType(false, T.bit_count);
72
73 const significandBits = std.math.floatMantissaBits(T);
74 const exponentBits = std.math.floatExponentBits(T);
75 const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
76 const absMask = signBit - 1;
77 const infRep = @bitCast(rep_t, std.math.inf(T));
78
79 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
80 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
81
82 return @boolToInt(aAbs > infRep or bAbs > infRep);
83}
84
85// Comparison between f32
86
87pub fn __lesf2(a: f32, b: f32) callconv(.C) i32 {
88 @setRuntimeSafety(builtin.is_test);
89 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, LE, a, b }));
90}
91
92pub fn __gesf2(a: f32, b: f32) callconv(.C) i32 {
93 @setRuntimeSafety(builtin.is_test);
94 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f32, GE, a, b }));
95}
96
97pub fn __eqsf2(a: f32, b: f32) callconv(.C) i32 {
98 return __lesf2(a, b);
99}
100
101pub fn __ltsf2(a: f32, b: f32) callconv(.C) i32 {
102 return __lesf2(a, b);
103}
104
105pub fn __nesf2(a: f32, b: f32) callconv(.C) i32 {
106 return __lesf2(a, b);
107}
108
109pub fn __gtsf2(a: f32, b: f32) callconv(.C) i32 {
110 return __gesf2(a, b);
111}
112
113// Comparison between f64
114
115pub fn __ledf2(a: f64, b: f64) callconv(.C) i32 {
116 @setRuntimeSafety(builtin.is_test);
117 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, LE, a, b }));
118}
119
120pub fn __gedf2(a: f64, b: f64) callconv(.C) i32 {
121 @setRuntimeSafety(builtin.is_test);
122 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f64, GE, a, b }));
123}
124
125pub fn __eqdf2(a: f64, b: f64) callconv(.C) i32 {
126 return __ledf2(a, b);
127}
128
129pub fn __ltdf2(a: f64, b: f64) callconv(.C) i32 {
130 return __ledf2(a, b);
131}
132
133pub fn __nedf2(a: f64, b: f64) callconv(.C) i32 {
134 return __ledf2(a, b);
135}
136
137pub fn __gtdf2(a: f64, b: f64) callconv(.C) i32 {
138 return __gedf2(a, b);
139}
140
141// Comparison between f128
142
143pub fn __letf2(a: f128, b: f128) callconv(.C) i32 {
144 @setRuntimeSafety(builtin.is_test);
145 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, LE, a, b }));
146}
147
148pub fn __getf2(a: f128, b: f128) callconv(.C) i32 {
149 @setRuntimeSafety(builtin.is_test);
150 return @bitCast(i32, @call(.{ .modifier = .always_inline }, cmp, .{ f128, GE, a, b }));
151}
152
153pub fn __eqtf2(a: f128, b: f128) callconv(.C) i32 {
154 return __letf2(a, b);
155}
156
157pub fn __lttf2(a: f128, b: f128) callconv(.C) i32 {
158 return __letf2(a, b);
159}
160
161pub fn __netf2(a: f128, b: f128) callconv(.C) i32 {
162 return __letf2(a, b);
163}
164
165pub fn __gttf2(a: f128, b: f128) callconv(.C) i32 {
166 return __getf2(a, b);
167}
168
169// Unordered comparison between f32/f64/f128
170
171pub fn __unordsf2(a: f32, b: f32) callconv(.C) i32 {
172 @setRuntimeSafety(builtin.is_test);
173 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f32, a, b });
174}
175
176pub fn __unorddf2(a: f64, b: f64) callconv(.C) i32 {
177 @setRuntimeSafety(builtin.is_test);
178 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f64, a, b });
179}
180
181pub fn __unordtf2(a: f128, b: f128) callconv(.C) i32 {
182 @setRuntimeSafety(builtin.is_test);
183 return @call(.{ .modifier = .always_inline }, unordcmp, .{ f128, a, b });
184}
185
186// ARM EABI intrinsics
187
188pub fn __aeabi_fcmpeq(a: f32, b: f32) callconv(.AAPCS) i32 {
189 @setRuntimeSafety(false);
190 return @boolToInt(@call(.{ .modifier = .always_inline }, __eqsf2, .{ a, b }) == 0);
191}
192
193pub fn __aeabi_fcmplt(a: f32, b: f32) callconv(.AAPCS) i32 {
194 @setRuntimeSafety(false);
195 return @boolToInt(@call(.{ .modifier = .always_inline }, __ltsf2, .{ a, b }) < 0);
196}
197
198pub fn __aeabi_fcmple(a: f32, b: f32) callconv(.AAPCS) i32 {
199 @setRuntimeSafety(false);
200 return @boolToInt(@call(.{ .modifier = .always_inline }, __lesf2, .{ a, b }) <= 0);
201}
202
203pub fn __aeabi_fcmpge(a: f32, b: f32) callconv(.AAPCS) i32 {
204 @setRuntimeSafety(false);
205 return @boolToInt(@call(.{ .modifier = .always_inline }, __gesf2, .{ a, b }) >= 0);
206}
207
208pub fn __aeabi_fcmpgt(a: f32, b: f32) callconv(.AAPCS) i32 {
209 @setRuntimeSafety(false);
210 return @boolToInt(@call(.{ .modifier = .always_inline }, __gtsf2, .{ a, b }) > 0);
211}
212
213pub fn __aeabi_fcmpun(a: f32, b: f32) callconv(.AAPCS) i32 {
214 @setRuntimeSafety(false);
215 return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
216}
217
218pub fn __aeabi_dcmpeq(a: f64, b: f64) callconv(.AAPCS) i32 {
219 @setRuntimeSafety(false);
220 return @boolToInt(@call(.{ .modifier = .always_inline }, __eqdf2, .{ a, b }) == 0);
221}
222
223pub fn __aeabi_dcmplt(a: f64, b: f64) callconv(.AAPCS) i32 {
224 @setRuntimeSafety(false);
225 return @boolToInt(@call(.{ .modifier = .always_inline }, __ltdf2, .{ a, b }) < 0);
226}
227
228pub fn __aeabi_dcmple(a: f64, b: f64) callconv(.AAPCS) i32 {
229 @setRuntimeSafety(false);
230 return @boolToInt(@call(.{ .modifier = .always_inline }, __ledf2, .{ a, b }) <= 0);
231}
232
233pub fn __aeabi_dcmpge(a: f64, b: f64) callconv(.AAPCS) i32 {
234 @setRuntimeSafety(false);
235 return @boolToInt(@call(.{ .modifier = .always_inline }, __gedf2, .{ a, b }) >= 0);
236}
237
238pub fn __aeabi_dcmpgt(a: f64, b: f64) callconv(.AAPCS) i32 {
239 @setRuntimeSafety(false);
240 return @boolToInt(@call(.{ .modifier = .always_inline }, __gtdf2, .{ a, b }) > 0);
241}
242
243pub fn __aeabi_dcmpun(a: f64, b: f64) callconv(.AAPCS) i32 {
244 @setRuntimeSafety(false);
245 return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
246}
247
248test "comparesf2" {
249 _ = @import("comparesf2_test.zig");
250}
251test "comparedf2" {
252 _ = @import("comparedf2_test.zig");
253}
lib/std/special/compiler_rt/comparedf2.zig deleted-127
......@@ -1,127 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparedf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7const is_test = builtin.is_test;
8
9const fp_t = f64;
10const rep_t = u64;
11const srep_t = i64;
12
13const typeWidth = rep_t.bit_count;
14const significandBits = std.math.floatMantissaBits(fp_t);
15const exponentBits = std.math.floatExponentBits(fp_t);
16const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
17const absMask = signBit - 1;
18const implicitBit = @as(rep_t, 1) << significandBits;
19const significandMask = implicitBit - 1;
20const exponentMask = absMask ^ significandMask;
21const infRep = @bitCast(rep_t, std.math.inf(fp_t));
22
23// TODO https://github.com/ziglang/zig/issues/641
24// and then make the return types of some of these functions the enum instead of c_int
25const LE_LESS = @as(c_int, -1);
26const LE_EQUAL = @as(c_int, 0);
27const LE_GREATER = @as(c_int, 1);
28const LE_UNORDERED = @as(c_int, 1);
29
30pub fn __ledf2(a: fp_t, b: fp_t) callconv(.C) c_int {
31 @setRuntimeSafety(is_test);
32 const aInt: srep_t = @bitCast(srep_t, a);
33 const bInt: srep_t = @bitCast(srep_t, b);
34 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
35 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
36
37 // If either a or b is NaN, they are unordered.
38 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
39
40 // If a and b are both zeros, they are equal.
41 if ((aAbs | bAbs) == 0) return LE_EQUAL;
42
43 // If at least one of a and b is positive, we get the same result comparing
44 // a and b as signed integers as we would with a fp_ting-point compare.
45 if ((aInt & bInt) >= 0) {
46 if (aInt < bInt) {
47 return LE_LESS;
48 } else if (aInt == bInt) {
49 return LE_EQUAL;
50 } else return LE_GREATER;
51 }
52
53 // Otherwise, both are negative, so we need to flip the sense of the
54 // comparison to get the correct result. (This assumes a twos- or ones-
55 // complement integer representation; if integers are represented in a
56 // sign-magnitude representation, then this flip is incorrect).
57 else {
58 if (aInt > bInt) {
59 return LE_LESS;
60 } else if (aInt == bInt) {
61 return LE_EQUAL;
62 } else return LE_GREATER;
63 }
64}
65
66// TODO https://github.com/ziglang/zig/issues/641
67// and then make the return types of some of these functions the enum instead of c_int
68const GE_LESS = @as(c_int, -1);
69const GE_EQUAL = @as(c_int, 0);
70const GE_GREATER = @as(c_int, 1);
71const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
72
73pub fn __gedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
74 @setRuntimeSafety(is_test);
75 const aInt: srep_t = @bitCast(srep_t, a);
76 const bInt: srep_t = @bitCast(srep_t, b);
77 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
78 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
79
80 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
81 if ((aAbs | bAbs) == 0) return GE_EQUAL;
82 if ((aInt & bInt) >= 0) {
83 if (aInt < bInt) {
84 return GE_LESS;
85 } else if (aInt == bInt) {
86 return GE_EQUAL;
87 } else return GE_GREATER;
88 } else {
89 if (aInt > bInt) {
90 return GE_LESS;
91 } else if (aInt == bInt) {
92 return GE_EQUAL;
93 } else return GE_GREATER;
94 }
95}
96
97pub fn __unorddf2(a: fp_t, b: fp_t) callconv(.C) c_int {
98 @setRuntimeSafety(is_test);
99 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
100 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
101 return @boolToInt(aAbs > infRep or bAbs > infRep);
102}
103
104pub fn __eqdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
105 return __ledf2(a, b);
106}
107
108pub fn __ltdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
109 return __ledf2(a, b);
110}
111
112pub fn __nedf2(a: fp_t, b: fp_t) callconv(.C) c_int {
113 return __ledf2(a, b);
114}
115
116pub fn __gtdf2(a: fp_t, b: fp_t) callconv(.C) c_int {
117 return __gedf2(a, b);
118}
119
120pub fn __aeabi_dcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
121 @setRuntimeSafety(false);
122 return @call(.{ .modifier = .always_inline }, __unorddf2, .{ a, b });
123}
124
125test "import comparedf2" {
126 _ = @import("comparedf2_test.zig");
127}
lib/std/special/compiler_rt/comparedf2_test.zig+1-1
......@@ -6,7 +6,7 @@ const std = @import("std");
66const builtin = @import("builtin");
77const is_test = builtin.is_test;
88
9const comparedf2 = @import("comparedf2.zig");
9const comparedf2 = @import("compareXf2.zig");
1010
1111const TestVector = struct {
1212 a: f64,
lib/std/special/compiler_rt/comparesf2.zig deleted-127
......@@ -1,127 +0,0 @@
1// Ported from:
2//
3// https://github.com/llvm/llvm-project/commit/d674d96bc56c0f377879d01c9d8dfdaaa7859cdb/compiler-rt/lib/builtins/comparesf2.c
4
5const std = @import("std");
6const builtin = @import("builtin");
7const is_test = builtin.is_test;
8
9const fp_t = f32;
10const rep_t = u32;
11const srep_t = i32;
12
13const typeWidth = rep_t.bit_count;
14const significandBits = std.math.floatMantissaBits(fp_t);
15const exponentBits = std.math.floatExponentBits(fp_t);
16const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
17const absMask = signBit - 1;
18const implicitBit = @as(rep_t, 1) << significandBits;
19const significandMask = implicitBit - 1;
20const exponentMask = absMask ^ significandMask;
21const infRep = @bitCast(rep_t, std.math.inf(fp_t));
22
23// TODO https://github.com/ziglang/zig/issues/641
24// and then make the return types of some of these functions the enum instead of c_int
25const LE_LESS = @as(c_int, -1);
26const LE_EQUAL = @as(c_int, 0);
27const LE_GREATER = @as(c_int, 1);
28const LE_UNORDERED = @as(c_int, 1);
29
30pub fn __lesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
31 @setRuntimeSafety(is_test);
32 const aInt: srep_t = @bitCast(srep_t, a);
33 const bInt: srep_t = @bitCast(srep_t, b);
34 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
35 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
36
37 // If either a or b is NaN, they are unordered.
38 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
39
40 // If a and b are both zeros, they are equal.
41 if ((aAbs | bAbs) == 0) return LE_EQUAL;
42
43 // If at least one of a and b is positive, we get the same result comparing
44 // a and b as signed integers as we would with a fp_ting-point compare.
45 if ((aInt & bInt) >= 0) {
46 if (aInt < bInt) {
47 return LE_LESS;
48 } else if (aInt == bInt) {
49 return LE_EQUAL;
50 } else return LE_GREATER;
51 }
52
53 // Otherwise, both are negative, so we need to flip the sense of the
54 // comparison to get the correct result. (This assumes a twos- or ones-
55 // complement integer representation; if integers are represented in a
56 // sign-magnitude representation, then this flip is incorrect).
57 else {
58 if (aInt > bInt) {
59 return LE_LESS;
60 } else if (aInt == bInt) {
61 return LE_EQUAL;
62 } else return LE_GREATER;
63 }
64}
65
66// TODO https://github.com/ziglang/zig/issues/641
67// and then make the return types of some of these functions the enum instead of c_int
68const GE_LESS = @as(c_int, -1);
69const GE_EQUAL = @as(c_int, 0);
70const GE_GREATER = @as(c_int, 1);
71const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
72
73pub fn __gesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
74 @setRuntimeSafety(is_test);
75 const aInt: srep_t = @bitCast(srep_t, a);
76 const bInt: srep_t = @bitCast(srep_t, b);
77 const aAbs: rep_t = @bitCast(rep_t, aInt) & absMask;
78 const bAbs: rep_t = @bitCast(rep_t, bInt) & absMask;
79
80 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
81 if ((aAbs | bAbs) == 0) return GE_EQUAL;
82 if ((aInt & bInt) >= 0) {
83 if (aInt < bInt) {
84 return GE_LESS;
85 } else if (aInt == bInt) {
86 return GE_EQUAL;
87 } else return GE_GREATER;
88 } else {
89 if (aInt > bInt) {
90 return GE_LESS;
91 } else if (aInt == bInt) {
92 return GE_EQUAL;
93 } else return GE_GREATER;
94 }
95}
96
97pub fn __unordsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
98 @setRuntimeSafety(is_test);
99 const aAbs: rep_t = @bitCast(rep_t, a) & absMask;
100 const bAbs: rep_t = @bitCast(rep_t, b) & absMask;
101 return @boolToInt(aAbs > infRep or bAbs > infRep);
102}
103
104pub fn __eqsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
105 return __lesf2(a, b);
106}
107
108pub fn __ltsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
109 return __lesf2(a, b);
110}
111
112pub fn __nesf2(a: fp_t, b: fp_t) callconv(.C) c_int {
113 return __lesf2(a, b);
114}
115
116pub fn __gtsf2(a: fp_t, b: fp_t) callconv(.C) c_int {
117 return __gesf2(a, b);
118}
119
120pub fn __aeabi_fcmpun(a: fp_t, b: fp_t) callconv(.AAPCS) c_int {
121 @setRuntimeSafety(false);
122 return @call(.{ .modifier = .always_inline }, __unordsf2, .{ a, b });
123}
124
125test "import comparesf2" {
126 _ = @import("comparesf2_test.zig");
127}
lib/std/special/compiler_rt/comparesf2_test.zig+1-1
......@@ -6,7 +6,7 @@ const std = @import("std");
66const builtin = @import("builtin");
77const is_test = builtin.is_test;
88
9const comparesf2 = @import("comparesf2.zig");
9const comparesf2 = @import("compareXf2.zig");
1010
1111const TestVector = struct {
1212 a: f32,
lib/std/special/compiler_rt/comparetf2.zig deleted-99
......@@ -1,99 +0,0 @@
1// TODO https://github.com/ziglang/zig/issues/641
2// and then make the return types of some of these functions the enum instead of c_int
3const LE_LESS = @as(c_int, -1);
4const LE_EQUAL = @as(c_int, 0);
5const LE_GREATER = @as(c_int, 1);
6const LE_UNORDERED = @as(c_int, 1);
7
8const rep_t = u128;
9const srep_t = i128;
10
11const typeWidth = rep_t.bit_count;
12const significandBits = 112;
13const exponentBits = (typeWidth - significandBits - 1);
14const signBit = (@as(rep_t, 1) << (significandBits + exponentBits));
15const absMask = signBit - 1;
16const implicitBit = @as(rep_t, 1) << significandBits;
17const significandMask = implicitBit - 1;
18const exponentMask = absMask ^ significandMask;
19const infRep = exponentMask;
20
21const builtin = @import("builtin");
22const is_test = builtin.is_test;
23
24pub fn __letf2(a: f128, b: f128) callconv(.C) c_int {
25 @setRuntimeSafety(is_test);
26
27 const aInt = @bitCast(rep_t, a);
28 const bInt = @bitCast(rep_t, b);
29
30 const aAbs: rep_t = aInt & absMask;
31 const bAbs: rep_t = bInt & absMask;
32
33 // If either a or b is NaN, they are unordered.
34 if (aAbs > infRep or bAbs > infRep) return LE_UNORDERED;
35
36 // If a and b are both zeros, they are equal.
37 if ((aAbs | bAbs) == 0) return LE_EQUAL;
38
39 // If at least one of a and b is positive, we get the same result comparing
40 // a and b as signed integers as we would with a floating-point compare.
41 return if ((aInt & bInt) >= 0)
42 if (aInt < bInt)
43 LE_LESS
44 else if (aInt == bInt)
45 LE_EQUAL
46 else
47 LE_GREATER
48 else
49 // Otherwise, both are negative, so we need to flip the sense of the
50 // comparison to get the correct result. (This assumes a twos- or ones-
51 // complement integer representation; if integers are represented in a
52 // sign-magnitude representation, then this flip is incorrect).
53 if (aInt > bInt)
54 LE_LESS
55 else if (aInt == bInt)
56 LE_EQUAL
57 else
58 LE_GREATER;
59}
60
61// TODO https://github.com/ziglang/zig/issues/641
62// and then make the return types of some of these functions the enum instead of c_int
63const GE_LESS = @as(c_int, -1);
64const GE_EQUAL = @as(c_int, 0);
65const GE_GREATER = @as(c_int, 1);
66const GE_UNORDERED = @as(c_int, -1); // Note: different from LE_UNORDERED
67
68pub fn __getf2(a: f128, b: f128) callconv(.C) c_int {
69 @setRuntimeSafety(is_test);
70
71 const aInt = @bitCast(srep_t, a);
72 const bInt = @bitCast(srep_t, b);
73 const aAbs = @bitCast(rep_t, aInt) & absMask;
74 const bAbs = @bitCast(rep_t, bInt) & absMask;
75
76 if (aAbs > infRep or bAbs > infRep) return GE_UNORDERED;
77 if ((aAbs | bAbs) == 0) return GE_EQUAL;
78 return if ((aInt & bInt) >= 0)
79 if (aInt < bInt)
80 GE_LESS
81 else if (aInt == bInt)
82 GE_EQUAL
83 else
84 GE_GREATER
85 else if (aInt > bInt)
86 GE_LESS
87 else if (aInt == bInt)
88 GE_EQUAL
89 else
90 GE_GREATER;
91}
92
93pub fn __unordtf2(a: f128, b: f128) callconv(.C) c_int {
94 @setRuntimeSafety(is_test);
95
96 const aAbs = @bitCast(rep_t, a) & absMask;
97 const bAbs = @bitCast(rep_t, b) & absMask;
98 return @boolToInt(aAbs > infRep or bAbs > infRep);
99}
lib/std/special/compiler_rt/fixtfdi_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfdi(a: f128, expected: i64) void {
1111}
1212
1313test "fixtfdi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfdi(-math.f128_max, math.minInt(i64));
1620
lib/std/special/compiler_rt/fixtfsi_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfsi(a: f128, expected: i32) void {
1111}
1212
1313test "fixtfsi" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfsi(-math.f128_max, math.minInt(i32));
1620
lib/std/special/compiler_rt/fixtfti_test.zig+4
......@@ -11,6 +11,10 @@ fn test__fixtfti(a: f128, expected: i128) void {
1111}
1212
1313test "fixtfti" {
14 if (@import("std").Target.current.isWindows()) {
15 // TODO https://github.com/ziglang/zig/issues/508
16 return error.SkipZigTest;
17 }
1418 //warn("\n", .{});
1519 test__fixtfti(-math.f128_max, math.minInt(i128));
1620
lib/std/special/compiler_rt/fixunstfdi_test.zig+4
......@@ -7,6 +7,10 @@ fn test__fixunstfdi(a: f128, expected: u64) void {
77}
88
99test "fixunstfdi" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__fixunstfdi(0.0, 0);
1115
1216 test__fixunstfdi(0.5, 0);
lib/std/special/compiler_rt/fixunstfsi_test.zig+4
......@@ -9,6 +9,10 @@ fn test__fixunstfsi(a: f128, expected: u32) void {
99const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
1111test "fixunstfsi" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
1216 test__fixunstfsi(inf128, 0xffffffff);
1317 test__fixunstfsi(0, 0x0);
1418 test__fixunstfsi(0x1.23456789abcdefp+5, 0x24);
lib/std/special/compiler_rt/fixunstfti_test.zig+4
......@@ -9,6 +9,10 @@ fn test__fixunstfti(a: f128, expected: u128) void {
99const inf128 = @bitCast(f128, @as(u128, 0x7fff0000000000000000000000000000));
1010
1111test "fixunstfti" {
12 if (@import("std").Target.current.isWindows()) {
13 // TODO https://github.com/ziglang/zig/issues/508
14 return error.SkipZigTest;
15 }
1216 test__fixunstfti(inf128, 0xffffffffffffffffffffffffffffffff);
1317
1418 test__fixunstfti(0.0, 0);
lib/std/special/compiler_rt/floattitf_test.zig+4
......@@ -7,6 +7,10 @@ fn test__floattitf(a: i128, expected: f128) void {
77}
88
99test "floattitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__floattitf(0, 0.0);
1115
1216 test__floattitf(1, 1.0);
lib/std/special/compiler_rt/floatuntitf_test.zig+4
......@@ -7,6 +7,10 @@ fn test__floatuntitf(a: u128, expected: f128) void {
77}
88
99test "floatuntitf" {
10 if (@import("std").Target.current.isWindows()) {
11 // TODO https://github.com/ziglang/zig/issues/508
12 return error.SkipZigTest;
13 }
1014 test__floatuntitf(0, 0.0);
1115
1216 test__floatuntitf(1, 1.0);
lib/std/special/compiler_rt/int.zig+60
......@@ -1,6 +1,8 @@
11// Builtin functions that operate on integer types
22const builtin = @import("builtin");
33const testing = @import("std").testing;
4const maxInt = @import("std").math.maxInt;
5const minInt = @import("std").math.minInt;
46
57const udivmod = @import("udivmod.zig").udivmod;
68
......@@ -578,3 +580,61 @@ fn test_one_umodsi3(a: u32, b: u32, expected_r: u32) void {
578580 const r: u32 = __umodsi3(a, b);
579581 testing.expect(r == expected_r);
580582}
583
584pub fn __mulsi3(a: i32, b: i32) callconv(.C) i32 {
585 @setRuntimeSafety(builtin.is_test);
586
587 var ua = @bitCast(u32, a);
588 var ub = @bitCast(u32, b);
589 var r: u32 = 0;
590
591 while (ua > 0) {
592 if ((ua & 1) != 0) r +%= ub;
593 ua >>= 1;
594 ub <<= 1;
595 }
596
597 return @bitCast(i32, r);
598}
599
600fn test_one_mulsi3(a: i32, b: i32, result: i32) void {
601 testing.expectEqual(result, __mulsi3(a, b));
602}
603
604test "mulsi3" {
605 test_one_mulsi3(0, 0, 0);
606 test_one_mulsi3(0, 1, 0);
607 test_one_mulsi3(1, 0, 0);
608 test_one_mulsi3(0, 10, 0);
609 test_one_mulsi3(10, 0, 0);
610 test_one_mulsi3(0, maxInt(i32), 0);
611 test_one_mulsi3(maxInt(i32), 0, 0);
612 test_one_mulsi3(0, -1, 0);
613 test_one_mulsi3(-1, 0, 0);
614 test_one_mulsi3(0, -10, 0);
615 test_one_mulsi3(-10, 0, 0);
616 test_one_mulsi3(0, minInt(i32), 0);
617 test_one_mulsi3(minInt(i32), 0, 0);
618 test_one_mulsi3(1, 1, 1);
619 test_one_mulsi3(1, 10, 10);
620 test_one_mulsi3(10, 1, 10);
621 test_one_mulsi3(1, maxInt(i32), maxInt(i32));
622 test_one_mulsi3(maxInt(i32), 1, maxInt(i32));
623 test_one_mulsi3(1, -1, -1);
624 test_one_mulsi3(1, -10, -10);
625 test_one_mulsi3(-10, 1, -10);
626 test_one_mulsi3(1, minInt(i32), minInt(i32));
627 test_one_mulsi3(minInt(i32), 1, minInt(i32));
628 test_one_mulsi3(46340, 46340, 2147395600);
629 test_one_mulsi3(-46340, 46340, -2147395600);
630 test_one_mulsi3(46340, -46340, -2147395600);
631 test_one_mulsi3(-46340, -46340, 2147395600);
632 test_one_mulsi3(4194303, 8192, @truncate(i32, 34359730176));
633 test_one_mulsi3(-4194303, 8192, @truncate(i32, -34359730176));
634 test_one_mulsi3(4194303, -8192, @truncate(i32, -34359730176));
635 test_one_mulsi3(-4194303, -8192, @truncate(i32, 34359730176));
636 test_one_mulsi3(8192, 4194303, @truncate(i32, 34359730176));
637 test_one_mulsi3(-8192, 4194303, @truncate(i32, -34359730176));
638 test_one_mulsi3(8192, -4194303, @truncate(i32, -34359730176));
639 test_one_mulsi3(-8192, -4194303, @truncate(i32, 34359730176));
640}
lib/std/special/compiler_rt/mulXf3_test.zig+4
......@@ -44,6 +44,10 @@ fn makeNaN128(rand: u64) f128 {
4444 return float_result;
4545}
4646test "multf3" {
47 if (@import("std").Target.current.isWindows()) {
48 // TODO https://github.com/ziglang/zig/issues/508
49 return error.SkipZigTest;
50 }
4751 // qNaN * any = qNaN
4852 test__multf3(qnan128, 0x1.23456789abcdefp+5, 0x7fff800000000000, 0x0);
4953
lib/std/special/compiler_rt/truncXfYf2_test.zig+8
......@@ -151,6 +151,10 @@ fn test__trunctfsf2(a: f128, expected: u32) void {
151151}
152152
153153test "trunctfsf2" {
154 if (@import("std").Target.current.isWindows()) {
155 // TODO https://github.com/ziglang/zig/issues/508
156 return error.SkipZigTest;
157 }
154158 // qnan
155159 test__trunctfsf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7fc00000);
156160 // nan
......@@ -186,6 +190,10 @@ fn test__trunctfdf2(a: f128, expected: u64) void {
186190}
187191
188192test "trunctfdf2" {
193 if (@import("std").Target.current.isWindows()) {
194 // TODO https://github.com/ziglang/zig/issues/508
195 return error.SkipZigTest;
196 }
189197 // qnan
190198 test__trunctfdf2(@bitCast(f128, @as(u128, 0x7fff800000000000 << 64)), 0x7ff8000000000000);
191199 // nan
lib/std/start.zig+2-11
......@@ -8,16 +8,7 @@ const uefi = std.os.uefi;
88
99var starting_stack_ptr: [*]usize = undefined;
1010
11const is_wasm = switch (builtin.arch) {
12 .wasm32, .wasm64 => true,
13 else => false,
14};
15
16const is_mips = switch (builtin.arch) {
17 .mips, .mipsel, .mips64, .mips64el => true,
18 else => false,
19};
20const start_sym_name = if (is_mips) "__start" else "_start";
11const start_sym_name = if (builtin.arch.isMIPS()) "__start" else "_start";
2112
2213comptime {
2314 if (builtin.output_mode == .Lib and builtin.link_mode == .Dynamic) {
......@@ -35,7 +26,7 @@ comptime {
3526 }
3627 } else if (builtin.os == .uefi) {
3728 if (!@hasDecl(root, "EfiMain")) @export(EfiMain, .{ .name = "EfiMain" });
38 } else if (is_wasm and builtin.os == .freestanding) {
29 } else if (builtin.arch.isWasm() and builtin.os == .freestanding) {
3930 if (!@hasDecl(root, start_sym_name)) @export(wasm_freestanding_start, .{ .name = start_sym_name });
4031 } else if (builtin.os != .other and builtin.os != .freestanding) {
4132 if (!@hasDecl(root, start_sym_name)) @export(_start, .{ .name = start_sym_name });
lib/std/target.zig+406-8
......@@ -49,6 +49,22 @@ pub const Target = union(enum) {
4949 other,
5050 };
5151
52 pub const aarch64 = @import("target/aarch64.zig");
53 pub const amdgpu = @import("target/amdgpu.zig");
54 pub const arm = @import("target/arm.zig");
55 pub const avr = @import("target/avr.zig");
56 pub const bpf = @import("target/bpf.zig");
57 pub const hexagon = @import("target/hexagon.zig");
58 pub const mips = @import("target/mips.zig");
59 pub const msp430 = @import("target/msp430.zig");
60 pub const nvptx = @import("target/nvptx.zig");
61 pub const powerpc = @import("target/powerpc.zig");
62 pub const riscv = @import("target/riscv.zig");
63 pub const sparc = @import("target/sparc.zig");
64 pub const systemz = @import("target/systemz.zig");
65 pub const wasm = @import("target/wasm.zig");
66 pub const x86 = @import("target/x86.zig");
67
5268 pub const Arch = union(enum) {
5369 arm: Arm32,
5470 armeb: Arm32,
......@@ -107,12 +123,12 @@ pub const Target = union(enum) {
107123 v8_3a,
108124 v8_2a,
109125 v8_1a,
110 v8,
126 v8a,
111127 v8r,
112128 v8m_baseline,
113129 v8m_mainline,
114130 v8_1m_mainline,
115 v7,
131 v7a,
116132 v7em,
117133 v7m,
118134 v7s,
......@@ -125,6 +141,16 @@ pub const Target = union(enum) {
125141 v5,
126142 v5te,
127143 v4t,
144
145 pub fn version(version: Arm32) comptime_int {
146 return switch (version) {
147 .v8_5a, .v8_4a, .v8_3a, .v8_2a, .v8_1a, .v8a, .v8r, .v8m_baseline, .v8m_mainline, .v8_1m_mainline => 8,
148 .v7a, .v7em, .v7m, .v7s, .v7k, .v7ve => 7,
149 .v6, .v6m, .v6k, .v6t2 => 6,
150 .v5, .v5te => 5,
151 .v4t => 4,
152 };
153 }
128154 };
129155 pub const Arm64 = enum {
130156 v8_5a,
......@@ -132,10 +158,7 @@ pub const Target = union(enum) {
132158 v8_3a,
133159 v8_2a,
134160 v8_1a,
135 v8,
136 v8r,
137 v8m_baseline,
138 v8m_mainline,
161 v8a,
139162 };
140163 pub const Kalimba = enum {
141164 v5,
......@@ -146,6 +169,129 @@ pub const Target = union(enum) {
146169 r6,
147170 };
148171
172 pub fn subArchName(arch: Arch) ?[]const u8 {
173 return switch (arch) {
174 .arm, .armeb, .thumb, .thumbeb => |arm32| @tagName(arm32),
175 .aarch64, .aarch64_be, .aarch64_32 => |arm64| @tagName(arm64),
176 .kalimba => |kalimba| @tagName(kalimba),
177 else => return null,
178 };
179 }
180
181 pub fn subArchFeature(arch: Arch) ?Cpu.Feature.Set.Index {
182 return switch (arch) {
183 .arm, .armeb, .thumb, .thumbeb => |arm32| switch (arm32) {
184 .v8_5a => @enumToInt(arm.Feature.armv8_5_a),
185 .v8_4a => @enumToInt(arm.Feature.armv8_4_a),
186 .v8_3a => @enumToInt(arm.Feature.armv8_3_a),
187 .v8_2a => @enumToInt(arm.Feature.armv8_2_a),
188 .v8_1a => @enumToInt(arm.Feature.armv8_1_a),
189 .v8a => @enumToInt(arm.Feature.armv8_a),
190 .v8r => @enumToInt(arm.Feature.armv8_r),
191 .v8m_baseline => @enumToInt(arm.Feature.armv8_m_base),
192 .v8m_mainline => @enumToInt(arm.Feature.armv8_m_main),
193 .v8_1m_mainline => @enumToInt(arm.Feature.armv8_1_m_main),
194 .v7a => @enumToInt(arm.Feature.armv7_a),
195 .v7em => @enumToInt(arm.Feature.armv7e_m),
196 .v7m => @enumToInt(arm.Feature.armv7_m),
197 .v7s => @enumToInt(arm.Feature.armv7s),
198 .v7k => @enumToInt(arm.Feature.armv7k),
199 .v7ve => @enumToInt(arm.Feature.armv7ve),
200 .v6 => @enumToInt(arm.Feature.armv6),
201 .v6m => @enumToInt(arm.Feature.armv6_m),
202 .v6k => @enumToInt(arm.Feature.armv6k),
203 .v6t2 => @enumToInt(arm.Feature.armv6t2),
204 .v5 => @enumToInt(arm.Feature.armv5t),
205 .v5te => @enumToInt(arm.Feature.armv5te),
206 .v4t => @enumToInt(arm.Feature.armv4t),
207 },
208 .aarch64, .aarch64_be, .aarch64_32 => |arm64| switch (arm64) {
209 .v8_5a => @enumToInt(aarch64.Feature.v8_5a),
210 .v8_4a => @enumToInt(aarch64.Feature.v8_4a),
211 .v8_3a => @enumToInt(aarch64.Feature.v8_3a),
212 .v8_2a => @enumToInt(aarch64.Feature.v8_2a),
213 .v8_1a => @enumToInt(aarch64.Feature.v8_1a),
214 .v8a => @enumToInt(aarch64.Feature.v8a),
215 },
216 else => return null,
217 };
218 }
219
220 pub fn isARM(arch: Arch) bool {
221 return switch (arch) {
222 .arm, .armeb => true,
223 else => false,
224 };
225 }
226
227 pub fn isThumb(arch: Arch) bool {
228 return switch (arch) {
229 .thumb, .thumbeb => true,
230 else => false,
231 };
232 }
233
234 pub fn isWasm(arch: Arch) bool {
235 return switch (arch) {
236 .wasm32, .wasm64 => true,
237 else => false,
238 };
239 }
240
241 pub fn isMIPS(arch: Arch) bool {
242 return switch (arch) {
243 .mips, .mipsel, .mips64, .mips64el => true,
244 else => false,
245 };
246 }
247
248 pub fn parseCpu(arch: Arch, cpu_name: []const u8) !*const Cpu {
249 for (arch.allCpus()) |cpu| {
250 if (mem.eql(u8, cpu_name, cpu.name)) {
251 return cpu;
252 }
253 }
254 return error.UnknownCpu;
255 }
256
257 /// Comma-separated list of features, with + or - in front of each feature. This
258 /// form represents a deviation from baseline CPU, which is provided as a parameter.
259 /// Extra commas are ignored.
260 pub fn parseCpuFeatureSet(arch: Arch, cpu: *const Cpu, features_text: []const u8) !Cpu.Feature.Set {
261 const all_features = arch.allFeaturesList();
262 var set = cpu.features;
263 var it = mem.tokenize(features_text, ",");
264 while (it.next()) |item_text| {
265 var feature_name: []const u8 = undefined;
266 var op: enum {
267 add,
268 sub,
269 } = undefined;
270 if (mem.startsWith(u8, item_text, "+")) {
271 op = .add;
272 feature_name = item_text[1..];
273 } else if (mem.startsWith(u8, item_text, "-")) {
274 op = .sub;
275 feature_name = item_text[1..];
276 } else {
277 return error.InvalidCpuFeatures;
278 }
279 for (all_features) |feature, index_usize| {
280 const index = @intCast(Cpu.Feature.Set.Index, index_usize);
281 if (mem.eql(u8, feature_name, feature.name)) {
282 switch (op) {
283 .add => set.addFeature(index),
284 .sub => set.removeFeature(index),
285 }
286 break;
287 }
288 } else {
289 return error.UnknownCpuFeature;
290 }
291 }
292 return set;
293 }
294
149295 pub fn toElfMachine(arch: Arch) std.elf.EM {
150296 return switch (arch) {
151297 .avr => ._AVR,
......@@ -258,6 +404,109 @@ pub const Target = union(enum) {
258404 => .Big,
259405 };
260406 }
407
408 /// Returns a name that matches the lib/std/target/* directory name.
409 pub fn genericName(arch: Arch) []const u8 {
410 return switch (arch) {
411 .arm, .armeb, .thumb, .thumbeb => "arm",
412 .aarch64, .aarch64_be, .aarch64_32 => "aarch64",
413 .avr => "avr",
414 .bpfel, .bpfeb => "bpf",
415 .hexagon => "hexagon",
416 .mips, .mipsel, .mips64, .mips64el => "mips",
417 .msp430 => "msp430",
418 .powerpc, .powerpc64, .powerpc64le => "powerpc",
419 .amdgcn => "amdgpu",
420 .riscv32, .riscv64 => "riscv",
421 .sparc, .sparcv9, .sparcel => "sparc",
422 .s390x => "systemz",
423 .i386, .x86_64 => "x86",
424 .nvptx, .nvptx64 => "nvptx",
425 .wasm32, .wasm64 => "wasm",
426 else => @tagName(arch),
427 };
428 }
429
430 /// All CPU features Zig is aware of, sorted lexicographically by name.
431 pub fn allFeaturesList(arch: Arch) []const Cpu.Feature {
432 return switch (arch) {
433 .arm, .armeb, .thumb, .thumbeb => &arm.all_features,
434 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.all_features,
435 .avr => &avr.all_features,
436 .bpfel, .bpfeb => &bpf.all_features,
437 .hexagon => &hexagon.all_features,
438 .mips, .mipsel, .mips64, .mips64el => &mips.all_features,
439 .msp430 => &msp430.all_features,
440 .powerpc, .powerpc64, .powerpc64le => &powerpc.all_features,
441 .amdgcn => &amdgpu.all_features,
442 .riscv32, .riscv64 => &riscv.all_features,
443 .sparc, .sparcv9, .sparcel => &sparc.all_features,
444 .s390x => &systemz.all_features,
445 .i386, .x86_64 => &x86.all_features,
446 .nvptx, .nvptx64 => &nvptx.all_features,
447 .wasm32, .wasm64 => &wasm.all_features,
448
449 else => &[0]Cpu.Feature{},
450 };
451 }
452
453 /// The "default" set of CPU features for cross-compiling. A conservative set
454 /// of features that is expected to be supported on most available hardware.
455 pub fn getBaselineCpuFeatures(arch: Arch) CpuFeatures {
456 const S = struct {
457 const generic_cpu = Cpu{
458 .name = "generic",
459 .llvm_name = null,
460 .features = Cpu.Feature.Set.empty,
461 };
462 };
463 const cpu = switch (arch) {
464 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
465 .aarch64, .aarch64_be, .aarch64_32 => &aarch64.cpu.generic,
466 .avr => &avr.cpu.avr1,
467 .bpfel, .bpfeb => &bpf.cpu.generic,
468 .hexagon => &hexagon.cpu.generic,
469 .mips, .mipsel => &mips.cpu.mips32,
470 .mips64, .mips64el => &mips.cpu.mips64,
471 .msp430 => &msp430.cpu.generic,
472 .powerpc, .powerpc64, .powerpc64le => &powerpc.cpu.generic,
473 .amdgcn => &amdgpu.cpu.generic,
474 .riscv32 => &riscv.cpu.baseline_rv32,
475 .riscv64 => &riscv.cpu.baseline_rv64,
476 .sparc, .sparcv9, .sparcel => &sparc.cpu.generic,
477 .s390x => &systemz.cpu.generic,
478 .i386 => &x86.cpu.pentium4,
479 .x86_64 => &x86.cpu.x86_64,
480 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
481 .wasm32, .wasm64 => &wasm.cpu.generic,
482
483 else => &S.generic_cpu,
484 };
485 return CpuFeatures.initFromCpu(arch, cpu);
486 }
487
488 /// All CPUs Zig is aware of, sorted lexicographically by name.
489 pub fn allCpus(arch: Arch) []const *const Cpu {
490 return switch (arch) {
491 .arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
492 .aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
493 .avr => avr.all_cpus,
494 .bpfel, .bpfeb => bpf.all_cpus,
495 .hexagon => hexagon.all_cpus,
496 .mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
497 .msp430 => msp430.all_cpus,
498 .powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
499 .amdgcn => amdgpu.all_cpus,
500 .riscv32, .riscv64 => riscv.all_cpus,
501 .sparc, .sparcv9, .sparcel => sparc.all_cpus,
502 .s390x => systemz.all_cpus,
503 .i386, .x86_64 => x86.all_cpus,
504 .nvptx, .nvptx64 => nvptx.all_cpus,
505 .wasm32, .wasm64 => wasm.all_cpus,
506
507 else => &[0]*const Cpu{},
508 };
509 }
261510 };
262511
263512 pub const Abi = enum {
......@@ -285,6 +534,109 @@ pub const Target = union(enum) {
285534 macabi,
286535 };
287536
537 pub const Cpu = struct {
538 name: []const u8,
539 llvm_name: ?[:0]const u8,
540 features: Feature.Set,
541
542 pub const Feature = struct {
543 /// The bit index into `Set`. Has a default value of `undefined` because the canonical
544 /// structures are populated via comptime logic.
545 index: Set.Index = undefined,
546
547 /// Has a default value of `undefined` because the canonical
548 /// structures are populated via comptime logic.
549 name: []const u8 = undefined,
550
551 /// If this corresponds to an LLVM-recognized feature, this will be populated;
552 /// otherwise null.
553 llvm_name: ?[:0]const u8,
554
555 /// Human-friendly UTF-8 text.
556 description: []const u8,
557
558 /// Sparse `Set` of features this depends on.
559 dependencies: Set,
560
561 /// A bit set of all the features.
562 pub const Set = struct {
563 ints: [usize_count]usize,
564
565 pub const needed_bit_count = 174;
566 pub const byte_count = (needed_bit_count + 7) / 8;
567 pub const usize_count = (byte_count + (@sizeOf(usize) - 1)) / @sizeOf(usize);
568 pub const Index = std.math.Log2Int(@IntType(false, usize_count * @bitSizeOf(usize)));
569 pub const ShiftInt = std.math.Log2Int(usize);
570
571 pub const empty = Set{ .ints = [1]usize{0} ** usize_count };
572 pub fn empty_workaround() Set {
573 return Set{ .ints = [1]usize{0} ** usize_count };
574 }
575
576 pub fn isEnabled(set: Set, arch_feature_index: Index) bool {
577 const usize_index = arch_feature_index / @bitSizeOf(usize);
578 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
579 return (set.ints[usize_index] & (@as(usize, 1) << bit_index)) != 0;
580 }
581
582 /// Adds the specified feature but not its dependencies.
583 pub fn addFeature(set: *Set, arch_feature_index: Index) void {
584 const usize_index = arch_feature_index / @bitSizeOf(usize);
585 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
586 set.ints[usize_index] |= @as(usize, 1) << bit_index;
587 }
588
589 /// Removes the specified feature but not its dependents.
590 pub fn removeFeature(set: *Set, arch_feature_index: Index) void {
591 const usize_index = arch_feature_index / @bitSizeOf(usize);
592 const bit_index = @intCast(ShiftInt, arch_feature_index % @bitSizeOf(usize));
593 set.ints[usize_index] &= ~(@as(usize, 1) << bit_index);
594 }
595
596 pub fn populateDependencies(set: *Set, all_features_list: []const Cpu.Feature) void {
597 var old = set.ints;
598 while (true) {
599 for (all_features_list) |feature, index_usize| {
600 const index = @intCast(Index, index_usize);
601 if (set.isEnabled(index)) {
602 set.ints = @as(@Vector(usize_count, usize), set.ints) |
603 @as(@Vector(usize_count, usize), feature.dependencies.ints);
604 }
605 }
606 const nothing_changed = mem.eql(usize, &old, &set.ints);
607 if (nothing_changed) return;
608 old = set.ints;
609 }
610 }
611
612 pub fn asBytes(set: *const Set) *const [byte_count]u8 {
613 return @ptrCast(*const [byte_count]u8, &set.ints);
614 }
615
616 pub fn eql(set: Set, other: Set) bool {
617 return mem.eql(usize, &set.ints, &other.ints);
618 }
619 };
620
621 pub fn feature_set_fns(comptime F: type) type {
622 return struct {
623 /// Populates only the feature bits specified.
624 pub fn featureSet(features: []const F) Set {
625 var x = Set.empty_workaround(); // TODO remove empty_workaround
626 for (features) |feature| {
627 x.addFeature(@enumToInt(feature));
628 }
629 return x;
630 }
631
632 pub fn featureSetHas(set: Set, feature: F) bool {
633 return set.isEnabled(@enumToInt(feature));
634 }
635 };
636 }
637 };
638 };
639
288640 pub const ObjectFormat = enum {
289641 unknown,
290642 coff,
......@@ -308,6 +660,28 @@ pub const Target = union(enum) {
308660 arch: Arch,
309661 os: Os,
310662 abi: Abi,
663 cpu_features: CpuFeatures,
664 };
665
666 pub const CpuFeatures = struct {
667 /// The CPU to target. It has a set of features
668 /// which are overridden with the `features` field.
669 cpu: *const Cpu,
670
671 /// Explicitly provide the entire CPU feature set.
672 features: Cpu.Feature.Set,
673
674 pub fn initFromCpu(arch: Arch, cpu: *const Cpu) CpuFeatures {
675 var features = cpu.features;
676 if (arch.subArchFeature()) |sub_arch_index| {
677 features.addFeature(sub_arch_index);
678 }
679 features.populateDependencies(arch.allFeaturesList());
680 return CpuFeatures{
681 .cpu = cpu,
682 .features = features,
683 };
684 }
311685 };
312686
313687 pub const current = Target{
......@@ -315,11 +689,19 @@ pub const Target = union(enum) {
315689 .arch = builtin.arch,
316690 .os = builtin.os,
317691 .abi = builtin.abi,
692 .cpu_features = builtin.cpu_features,
318693 },
319694 };
320695
321696 pub const stack_align = 16;
322697
698 pub fn getCpuFeatures(self: Target) CpuFeatures {
699 return switch (self) {
700 .Native => builtin.cpu_features,
701 .Cross => |cross| cross.cpu_features,
702 };
703 }
704
323705 pub fn zigTriple(self: Target, allocator: *mem.Allocator) ![]u8 {
324706 return std.fmt.allocPrint(allocator, "{}{}-{}-{}", .{
325707 @tagName(self.getArch()),
......@@ -385,14 +767,18 @@ pub const Target = union(enum) {
385767 });
386768 }
387769
770 /// TODO: Support CPU features here?
771 /// https://github.com/ziglang/zig/issues/4261
388772 pub fn parse(text: []const u8) !Target {
389773 var it = mem.separate(text, "-");
390774 const arch_name = it.next() orelse return error.MissingArchitecture;
391775 const os_name = it.next() orelse return error.MissingOperatingSystem;
392776 const abi_name = it.next();
777 const arch = try parseArchSub(arch_name);
393778
394779 var cross = Cross{
395 .arch = try parseArchSub(arch_name),
780 .arch = arch,
781 .cpu_features = arch.getBaselineCpuFeatures(),
396782 .os = try parseOs(os_name),
397783 .abi = undefined,
398784 };
......@@ -458,7 +844,7 @@ pub const Target = union(enum) {
458844 pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch {
459845 const info = @typeInfo(Arch);
460846 inline for (info.Union.fields) |field| {
461 if (mem.eql(u8, text, field.name)) {
847 if (mem.startsWith(u8, text, field.name)) {
462848 if (field.field_type == void) {
463849 return @as(Arch, @field(Arch, field.name));
464850 } else {
......@@ -778,3 +1164,15 @@ pub const Target = union(enum) {
7781164 return .unavailable;
7791165 }
7801166};
1167
1168test "parseCpuFeatureSet" {
1169 const arch: Target.Arch = .x86_64;
1170 const baseline = arch.getBaselineCpuFeatures();
1171 const set = try arch.parseCpuFeatureSet(baseline.cpu, "-sse,-avx,-cx8");
1172 std.testing.expect(!Target.x86.featureSetHas(set, .sse));
1173 std.testing.expect(!Target.x86.featureSetHas(set, .avx));
1174 std.testing.expect(!Target.x86.featureSetHas(set, .cx8));
1175 // These are expected because they are part of the baseline
1176 std.testing.expect(Target.x86.featureSetHas(set, .cmov));
1177 std.testing.expect(Target.x86.featureSetHas(set, .fxsr));
1178}
lib/std/target/aarch64.zig created+1450
......@@ -0,0 +1,1450 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 a35,
6 a53,
7 a55,
8 a57,
9 a72,
10 a73,
11 a75,
12 a76,
13 aes,
14 aggressive_fma,
15 alternate_sextload_cvt_f32_pattern,
16 altnzcv,
17 am,
18 arith_bcc_fusion,
19 arith_cbz_fusion,
20 balance_fp_ops,
21 bti,
22 call_saved_x10,
23 call_saved_x11,
24 call_saved_x12,
25 call_saved_x13,
26 call_saved_x14,
27 call_saved_x15,
28 call_saved_x18,
29 call_saved_x8,
30 call_saved_x9,
31 ccdp,
32 ccidx,
33 ccpp,
34 complxnum,
35 crc,
36 crypto,
37 custom_cheap_as_move,
38 cyclone,
39 disable_latency_sched_heuristic,
40 dit,
41 dotprod,
42 exynos_cheap_as_move,
43 exynosm1,
44 exynosm2,
45 exynosm3,
46 exynosm4,
47 falkor,
48 fmi,
49 force_32bit_jump_tables,
50 fp_armv8,
51 fp16fml,
52 fptoint,
53 fullfp16,
54 fuse_address,
55 fuse_aes,
56 fuse_arith_logic,
57 fuse_crypto_eor,
58 fuse_csel,
59 fuse_literals,
60 jsconv,
61 kryo,
62 lor,
63 lse,
64 lsl_fast,
65 mpam,
66 mte,
67 neon,
68 no_neg_immediates,
69 nv,
70 pa,
71 pan,
72 pan_rwv,
73 perfmon,
74 predictable_select_expensive,
75 predres,
76 rand,
77 ras,
78 rasv8_4,
79 rcpc,
80 rcpc_immo,
81 rdm,
82 reserve_x1,
83 reserve_x10,
84 reserve_x11,
85 reserve_x12,
86 reserve_x13,
87 reserve_x14,
88 reserve_x15,
89 reserve_x18,
90 reserve_x2,
91 reserve_x20,
92 reserve_x21,
93 reserve_x22,
94 reserve_x23,
95 reserve_x24,
96 reserve_x25,
97 reserve_x26,
98 reserve_x27,
99 reserve_x28,
100 reserve_x3,
101 reserve_x4,
102 reserve_x5,
103 reserve_x6,
104 reserve_x7,
105 reserve_x9,
106 saphira,
107 sb,
108 sel2,
109 sha2,
110 sha3,
111 slow_misaligned_128store,
112 slow_paired_128,
113 slow_strqro_store,
114 sm4,
115 spe,
116 specrestrict,
117 ssbs,
118 strict_align,
119 sve,
120 sve2,
121 sve2_aes,
122 sve2_bitperm,
123 sve2_sha3,
124 sve2_sm4,
125 thunderx,
126 thunderx2t99,
127 thunderxt81,
128 thunderxt83,
129 thunderxt88,
130 tlb_rmi,
131 tpidr_el1,
132 tpidr_el2,
133 tpidr_el3,
134 tracev8_4,
135 tsv110,
136 uaops,
137 use_aa,
138 use_postra_scheduler,
139 use_reciprocal_square_root,
140 v8a,
141 v8_1a,
142 v8_2a,
143 v8_3a,
144 v8_4a,
145 v8_5a,
146 vh,
147 zcm,
148 zcz,
149 zcz_fp,
150 zcz_fp_workaround,
151 zcz_gp,
152};
153
154pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
155
156pub const all_features = blk: {
157 @setEvalBranchQuota(2000);
158 const len = @typeInfo(Feature).Enum.fields.len;
159 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
160 var result: [len]Cpu.Feature = undefined;
161 result[@enumToInt(Feature.a35)] = .{
162 .llvm_name = "a35",
163 .description = "Cortex-A35 ARM processors",
164 .dependencies = featureSet(&[_]Feature{
165 .crc,
166 .crypto,
167 .fp_armv8,
168 .neon,
169 .perfmon,
170 }),
171 };
172 result[@enumToInt(Feature.a53)] = .{
173 .llvm_name = "a53",
174 .description = "Cortex-A53 ARM processors",
175 .dependencies = featureSet(&[_]Feature{
176 .balance_fp_ops,
177 .crc,
178 .crypto,
179 .custom_cheap_as_move,
180 .fp_armv8,
181 .fuse_aes,
182 .neon,
183 .perfmon,
184 .use_aa,
185 .use_postra_scheduler,
186 }),
187 };
188 result[@enumToInt(Feature.a55)] = .{
189 .llvm_name = "a55",
190 .description = "Cortex-A55 ARM processors",
191 .dependencies = featureSet(&[_]Feature{
192 .crypto,
193 .dotprod,
194 .fp_armv8,
195 .fullfp16,
196 .fuse_aes,
197 .neon,
198 .perfmon,
199 .rcpc,
200 .v8_2a,
201 }),
202 };
203 result[@enumToInt(Feature.a57)] = .{
204 .llvm_name = "a57",
205 .description = "Cortex-A57 ARM processors",
206 .dependencies = featureSet(&[_]Feature{
207 .balance_fp_ops,
208 .crc,
209 .crypto,
210 .custom_cheap_as_move,
211 .fp_armv8,
212 .fuse_aes,
213 .fuse_literals,
214 .neon,
215 .perfmon,
216 .predictable_select_expensive,
217 .use_postra_scheduler,
218 }),
219 };
220 result[@enumToInt(Feature.a72)] = .{
221 .llvm_name = "a72",
222 .description = "Cortex-A72 ARM processors",
223 .dependencies = featureSet(&[_]Feature{
224 .crc,
225 .crypto,
226 .fp_armv8,
227 .fuse_aes,
228 .neon,
229 .perfmon,
230 }),
231 };
232 result[@enumToInt(Feature.a73)] = .{
233 .llvm_name = "a73",
234 .description = "Cortex-A73 ARM processors",
235 .dependencies = featureSet(&[_]Feature{
236 .crc,
237 .crypto,
238 .fp_armv8,
239 .fuse_aes,
240 .neon,
241 .perfmon,
242 }),
243 };
244 result[@enumToInt(Feature.a75)] = .{
245 .llvm_name = "a75",
246 .description = "Cortex-A75 ARM processors",
247 .dependencies = featureSet(&[_]Feature{
248 .crypto,
249 .dotprod,
250 .fp_armv8,
251 .fullfp16,
252 .fuse_aes,
253 .neon,
254 .perfmon,
255 .rcpc,
256 .v8_2a,
257 }),
258 };
259 result[@enumToInt(Feature.a76)] = .{
260 .llvm_name = "a76",
261 .description = "Cortex-A76 ARM processors",
262 .dependencies = featureSet(&[_]Feature{
263 .crypto,
264 .dotprod,
265 .fp_armv8,
266 .fullfp16,
267 .neon,
268 .rcpc,
269 .ssbs,
270 .v8_2a,
271 }),
272 };
273 result[@enumToInt(Feature.aes)] = .{
274 .llvm_name = "aes",
275 .description = "Enable AES support",
276 .dependencies = featureSet(&[_]Feature{
277 .neon,
278 }),
279 };
280 result[@enumToInt(Feature.aggressive_fma)] = .{
281 .llvm_name = "aggressive-fma",
282 .description = "Enable Aggressive FMA for floating-point.",
283 .dependencies = featureSet(&[_]Feature{}),
284 };
285 result[@enumToInt(Feature.alternate_sextload_cvt_f32_pattern)] = .{
286 .llvm_name = "alternate-sextload-cvt-f32-pattern",
287 .description = "Use alternative pattern for sextload convert to f32",
288 .dependencies = featureSet(&[_]Feature{}),
289 };
290 result[@enumToInt(Feature.altnzcv)] = .{
291 .llvm_name = "altnzcv",
292 .description = "Enable alternative NZCV format for floating point comparisons",
293 .dependencies = featureSet(&[_]Feature{}),
294 };
295 result[@enumToInt(Feature.am)] = .{
296 .llvm_name = "am",
297 .description = "Enable v8.4-A Activity Monitors extension",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.arith_bcc_fusion)] = .{
301 .llvm_name = "arith-bcc-fusion",
302 .description = "CPU fuses arithmetic+bcc operations",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.arith_cbz_fusion)] = .{
306 .llvm_name = "arith-cbz-fusion",
307 .description = "CPU fuses arithmetic + cbz/cbnz operations",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.balance_fp_ops)] = .{
311 .llvm_name = "balance-fp-ops",
312 .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.bti)] = .{
316 .llvm_name = "bti",
317 .description = "Enable Branch Target Identification",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.call_saved_x10)] = .{
321 .llvm_name = "call-saved-x10",
322 .description = "Make X10 callee saved.",
323 .dependencies = featureSet(&[_]Feature{}),
324 };
325 result[@enumToInt(Feature.call_saved_x11)] = .{
326 .llvm_name = "call-saved-x11",
327 .description = "Make X11 callee saved.",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.call_saved_x12)] = .{
331 .llvm_name = "call-saved-x12",
332 .description = "Make X12 callee saved.",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.call_saved_x13)] = .{
336 .llvm_name = "call-saved-x13",
337 .description = "Make X13 callee saved.",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.call_saved_x14)] = .{
341 .llvm_name = "call-saved-x14",
342 .description = "Make X14 callee saved.",
343 .dependencies = featureSet(&[_]Feature{}),
344 };
345 result[@enumToInt(Feature.call_saved_x15)] = .{
346 .llvm_name = "call-saved-x15",
347 .description = "Make X15 callee saved.",
348 .dependencies = featureSet(&[_]Feature{}),
349 };
350 result[@enumToInt(Feature.call_saved_x18)] = .{
351 .llvm_name = "call-saved-x18",
352 .description = "Make X18 callee saved.",
353 .dependencies = featureSet(&[_]Feature{}),
354 };
355 result[@enumToInt(Feature.call_saved_x8)] = .{
356 .llvm_name = "call-saved-x8",
357 .description = "Make X8 callee saved.",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.call_saved_x9)] = .{
361 .llvm_name = "call-saved-x9",
362 .description = "Make X9 callee saved.",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.ccdp)] = .{
366 .llvm_name = "ccdp",
367 .description = "Enable v8.5 Cache Clean to Point of Deep Persistence",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.ccidx)] = .{
371 .llvm_name = "ccidx",
372 .description = "Enable v8.3-A Extend of the CCSIDR number of sets",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.ccpp)] = .{
376 .llvm_name = "ccpp",
377 .description = "Enable v8.2 data Cache Clean to Point of Persistence",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.complxnum)] = .{
381 .llvm_name = "complxnum",
382 .description = "Enable v8.3-A Floating-point complex number support",
383 .dependencies = featureSet(&[_]Feature{
384 .neon,
385 }),
386 };
387 result[@enumToInt(Feature.crc)] = .{
388 .llvm_name = "crc",
389 .description = "Enable ARMv8 CRC-32 checksum instructions",
390 .dependencies = featureSet(&[_]Feature{}),
391 };
392 result[@enumToInt(Feature.crypto)] = .{
393 .llvm_name = "crypto",
394 .description = "Enable cryptographic instructions",
395 .dependencies = featureSet(&[_]Feature{
396 .aes,
397 .neon,
398 .sha2,
399 }),
400 };
401 result[@enumToInt(Feature.custom_cheap_as_move)] = .{
402 .llvm_name = "custom-cheap-as-move",
403 .description = "Use custom handling of cheap instructions",
404 .dependencies = featureSet(&[_]Feature{}),
405 };
406 result[@enumToInt(Feature.cyclone)] = .{
407 .llvm_name = "cyclone",
408 .description = "Cyclone",
409 .dependencies = featureSet(&[_]Feature{
410 .alternate_sextload_cvt_f32_pattern,
411 .arith_bcc_fusion,
412 .arith_cbz_fusion,
413 .crypto,
414 .disable_latency_sched_heuristic,
415 .fp_armv8,
416 .fuse_aes,
417 .fuse_crypto_eor,
418 .neon,
419 .perfmon,
420 .zcm,
421 .zcz,
422 .zcz_fp_workaround,
423 }),
424 };
425 result[@enumToInt(Feature.disable_latency_sched_heuristic)] = .{
426 .llvm_name = "disable-latency-sched-heuristic",
427 .description = "Disable latency scheduling heuristic",
428 .dependencies = featureSet(&[_]Feature{}),
429 };
430 result[@enumToInt(Feature.dit)] = .{
431 .llvm_name = "dit",
432 .description = "Enable v8.4-A Data Independent Timing instructions",
433 .dependencies = featureSet(&[_]Feature{}),
434 };
435 result[@enumToInt(Feature.dotprod)] = .{
436 .llvm_name = "dotprod",
437 .description = "Enable dot product support",
438 .dependencies = featureSet(&[_]Feature{}),
439 };
440 result[@enumToInt(Feature.exynos_cheap_as_move)] = .{
441 .llvm_name = "exynos-cheap-as-move",
442 .description = "Use Exynos specific handling of cheap instructions",
443 .dependencies = featureSet(&[_]Feature{
444 .custom_cheap_as_move,
445 }),
446 };
447 result[@enumToInt(Feature.exynosm1)] = .{
448 .llvm_name = "exynosm1",
449 .description = "Samsung Exynos-M1 processors",
450 .dependencies = featureSet(&[_]Feature{
451 .crc,
452 .crypto,
453 .exynos_cheap_as_move,
454 .force_32bit_jump_tables,
455 .fuse_aes,
456 .perfmon,
457 .slow_misaligned_128store,
458 .slow_paired_128,
459 .use_postra_scheduler,
460 .use_reciprocal_square_root,
461 .zcz_fp,
462 }),
463 };
464 result[@enumToInt(Feature.exynosm2)] = .{
465 .llvm_name = "exynosm2",
466 .description = "Samsung Exynos-M2 processors",
467 .dependencies = featureSet(&[_]Feature{
468 .crc,
469 .crypto,
470 .exynos_cheap_as_move,
471 .force_32bit_jump_tables,
472 .fuse_aes,
473 .perfmon,
474 .slow_misaligned_128store,
475 .slow_paired_128,
476 .use_postra_scheduler,
477 .zcz_fp,
478 }),
479 };
480 result[@enumToInt(Feature.exynosm3)] = .{
481 .llvm_name = "exynosm3",
482 .description = "Samsung Exynos-M3 processors",
483 .dependencies = featureSet(&[_]Feature{
484 .crc,
485 .crypto,
486 .exynos_cheap_as_move,
487 .force_32bit_jump_tables,
488 .fuse_address,
489 .fuse_aes,
490 .fuse_csel,
491 .fuse_literals,
492 .lsl_fast,
493 .perfmon,
494 .predictable_select_expensive,
495 .use_postra_scheduler,
496 .zcz_fp,
497 }),
498 };
499 result[@enumToInt(Feature.exynosm4)] = .{
500 .llvm_name = "exynosm4",
501 .description = "Samsung Exynos-M4 processors",
502 .dependencies = featureSet(&[_]Feature{
503 .arith_bcc_fusion,
504 .arith_cbz_fusion,
505 .crypto,
506 .dotprod,
507 .exynos_cheap_as_move,
508 .force_32bit_jump_tables,
509 .fullfp16,
510 .fuse_address,
511 .fuse_aes,
512 .fuse_arith_logic,
513 .fuse_csel,
514 .fuse_literals,
515 .lsl_fast,
516 .perfmon,
517 .use_postra_scheduler,
518 .v8_2a,
519 .zcz,
520 }),
521 };
522 result[@enumToInt(Feature.falkor)] = .{
523 .llvm_name = "falkor",
524 .description = "Qualcomm Falkor processors",
525 .dependencies = featureSet(&[_]Feature{
526 .crc,
527 .crypto,
528 .custom_cheap_as_move,
529 .fp_armv8,
530 .lsl_fast,
531 .neon,
532 .perfmon,
533 .predictable_select_expensive,
534 .rdm,
535 .slow_strqro_store,
536 .use_postra_scheduler,
537 .zcz,
538 }),
539 };
540 result[@enumToInt(Feature.fmi)] = .{
541 .llvm_name = "fmi",
542 .description = "Enable v8.4-A Flag Manipulation Instructions",
543 .dependencies = featureSet(&[_]Feature{}),
544 };
545 result[@enumToInt(Feature.force_32bit_jump_tables)] = .{
546 .llvm_name = "force-32bit-jump-tables",
547 .description = "Force jump table entries to be 32-bits wide except at MinSize",
548 .dependencies = featureSet(&[_]Feature{}),
549 };
550 result[@enumToInt(Feature.fp_armv8)] = .{
551 .llvm_name = "fp-armv8",
552 .description = "Enable ARMv8 FP",
553 .dependencies = featureSet(&[_]Feature{}),
554 };
555 result[@enumToInt(Feature.fp16fml)] = .{
556 .llvm_name = "fp16fml",
557 .description = "Enable FP16 FML instructions",
558 .dependencies = featureSet(&[_]Feature{
559 .fullfp16,
560 }),
561 };
562 result[@enumToInt(Feature.fptoint)] = .{
563 .llvm_name = "fptoint",
564 .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int",
565 .dependencies = featureSet(&[_]Feature{}),
566 };
567 result[@enumToInt(Feature.fullfp16)] = .{
568 .llvm_name = "fullfp16",
569 .description = "Full FP16",
570 .dependencies = featureSet(&[_]Feature{
571 .fp_armv8,
572 }),
573 };
574 result[@enumToInt(Feature.fuse_address)] = .{
575 .llvm_name = "fuse-address",
576 .description = "CPU fuses address generation and memory operations",
577 .dependencies = featureSet(&[_]Feature{}),
578 };
579 result[@enumToInt(Feature.fuse_aes)] = .{
580 .llvm_name = "fuse-aes",
581 .description = "CPU fuses AES crypto operations",
582 .dependencies = featureSet(&[_]Feature{}),
583 };
584 result[@enumToInt(Feature.fuse_arith_logic)] = .{
585 .llvm_name = "fuse-arith-logic",
586 .description = "CPU fuses arithmetic and logic operations",
587 .dependencies = featureSet(&[_]Feature{}),
588 };
589 result[@enumToInt(Feature.fuse_crypto_eor)] = .{
590 .llvm_name = "fuse-crypto-eor",
591 .description = "CPU fuses AES/PMULL and EOR operations",
592 .dependencies = featureSet(&[_]Feature{}),
593 };
594 result[@enumToInt(Feature.fuse_csel)] = .{
595 .llvm_name = "fuse-csel",
596 .description = "CPU fuses conditional select operations",
597 .dependencies = featureSet(&[_]Feature{}),
598 };
599 result[@enumToInt(Feature.fuse_literals)] = .{
600 .llvm_name = "fuse-literals",
601 .description = "CPU fuses literal generation operations",
602 .dependencies = featureSet(&[_]Feature{}),
603 };
604 result[@enumToInt(Feature.jsconv)] = .{
605 .llvm_name = "jsconv",
606 .description = "Enable v8.3-A JavaScript FP conversion enchancement",
607 .dependencies = featureSet(&[_]Feature{
608 .fp_armv8,
609 }),
610 };
611 result[@enumToInt(Feature.kryo)] = .{
612 .llvm_name = "kryo",
613 .description = "Qualcomm Kryo processors",
614 .dependencies = featureSet(&[_]Feature{
615 .crc,
616 .crypto,
617 .custom_cheap_as_move,
618 .fp_armv8,
619 .lsl_fast,
620 .neon,
621 .perfmon,
622 .predictable_select_expensive,
623 .use_postra_scheduler,
624 .zcz,
625 }),
626 };
627 result[@enumToInt(Feature.lor)] = .{
628 .llvm_name = "lor",
629 .description = "Enables ARM v8.1 Limited Ordering Regions extension",
630 .dependencies = featureSet(&[_]Feature{}),
631 };
632 result[@enumToInt(Feature.lse)] = .{
633 .llvm_name = "lse",
634 .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions",
635 .dependencies = featureSet(&[_]Feature{}),
636 };
637 result[@enumToInt(Feature.lsl_fast)] = .{
638 .llvm_name = "lsl-fast",
639 .description = "CPU has a fastpath logical shift of up to 3 places",
640 .dependencies = featureSet(&[_]Feature{}),
641 };
642 result[@enumToInt(Feature.mpam)] = .{
643 .llvm_name = "mpam",
644 .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension",
645 .dependencies = featureSet(&[_]Feature{}),
646 };
647 result[@enumToInt(Feature.mte)] = .{
648 .llvm_name = "mte",
649 .description = "Enable Memory Tagging Extension",
650 .dependencies = featureSet(&[_]Feature{}),
651 };
652 result[@enumToInt(Feature.neon)] = .{
653 .llvm_name = "neon",
654 .description = "Enable Advanced SIMD instructions",
655 .dependencies = featureSet(&[_]Feature{
656 .fp_armv8,
657 }),
658 };
659 result[@enumToInt(Feature.no_neg_immediates)] = .{
660 .llvm_name = "no-neg-immediates",
661 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.nv)] = .{
665 .llvm_name = "nv",
666 .description = "Enable v8.4-A Nested Virtualization Enchancement",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.pa)] = .{
670 .llvm_name = "pa",
671 .description = "Enable v8.3-A Pointer Authentication enchancement",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.pan)] = .{
675 .llvm_name = "pan",
676 .description = "Enables ARM v8.1 Privileged Access-Never extension",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.pan_rwv)] = .{
680 .llvm_name = "pan-rwv",
681 .description = "Enable v8.2 PAN s1e1R and s1e1W Variants",
682 .dependencies = featureSet(&[_]Feature{
683 .pan,
684 }),
685 };
686 result[@enumToInt(Feature.perfmon)] = .{
687 .llvm_name = "perfmon",
688 .description = "Enable ARMv8 PMUv3 Performance Monitors extension",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.predictable_select_expensive)] = .{
692 .llvm_name = "predictable-select-expensive",
693 .description = "Prefer likely predicted branches over selects",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.predres)] = .{
697 .llvm_name = "predres",
698 .description = "Enable v8.5a execution and data prediction invalidation instructions",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.rand)] = .{
702 .llvm_name = "rand",
703 .description = "Enable Random Number generation instructions",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.ras)] = .{
707 .llvm_name = "ras",
708 .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.rasv8_4)] = .{
712 .llvm_name = "rasv8_4",
713 .description = "Enable v8.4-A Reliability, Availability and Serviceability extension",
714 .dependencies = featureSet(&[_]Feature{
715 .ras,
716 }),
717 };
718 result[@enumToInt(Feature.rcpc)] = .{
719 .llvm_name = "rcpc",
720 .description = "Enable support for RCPC extension",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.rcpc_immo)] = .{
724 .llvm_name = "rcpc-immo",
725 .description = "Enable v8.4-A RCPC instructions with Immediate Offsets",
726 .dependencies = featureSet(&[_]Feature{
727 .rcpc,
728 }),
729 };
730 result[@enumToInt(Feature.rdm)] = .{
731 .llvm_name = "rdm",
732 .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions",
733 .dependencies = featureSet(&[_]Feature{}),
734 };
735 result[@enumToInt(Feature.reserve_x1)] = .{
736 .llvm_name = "reserve-x1",
737 .description = "Reserve X1, making it unavailable as a GPR",
738 .dependencies = featureSet(&[_]Feature{}),
739 };
740 result[@enumToInt(Feature.reserve_x10)] = .{
741 .llvm_name = "reserve-x10",
742 .description = "Reserve X10, making it unavailable as a GPR",
743 .dependencies = featureSet(&[_]Feature{}),
744 };
745 result[@enumToInt(Feature.reserve_x11)] = .{
746 .llvm_name = "reserve-x11",
747 .description = "Reserve X11, making it unavailable as a GPR",
748 .dependencies = featureSet(&[_]Feature{}),
749 };
750 result[@enumToInt(Feature.reserve_x12)] = .{
751 .llvm_name = "reserve-x12",
752 .description = "Reserve X12, making it unavailable as a GPR",
753 .dependencies = featureSet(&[_]Feature{}),
754 };
755 result[@enumToInt(Feature.reserve_x13)] = .{
756 .llvm_name = "reserve-x13",
757 .description = "Reserve X13, making it unavailable as a GPR",
758 .dependencies = featureSet(&[_]Feature{}),
759 };
760 result[@enumToInt(Feature.reserve_x14)] = .{
761 .llvm_name = "reserve-x14",
762 .description = "Reserve X14, making it unavailable as a GPR",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.reserve_x15)] = .{
766 .llvm_name = "reserve-x15",
767 .description = "Reserve X15, making it unavailable as a GPR",
768 .dependencies = featureSet(&[_]Feature{}),
769 };
770 result[@enumToInt(Feature.reserve_x18)] = .{
771 .llvm_name = "reserve-x18",
772 .description = "Reserve X18, making it unavailable as a GPR",
773 .dependencies = featureSet(&[_]Feature{}),
774 };
775 result[@enumToInt(Feature.reserve_x2)] = .{
776 .llvm_name = "reserve-x2",
777 .description = "Reserve X2, making it unavailable as a GPR",
778 .dependencies = featureSet(&[_]Feature{}),
779 };
780 result[@enumToInt(Feature.reserve_x20)] = .{
781 .llvm_name = "reserve-x20",
782 .description = "Reserve X20, making it unavailable as a GPR",
783 .dependencies = featureSet(&[_]Feature{}),
784 };
785 result[@enumToInt(Feature.reserve_x21)] = .{
786 .llvm_name = "reserve-x21",
787 .description = "Reserve X21, making it unavailable as a GPR",
788 .dependencies = featureSet(&[_]Feature{}),
789 };
790 result[@enumToInt(Feature.reserve_x22)] = .{
791 .llvm_name = "reserve-x22",
792 .description = "Reserve X22, making it unavailable as a GPR",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.reserve_x23)] = .{
796 .llvm_name = "reserve-x23",
797 .description = "Reserve X23, making it unavailable as a GPR",
798 .dependencies = featureSet(&[_]Feature{}),
799 };
800 result[@enumToInt(Feature.reserve_x24)] = .{
801 .llvm_name = "reserve-x24",
802 .description = "Reserve X24, making it unavailable as a GPR",
803 .dependencies = featureSet(&[_]Feature{}),
804 };
805 result[@enumToInt(Feature.reserve_x25)] = .{
806 .llvm_name = "reserve-x25",
807 .description = "Reserve X25, making it unavailable as a GPR",
808 .dependencies = featureSet(&[_]Feature{}),
809 };
810 result[@enumToInt(Feature.reserve_x26)] = .{
811 .llvm_name = "reserve-x26",
812 .description = "Reserve X26, making it unavailable as a GPR",
813 .dependencies = featureSet(&[_]Feature{}),
814 };
815 result[@enumToInt(Feature.reserve_x27)] = .{
816 .llvm_name = "reserve-x27",
817 .description = "Reserve X27, making it unavailable as a GPR",
818 .dependencies = featureSet(&[_]Feature{}),
819 };
820 result[@enumToInt(Feature.reserve_x28)] = .{
821 .llvm_name = "reserve-x28",
822 .description = "Reserve X28, making it unavailable as a GPR",
823 .dependencies = featureSet(&[_]Feature{}),
824 };
825 result[@enumToInt(Feature.reserve_x3)] = .{
826 .llvm_name = "reserve-x3",
827 .description = "Reserve X3, making it unavailable as a GPR",
828 .dependencies = featureSet(&[_]Feature{}),
829 };
830 result[@enumToInt(Feature.reserve_x4)] = .{
831 .llvm_name = "reserve-x4",
832 .description = "Reserve X4, making it unavailable as a GPR",
833 .dependencies = featureSet(&[_]Feature{}),
834 };
835 result[@enumToInt(Feature.reserve_x5)] = .{
836 .llvm_name = "reserve-x5",
837 .description = "Reserve X5, making it unavailable as a GPR",
838 .dependencies = featureSet(&[_]Feature{}),
839 };
840 result[@enumToInt(Feature.reserve_x6)] = .{
841 .llvm_name = "reserve-x6",
842 .description = "Reserve X6, making it unavailable as a GPR",
843 .dependencies = featureSet(&[_]Feature{}),
844 };
845 result[@enumToInt(Feature.reserve_x7)] = .{
846 .llvm_name = "reserve-x7",
847 .description = "Reserve X7, making it unavailable as a GPR",
848 .dependencies = featureSet(&[_]Feature{}),
849 };
850 result[@enumToInt(Feature.reserve_x9)] = .{
851 .llvm_name = "reserve-x9",
852 .description = "Reserve X9, making it unavailable as a GPR",
853 .dependencies = featureSet(&[_]Feature{}),
854 };
855 result[@enumToInt(Feature.saphira)] = .{
856 .llvm_name = "saphira",
857 .description = "Qualcomm Saphira processors",
858 .dependencies = featureSet(&[_]Feature{
859 .crypto,
860 .custom_cheap_as_move,
861 .fp_armv8,
862 .lsl_fast,
863 .neon,
864 .perfmon,
865 .predictable_select_expensive,
866 .spe,
867 .use_postra_scheduler,
868 .v8_4a,
869 .zcz,
870 }),
871 };
872 result[@enumToInt(Feature.sb)] = .{
873 .llvm_name = "sb",
874 .description = "Enable v8.5 Speculation Barrier",
875 .dependencies = featureSet(&[_]Feature{}),
876 };
877 result[@enumToInt(Feature.sel2)] = .{
878 .llvm_name = "sel2",
879 .description = "Enable v8.4-A Secure Exception Level 2 extension",
880 .dependencies = featureSet(&[_]Feature{}),
881 };
882 result[@enumToInt(Feature.sha2)] = .{
883 .llvm_name = "sha2",
884 .description = "Enable SHA1 and SHA256 support",
885 .dependencies = featureSet(&[_]Feature{
886 .neon,
887 }),
888 };
889 result[@enumToInt(Feature.sha3)] = .{
890 .llvm_name = "sha3",
891 .description = "Enable SHA512 and SHA3 support",
892 .dependencies = featureSet(&[_]Feature{
893 .neon,
894 .sha2,
895 }),
896 };
897 result[@enumToInt(Feature.slow_misaligned_128store)] = .{
898 .llvm_name = "slow-misaligned-128store",
899 .description = "Misaligned 128 bit stores are slow",
900 .dependencies = featureSet(&[_]Feature{}),
901 };
902 result[@enumToInt(Feature.slow_paired_128)] = .{
903 .llvm_name = "slow-paired-128",
904 .description = "Paired 128 bit loads and stores are slow",
905 .dependencies = featureSet(&[_]Feature{}),
906 };
907 result[@enumToInt(Feature.slow_strqro_store)] = .{
908 .llvm_name = "slow-strqro-store",
909 .description = "STR of Q register with register offset is slow",
910 .dependencies = featureSet(&[_]Feature{}),
911 };
912 result[@enumToInt(Feature.sm4)] = .{
913 .llvm_name = "sm4",
914 .description = "Enable SM3 and SM4 support",
915 .dependencies = featureSet(&[_]Feature{
916 .neon,
917 }),
918 };
919 result[@enumToInt(Feature.spe)] = .{
920 .llvm_name = "spe",
921 .description = "Enable Statistical Profiling extension",
922 .dependencies = featureSet(&[_]Feature{}),
923 };
924 result[@enumToInt(Feature.specrestrict)] = .{
925 .llvm_name = "specrestrict",
926 .description = "Enable architectural speculation restriction",
927 .dependencies = featureSet(&[_]Feature{}),
928 };
929 result[@enumToInt(Feature.ssbs)] = .{
930 .llvm_name = "ssbs",
931 .description = "Enable Speculative Store Bypass Safe bit",
932 .dependencies = featureSet(&[_]Feature{}),
933 };
934 result[@enumToInt(Feature.strict_align)] = .{
935 .llvm_name = "strict-align",
936 .description = "Disallow all unaligned memory access",
937 .dependencies = featureSet(&[_]Feature{}),
938 };
939 result[@enumToInt(Feature.sve)] = .{
940 .llvm_name = "sve",
941 .description = "Enable Scalable Vector Extension (SVE) instructions",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.sve2)] = .{
945 .llvm_name = "sve2",
946 .description = "Enable Scalable Vector Extension 2 (SVE2) instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .sve,
949 }),
950 };
951 result[@enumToInt(Feature.sve2_aes)] = .{
952 .llvm_name = "sve2-aes",
953 .description = "Enable AES SVE2 instructions",
954 .dependencies = featureSet(&[_]Feature{
955 .aes,
956 .sve2,
957 }),
958 };
959 result[@enumToInt(Feature.sve2_bitperm)] = .{
960 .llvm_name = "sve2-bitperm",
961 .description = "Enable bit permutation SVE2 instructions",
962 .dependencies = featureSet(&[_]Feature{
963 .sve2,
964 }),
965 };
966 result[@enumToInt(Feature.sve2_sha3)] = .{
967 .llvm_name = "sve2-sha3",
968 .description = "Enable SHA3 SVE2 instructions",
969 .dependencies = featureSet(&[_]Feature{
970 .sha3,
971 .sve2,
972 }),
973 };
974 result[@enumToInt(Feature.sve2_sm4)] = .{
975 .llvm_name = "sve2-sm4",
976 .description = "Enable SM4 SVE2 instructions",
977 .dependencies = featureSet(&[_]Feature{
978 .sm4,
979 .sve2,
980 }),
981 };
982 result[@enumToInt(Feature.thunderx)] = .{
983 .llvm_name = "thunderx",
984 .description = "Cavium ThunderX processors",
985 .dependencies = featureSet(&[_]Feature{
986 .crc,
987 .crypto,
988 .fp_armv8,
989 .neon,
990 .perfmon,
991 .predictable_select_expensive,
992 .use_postra_scheduler,
993 }),
994 };
995 result[@enumToInt(Feature.thunderx2t99)] = .{
996 .llvm_name = "thunderx2t99",
997 .description = "Cavium ThunderX2 processors",
998 .dependencies = featureSet(&[_]Feature{
999 .aggressive_fma,
1000 .arith_bcc_fusion,
1001 .crc,
1002 .crypto,
1003 .fp_armv8,
1004 .lse,
1005 .neon,
1006 .predictable_select_expensive,
1007 .use_postra_scheduler,
1008 .v8_1a,
1009 }),
1010 };
1011 result[@enumToInt(Feature.thunderxt81)] = .{
1012 .llvm_name = "thunderxt81",
1013 .description = "Cavium ThunderX processors",
1014 .dependencies = featureSet(&[_]Feature{
1015 .crc,
1016 .crypto,
1017 .fp_armv8,
1018 .neon,
1019 .perfmon,
1020 .predictable_select_expensive,
1021 .use_postra_scheduler,
1022 }),
1023 };
1024 result[@enumToInt(Feature.thunderxt83)] = .{
1025 .llvm_name = "thunderxt83",
1026 .description = "Cavium ThunderX processors",
1027 .dependencies = featureSet(&[_]Feature{
1028 .crc,
1029 .crypto,
1030 .fp_armv8,
1031 .neon,
1032 .perfmon,
1033 .predictable_select_expensive,
1034 .use_postra_scheduler,
1035 }),
1036 };
1037 result[@enumToInt(Feature.thunderxt88)] = .{
1038 .llvm_name = "thunderxt88",
1039 .description = "Cavium ThunderX processors",
1040 .dependencies = featureSet(&[_]Feature{
1041 .crc,
1042 .crypto,
1043 .fp_armv8,
1044 .neon,
1045 .perfmon,
1046 .predictable_select_expensive,
1047 .use_postra_scheduler,
1048 }),
1049 };
1050 result[@enumToInt(Feature.tlb_rmi)] = .{
1051 .llvm_name = "tlb-rmi",
1052 .description = "Enable v8.4-A TLB Range and Maintenance Instructions",
1053 .dependencies = featureSet(&[_]Feature{}),
1054 };
1055 result[@enumToInt(Feature.tpidr_el1)] = .{
1056 .llvm_name = "tpidr-el1",
1057 .description = "Permit use of TPIDR_EL1 for the TLS base",
1058 .dependencies = featureSet(&[_]Feature{}),
1059 };
1060 result[@enumToInt(Feature.tpidr_el2)] = .{
1061 .llvm_name = "tpidr-el2",
1062 .description = "Permit use of TPIDR_EL2 for the TLS base",
1063 .dependencies = featureSet(&[_]Feature{}),
1064 };
1065 result[@enumToInt(Feature.tpidr_el3)] = .{
1066 .llvm_name = "tpidr-el3",
1067 .description = "Permit use of TPIDR_EL3 for the TLS base",
1068 .dependencies = featureSet(&[_]Feature{}),
1069 };
1070 result[@enumToInt(Feature.tracev8_4)] = .{
1071 .llvm_name = "tracev8.4",
1072 .description = "Enable v8.4-A Trace extension",
1073 .dependencies = featureSet(&[_]Feature{}),
1074 };
1075 result[@enumToInt(Feature.tsv110)] = .{
1076 .llvm_name = "tsv110",
1077 .description = "HiSilicon TS-V110 processors",
1078 .dependencies = featureSet(&[_]Feature{
1079 .crypto,
1080 .custom_cheap_as_move,
1081 .dotprod,
1082 .fp_armv8,
1083 .fp16fml,
1084 .fullfp16,
1085 .fuse_aes,
1086 .neon,
1087 .perfmon,
1088 .spe,
1089 .use_postra_scheduler,
1090 .v8_2a,
1091 }),
1092 };
1093 result[@enumToInt(Feature.uaops)] = .{
1094 .llvm_name = "uaops",
1095 .description = "Enable v8.2 UAO PState",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.use_aa)] = .{
1099 .llvm_name = "use-aa",
1100 .description = "Use alias analysis during codegen",
1101 .dependencies = featureSet(&[_]Feature{}),
1102 };
1103 result[@enumToInt(Feature.use_postra_scheduler)] = .{
1104 .llvm_name = "use-postra-scheduler",
1105 .description = "Schedule again after register allocation",
1106 .dependencies = featureSet(&[_]Feature{}),
1107 };
1108 result[@enumToInt(Feature.use_reciprocal_square_root)] = .{
1109 .llvm_name = "use-reciprocal-square-root",
1110 .description = "Use the reciprocal square root approximation",
1111 .dependencies = featureSet(&[_]Feature{}),
1112 };
1113 result[@enumToInt(Feature.v8a)] = .{
1114 .llvm_name = null,
1115 .description = "Support ARM v8a instructions",
1116 .dependencies = featureSet(&[_]Feature{
1117 .fp_armv8,
1118 .neon,
1119 }),
1120 };
1121 result[@enumToInt(Feature.v8_1a)] = .{
1122 .llvm_name = "v8.1a",
1123 .description = "Support ARM v8.1a instructions",
1124 .dependencies = featureSet(&[_]Feature{
1125 .crc,
1126 .lor,
1127 .lse,
1128 .pan,
1129 .rdm,
1130 .vh,
1131 .v8a,
1132 }),
1133 };
1134 result[@enumToInt(Feature.v8_2a)] = .{
1135 .llvm_name = "v8.2a",
1136 .description = "Support ARM v8.2a instructions",
1137 .dependencies = featureSet(&[_]Feature{
1138 .ccpp,
1139 .pan_rwv,
1140 .ras,
1141 .uaops,
1142 .v8_1a,
1143 }),
1144 };
1145 result[@enumToInt(Feature.v8_3a)] = .{
1146 .llvm_name = "v8.3a",
1147 .description = "Support ARM v8.3a instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .ccidx,
1150 .complxnum,
1151 .jsconv,
1152 .pa,
1153 .rcpc,
1154 .v8_2a,
1155 }),
1156 };
1157 result[@enumToInt(Feature.v8_4a)] = .{
1158 .llvm_name = "v8.4a",
1159 .description = "Support ARM v8.4a instructions",
1160 .dependencies = featureSet(&[_]Feature{
1161 .am,
1162 .dit,
1163 .dotprod,
1164 .fmi,
1165 .mpam,
1166 .nv,
1167 .rasv8_4,
1168 .rcpc_immo,
1169 .sel2,
1170 .tlb_rmi,
1171 .tracev8_4,
1172 .v8_3a,
1173 }),
1174 };
1175 result[@enumToInt(Feature.v8_5a)] = .{
1176 .llvm_name = "v8.5a",
1177 .description = "Support ARM v8.5a instructions",
1178 .dependencies = featureSet(&[_]Feature{
1179 .altnzcv,
1180 .bti,
1181 .ccdp,
1182 .fptoint,
1183 .predres,
1184 .sb,
1185 .specrestrict,
1186 .ssbs,
1187 .v8_4a,
1188 }),
1189 };
1190 result[@enumToInt(Feature.vh)] = .{
1191 .llvm_name = "vh",
1192 .description = "Enables ARM v8.1 Virtual Host extension",
1193 .dependencies = featureSet(&[_]Feature{}),
1194 };
1195 result[@enumToInt(Feature.zcm)] = .{
1196 .llvm_name = "zcm",
1197 .description = "Has zero-cycle register moves",
1198 .dependencies = featureSet(&[_]Feature{}),
1199 };
1200 result[@enumToInt(Feature.zcz)] = .{
1201 .llvm_name = "zcz",
1202 .description = "Has zero-cycle zeroing instructions",
1203 .dependencies = featureSet(&[_]Feature{
1204 .zcz_fp,
1205 .zcz_gp,
1206 }),
1207 };
1208 result[@enumToInt(Feature.zcz_fp)] = .{
1209 .llvm_name = "zcz-fp",
1210 .description = "Has zero-cycle zeroing instructions for FP registers",
1211 .dependencies = featureSet(&[_]Feature{}),
1212 };
1213 result[@enumToInt(Feature.zcz_fp_workaround)] = .{
1214 .llvm_name = "zcz-fp-workaround",
1215 .description = "The zero-cycle floating-point zeroing instruction has a bug",
1216 .dependencies = featureSet(&[_]Feature{}),
1217 };
1218 result[@enumToInt(Feature.zcz_gp)] = .{
1219 .llvm_name = "zcz-gp",
1220 .description = "Has zero-cycle zeroing instructions for generic registers",
1221 .dependencies = featureSet(&[_]Feature{}),
1222 };
1223 const ti = @typeInfo(Feature);
1224 for (result) |*elem, i| {
1225 elem.index = i;
1226 elem.name = ti.Enum.fields[i].name;
1227 }
1228 break :blk result;
1229};
1230
1231pub const cpu = struct {
1232 pub const apple_latest = Cpu{
1233 .name = "apple_latest",
1234 .llvm_name = "apple-latest",
1235 .features = featureSet(&[_]Feature{
1236 .cyclone,
1237 }),
1238 };
1239 pub const cortex_a35 = Cpu{
1240 .name = "cortex_a35",
1241 .llvm_name = "cortex-a35",
1242 .features = featureSet(&[_]Feature{
1243 .a35,
1244 }),
1245 };
1246 pub const cortex_a53 = Cpu{
1247 .name = "cortex_a53",
1248 .llvm_name = "cortex-a53",
1249 .features = featureSet(&[_]Feature{
1250 .a53,
1251 }),
1252 };
1253 pub const cortex_a55 = Cpu{
1254 .name = "cortex_a55",
1255 .llvm_name = "cortex-a55",
1256 .features = featureSet(&[_]Feature{
1257 .a55,
1258 }),
1259 };
1260 pub const cortex_a57 = Cpu{
1261 .name = "cortex_a57",
1262 .llvm_name = "cortex-a57",
1263 .features = featureSet(&[_]Feature{
1264 .a57,
1265 }),
1266 };
1267 pub const cortex_a72 = Cpu{
1268 .name = "cortex_a72",
1269 .llvm_name = "cortex-a72",
1270 .features = featureSet(&[_]Feature{
1271 .a72,
1272 }),
1273 };
1274 pub const cortex_a73 = Cpu{
1275 .name = "cortex_a73",
1276 .llvm_name = "cortex-a73",
1277 .features = featureSet(&[_]Feature{
1278 .a73,
1279 }),
1280 };
1281 pub const cortex_a75 = Cpu{
1282 .name = "cortex_a75",
1283 .llvm_name = "cortex-a75",
1284 .features = featureSet(&[_]Feature{
1285 .a75,
1286 }),
1287 };
1288 pub const cortex_a76 = Cpu{
1289 .name = "cortex_a76",
1290 .llvm_name = "cortex-a76",
1291 .features = featureSet(&[_]Feature{
1292 .a76,
1293 }),
1294 };
1295 pub const cortex_a76ae = Cpu{
1296 .name = "cortex_a76ae",
1297 .llvm_name = "cortex-a76ae",
1298 .features = featureSet(&[_]Feature{
1299 .a76,
1300 }),
1301 };
1302 pub const cyclone = Cpu{
1303 .name = "cyclone",
1304 .llvm_name = "cyclone",
1305 .features = featureSet(&[_]Feature{
1306 .cyclone,
1307 }),
1308 };
1309 pub const exynos_m1 = Cpu{
1310 .name = "exynos_m1",
1311 .llvm_name = "exynos-m1",
1312 .features = featureSet(&[_]Feature{
1313 .exynosm1,
1314 }),
1315 };
1316 pub const exynos_m2 = Cpu{
1317 .name = "exynos_m2",
1318 .llvm_name = "exynos-m2",
1319 .features = featureSet(&[_]Feature{
1320 .exynosm2,
1321 }),
1322 };
1323 pub const exynos_m3 = Cpu{
1324 .name = "exynos_m3",
1325 .llvm_name = "exynos-m3",
1326 .features = featureSet(&[_]Feature{
1327 .exynosm3,
1328 }),
1329 };
1330 pub const exynos_m4 = Cpu{
1331 .name = "exynos_m4",
1332 .llvm_name = "exynos-m4",
1333 .features = featureSet(&[_]Feature{
1334 .exynosm4,
1335 }),
1336 };
1337 pub const exynos_m5 = Cpu{
1338 .name = "exynos_m5",
1339 .llvm_name = "exynos-m5",
1340 .features = featureSet(&[_]Feature{
1341 .exynosm4,
1342 }),
1343 };
1344 pub const falkor = Cpu{
1345 .name = "falkor",
1346 .llvm_name = "falkor",
1347 .features = featureSet(&[_]Feature{
1348 .falkor,
1349 }),
1350 };
1351 pub const generic = Cpu{
1352 .name = "generic",
1353 .llvm_name = "generic",
1354 .features = featureSet(&[_]Feature{
1355 .fp_armv8,
1356 .fuse_aes,
1357 .neon,
1358 .perfmon,
1359 .use_postra_scheduler,
1360 }),
1361 };
1362 pub const kryo = Cpu{
1363 .name = "kryo",
1364 .llvm_name = "kryo",
1365 .features = featureSet(&[_]Feature{
1366 .kryo,
1367 }),
1368 };
1369 pub const saphira = Cpu{
1370 .name = "saphira",
1371 .llvm_name = "saphira",
1372 .features = featureSet(&[_]Feature{
1373 .saphira,
1374 }),
1375 };
1376 pub const thunderx = Cpu{
1377 .name = "thunderx",
1378 .llvm_name = "thunderx",
1379 .features = featureSet(&[_]Feature{
1380 .thunderx,
1381 }),
1382 };
1383 pub const thunderx2t99 = Cpu{
1384 .name = "thunderx2t99",
1385 .llvm_name = "thunderx2t99",
1386 .features = featureSet(&[_]Feature{
1387 .thunderx2t99,
1388 }),
1389 };
1390 pub const thunderxt81 = Cpu{
1391 .name = "thunderxt81",
1392 .llvm_name = "thunderxt81",
1393 .features = featureSet(&[_]Feature{
1394 .thunderxt81,
1395 }),
1396 };
1397 pub const thunderxt83 = Cpu{
1398 .name = "thunderxt83",
1399 .llvm_name = "thunderxt83",
1400 .features = featureSet(&[_]Feature{
1401 .thunderxt83,
1402 }),
1403 };
1404 pub const thunderxt88 = Cpu{
1405 .name = "thunderxt88",
1406 .llvm_name = "thunderxt88",
1407 .features = featureSet(&[_]Feature{
1408 .thunderxt88,
1409 }),
1410 };
1411 pub const tsv110 = Cpu{
1412 .name = "tsv110",
1413 .llvm_name = "tsv110",
1414 .features = featureSet(&[_]Feature{
1415 .tsv110,
1416 }),
1417 };
1418};
1419
1420/// All aarch64 CPUs, sorted alphabetically by name.
1421/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1422/// compiler has inefficient memory and CPU usage, affecting build times.
1423pub const all_cpus = &[_]*const Cpu{
1424 &cpu.apple_latest,
1425 &cpu.cortex_a35,
1426 &cpu.cortex_a53,
1427 &cpu.cortex_a55,
1428 &cpu.cortex_a57,
1429 &cpu.cortex_a72,
1430 &cpu.cortex_a73,
1431 &cpu.cortex_a75,
1432 &cpu.cortex_a76,
1433 &cpu.cortex_a76ae,
1434 &cpu.cyclone,
1435 &cpu.exynos_m1,
1436 &cpu.exynos_m2,
1437 &cpu.exynos_m3,
1438 &cpu.exynos_m4,
1439 &cpu.exynos_m5,
1440 &cpu.falkor,
1441 &cpu.generic,
1442 &cpu.kryo,
1443 &cpu.saphira,
1444 &cpu.thunderx,
1445 &cpu.thunderx2t99,
1446 &cpu.thunderxt81,
1447 &cpu.thunderxt83,
1448 &cpu.thunderxt88,
1449 &cpu.tsv110,
1450};
lib/std/target/amdgpu.zig created+1315
......@@ -0,0 +1,1315 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"16_bit_insts",
6 DumpCode,
7 add_no_carry_insts,
8 aperture_regs,
9 atomic_fadd_insts,
10 auto_waitcnt_before_barrier,
11 ci_insts,
12 code_object_v3,
13 cumode,
14 dl_insts,
15 dot1_insts,
16 dot2_insts,
17 dot3_insts,
18 dot4_insts,
19 dot5_insts,
20 dot6_insts,
21 dpp,
22 dpp8,
23 dumpcode,
24 enable_ds128,
25 enable_prt_strict_null,
26 fast_fmaf,
27 flat_address_space,
28 flat_for_global,
29 flat_global_insts,
30 flat_inst_offsets,
31 flat_scratch_insts,
32 flat_segment_offset_bug,
33 fma_mix_insts,
34 fmaf,
35 fp_exceptions,
36 fp16_denormals,
37 fp32_denormals,
38 fp64,
39 fp64_denormals,
40 fp64_fp16_denormals,
41 gcn3_encoding,
42 gfx10,
43 gfx10_insts,
44 gfx7_gfx8_gfx9_insts,
45 gfx8_insts,
46 gfx9,
47 gfx9_insts,
48 half_rate_64_ops,
49 inst_fwd_prefetch_bug,
50 int_clamp_insts,
51 inv_2pi_inline_imm,
52 lds_branch_vmem_war_hazard,
53 lds_misaligned_bug,
54 ldsbankcount16,
55 ldsbankcount32,
56 load_store_opt,
57 localmemorysize0,
58 localmemorysize32768,
59 localmemorysize65536,
60 mad_mix_insts,
61 mai_insts,
62 max_private_element_size_16,
63 max_private_element_size_4,
64 max_private_element_size_8,
65 mimg_r128,
66 movrel,
67 no_data_dep_hazard,
68 no_sdst_cmpx,
69 no_sram_ecc_support,
70 no_xnack_support,
71 nsa_encoding,
72 nsa_to_vmem_bug,
73 offset_3f_bug,
74 pk_fmac_f16_inst,
75 promote_alloca,
76 r128_a16,
77 register_banking,
78 s_memrealtime,
79 scalar_atomics,
80 scalar_flat_scratch_insts,
81 scalar_stores,
82 sdwa,
83 sdwa_mav,
84 sdwa_omod,
85 sdwa_out_mods_vopc,
86 sdwa_scalar,
87 sdwa_sdst,
88 sea_islands,
89 sgpr_init_bug,
90 si_scheduler,
91 smem_to_vector_write_hazard,
92 southern_islands,
93 sram_ecc,
94 trap_handler,
95 trig_reduced_range,
96 unaligned_buffer_access,
97 unaligned_scratch_access,
98 unpacked_d16_vmem,
99 unsafe_ds_offset_folding,
100 vcmpx_exec_war_hazard,
101 vcmpx_permlane_hazard,
102 vgpr_index_mode,
103 vmem_to_scalar_write_hazard,
104 volcanic_islands,
105 vop3_literal,
106 vop3p,
107 vscnt,
108 wavefrontsize16,
109 wavefrontsize32,
110 wavefrontsize64,
111 xnack,
112};
113
114pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
115
116pub const all_features = blk: {
117 const len = @typeInfo(Feature).Enum.fields.len;
118 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
119 var result: [len]Cpu.Feature = undefined;
120 result[@enumToInt(Feature.@"16_bit_insts")] = .{
121 .llvm_name = "16-bit-insts",
122 .description = "Has i16/f16 instructions",
123 .dependencies = featureSet(&[_]Feature{}),
124 };
125 result[@enumToInt(Feature.DumpCode)] = .{
126 .llvm_name = "DumpCode",
127 .description = "Dump MachineInstrs in the CodeEmitter",
128 .dependencies = featureSet(&[_]Feature{}),
129 };
130 result[@enumToInt(Feature.add_no_carry_insts)] = .{
131 .llvm_name = "add-no-carry-insts",
132 .description = "Have VALU add/sub instructions without carry out",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.aperture_regs)] = .{
136 .llvm_name = "aperture-regs",
137 .description = "Has Memory Aperture Base and Size Registers",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.atomic_fadd_insts)] = .{
141 .llvm_name = "atomic-fadd-insts",
142 .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.auto_waitcnt_before_barrier)] = .{
146 .llvm_name = "auto-waitcnt-before-barrier",
147 .description = "Hardware automatically inserts waitcnt before barrier",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.ci_insts)] = .{
151 .llvm_name = "ci-insts",
152 .description = "Additional instructions for CI+",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.code_object_v3)] = .{
156 .llvm_name = "code-object-v3",
157 .description = "Generate code object version 3",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.cumode)] = .{
161 .llvm_name = "cumode",
162 .description = "Enable CU wavefront execution mode",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.dl_insts)] = .{
166 .llvm_name = "dl-insts",
167 .description = "Has v_fmac_f32 and v_xnor_b32 instructions",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.dot1_insts)] = .{
171 .llvm_name = "dot1-insts",
172 .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.dot2_insts)] = .{
176 .llvm_name = "dot2-insts",
177 .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@enumToInt(Feature.dot3_insts)] = .{
181 .llvm_name = "dot3-insts",
182 .description = "Has v_dot8c_i32_i4 instruction",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@enumToInt(Feature.dot4_insts)] = .{
186 .llvm_name = "dot4-insts",
187 .description = "Has v_dot2c_i32_i16 instruction",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@enumToInt(Feature.dot5_insts)] = .{
191 .llvm_name = "dot5-insts",
192 .description = "Has v_dot2c_f32_f16 instruction",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@enumToInt(Feature.dot6_insts)] = .{
196 .llvm_name = "dot6-insts",
197 .description = "Has v_dot4c_i32_i8 instruction",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@enumToInt(Feature.dpp)] = .{
201 .llvm_name = "dpp",
202 .description = "Support DPP (Data Parallel Primitives) extension",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@enumToInt(Feature.dpp8)] = .{
206 .llvm_name = "dpp8",
207 .description = "Support DPP8 (Data Parallel Primitives) extension",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.dumpcode)] = .{
211 .llvm_name = "dumpcode",
212 .description = "Dump MachineInstrs in the CodeEmitter",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.enable_ds128)] = .{
216 .llvm_name = "enable-ds128",
217 .description = "Use ds_read|write_b128",
218 .dependencies = featureSet(&[_]Feature{}),
219 };
220 result[@enumToInt(Feature.enable_prt_strict_null)] = .{
221 .llvm_name = "enable-prt-strict-null",
222 .description = "Enable zeroing of result registers for sparse texture fetches",
223 .dependencies = featureSet(&[_]Feature{}),
224 };
225 result[@enumToInt(Feature.fast_fmaf)] = .{
226 .llvm_name = "fast-fmaf",
227 .description = "Assuming f32 fma is at least as fast as mul + add",
228 .dependencies = featureSet(&[_]Feature{}),
229 };
230 result[@enumToInt(Feature.flat_address_space)] = .{
231 .llvm_name = "flat-address-space",
232 .description = "Support flat address space",
233 .dependencies = featureSet(&[_]Feature{}),
234 };
235 result[@enumToInt(Feature.flat_for_global)] = .{
236 .llvm_name = "flat-for-global",
237 .description = "Force to generate flat instruction for global",
238 .dependencies = featureSet(&[_]Feature{}),
239 };
240 result[@enumToInt(Feature.flat_global_insts)] = .{
241 .llvm_name = "flat-global-insts",
242 .description = "Have global_* flat memory instructions",
243 .dependencies = featureSet(&[_]Feature{}),
244 };
245 result[@enumToInt(Feature.flat_inst_offsets)] = .{
246 .llvm_name = "flat-inst-offsets",
247 .description = "Flat instructions have immediate offset addressing mode",
248 .dependencies = featureSet(&[_]Feature{}),
249 };
250 result[@enumToInt(Feature.flat_scratch_insts)] = .{
251 .llvm_name = "flat-scratch-insts",
252 .description = "Have scratch_* flat memory instructions",
253 .dependencies = featureSet(&[_]Feature{}),
254 };
255 result[@enumToInt(Feature.flat_segment_offset_bug)] = .{
256 .llvm_name = "flat-segment-offset-bug",
257 .description = "GFX10 bug, inst_offset ignored in flat segment",
258 .dependencies = featureSet(&[_]Feature{}),
259 };
260 result[@enumToInt(Feature.fma_mix_insts)] = .{
261 .llvm_name = "fma-mix-insts",
262 .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions",
263 .dependencies = featureSet(&[_]Feature{}),
264 };
265 result[@enumToInt(Feature.fmaf)] = .{
266 .llvm_name = "fmaf",
267 .description = "Enable single precision FMA (not as fast as mul+add, but fused)",
268 .dependencies = featureSet(&[_]Feature{}),
269 };
270 result[@enumToInt(Feature.fp_exceptions)] = .{
271 .llvm_name = "fp-exceptions",
272 .description = "Enable floating point exceptions",
273 .dependencies = featureSet(&[_]Feature{}),
274 };
275 result[@enumToInt(Feature.fp16_denormals)] = .{
276 .llvm_name = "fp16-denormals",
277 .description = "Enable half precision denormal handling",
278 .dependencies = featureSet(&[_]Feature{
279 .fp64_fp16_denormals,
280 }),
281 };
282 result[@enumToInt(Feature.fp32_denormals)] = .{
283 .llvm_name = "fp32-denormals",
284 .description = "Enable single precision denormal handling",
285 .dependencies = featureSet(&[_]Feature{}),
286 };
287 result[@enumToInt(Feature.fp64)] = .{
288 .llvm_name = "fp64",
289 .description = "Enable double precision operations",
290 .dependencies = featureSet(&[_]Feature{}),
291 };
292 result[@enumToInt(Feature.fp64_denormals)] = .{
293 .llvm_name = "fp64-denormals",
294 .description = "Enable double and half precision denormal handling",
295 .dependencies = featureSet(&[_]Feature{
296 .fp64,
297 .fp64_fp16_denormals,
298 }),
299 };
300 result[@enumToInt(Feature.fp64_fp16_denormals)] = .{
301 .llvm_name = "fp64-fp16-denormals",
302 .description = "Enable double and half precision denormal handling",
303 .dependencies = featureSet(&[_]Feature{
304 .fp64,
305 }),
306 };
307 result[@enumToInt(Feature.gcn3_encoding)] = .{
308 .llvm_name = "gcn3-encoding",
309 .description = "Encoding format for VI",
310 .dependencies = featureSet(&[_]Feature{}),
311 };
312 result[@enumToInt(Feature.gfx10)] = .{
313 .llvm_name = "gfx10",
314 .description = "GFX10 GPU generation",
315 .dependencies = featureSet(&[_]Feature{
316 .@"16_bit_insts",
317 .add_no_carry_insts,
318 .aperture_regs,
319 .ci_insts,
320 .dpp,
321 .dpp8,
322 .fast_fmaf,
323 .flat_address_space,
324 .flat_global_insts,
325 .flat_inst_offsets,
326 .flat_scratch_insts,
327 .fma_mix_insts,
328 .fp64,
329 .gfx10_insts,
330 .gfx8_insts,
331 .gfx9_insts,
332 .int_clamp_insts,
333 .inv_2pi_inline_imm,
334 .localmemorysize65536,
335 .mimg_r128,
336 .movrel,
337 .no_data_dep_hazard,
338 .no_sdst_cmpx,
339 .no_sram_ecc_support,
340 .pk_fmac_f16_inst,
341 .register_banking,
342 .s_memrealtime,
343 .sdwa,
344 .sdwa_omod,
345 .sdwa_scalar,
346 .sdwa_sdst,
347 .vop3_literal,
348 .vop3p,
349 .vscnt,
350 }),
351 };
352 result[@enumToInt(Feature.gfx10_insts)] = .{
353 .llvm_name = "gfx10-insts",
354 .description = "Additional instructions for GFX10+",
355 .dependencies = featureSet(&[_]Feature{}),
356 };
357 result[@enumToInt(Feature.gfx7_gfx8_gfx9_insts)] = .{
358 .llvm_name = "gfx7-gfx8-gfx9-insts",
359 .description = "Instructions shared in GFX7, GFX8, GFX9",
360 .dependencies = featureSet(&[_]Feature{}),
361 };
362 result[@enumToInt(Feature.gfx8_insts)] = .{
363 .llvm_name = "gfx8-insts",
364 .description = "Additional instructions for GFX8+",
365 .dependencies = featureSet(&[_]Feature{}),
366 };
367 result[@enumToInt(Feature.gfx9)] = .{
368 .llvm_name = "gfx9",
369 .description = "GFX9 GPU generation",
370 .dependencies = featureSet(&[_]Feature{
371 .@"16_bit_insts",
372 .add_no_carry_insts,
373 .aperture_regs,
374 .ci_insts,
375 .dpp,
376 .fast_fmaf,
377 .flat_address_space,
378 .flat_global_insts,
379 .flat_inst_offsets,
380 .flat_scratch_insts,
381 .fp64,
382 .gcn3_encoding,
383 .gfx7_gfx8_gfx9_insts,
384 .gfx8_insts,
385 .gfx9_insts,
386 .int_clamp_insts,
387 .inv_2pi_inline_imm,
388 .localmemorysize65536,
389 .r128_a16,
390 .s_memrealtime,
391 .scalar_atomics,
392 .scalar_flat_scratch_insts,
393 .scalar_stores,
394 .sdwa,
395 .sdwa_omod,
396 .sdwa_scalar,
397 .sdwa_sdst,
398 .vgpr_index_mode,
399 .vop3p,
400 .wavefrontsize64,
401 }),
402 };
403 result[@enumToInt(Feature.gfx9_insts)] = .{
404 .llvm_name = "gfx9-insts",
405 .description = "Additional instructions for GFX9+",
406 .dependencies = featureSet(&[_]Feature{}),
407 };
408 result[@enumToInt(Feature.half_rate_64_ops)] = .{
409 .llvm_name = "half-rate-64-ops",
410 .description = "Most fp64 instructions are half rate instead of quarter",
411 .dependencies = featureSet(&[_]Feature{}),
412 };
413 result[@enumToInt(Feature.inst_fwd_prefetch_bug)] = .{
414 .llvm_name = "inst-fwd-prefetch-bug",
415 .description = "S_INST_PREFETCH instruction causes shader to hang",
416 .dependencies = featureSet(&[_]Feature{}),
417 };
418 result[@enumToInt(Feature.int_clamp_insts)] = .{
419 .llvm_name = "int-clamp-insts",
420 .description = "Support clamp for integer destination",
421 .dependencies = featureSet(&[_]Feature{}),
422 };
423 result[@enumToInt(Feature.inv_2pi_inline_imm)] = .{
424 .llvm_name = "inv-2pi-inline-imm",
425 .description = "Has 1 / (2 * pi) as inline immediate",
426 .dependencies = featureSet(&[_]Feature{}),
427 };
428 result[@enumToInt(Feature.lds_branch_vmem_war_hazard)] = .{
429 .llvm_name = "lds-branch-vmem-war-hazard",
430 .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0",
431 .dependencies = featureSet(&[_]Feature{}),
432 };
433 result[@enumToInt(Feature.lds_misaligned_bug)] = .{
434 .llvm_name = "lds-misaligned-bug",
435 .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode",
436 .dependencies = featureSet(&[_]Feature{}),
437 };
438 result[@enumToInt(Feature.ldsbankcount16)] = .{
439 .llvm_name = "ldsbankcount16",
440 .description = "The number of LDS banks per compute unit.",
441 .dependencies = featureSet(&[_]Feature{}),
442 };
443 result[@enumToInt(Feature.ldsbankcount32)] = .{
444 .llvm_name = "ldsbankcount32",
445 .description = "The number of LDS banks per compute unit.",
446 .dependencies = featureSet(&[_]Feature{}),
447 };
448 result[@enumToInt(Feature.load_store_opt)] = .{
449 .llvm_name = "load-store-opt",
450 .description = "Enable SI load/store optimizer pass",
451 .dependencies = featureSet(&[_]Feature{}),
452 };
453 result[@enumToInt(Feature.localmemorysize0)] = .{
454 .llvm_name = "localmemorysize0",
455 .description = "The size of local memory in bytes",
456 .dependencies = featureSet(&[_]Feature{}),
457 };
458 result[@enumToInt(Feature.localmemorysize32768)] = .{
459 .llvm_name = "localmemorysize32768",
460 .description = "The size of local memory in bytes",
461 .dependencies = featureSet(&[_]Feature{}),
462 };
463 result[@enumToInt(Feature.localmemorysize65536)] = .{
464 .llvm_name = "localmemorysize65536",
465 .description = "The size of local memory in bytes",
466 .dependencies = featureSet(&[_]Feature{}),
467 };
468 result[@enumToInt(Feature.mad_mix_insts)] = .{
469 .llvm_name = "mad-mix-insts",
470 .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions",
471 .dependencies = featureSet(&[_]Feature{}),
472 };
473 result[@enumToInt(Feature.mai_insts)] = .{
474 .llvm_name = "mai-insts",
475 .description = "Has mAI instructions",
476 .dependencies = featureSet(&[_]Feature{}),
477 };
478 result[@enumToInt(Feature.max_private_element_size_16)] = .{
479 .llvm_name = "max-private-element-size-16",
480 .description = "Maximum private access size may be 16",
481 .dependencies = featureSet(&[_]Feature{}),
482 };
483 result[@enumToInt(Feature.max_private_element_size_4)] = .{
484 .llvm_name = "max-private-element-size-4",
485 .description = "Maximum private access size may be 4",
486 .dependencies = featureSet(&[_]Feature{}),
487 };
488 result[@enumToInt(Feature.max_private_element_size_8)] = .{
489 .llvm_name = "max-private-element-size-8",
490 .description = "Maximum private access size may be 8",
491 .dependencies = featureSet(&[_]Feature{}),
492 };
493 result[@enumToInt(Feature.mimg_r128)] = .{
494 .llvm_name = "mimg-r128",
495 .description = "Support 128-bit texture resources",
496 .dependencies = featureSet(&[_]Feature{}),
497 };
498 result[@enumToInt(Feature.movrel)] = .{
499 .llvm_name = "movrel",
500 .description = "Has v_movrel*_b32 instructions",
501 .dependencies = featureSet(&[_]Feature{}),
502 };
503 result[@enumToInt(Feature.no_data_dep_hazard)] = .{
504 .llvm_name = "no-data-dep-hazard",
505 .description = "Does not need SW waitstates",
506 .dependencies = featureSet(&[_]Feature{}),
507 };
508 result[@enumToInt(Feature.no_sdst_cmpx)] = .{
509 .llvm_name = "no-sdst-cmpx",
510 .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
511 .dependencies = featureSet(&[_]Feature{}),
512 };
513 result[@enumToInt(Feature.no_sram_ecc_support)] = .{
514 .llvm_name = "no-sram-ecc-support",
515 .description = "Hardware does not support SRAM ECC",
516 .dependencies = featureSet(&[_]Feature{}),
517 };
518 result[@enumToInt(Feature.no_xnack_support)] = .{
519 .llvm_name = "no-xnack-support",
520 .description = "Hardware does not support XNACK",
521 .dependencies = featureSet(&[_]Feature{}),
522 };
523 result[@enumToInt(Feature.nsa_encoding)] = .{
524 .llvm_name = "nsa-encoding",
525 .description = "Support NSA encoding for image instructions",
526 .dependencies = featureSet(&[_]Feature{}),
527 };
528 result[@enumToInt(Feature.nsa_to_vmem_bug)] = .{
529 .llvm_name = "nsa-to-vmem-bug",
530 .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero",
531 .dependencies = featureSet(&[_]Feature{}),
532 };
533 result[@enumToInt(Feature.offset_3f_bug)] = .{
534 .llvm_name = "offset-3f-bug",
535 .description = "Branch offset of 3f hardware bug",
536 .dependencies = featureSet(&[_]Feature{}),
537 };
538 result[@enumToInt(Feature.pk_fmac_f16_inst)] = .{
539 .llvm_name = "pk-fmac-f16-inst",
540 .description = "Has v_pk_fmac_f16 instruction",
541 .dependencies = featureSet(&[_]Feature{}),
542 };
543 result[@enumToInt(Feature.promote_alloca)] = .{
544 .llvm_name = "promote-alloca",
545 .description = "Enable promote alloca pass",
546 .dependencies = featureSet(&[_]Feature{}),
547 };
548 result[@enumToInt(Feature.r128_a16)] = .{
549 .llvm_name = "r128-a16",
550 .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9",
551 .dependencies = featureSet(&[_]Feature{}),
552 };
553 result[@enumToInt(Feature.register_banking)] = .{
554 .llvm_name = "register-banking",
555 .description = "Has register banking",
556 .dependencies = featureSet(&[_]Feature{}),
557 };
558 result[@enumToInt(Feature.s_memrealtime)] = .{
559 .llvm_name = "s-memrealtime",
560 .description = "Has s_memrealtime instruction",
561 .dependencies = featureSet(&[_]Feature{}),
562 };
563 result[@enumToInt(Feature.scalar_atomics)] = .{
564 .llvm_name = "scalar-atomics",
565 .description = "Has atomic scalar memory instructions",
566 .dependencies = featureSet(&[_]Feature{}),
567 };
568 result[@enumToInt(Feature.scalar_flat_scratch_insts)] = .{
569 .llvm_name = "scalar-flat-scratch-insts",
570 .description = "Have s_scratch_* flat memory instructions",
571 .dependencies = featureSet(&[_]Feature{}),
572 };
573 result[@enumToInt(Feature.scalar_stores)] = .{
574 .llvm_name = "scalar-stores",
575 .description = "Has store scalar memory instructions",
576 .dependencies = featureSet(&[_]Feature{}),
577 };
578 result[@enumToInt(Feature.sdwa)] = .{
579 .llvm_name = "sdwa",
580 .description = "Support SDWA (Sub-DWORD Addressing) extension",
581 .dependencies = featureSet(&[_]Feature{}),
582 };
583 result[@enumToInt(Feature.sdwa_mav)] = .{
584 .llvm_name = "sdwa-mav",
585 .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension",
586 .dependencies = featureSet(&[_]Feature{}),
587 };
588 result[@enumToInt(Feature.sdwa_omod)] = .{
589 .llvm_name = "sdwa-omod",
590 .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension",
591 .dependencies = featureSet(&[_]Feature{}),
592 };
593 result[@enumToInt(Feature.sdwa_out_mods_vopc)] = .{
594 .llvm_name = "sdwa-out-mods-vopc",
595 .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension",
596 .dependencies = featureSet(&[_]Feature{}),
597 };
598 result[@enumToInt(Feature.sdwa_scalar)] = .{
599 .llvm_name = "sdwa-scalar",
600 .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension",
601 .dependencies = featureSet(&[_]Feature{}),
602 };
603 result[@enumToInt(Feature.sdwa_sdst)] = .{
604 .llvm_name = "sdwa-sdst",
605 .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension",
606 .dependencies = featureSet(&[_]Feature{}),
607 };
608 result[@enumToInt(Feature.sea_islands)] = .{
609 .llvm_name = "sea-islands",
610 .description = "SEA_ISLANDS GPU generation",
611 .dependencies = featureSet(&[_]Feature{
612 .ci_insts,
613 .flat_address_space,
614 .fp64,
615 .gfx7_gfx8_gfx9_insts,
616 .localmemorysize65536,
617 .mimg_r128,
618 .movrel,
619 .no_sram_ecc_support,
620 .trig_reduced_range,
621 .wavefrontsize64,
622 }),
623 };
624 result[@enumToInt(Feature.sgpr_init_bug)] = .{
625 .llvm_name = "sgpr-init-bug",
626 .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size",
627 .dependencies = featureSet(&[_]Feature{}),
628 };
629 result[@enumToInt(Feature.si_scheduler)] = .{
630 .llvm_name = "si-scheduler",
631 .description = "Enable SI Machine Scheduler",
632 .dependencies = featureSet(&[_]Feature{}),
633 };
634 result[@enumToInt(Feature.smem_to_vector_write_hazard)] = .{
635 .llvm_name = "smem-to-vector-write-hazard",
636 .description = "s_load_dword followed by v_cmp page faults",
637 .dependencies = featureSet(&[_]Feature{}),
638 };
639 result[@enumToInt(Feature.southern_islands)] = .{
640 .llvm_name = "southern-islands",
641 .description = "SOUTHERN_ISLANDS GPU generation",
642 .dependencies = featureSet(&[_]Feature{
643 .fp64,
644 .ldsbankcount32,
645 .localmemorysize32768,
646 .mimg_r128,
647 .movrel,
648 .no_sram_ecc_support,
649 .no_xnack_support,
650 .trig_reduced_range,
651 .wavefrontsize64,
652 }),
653 };
654 result[@enumToInt(Feature.sram_ecc)] = .{
655 .llvm_name = "sram-ecc",
656 .description = "Enable SRAM ECC",
657 .dependencies = featureSet(&[_]Feature{}),
658 };
659 result[@enumToInt(Feature.trap_handler)] = .{
660 .llvm_name = "trap-handler",
661 .description = "Trap handler support",
662 .dependencies = featureSet(&[_]Feature{}),
663 };
664 result[@enumToInt(Feature.trig_reduced_range)] = .{
665 .llvm_name = "trig-reduced-range",
666 .description = "Requires use of fract on arguments to trig instructions",
667 .dependencies = featureSet(&[_]Feature{}),
668 };
669 result[@enumToInt(Feature.unaligned_buffer_access)] = .{
670 .llvm_name = "unaligned-buffer-access",
671 .description = "Support unaligned global loads and stores",
672 .dependencies = featureSet(&[_]Feature{}),
673 };
674 result[@enumToInt(Feature.unaligned_scratch_access)] = .{
675 .llvm_name = "unaligned-scratch-access",
676 .description = "Support unaligned scratch loads and stores",
677 .dependencies = featureSet(&[_]Feature{}),
678 };
679 result[@enumToInt(Feature.unpacked_d16_vmem)] = .{
680 .llvm_name = "unpacked-d16-vmem",
681 .description = "Has unpacked d16 vmem instructions",
682 .dependencies = featureSet(&[_]Feature{}),
683 };
684 result[@enumToInt(Feature.unsafe_ds_offset_folding)] = .{
685 .llvm_name = "unsafe-ds-offset-folding",
686 .description = "Force using DS instruction immediate offsets on SI",
687 .dependencies = featureSet(&[_]Feature{}),
688 };
689 result[@enumToInt(Feature.vcmpx_exec_war_hazard)] = .{
690 .llvm_name = "vcmpx-exec-war-hazard",
691 .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)",
692 .dependencies = featureSet(&[_]Feature{}),
693 };
694 result[@enumToInt(Feature.vcmpx_permlane_hazard)] = .{
695 .llvm_name = "vcmpx-permlane-hazard",
696 .description = "TODO: describe me",
697 .dependencies = featureSet(&[_]Feature{}),
698 };
699 result[@enumToInt(Feature.vgpr_index_mode)] = .{
700 .llvm_name = "vgpr-index-mode",
701 .description = "Has VGPR mode register indexing",
702 .dependencies = featureSet(&[_]Feature{}),
703 };
704 result[@enumToInt(Feature.vmem_to_scalar_write_hazard)] = .{
705 .llvm_name = "vmem-to-scalar-write-hazard",
706 .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.",
707 .dependencies = featureSet(&[_]Feature{}),
708 };
709 result[@enumToInt(Feature.volcanic_islands)] = .{
710 .llvm_name = "volcanic-islands",
711 .description = "VOLCANIC_ISLANDS GPU generation",
712 .dependencies = featureSet(&[_]Feature{
713 .@"16_bit_insts",
714 .ci_insts,
715 .dpp,
716 .flat_address_space,
717 .fp64,
718 .gcn3_encoding,
719 .gfx7_gfx8_gfx9_insts,
720 .gfx8_insts,
721 .int_clamp_insts,
722 .inv_2pi_inline_imm,
723 .localmemorysize65536,
724 .mimg_r128,
725 .movrel,
726 .no_sram_ecc_support,
727 .s_memrealtime,
728 .scalar_stores,
729 .sdwa,
730 .sdwa_mav,
731 .sdwa_out_mods_vopc,
732 .trig_reduced_range,
733 .vgpr_index_mode,
734 .wavefrontsize64,
735 }),
736 };
737 result[@enumToInt(Feature.vop3_literal)] = .{
738 .llvm_name = "vop3-literal",
739 .description = "Can use one literal in VOP3",
740 .dependencies = featureSet(&[_]Feature{}),
741 };
742 result[@enumToInt(Feature.vop3p)] = .{
743 .llvm_name = "vop3p",
744 .description = "Has VOP3P packed instructions",
745 .dependencies = featureSet(&[_]Feature{}),
746 };
747 result[@enumToInt(Feature.vscnt)] = .{
748 .llvm_name = "vscnt",
749 .description = "Has separate store vscnt counter",
750 .dependencies = featureSet(&[_]Feature{}),
751 };
752 result[@enumToInt(Feature.wavefrontsize16)] = .{
753 .llvm_name = "wavefrontsize16",
754 .description = "The number of threads per wavefront",
755 .dependencies = featureSet(&[_]Feature{}),
756 };
757 result[@enumToInt(Feature.wavefrontsize32)] = .{
758 .llvm_name = "wavefrontsize32",
759 .description = "The number of threads per wavefront",
760 .dependencies = featureSet(&[_]Feature{}),
761 };
762 result[@enumToInt(Feature.wavefrontsize64)] = .{
763 .llvm_name = "wavefrontsize64",
764 .description = "The number of threads per wavefront",
765 .dependencies = featureSet(&[_]Feature{}),
766 };
767 result[@enumToInt(Feature.xnack)] = .{
768 .llvm_name = "xnack",
769 .description = "Enable XNACK support",
770 .dependencies = featureSet(&[_]Feature{}),
771 };
772 const ti = @typeInfo(Feature);
773 for (result) |*elem, i| {
774 elem.index = i;
775 elem.name = ti.Enum.fields[i].name;
776 }
777 break :blk result;
778};
779
780pub const cpu = struct {
781 pub const bonaire = Cpu{
782 .name = "bonaire",
783 .llvm_name = "bonaire",
784 .features = featureSet(&[_]Feature{
785 .code_object_v3,
786 .ldsbankcount32,
787 .no_xnack_support,
788 .sea_islands,
789 }),
790 };
791 pub const carrizo = Cpu{
792 .name = "carrizo",
793 .llvm_name = "carrizo",
794 .features = featureSet(&[_]Feature{
795 .code_object_v3,
796 .fast_fmaf,
797 .half_rate_64_ops,
798 .ldsbankcount32,
799 .unpacked_d16_vmem,
800 .volcanic_islands,
801 .xnack,
802 }),
803 };
804 pub const fiji = Cpu{
805 .name = "fiji",
806 .llvm_name = "fiji",
807 .features = featureSet(&[_]Feature{
808 .code_object_v3,
809 .ldsbankcount32,
810 .no_xnack_support,
811 .unpacked_d16_vmem,
812 .volcanic_islands,
813 }),
814 };
815 pub const generic = Cpu{
816 .name = "generic",
817 .llvm_name = "generic",
818 .features = featureSet(&[_]Feature{
819 .wavefrontsize64,
820 }),
821 };
822 pub const generic_hsa = Cpu{
823 .name = "generic_hsa",
824 .llvm_name = "generic-hsa",
825 .features = featureSet(&[_]Feature{
826 .flat_address_space,
827 .wavefrontsize64,
828 }),
829 };
830 pub const gfx1010 = Cpu{
831 .name = "gfx1010",
832 .llvm_name = "gfx1010",
833 .features = featureSet(&[_]Feature{
834 .code_object_v3,
835 .dl_insts,
836 .flat_segment_offset_bug,
837 .gfx10,
838 .inst_fwd_prefetch_bug,
839 .lds_branch_vmem_war_hazard,
840 .lds_misaligned_bug,
841 .ldsbankcount32,
842 .no_xnack_support,
843 .nsa_encoding,
844 .nsa_to_vmem_bug,
845 .offset_3f_bug,
846 .scalar_atomics,
847 .scalar_flat_scratch_insts,
848 .scalar_stores,
849 .smem_to_vector_write_hazard,
850 .vcmpx_exec_war_hazard,
851 .vcmpx_permlane_hazard,
852 .vmem_to_scalar_write_hazard,
853 .wavefrontsize32,
854 }),
855 };
856 pub const gfx1011 = Cpu{
857 .name = "gfx1011",
858 .llvm_name = "gfx1011",
859 .features = featureSet(&[_]Feature{
860 .code_object_v3,
861 .dl_insts,
862 .dot1_insts,
863 .dot2_insts,
864 .dot5_insts,
865 .dot6_insts,
866 .flat_segment_offset_bug,
867 .gfx10,
868 .inst_fwd_prefetch_bug,
869 .lds_branch_vmem_war_hazard,
870 .ldsbankcount32,
871 .no_xnack_support,
872 .nsa_encoding,
873 .nsa_to_vmem_bug,
874 .offset_3f_bug,
875 .scalar_atomics,
876 .scalar_flat_scratch_insts,
877 .scalar_stores,
878 .smem_to_vector_write_hazard,
879 .vcmpx_exec_war_hazard,
880 .vcmpx_permlane_hazard,
881 .vmem_to_scalar_write_hazard,
882 .wavefrontsize32,
883 }),
884 };
885 pub const gfx1012 = Cpu{
886 .name = "gfx1012",
887 .llvm_name = "gfx1012",
888 .features = featureSet(&[_]Feature{
889 .code_object_v3,
890 .dl_insts,
891 .dot1_insts,
892 .dot2_insts,
893 .dot5_insts,
894 .dot6_insts,
895 .flat_segment_offset_bug,
896 .gfx10,
897 .inst_fwd_prefetch_bug,
898 .lds_branch_vmem_war_hazard,
899 .lds_misaligned_bug,
900 .ldsbankcount32,
901 .no_xnack_support,
902 .nsa_encoding,
903 .nsa_to_vmem_bug,
904 .offset_3f_bug,
905 .scalar_atomics,
906 .scalar_flat_scratch_insts,
907 .scalar_stores,
908 .smem_to_vector_write_hazard,
909 .vcmpx_exec_war_hazard,
910 .vcmpx_permlane_hazard,
911 .vmem_to_scalar_write_hazard,
912 .wavefrontsize32,
913 }),
914 };
915 pub const gfx600 = Cpu{
916 .name = "gfx600",
917 .llvm_name = "gfx600",
918 .features = featureSet(&[_]Feature{
919 .code_object_v3,
920 .fast_fmaf,
921 .half_rate_64_ops,
922 .ldsbankcount32,
923 .no_xnack_support,
924 .southern_islands,
925 }),
926 };
927 pub const gfx601 = Cpu{
928 .name = "gfx601",
929 .llvm_name = "gfx601",
930 .features = featureSet(&[_]Feature{
931 .code_object_v3,
932 .ldsbankcount32,
933 .no_xnack_support,
934 .southern_islands,
935 }),
936 };
937 pub const gfx700 = Cpu{
938 .name = "gfx700",
939 .llvm_name = "gfx700",
940 .features = featureSet(&[_]Feature{
941 .code_object_v3,
942 .ldsbankcount32,
943 .no_xnack_support,
944 .sea_islands,
945 }),
946 };
947 pub const gfx701 = Cpu{
948 .name = "gfx701",
949 .llvm_name = "gfx701",
950 .features = featureSet(&[_]Feature{
951 .code_object_v3,
952 .fast_fmaf,
953 .half_rate_64_ops,
954 .ldsbankcount32,
955 .no_xnack_support,
956 .sea_islands,
957 }),
958 };
959 pub const gfx702 = Cpu{
960 .name = "gfx702",
961 .llvm_name = "gfx702",
962 .features = featureSet(&[_]Feature{
963 .code_object_v3,
964 .fast_fmaf,
965 .ldsbankcount16,
966 .no_xnack_support,
967 .sea_islands,
968 }),
969 };
970 pub const gfx703 = Cpu{
971 .name = "gfx703",
972 .llvm_name = "gfx703",
973 .features = featureSet(&[_]Feature{
974 .code_object_v3,
975 .ldsbankcount16,
976 .no_xnack_support,
977 .sea_islands,
978 }),
979 };
980 pub const gfx704 = Cpu{
981 .name = "gfx704",
982 .llvm_name = "gfx704",
983 .features = featureSet(&[_]Feature{
984 .code_object_v3,
985 .ldsbankcount32,
986 .no_xnack_support,
987 .sea_islands,
988 }),
989 };
990 pub const gfx801 = Cpu{
991 .name = "gfx801",
992 .llvm_name = "gfx801",
993 .features = featureSet(&[_]Feature{
994 .code_object_v3,
995 .fast_fmaf,
996 .half_rate_64_ops,
997 .ldsbankcount32,
998 .unpacked_d16_vmem,
999 .volcanic_islands,
1000 .xnack,
1001 }),
1002 };
1003 pub const gfx802 = Cpu{
1004 .name = "gfx802",
1005 .llvm_name = "gfx802",
1006 .features = featureSet(&[_]Feature{
1007 .code_object_v3,
1008 .ldsbankcount32,
1009 .no_xnack_support,
1010 .sgpr_init_bug,
1011 .unpacked_d16_vmem,
1012 .volcanic_islands,
1013 }),
1014 };
1015 pub const gfx803 = Cpu{
1016 .name = "gfx803",
1017 .llvm_name = "gfx803",
1018 .features = featureSet(&[_]Feature{
1019 .code_object_v3,
1020 .ldsbankcount32,
1021 .no_xnack_support,
1022 .unpacked_d16_vmem,
1023 .volcanic_islands,
1024 }),
1025 };
1026 pub const gfx810 = Cpu{
1027 .name = "gfx810",
1028 .llvm_name = "gfx810",
1029 .features = featureSet(&[_]Feature{
1030 .code_object_v3,
1031 .ldsbankcount16,
1032 .volcanic_islands,
1033 .xnack,
1034 }),
1035 };
1036 pub const gfx900 = Cpu{
1037 .name = "gfx900",
1038 .llvm_name = "gfx900",
1039 .features = featureSet(&[_]Feature{
1040 .code_object_v3,
1041 .gfx9,
1042 .ldsbankcount32,
1043 .mad_mix_insts,
1044 .no_sram_ecc_support,
1045 .no_xnack_support,
1046 }),
1047 };
1048 pub const gfx902 = Cpu{
1049 .name = "gfx902",
1050 .llvm_name = "gfx902",
1051 .features = featureSet(&[_]Feature{
1052 .code_object_v3,
1053 .gfx9,
1054 .ldsbankcount32,
1055 .mad_mix_insts,
1056 .no_sram_ecc_support,
1057 .xnack,
1058 }),
1059 };
1060 pub const gfx904 = Cpu{
1061 .name = "gfx904",
1062 .llvm_name = "gfx904",
1063 .features = featureSet(&[_]Feature{
1064 .code_object_v3,
1065 .fma_mix_insts,
1066 .gfx9,
1067 .ldsbankcount32,
1068 .no_sram_ecc_support,
1069 .no_xnack_support,
1070 }),
1071 };
1072 pub const gfx906 = Cpu{
1073 .name = "gfx906",
1074 .llvm_name = "gfx906",
1075 .features = featureSet(&[_]Feature{
1076 .code_object_v3,
1077 .dl_insts,
1078 .dot1_insts,
1079 .dot2_insts,
1080 .fma_mix_insts,
1081 .gfx9,
1082 .half_rate_64_ops,
1083 .ldsbankcount32,
1084 .no_xnack_support,
1085 }),
1086 };
1087 pub const gfx908 = Cpu{
1088 .name = "gfx908",
1089 .llvm_name = "gfx908",
1090 .features = featureSet(&[_]Feature{
1091 .atomic_fadd_insts,
1092 .code_object_v3,
1093 .dl_insts,
1094 .dot1_insts,
1095 .dot2_insts,
1096 .dot3_insts,
1097 .dot4_insts,
1098 .dot5_insts,
1099 .dot6_insts,
1100 .fma_mix_insts,
1101 .gfx9,
1102 .half_rate_64_ops,
1103 .ldsbankcount32,
1104 .mai_insts,
1105 .pk_fmac_f16_inst,
1106 .sram_ecc,
1107 }),
1108 };
1109 pub const gfx909 = Cpu{
1110 .name = "gfx909",
1111 .llvm_name = "gfx909",
1112 .features = featureSet(&[_]Feature{
1113 .code_object_v3,
1114 .gfx9,
1115 .ldsbankcount32,
1116 .mad_mix_insts,
1117 .xnack,
1118 }),
1119 };
1120 pub const hainan = Cpu{
1121 .name = "hainan",
1122 .llvm_name = "hainan",
1123 .features = featureSet(&[_]Feature{
1124 .code_object_v3,
1125 .ldsbankcount32,
1126 .no_xnack_support,
1127 .southern_islands,
1128 }),
1129 };
1130 pub const hawaii = Cpu{
1131 .name = "hawaii",
1132 .llvm_name = "hawaii",
1133 .features = featureSet(&[_]Feature{
1134 .code_object_v3,
1135 .fast_fmaf,
1136 .half_rate_64_ops,
1137 .ldsbankcount32,
1138 .no_xnack_support,
1139 .sea_islands,
1140 }),
1141 };
1142 pub const iceland = Cpu{
1143 .name = "iceland",
1144 .llvm_name = "iceland",
1145 .features = featureSet(&[_]Feature{
1146 .code_object_v3,
1147 .ldsbankcount32,
1148 .no_xnack_support,
1149 .sgpr_init_bug,
1150 .unpacked_d16_vmem,
1151 .volcanic_islands,
1152 }),
1153 };
1154 pub const kabini = Cpu{
1155 .name = "kabini",
1156 .llvm_name = "kabini",
1157 .features = featureSet(&[_]Feature{
1158 .code_object_v3,
1159 .ldsbankcount16,
1160 .no_xnack_support,
1161 .sea_islands,
1162 }),
1163 };
1164 pub const kaveri = Cpu{
1165 .name = "kaveri",
1166 .llvm_name = "kaveri",
1167 .features = featureSet(&[_]Feature{
1168 .code_object_v3,
1169 .ldsbankcount32,
1170 .no_xnack_support,
1171 .sea_islands,
1172 }),
1173 };
1174 pub const mullins = Cpu{
1175 .name = "mullins",
1176 .llvm_name = "mullins",
1177 .features = featureSet(&[_]Feature{
1178 .code_object_v3,
1179 .ldsbankcount16,
1180 .no_xnack_support,
1181 .sea_islands,
1182 }),
1183 };
1184 pub const oland = Cpu{
1185 .name = "oland",
1186 .llvm_name = "oland",
1187 .features = featureSet(&[_]Feature{
1188 .code_object_v3,
1189 .ldsbankcount32,
1190 .no_xnack_support,
1191 .southern_islands,
1192 }),
1193 };
1194 pub const pitcairn = Cpu{
1195 .name = "pitcairn",
1196 .llvm_name = "pitcairn",
1197 .features = featureSet(&[_]Feature{
1198 .code_object_v3,
1199 .ldsbankcount32,
1200 .no_xnack_support,
1201 .southern_islands,
1202 }),
1203 };
1204 pub const polaris10 = Cpu{
1205 .name = "polaris10",
1206 .llvm_name = "polaris10",
1207 .features = featureSet(&[_]Feature{
1208 .code_object_v3,
1209 .ldsbankcount32,
1210 .no_xnack_support,
1211 .unpacked_d16_vmem,
1212 .volcanic_islands,
1213 }),
1214 };
1215 pub const polaris11 = Cpu{
1216 .name = "polaris11",
1217 .llvm_name = "polaris11",
1218 .features = featureSet(&[_]Feature{
1219 .code_object_v3,
1220 .ldsbankcount32,
1221 .no_xnack_support,
1222 .unpacked_d16_vmem,
1223 .volcanic_islands,
1224 }),
1225 };
1226 pub const stoney = Cpu{
1227 .name = "stoney",
1228 .llvm_name = "stoney",
1229 .features = featureSet(&[_]Feature{
1230 .code_object_v3,
1231 .ldsbankcount16,
1232 .volcanic_islands,
1233 .xnack,
1234 }),
1235 };
1236 pub const tahiti = Cpu{
1237 .name = "tahiti",
1238 .llvm_name = "tahiti",
1239 .features = featureSet(&[_]Feature{
1240 .code_object_v3,
1241 .fast_fmaf,
1242 .half_rate_64_ops,
1243 .ldsbankcount32,
1244 .no_xnack_support,
1245 .southern_islands,
1246 }),
1247 };
1248 pub const tonga = Cpu{
1249 .name = "tonga",
1250 .llvm_name = "tonga",
1251 .features = featureSet(&[_]Feature{
1252 .code_object_v3,
1253 .ldsbankcount32,
1254 .no_xnack_support,
1255 .sgpr_init_bug,
1256 .unpacked_d16_vmem,
1257 .volcanic_islands,
1258 }),
1259 };
1260 pub const verde = Cpu{
1261 .name = "verde",
1262 .llvm_name = "verde",
1263 .features = featureSet(&[_]Feature{
1264 .code_object_v3,
1265 .ldsbankcount32,
1266 .no_xnack_support,
1267 .southern_islands,
1268 }),
1269 };
1270};
1271
1272/// All amdgpu CPUs, sorted alphabetically by name.
1273/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1274/// compiler has inefficient memory and CPU usage, affecting build times.
1275pub const all_cpus = &[_]*const Cpu{
1276 &cpu.bonaire,
1277 &cpu.carrizo,
1278 &cpu.fiji,
1279 &cpu.generic,
1280 &cpu.generic_hsa,
1281 &cpu.gfx1010,
1282 &cpu.gfx1011,
1283 &cpu.gfx1012,
1284 &cpu.gfx600,
1285 &cpu.gfx601,
1286 &cpu.gfx700,
1287 &cpu.gfx701,
1288 &cpu.gfx702,
1289 &cpu.gfx703,
1290 &cpu.gfx704,
1291 &cpu.gfx801,
1292 &cpu.gfx802,
1293 &cpu.gfx803,
1294 &cpu.gfx810,
1295 &cpu.gfx900,
1296 &cpu.gfx902,
1297 &cpu.gfx904,
1298 &cpu.gfx906,
1299 &cpu.gfx908,
1300 &cpu.gfx909,
1301 &cpu.hainan,
1302 &cpu.hawaii,
1303 &cpu.iceland,
1304 &cpu.kabini,
1305 &cpu.kaveri,
1306 &cpu.mullins,
1307 &cpu.oland,
1308 &cpu.pitcairn,
1309 &cpu.polaris10,
1310 &cpu.polaris11,
1311 &cpu.stoney,
1312 &cpu.tahiti,
1313 &cpu.tonga,
1314 &cpu.verde,
1315};
lib/std/target/arm.zig created+2333
......@@ -0,0 +1,2333 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"32bit",
6 @"8msecext",
7 a12,
8 a15,
9 a17,
10 a32,
11 a35,
12 a5,
13 a53,
14 a55,
15 a57,
16 a7,
17 a72,
18 a73,
19 a75,
20 a76,
21 a8,
22 a9,
23 aclass,
24 acquire_release,
25 aes,
26 armv2,
27 armv2a,
28 armv3,
29 armv3m,
30 armv4,
31 armv4t,
32 armv5t,
33 armv5te,
34 armv5tej,
35 armv6,
36 armv6_m,
37 armv6j,
38 armv6k,
39 armv6kz,
40 armv6s_m,
41 armv6t2,
42 armv7_a,
43 armv7_m,
44 armv7_r,
45 armv7e_m,
46 armv7k,
47 armv7s,
48 armv7ve,
49 armv8_a,
50 armv8_m_base,
51 armv8_m_main,
52 armv8_r,
53 armv8_1_a,
54 armv8_1_m_main,
55 armv8_2_a,
56 armv8_3_a,
57 armv8_4_a,
58 armv8_5_a,
59 avoid_movs_shop,
60 avoid_partial_cpsr,
61 cheap_predicable_cpsr,
62 crc,
63 crypto,
64 d32,
65 db,
66 dfb,
67 disable_postra_scheduler,
68 dont_widen_vmovs,
69 dotprod,
70 dsp,
71 execute_only,
72 expand_fp_mlx,
73 exynos,
74 fp_armv8,
75 fp_armv8d16,
76 fp_armv8d16sp,
77 fp_armv8sp,
78 fp16,
79 fp16fml,
80 fp64,
81 fpao,
82 fpregs,
83 fpregs16,
84 fpregs64,
85 fullfp16,
86 fuse_aes,
87 fuse_literals,
88 hwdiv,
89 hwdiv_arm,
90 iwmmxt,
91 iwmmxt2,
92 krait,
93 kryo,
94 lob,
95 long_calls,
96 loop_align,
97 m3,
98 mclass,
99 mp,
100 muxed_units,
101 mve,
102 mve_fp,
103 nacl_trap,
104 neon,
105 neon_fpmovs,
106 neonfp,
107 no_branch_predictor,
108 no_movt,
109 no_neg_immediates,
110 noarm,
111 nonpipelined_vfp,
112 perfmon,
113 prefer_ishst,
114 prefer_vmovsr,
115 prof_unpr,
116 r4,
117 r5,
118 r52,
119 r7,
120 ras,
121 rclass,
122 read_tp_hard,
123 reserve_r9,
124 ret_addr_stack,
125 sb,
126 sha2,
127 slow_fp_brcc,
128 slow_load_D_subreg,
129 slow_odd_reg,
130 slow_vdup32,
131 slow_vgetlni32,
132 slowfpvmlx,
133 soft_float,
134 splat_vfp_neon,
135 strict_align,
136 swift,
137 thumb_mode,
138 thumb2,
139 trustzone,
140 use_aa,
141 use_misched,
142 v4t,
143 v5t,
144 v5te,
145 v6,
146 v6k,
147 v6m,
148 v6t2,
149 v7,
150 v7clrex,
151 v8,
152 v8_1a,
153 v8_1m_main,
154 v8_2a,
155 v8_3a,
156 v8_4a,
157 v8_5a,
158 v8m,
159 v8m_main,
160 vfp2,
161 vfp2d16,
162 vfp2d16sp,
163 vfp2sp,
164 vfp3,
165 vfp3d16,
166 vfp3d16sp,
167 vfp3sp,
168 vfp4,
169 vfp4d16,
170 vfp4d16sp,
171 vfp4sp,
172 virtualization,
173 vldn_align,
174 vmlx_forwarding,
175 vmlx_hazards,
176 wide_stride_vfp,
177 xscale,
178 zcz,
179};
180
181pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
182
183pub const all_features = blk: {
184 @setEvalBranchQuota(10000);
185 const len = @typeInfo(Feature).Enum.fields.len;
186 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
187 var result: [len]Cpu.Feature = undefined;
188 result[@enumToInt(Feature.@"32bit")] = .{
189 .llvm_name = "32bit",
190 .description = "Prefer 32-bit Thumb instrs",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.@"8msecext")] = .{
194 .llvm_name = "8msecext",
195 .description = "Enable support for ARMv8-M Security Extensions",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.a12)] = .{
199 .llvm_name = "a12",
200 .description = "Cortex-A12 ARM processors",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.a15)] = .{
204 .llvm_name = "a15",
205 .description = "Cortex-A15 ARM processors",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.a17)] = .{
209 .llvm_name = "a17",
210 .description = "Cortex-A17 ARM processors",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.a32)] = .{
214 .llvm_name = "a32",
215 .description = "Cortex-A32 ARM processors",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.a35)] = .{
219 .llvm_name = "a35",
220 .description = "Cortex-A35 ARM processors",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 result[@enumToInt(Feature.a5)] = .{
224 .llvm_name = "a5",
225 .description = "Cortex-A5 ARM processors",
226 .dependencies = featureSet(&[_]Feature{}),
227 };
228 result[@enumToInt(Feature.a53)] = .{
229 .llvm_name = "a53",
230 .description = "Cortex-A53 ARM processors",
231 .dependencies = featureSet(&[_]Feature{}),
232 };
233 result[@enumToInt(Feature.a55)] = .{
234 .llvm_name = "a55",
235 .description = "Cortex-A55 ARM processors",
236 .dependencies = featureSet(&[_]Feature{}),
237 };
238 result[@enumToInt(Feature.a57)] = .{
239 .llvm_name = "a57",
240 .description = "Cortex-A57 ARM processors",
241 .dependencies = featureSet(&[_]Feature{}),
242 };
243 result[@enumToInt(Feature.a7)] = .{
244 .llvm_name = "a7",
245 .description = "Cortex-A7 ARM processors",
246 .dependencies = featureSet(&[_]Feature{}),
247 };
248 result[@enumToInt(Feature.a72)] = .{
249 .llvm_name = "a72",
250 .description = "Cortex-A72 ARM processors",
251 .dependencies = featureSet(&[_]Feature{}),
252 };
253 result[@enumToInt(Feature.a73)] = .{
254 .llvm_name = "a73",
255 .description = "Cortex-A73 ARM processors",
256 .dependencies = featureSet(&[_]Feature{}),
257 };
258 result[@enumToInt(Feature.a75)] = .{
259 .llvm_name = "a75",
260 .description = "Cortex-A75 ARM processors",
261 .dependencies = featureSet(&[_]Feature{}),
262 };
263 result[@enumToInt(Feature.a76)] = .{
264 .llvm_name = "a76",
265 .description = "Cortex-A76 ARM processors",
266 .dependencies = featureSet(&[_]Feature{}),
267 };
268 result[@enumToInt(Feature.a8)] = .{
269 .llvm_name = "a8",
270 .description = "Cortex-A8 ARM processors",
271 .dependencies = featureSet(&[_]Feature{}),
272 };
273 result[@enumToInt(Feature.a9)] = .{
274 .llvm_name = "a9",
275 .description = "Cortex-A9 ARM processors",
276 .dependencies = featureSet(&[_]Feature{}),
277 };
278 result[@enumToInt(Feature.aclass)] = .{
279 .llvm_name = "aclass",
280 .description = "Is application profile ('A' series)",
281 .dependencies = featureSet(&[_]Feature{}),
282 };
283 result[@enumToInt(Feature.acquire_release)] = .{
284 .llvm_name = "acquire-release",
285 .description = "Has v8 acquire/release (lda/ldaex etc) instructions",
286 .dependencies = featureSet(&[_]Feature{}),
287 };
288 result[@enumToInt(Feature.aes)] = .{
289 .llvm_name = "aes",
290 .description = "Enable AES support",
291 .dependencies = featureSet(&[_]Feature{
292 .neon,
293 }),
294 };
295 result[@enumToInt(Feature.armv2)] = .{
296 .llvm_name = "armv2",
297 .description = "ARMv2 architecture",
298 .dependencies = featureSet(&[_]Feature{}),
299 };
300 result[@enumToInt(Feature.armv2a)] = .{
301 .llvm_name = "armv2a",
302 .description = "ARMv2a architecture",
303 .dependencies = featureSet(&[_]Feature{}),
304 };
305 result[@enumToInt(Feature.armv3)] = .{
306 .llvm_name = "armv3",
307 .description = "ARMv3 architecture",
308 .dependencies = featureSet(&[_]Feature{}),
309 };
310 result[@enumToInt(Feature.armv3m)] = .{
311 .llvm_name = "armv3m",
312 .description = "ARMv3m architecture",
313 .dependencies = featureSet(&[_]Feature{}),
314 };
315 result[@enumToInt(Feature.armv4)] = .{
316 .llvm_name = "armv4",
317 .description = "ARMv4 architecture",
318 .dependencies = featureSet(&[_]Feature{}),
319 };
320 result[@enumToInt(Feature.armv4t)] = .{
321 .llvm_name = "armv4t",
322 .description = "ARMv4t architecture",
323 .dependencies = featureSet(&[_]Feature{
324 .v4t,
325 }),
326 };
327 result[@enumToInt(Feature.armv5t)] = .{
328 .llvm_name = "armv5t",
329 .description = "ARMv5t architecture",
330 .dependencies = featureSet(&[_]Feature{
331 .v5t,
332 }),
333 };
334 result[@enumToInt(Feature.armv5te)] = .{
335 .llvm_name = "armv5te",
336 .description = "ARMv5te architecture",
337 .dependencies = featureSet(&[_]Feature{
338 .v5te,
339 }),
340 };
341 result[@enumToInt(Feature.armv5tej)] = .{
342 .llvm_name = "armv5tej",
343 .description = "ARMv5tej architecture",
344 .dependencies = featureSet(&[_]Feature{
345 .v5te,
346 }),
347 };
348 result[@enumToInt(Feature.armv6)] = .{
349 .llvm_name = "armv6",
350 .description = "ARMv6 architecture",
351 .dependencies = featureSet(&[_]Feature{
352 .dsp,
353 .v6,
354 }),
355 };
356 result[@enumToInt(Feature.armv6_m)] = .{
357 .llvm_name = "armv6-m",
358 .description = "ARMv6m architecture",
359 .dependencies = featureSet(&[_]Feature{
360 .db,
361 .mclass,
362 .noarm,
363 .strict_align,
364 .thumb_mode,
365 .v6m,
366 }),
367 };
368 result[@enumToInt(Feature.armv6j)] = .{
369 .llvm_name = "armv6j",
370 .description = "ARMv7a architecture",
371 .dependencies = featureSet(&[_]Feature{
372 .armv6,
373 }),
374 };
375 result[@enumToInt(Feature.armv6k)] = .{
376 .llvm_name = "armv6k",
377 .description = "ARMv6k architecture",
378 .dependencies = featureSet(&[_]Feature{
379 .v6k,
380 }),
381 };
382 result[@enumToInt(Feature.armv6kz)] = .{
383 .llvm_name = "armv6kz",
384 .description = "ARMv6kz architecture",
385 .dependencies = featureSet(&[_]Feature{
386 .trustzone,
387 .v6k,
388 }),
389 };
390 result[@enumToInt(Feature.armv6s_m)] = .{
391 .llvm_name = "armv6s-m",
392 .description = "ARMv6sm architecture",
393 .dependencies = featureSet(&[_]Feature{
394 .db,
395 .mclass,
396 .noarm,
397 .strict_align,
398 .thumb_mode,
399 .v6m,
400 }),
401 };
402 result[@enumToInt(Feature.armv6t2)] = .{
403 .llvm_name = "armv6t2",
404 .description = "ARMv6t2 architecture",
405 .dependencies = featureSet(&[_]Feature{
406 .dsp,
407 .v6t2,
408 }),
409 };
410 result[@enumToInt(Feature.armv7_a)] = .{
411 .llvm_name = "armv7-a",
412 .description = "ARMv7a architecture",
413 .dependencies = featureSet(&[_]Feature{
414 .aclass,
415 .db,
416 .dsp,
417 .neon,
418 .v7,
419 }),
420 };
421 result[@enumToInt(Feature.armv7_m)] = .{
422 .llvm_name = "armv7-m",
423 .description = "ARMv7m architecture",
424 .dependencies = featureSet(&[_]Feature{
425 .db,
426 .hwdiv,
427 .mclass,
428 .noarm,
429 .thumb_mode,
430 .thumb2,
431 .v7,
432 }),
433 };
434 result[@enumToInt(Feature.armv7_r)] = .{
435 .llvm_name = "armv7-r",
436 .description = "ARMv7r architecture",
437 .dependencies = featureSet(&[_]Feature{
438 .db,
439 .dsp,
440 .hwdiv,
441 .rclass,
442 .v7,
443 }),
444 };
445 result[@enumToInt(Feature.armv7e_m)] = .{
446 .llvm_name = "armv7e-m",
447 .description = "ARMv7em architecture",
448 .dependencies = featureSet(&[_]Feature{
449 .db,
450 .dsp,
451 .hwdiv,
452 .mclass,
453 .noarm,
454 .thumb_mode,
455 .thumb2,
456 .v7,
457 }),
458 };
459 result[@enumToInt(Feature.armv7k)] = .{
460 .llvm_name = "armv7k",
461 .description = "ARMv7a architecture",
462 .dependencies = featureSet(&[_]Feature{
463 .armv7_a,
464 }),
465 };
466 result[@enumToInt(Feature.armv7s)] = .{
467 .llvm_name = "armv7s",
468 .description = "ARMv7a architecture",
469 .dependencies = featureSet(&[_]Feature{
470 .armv7_a,
471 }),
472 };
473 result[@enumToInt(Feature.armv7ve)] = .{
474 .llvm_name = "armv7ve",
475 .description = "ARMv7ve architecture",
476 .dependencies = featureSet(&[_]Feature{
477 .aclass,
478 .db,
479 .dsp,
480 .mp,
481 .neon,
482 .trustzone,
483 .v7,
484 .virtualization,
485 }),
486 };
487 result[@enumToInt(Feature.armv8_a)] = .{
488 .llvm_name = "armv8-a",
489 .description = "ARMv8a architecture",
490 .dependencies = featureSet(&[_]Feature{
491 .aclass,
492 .crc,
493 .crypto,
494 .db,
495 .dsp,
496 .fp_armv8,
497 .mp,
498 .neon,
499 .trustzone,
500 .v8,
501 .virtualization,
502 }),
503 };
504 result[@enumToInt(Feature.armv8_m_base)] = .{
505 .llvm_name = "armv8-m.base",
506 .description = "ARMv8mBaseline architecture",
507 .dependencies = featureSet(&[_]Feature{
508 .@"8msecext",
509 .acquire_release,
510 .db,
511 .hwdiv,
512 .mclass,
513 .noarm,
514 .strict_align,
515 .thumb_mode,
516 .v7clrex,
517 .v8m,
518 }),
519 };
520 result[@enumToInt(Feature.armv8_m_main)] = .{
521 .llvm_name = "armv8-m.main",
522 .description = "ARMv8mMainline architecture",
523 .dependencies = featureSet(&[_]Feature{
524 .@"8msecext",
525 .acquire_release,
526 .db,
527 .hwdiv,
528 .mclass,
529 .noarm,
530 .thumb_mode,
531 .v8m_main,
532 }),
533 };
534 result[@enumToInt(Feature.armv8_r)] = .{
535 .llvm_name = "armv8-r",
536 .description = "ARMv8r architecture",
537 .dependencies = featureSet(&[_]Feature{
538 .crc,
539 .db,
540 .dfb,
541 .dsp,
542 .fp_armv8,
543 .mp,
544 .neon,
545 .rclass,
546 .v8,
547 .virtualization,
548 }),
549 };
550 result[@enumToInt(Feature.armv8_1_a)] = .{
551 .llvm_name = "armv8.1-a",
552 .description = "ARMv81a architecture",
553 .dependencies = featureSet(&[_]Feature{
554 .aclass,
555 .crc,
556 .crypto,
557 .db,
558 .dsp,
559 .fp_armv8,
560 .mp,
561 .neon,
562 .trustzone,
563 .v8_1a,
564 .virtualization,
565 }),
566 };
567 result[@enumToInt(Feature.armv8_1_m_main)] = .{
568 .llvm_name = "armv8.1-m.main",
569 .description = "ARMv81mMainline architecture",
570 .dependencies = featureSet(&[_]Feature{
571 .@"8msecext",
572 .acquire_release,
573 .db,
574 .hwdiv,
575 .lob,
576 .mclass,
577 .noarm,
578 .ras,
579 .thumb_mode,
580 .v8_1m_main,
581 }),
582 };
583 result[@enumToInt(Feature.armv8_2_a)] = .{
584 .llvm_name = "armv8.2-a",
585 .description = "ARMv82a architecture",
586 .dependencies = featureSet(&[_]Feature{
587 .aclass,
588 .crc,
589 .crypto,
590 .db,
591 .dsp,
592 .fp_armv8,
593 .mp,
594 .neon,
595 .ras,
596 .trustzone,
597 .v8_2a,
598 .virtualization,
599 }),
600 };
601 result[@enumToInt(Feature.armv8_3_a)] = .{
602 .llvm_name = "armv8.3-a",
603 .description = "ARMv83a architecture",
604 .dependencies = featureSet(&[_]Feature{
605 .aclass,
606 .crc,
607 .crypto,
608 .db,
609 .dsp,
610 .fp_armv8,
611 .mp,
612 .neon,
613 .ras,
614 .trustzone,
615 .v8_3a,
616 .virtualization,
617 }),
618 };
619 result[@enumToInt(Feature.armv8_4_a)] = .{
620 .llvm_name = "armv8.4-a",
621 .description = "ARMv84a architecture",
622 .dependencies = featureSet(&[_]Feature{
623 .aclass,
624 .crc,
625 .crypto,
626 .db,
627 .dotprod,
628 .dsp,
629 .fp_armv8,
630 .mp,
631 .neon,
632 .ras,
633 .trustzone,
634 .v8_4a,
635 .virtualization,
636 }),
637 };
638 result[@enumToInt(Feature.armv8_5_a)] = .{
639 .llvm_name = "armv8.5-a",
640 .description = "ARMv85a architecture",
641 .dependencies = featureSet(&[_]Feature{
642 .aclass,
643 .crc,
644 .crypto,
645 .db,
646 .dotprod,
647 .dsp,
648 .fp_armv8,
649 .mp,
650 .neon,
651 .ras,
652 .trustzone,
653 .v8_5a,
654 .virtualization,
655 }),
656 };
657 result[@enumToInt(Feature.avoid_movs_shop)] = .{
658 .llvm_name = "avoid-movs-shop",
659 .description = "Avoid movs instructions with shifter operand",
660 .dependencies = featureSet(&[_]Feature{}),
661 };
662 result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
663 .llvm_name = "avoid-partial-cpsr",
664 .description = "Avoid CPSR partial update for OOO execution",
665 .dependencies = featureSet(&[_]Feature{}),
666 };
667 result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
668 .llvm_name = "cheap-predicable-cpsr",
669 .description = "Disable +1 predication cost for instructions updating CPSR",
670 .dependencies = featureSet(&[_]Feature{}),
671 };
672 result[@enumToInt(Feature.crc)] = .{
673 .llvm_name = "crc",
674 .description = "Enable support for CRC instructions",
675 .dependencies = featureSet(&[_]Feature{}),
676 };
677 result[@enumToInt(Feature.crypto)] = .{
678 .llvm_name = "crypto",
679 .description = "Enable support for Cryptography extensions",
680 .dependencies = featureSet(&[_]Feature{
681 .aes,
682 .neon,
683 .sha2,
684 }),
685 };
686 result[@enumToInt(Feature.d32)] = .{
687 .llvm_name = "d32",
688 .description = "Extend FP to 32 double registers",
689 .dependencies = featureSet(&[_]Feature{}),
690 };
691 result[@enumToInt(Feature.db)] = .{
692 .llvm_name = "db",
693 .description = "Has data barrier (dmb/dsb) instructions",
694 .dependencies = featureSet(&[_]Feature{}),
695 };
696 result[@enumToInt(Feature.dfb)] = .{
697 .llvm_name = "dfb",
698 .description = "Has full data barrier (dfb) instruction",
699 .dependencies = featureSet(&[_]Feature{}),
700 };
701 result[@enumToInt(Feature.disable_postra_scheduler)] = .{
702 .llvm_name = "disable-postra-scheduler",
703 .description = "Don't schedule again after register allocation",
704 .dependencies = featureSet(&[_]Feature{}),
705 };
706 result[@enumToInt(Feature.dont_widen_vmovs)] = .{
707 .llvm_name = "dont-widen-vmovs",
708 .description = "Don't widen VMOVS to VMOVD",
709 .dependencies = featureSet(&[_]Feature{}),
710 };
711 result[@enumToInt(Feature.dotprod)] = .{
712 .llvm_name = "dotprod",
713 .description = "Enable support for dot product instructions",
714 .dependencies = featureSet(&[_]Feature{
715 .neon,
716 }),
717 };
718 result[@enumToInt(Feature.dsp)] = .{
719 .llvm_name = "dsp",
720 .description = "Supports DSP instructions in ARM and/or Thumb2",
721 .dependencies = featureSet(&[_]Feature{}),
722 };
723 result[@enumToInt(Feature.execute_only)] = .{
724 .llvm_name = "execute-only",
725 .description = "Enable the generation of execute only code.",
726 .dependencies = featureSet(&[_]Feature{}),
727 };
728 result[@enumToInt(Feature.expand_fp_mlx)] = .{
729 .llvm_name = "expand-fp-mlx",
730 .description = "Expand VFP/NEON MLA/MLS instructions",
731 .dependencies = featureSet(&[_]Feature{}),
732 };
733 result[@enumToInt(Feature.exynos)] = .{
734 .llvm_name = "exynos",
735 .description = "Samsung Exynos processors",
736 .dependencies = featureSet(&[_]Feature{
737 .crc,
738 .crypto,
739 .expand_fp_mlx,
740 .fuse_aes,
741 .fuse_literals,
742 .hwdiv,
743 .hwdiv_arm,
744 .prof_unpr,
745 .ret_addr_stack,
746 .slow_fp_brcc,
747 .slow_vdup32,
748 .slow_vgetlni32,
749 .slowfpvmlx,
750 .splat_vfp_neon,
751 .use_aa,
752 .wide_stride_vfp,
753 .zcz,
754 }),
755 };
756 result[@enumToInt(Feature.fp_armv8)] = .{
757 .llvm_name = "fp-armv8",
758 .description = "Enable ARMv8 FP",
759 .dependencies = featureSet(&[_]Feature{
760 .fp_armv8d16,
761 .fp_armv8sp,
762 .vfp4,
763 }),
764 };
765 result[@enumToInt(Feature.fp_armv8d16)] = .{
766 .llvm_name = "fp-armv8d16",
767 .description = "Enable ARMv8 FP with only 16 d-registers",
768 .dependencies = featureSet(&[_]Feature{
769 .fp_armv8d16sp,
770 .fp64,
771 .vfp4d16,
772 }),
773 };
774 result[@enumToInt(Feature.fp_armv8d16sp)] = .{
775 .llvm_name = "fp-armv8d16sp",
776 .description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
777 .dependencies = featureSet(&[_]Feature{
778 .vfp4d16sp,
779 }),
780 };
781 result[@enumToInt(Feature.fp_armv8sp)] = .{
782 .llvm_name = "fp-armv8sp",
783 .description = "Enable ARMv8 FP with no double precision",
784 .dependencies = featureSet(&[_]Feature{
785 .d32,
786 .fp_armv8d16sp,
787 .vfp4sp,
788 }),
789 };
790 result[@enumToInt(Feature.fp16)] = .{
791 .llvm_name = "fp16",
792 .description = "Enable half-precision floating point",
793 .dependencies = featureSet(&[_]Feature{}),
794 };
795 result[@enumToInt(Feature.fp16fml)] = .{
796 .llvm_name = "fp16fml",
797 .description = "Enable full half-precision floating point fml instructions",
798 .dependencies = featureSet(&[_]Feature{
799 .fullfp16,
800 }),
801 };
802 result[@enumToInt(Feature.fp64)] = .{
803 .llvm_name = "fp64",
804 .description = "Floating point unit supports double precision",
805 .dependencies = featureSet(&[_]Feature{
806 .fpregs64,
807 }),
808 };
809 result[@enumToInt(Feature.fpao)] = .{
810 .llvm_name = "fpao",
811 .description = "Enable fast computation of positive address offsets",
812 .dependencies = featureSet(&[_]Feature{}),
813 };
814 result[@enumToInt(Feature.fpregs)] = .{
815 .llvm_name = "fpregs",
816 .description = "Enable FP registers",
817 .dependencies = featureSet(&[_]Feature{}),
818 };
819 result[@enumToInt(Feature.fpregs16)] = .{
820 .llvm_name = "fpregs16",
821 .description = "Enable 16-bit FP registers",
822 .dependencies = featureSet(&[_]Feature{
823 .fpregs,
824 }),
825 };
826 result[@enumToInt(Feature.fpregs64)] = .{
827 .llvm_name = "fpregs64",
828 .description = "Enable 64-bit FP registers",
829 .dependencies = featureSet(&[_]Feature{
830 .fpregs,
831 }),
832 };
833 result[@enumToInt(Feature.fullfp16)] = .{
834 .llvm_name = "fullfp16",
835 .description = "Enable full half-precision floating point",
836 .dependencies = featureSet(&[_]Feature{
837 .fp_armv8d16sp,
838 .fpregs16,
839 }),
840 };
841 result[@enumToInt(Feature.fuse_aes)] = .{
842 .llvm_name = "fuse-aes",
843 .description = "CPU fuses AES crypto operations",
844 .dependencies = featureSet(&[_]Feature{}),
845 };
846 result[@enumToInt(Feature.fuse_literals)] = .{
847 .llvm_name = "fuse-literals",
848 .description = "CPU fuses literal generation operations",
849 .dependencies = featureSet(&[_]Feature{}),
850 };
851 result[@enumToInt(Feature.hwdiv)] = .{
852 .llvm_name = "hwdiv",
853 .description = "Enable divide instructions in Thumb",
854 .dependencies = featureSet(&[_]Feature{}),
855 };
856 result[@enumToInt(Feature.hwdiv_arm)] = .{
857 .llvm_name = "hwdiv-arm",
858 .description = "Enable divide instructions in ARM mode",
859 .dependencies = featureSet(&[_]Feature{}),
860 };
861 result[@enumToInt(Feature.iwmmxt)] = .{
862 .llvm_name = "iwmmxt",
863 .description = "ARMv5te architecture",
864 .dependencies = featureSet(&[_]Feature{
865 .armv5te,
866 }),
867 };
868 result[@enumToInt(Feature.iwmmxt2)] = .{
869 .llvm_name = "iwmmxt2",
870 .description = "ARMv5te architecture",
871 .dependencies = featureSet(&[_]Feature{
872 .armv5te,
873 }),
874 };
875 result[@enumToInt(Feature.krait)] = .{
876 .llvm_name = "krait",
877 .description = "Qualcomm Krait processors",
878 .dependencies = featureSet(&[_]Feature{}),
879 };
880 result[@enumToInt(Feature.kryo)] = .{
881 .llvm_name = "kryo",
882 .description = "Qualcomm Kryo processors",
883 .dependencies = featureSet(&[_]Feature{}),
884 };
885 result[@enumToInt(Feature.lob)] = .{
886 .llvm_name = "lob",
887 .description = "Enable Low Overhead Branch extensions",
888 .dependencies = featureSet(&[_]Feature{}),
889 };
890 result[@enumToInt(Feature.long_calls)] = .{
891 .llvm_name = "long-calls",
892 .description = "Generate calls via indirect call instructions",
893 .dependencies = featureSet(&[_]Feature{}),
894 };
895 result[@enumToInt(Feature.loop_align)] = .{
896 .llvm_name = "loop-align",
897 .description = "Prefer 32-bit alignment for loops",
898 .dependencies = featureSet(&[_]Feature{}),
899 };
900 result[@enumToInt(Feature.m3)] = .{
901 .llvm_name = "m3",
902 .description = "Cortex-M3 ARM processors",
903 .dependencies = featureSet(&[_]Feature{}),
904 };
905 result[@enumToInt(Feature.mclass)] = .{
906 .llvm_name = "mclass",
907 .description = "Is microcontroller profile ('M' series)",
908 .dependencies = featureSet(&[_]Feature{}),
909 };
910 result[@enumToInt(Feature.mp)] = .{
911 .llvm_name = "mp",
912 .description = "Supports Multiprocessing extension",
913 .dependencies = featureSet(&[_]Feature{}),
914 };
915 result[@enumToInt(Feature.muxed_units)] = .{
916 .llvm_name = "muxed-units",
917 .description = "Has muxed AGU and NEON/FPU",
918 .dependencies = featureSet(&[_]Feature{}),
919 };
920 result[@enumToInt(Feature.mve)] = .{
921 .llvm_name = "mve",
922 .description = "Support M-Class Vector Extension with integer ops",
923 .dependencies = featureSet(&[_]Feature{
924 .dsp,
925 .fpregs16,
926 .fpregs64,
927 .v8_1m_main,
928 }),
929 };
930 result[@enumToInt(Feature.mve_fp)] = .{
931 .llvm_name = "mve.fp",
932 .description = "Support M-Class Vector Extension with integer and floating ops",
933 .dependencies = featureSet(&[_]Feature{
934 .fp_armv8d16sp,
935 .fullfp16,
936 .mve,
937 }),
938 };
939 result[@enumToInt(Feature.nacl_trap)] = .{
940 .llvm_name = "nacl-trap",
941 .description = "NaCl trap",
942 .dependencies = featureSet(&[_]Feature{}),
943 };
944 result[@enumToInt(Feature.neon)] = .{
945 .llvm_name = "neon",
946 .description = "Enable NEON instructions",
947 .dependencies = featureSet(&[_]Feature{
948 .vfp3,
949 }),
950 };
951 result[@enumToInt(Feature.neon_fpmovs)] = .{
952 .llvm_name = "neon-fpmovs",
953 .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
954 .dependencies = featureSet(&[_]Feature{}),
955 };
956 result[@enumToInt(Feature.neonfp)] = .{
957 .llvm_name = "neonfp",
958 .description = "Use NEON for single precision FP",
959 .dependencies = featureSet(&[_]Feature{}),
960 };
961 result[@enumToInt(Feature.no_branch_predictor)] = .{
962 .llvm_name = "no-branch-predictor",
963 .description = "Has no branch predictor",
964 .dependencies = featureSet(&[_]Feature{}),
965 };
966 result[@enumToInt(Feature.no_movt)] = .{
967 .llvm_name = "no-movt",
968 .description = "Don't use movt/movw pairs for 32-bit imms",
969 .dependencies = featureSet(&[_]Feature{}),
970 };
971 result[@enumToInt(Feature.no_neg_immediates)] = .{
972 .llvm_name = "no-neg-immediates",
973 .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
974 .dependencies = featureSet(&[_]Feature{}),
975 };
976 result[@enumToInt(Feature.noarm)] = .{
977 .llvm_name = "noarm",
978 .description = "Does not support ARM mode execution",
979 .dependencies = featureSet(&[_]Feature{}),
980 };
981 result[@enumToInt(Feature.nonpipelined_vfp)] = .{
982 .llvm_name = "nonpipelined-vfp",
983 .description = "VFP instructions are not pipelined",
984 .dependencies = featureSet(&[_]Feature{}),
985 };
986 result[@enumToInt(Feature.perfmon)] = .{
987 .llvm_name = "perfmon",
988 .description = "Enable support for Performance Monitor extensions",
989 .dependencies = featureSet(&[_]Feature{}),
990 };
991 result[@enumToInt(Feature.prefer_ishst)] = .{
992 .llvm_name = "prefer-ishst",
993 .description = "Prefer ISHST barriers",
994 .dependencies = featureSet(&[_]Feature{}),
995 };
996 result[@enumToInt(Feature.prefer_vmovsr)] = .{
997 .llvm_name = "prefer-vmovsr",
998 .description = "Prefer VMOVSR",
999 .dependencies = featureSet(&[_]Feature{}),
1000 };
1001 result[@enumToInt(Feature.prof_unpr)] = .{
1002 .llvm_name = "prof-unpr",
1003 .description = "Is profitable to unpredicate",
1004 .dependencies = featureSet(&[_]Feature{}),
1005 };
1006 result[@enumToInt(Feature.r4)] = .{
1007 .llvm_name = "r4",
1008 .description = "Cortex-R4 ARM processors",
1009 .dependencies = featureSet(&[_]Feature{}),
1010 };
1011 result[@enumToInt(Feature.r5)] = .{
1012 .llvm_name = "r5",
1013 .description = "Cortex-R5 ARM processors",
1014 .dependencies = featureSet(&[_]Feature{}),
1015 };
1016 result[@enumToInt(Feature.r52)] = .{
1017 .llvm_name = "r52",
1018 .description = "Cortex-R52 ARM processors",
1019 .dependencies = featureSet(&[_]Feature{}),
1020 };
1021 result[@enumToInt(Feature.r7)] = .{
1022 .llvm_name = "r7",
1023 .description = "Cortex-R7 ARM processors",
1024 .dependencies = featureSet(&[_]Feature{}),
1025 };
1026 result[@enumToInt(Feature.ras)] = .{
1027 .llvm_name = "ras",
1028 .description = "Enable Reliability, Availability and Serviceability extensions",
1029 .dependencies = featureSet(&[_]Feature{}),
1030 };
1031 result[@enumToInt(Feature.rclass)] = .{
1032 .llvm_name = "rclass",
1033 .description = "Is realtime profile ('R' series)",
1034 .dependencies = featureSet(&[_]Feature{}),
1035 };
1036 result[@enumToInt(Feature.read_tp_hard)] = .{
1037 .llvm_name = "read-tp-hard",
1038 .description = "Reading thread pointer from register",
1039 .dependencies = featureSet(&[_]Feature{}),
1040 };
1041 result[@enumToInt(Feature.reserve_r9)] = .{
1042 .llvm_name = "reserve-r9",
1043 .description = "Reserve R9, making it unavailable as GPR",
1044 .dependencies = featureSet(&[_]Feature{}),
1045 };
1046 result[@enumToInt(Feature.ret_addr_stack)] = .{
1047 .llvm_name = "ret-addr-stack",
1048 .description = "Has return address stack",
1049 .dependencies = featureSet(&[_]Feature{}),
1050 };
1051 result[@enumToInt(Feature.sb)] = .{
1052 .llvm_name = "sb",
1053 .description = "Enable v8.5a Speculation Barrier",
1054 .dependencies = featureSet(&[_]Feature{}),
1055 };
1056 result[@enumToInt(Feature.sha2)] = .{
1057 .llvm_name = "sha2",
1058 .description = "Enable SHA1 and SHA256 support",
1059 .dependencies = featureSet(&[_]Feature{
1060 .neon,
1061 }),
1062 };
1063 result[@enumToInt(Feature.slow_fp_brcc)] = .{
1064 .llvm_name = "slow-fp-brcc",
1065 .description = "FP compare + branch is slow",
1066 .dependencies = featureSet(&[_]Feature{}),
1067 };
1068 result[@enumToInt(Feature.slow_load_D_subreg)] = .{
1069 .llvm_name = "slow-load-D-subreg",
1070 .description = "Loading into D subregs is slow",
1071 .dependencies = featureSet(&[_]Feature{}),
1072 };
1073 result[@enumToInt(Feature.slow_odd_reg)] = .{
1074 .llvm_name = "slow-odd-reg",
1075 .description = "VLDM/VSTM starting with an odd register is slow",
1076 .dependencies = featureSet(&[_]Feature{}),
1077 };
1078 result[@enumToInt(Feature.slow_vdup32)] = .{
1079 .llvm_name = "slow-vdup32",
1080 .description = "Has slow VDUP32 - prefer VMOV",
1081 .dependencies = featureSet(&[_]Feature{}),
1082 };
1083 result[@enumToInt(Feature.slow_vgetlni32)] = .{
1084 .llvm_name = "slow-vgetlni32",
1085 .description = "Has slow VGETLNi32 - prefer VMOV",
1086 .dependencies = featureSet(&[_]Feature{}),
1087 };
1088 result[@enumToInt(Feature.slowfpvmlx)] = .{
1089 .llvm_name = "slowfpvmlx",
1090 .description = "Disable VFP / NEON MAC instructions",
1091 .dependencies = featureSet(&[_]Feature{}),
1092 };
1093 result[@enumToInt(Feature.soft_float)] = .{
1094 .llvm_name = "soft-float",
1095 .description = "Use software floating point features.",
1096 .dependencies = featureSet(&[_]Feature{}),
1097 };
1098 result[@enumToInt(Feature.splat_vfp_neon)] = .{
1099 .llvm_name = "splat-vfp-neon",
1100 .description = "Splat register from VFP to NEON",
1101 .dependencies = featureSet(&[_]Feature{
1102 .dont_widen_vmovs,
1103 }),
1104 };
1105 result[@enumToInt(Feature.strict_align)] = .{
1106 .llvm_name = "strict-align",
1107 .description = "Disallow all unaligned memory access",
1108 .dependencies = featureSet(&[_]Feature{}),
1109 };
1110 result[@enumToInt(Feature.swift)] = .{
1111 .llvm_name = "swift",
1112 .description = "Swift ARM processors",
1113 .dependencies = featureSet(&[_]Feature{}),
1114 };
1115 result[@enumToInt(Feature.thumb_mode)] = .{
1116 .llvm_name = "thumb-mode",
1117 .description = "Thumb mode",
1118 .dependencies = featureSet(&[_]Feature{}),
1119 };
1120 result[@enumToInt(Feature.thumb2)] = .{
1121 .llvm_name = "thumb2",
1122 .description = "Enable Thumb2 instructions",
1123 .dependencies = featureSet(&[_]Feature{}),
1124 };
1125 result[@enumToInt(Feature.trustzone)] = .{
1126 .llvm_name = "trustzone",
1127 .description = "Enable support for TrustZone security extensions",
1128 .dependencies = featureSet(&[_]Feature{}),
1129 };
1130 result[@enumToInt(Feature.use_aa)] = .{
1131 .llvm_name = "use-aa",
1132 .description = "Use alias analysis during codegen",
1133 .dependencies = featureSet(&[_]Feature{}),
1134 };
1135 result[@enumToInt(Feature.use_misched)] = .{
1136 .llvm_name = "use-misched",
1137 .description = "Use the MachineScheduler",
1138 .dependencies = featureSet(&[_]Feature{}),
1139 };
1140 result[@enumToInt(Feature.v4t)] = .{
1141 .llvm_name = "v4t",
1142 .description = "Support ARM v4T instructions",
1143 .dependencies = featureSet(&[_]Feature{}),
1144 };
1145 result[@enumToInt(Feature.v5t)] = .{
1146 .llvm_name = "v5t",
1147 .description = "Support ARM v5T instructions",
1148 .dependencies = featureSet(&[_]Feature{
1149 .v4t,
1150 }),
1151 };
1152 result[@enumToInt(Feature.v5te)] = .{
1153 .llvm_name = "v5te",
1154 .description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
1155 .dependencies = featureSet(&[_]Feature{
1156 .v5t,
1157 }),
1158 };
1159 result[@enumToInt(Feature.v6)] = .{
1160 .llvm_name = "v6",
1161 .description = "Support ARM v6 instructions",
1162 .dependencies = featureSet(&[_]Feature{
1163 .v5te,
1164 }),
1165 };
1166 result[@enumToInt(Feature.v6k)] = .{
1167 .llvm_name = "v6k",
1168 .description = "Support ARM v6k instructions",
1169 .dependencies = featureSet(&[_]Feature{
1170 .v6,
1171 }),
1172 };
1173 result[@enumToInt(Feature.v6m)] = .{
1174 .llvm_name = "v6m",
1175 .description = "Support ARM v6M instructions",
1176 .dependencies = featureSet(&[_]Feature{
1177 .v6,
1178 }),
1179 };
1180 result[@enumToInt(Feature.v6t2)] = .{
1181 .llvm_name = "v6t2",
1182 .description = "Support ARM v6t2 instructions",
1183 .dependencies = featureSet(&[_]Feature{
1184 .thumb2,
1185 .v6k,
1186 .v8m,
1187 }),
1188 };
1189 result[@enumToInt(Feature.v7)] = .{
1190 .llvm_name = "v7",
1191 .description = "Support ARM v7 instructions",
1192 .dependencies = featureSet(&[_]Feature{
1193 .perfmon,
1194 .v6t2,
1195 .v7clrex,
1196 }),
1197 };
1198 result[@enumToInt(Feature.v7clrex)] = .{
1199 .llvm_name = "v7clrex",
1200 .description = "Has v7 clrex instruction",
1201 .dependencies = featureSet(&[_]Feature{}),
1202 };
1203 result[@enumToInt(Feature.v8)] = .{
1204 .llvm_name = "v8",
1205 .description = "Support ARM v8 instructions",
1206 .dependencies = featureSet(&[_]Feature{
1207 .acquire_release,
1208 .v7,
1209 }),
1210 };
1211 result[@enumToInt(Feature.v8_1a)] = .{
1212 .llvm_name = "v8.1a",
1213 .description = "Support ARM v8.1a instructions",
1214 .dependencies = featureSet(&[_]Feature{
1215 .v8,
1216 }),
1217 };
1218 result[@enumToInt(Feature.v8_1m_main)] = .{
1219 .llvm_name = "v8.1m.main",
1220 .description = "Support ARM v8-1M Mainline instructions",
1221 .dependencies = featureSet(&[_]Feature{
1222 .v8m_main,
1223 }),
1224 };
1225 result[@enumToInt(Feature.v8_2a)] = .{
1226 .llvm_name = "v8.2a",
1227 .description = "Support ARM v8.2a instructions",
1228 .dependencies = featureSet(&[_]Feature{
1229 .v8_1a,
1230 }),
1231 };
1232 result[@enumToInt(Feature.v8_3a)] = .{
1233 .llvm_name = "v8.3a",
1234 .description = "Support ARM v8.3a instructions",
1235 .dependencies = featureSet(&[_]Feature{
1236 .v8_2a,
1237 }),
1238 };
1239 result[@enumToInt(Feature.v8_4a)] = .{
1240 .llvm_name = "v8.4a",
1241 .description = "Support ARM v8.4a instructions",
1242 .dependencies = featureSet(&[_]Feature{
1243 .dotprod,
1244 .v8_3a,
1245 }),
1246 };
1247 result[@enumToInt(Feature.v8_5a)] = .{
1248 .llvm_name = "v8.5a",
1249 .description = "Support ARM v8.5a instructions",
1250 .dependencies = featureSet(&[_]Feature{
1251 .sb,
1252 .v8_4a,
1253 }),
1254 };
1255 result[@enumToInt(Feature.v8m)] = .{
1256 .llvm_name = "v8m",
1257 .description = "Support ARM v8M Baseline instructions",
1258 .dependencies = featureSet(&[_]Feature{
1259 .v6m,
1260 }),
1261 };
1262 result[@enumToInt(Feature.v8m_main)] = .{
1263 .llvm_name = "v8m.main",
1264 .description = "Support ARM v8M Mainline instructions",
1265 .dependencies = featureSet(&[_]Feature{
1266 .v7,
1267 }),
1268 };
1269 result[@enumToInt(Feature.vfp2)] = .{
1270 .llvm_name = "vfp2",
1271 .description = "Enable VFP2 instructions",
1272 .dependencies = featureSet(&[_]Feature{
1273 .vfp2d16,
1274 .vfp2sp,
1275 }),
1276 };
1277 result[@enumToInt(Feature.vfp2d16)] = .{
1278 .llvm_name = "vfp2d16",
1279 .description = "Enable VFP2 instructions",
1280 .dependencies = featureSet(&[_]Feature{
1281 .fp64,
1282 .vfp2d16sp,
1283 }),
1284 };
1285 result[@enumToInt(Feature.vfp2d16sp)] = .{
1286 .llvm_name = "vfp2d16sp",
1287 .description = "Enable VFP2 instructions with no double precision",
1288 .dependencies = featureSet(&[_]Feature{
1289 .fpregs,
1290 }),
1291 };
1292 result[@enumToInt(Feature.vfp2sp)] = .{
1293 .llvm_name = "vfp2sp",
1294 .description = "Enable VFP2 instructions with no double precision",
1295 .dependencies = featureSet(&[_]Feature{
1296 .vfp2d16sp,
1297 }),
1298 };
1299 result[@enumToInt(Feature.vfp3)] = .{
1300 .llvm_name = "vfp3",
1301 .description = "Enable VFP3 instructions",
1302 .dependencies = featureSet(&[_]Feature{
1303 .vfp3d16,
1304 .vfp3sp,
1305 }),
1306 };
1307 result[@enumToInt(Feature.vfp3d16)] = .{
1308 .llvm_name = "vfp3d16",
1309 .description = "Enable VFP3 instructions with only 16 d-registers",
1310 .dependencies = featureSet(&[_]Feature{
1311 .fp64,
1312 .vfp2,
1313 .vfp3d16sp,
1314 }),
1315 };
1316 result[@enumToInt(Feature.vfp3d16sp)] = .{
1317 .llvm_name = "vfp3d16sp",
1318 .description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
1319 .dependencies = featureSet(&[_]Feature{
1320 .vfp2sp,
1321 }),
1322 };
1323 result[@enumToInt(Feature.vfp3sp)] = .{
1324 .llvm_name = "vfp3sp",
1325 .description = "Enable VFP3 instructions with no double precision",
1326 .dependencies = featureSet(&[_]Feature{
1327 .d32,
1328 .vfp3d16sp,
1329 }),
1330 };
1331 result[@enumToInt(Feature.vfp4)] = .{
1332 .llvm_name = "vfp4",
1333 .description = "Enable VFP4 instructions",
1334 .dependencies = featureSet(&[_]Feature{
1335 .fp16,
1336 .vfp3,
1337 .vfp4d16,
1338 .vfp4sp,
1339 }),
1340 };
1341 result[@enumToInt(Feature.vfp4d16)] = .{
1342 .llvm_name = "vfp4d16",
1343 .description = "Enable VFP4 instructions with only 16 d-registers",
1344 .dependencies = featureSet(&[_]Feature{
1345 .fp16,
1346 .fp64,
1347 .vfp3d16,
1348 .vfp4d16sp,
1349 }),
1350 };
1351 result[@enumToInt(Feature.vfp4d16sp)] = .{
1352 .llvm_name = "vfp4d16sp",
1353 .description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
1354 .dependencies = featureSet(&[_]Feature{
1355 .fp16,
1356 .vfp3d16sp,
1357 }),
1358 };
1359 result[@enumToInt(Feature.vfp4sp)] = .{
1360 .llvm_name = "vfp4sp",
1361 .description = "Enable VFP4 instructions with no double precision",
1362 .dependencies = featureSet(&[_]Feature{
1363 .d32,
1364 .fp16,
1365 .vfp3sp,
1366 .vfp4d16sp,
1367 }),
1368 };
1369 result[@enumToInt(Feature.virtualization)] = .{
1370 .llvm_name = "virtualization",
1371 .description = "Supports Virtualization extension",
1372 .dependencies = featureSet(&[_]Feature{
1373 .hwdiv,
1374 .hwdiv_arm,
1375 }),
1376 };
1377 result[@enumToInt(Feature.vldn_align)] = .{
1378 .llvm_name = "vldn-align",
1379 .description = "Check for VLDn unaligned access",
1380 .dependencies = featureSet(&[_]Feature{}),
1381 };
1382 result[@enumToInt(Feature.vmlx_forwarding)] = .{
1383 .llvm_name = "vmlx-forwarding",
1384 .description = "Has multiplier accumulator forwarding",
1385 .dependencies = featureSet(&[_]Feature{}),
1386 };
1387 result[@enumToInt(Feature.vmlx_hazards)] = .{
1388 .llvm_name = "vmlx-hazards",
1389 .description = "Has VMLx hazards",
1390 .dependencies = featureSet(&[_]Feature{}),
1391 };
1392 result[@enumToInt(Feature.wide_stride_vfp)] = .{
1393 .llvm_name = "wide-stride-vfp",
1394 .description = "Use a wide stride when allocating VFP registers",
1395 .dependencies = featureSet(&[_]Feature{}),
1396 };
1397 result[@enumToInt(Feature.xscale)] = .{
1398 .llvm_name = "xscale",
1399 .description = "ARMv5te architecture",
1400 .dependencies = featureSet(&[_]Feature{
1401 .armv5te,
1402 }),
1403 };
1404 result[@enumToInt(Feature.zcz)] = .{
1405 .llvm_name = "zcz",
1406 .description = "Has zero-cycle zeroing instructions",
1407 .dependencies = featureSet(&[_]Feature{}),
1408 };
1409 const ti = @typeInfo(Feature);
1410 for (result) |*elem, i| {
1411 elem.index = i;
1412 elem.name = ti.Enum.fields[i].name;
1413 }
1414 break :blk result;
1415};
1416
1417pub const cpu = struct {
1418 pub const arm1020e = Cpu{
1419 .name = "arm1020e",
1420 .llvm_name = "arm1020e",
1421 .features = featureSet(&[_]Feature{
1422 .armv5te,
1423 }),
1424 };
1425 pub const arm1020t = Cpu{
1426 .name = "arm1020t",
1427 .llvm_name = "arm1020t",
1428 .features = featureSet(&[_]Feature{
1429 .armv5t,
1430 }),
1431 };
1432 pub const arm1022e = Cpu{
1433 .name = "arm1022e",
1434 .llvm_name = "arm1022e",
1435 .features = featureSet(&[_]Feature{
1436 .armv5te,
1437 }),
1438 };
1439 pub const arm10e = Cpu{
1440 .name = "arm10e",
1441 .llvm_name = "arm10e",
1442 .features = featureSet(&[_]Feature{
1443 .armv5te,
1444 }),
1445 };
1446 pub const arm10tdmi = Cpu{
1447 .name = "arm10tdmi",
1448 .llvm_name = "arm10tdmi",
1449 .features = featureSet(&[_]Feature{
1450 .armv5t,
1451 }),
1452 };
1453 pub const arm1136j_s = Cpu{
1454 .name = "arm1136j_s",
1455 .llvm_name = "arm1136j-s",
1456 .features = featureSet(&[_]Feature{
1457 .armv6,
1458 }),
1459 };
1460 pub const arm1136jf_s = Cpu{
1461 .name = "arm1136jf_s",
1462 .llvm_name = "arm1136jf-s",
1463 .features = featureSet(&[_]Feature{
1464 .armv6,
1465 .slowfpvmlx,
1466 .vfp2,
1467 }),
1468 };
1469 pub const arm1156t2_s = Cpu{
1470 .name = "arm1156t2_s",
1471 .llvm_name = "arm1156t2-s",
1472 .features = featureSet(&[_]Feature{
1473 .armv6t2,
1474 }),
1475 };
1476 pub const arm1156t2f_s = Cpu{
1477 .name = "arm1156t2f_s",
1478 .llvm_name = "arm1156t2f-s",
1479 .features = featureSet(&[_]Feature{
1480 .armv6t2,
1481 .slowfpvmlx,
1482 .vfp2,
1483 }),
1484 };
1485 pub const arm1176j_s = Cpu{
1486 .name = "arm1176j_s",
1487 .llvm_name = "arm1176j-s",
1488 .features = featureSet(&[_]Feature{
1489 .armv6kz,
1490 }),
1491 };
1492 pub const arm1176jz_s = Cpu{
1493 .name = "arm1176jz_s",
1494 .llvm_name = "arm1176jz-s",
1495 .features = featureSet(&[_]Feature{
1496 .armv6kz,
1497 }),
1498 };
1499 pub const arm1176jzf_s = Cpu{
1500 .name = "arm1176jzf_s",
1501 .llvm_name = "arm1176jzf-s",
1502 .features = featureSet(&[_]Feature{
1503 .armv6kz,
1504 .slowfpvmlx,
1505 .vfp2,
1506 }),
1507 };
1508 pub const arm710t = Cpu{
1509 .name = "arm710t",
1510 .llvm_name = "arm710t",
1511 .features = featureSet(&[_]Feature{
1512 .armv4t,
1513 }),
1514 };
1515 pub const arm720t = Cpu{
1516 .name = "arm720t",
1517 .llvm_name = "arm720t",
1518 .features = featureSet(&[_]Feature{
1519 .armv4t,
1520 }),
1521 };
1522 pub const arm7tdmi = Cpu{
1523 .name = "arm7tdmi",
1524 .llvm_name = "arm7tdmi",
1525 .features = featureSet(&[_]Feature{
1526 .armv4t,
1527 }),
1528 };
1529 pub const arm7tdmi_s = Cpu{
1530 .name = "arm7tdmi_s",
1531 .llvm_name = "arm7tdmi-s",
1532 .features = featureSet(&[_]Feature{
1533 .armv4t,
1534 }),
1535 };
1536 pub const arm8 = Cpu{
1537 .name = "arm8",
1538 .llvm_name = "arm8",
1539 .features = featureSet(&[_]Feature{
1540 .armv4,
1541 }),
1542 };
1543 pub const arm810 = Cpu{
1544 .name = "arm810",
1545 .llvm_name = "arm810",
1546 .features = featureSet(&[_]Feature{
1547 .armv4,
1548 }),
1549 };
1550 pub const arm9 = Cpu{
1551 .name = "arm9",
1552 .llvm_name = "arm9",
1553 .features = featureSet(&[_]Feature{
1554 .armv4t,
1555 }),
1556 };
1557 pub const arm920 = Cpu{
1558 .name = "arm920",
1559 .llvm_name = "arm920",
1560 .features = featureSet(&[_]Feature{
1561 .armv4t,
1562 }),
1563 };
1564 pub const arm920t = Cpu{
1565 .name = "arm920t",
1566 .llvm_name = "arm920t",
1567 .features = featureSet(&[_]Feature{
1568 .armv4t,
1569 }),
1570 };
1571 pub const arm922t = Cpu{
1572 .name = "arm922t",
1573 .llvm_name = "arm922t",
1574 .features = featureSet(&[_]Feature{
1575 .armv4t,
1576 }),
1577 };
1578 pub const arm926ej_s = Cpu{
1579 .name = "arm926ej_s",
1580 .llvm_name = "arm926ej-s",
1581 .features = featureSet(&[_]Feature{
1582 .armv5te,
1583 }),
1584 };
1585 pub const arm940t = Cpu{
1586 .name = "arm940t",
1587 .llvm_name = "arm940t",
1588 .features = featureSet(&[_]Feature{
1589 .armv4t,
1590 }),
1591 };
1592 pub const arm946e_s = Cpu{
1593 .name = "arm946e_s",
1594 .llvm_name = "arm946e-s",
1595 .features = featureSet(&[_]Feature{
1596 .armv5te,
1597 }),
1598 };
1599 pub const arm966e_s = Cpu{
1600 .name = "arm966e_s",
1601 .llvm_name = "arm966e-s",
1602 .features = featureSet(&[_]Feature{
1603 .armv5te,
1604 }),
1605 };
1606 pub const arm968e_s = Cpu{
1607 .name = "arm968e_s",
1608 .llvm_name = "arm968e-s",
1609 .features = featureSet(&[_]Feature{
1610 .armv5te,
1611 }),
1612 };
1613 pub const arm9e = Cpu{
1614 .name = "arm9e",
1615 .llvm_name = "arm9e",
1616 .features = featureSet(&[_]Feature{
1617 .armv5te,
1618 }),
1619 };
1620 pub const arm9tdmi = Cpu{
1621 .name = "arm9tdmi",
1622 .llvm_name = "arm9tdmi",
1623 .features = featureSet(&[_]Feature{
1624 .armv4t,
1625 }),
1626 };
1627 pub const cortex_a12 = Cpu{
1628 .name = "cortex_a12",
1629 .llvm_name = "cortex-a12",
1630 .features = featureSet(&[_]Feature{
1631 .a12,
1632 .armv7_a,
1633 .avoid_partial_cpsr,
1634 .mp,
1635 .ret_addr_stack,
1636 .trustzone,
1637 .vfp4,
1638 .virtualization,
1639 .vmlx_forwarding,
1640 }),
1641 };
1642 pub const cortex_a15 = Cpu{
1643 .name = "cortex_a15",
1644 .llvm_name = "cortex-a15",
1645 .features = featureSet(&[_]Feature{
1646 .a15,
1647 .armv7_a,
1648 .avoid_partial_cpsr,
1649 .dont_widen_vmovs,
1650 .mp,
1651 .muxed_units,
1652 .ret_addr_stack,
1653 .splat_vfp_neon,
1654 .trustzone,
1655 .vfp4,
1656 .virtualization,
1657 .vldn_align,
1658 }),
1659 };
1660 pub const cortex_a17 = Cpu{
1661 .name = "cortex_a17",
1662 .llvm_name = "cortex-a17",
1663 .features = featureSet(&[_]Feature{
1664 .a17,
1665 .armv7_a,
1666 .avoid_partial_cpsr,
1667 .mp,
1668 .ret_addr_stack,
1669 .trustzone,
1670 .vfp4,
1671 .virtualization,
1672 .vmlx_forwarding,
1673 }),
1674 };
1675 pub const cortex_a32 = Cpu{
1676 .name = "cortex_a32",
1677 .llvm_name = "cortex-a32",
1678 .features = featureSet(&[_]Feature{
1679 .armv8_a,
1680 .crc,
1681 .crypto,
1682 .hwdiv,
1683 .hwdiv_arm,
1684 }),
1685 };
1686 pub const cortex_a35 = Cpu{
1687 .name = "cortex_a35",
1688 .llvm_name = "cortex-a35",
1689 .features = featureSet(&[_]Feature{
1690 .a35,
1691 .armv8_a,
1692 .crc,
1693 .crypto,
1694 .hwdiv,
1695 .hwdiv_arm,
1696 }),
1697 };
1698 pub const cortex_a5 = Cpu{
1699 .name = "cortex_a5",
1700 .llvm_name = "cortex-a5",
1701 .features = featureSet(&[_]Feature{
1702 .a5,
1703 .armv7_a,
1704 .mp,
1705 .ret_addr_stack,
1706 .slow_fp_brcc,
1707 .slowfpvmlx,
1708 .trustzone,
1709 .vfp4,
1710 .vmlx_forwarding,
1711 }),
1712 };
1713 pub const cortex_a53 = Cpu{
1714 .name = "cortex_a53",
1715 .llvm_name = "cortex-a53",
1716 .features = featureSet(&[_]Feature{
1717 .a53,
1718 .armv8_a,
1719 .crc,
1720 .crypto,
1721 .fpao,
1722 .hwdiv,
1723 .hwdiv_arm,
1724 }),
1725 };
1726 pub const cortex_a55 = Cpu{
1727 .name = "cortex_a55",
1728 .llvm_name = "cortex-a55",
1729 .features = featureSet(&[_]Feature{
1730 .a55,
1731 .armv8_2_a,
1732 .dotprod,
1733 .hwdiv,
1734 .hwdiv_arm,
1735 }),
1736 };
1737 pub const cortex_a57 = Cpu{
1738 .name = "cortex_a57",
1739 .llvm_name = "cortex-a57",
1740 .features = featureSet(&[_]Feature{
1741 .a57,
1742 .armv8_a,
1743 .avoid_partial_cpsr,
1744 .cheap_predicable_cpsr,
1745 .crc,
1746 .crypto,
1747 .fpao,
1748 .hwdiv,
1749 .hwdiv_arm,
1750 }),
1751 };
1752 pub const cortex_a7 = Cpu{
1753 .name = "cortex_a7",
1754 .llvm_name = "cortex-a7",
1755 .features = featureSet(&[_]Feature{
1756 .a7,
1757 .armv7_a,
1758 .mp,
1759 .ret_addr_stack,
1760 .slow_fp_brcc,
1761 .slowfpvmlx,
1762 .trustzone,
1763 .vfp4,
1764 .virtualization,
1765 .vmlx_forwarding,
1766 .vmlx_hazards,
1767 }),
1768 };
1769 pub const cortex_a72 = Cpu{
1770 .name = "cortex_a72",
1771 .llvm_name = "cortex-a72",
1772 .features = featureSet(&[_]Feature{
1773 .a72,
1774 .armv8_a,
1775 .crc,
1776 .crypto,
1777 .hwdiv,
1778 .hwdiv_arm,
1779 }),
1780 };
1781 pub const cortex_a73 = Cpu{
1782 .name = "cortex_a73",
1783 .llvm_name = "cortex-a73",
1784 .features = featureSet(&[_]Feature{
1785 .a73,
1786 .armv8_a,
1787 .crc,
1788 .crypto,
1789 .hwdiv,
1790 .hwdiv_arm,
1791 }),
1792 };
1793 pub const cortex_a75 = Cpu{
1794 .name = "cortex_a75",
1795 .llvm_name = "cortex-a75",
1796 .features = featureSet(&[_]Feature{
1797 .a75,
1798 .armv8_2_a,
1799 .dotprod,
1800 .hwdiv,
1801 .hwdiv_arm,
1802 }),
1803 };
1804 pub const cortex_a76 = Cpu{
1805 .name = "cortex_a76",
1806 .llvm_name = "cortex-a76",
1807 .features = featureSet(&[_]Feature{
1808 .a76,
1809 .armv8_2_a,
1810 .crc,
1811 .crypto,
1812 .dotprod,
1813 .fullfp16,
1814 .hwdiv,
1815 .hwdiv_arm,
1816 }),
1817 };
1818 pub const cortex_a76ae = Cpu{
1819 .name = "cortex_a76ae",
1820 .llvm_name = "cortex-a76ae",
1821 .features = featureSet(&[_]Feature{
1822 .a76,
1823 .armv8_2_a,
1824 .crc,
1825 .crypto,
1826 .dotprod,
1827 .fullfp16,
1828 .hwdiv,
1829 .hwdiv_arm,
1830 }),
1831 };
1832 pub const cortex_a8 = Cpu{
1833 .name = "cortex_a8",
1834 .llvm_name = "cortex-a8",
1835 .features = featureSet(&[_]Feature{
1836 .a8,
1837 .armv7_a,
1838 .nonpipelined_vfp,
1839 .ret_addr_stack,
1840 .slow_fp_brcc,
1841 .slowfpvmlx,
1842 .trustzone,
1843 .vmlx_forwarding,
1844 .vmlx_hazards,
1845 }),
1846 };
1847 pub const cortex_a9 = Cpu{
1848 .name = "cortex_a9",
1849 .llvm_name = "cortex-a9",
1850 .features = featureSet(&[_]Feature{
1851 .a9,
1852 .armv7_a,
1853 .avoid_partial_cpsr,
1854 .expand_fp_mlx,
1855 .fp16,
1856 .mp,
1857 .muxed_units,
1858 .neon_fpmovs,
1859 .prefer_vmovsr,
1860 .ret_addr_stack,
1861 .trustzone,
1862 .vldn_align,
1863 .vmlx_forwarding,
1864 .vmlx_hazards,
1865 }),
1866 };
1867 pub const cortex_m0 = Cpu{
1868 .name = "cortex_m0",
1869 .llvm_name = "cortex-m0",
1870 .features = featureSet(&[_]Feature{
1871 .armv6_m,
1872 }),
1873 };
1874 pub const cortex_m0plus = Cpu{
1875 .name = "cortex_m0plus",
1876 .llvm_name = "cortex-m0plus",
1877 .features = featureSet(&[_]Feature{
1878 .armv6_m,
1879 }),
1880 };
1881 pub const cortex_m1 = Cpu{
1882 .name = "cortex_m1",
1883 .llvm_name = "cortex-m1",
1884 .features = featureSet(&[_]Feature{
1885 .armv6_m,
1886 }),
1887 };
1888 pub const cortex_m23 = Cpu{
1889 .name = "cortex_m23",
1890 .llvm_name = "cortex-m23",
1891 .features = featureSet(&[_]Feature{
1892 .armv8_m_base,
1893 .no_movt,
1894 }),
1895 };
1896 pub const cortex_m3 = Cpu{
1897 .name = "cortex_m3",
1898 .llvm_name = "cortex-m3",
1899 .features = featureSet(&[_]Feature{
1900 .armv7_m,
1901 .loop_align,
1902 .m3,
1903 .no_branch_predictor,
1904 .use_aa,
1905 .use_misched,
1906 }),
1907 };
1908 pub const cortex_m33 = Cpu{
1909 .name = "cortex_m33",
1910 .llvm_name = "cortex-m33",
1911 .features = featureSet(&[_]Feature{
1912 .armv8_m_main,
1913 .dsp,
1914 .fp_armv8d16sp,
1915 .loop_align,
1916 .no_branch_predictor,
1917 .slowfpvmlx,
1918 .use_aa,
1919 .use_misched,
1920 }),
1921 };
1922 pub const cortex_m35p = Cpu{
1923 .name = "cortex_m35p",
1924 .llvm_name = "cortex-m35p",
1925 .features = featureSet(&[_]Feature{
1926 .armv8_m_main,
1927 .dsp,
1928 .fp_armv8d16sp,
1929 .loop_align,
1930 .no_branch_predictor,
1931 .slowfpvmlx,
1932 .use_aa,
1933 .use_misched,
1934 }),
1935 };
1936 pub const cortex_m4 = Cpu{
1937 .name = "cortex_m4",
1938 .llvm_name = "cortex-m4",
1939 .features = featureSet(&[_]Feature{
1940 .armv7e_m,
1941 .loop_align,
1942 .no_branch_predictor,
1943 .slowfpvmlx,
1944 .use_aa,
1945 .use_misched,
1946 .vfp4d16sp,
1947 }),
1948 };
1949 pub const cortex_m7 = Cpu{
1950 .name = "cortex_m7",
1951 .llvm_name = "cortex-m7",
1952 .features = featureSet(&[_]Feature{
1953 .armv7e_m,
1954 .fp_armv8d16,
1955 }),
1956 };
1957 pub const cortex_r4 = Cpu{
1958 .name = "cortex_r4",
1959 .llvm_name = "cortex-r4",
1960 .features = featureSet(&[_]Feature{
1961 .armv7_r,
1962 .avoid_partial_cpsr,
1963 .r4,
1964 .ret_addr_stack,
1965 }),
1966 };
1967 pub const cortex_r4f = Cpu{
1968 .name = "cortex_r4f",
1969 .llvm_name = "cortex-r4f",
1970 .features = featureSet(&[_]Feature{
1971 .armv7_r,
1972 .avoid_partial_cpsr,
1973 .r4,
1974 .ret_addr_stack,
1975 .slow_fp_brcc,
1976 .slowfpvmlx,
1977 .vfp3d16,
1978 }),
1979 };
1980 pub const cortex_r5 = Cpu{
1981 .name = "cortex_r5",
1982 .llvm_name = "cortex-r5",
1983 .features = featureSet(&[_]Feature{
1984 .armv7_r,
1985 .avoid_partial_cpsr,
1986 .hwdiv_arm,
1987 .r5,
1988 .ret_addr_stack,
1989 .slow_fp_brcc,
1990 .slowfpvmlx,
1991 .vfp3d16,
1992 }),
1993 };
1994 pub const cortex_r52 = Cpu{
1995 .name = "cortex_r52",
1996 .llvm_name = "cortex-r52",
1997 .features = featureSet(&[_]Feature{
1998 .armv8_r,
1999 .fpao,
2000 .r52,
2001 .use_aa,
2002 .use_misched,
2003 }),
2004 };
2005 pub const cortex_r7 = Cpu{
2006 .name = "cortex_r7",
2007 .llvm_name = "cortex-r7",
2008 .features = featureSet(&[_]Feature{
2009 .armv7_r,
2010 .avoid_partial_cpsr,
2011 .fp16,
2012 .hwdiv_arm,
2013 .mp,
2014 .r7,
2015 .ret_addr_stack,
2016 .slow_fp_brcc,
2017 .slowfpvmlx,
2018 .vfp3d16,
2019 }),
2020 };
2021 pub const cortex_r8 = Cpu{
2022 .name = "cortex_r8",
2023 .llvm_name = "cortex-r8",
2024 .features = featureSet(&[_]Feature{
2025 .armv7_r,
2026 .avoid_partial_cpsr,
2027 .fp16,
2028 .hwdiv_arm,
2029 .mp,
2030 .ret_addr_stack,
2031 .slow_fp_brcc,
2032 .slowfpvmlx,
2033 .vfp3d16,
2034 }),
2035 };
2036 pub const cyclone = Cpu{
2037 .name = "cyclone",
2038 .llvm_name = "cyclone",
2039 .features = featureSet(&[_]Feature{
2040 .armv8_a,
2041 .avoid_movs_shop,
2042 .avoid_partial_cpsr,
2043 .crypto,
2044 .disable_postra_scheduler,
2045 .hwdiv,
2046 .hwdiv_arm,
2047 .mp,
2048 .neonfp,
2049 .ret_addr_stack,
2050 .slowfpvmlx,
2051 .swift,
2052 .use_misched,
2053 .vfp4,
2054 .zcz,
2055 }),
2056 };
2057 pub const ep9312 = Cpu{
2058 .name = "ep9312",
2059 .llvm_name = "ep9312",
2060 .features = featureSet(&[_]Feature{
2061 .armv4t,
2062 }),
2063 };
2064 pub const exynos_m1 = Cpu{
2065 .name = "exynos_m1",
2066 .llvm_name = "exynos-m1",
2067 .features = featureSet(&[_]Feature{
2068 .armv8_a,
2069 .exynos,
2070 }),
2071 };
2072 pub const exynos_m2 = Cpu{
2073 .name = "exynos_m2",
2074 .llvm_name = "exynos-m2",
2075 .features = featureSet(&[_]Feature{
2076 .armv8_a,
2077 .exynos,
2078 }),
2079 };
2080 pub const exynos_m3 = Cpu{
2081 .name = "exynos_m3",
2082 .llvm_name = "exynos-m3",
2083 .features = featureSet(&[_]Feature{
2084 .armv8_a,
2085 .exynos,
2086 }),
2087 };
2088 pub const exynos_m4 = Cpu{
2089 .name = "exynos_m4",
2090 .llvm_name = "exynos-m4",
2091 .features = featureSet(&[_]Feature{
2092 .armv8_2_a,
2093 .dotprod,
2094 .exynos,
2095 .fullfp16,
2096 }),
2097 };
2098 pub const exynos_m5 = Cpu{
2099 .name = "exynos_m5",
2100 .llvm_name = "exynos-m5",
2101 .features = featureSet(&[_]Feature{
2102 .armv8_2_a,
2103 .dotprod,
2104 .exynos,
2105 .fullfp16,
2106 }),
2107 };
2108 pub const generic = Cpu{
2109 .name = "generic",
2110 .llvm_name = "generic",
2111 .features = featureSet(&[_]Feature{}),
2112 };
2113 pub const iwmmxt = Cpu{
2114 .name = "iwmmxt",
2115 .llvm_name = "iwmmxt",
2116 .features = featureSet(&[_]Feature{
2117 .armv5te,
2118 }),
2119 };
2120 pub const krait = Cpu{
2121 .name = "krait",
2122 .llvm_name = "krait",
2123 .features = featureSet(&[_]Feature{
2124 .armv7_a,
2125 .avoid_partial_cpsr,
2126 .fp16,
2127 .hwdiv,
2128 .hwdiv_arm,
2129 .krait,
2130 .muxed_units,
2131 .ret_addr_stack,
2132 .vfp4,
2133 .vldn_align,
2134 .vmlx_forwarding,
2135 }),
2136 };
2137 pub const kryo = Cpu{
2138 .name = "kryo",
2139 .llvm_name = "kryo",
2140 .features = featureSet(&[_]Feature{
2141 .armv8_a,
2142 .crc,
2143 .crypto,
2144 .hwdiv,
2145 .hwdiv_arm,
2146 .kryo,
2147 }),
2148 };
2149 pub const mpcore = Cpu{
2150 .name = "mpcore",
2151 .llvm_name = "mpcore",
2152 .features = featureSet(&[_]Feature{
2153 .armv6k,
2154 .slowfpvmlx,
2155 .vfp2,
2156 }),
2157 };
2158 pub const mpcorenovfp = Cpu{
2159 .name = "mpcorenovfp",
2160 .llvm_name = "mpcorenovfp",
2161 .features = featureSet(&[_]Feature{
2162 .armv6k,
2163 }),
2164 };
2165 pub const sc000 = Cpu{
2166 .name = "sc000",
2167 .llvm_name = "sc000",
2168 .features = featureSet(&[_]Feature{
2169 .armv6_m,
2170 }),
2171 };
2172 pub const sc300 = Cpu{
2173 .name = "sc300",
2174 .llvm_name = "sc300",
2175 .features = featureSet(&[_]Feature{
2176 .armv7_m,
2177 .m3,
2178 .no_branch_predictor,
2179 .use_aa,
2180 .use_misched,
2181 }),
2182 };
2183 pub const strongarm = Cpu{
2184 .name = "strongarm",
2185 .llvm_name = "strongarm",
2186 .features = featureSet(&[_]Feature{
2187 .armv4,
2188 }),
2189 };
2190 pub const strongarm110 = Cpu{
2191 .name = "strongarm110",
2192 .llvm_name = "strongarm110",
2193 .features = featureSet(&[_]Feature{
2194 .armv4,
2195 }),
2196 };
2197 pub const strongarm1100 = Cpu{
2198 .name = "strongarm1100",
2199 .llvm_name = "strongarm1100",
2200 .features = featureSet(&[_]Feature{
2201 .armv4,
2202 }),
2203 };
2204 pub const strongarm1110 = Cpu{
2205 .name = "strongarm1110",
2206 .llvm_name = "strongarm1110",
2207 .features = featureSet(&[_]Feature{
2208 .armv4,
2209 }),
2210 };
2211 pub const swift = Cpu{
2212 .name = "swift",
2213 .llvm_name = "swift",
2214 .features = featureSet(&[_]Feature{
2215 .armv7_a,
2216 .avoid_movs_shop,
2217 .avoid_partial_cpsr,
2218 .disable_postra_scheduler,
2219 .hwdiv,
2220 .hwdiv_arm,
2221 .mp,
2222 .neonfp,
2223 .prefer_ishst,
2224 .prof_unpr,
2225 .ret_addr_stack,
2226 .slow_load_D_subreg,
2227 .slow_odd_reg,
2228 .slow_vdup32,
2229 .slow_vgetlni32,
2230 .slowfpvmlx,
2231 .swift,
2232 .use_misched,
2233 .vfp4,
2234 .vmlx_hazards,
2235 .wide_stride_vfp,
2236 }),
2237 };
2238 pub const xscale = Cpu{
2239 .name = "xscale",
2240 .llvm_name = "xscale",
2241 .features = featureSet(&[_]Feature{
2242 .armv5te,
2243 }),
2244 };
2245};
2246
2247/// All arm CPUs, sorted alphabetically by name.
2248/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2249/// compiler has inefficient memory and CPU usage, affecting build times.
2250pub const all_cpus = &[_]*const Cpu{
2251 &cpu.arm1020e,
2252 &cpu.arm1020t,
2253 &cpu.arm1022e,
2254 &cpu.arm10e,
2255 &cpu.arm10tdmi,
2256 &cpu.arm1136j_s,
2257 &cpu.arm1136jf_s,
2258 &cpu.arm1156t2_s,
2259 &cpu.arm1156t2f_s,
2260 &cpu.arm1176j_s,
2261 &cpu.arm1176jz_s,
2262 &cpu.arm1176jzf_s,
2263 &cpu.arm710t,
2264 &cpu.arm720t,
2265 &cpu.arm7tdmi,
2266 &cpu.arm7tdmi_s,
2267 &cpu.arm8,
2268 &cpu.arm810,
2269 &cpu.arm9,
2270 &cpu.arm920,
2271 &cpu.arm920t,
2272 &cpu.arm922t,
2273 &cpu.arm926ej_s,
2274 &cpu.arm940t,
2275 &cpu.arm946e_s,
2276 &cpu.arm966e_s,
2277 &cpu.arm968e_s,
2278 &cpu.arm9e,
2279 &cpu.arm9tdmi,
2280 &cpu.cortex_a12,
2281 &cpu.cortex_a15,
2282 &cpu.cortex_a17,
2283 &cpu.cortex_a32,
2284 &cpu.cortex_a35,
2285 &cpu.cortex_a5,
2286 &cpu.cortex_a53,
2287 &cpu.cortex_a55,
2288 &cpu.cortex_a57,
2289 &cpu.cortex_a7,
2290 &cpu.cortex_a72,
2291 &cpu.cortex_a73,
2292 &cpu.cortex_a75,
2293 &cpu.cortex_a76,
2294 &cpu.cortex_a76ae,
2295 &cpu.cortex_a8,
2296 &cpu.cortex_a9,
2297 &cpu.cortex_m0,
2298 &cpu.cortex_m0plus,
2299 &cpu.cortex_m1,
2300 &cpu.cortex_m23,
2301 &cpu.cortex_m3,
2302 &cpu.cortex_m33,
2303 &cpu.cortex_m35p,
2304 &cpu.cortex_m4,
2305 &cpu.cortex_m7,
2306 &cpu.cortex_r4,
2307 &cpu.cortex_r4f,
2308 &cpu.cortex_r5,
2309 &cpu.cortex_r52,
2310 &cpu.cortex_r7,
2311 &cpu.cortex_r8,
2312 &cpu.cyclone,
2313 &cpu.ep9312,
2314 &cpu.exynos_m1,
2315 &cpu.exynos_m2,
2316 &cpu.exynos_m3,
2317 &cpu.exynos_m4,
2318 &cpu.exynos_m5,
2319 &cpu.generic,
2320 &cpu.iwmmxt,
2321 &cpu.krait,
2322 &cpu.kryo,
2323 &cpu.mpcore,
2324 &cpu.mpcorenovfp,
2325 &cpu.sc000,
2326 &cpu.sc300,
2327 &cpu.strongarm,
2328 &cpu.strongarm110,
2329 &cpu.strongarm1100,
2330 &cpu.strongarm1110,
2331 &cpu.swift,
2332 &cpu.xscale,
2333};
lib/std/target/avr.zig created+2380
......@@ -0,0 +1,2380 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 addsubiw,
6 avr0,
7 avr1,
8 avr2,
9 avr25,
10 avr3,
11 avr31,
12 avr35,
13 avr4,
14 avr5,
15 avr51,
16 avr6,
17 avrtiny,
18 @"break",
19 des,
20 eijmpcall,
21 elpm,
22 elpmx,
23 ijmpcall,
24 jmpcall,
25 lpm,
26 lpmx,
27 movw,
28 mul,
29 rmw,
30 smallstack,
31 special,
32 spm,
33 spmx,
34 sram,
35 tinyencoding,
36 xmega,
37 xmegau,
38};
39
40pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
41
42pub const all_features = blk: {
43 const len = @typeInfo(Feature).Enum.fields.len;
44 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
45 var result: [len]Cpu.Feature = undefined;
46 result[@enumToInt(Feature.addsubiw)] = .{
47 .llvm_name = "addsubiw",
48 .description = "Enable 16-bit register-immediate addition and subtraction instructions",
49 .dependencies = featureSet(&[_]Feature{}),
50 };
51 result[@enumToInt(Feature.avr0)] = .{
52 .llvm_name = "avr0",
53 .description = "The device is a part of the avr0 family",
54 .dependencies = featureSet(&[_]Feature{}),
55 };
56 result[@enumToInt(Feature.avr1)] = .{
57 .llvm_name = "avr1",
58 .description = "The device is a part of the avr1 family",
59 .dependencies = featureSet(&[_]Feature{
60 .avr0,
61 .lpm,
62 }),
63 };
64 result[@enumToInt(Feature.avr2)] = .{
65 .llvm_name = "avr2",
66 .description = "The device is a part of the avr2 family",
67 .dependencies = featureSet(&[_]Feature{
68 .addsubiw,
69 .avr1,
70 .ijmpcall,
71 .sram,
72 }),
73 };
74 result[@enumToInt(Feature.avr25)] = .{
75 .llvm_name = "avr25",
76 .description = "The device is a part of the avr25 family",
77 .dependencies = featureSet(&[_]Feature{
78 .avr2,
79 .@"break",
80 .lpmx,
81 .movw,
82 .spm,
83 }),
84 };
85 result[@enumToInt(Feature.avr3)] = .{
86 .llvm_name = "avr3",
87 .description = "The device is a part of the avr3 family",
88 .dependencies = featureSet(&[_]Feature{
89 .avr2,
90 .jmpcall,
91 }),
92 };
93 result[@enumToInt(Feature.avr31)] = .{
94 .llvm_name = "avr31",
95 .description = "The device is a part of the avr31 family",
96 .dependencies = featureSet(&[_]Feature{
97 .avr3,
98 .elpm,
99 }),
100 };
101 result[@enumToInt(Feature.avr35)] = .{
102 .llvm_name = "avr35",
103 .description = "The device is a part of the avr35 family",
104 .dependencies = featureSet(&[_]Feature{
105 .avr3,
106 .@"break",
107 .lpmx,
108 .movw,
109 .spm,
110 }),
111 };
112 result[@enumToInt(Feature.avr4)] = .{
113 .llvm_name = "avr4",
114 .description = "The device is a part of the avr4 family",
115 .dependencies = featureSet(&[_]Feature{
116 .avr2,
117 .@"break",
118 .lpmx,
119 .movw,
120 .mul,
121 .spm,
122 }),
123 };
124 result[@enumToInt(Feature.avr5)] = .{
125 .llvm_name = "avr5",
126 .description = "The device is a part of the avr5 family",
127 .dependencies = featureSet(&[_]Feature{
128 .avr3,
129 .@"break",
130 .lpmx,
131 .movw,
132 .mul,
133 .spm,
134 }),
135 };
136 result[@enumToInt(Feature.avr51)] = .{
137 .llvm_name = "avr51",
138 .description = "The device is a part of the avr51 family",
139 .dependencies = featureSet(&[_]Feature{
140 .avr5,
141 .elpm,
142 .elpmx,
143 }),
144 };
145 result[@enumToInt(Feature.avr6)] = .{
146 .llvm_name = "avr6",
147 .description = "The device is a part of the avr6 family",
148 .dependencies = featureSet(&[_]Feature{
149 .avr51,
150 }),
151 };
152 result[@enumToInt(Feature.avrtiny)] = .{
153 .llvm_name = "avrtiny",
154 .description = "The device is a part of the avrtiny family",
155 .dependencies = featureSet(&[_]Feature{
156 .avr0,
157 .@"break",
158 .sram,
159 .tinyencoding,
160 }),
161 };
162 result[@enumToInt(Feature.@"break")] = .{
163 .llvm_name = "break",
164 .description = "The device supports the `BREAK` debugging instruction",
165 .dependencies = featureSet(&[_]Feature{}),
166 };
167 result[@enumToInt(Feature.des)] = .{
168 .llvm_name = "des",
169 .description = "The device supports the `DES k` encryption instruction",
170 .dependencies = featureSet(&[_]Feature{}),
171 };
172 result[@enumToInt(Feature.eijmpcall)] = .{
173 .llvm_name = "eijmpcall",
174 .description = "The device supports the `EIJMP`/`EICALL` instructions",
175 .dependencies = featureSet(&[_]Feature{}),
176 };
177 result[@enumToInt(Feature.elpm)] = .{
178 .llvm_name = "elpm",
179 .description = "The device supports the ELPM instruction",
180 .dependencies = featureSet(&[_]Feature{}),
181 };
182 result[@enumToInt(Feature.elpmx)] = .{
183 .llvm_name = "elpmx",
184 .description = "The device supports the `ELPM Rd, Z[+]` instructions",
185 .dependencies = featureSet(&[_]Feature{}),
186 };
187 result[@enumToInt(Feature.ijmpcall)] = .{
188 .llvm_name = "ijmpcall",
189 .description = "The device supports `IJMP`/`ICALL`instructions",
190 .dependencies = featureSet(&[_]Feature{}),
191 };
192 result[@enumToInt(Feature.jmpcall)] = .{
193 .llvm_name = "jmpcall",
194 .description = "The device supports the `JMP` and `CALL` instructions",
195 .dependencies = featureSet(&[_]Feature{}),
196 };
197 result[@enumToInt(Feature.lpm)] = .{
198 .llvm_name = "lpm",
199 .description = "The device supports the `LPM` instruction",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.lpmx)] = .{
203 .llvm_name = "lpmx",
204 .description = "The device supports the `LPM Rd, Z[+]` instruction",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.movw)] = .{
208 .llvm_name = "movw",
209 .description = "The device supports the 16-bit MOVW instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.mul)] = .{
213 .llvm_name = "mul",
214 .description = "The device supports the multiplication instructions",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.rmw)] = .{
218 .llvm_name = "rmw",
219 .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.smallstack)] = .{
223 .llvm_name = "smallstack",
224 .description = "The device has an 8-bit stack pointer",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.special)] = .{
228 .llvm_name = "special",
229 .description = "Enable use of the entire instruction set - used for debugging",
230 .dependencies = featureSet(&[_]Feature{
231 .addsubiw,
232 .@"break",
233 .des,
234 .eijmpcall,
235 .elpm,
236 .elpmx,
237 .ijmpcall,
238 .jmpcall,
239 .lpm,
240 .lpmx,
241 .movw,
242 .mul,
243 .rmw,
244 .spm,
245 .spmx,
246 .sram,
247 }),
248 };
249 result[@enumToInt(Feature.spm)] = .{
250 .llvm_name = "spm",
251 .description = "The device supports the `SPM` instruction",
252 .dependencies = featureSet(&[_]Feature{}),
253 };
254 result[@enumToInt(Feature.spmx)] = .{
255 .llvm_name = "spmx",
256 .description = "The device supports the `SPM Z+` instruction",
257 .dependencies = featureSet(&[_]Feature{}),
258 };
259 result[@enumToInt(Feature.sram)] = .{
260 .llvm_name = "sram",
261 .description = "The device has random access memory",
262 .dependencies = featureSet(&[_]Feature{}),
263 };
264 result[@enumToInt(Feature.tinyencoding)] = .{
265 .llvm_name = "tinyencoding",
266 .description = "The device has Tiny core specific instruction encodings",
267 .dependencies = featureSet(&[_]Feature{}),
268 };
269 result[@enumToInt(Feature.xmega)] = .{
270 .llvm_name = "xmega",
271 .description = "The device is a part of the xmega family",
272 .dependencies = featureSet(&[_]Feature{
273 .avr51,
274 .des,
275 .eijmpcall,
276 .spmx,
277 }),
278 };
279 result[@enumToInt(Feature.xmegau)] = .{
280 .llvm_name = "xmegau",
281 .description = "The device is a part of the xmegau family",
282 .dependencies = featureSet(&[_]Feature{
283 .rmw,
284 .xmega,
285 }),
286 };
287 const ti = @typeInfo(Feature);
288 for (result) |*elem, i| {
289 elem.index = i;
290 elem.name = ti.Enum.fields[i].name;
291 }
292 break :blk result;
293};
294
295pub const cpu = struct {
296 pub const at43usb320 = Cpu{
297 .name = "at43usb320",
298 .llvm_name = "at43usb320",
299 .features = featureSet(&[_]Feature{
300 .avr31,
301 }),
302 };
303 pub const at43usb355 = Cpu{
304 .name = "at43usb355",
305 .llvm_name = "at43usb355",
306 .features = featureSet(&[_]Feature{
307 .avr3,
308 }),
309 };
310 pub const at76c711 = Cpu{
311 .name = "at76c711",
312 .llvm_name = "at76c711",
313 .features = featureSet(&[_]Feature{
314 .avr3,
315 }),
316 };
317 pub const at86rf401 = Cpu{
318 .name = "at86rf401",
319 .llvm_name = "at86rf401",
320 .features = featureSet(&[_]Feature{
321 .avr2,
322 .lpmx,
323 .movw,
324 }),
325 };
326 pub const at90c8534 = Cpu{
327 .name = "at90c8534",
328 .llvm_name = "at90c8534",
329 .features = featureSet(&[_]Feature{
330 .avr2,
331 }),
332 };
333 pub const at90can128 = Cpu{
334 .name = "at90can128",
335 .llvm_name = "at90can128",
336 .features = featureSet(&[_]Feature{
337 .avr51,
338 }),
339 };
340 pub const at90can32 = Cpu{
341 .name = "at90can32",
342 .llvm_name = "at90can32",
343 .features = featureSet(&[_]Feature{
344 .avr5,
345 }),
346 };
347 pub const at90can64 = Cpu{
348 .name = "at90can64",
349 .llvm_name = "at90can64",
350 .features = featureSet(&[_]Feature{
351 .avr5,
352 }),
353 };
354 pub const at90pwm1 = Cpu{
355 .name = "at90pwm1",
356 .llvm_name = "at90pwm1",
357 .features = featureSet(&[_]Feature{
358 .avr4,
359 }),
360 };
361 pub const at90pwm161 = Cpu{
362 .name = "at90pwm161",
363 .llvm_name = "at90pwm161",
364 .features = featureSet(&[_]Feature{
365 .avr5,
366 }),
367 };
368 pub const at90pwm2 = Cpu{
369 .name = "at90pwm2",
370 .llvm_name = "at90pwm2",
371 .features = featureSet(&[_]Feature{
372 .avr4,
373 }),
374 };
375 pub const at90pwm216 = Cpu{
376 .name = "at90pwm216",
377 .llvm_name = "at90pwm216",
378 .features = featureSet(&[_]Feature{
379 .avr5,
380 }),
381 };
382 pub const at90pwm2b = Cpu{
383 .name = "at90pwm2b",
384 .llvm_name = "at90pwm2b",
385 .features = featureSet(&[_]Feature{
386 .avr4,
387 }),
388 };
389 pub const at90pwm3 = Cpu{
390 .name = "at90pwm3",
391 .llvm_name = "at90pwm3",
392 .features = featureSet(&[_]Feature{
393 .avr4,
394 }),
395 };
396 pub const at90pwm316 = Cpu{
397 .name = "at90pwm316",
398 .llvm_name = "at90pwm316",
399 .features = featureSet(&[_]Feature{
400 .avr5,
401 }),
402 };
403 pub const at90pwm3b = Cpu{
404 .name = "at90pwm3b",
405 .llvm_name = "at90pwm3b",
406 .features = featureSet(&[_]Feature{
407 .avr4,
408 }),
409 };
410 pub const at90pwm81 = Cpu{
411 .name = "at90pwm81",
412 .llvm_name = "at90pwm81",
413 .features = featureSet(&[_]Feature{
414 .avr4,
415 }),
416 };
417 pub const at90s1200 = Cpu{
418 .name = "at90s1200",
419 .llvm_name = "at90s1200",
420 .features = featureSet(&[_]Feature{
421 .avr0,
422 }),
423 };
424 pub const at90s2313 = Cpu{
425 .name = "at90s2313",
426 .llvm_name = "at90s2313",
427 .features = featureSet(&[_]Feature{
428 .avr2,
429 }),
430 };
431 pub const at90s2323 = Cpu{
432 .name = "at90s2323",
433 .llvm_name = "at90s2323",
434 .features = featureSet(&[_]Feature{
435 .avr2,
436 }),
437 };
438 pub const at90s2333 = Cpu{
439 .name = "at90s2333",
440 .llvm_name = "at90s2333",
441 .features = featureSet(&[_]Feature{
442 .avr2,
443 }),
444 };
445 pub const at90s2343 = Cpu{
446 .name = "at90s2343",
447 .llvm_name = "at90s2343",
448 .features = featureSet(&[_]Feature{
449 .avr2,
450 }),
451 };
452 pub const at90s4414 = Cpu{
453 .name = "at90s4414",
454 .llvm_name = "at90s4414",
455 .features = featureSet(&[_]Feature{
456 .avr2,
457 }),
458 };
459 pub const at90s4433 = Cpu{
460 .name = "at90s4433",
461 .llvm_name = "at90s4433",
462 .features = featureSet(&[_]Feature{
463 .avr2,
464 }),
465 };
466 pub const at90s4434 = Cpu{
467 .name = "at90s4434",
468 .llvm_name = "at90s4434",
469 .features = featureSet(&[_]Feature{
470 .avr2,
471 }),
472 };
473 pub const at90s8515 = Cpu{
474 .name = "at90s8515",
475 .llvm_name = "at90s8515",
476 .features = featureSet(&[_]Feature{
477 .avr2,
478 }),
479 };
480 pub const at90s8535 = Cpu{
481 .name = "at90s8535",
482 .llvm_name = "at90s8535",
483 .features = featureSet(&[_]Feature{
484 .avr2,
485 }),
486 };
487 pub const at90scr100 = Cpu{
488 .name = "at90scr100",
489 .llvm_name = "at90scr100",
490 .features = featureSet(&[_]Feature{
491 .avr5,
492 }),
493 };
494 pub const at90usb1286 = Cpu{
495 .name = "at90usb1286",
496 .llvm_name = "at90usb1286",
497 .features = featureSet(&[_]Feature{
498 .avr51,
499 }),
500 };
501 pub const at90usb1287 = Cpu{
502 .name = "at90usb1287",
503 .llvm_name = "at90usb1287",
504 .features = featureSet(&[_]Feature{
505 .avr51,
506 }),
507 };
508 pub const at90usb162 = Cpu{
509 .name = "at90usb162",
510 .llvm_name = "at90usb162",
511 .features = featureSet(&[_]Feature{
512 .avr35,
513 }),
514 };
515 pub const at90usb646 = Cpu{
516 .name = "at90usb646",
517 .llvm_name = "at90usb646",
518 .features = featureSet(&[_]Feature{
519 .avr5,
520 }),
521 };
522 pub const at90usb647 = Cpu{
523 .name = "at90usb647",
524 .llvm_name = "at90usb647",
525 .features = featureSet(&[_]Feature{
526 .avr5,
527 }),
528 };
529 pub const at90usb82 = Cpu{
530 .name = "at90usb82",
531 .llvm_name = "at90usb82",
532 .features = featureSet(&[_]Feature{
533 .avr35,
534 }),
535 };
536 pub const at94k = Cpu{
537 .name = "at94k",
538 .llvm_name = "at94k",
539 .features = featureSet(&[_]Feature{
540 .avr3,
541 .lpmx,
542 .movw,
543 .mul,
544 }),
545 };
546 pub const ata5272 = Cpu{
547 .name = "ata5272",
548 .llvm_name = "ata5272",
549 .features = featureSet(&[_]Feature{
550 .avr25,
551 }),
552 };
553 pub const ata5505 = Cpu{
554 .name = "ata5505",
555 .llvm_name = "ata5505",
556 .features = featureSet(&[_]Feature{
557 .avr35,
558 }),
559 };
560 pub const ata5790 = Cpu{
561 .name = "ata5790",
562 .llvm_name = "ata5790",
563 .features = featureSet(&[_]Feature{
564 .avr5,
565 }),
566 };
567 pub const ata5795 = Cpu{
568 .name = "ata5795",
569 .llvm_name = "ata5795",
570 .features = featureSet(&[_]Feature{
571 .avr5,
572 }),
573 };
574 pub const ata6285 = Cpu{
575 .name = "ata6285",
576 .llvm_name = "ata6285",
577 .features = featureSet(&[_]Feature{
578 .avr4,
579 }),
580 };
581 pub const ata6286 = Cpu{
582 .name = "ata6286",
583 .llvm_name = "ata6286",
584 .features = featureSet(&[_]Feature{
585 .avr4,
586 }),
587 };
588 pub const ata6289 = Cpu{
589 .name = "ata6289",
590 .llvm_name = "ata6289",
591 .features = featureSet(&[_]Feature{
592 .avr4,
593 }),
594 };
595 pub const atmega103 = Cpu{
596 .name = "atmega103",
597 .llvm_name = "atmega103",
598 .features = featureSet(&[_]Feature{
599 .avr31,
600 }),
601 };
602 pub const atmega128 = Cpu{
603 .name = "atmega128",
604 .llvm_name = "atmega128",
605 .features = featureSet(&[_]Feature{
606 .avr51,
607 }),
608 };
609 pub const atmega1280 = Cpu{
610 .name = "atmega1280",
611 .llvm_name = "atmega1280",
612 .features = featureSet(&[_]Feature{
613 .avr51,
614 }),
615 };
616 pub const atmega1281 = Cpu{
617 .name = "atmega1281",
618 .llvm_name = "atmega1281",
619 .features = featureSet(&[_]Feature{
620 .avr51,
621 }),
622 };
623 pub const atmega1284 = Cpu{
624 .name = "atmega1284",
625 .llvm_name = "atmega1284",
626 .features = featureSet(&[_]Feature{
627 .avr51,
628 }),
629 };
630 pub const atmega1284p = Cpu{
631 .name = "atmega1284p",
632 .llvm_name = "atmega1284p",
633 .features = featureSet(&[_]Feature{
634 .avr51,
635 }),
636 };
637 pub const atmega1284rfr2 = Cpu{
638 .name = "atmega1284rfr2",
639 .llvm_name = "atmega1284rfr2",
640 .features = featureSet(&[_]Feature{
641 .avr51,
642 }),
643 };
644 pub const atmega128a = Cpu{
645 .name = "atmega128a",
646 .llvm_name = "atmega128a",
647 .features = featureSet(&[_]Feature{
648 .avr51,
649 }),
650 };
651 pub const atmega128rfa1 = Cpu{
652 .name = "atmega128rfa1",
653 .llvm_name = "atmega128rfa1",
654 .features = featureSet(&[_]Feature{
655 .avr51,
656 }),
657 };
658 pub const atmega128rfr2 = Cpu{
659 .name = "atmega128rfr2",
660 .llvm_name = "atmega128rfr2",
661 .features = featureSet(&[_]Feature{
662 .avr51,
663 }),
664 };
665 pub const atmega16 = Cpu{
666 .name = "atmega16",
667 .llvm_name = "atmega16",
668 .features = featureSet(&[_]Feature{
669 .avr5,
670 }),
671 };
672 pub const atmega161 = Cpu{
673 .name = "atmega161",
674 .llvm_name = "atmega161",
675 .features = featureSet(&[_]Feature{
676 .avr3,
677 .lpmx,
678 .movw,
679 .mul,
680 .spm,
681 }),
682 };
683 pub const atmega162 = Cpu{
684 .name = "atmega162",
685 .llvm_name = "atmega162",
686 .features = featureSet(&[_]Feature{
687 .avr5,
688 }),
689 };
690 pub const atmega163 = Cpu{
691 .name = "atmega163",
692 .llvm_name = "atmega163",
693 .features = featureSet(&[_]Feature{
694 .avr3,
695 .lpmx,
696 .movw,
697 .mul,
698 .spm,
699 }),
700 };
701 pub const atmega164a = Cpu{
702 .name = "atmega164a",
703 .llvm_name = "atmega164a",
704 .features = featureSet(&[_]Feature{
705 .avr5,
706 }),
707 };
708 pub const atmega164p = Cpu{
709 .name = "atmega164p",
710 .llvm_name = "atmega164p",
711 .features = featureSet(&[_]Feature{
712 .avr5,
713 }),
714 };
715 pub const atmega164pa = Cpu{
716 .name = "atmega164pa",
717 .llvm_name = "atmega164pa",
718 .features = featureSet(&[_]Feature{
719 .avr5,
720 }),
721 };
722 pub const atmega165 = Cpu{
723 .name = "atmega165",
724 .llvm_name = "atmega165",
725 .features = featureSet(&[_]Feature{
726 .avr5,
727 }),
728 };
729 pub const atmega165a = Cpu{
730 .name = "atmega165a",
731 .llvm_name = "atmega165a",
732 .features = featureSet(&[_]Feature{
733 .avr5,
734 }),
735 };
736 pub const atmega165p = Cpu{
737 .name = "atmega165p",
738 .llvm_name = "atmega165p",
739 .features = featureSet(&[_]Feature{
740 .avr5,
741 }),
742 };
743 pub const atmega165pa = Cpu{
744 .name = "atmega165pa",
745 .llvm_name = "atmega165pa",
746 .features = featureSet(&[_]Feature{
747 .avr5,
748 }),
749 };
750 pub const atmega168 = Cpu{
751 .name = "atmega168",
752 .llvm_name = "atmega168",
753 .features = featureSet(&[_]Feature{
754 .avr5,
755 }),
756 };
757 pub const atmega168a = Cpu{
758 .name = "atmega168a",
759 .llvm_name = "atmega168a",
760 .features = featureSet(&[_]Feature{
761 .avr5,
762 }),
763 };
764 pub const atmega168p = Cpu{
765 .name = "atmega168p",
766 .llvm_name = "atmega168p",
767 .features = featureSet(&[_]Feature{
768 .avr5,
769 }),
770 };
771 pub const atmega168pa = Cpu{
772 .name = "atmega168pa",
773 .llvm_name = "atmega168pa",
774 .features = featureSet(&[_]Feature{
775 .avr5,
776 }),
777 };
778 pub const atmega169 = Cpu{
779 .name = "atmega169",
780 .llvm_name = "atmega169",
781 .features = featureSet(&[_]Feature{
782 .avr5,
783 }),
784 };
785 pub const atmega169a = Cpu{
786 .name = "atmega169a",
787 .llvm_name = "atmega169a",
788 .features = featureSet(&[_]Feature{
789 .avr5,
790 }),
791 };
792 pub const atmega169p = Cpu{
793 .name = "atmega169p",
794 .llvm_name = "atmega169p",
795 .features = featureSet(&[_]Feature{
796 .avr5,
797 }),
798 };
799 pub const atmega169pa = Cpu{
800 .name = "atmega169pa",
801 .llvm_name = "atmega169pa",
802 .features = featureSet(&[_]Feature{
803 .avr5,
804 }),
805 };
806 pub const atmega16a = Cpu{
807 .name = "atmega16a",
808 .llvm_name = "atmega16a",
809 .features = featureSet(&[_]Feature{
810 .avr5,
811 }),
812 };
813 pub const atmega16hva = Cpu{
814 .name = "atmega16hva",
815 .llvm_name = "atmega16hva",
816 .features = featureSet(&[_]Feature{
817 .avr5,
818 }),
819 };
820 pub const atmega16hva2 = Cpu{
821 .name = "atmega16hva2",
822 .llvm_name = "atmega16hva2",
823 .features = featureSet(&[_]Feature{
824 .avr5,
825 }),
826 };
827 pub const atmega16hvb = Cpu{
828 .name = "atmega16hvb",
829 .llvm_name = "atmega16hvb",
830 .features = featureSet(&[_]Feature{
831 .avr5,
832 }),
833 };
834 pub const atmega16hvbrevb = Cpu{
835 .name = "atmega16hvbrevb",
836 .llvm_name = "atmega16hvbrevb",
837 .features = featureSet(&[_]Feature{
838 .avr5,
839 }),
840 };
841 pub const atmega16m1 = Cpu{
842 .name = "atmega16m1",
843 .llvm_name = "atmega16m1",
844 .features = featureSet(&[_]Feature{
845 .avr5,
846 }),
847 };
848 pub const atmega16u2 = Cpu{
849 .name = "atmega16u2",
850 .llvm_name = "atmega16u2",
851 .features = featureSet(&[_]Feature{
852 .avr35,
853 }),
854 };
855 pub const atmega16u4 = Cpu{
856 .name = "atmega16u4",
857 .llvm_name = "atmega16u4",
858 .features = featureSet(&[_]Feature{
859 .avr5,
860 }),
861 };
862 pub const atmega2560 = Cpu{
863 .name = "atmega2560",
864 .llvm_name = "atmega2560",
865 .features = featureSet(&[_]Feature{
866 .avr6,
867 }),
868 };
869 pub const atmega2561 = Cpu{
870 .name = "atmega2561",
871 .llvm_name = "atmega2561",
872 .features = featureSet(&[_]Feature{
873 .avr6,
874 }),
875 };
876 pub const atmega2564rfr2 = Cpu{
877 .name = "atmega2564rfr2",
878 .llvm_name = "atmega2564rfr2",
879 .features = featureSet(&[_]Feature{
880 .avr6,
881 }),
882 };
883 pub const atmega256rfr2 = Cpu{
884 .name = "atmega256rfr2",
885 .llvm_name = "atmega256rfr2",
886 .features = featureSet(&[_]Feature{
887 .avr6,
888 }),
889 };
890 pub const atmega32 = Cpu{
891 .name = "atmega32",
892 .llvm_name = "atmega32",
893 .features = featureSet(&[_]Feature{
894 .avr5,
895 }),
896 };
897 pub const atmega323 = Cpu{
898 .name = "atmega323",
899 .llvm_name = "atmega323",
900 .features = featureSet(&[_]Feature{
901 .avr5,
902 }),
903 };
904 pub const atmega324a = Cpu{
905 .name = "atmega324a",
906 .llvm_name = "atmega324a",
907 .features = featureSet(&[_]Feature{
908 .avr5,
909 }),
910 };
911 pub const atmega324p = Cpu{
912 .name = "atmega324p",
913 .llvm_name = "atmega324p",
914 .features = featureSet(&[_]Feature{
915 .avr5,
916 }),
917 };
918 pub const atmega324pa = Cpu{
919 .name = "atmega324pa",
920 .llvm_name = "atmega324pa",
921 .features = featureSet(&[_]Feature{
922 .avr5,
923 }),
924 };
925 pub const atmega325 = Cpu{
926 .name = "atmega325",
927 .llvm_name = "atmega325",
928 .features = featureSet(&[_]Feature{
929 .avr5,
930 }),
931 };
932 pub const atmega3250 = Cpu{
933 .name = "atmega3250",
934 .llvm_name = "atmega3250",
935 .features = featureSet(&[_]Feature{
936 .avr5,
937 }),
938 };
939 pub const atmega3250a = Cpu{
940 .name = "atmega3250a",
941 .llvm_name = "atmega3250a",
942 .features = featureSet(&[_]Feature{
943 .avr5,
944 }),
945 };
946 pub const atmega3250p = Cpu{
947 .name = "atmega3250p",
948 .llvm_name = "atmega3250p",
949 .features = featureSet(&[_]Feature{
950 .avr5,
951 }),
952 };
953 pub const atmega3250pa = Cpu{
954 .name = "atmega3250pa",
955 .llvm_name = "atmega3250pa",
956 .features = featureSet(&[_]Feature{
957 .avr5,
958 }),
959 };
960 pub const atmega325a = Cpu{
961 .name = "atmega325a",
962 .llvm_name = "atmega325a",
963 .features = featureSet(&[_]Feature{
964 .avr5,
965 }),
966 };
967 pub const atmega325p = Cpu{
968 .name = "atmega325p",
969 .llvm_name = "atmega325p",
970 .features = featureSet(&[_]Feature{
971 .avr5,
972 }),
973 };
974 pub const atmega325pa = Cpu{
975 .name = "atmega325pa",
976 .llvm_name = "atmega325pa",
977 .features = featureSet(&[_]Feature{
978 .avr5,
979 }),
980 };
981 pub const atmega328 = Cpu{
982 .name = "atmega328",
983 .llvm_name = "atmega328",
984 .features = featureSet(&[_]Feature{
985 .avr5,
986 }),
987 };
988 pub const atmega328p = Cpu{
989 .name = "atmega328p",
990 .llvm_name = "atmega328p",
991 .features = featureSet(&[_]Feature{
992 .avr5,
993 }),
994 };
995 pub const atmega329 = Cpu{
996 .name = "atmega329",
997 .llvm_name = "atmega329",
998 .features = featureSet(&[_]Feature{
999 .avr5,
1000 }),
1001 };
1002 pub const atmega3290 = Cpu{
1003 .name = "atmega3290",
1004 .llvm_name = "atmega3290",
1005 .features = featureSet(&[_]Feature{
1006 .avr5,
1007 }),
1008 };
1009 pub const atmega3290a = Cpu{
1010 .name = "atmega3290a",
1011 .llvm_name = "atmega3290a",
1012 .features = featureSet(&[_]Feature{
1013 .avr5,
1014 }),
1015 };
1016 pub const atmega3290p = Cpu{
1017 .name = "atmega3290p",
1018 .llvm_name = "atmega3290p",
1019 .features = featureSet(&[_]Feature{
1020 .avr5,
1021 }),
1022 };
1023 pub const atmega3290pa = Cpu{
1024 .name = "atmega3290pa",
1025 .llvm_name = "atmega3290pa",
1026 .features = featureSet(&[_]Feature{
1027 .avr5,
1028 }),
1029 };
1030 pub const atmega329a = Cpu{
1031 .name = "atmega329a",
1032 .llvm_name = "atmega329a",
1033 .features = featureSet(&[_]Feature{
1034 .avr5,
1035 }),
1036 };
1037 pub const atmega329p = Cpu{
1038 .name = "atmega329p",
1039 .llvm_name = "atmega329p",
1040 .features = featureSet(&[_]Feature{
1041 .avr5,
1042 }),
1043 };
1044 pub const atmega329pa = Cpu{
1045 .name = "atmega329pa",
1046 .llvm_name = "atmega329pa",
1047 .features = featureSet(&[_]Feature{
1048 .avr5,
1049 }),
1050 };
1051 pub const atmega32a = Cpu{
1052 .name = "atmega32a",
1053 .llvm_name = "atmega32a",
1054 .features = featureSet(&[_]Feature{
1055 .avr5,
1056 }),
1057 };
1058 pub const atmega32c1 = Cpu{
1059 .name = "atmega32c1",
1060 .llvm_name = "atmega32c1",
1061 .features = featureSet(&[_]Feature{
1062 .avr5,
1063 }),
1064 };
1065 pub const atmega32hvb = Cpu{
1066 .name = "atmega32hvb",
1067 .llvm_name = "atmega32hvb",
1068 .features = featureSet(&[_]Feature{
1069 .avr5,
1070 }),
1071 };
1072 pub const atmega32hvbrevb = Cpu{
1073 .name = "atmega32hvbrevb",
1074 .llvm_name = "atmega32hvbrevb",
1075 .features = featureSet(&[_]Feature{
1076 .avr5,
1077 }),
1078 };
1079 pub const atmega32m1 = Cpu{
1080 .name = "atmega32m1",
1081 .llvm_name = "atmega32m1",
1082 .features = featureSet(&[_]Feature{
1083 .avr5,
1084 }),
1085 };
1086 pub const atmega32u2 = Cpu{
1087 .name = "atmega32u2",
1088 .llvm_name = "atmega32u2",
1089 .features = featureSet(&[_]Feature{
1090 .avr35,
1091 }),
1092 };
1093 pub const atmega32u4 = Cpu{
1094 .name = "atmega32u4",
1095 .llvm_name = "atmega32u4",
1096 .features = featureSet(&[_]Feature{
1097 .avr5,
1098 }),
1099 };
1100 pub const atmega32u6 = Cpu{
1101 .name = "atmega32u6",
1102 .llvm_name = "atmega32u6",
1103 .features = featureSet(&[_]Feature{
1104 .avr5,
1105 }),
1106 };
1107 pub const atmega406 = Cpu{
1108 .name = "atmega406",
1109 .llvm_name = "atmega406",
1110 .features = featureSet(&[_]Feature{
1111 .avr5,
1112 }),
1113 };
1114 pub const atmega48 = Cpu{
1115 .name = "atmega48",
1116 .llvm_name = "atmega48",
1117 .features = featureSet(&[_]Feature{
1118 .avr4,
1119 }),
1120 };
1121 pub const atmega48a = Cpu{
1122 .name = "atmega48a",
1123 .llvm_name = "atmega48a",
1124 .features = featureSet(&[_]Feature{
1125 .avr4,
1126 }),
1127 };
1128 pub const atmega48p = Cpu{
1129 .name = "atmega48p",
1130 .llvm_name = "atmega48p",
1131 .features = featureSet(&[_]Feature{
1132 .avr4,
1133 }),
1134 };
1135 pub const atmega48pa = Cpu{
1136 .name = "atmega48pa",
1137 .llvm_name = "atmega48pa",
1138 .features = featureSet(&[_]Feature{
1139 .avr4,
1140 }),
1141 };
1142 pub const atmega64 = Cpu{
1143 .name = "atmega64",
1144 .llvm_name = "atmega64",
1145 .features = featureSet(&[_]Feature{
1146 .avr5,
1147 }),
1148 };
1149 pub const atmega640 = Cpu{
1150 .name = "atmega640",
1151 .llvm_name = "atmega640",
1152 .features = featureSet(&[_]Feature{
1153 .avr5,
1154 }),
1155 };
1156 pub const atmega644 = Cpu{
1157 .name = "atmega644",
1158 .llvm_name = "atmega644",
1159 .features = featureSet(&[_]Feature{
1160 .avr5,
1161 }),
1162 };
1163 pub const atmega644a = Cpu{
1164 .name = "atmega644a",
1165 .llvm_name = "atmega644a",
1166 .features = featureSet(&[_]Feature{
1167 .avr5,
1168 }),
1169 };
1170 pub const atmega644p = Cpu{
1171 .name = "atmega644p",
1172 .llvm_name = "atmega644p",
1173 .features = featureSet(&[_]Feature{
1174 .avr5,
1175 }),
1176 };
1177 pub const atmega644pa = Cpu{
1178 .name = "atmega644pa",
1179 .llvm_name = "atmega644pa",
1180 .features = featureSet(&[_]Feature{
1181 .avr5,
1182 }),
1183 };
1184 pub const atmega644rfr2 = Cpu{
1185 .name = "atmega644rfr2",
1186 .llvm_name = "atmega644rfr2",
1187 .features = featureSet(&[_]Feature{
1188 .avr5,
1189 }),
1190 };
1191 pub const atmega645 = Cpu{
1192 .name = "atmega645",
1193 .llvm_name = "atmega645",
1194 .features = featureSet(&[_]Feature{
1195 .avr5,
1196 }),
1197 };
1198 pub const atmega6450 = Cpu{
1199 .name = "atmega6450",
1200 .llvm_name = "atmega6450",
1201 .features = featureSet(&[_]Feature{
1202 .avr5,
1203 }),
1204 };
1205 pub const atmega6450a = Cpu{
1206 .name = "atmega6450a",
1207 .llvm_name = "atmega6450a",
1208 .features = featureSet(&[_]Feature{
1209 .avr5,
1210 }),
1211 };
1212 pub const atmega6450p = Cpu{
1213 .name = "atmega6450p",
1214 .llvm_name = "atmega6450p",
1215 .features = featureSet(&[_]Feature{
1216 .avr5,
1217 }),
1218 };
1219 pub const atmega645a = Cpu{
1220 .name = "atmega645a",
1221 .llvm_name = "atmega645a",
1222 .features = featureSet(&[_]Feature{
1223 .avr5,
1224 }),
1225 };
1226 pub const atmega645p = Cpu{
1227 .name = "atmega645p",
1228 .llvm_name = "atmega645p",
1229 .features = featureSet(&[_]Feature{
1230 .avr5,
1231 }),
1232 };
1233 pub const atmega649 = Cpu{
1234 .name = "atmega649",
1235 .llvm_name = "atmega649",
1236 .features = featureSet(&[_]Feature{
1237 .avr5,
1238 }),
1239 };
1240 pub const atmega6490 = Cpu{
1241 .name = "atmega6490",
1242 .llvm_name = "atmega6490",
1243 .features = featureSet(&[_]Feature{
1244 .avr5,
1245 }),
1246 };
1247 pub const atmega6490a = Cpu{
1248 .name = "atmega6490a",
1249 .llvm_name = "atmega6490a",
1250 .features = featureSet(&[_]Feature{
1251 .avr5,
1252 }),
1253 };
1254 pub const atmega6490p = Cpu{
1255 .name = "atmega6490p",
1256 .llvm_name = "atmega6490p",
1257 .features = featureSet(&[_]Feature{
1258 .avr5,
1259 }),
1260 };
1261 pub const atmega649a = Cpu{
1262 .name = "atmega649a",
1263 .llvm_name = "atmega649a",
1264 .features = featureSet(&[_]Feature{
1265 .avr5,
1266 }),
1267 };
1268 pub const atmega649p = Cpu{
1269 .name = "atmega649p",
1270 .llvm_name = "atmega649p",
1271 .features = featureSet(&[_]Feature{
1272 .avr5,
1273 }),
1274 };
1275 pub const atmega64a = Cpu{
1276 .name = "atmega64a",
1277 .llvm_name = "atmega64a",
1278 .features = featureSet(&[_]Feature{
1279 .avr5,
1280 }),
1281 };
1282 pub const atmega64c1 = Cpu{
1283 .name = "atmega64c1",
1284 .llvm_name = "atmega64c1",
1285 .features = featureSet(&[_]Feature{
1286 .avr5,
1287 }),
1288 };
1289 pub const atmega64hve = Cpu{
1290 .name = "atmega64hve",
1291 .llvm_name = "atmega64hve",
1292 .features = featureSet(&[_]Feature{
1293 .avr5,
1294 }),
1295 };
1296 pub const atmega64m1 = Cpu{
1297 .name = "atmega64m1",
1298 .llvm_name = "atmega64m1",
1299 .features = featureSet(&[_]Feature{
1300 .avr5,
1301 }),
1302 };
1303 pub const atmega64rfr2 = Cpu{
1304 .name = "atmega64rfr2",
1305 .llvm_name = "atmega64rfr2",
1306 .features = featureSet(&[_]Feature{
1307 .avr5,
1308 }),
1309 };
1310 pub const atmega8 = Cpu{
1311 .name = "atmega8",
1312 .llvm_name = "atmega8",
1313 .features = featureSet(&[_]Feature{
1314 .avr4,
1315 }),
1316 };
1317 pub const atmega8515 = Cpu{
1318 .name = "atmega8515",
1319 .llvm_name = "atmega8515",
1320 .features = featureSet(&[_]Feature{
1321 .avr2,
1322 .lpmx,
1323 .movw,
1324 .mul,
1325 .spm,
1326 }),
1327 };
1328 pub const atmega8535 = Cpu{
1329 .name = "atmega8535",
1330 .llvm_name = "atmega8535",
1331 .features = featureSet(&[_]Feature{
1332 .avr2,
1333 .lpmx,
1334 .movw,
1335 .mul,
1336 .spm,
1337 }),
1338 };
1339 pub const atmega88 = Cpu{
1340 .name = "atmega88",
1341 .llvm_name = "atmega88",
1342 .features = featureSet(&[_]Feature{
1343 .avr4,
1344 }),
1345 };
1346 pub const atmega88a = Cpu{
1347 .name = "atmega88a",
1348 .llvm_name = "atmega88a",
1349 .features = featureSet(&[_]Feature{
1350 .avr4,
1351 }),
1352 };
1353 pub const atmega88p = Cpu{
1354 .name = "atmega88p",
1355 .llvm_name = "atmega88p",
1356 .features = featureSet(&[_]Feature{
1357 .avr4,
1358 }),
1359 };
1360 pub const atmega88pa = Cpu{
1361 .name = "atmega88pa",
1362 .llvm_name = "atmega88pa",
1363 .features = featureSet(&[_]Feature{
1364 .avr4,
1365 }),
1366 };
1367 pub const atmega8a = Cpu{
1368 .name = "atmega8a",
1369 .llvm_name = "atmega8a",
1370 .features = featureSet(&[_]Feature{
1371 .avr4,
1372 }),
1373 };
1374 pub const atmega8hva = Cpu{
1375 .name = "atmega8hva",
1376 .llvm_name = "atmega8hva",
1377 .features = featureSet(&[_]Feature{
1378 .avr4,
1379 }),
1380 };
1381 pub const atmega8u2 = Cpu{
1382 .name = "atmega8u2",
1383 .llvm_name = "atmega8u2",
1384 .features = featureSet(&[_]Feature{
1385 .avr35,
1386 }),
1387 };
1388 pub const attiny10 = Cpu{
1389 .name = "attiny10",
1390 .llvm_name = "attiny10",
1391 .features = featureSet(&[_]Feature{
1392 .avrtiny,
1393 }),
1394 };
1395 pub const attiny102 = Cpu{
1396 .name = "attiny102",
1397 .llvm_name = "attiny102",
1398 .features = featureSet(&[_]Feature{
1399 .avrtiny,
1400 }),
1401 };
1402 pub const attiny104 = Cpu{
1403 .name = "attiny104",
1404 .llvm_name = "attiny104",
1405 .features = featureSet(&[_]Feature{
1406 .avrtiny,
1407 }),
1408 };
1409 pub const attiny11 = Cpu{
1410 .name = "attiny11",
1411 .llvm_name = "attiny11",
1412 .features = featureSet(&[_]Feature{
1413 .avr1,
1414 }),
1415 };
1416 pub const attiny12 = Cpu{
1417 .name = "attiny12",
1418 .llvm_name = "attiny12",
1419 .features = featureSet(&[_]Feature{
1420 .avr1,
1421 }),
1422 };
1423 pub const attiny13 = Cpu{
1424 .name = "attiny13",
1425 .llvm_name = "attiny13",
1426 .features = featureSet(&[_]Feature{
1427 .avr25,
1428 }),
1429 };
1430 pub const attiny13a = Cpu{
1431 .name = "attiny13a",
1432 .llvm_name = "attiny13a",
1433 .features = featureSet(&[_]Feature{
1434 .avr25,
1435 }),
1436 };
1437 pub const attiny15 = Cpu{
1438 .name = "attiny15",
1439 .llvm_name = "attiny15",
1440 .features = featureSet(&[_]Feature{
1441 .avr1,
1442 }),
1443 };
1444 pub const attiny1634 = Cpu{
1445 .name = "attiny1634",
1446 .llvm_name = "attiny1634",
1447 .features = featureSet(&[_]Feature{
1448 .avr35,
1449 }),
1450 };
1451 pub const attiny167 = Cpu{
1452 .name = "attiny167",
1453 .llvm_name = "attiny167",
1454 .features = featureSet(&[_]Feature{
1455 .avr35,
1456 }),
1457 };
1458 pub const attiny20 = Cpu{
1459 .name = "attiny20",
1460 .llvm_name = "attiny20",
1461 .features = featureSet(&[_]Feature{
1462 .avrtiny,
1463 }),
1464 };
1465 pub const attiny22 = Cpu{
1466 .name = "attiny22",
1467 .llvm_name = "attiny22",
1468 .features = featureSet(&[_]Feature{
1469 .avr2,
1470 }),
1471 };
1472 pub const attiny2313 = Cpu{
1473 .name = "attiny2313",
1474 .llvm_name = "attiny2313",
1475 .features = featureSet(&[_]Feature{
1476 .avr25,
1477 }),
1478 };
1479 pub const attiny2313a = Cpu{
1480 .name = "attiny2313a",
1481 .llvm_name = "attiny2313a",
1482 .features = featureSet(&[_]Feature{
1483 .avr25,
1484 }),
1485 };
1486 pub const attiny24 = Cpu{
1487 .name = "attiny24",
1488 .llvm_name = "attiny24",
1489 .features = featureSet(&[_]Feature{
1490 .avr25,
1491 }),
1492 };
1493 pub const attiny24a = Cpu{
1494 .name = "attiny24a",
1495 .llvm_name = "attiny24a",
1496 .features = featureSet(&[_]Feature{
1497 .avr25,
1498 }),
1499 };
1500 pub const attiny25 = Cpu{
1501 .name = "attiny25",
1502 .llvm_name = "attiny25",
1503 .features = featureSet(&[_]Feature{
1504 .avr25,
1505 }),
1506 };
1507 pub const attiny26 = Cpu{
1508 .name = "attiny26",
1509 .llvm_name = "attiny26",
1510 .features = featureSet(&[_]Feature{
1511 .avr2,
1512 .lpmx,
1513 }),
1514 };
1515 pub const attiny261 = Cpu{
1516 .name = "attiny261",
1517 .llvm_name = "attiny261",
1518 .features = featureSet(&[_]Feature{
1519 .avr25,
1520 }),
1521 };
1522 pub const attiny261a = Cpu{
1523 .name = "attiny261a",
1524 .llvm_name = "attiny261a",
1525 .features = featureSet(&[_]Feature{
1526 .avr25,
1527 }),
1528 };
1529 pub const attiny28 = Cpu{
1530 .name = "attiny28",
1531 .llvm_name = "attiny28",
1532 .features = featureSet(&[_]Feature{
1533 .avr1,
1534 }),
1535 };
1536 pub const attiny4 = Cpu{
1537 .name = "attiny4",
1538 .llvm_name = "attiny4",
1539 .features = featureSet(&[_]Feature{
1540 .avrtiny,
1541 }),
1542 };
1543 pub const attiny40 = Cpu{
1544 .name = "attiny40",
1545 .llvm_name = "attiny40",
1546 .features = featureSet(&[_]Feature{
1547 .avrtiny,
1548 }),
1549 };
1550 pub const attiny4313 = Cpu{
1551 .name = "attiny4313",
1552 .llvm_name = "attiny4313",
1553 .features = featureSet(&[_]Feature{
1554 .avr25,
1555 }),
1556 };
1557 pub const attiny43u = Cpu{
1558 .name = "attiny43u",
1559 .llvm_name = "attiny43u",
1560 .features = featureSet(&[_]Feature{
1561 .avr25,
1562 }),
1563 };
1564 pub const attiny44 = Cpu{
1565 .name = "attiny44",
1566 .llvm_name = "attiny44",
1567 .features = featureSet(&[_]Feature{
1568 .avr25,
1569 }),
1570 };
1571 pub const attiny44a = Cpu{
1572 .name = "attiny44a",
1573 .llvm_name = "attiny44a",
1574 .features = featureSet(&[_]Feature{
1575 .avr25,
1576 }),
1577 };
1578 pub const attiny45 = Cpu{
1579 .name = "attiny45",
1580 .llvm_name = "attiny45",
1581 .features = featureSet(&[_]Feature{
1582 .avr25,
1583 }),
1584 };
1585 pub const attiny461 = Cpu{
1586 .name = "attiny461",
1587 .llvm_name = "attiny461",
1588 .features = featureSet(&[_]Feature{
1589 .avr25,
1590 }),
1591 };
1592 pub const attiny461a = Cpu{
1593 .name = "attiny461a",
1594 .llvm_name = "attiny461a",
1595 .features = featureSet(&[_]Feature{
1596 .avr25,
1597 }),
1598 };
1599 pub const attiny48 = Cpu{
1600 .name = "attiny48",
1601 .llvm_name = "attiny48",
1602 .features = featureSet(&[_]Feature{
1603 .avr25,
1604 }),
1605 };
1606 pub const attiny5 = Cpu{
1607 .name = "attiny5",
1608 .llvm_name = "attiny5",
1609 .features = featureSet(&[_]Feature{
1610 .avrtiny,
1611 }),
1612 };
1613 pub const attiny828 = Cpu{
1614 .name = "attiny828",
1615 .llvm_name = "attiny828",
1616 .features = featureSet(&[_]Feature{
1617 .avr25,
1618 }),
1619 };
1620 pub const attiny84 = Cpu{
1621 .name = "attiny84",
1622 .llvm_name = "attiny84",
1623 .features = featureSet(&[_]Feature{
1624 .avr25,
1625 }),
1626 };
1627 pub const attiny84a = Cpu{
1628 .name = "attiny84a",
1629 .llvm_name = "attiny84a",
1630 .features = featureSet(&[_]Feature{
1631 .avr25,
1632 }),
1633 };
1634 pub const attiny85 = Cpu{
1635 .name = "attiny85",
1636 .llvm_name = "attiny85",
1637 .features = featureSet(&[_]Feature{
1638 .avr25,
1639 }),
1640 };
1641 pub const attiny861 = Cpu{
1642 .name = "attiny861",
1643 .llvm_name = "attiny861",
1644 .features = featureSet(&[_]Feature{
1645 .avr25,
1646 }),
1647 };
1648 pub const attiny861a = Cpu{
1649 .name = "attiny861a",
1650 .llvm_name = "attiny861a",
1651 .features = featureSet(&[_]Feature{
1652 .avr25,
1653 }),
1654 };
1655 pub const attiny87 = Cpu{
1656 .name = "attiny87",
1657 .llvm_name = "attiny87",
1658 .features = featureSet(&[_]Feature{
1659 .avr25,
1660 }),
1661 };
1662 pub const attiny88 = Cpu{
1663 .name = "attiny88",
1664 .llvm_name = "attiny88",
1665 .features = featureSet(&[_]Feature{
1666 .avr25,
1667 }),
1668 };
1669 pub const attiny9 = Cpu{
1670 .name = "attiny9",
1671 .llvm_name = "attiny9",
1672 .features = featureSet(&[_]Feature{
1673 .avrtiny,
1674 }),
1675 };
1676 pub const atxmega128a1 = Cpu{
1677 .name = "atxmega128a1",
1678 .llvm_name = "atxmega128a1",
1679 .features = featureSet(&[_]Feature{
1680 .xmega,
1681 }),
1682 };
1683 pub const atxmega128a1u = Cpu{
1684 .name = "atxmega128a1u",
1685 .llvm_name = "atxmega128a1u",
1686 .features = featureSet(&[_]Feature{
1687 .xmegau,
1688 }),
1689 };
1690 pub const atxmega128a3 = Cpu{
1691 .name = "atxmega128a3",
1692 .llvm_name = "atxmega128a3",
1693 .features = featureSet(&[_]Feature{
1694 .xmega,
1695 }),
1696 };
1697 pub const atxmega128a3u = Cpu{
1698 .name = "atxmega128a3u",
1699 .llvm_name = "atxmega128a3u",
1700 .features = featureSet(&[_]Feature{
1701 .xmegau,
1702 }),
1703 };
1704 pub const atxmega128a4u = Cpu{
1705 .name = "atxmega128a4u",
1706 .llvm_name = "atxmega128a4u",
1707 .features = featureSet(&[_]Feature{
1708 .xmegau,
1709 }),
1710 };
1711 pub const atxmega128b1 = Cpu{
1712 .name = "atxmega128b1",
1713 .llvm_name = "atxmega128b1",
1714 .features = featureSet(&[_]Feature{
1715 .xmegau,
1716 }),
1717 };
1718 pub const atxmega128b3 = Cpu{
1719 .name = "atxmega128b3",
1720 .llvm_name = "atxmega128b3",
1721 .features = featureSet(&[_]Feature{
1722 .xmegau,
1723 }),
1724 };
1725 pub const atxmega128c3 = Cpu{
1726 .name = "atxmega128c3",
1727 .llvm_name = "atxmega128c3",
1728 .features = featureSet(&[_]Feature{
1729 .xmegau,
1730 }),
1731 };
1732 pub const atxmega128d3 = Cpu{
1733 .name = "atxmega128d3",
1734 .llvm_name = "atxmega128d3",
1735 .features = featureSet(&[_]Feature{
1736 .xmega,
1737 }),
1738 };
1739 pub const atxmega128d4 = Cpu{
1740 .name = "atxmega128d4",
1741 .llvm_name = "atxmega128d4",
1742 .features = featureSet(&[_]Feature{
1743 .xmega,
1744 }),
1745 };
1746 pub const atxmega16a4 = Cpu{
1747 .name = "atxmega16a4",
1748 .llvm_name = "atxmega16a4",
1749 .features = featureSet(&[_]Feature{
1750 .xmega,
1751 }),
1752 };
1753 pub const atxmega16a4u = Cpu{
1754 .name = "atxmega16a4u",
1755 .llvm_name = "atxmega16a4u",
1756 .features = featureSet(&[_]Feature{
1757 .xmegau,
1758 }),
1759 };
1760 pub const atxmega16c4 = Cpu{
1761 .name = "atxmega16c4",
1762 .llvm_name = "atxmega16c4",
1763 .features = featureSet(&[_]Feature{
1764 .xmegau,
1765 }),
1766 };
1767 pub const atxmega16d4 = Cpu{
1768 .name = "atxmega16d4",
1769 .llvm_name = "atxmega16d4",
1770 .features = featureSet(&[_]Feature{
1771 .xmega,
1772 }),
1773 };
1774 pub const atxmega16e5 = Cpu{
1775 .name = "atxmega16e5",
1776 .llvm_name = "atxmega16e5",
1777 .features = featureSet(&[_]Feature{
1778 .xmega,
1779 }),
1780 };
1781 pub const atxmega192a3 = Cpu{
1782 .name = "atxmega192a3",
1783 .llvm_name = "atxmega192a3",
1784 .features = featureSet(&[_]Feature{
1785 .xmega,
1786 }),
1787 };
1788 pub const atxmega192a3u = Cpu{
1789 .name = "atxmega192a3u",
1790 .llvm_name = "atxmega192a3u",
1791 .features = featureSet(&[_]Feature{
1792 .xmegau,
1793 }),
1794 };
1795 pub const atxmega192c3 = Cpu{
1796 .name = "atxmega192c3",
1797 .llvm_name = "atxmega192c3",
1798 .features = featureSet(&[_]Feature{
1799 .xmegau,
1800 }),
1801 };
1802 pub const atxmega192d3 = Cpu{
1803 .name = "atxmega192d3",
1804 .llvm_name = "atxmega192d3",
1805 .features = featureSet(&[_]Feature{
1806 .xmega,
1807 }),
1808 };
1809 pub const atxmega256a3 = Cpu{
1810 .name = "atxmega256a3",
1811 .llvm_name = "atxmega256a3",
1812 .features = featureSet(&[_]Feature{
1813 .xmega,
1814 }),
1815 };
1816 pub const atxmega256a3b = Cpu{
1817 .name = "atxmega256a3b",
1818 .llvm_name = "atxmega256a3b",
1819 .features = featureSet(&[_]Feature{
1820 .xmega,
1821 }),
1822 };
1823 pub const atxmega256a3bu = Cpu{
1824 .name = "atxmega256a3bu",
1825 .llvm_name = "atxmega256a3bu",
1826 .features = featureSet(&[_]Feature{
1827 .xmegau,
1828 }),
1829 };
1830 pub const atxmega256a3u = Cpu{
1831 .name = "atxmega256a3u",
1832 .llvm_name = "atxmega256a3u",
1833 .features = featureSet(&[_]Feature{
1834 .xmegau,
1835 }),
1836 };
1837 pub const atxmega256c3 = Cpu{
1838 .name = "atxmega256c3",
1839 .llvm_name = "atxmega256c3",
1840 .features = featureSet(&[_]Feature{
1841 .xmegau,
1842 }),
1843 };
1844 pub const atxmega256d3 = Cpu{
1845 .name = "atxmega256d3",
1846 .llvm_name = "atxmega256d3",
1847 .features = featureSet(&[_]Feature{
1848 .xmega,
1849 }),
1850 };
1851 pub const atxmega32a4 = Cpu{
1852 .name = "atxmega32a4",
1853 .llvm_name = "atxmega32a4",
1854 .features = featureSet(&[_]Feature{
1855 .xmega,
1856 }),
1857 };
1858 pub const atxmega32a4u = Cpu{
1859 .name = "atxmega32a4u",
1860 .llvm_name = "atxmega32a4u",
1861 .features = featureSet(&[_]Feature{
1862 .xmegau,
1863 }),
1864 };
1865 pub const atxmega32c4 = Cpu{
1866 .name = "atxmega32c4",
1867 .llvm_name = "atxmega32c4",
1868 .features = featureSet(&[_]Feature{
1869 .xmegau,
1870 }),
1871 };
1872 pub const atxmega32d4 = Cpu{
1873 .name = "atxmega32d4",
1874 .llvm_name = "atxmega32d4",
1875 .features = featureSet(&[_]Feature{
1876 .xmega,
1877 }),
1878 };
1879 pub const atxmega32e5 = Cpu{
1880 .name = "atxmega32e5",
1881 .llvm_name = "atxmega32e5",
1882 .features = featureSet(&[_]Feature{
1883 .xmega,
1884 }),
1885 };
1886 pub const atxmega32x1 = Cpu{
1887 .name = "atxmega32x1",
1888 .llvm_name = "atxmega32x1",
1889 .features = featureSet(&[_]Feature{
1890 .xmega,
1891 }),
1892 };
1893 pub const atxmega384c3 = Cpu{
1894 .name = "atxmega384c3",
1895 .llvm_name = "atxmega384c3",
1896 .features = featureSet(&[_]Feature{
1897 .xmegau,
1898 }),
1899 };
1900 pub const atxmega384d3 = Cpu{
1901 .name = "atxmega384d3",
1902 .llvm_name = "atxmega384d3",
1903 .features = featureSet(&[_]Feature{
1904 .xmega,
1905 }),
1906 };
1907 pub const atxmega64a1 = Cpu{
1908 .name = "atxmega64a1",
1909 .llvm_name = "atxmega64a1",
1910 .features = featureSet(&[_]Feature{
1911 .xmega,
1912 }),
1913 };
1914 pub const atxmega64a1u = Cpu{
1915 .name = "atxmega64a1u",
1916 .llvm_name = "atxmega64a1u",
1917 .features = featureSet(&[_]Feature{
1918 .xmegau,
1919 }),
1920 };
1921 pub const atxmega64a3 = Cpu{
1922 .name = "atxmega64a3",
1923 .llvm_name = "atxmega64a3",
1924 .features = featureSet(&[_]Feature{
1925 .xmega,
1926 }),
1927 };
1928 pub const atxmega64a3u = Cpu{
1929 .name = "atxmega64a3u",
1930 .llvm_name = "atxmega64a3u",
1931 .features = featureSet(&[_]Feature{
1932 .xmegau,
1933 }),
1934 };
1935 pub const atxmega64a4u = Cpu{
1936 .name = "atxmega64a4u",
1937 .llvm_name = "atxmega64a4u",
1938 .features = featureSet(&[_]Feature{
1939 .xmegau,
1940 }),
1941 };
1942 pub const atxmega64b1 = Cpu{
1943 .name = "atxmega64b1",
1944 .llvm_name = "atxmega64b1",
1945 .features = featureSet(&[_]Feature{
1946 .xmegau,
1947 }),
1948 };
1949 pub const atxmega64b3 = Cpu{
1950 .name = "atxmega64b3",
1951 .llvm_name = "atxmega64b3",
1952 .features = featureSet(&[_]Feature{
1953 .xmegau,
1954 }),
1955 };
1956 pub const atxmega64c3 = Cpu{
1957 .name = "atxmega64c3",
1958 .llvm_name = "atxmega64c3",
1959 .features = featureSet(&[_]Feature{
1960 .xmegau,
1961 }),
1962 };
1963 pub const atxmega64d3 = Cpu{
1964 .name = "atxmega64d3",
1965 .llvm_name = "atxmega64d3",
1966 .features = featureSet(&[_]Feature{
1967 .xmega,
1968 }),
1969 };
1970 pub const atxmega64d4 = Cpu{
1971 .name = "atxmega64d4",
1972 .llvm_name = "atxmega64d4",
1973 .features = featureSet(&[_]Feature{
1974 .xmega,
1975 }),
1976 };
1977 pub const atxmega8e5 = Cpu{
1978 .name = "atxmega8e5",
1979 .llvm_name = "atxmega8e5",
1980 .features = featureSet(&[_]Feature{
1981 .xmega,
1982 }),
1983 };
1984 pub const avr1 = Cpu{
1985 .name = "avr1",
1986 .llvm_name = "avr1",
1987 .features = featureSet(&[_]Feature{
1988 .avr1,
1989 }),
1990 };
1991 pub const avr2 = Cpu{
1992 .name = "avr2",
1993 .llvm_name = "avr2",
1994 .features = featureSet(&[_]Feature{
1995 .avr2,
1996 }),
1997 };
1998 pub const avr25 = Cpu{
1999 .name = "avr25",
2000 .llvm_name = "avr25",
2001 .features = featureSet(&[_]Feature{
2002 .avr25,
2003 }),
2004 };
2005 pub const avr3 = Cpu{
2006 .name = "avr3",
2007 .llvm_name = "avr3",
2008 .features = featureSet(&[_]Feature{
2009 .avr3,
2010 }),
2011 };
2012 pub const avr31 = Cpu{
2013 .name = "avr31",
2014 .llvm_name = "avr31",
2015 .features = featureSet(&[_]Feature{
2016 .avr31,
2017 }),
2018 };
2019 pub const avr35 = Cpu{
2020 .name = "avr35",
2021 .llvm_name = "avr35",
2022 .features = featureSet(&[_]Feature{
2023 .avr35,
2024 }),
2025 };
2026 pub const avr4 = Cpu{
2027 .name = "avr4",
2028 .llvm_name = "avr4",
2029 .features = featureSet(&[_]Feature{
2030 .avr4,
2031 }),
2032 };
2033 pub const avr5 = Cpu{
2034 .name = "avr5",
2035 .llvm_name = "avr5",
2036 .features = featureSet(&[_]Feature{
2037 .avr5,
2038 }),
2039 };
2040 pub const avr51 = Cpu{
2041 .name = "avr51",
2042 .llvm_name = "avr51",
2043 .features = featureSet(&[_]Feature{
2044 .avr51,
2045 }),
2046 };
2047 pub const avr6 = Cpu{
2048 .name = "avr6",
2049 .llvm_name = "avr6",
2050 .features = featureSet(&[_]Feature{
2051 .avr6,
2052 }),
2053 };
2054 pub const avrtiny = Cpu{
2055 .name = "avrtiny",
2056 .llvm_name = "avrtiny",
2057 .features = featureSet(&[_]Feature{
2058 .avrtiny,
2059 }),
2060 };
2061 pub const avrxmega1 = Cpu{
2062 .name = "avrxmega1",
2063 .llvm_name = "avrxmega1",
2064 .features = featureSet(&[_]Feature{
2065 .xmega,
2066 }),
2067 };
2068 pub const avrxmega2 = Cpu{
2069 .name = "avrxmega2",
2070 .llvm_name = "avrxmega2",
2071 .features = featureSet(&[_]Feature{
2072 .xmega,
2073 }),
2074 };
2075 pub const avrxmega3 = Cpu{
2076 .name = "avrxmega3",
2077 .llvm_name = "avrxmega3",
2078 .features = featureSet(&[_]Feature{
2079 .xmega,
2080 }),
2081 };
2082 pub const avrxmega4 = Cpu{
2083 .name = "avrxmega4",
2084 .llvm_name = "avrxmega4",
2085 .features = featureSet(&[_]Feature{
2086 .xmega,
2087 }),
2088 };
2089 pub const avrxmega5 = Cpu{
2090 .name = "avrxmega5",
2091 .llvm_name = "avrxmega5",
2092 .features = featureSet(&[_]Feature{
2093 .xmega,
2094 }),
2095 };
2096 pub const avrxmega6 = Cpu{
2097 .name = "avrxmega6",
2098 .llvm_name = "avrxmega6",
2099 .features = featureSet(&[_]Feature{
2100 .xmega,
2101 }),
2102 };
2103 pub const avrxmega7 = Cpu{
2104 .name = "avrxmega7",
2105 .llvm_name = "avrxmega7",
2106 .features = featureSet(&[_]Feature{
2107 .xmega,
2108 }),
2109 };
2110 pub const m3000 = Cpu{
2111 .name = "m3000",
2112 .llvm_name = "m3000",
2113 .features = featureSet(&[_]Feature{
2114 .avr5,
2115 }),
2116 };
2117};
2118
2119/// All avr CPUs, sorted alphabetically by name.
2120/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2121/// compiler has inefficient memory and CPU usage, affecting build times.
2122pub const all_cpus = &[_]*const Cpu{
2123 &cpu.at43usb320,
2124 &cpu.at43usb355,
2125 &cpu.at76c711,
2126 &cpu.at86rf401,
2127 &cpu.at90c8534,
2128 &cpu.at90can128,
2129 &cpu.at90can32,
2130 &cpu.at90can64,
2131 &cpu.at90pwm1,
2132 &cpu.at90pwm161,
2133 &cpu.at90pwm2,
2134 &cpu.at90pwm216,
2135 &cpu.at90pwm2b,
2136 &cpu.at90pwm3,
2137 &cpu.at90pwm316,
2138 &cpu.at90pwm3b,
2139 &cpu.at90pwm81,
2140 &cpu.at90s1200,
2141 &cpu.at90s2313,
2142 &cpu.at90s2323,
2143 &cpu.at90s2333,
2144 &cpu.at90s2343,
2145 &cpu.at90s4414,
2146 &cpu.at90s4433,
2147 &cpu.at90s4434,
2148 &cpu.at90s8515,
2149 &cpu.at90s8535,
2150 &cpu.at90scr100,
2151 &cpu.at90usb1286,
2152 &cpu.at90usb1287,
2153 &cpu.at90usb162,
2154 &cpu.at90usb646,
2155 &cpu.at90usb647,
2156 &cpu.at90usb82,
2157 &cpu.at94k,
2158 &cpu.ata5272,
2159 &cpu.ata5505,
2160 &cpu.ata5790,
2161 &cpu.ata5795,
2162 &cpu.ata6285,
2163 &cpu.ata6286,
2164 &cpu.ata6289,
2165 &cpu.atmega103,
2166 &cpu.atmega128,
2167 &cpu.atmega1280,
2168 &cpu.atmega1281,
2169 &cpu.atmega1284,
2170 &cpu.atmega1284p,
2171 &cpu.atmega1284rfr2,
2172 &cpu.atmega128a,
2173 &cpu.atmega128rfa1,
2174 &cpu.atmega128rfr2,
2175 &cpu.atmega16,
2176 &cpu.atmega161,
2177 &cpu.atmega162,
2178 &cpu.atmega163,
2179 &cpu.atmega164a,
2180 &cpu.atmega164p,
2181 &cpu.atmega164pa,
2182 &cpu.atmega165,
2183 &cpu.atmega165a,
2184 &cpu.atmega165p,
2185 &cpu.atmega165pa,
2186 &cpu.atmega168,
2187 &cpu.atmega168a,
2188 &cpu.atmega168p,
2189 &cpu.atmega168pa,
2190 &cpu.atmega169,
2191 &cpu.atmega169a,
2192 &cpu.atmega169p,
2193 &cpu.atmega169pa,
2194 &cpu.atmega16a,
2195 &cpu.atmega16hva,
2196 &cpu.atmega16hva2,
2197 &cpu.atmega16hvb,
2198 &cpu.atmega16hvbrevb,
2199 &cpu.atmega16m1,
2200 &cpu.atmega16u2,
2201 &cpu.atmega16u4,
2202 &cpu.atmega2560,
2203 &cpu.atmega2561,
2204 &cpu.atmega2564rfr2,
2205 &cpu.atmega256rfr2,
2206 &cpu.atmega32,
2207 &cpu.atmega323,
2208 &cpu.atmega324a,
2209 &cpu.atmega324p,
2210 &cpu.atmega324pa,
2211 &cpu.atmega325,
2212 &cpu.atmega3250,
2213 &cpu.atmega3250a,
2214 &cpu.atmega3250p,
2215 &cpu.atmega3250pa,
2216 &cpu.atmega325a,
2217 &cpu.atmega325p,
2218 &cpu.atmega325pa,
2219 &cpu.atmega328,
2220 &cpu.atmega328p,
2221 &cpu.atmega329,
2222 &cpu.atmega3290,
2223 &cpu.atmega3290a,
2224 &cpu.atmega3290p,
2225 &cpu.atmega3290pa,
2226 &cpu.atmega329a,
2227 &cpu.atmega329p,
2228 &cpu.atmega329pa,
2229 &cpu.atmega32a,
2230 &cpu.atmega32c1,
2231 &cpu.atmega32hvb,
2232 &cpu.atmega32hvbrevb,
2233 &cpu.atmega32m1,
2234 &cpu.atmega32u2,
2235 &cpu.atmega32u4,
2236 &cpu.atmega32u6,
2237 &cpu.atmega406,
2238 &cpu.atmega48,
2239 &cpu.atmega48a,
2240 &cpu.atmega48p,
2241 &cpu.atmega48pa,
2242 &cpu.atmega64,
2243 &cpu.atmega640,
2244 &cpu.atmega644,
2245 &cpu.atmega644a,
2246 &cpu.atmega644p,
2247 &cpu.atmega644pa,
2248 &cpu.atmega644rfr2,
2249 &cpu.atmega645,
2250 &cpu.atmega6450,
2251 &cpu.atmega6450a,
2252 &cpu.atmega6450p,
2253 &cpu.atmega645a,
2254 &cpu.atmega645p,
2255 &cpu.atmega649,
2256 &cpu.atmega6490,
2257 &cpu.atmega6490a,
2258 &cpu.atmega6490p,
2259 &cpu.atmega649a,
2260 &cpu.atmega649p,
2261 &cpu.atmega64a,
2262 &cpu.atmega64c1,
2263 &cpu.atmega64hve,
2264 &cpu.atmega64m1,
2265 &cpu.atmega64rfr2,
2266 &cpu.atmega8,
2267 &cpu.atmega8515,
2268 &cpu.atmega8535,
2269 &cpu.atmega88,
2270 &cpu.atmega88a,
2271 &cpu.atmega88p,
2272 &cpu.atmega88pa,
2273 &cpu.atmega8a,
2274 &cpu.atmega8hva,
2275 &cpu.atmega8u2,
2276 &cpu.attiny10,
2277 &cpu.attiny102,
2278 &cpu.attiny104,
2279 &cpu.attiny11,
2280 &cpu.attiny12,
2281 &cpu.attiny13,
2282 &cpu.attiny13a,
2283 &cpu.attiny15,
2284 &cpu.attiny1634,
2285 &cpu.attiny167,
2286 &cpu.attiny20,
2287 &cpu.attiny22,
2288 &cpu.attiny2313,
2289 &cpu.attiny2313a,
2290 &cpu.attiny24,
2291 &cpu.attiny24a,
2292 &cpu.attiny25,
2293 &cpu.attiny26,
2294 &cpu.attiny261,
2295 &cpu.attiny261a,
2296 &cpu.attiny28,
2297 &cpu.attiny4,
2298 &cpu.attiny40,
2299 &cpu.attiny4313,
2300 &cpu.attiny43u,
2301 &cpu.attiny44,
2302 &cpu.attiny44a,
2303 &cpu.attiny45,
2304 &cpu.attiny461,
2305 &cpu.attiny461a,
2306 &cpu.attiny48,
2307 &cpu.attiny5,
2308 &cpu.attiny828,
2309 &cpu.attiny84,
2310 &cpu.attiny84a,
2311 &cpu.attiny85,
2312 &cpu.attiny861,
2313 &cpu.attiny861a,
2314 &cpu.attiny87,
2315 &cpu.attiny88,
2316 &cpu.attiny9,
2317 &cpu.atxmega128a1,
2318 &cpu.atxmega128a1u,
2319 &cpu.atxmega128a3,
2320 &cpu.atxmega128a3u,
2321 &cpu.atxmega128a4u,
2322 &cpu.atxmega128b1,
2323 &cpu.atxmega128b3,
2324 &cpu.atxmega128c3,
2325 &cpu.atxmega128d3,
2326 &cpu.atxmega128d4,
2327 &cpu.atxmega16a4,
2328 &cpu.atxmega16a4u,
2329 &cpu.atxmega16c4,
2330 &cpu.atxmega16d4,
2331 &cpu.atxmega16e5,
2332 &cpu.atxmega192a3,
2333 &cpu.atxmega192a3u,
2334 &cpu.atxmega192c3,
2335 &cpu.atxmega192d3,
2336 &cpu.atxmega256a3,
2337 &cpu.atxmega256a3b,
2338 &cpu.atxmega256a3bu,
2339 &cpu.atxmega256a3u,
2340 &cpu.atxmega256c3,
2341 &cpu.atxmega256d3,
2342 &cpu.atxmega32a4,
2343 &cpu.atxmega32a4u,
2344 &cpu.atxmega32c4,
2345 &cpu.atxmega32d4,
2346 &cpu.atxmega32e5,
2347 &cpu.atxmega32x1,
2348 &cpu.atxmega384c3,
2349 &cpu.atxmega384d3,
2350 &cpu.atxmega64a1,
2351 &cpu.atxmega64a1u,
2352 &cpu.atxmega64a3,
2353 &cpu.atxmega64a3u,
2354 &cpu.atxmega64a4u,
2355 &cpu.atxmega64b1,
2356 &cpu.atxmega64b3,
2357 &cpu.atxmega64c3,
2358 &cpu.atxmega64d3,
2359 &cpu.atxmega64d4,
2360 &cpu.atxmega8e5,
2361 &cpu.avr1,
2362 &cpu.avr2,
2363 &cpu.avr25,
2364 &cpu.avr3,
2365 &cpu.avr31,
2366 &cpu.avr35,
2367 &cpu.avr4,
2368 &cpu.avr5,
2369 &cpu.avr51,
2370 &cpu.avr6,
2371 &cpu.avrtiny,
2372 &cpu.avrxmega1,
2373 &cpu.avrxmega2,
2374 &cpu.avrxmega3,
2375 &cpu.avrxmega4,
2376 &cpu.avrxmega5,
2377 &cpu.avrxmega6,
2378 &cpu.avrxmega7,
2379 &cpu.m3000,
2380};
lib/std/target/bpf.zig created+76
......@@ -0,0 +1,76 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 alu32,
6 dummy,
7 dwarfris,
8};
9
10pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
11
12pub const all_features = blk: {
13 const len = @typeInfo(Feature).Enum.fields.len;
14 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
15 var result: [len]Cpu.Feature = undefined;
16 result[@enumToInt(Feature.alu32)] = .{
17 .llvm_name = "alu32",
18 .description = "Enable ALU32 instructions",
19 .dependencies = featureSet(&[_]Feature{}),
20 };
21 result[@enumToInt(Feature.dummy)] = .{
22 .llvm_name = "dummy",
23 .description = "unused feature",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.dwarfris)] = .{
27 .llvm_name = "dwarfris",
28 .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 const ti = @typeInfo(Feature);
32 for (result) |*elem, i| {
33 elem.index = i;
34 elem.name = ti.Enum.fields[i].name;
35 }
36 break :blk result;
37};
38
39pub const cpu = struct {
40 pub const generic = Cpu{
41 .name = "generic",
42 .llvm_name = "generic",
43 .features = featureSet(&[_]Feature{}),
44 };
45 pub const probe = Cpu{
46 .name = "probe",
47 .llvm_name = "probe",
48 .features = featureSet(&[_]Feature{}),
49 };
50 pub const v1 = Cpu{
51 .name = "v1",
52 .llvm_name = "v1",
53 .features = featureSet(&[_]Feature{}),
54 };
55 pub const v2 = Cpu{
56 .name = "v2",
57 .llvm_name = "v2",
58 .features = featureSet(&[_]Feature{}),
59 };
60 pub const v3 = Cpu{
61 .name = "v3",
62 .llvm_name = "v3",
63 .features = featureSet(&[_]Feature{}),
64 };
65};
66
67/// All bpf CPUs, sorted alphabetically by name.
68/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
69/// compiler has inefficient memory and CPU usage, affecting build times.
70pub const all_cpus = &[_]*const Cpu{
71 &cpu.generic,
72 &cpu.probe,
73 &cpu.v1,
74 &cpu.v2,
75 &cpu.v3,
76};
lib/std/target/hexagon.zig created+312
......@@ -0,0 +1,312 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 duplex,
6 hvx,
7 hvx_length128b,
8 hvx_length64b,
9 hvxv60,
10 hvxv62,
11 hvxv65,
12 hvxv66,
13 long_calls,
14 mem_noshuf,
15 memops,
16 noreturn_stack_elim,
17 nvj,
18 nvs,
19 packets,
20 reserved_r19,
21 small_data,
22 v5,
23 v55,
24 v60,
25 v62,
26 v65,
27 v66,
28 zreg,
29};
30
31pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
32
33pub const all_features = blk: {
34 const len = @typeInfo(Feature).Enum.fields.len;
35 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
36 var result: [len]Cpu.Feature = undefined;
37 result[@enumToInt(Feature.duplex)] = .{
38 .llvm_name = "duplex",
39 .description = "Enable generation of duplex instruction",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.hvx)] = .{
43 .llvm_name = "hvx",
44 .description = "Hexagon HVX instructions",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hvx_length128b)] = .{
48 .llvm_name = "hvx-length128b",
49 .description = "Hexagon HVX 128B instructions",
50 .dependencies = featureSet(&[_]Feature{
51 .hvx,
52 }),
53 };
54 result[@enumToInt(Feature.hvx_length64b)] = .{
55 .llvm_name = "hvx-length64b",
56 .description = "Hexagon HVX 64B instructions",
57 .dependencies = featureSet(&[_]Feature{
58 .hvx,
59 }),
60 };
61 result[@enumToInt(Feature.hvxv60)] = .{
62 .llvm_name = "hvxv60",
63 .description = "Hexagon HVX instructions",
64 .dependencies = featureSet(&[_]Feature{
65 .hvx,
66 }),
67 };
68 result[@enumToInt(Feature.hvxv62)] = .{
69 .llvm_name = "hvxv62",
70 .description = "Hexagon HVX instructions",
71 .dependencies = featureSet(&[_]Feature{
72 .hvx,
73 .hvxv60,
74 }),
75 };
76 result[@enumToInt(Feature.hvxv65)] = .{
77 .llvm_name = "hvxv65",
78 .description = "Hexagon HVX instructions",
79 .dependencies = featureSet(&[_]Feature{
80 .hvx,
81 .hvxv60,
82 .hvxv62,
83 }),
84 };
85 result[@enumToInt(Feature.hvxv66)] = .{
86 .llvm_name = "hvxv66",
87 .description = "Hexagon HVX instructions",
88 .dependencies = featureSet(&[_]Feature{
89 .hvx,
90 .hvxv60,
91 .hvxv62,
92 .hvxv65,
93 .zreg,
94 }),
95 };
96 result[@enumToInt(Feature.long_calls)] = .{
97 .llvm_name = "long-calls",
98 .description = "Use constant-extended calls",
99 .dependencies = featureSet(&[_]Feature{}),
100 };
101 result[@enumToInt(Feature.mem_noshuf)] = .{
102 .llvm_name = "mem_noshuf",
103 .description = "Supports mem_noshuf feature",
104 .dependencies = featureSet(&[_]Feature{}),
105 };
106 result[@enumToInt(Feature.memops)] = .{
107 .llvm_name = "memops",
108 .description = "Use memop instructions",
109 .dependencies = featureSet(&[_]Feature{}),
110 };
111 result[@enumToInt(Feature.noreturn_stack_elim)] = .{
112 .llvm_name = "noreturn-stack-elim",
113 .description = "Eliminate stack allocation in a noreturn function when possible",
114 .dependencies = featureSet(&[_]Feature{}),
115 };
116 result[@enumToInt(Feature.nvj)] = .{
117 .llvm_name = "nvj",
118 .description = "Support for new-value jumps",
119 .dependencies = featureSet(&[_]Feature{
120 .packets,
121 }),
122 };
123 result[@enumToInt(Feature.nvs)] = .{
124 .llvm_name = "nvs",
125 .description = "Support for new-value stores",
126 .dependencies = featureSet(&[_]Feature{
127 .packets,
128 }),
129 };
130 result[@enumToInt(Feature.packets)] = .{
131 .llvm_name = "packets",
132 .description = "Support for instruction packets",
133 .dependencies = featureSet(&[_]Feature{}),
134 };
135 result[@enumToInt(Feature.reserved_r19)] = .{
136 .llvm_name = "reserved-r19",
137 .description = "Reserve register R19",
138 .dependencies = featureSet(&[_]Feature{}),
139 };
140 result[@enumToInt(Feature.small_data)] = .{
141 .llvm_name = "small-data",
142 .description = "Allow GP-relative addressing of global variables",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@enumToInt(Feature.v5)] = .{
146 .llvm_name = "v5",
147 .description = "Enable Hexagon V5 architecture",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@enumToInt(Feature.v55)] = .{
151 .llvm_name = "v55",
152 .description = "Enable Hexagon V55 architecture",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@enumToInt(Feature.v60)] = .{
156 .llvm_name = "v60",
157 .description = "Enable Hexagon V60 architecture",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@enumToInt(Feature.v62)] = .{
161 .llvm_name = "v62",
162 .description = "Enable Hexagon V62 architecture",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@enumToInt(Feature.v65)] = .{
166 .llvm_name = "v65",
167 .description = "Enable Hexagon V65 architecture",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@enumToInt(Feature.v66)] = .{
171 .llvm_name = "v66",
172 .description = "Enable Hexagon V66 architecture",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@enumToInt(Feature.zreg)] = .{
176 .llvm_name = "zreg",
177 .description = "Hexagon ZReg extension instructions",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 const ti = @typeInfo(Feature);
181 for (result) |*elem, i| {
182 elem.index = i;
183 elem.name = ti.Enum.fields[i].name;
184 }
185 break :blk result;
186};
187
188pub const cpu = struct {
189 pub const generic = Cpu{
190 .name = "generic",
191 .llvm_name = "generic",
192 .features = featureSet(&[_]Feature{
193 .duplex,
194 .memops,
195 .nvj,
196 .nvs,
197 .packets,
198 .small_data,
199 .v5,
200 .v55,
201 .v60,
202 }),
203 };
204 pub const hexagonv5 = Cpu{
205 .name = "hexagonv5",
206 .llvm_name = "hexagonv5",
207 .features = featureSet(&[_]Feature{
208 .duplex,
209 .memops,
210 .nvj,
211 .nvs,
212 .packets,
213 .small_data,
214 .v5,
215 }),
216 };
217 pub const hexagonv55 = Cpu{
218 .name = "hexagonv55",
219 .llvm_name = "hexagonv55",
220 .features = featureSet(&[_]Feature{
221 .duplex,
222 .memops,
223 .nvj,
224 .nvs,
225 .packets,
226 .small_data,
227 .v5,
228 .v55,
229 }),
230 };
231 pub const hexagonv60 = Cpu{
232 .name = "hexagonv60",
233 .llvm_name = "hexagonv60",
234 .features = featureSet(&[_]Feature{
235 .duplex,
236 .memops,
237 .nvj,
238 .nvs,
239 .packets,
240 .small_data,
241 .v5,
242 .v55,
243 .v60,
244 }),
245 };
246 pub const hexagonv62 = Cpu{
247 .name = "hexagonv62",
248 .llvm_name = "hexagonv62",
249 .features = featureSet(&[_]Feature{
250 .duplex,
251 .memops,
252 .nvj,
253 .nvs,
254 .packets,
255 .small_data,
256 .v5,
257 .v55,
258 .v60,
259 .v62,
260 }),
261 };
262 pub const hexagonv65 = Cpu{
263 .name = "hexagonv65",
264 .llvm_name = "hexagonv65",
265 .features = featureSet(&[_]Feature{
266 .duplex,
267 .mem_noshuf,
268 .memops,
269 .nvj,
270 .nvs,
271 .packets,
272 .small_data,
273 .v5,
274 .v55,
275 .v60,
276 .v62,
277 .v65,
278 }),
279 };
280 pub const hexagonv66 = Cpu{
281 .name = "hexagonv66",
282 .llvm_name = "hexagonv66",
283 .features = featureSet(&[_]Feature{
284 .duplex,
285 .mem_noshuf,
286 .memops,
287 .nvj,
288 .nvs,
289 .packets,
290 .small_data,
291 .v5,
292 .v55,
293 .v60,
294 .v62,
295 .v65,
296 .v66,
297 }),
298 };
299};
300
301/// All hexagon CPUs, sorted alphabetically by name.
302/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
303/// compiler has inefficient memory and CPU usage, affecting build times.
304pub const all_cpus = &[_]*const Cpu{
305 &cpu.generic,
306 &cpu.hexagonv5,
307 &cpu.hexagonv55,
308 &cpu.hexagonv60,
309 &cpu.hexagonv62,
310 &cpu.hexagonv65,
311 &cpu.hexagonv66,
312};
lib/std/target/mips.zig created+518
......@@ -0,0 +1,518 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 abs2008,
6 cnmips,
7 crc,
8 dsp,
9 dspr2,
10 dspr3,
11 eva,
12 fp64,
13 fpxx,
14 ginv,
15 gp64,
16 long_calls,
17 micromips,
18 mips1,
19 mips16,
20 mips2,
21 mips3,
22 mips32,
23 mips32r2,
24 mips32r3,
25 mips32r5,
26 mips32r6,
27 mips3_32,
28 mips3_32r2,
29 mips4,
30 mips4_32,
31 mips4_32r2,
32 mips5,
33 mips5_32r2,
34 mips64,
35 mips64r2,
36 mips64r3,
37 mips64r5,
38 mips64r6,
39 msa,
40 mt,
41 nan2008,
42 noabicalls,
43 nomadd4,
44 nooddspreg,
45 p5600,
46 ptr64,
47 single_float,
48 soft_float,
49 sym32,
50 use_indirect_jump_hazard,
51 use_tcc_in_div,
52 vfpu,
53 virt,
54};
55
56pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
57
58pub const all_features = blk: {
59 const len = @typeInfo(Feature).Enum.fields.len;
60 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
61 var result: [len]Cpu.Feature = undefined;
62 result[@enumToInt(Feature.abs2008)] = .{
63 .llvm_name = "abs2008",
64 .description = "Disable IEEE 754-2008 abs.fmt mode",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.cnmips)] = .{
68 .llvm_name = "cnmips",
69 .description = "Octeon cnMIPS Support",
70 .dependencies = featureSet(&[_]Feature{
71 .mips64r2,
72 }),
73 };
74 result[@enumToInt(Feature.crc)] = .{
75 .llvm_name = "crc",
76 .description = "Mips R6 CRC ASE",
77 .dependencies = featureSet(&[_]Feature{}),
78 };
79 result[@enumToInt(Feature.dsp)] = .{
80 .llvm_name = "dsp",
81 .description = "Mips DSP ASE",
82 .dependencies = featureSet(&[_]Feature{}),
83 };
84 result[@enumToInt(Feature.dspr2)] = .{
85 .llvm_name = "dspr2",
86 .description = "Mips DSP-R2 ASE",
87 .dependencies = featureSet(&[_]Feature{
88 .dsp,
89 }),
90 };
91 result[@enumToInt(Feature.dspr3)] = .{
92 .llvm_name = "dspr3",
93 .description = "Mips DSP-R3 ASE",
94 .dependencies = featureSet(&[_]Feature{
95 .dsp,
96 .dspr2,
97 }),
98 };
99 result[@enumToInt(Feature.eva)] = .{
100 .llvm_name = "eva",
101 .description = "Mips EVA ASE",
102 .dependencies = featureSet(&[_]Feature{}),
103 };
104 result[@enumToInt(Feature.fp64)] = .{
105 .llvm_name = "fp64",
106 .description = "Support 64-bit FP registers",
107 .dependencies = featureSet(&[_]Feature{}),
108 };
109 result[@enumToInt(Feature.fpxx)] = .{
110 .llvm_name = "fpxx",
111 .description = "Support for FPXX",
112 .dependencies = featureSet(&[_]Feature{}),
113 };
114 result[@enumToInt(Feature.ginv)] = .{
115 .llvm_name = "ginv",
116 .description = "Mips Global Invalidate ASE",
117 .dependencies = featureSet(&[_]Feature{}),
118 };
119 result[@enumToInt(Feature.gp64)] = .{
120 .llvm_name = "gp64",
121 .description = "General Purpose Registers are 64-bit wide",
122 .dependencies = featureSet(&[_]Feature{}),
123 };
124 result[@enumToInt(Feature.long_calls)] = .{
125 .llvm_name = "long-calls",
126 .description = "Disable use of the jal instruction",
127 .dependencies = featureSet(&[_]Feature{}),
128 };
129 result[@enumToInt(Feature.micromips)] = .{
130 .llvm_name = "micromips",
131 .description = "microMips mode",
132 .dependencies = featureSet(&[_]Feature{}),
133 };
134 result[@enumToInt(Feature.mips1)] = .{
135 .llvm_name = "mips1",
136 .description = "Mips I ISA Support [highly experimental]",
137 .dependencies = featureSet(&[_]Feature{}),
138 };
139 result[@enumToInt(Feature.mips16)] = .{
140 .llvm_name = "mips16",
141 .description = "Mips16 mode",
142 .dependencies = featureSet(&[_]Feature{}),
143 };
144 result[@enumToInt(Feature.mips2)] = .{
145 .llvm_name = "mips2",
146 .description = "Mips II ISA Support [highly experimental]",
147 .dependencies = featureSet(&[_]Feature{
148 .mips1,
149 }),
150 };
151 result[@enumToInt(Feature.mips3)] = .{
152 .llvm_name = "mips3",
153 .description = "MIPS III ISA Support [highly experimental]",
154 .dependencies = featureSet(&[_]Feature{
155 .fp64,
156 .gp64,
157 .mips2,
158 .mips3_32,
159 .mips3_32r2,
160 }),
161 };
162 result[@enumToInt(Feature.mips32)] = .{
163 .llvm_name = "mips32",
164 .description = "Mips32 ISA Support",
165 .dependencies = featureSet(&[_]Feature{
166 .mips2,
167 .mips3_32,
168 .mips4_32,
169 }),
170 };
171 result[@enumToInt(Feature.mips32r2)] = .{
172 .llvm_name = "mips32r2",
173 .description = "Mips32r2 ISA Support",
174 .dependencies = featureSet(&[_]Feature{
175 .mips32,
176 .mips3_32r2,
177 .mips4_32r2,
178 .mips5_32r2,
179 }),
180 };
181 result[@enumToInt(Feature.mips32r3)] = .{
182 .llvm_name = "mips32r3",
183 .description = "Mips32r3 ISA Support",
184 .dependencies = featureSet(&[_]Feature{
185 .mips32r2,
186 }),
187 };
188 result[@enumToInt(Feature.mips32r5)] = .{
189 .llvm_name = "mips32r5",
190 .description = "Mips32r5 ISA Support",
191 .dependencies = featureSet(&[_]Feature{
192 .mips32r3,
193 }),
194 };
195 result[@enumToInt(Feature.mips32r6)] = .{
196 .llvm_name = "mips32r6",
197 .description = "Mips32r6 ISA Support [experimental]",
198 .dependencies = featureSet(&[_]Feature{
199 .abs2008,
200 .fp64,
201 .mips32r5,
202 .nan2008,
203 }),
204 };
205 result[@enumToInt(Feature.mips3_32)] = .{
206 .llvm_name = "mips3_32",
207 .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
208 .dependencies = featureSet(&[_]Feature{}),
209 };
210 result[@enumToInt(Feature.mips3_32r2)] = .{
211 .llvm_name = "mips3_32r2",
212 .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
213 .dependencies = featureSet(&[_]Feature{}),
214 };
215 result[@enumToInt(Feature.mips4)] = .{
216 .llvm_name = "mips4",
217 .description = "MIPS IV ISA Support",
218 .dependencies = featureSet(&[_]Feature{
219 .mips3,
220 .mips4_32,
221 .mips4_32r2,
222 }),
223 };
224 result[@enumToInt(Feature.mips4_32)] = .{
225 .llvm_name = "mips4_32",
226 .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
227 .dependencies = featureSet(&[_]Feature{}),
228 };
229 result[@enumToInt(Feature.mips4_32r2)] = .{
230 .llvm_name = "mips4_32r2",
231 .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
232 .dependencies = featureSet(&[_]Feature{}),
233 };
234 result[@enumToInt(Feature.mips5)] = .{
235 .llvm_name = "mips5",
236 .description = "MIPS V ISA Support [highly experimental]",
237 .dependencies = featureSet(&[_]Feature{
238 .mips4,
239 .mips5_32r2,
240 }),
241 };
242 result[@enumToInt(Feature.mips5_32r2)] = .{
243 .llvm_name = "mips5_32r2",
244 .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
245 .dependencies = featureSet(&[_]Feature{}),
246 };
247 result[@enumToInt(Feature.mips64)] = .{
248 .llvm_name = "mips64",
249 .description = "Mips64 ISA Support",
250 .dependencies = featureSet(&[_]Feature{
251 .mips32,
252 .mips5,
253 }),
254 };
255 result[@enumToInt(Feature.mips64r2)] = .{
256 .llvm_name = "mips64r2",
257 .description = "Mips64r2 ISA Support",
258 .dependencies = featureSet(&[_]Feature{
259 .mips32r2,
260 .mips64,
261 }),
262 };
263 result[@enumToInt(Feature.mips64r3)] = .{
264 .llvm_name = "mips64r3",
265 .description = "Mips64r3 ISA Support",
266 .dependencies = featureSet(&[_]Feature{
267 .mips32r3,
268 .mips64r2,
269 }),
270 };
271 result[@enumToInt(Feature.mips64r5)] = .{
272 .llvm_name = "mips64r5",
273 .description = "Mips64r5 ISA Support",
274 .dependencies = featureSet(&[_]Feature{
275 .mips32r5,
276 .mips64r3,
277 }),
278 };
279 result[@enumToInt(Feature.mips64r6)] = .{
280 .llvm_name = "mips64r6",
281 .description = "Mips64r6 ISA Support [experimental]",
282 .dependencies = featureSet(&[_]Feature{
283 .abs2008,
284 .mips32r6,
285 .mips64r5,
286 .nan2008,
287 }),
288 };
289 result[@enumToInt(Feature.msa)] = .{
290 .llvm_name = "msa",
291 .description = "Mips MSA ASE",
292 .dependencies = featureSet(&[_]Feature{}),
293 };
294 result[@enumToInt(Feature.mt)] = .{
295 .llvm_name = "mt",
296 .description = "Mips MT ASE",
297 .dependencies = featureSet(&[_]Feature{}),
298 };
299 result[@enumToInt(Feature.nan2008)] = .{
300 .llvm_name = "nan2008",
301 .description = "IEEE 754-2008 NaN encoding",
302 .dependencies = featureSet(&[_]Feature{}),
303 };
304 result[@enumToInt(Feature.noabicalls)] = .{
305 .llvm_name = "noabicalls",
306 .description = "Disable SVR4-style position-independent code",
307 .dependencies = featureSet(&[_]Feature{}),
308 };
309 result[@enumToInt(Feature.nomadd4)] = .{
310 .llvm_name = "nomadd4",
311 .description = "Disable 4-operand madd.fmt and related instructions",
312 .dependencies = featureSet(&[_]Feature{}),
313 };
314 result[@enumToInt(Feature.nooddspreg)] = .{
315 .llvm_name = "nooddspreg",
316 .description = "Disable odd numbered single-precision registers",
317 .dependencies = featureSet(&[_]Feature{}),
318 };
319 result[@enumToInt(Feature.p5600)] = .{
320 .llvm_name = "p5600",
321 .description = "The P5600 Processor",
322 .dependencies = featureSet(&[_]Feature{
323 .mips32r5,
324 }),
325 };
326 result[@enumToInt(Feature.ptr64)] = .{
327 .llvm_name = "ptr64",
328 .description = "Pointers are 64-bit wide",
329 .dependencies = featureSet(&[_]Feature{}),
330 };
331 result[@enumToInt(Feature.single_float)] = .{
332 .llvm_name = "single-float",
333 .description = "Only supports single precision float",
334 .dependencies = featureSet(&[_]Feature{}),
335 };
336 result[@enumToInt(Feature.soft_float)] = .{
337 .llvm_name = "soft-float",
338 .description = "Does not support floating point instructions",
339 .dependencies = featureSet(&[_]Feature{}),
340 };
341 result[@enumToInt(Feature.sym32)] = .{
342 .llvm_name = "sym32",
343 .description = "Symbols are 32 bit on Mips64",
344 .dependencies = featureSet(&[_]Feature{}),
345 };
346 result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
347 .llvm_name = "use-indirect-jump-hazard",
348 .description = "Use indirect jump guards to prevent certain speculation based attacks",
349 .dependencies = featureSet(&[_]Feature{}),
350 };
351 result[@enumToInt(Feature.use_tcc_in_div)] = .{
352 .llvm_name = "use-tcc-in-div",
353 .description = "Force the assembler to use trapping",
354 .dependencies = featureSet(&[_]Feature{}),
355 };
356 result[@enumToInt(Feature.vfpu)] = .{
357 .llvm_name = "vfpu",
358 .description = "Enable vector FPU instructions",
359 .dependencies = featureSet(&[_]Feature{}),
360 };
361 result[@enumToInt(Feature.virt)] = .{
362 .llvm_name = "virt",
363 .description = "Mips Virtualization ASE",
364 .dependencies = featureSet(&[_]Feature{}),
365 };
366 const ti = @typeInfo(Feature);
367 for (result) |*elem, i| {
368 elem.index = i;
369 elem.name = ti.Enum.fields[i].name;
370 }
371 break :blk result;
372};
373
374pub const cpu = struct {
375 pub const mips1 = Cpu{
376 .name = "mips1",
377 .llvm_name = "mips1",
378 .features = featureSet(&[_]Feature{
379 .mips1,
380 }),
381 };
382 pub const mips2 = Cpu{
383 .name = "mips2",
384 .llvm_name = "mips2",
385 .features = featureSet(&[_]Feature{
386 .mips2,
387 }),
388 };
389 pub const mips3 = Cpu{
390 .name = "mips3",
391 .llvm_name = "mips3",
392 .features = featureSet(&[_]Feature{
393 .mips3,
394 }),
395 };
396 pub const mips32 = Cpu{
397 .name = "mips32",
398 .llvm_name = "mips32",
399 .features = featureSet(&[_]Feature{
400 .mips32,
401 }),
402 };
403 pub const mips32r2 = Cpu{
404 .name = "mips32r2",
405 .llvm_name = "mips32r2",
406 .features = featureSet(&[_]Feature{
407 .mips32r2,
408 }),
409 };
410 pub const mips32r3 = Cpu{
411 .name = "mips32r3",
412 .llvm_name = "mips32r3",
413 .features = featureSet(&[_]Feature{
414 .mips32r3,
415 }),
416 };
417 pub const mips32r5 = Cpu{
418 .name = "mips32r5",
419 .llvm_name = "mips32r5",
420 .features = featureSet(&[_]Feature{
421 .mips32r5,
422 }),
423 };
424 pub const mips32r6 = Cpu{
425 .name = "mips32r6",
426 .llvm_name = "mips32r6",
427 .features = featureSet(&[_]Feature{
428 .mips32r6,
429 }),
430 };
431 pub const mips4 = Cpu{
432 .name = "mips4",
433 .llvm_name = "mips4",
434 .features = featureSet(&[_]Feature{
435 .mips4,
436 }),
437 };
438 pub const mips5 = Cpu{
439 .name = "mips5",
440 .llvm_name = "mips5",
441 .features = featureSet(&[_]Feature{
442 .mips5,
443 }),
444 };
445 pub const mips64 = Cpu{
446 .name = "mips64",
447 .llvm_name = "mips64",
448 .features = featureSet(&[_]Feature{
449 .mips64,
450 }),
451 };
452 pub const mips64r2 = Cpu{
453 .name = "mips64r2",
454 .llvm_name = "mips64r2",
455 .features = featureSet(&[_]Feature{
456 .mips64r2,
457 }),
458 };
459 pub const mips64r3 = Cpu{
460 .name = "mips64r3",
461 .llvm_name = "mips64r3",
462 .features = featureSet(&[_]Feature{
463 .mips64r3,
464 }),
465 };
466 pub const mips64r5 = Cpu{
467 .name = "mips64r5",
468 .llvm_name = "mips64r5",
469 .features = featureSet(&[_]Feature{
470 .mips64r5,
471 }),
472 };
473 pub const mips64r6 = Cpu{
474 .name = "mips64r6",
475 .llvm_name = "mips64r6",
476 .features = featureSet(&[_]Feature{
477 .mips64r6,
478 }),
479 };
480 pub const octeon = Cpu{
481 .name = "octeon",
482 .llvm_name = "octeon",
483 .features = featureSet(&[_]Feature{
484 .cnmips,
485 .mips64r2,
486 }),
487 };
488 pub const p5600 = Cpu{
489 .name = "p5600",
490 .llvm_name = "p5600",
491 .features = featureSet(&[_]Feature{
492 .p5600,
493 }),
494 };
495};
496
497/// All mips CPUs, sorted alphabetically by name.
498/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
499/// compiler has inefficient memory and CPU usage, affecting build times.
500pub const all_cpus = &[_]*const Cpu{
501 &cpu.mips1,
502 &cpu.mips2,
503 &cpu.mips3,
504 &cpu.mips32,
505 &cpu.mips32r2,
506 &cpu.mips32r3,
507 &cpu.mips32r5,
508 &cpu.mips32r6,
509 &cpu.mips4,
510 &cpu.mips5,
511 &cpu.mips64,
512 &cpu.mips64r2,
513 &cpu.mips64r3,
514 &cpu.mips64r5,
515 &cpu.mips64r6,
516 &cpu.octeon,
517 &cpu.p5600,
518};
lib/std/target/msp430.zig created+72
......@@ -0,0 +1,72 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ext,
6 hwmult16,
7 hwmult32,
8 hwmultf5,
9};
10
11pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
12
13pub const all_features = blk: {
14 const len = @typeInfo(Feature).Enum.fields.len;
15 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
16 var result: [len]Cpu.Feature = undefined;
17 result[@enumToInt(Feature.ext)] = .{
18 .llvm_name = "ext",
19 .description = "Enable MSP430-X extensions",
20 .dependencies = featureSet(&[_]Feature{}),
21 };
22 result[@enumToInt(Feature.hwmult16)] = .{
23 .llvm_name = "hwmult16",
24 .description = "Enable 16-bit hardware multiplier",
25 .dependencies = featureSet(&[_]Feature{}),
26 };
27 result[@enumToInt(Feature.hwmult32)] = .{
28 .llvm_name = "hwmult32",
29 .description = "Enable 32-bit hardware multiplier",
30 .dependencies = featureSet(&[_]Feature{}),
31 };
32 result[@enumToInt(Feature.hwmultf5)] = .{
33 .llvm_name = "hwmultf5",
34 .description = "Enable F5 series hardware multiplier",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 const ti = @typeInfo(Feature);
38 for (result) |*elem, i| {
39 elem.index = i;
40 elem.name = ti.Enum.fields[i].name;
41 }
42 break :blk result;
43};
44
45pub const cpu = struct {
46 pub const generic = Cpu{
47 .name = "generic",
48 .llvm_name = "generic",
49 .features = featureSet(&[_]Feature{}),
50 };
51 pub const msp430 = Cpu{
52 .name = "msp430",
53 .llvm_name = "msp430",
54 .features = featureSet(&[_]Feature{}),
55 };
56 pub const msp430x = Cpu{
57 .name = "msp430x",
58 .llvm_name = "msp430x",
59 .features = featureSet(&[_]Feature{
60 .ext,
61 }),
62 };
63};
64
65/// All msp430 CPUs, sorted alphabetically by name.
66/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
67/// compiler has inefficient memory and CPU usage, affecting build times.
68pub const all_cpus = &[_]*const Cpu{
69 &cpu.generic,
70 &cpu.msp430,
71 &cpu.msp430x,
72};
lib/std/target/nvptx.zig created+309
......@@ -0,0 +1,309 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 ptx32,
6 ptx40,
7 ptx41,
8 ptx42,
9 ptx43,
10 ptx50,
11 ptx60,
12 ptx61,
13 ptx63,
14 ptx64,
15 sm_20,
16 sm_21,
17 sm_30,
18 sm_32,
19 sm_35,
20 sm_37,
21 sm_50,
22 sm_52,
23 sm_53,
24 sm_60,
25 sm_61,
26 sm_62,
27 sm_70,
28 sm_72,
29 sm_75,
30};
31
32pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
33
34pub const all_features = blk: {
35 const len = @typeInfo(Feature).Enum.fields.len;
36 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
37 var result: [len]Cpu.Feature = undefined;
38 result[@enumToInt(Feature.ptx32)] = .{
39 .llvm_name = "ptx32",
40 .description = "Use PTX version 3.2",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.ptx40)] = .{
44 .llvm_name = "ptx40",
45 .description = "Use PTX version 4.0",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.ptx41)] = .{
49 .llvm_name = "ptx41",
50 .description = "Use PTX version 4.1",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.ptx42)] = .{
54 .llvm_name = "ptx42",
55 .description = "Use PTX version 4.2",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.ptx43)] = .{
59 .llvm_name = "ptx43",
60 .description = "Use PTX version 4.3",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.ptx50)] = .{
64 .llvm_name = "ptx50",
65 .description = "Use PTX version 5.0",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.ptx60)] = .{
69 .llvm_name = "ptx60",
70 .description = "Use PTX version 6.0",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.ptx61)] = .{
74 .llvm_name = "ptx61",
75 .description = "Use PTX version 6.1",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.ptx63)] = .{
79 .llvm_name = "ptx63",
80 .description = "Use PTX version 6.3",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.ptx64)] = .{
84 .llvm_name = "ptx64",
85 .description = "Use PTX version 6.4",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.sm_20)] = .{
89 .llvm_name = "sm_20",
90 .description = "Target SM 2.0",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.sm_21)] = .{
94 .llvm_name = "sm_21",
95 .description = "Target SM 2.1",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.sm_30)] = .{
99 .llvm_name = "sm_30",
100 .description = "Target SM 3.0",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.sm_32)] = .{
104 .llvm_name = "sm_32",
105 .description = "Target SM 3.2",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.sm_35)] = .{
109 .llvm_name = "sm_35",
110 .description = "Target SM 3.5",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.sm_37)] = .{
114 .llvm_name = "sm_37",
115 .description = "Target SM 3.7",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.sm_50)] = .{
119 .llvm_name = "sm_50",
120 .description = "Target SM 5.0",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.sm_52)] = .{
124 .llvm_name = "sm_52",
125 .description = "Target SM 5.2",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.sm_53)] = .{
129 .llvm_name = "sm_53",
130 .description = "Target SM 5.3",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.sm_60)] = .{
134 .llvm_name = "sm_60",
135 .description = "Target SM 6.0",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.sm_61)] = .{
139 .llvm_name = "sm_61",
140 .description = "Target SM 6.1",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.sm_62)] = .{
144 .llvm_name = "sm_62",
145 .description = "Target SM 6.2",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.sm_70)] = .{
149 .llvm_name = "sm_70",
150 .description = "Target SM 7.0",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.sm_72)] = .{
154 .llvm_name = "sm_72",
155 .description = "Target SM 7.2",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.sm_75)] = .{
159 .llvm_name = "sm_75",
160 .description = "Target SM 7.5",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 const ti = @typeInfo(Feature);
164 for (result) |*elem, i| {
165 elem.index = i;
166 elem.name = ti.Enum.fields[i].name;
167 }
168 break :blk result;
169};
170
171pub const cpu = struct {
172 pub const sm_20 = Cpu{
173 .name = "sm_20",
174 .llvm_name = "sm_20",
175 .features = featureSet(&[_]Feature{
176 .sm_20,
177 }),
178 };
179 pub const sm_21 = Cpu{
180 .name = "sm_21",
181 .llvm_name = "sm_21",
182 .features = featureSet(&[_]Feature{
183 .sm_21,
184 }),
185 };
186 pub const sm_30 = Cpu{
187 .name = "sm_30",
188 .llvm_name = "sm_30",
189 .features = featureSet(&[_]Feature{
190 .sm_30,
191 }),
192 };
193 pub const sm_32 = Cpu{
194 .name = "sm_32",
195 .llvm_name = "sm_32",
196 .features = featureSet(&[_]Feature{
197 .ptx40,
198 .sm_32,
199 }),
200 };
201 pub const sm_35 = Cpu{
202 .name = "sm_35",
203 .llvm_name = "sm_35",
204 .features = featureSet(&[_]Feature{
205 .sm_35,
206 }),
207 };
208 pub const sm_37 = Cpu{
209 .name = "sm_37",
210 .llvm_name = "sm_37",
211 .features = featureSet(&[_]Feature{
212 .ptx41,
213 .sm_37,
214 }),
215 };
216 pub const sm_50 = Cpu{
217 .name = "sm_50",
218 .llvm_name = "sm_50",
219 .features = featureSet(&[_]Feature{
220 .ptx40,
221 .sm_50,
222 }),
223 };
224 pub const sm_52 = Cpu{
225 .name = "sm_52",
226 .llvm_name = "sm_52",
227 .features = featureSet(&[_]Feature{
228 .ptx41,
229 .sm_52,
230 }),
231 };
232 pub const sm_53 = Cpu{
233 .name = "sm_53",
234 .llvm_name = "sm_53",
235 .features = featureSet(&[_]Feature{
236 .ptx42,
237 .sm_53,
238 }),
239 };
240 pub const sm_60 = Cpu{
241 .name = "sm_60",
242 .llvm_name = "sm_60",
243 .features = featureSet(&[_]Feature{
244 .ptx50,
245 .sm_60,
246 }),
247 };
248 pub const sm_61 = Cpu{
249 .name = "sm_61",
250 .llvm_name = "sm_61",
251 .features = featureSet(&[_]Feature{
252 .ptx50,
253 .sm_61,
254 }),
255 };
256 pub const sm_62 = Cpu{
257 .name = "sm_62",
258 .llvm_name = "sm_62",
259 .features = featureSet(&[_]Feature{
260 .ptx50,
261 .sm_62,
262 }),
263 };
264 pub const sm_70 = Cpu{
265 .name = "sm_70",
266 .llvm_name = "sm_70",
267 .features = featureSet(&[_]Feature{
268 .ptx60,
269 .sm_70,
270 }),
271 };
272 pub const sm_72 = Cpu{
273 .name = "sm_72",
274 .llvm_name = "sm_72",
275 .features = featureSet(&[_]Feature{
276 .ptx61,
277 .sm_72,
278 }),
279 };
280 pub const sm_75 = Cpu{
281 .name = "sm_75",
282 .llvm_name = "sm_75",
283 .features = featureSet(&[_]Feature{
284 .ptx63,
285 .sm_75,
286 }),
287 };
288};
289
290/// All nvptx CPUs, sorted alphabetically by name.
291/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
292/// compiler has inefficient memory and CPU usage, affecting build times.
293pub const all_cpus = &[_]*const Cpu{
294 &cpu.sm_20,
295 &cpu.sm_21,
296 &cpu.sm_30,
297 &cpu.sm_32,
298 &cpu.sm_35,
299 &cpu.sm_37,
300 &cpu.sm_50,
301 &cpu.sm_52,
302 &cpu.sm_53,
303 &cpu.sm_60,
304 &cpu.sm_61,
305 &cpu.sm_62,
306 &cpu.sm_70,
307 &cpu.sm_72,
308 &cpu.sm_75,
309};
lib/std/target/powerpc.zig created+938
......@@ -0,0 +1,938 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 @"64bitregs",
7 altivec,
8 booke,
9 bpermd,
10 cmpb,
11 crbits,
12 crypto,
13 direct_move,
14 e500,
15 extdiv,
16 fcpsgn,
17 float128,
18 fpcvt,
19 fprnd,
20 fpu,
21 fre,
22 fres,
23 frsqrte,
24 frsqrtes,
25 fsqrt,
26 hard_float,
27 htm,
28 icbt,
29 invariant_function_descriptors,
30 isa_v30_instructions,
31 isel,
32 ldbrx,
33 lfiwax,
34 longcall,
35 mfocrf,
36 msync,
37 partword_atomics,
38 popcntd,
39 power8_altivec,
40 power8_vector,
41 power9_altivec,
42 power9_vector,
43 ppc_postra_sched,
44 ppc_prera_sched,
45 ppc4xx,
46 ppc6xx,
47 qpx,
48 recipprec,
49 secure_plt,
50 slow_popcntd,
51 spe,
52 stfiwx,
53 two_const_nr,
54 vectors_use_two_units,
55 vsx,
56};
57
58pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
59
60pub const all_features = blk: {
61 const len = @typeInfo(Feature).Enum.fields.len;
62 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
63 var result: [len]Cpu.Feature = undefined;
64 result[@enumToInt(Feature.@"64bit")] = .{
65 .llvm_name = "64bit",
66 .description = "Enable 64-bit instructions",
67 .dependencies = featureSet(&[_]Feature{}),
68 };
69 result[@enumToInt(Feature.@"64bitregs")] = .{
70 .llvm_name = "64bitregs",
71 .description = "Enable 64-bit registers usage for ppc32 [beta]",
72 .dependencies = featureSet(&[_]Feature{}),
73 };
74 result[@enumToInt(Feature.altivec)] = .{
75 .llvm_name = "altivec",
76 .description = "Enable Altivec instructions",
77 .dependencies = featureSet(&[_]Feature{
78 .fpu,
79 }),
80 };
81 result[@enumToInt(Feature.booke)] = .{
82 .llvm_name = "booke",
83 .description = "Enable Book E instructions",
84 .dependencies = featureSet(&[_]Feature{
85 .icbt,
86 }),
87 };
88 result[@enumToInt(Feature.bpermd)] = .{
89 .llvm_name = "bpermd",
90 .description = "Enable the bpermd instruction",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.cmpb)] = .{
94 .llvm_name = "cmpb",
95 .description = "Enable the cmpb instruction",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.crbits)] = .{
99 .llvm_name = "crbits",
100 .description = "Use condition-register bits individually",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.crypto)] = .{
104 .llvm_name = "crypto",
105 .description = "Enable POWER8 Crypto instructions",
106 .dependencies = featureSet(&[_]Feature{
107 .power8_altivec,
108 }),
109 };
110 result[@enumToInt(Feature.direct_move)] = .{
111 .llvm_name = "direct-move",
112 .description = "Enable Power8 direct move instructions",
113 .dependencies = featureSet(&[_]Feature{
114 .vsx,
115 }),
116 };
117 result[@enumToInt(Feature.e500)] = .{
118 .llvm_name = "e500",
119 .description = "Enable E500/E500mc instructions",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.extdiv)] = .{
123 .llvm_name = "extdiv",
124 .description = "Enable extended divide instructions",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 result[@enumToInt(Feature.fcpsgn)] = .{
128 .llvm_name = "fcpsgn",
129 .description = "Enable the fcpsgn instruction",
130 .dependencies = featureSet(&[_]Feature{
131 .fpu,
132 }),
133 };
134 result[@enumToInt(Feature.float128)] = .{
135 .llvm_name = "float128",
136 .description = "Enable the __float128 data type for IEEE-754R Binary128.",
137 .dependencies = featureSet(&[_]Feature{
138 .vsx,
139 }),
140 };
141 result[@enumToInt(Feature.fpcvt)] = .{
142 .llvm_name = "fpcvt",
143 .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .fpu,
146 }),
147 };
148 result[@enumToInt(Feature.fprnd)] = .{
149 .llvm_name = "fprnd",
150 .description = "Enable the fri[mnpz] instructions",
151 .dependencies = featureSet(&[_]Feature{
152 .fpu,
153 }),
154 };
155 result[@enumToInt(Feature.fpu)] = .{
156 .llvm_name = "fpu",
157 .description = "Enable classic FPU instructions",
158 .dependencies = featureSet(&[_]Feature{
159 .hard_float,
160 }),
161 };
162 result[@enumToInt(Feature.fre)] = .{
163 .llvm_name = "fre",
164 .description = "Enable the fre instruction",
165 .dependencies = featureSet(&[_]Feature{
166 .fpu,
167 }),
168 };
169 result[@enumToInt(Feature.fres)] = .{
170 .llvm_name = "fres",
171 .description = "Enable the fres instruction",
172 .dependencies = featureSet(&[_]Feature{
173 .fpu,
174 }),
175 };
176 result[@enumToInt(Feature.frsqrte)] = .{
177 .llvm_name = "frsqrte",
178 .description = "Enable the frsqrte instruction",
179 .dependencies = featureSet(&[_]Feature{
180 .fpu,
181 }),
182 };
183 result[@enumToInt(Feature.frsqrtes)] = .{
184 .llvm_name = "frsqrtes",
185 .description = "Enable the frsqrtes instruction",
186 .dependencies = featureSet(&[_]Feature{
187 .fpu,
188 }),
189 };
190 result[@enumToInt(Feature.fsqrt)] = .{
191 .llvm_name = "fsqrt",
192 .description = "Enable the fsqrt instruction",
193 .dependencies = featureSet(&[_]Feature{
194 .fpu,
195 }),
196 };
197 result[@enumToInt(Feature.hard_float)] = .{
198 .llvm_name = "hard-float",
199 .description = "Enable floating-point instructions",
200 .dependencies = featureSet(&[_]Feature{}),
201 };
202 result[@enumToInt(Feature.htm)] = .{
203 .llvm_name = "htm",
204 .description = "Enable Hardware Transactional Memory instructions",
205 .dependencies = featureSet(&[_]Feature{}),
206 };
207 result[@enumToInt(Feature.icbt)] = .{
208 .llvm_name = "icbt",
209 .description = "Enable icbt instruction",
210 .dependencies = featureSet(&[_]Feature{}),
211 };
212 result[@enumToInt(Feature.invariant_function_descriptors)] = .{
213 .llvm_name = "invariant-function-descriptors",
214 .description = "Assume function descriptors are invariant",
215 .dependencies = featureSet(&[_]Feature{}),
216 };
217 result[@enumToInt(Feature.isa_v30_instructions)] = .{
218 .llvm_name = "isa-v30-instructions",
219 .description = "Enable instructions added in ISA 3.0.",
220 .dependencies = featureSet(&[_]Feature{}),
221 };
222 result[@enumToInt(Feature.isel)] = .{
223 .llvm_name = "isel",
224 .description = "Enable the isel instruction",
225 .dependencies = featureSet(&[_]Feature{}),
226 };
227 result[@enumToInt(Feature.ldbrx)] = .{
228 .llvm_name = "ldbrx",
229 .description = "Enable the ldbrx instruction",
230 .dependencies = featureSet(&[_]Feature{}),
231 };
232 result[@enumToInt(Feature.lfiwax)] = .{
233 .llvm_name = "lfiwax",
234 .description = "Enable the lfiwax instruction",
235 .dependencies = featureSet(&[_]Feature{
236 .fpu,
237 }),
238 };
239 result[@enumToInt(Feature.longcall)] = .{
240 .llvm_name = "longcall",
241 .description = "Always use indirect calls",
242 .dependencies = featureSet(&[_]Feature{}),
243 };
244 result[@enumToInt(Feature.mfocrf)] = .{
245 .llvm_name = "mfocrf",
246 .description = "Enable the MFOCRF instruction",
247 .dependencies = featureSet(&[_]Feature{}),
248 };
249 result[@enumToInt(Feature.msync)] = .{
250 .llvm_name = "msync",
251 .description = "Has only the msync instruction instead of sync",
252 .dependencies = featureSet(&[_]Feature{
253 .booke,
254 }),
255 };
256 result[@enumToInt(Feature.partword_atomics)] = .{
257 .llvm_name = "partword-atomics",
258 .description = "Enable l[bh]arx and st[bh]cx.",
259 .dependencies = featureSet(&[_]Feature{}),
260 };
261 result[@enumToInt(Feature.popcntd)] = .{
262 .llvm_name = "popcntd",
263 .description = "Enable the popcnt[dw] instructions",
264 .dependencies = featureSet(&[_]Feature{}),
265 };
266 result[@enumToInt(Feature.power8_altivec)] = .{
267 .llvm_name = "power8-altivec",
268 .description = "Enable POWER8 Altivec instructions",
269 .dependencies = featureSet(&[_]Feature{
270 .altivec,
271 }),
272 };
273 result[@enumToInt(Feature.power8_vector)] = .{
274 .llvm_name = "power8-vector",
275 .description = "Enable POWER8 vector instructions",
276 .dependencies = featureSet(&[_]Feature{
277 .power8_altivec,
278 .vsx,
279 }),
280 };
281 result[@enumToInt(Feature.power9_altivec)] = .{
282 .llvm_name = "power9-altivec",
283 .description = "Enable POWER9 Altivec instructions",
284 .dependencies = featureSet(&[_]Feature{
285 .isa_v30_instructions,
286 .power8_altivec,
287 }),
288 };
289 result[@enumToInt(Feature.power9_vector)] = .{
290 .llvm_name = "power9-vector",
291 .description = "Enable POWER9 vector instructions",
292 .dependencies = featureSet(&[_]Feature{
293 .isa_v30_instructions,
294 .power8_vector,
295 .power9_altivec,
296 }),
297 };
298 result[@enumToInt(Feature.ppc_postra_sched)] = .{
299 .llvm_name = "ppc-postra-sched",
300 .description = "Use PowerPC post-RA scheduling strategy",
301 .dependencies = featureSet(&[_]Feature{}),
302 };
303 result[@enumToInt(Feature.ppc_prera_sched)] = .{
304 .llvm_name = "ppc-prera-sched",
305 .description = "Use PowerPC pre-RA scheduling strategy",
306 .dependencies = featureSet(&[_]Feature{}),
307 };
308 result[@enumToInt(Feature.ppc4xx)] = .{
309 .llvm_name = "ppc4xx",
310 .description = "Enable PPC 4xx instructions",
311 .dependencies = featureSet(&[_]Feature{}),
312 };
313 result[@enumToInt(Feature.ppc6xx)] = .{
314 .llvm_name = "ppc6xx",
315 .description = "Enable PPC 6xx instructions",
316 .dependencies = featureSet(&[_]Feature{}),
317 };
318 result[@enumToInt(Feature.qpx)] = .{
319 .llvm_name = "qpx",
320 .description = "Enable QPX instructions",
321 .dependencies = featureSet(&[_]Feature{
322 .fpu,
323 }),
324 };
325 result[@enumToInt(Feature.recipprec)] = .{
326 .llvm_name = "recipprec",
327 .description = "Assume higher precision reciprocal estimates",
328 .dependencies = featureSet(&[_]Feature{}),
329 };
330 result[@enumToInt(Feature.secure_plt)] = .{
331 .llvm_name = "secure-plt",
332 .description = "Enable secure plt mode",
333 .dependencies = featureSet(&[_]Feature{}),
334 };
335 result[@enumToInt(Feature.slow_popcntd)] = .{
336 .llvm_name = "slow-popcntd",
337 .description = "Has slow popcnt[dw] instructions",
338 .dependencies = featureSet(&[_]Feature{}),
339 };
340 result[@enumToInt(Feature.spe)] = .{
341 .llvm_name = "spe",
342 .description = "Enable SPE instructions",
343 .dependencies = featureSet(&[_]Feature{
344 .hard_float,
345 }),
346 };
347 result[@enumToInt(Feature.stfiwx)] = .{
348 .llvm_name = "stfiwx",
349 .description = "Enable the stfiwx instruction",
350 .dependencies = featureSet(&[_]Feature{
351 .fpu,
352 }),
353 };
354 result[@enumToInt(Feature.two_const_nr)] = .{
355 .llvm_name = "two-const-nr",
356 .description = "Requires two constant Newton-Raphson computation",
357 .dependencies = featureSet(&[_]Feature{}),
358 };
359 result[@enumToInt(Feature.vectors_use_two_units)] = .{
360 .llvm_name = "vectors-use-two-units",
361 .description = "Vectors use two units",
362 .dependencies = featureSet(&[_]Feature{}),
363 };
364 result[@enumToInt(Feature.vsx)] = .{
365 .llvm_name = "vsx",
366 .description = "Enable VSX instructions",
367 .dependencies = featureSet(&[_]Feature{
368 .altivec,
369 }),
370 };
371 const ti = @typeInfo(Feature);
372 for (result) |*elem, i| {
373 elem.index = i;
374 elem.name = ti.Enum.fields[i].name;
375 }
376 break :blk result;
377};
378
379pub const cpu = struct {
380 pub const @"440" = Cpu{
381 .name = "440",
382 .llvm_name = "440",
383 .features = featureSet(&[_]Feature{
384 .booke,
385 .fres,
386 .frsqrte,
387 .icbt,
388 .isel,
389 .msync,
390 }),
391 };
392 pub const @"450" = Cpu{
393 .name = "450",
394 .llvm_name = "450",
395 .features = featureSet(&[_]Feature{
396 .booke,
397 .fres,
398 .frsqrte,
399 .icbt,
400 .isel,
401 .msync,
402 }),
403 };
404 pub const @"601" = Cpu{
405 .name = "601",
406 .llvm_name = "601",
407 .features = featureSet(&[_]Feature{
408 .fpu,
409 }),
410 };
411 pub const @"602" = Cpu{
412 .name = "602",
413 .llvm_name = "602",
414 .features = featureSet(&[_]Feature{
415 .fpu,
416 }),
417 };
418 pub const @"603" = Cpu{
419 .name = "603",
420 .llvm_name = "603",
421 .features = featureSet(&[_]Feature{
422 .fres,
423 .frsqrte,
424 }),
425 };
426 pub const @"603e" = Cpu{
427 .name = "603e",
428 .llvm_name = "603e",
429 .features = featureSet(&[_]Feature{
430 .fres,
431 .frsqrte,
432 }),
433 };
434 pub const @"603ev" = Cpu{
435 .name = "603ev",
436 .llvm_name = "603ev",
437 .features = featureSet(&[_]Feature{
438 .fres,
439 .frsqrte,
440 }),
441 };
442 pub const @"604" = Cpu{
443 .name = "604",
444 .llvm_name = "604",
445 .features = featureSet(&[_]Feature{
446 .fres,
447 .frsqrte,
448 }),
449 };
450 pub const @"604e" = Cpu{
451 .name = "604e",
452 .llvm_name = "604e",
453 .features = featureSet(&[_]Feature{
454 .fres,
455 .frsqrte,
456 }),
457 };
458 pub const @"620" = Cpu{
459 .name = "620",
460 .llvm_name = "620",
461 .features = featureSet(&[_]Feature{
462 .fres,
463 .frsqrte,
464 }),
465 };
466 pub const @"7400" = Cpu{
467 .name = "7400",
468 .llvm_name = "7400",
469 .features = featureSet(&[_]Feature{
470 .altivec,
471 .fres,
472 .frsqrte,
473 }),
474 };
475 pub const @"7450" = Cpu{
476 .name = "7450",
477 .llvm_name = "7450",
478 .features = featureSet(&[_]Feature{
479 .altivec,
480 .fres,
481 .frsqrte,
482 }),
483 };
484 pub const @"750" = Cpu{
485 .name = "750",
486 .llvm_name = "750",
487 .features = featureSet(&[_]Feature{
488 .fres,
489 .frsqrte,
490 }),
491 };
492 pub const @"970" = Cpu{
493 .name = "970",
494 .llvm_name = "970",
495 .features = featureSet(&[_]Feature{
496 .@"64bit",
497 .altivec,
498 .fres,
499 .frsqrte,
500 .fsqrt,
501 .mfocrf,
502 .stfiwx,
503 }),
504 };
505 pub const a2 = Cpu{
506 .name = "a2",
507 .llvm_name = "a2",
508 .features = featureSet(&[_]Feature{
509 .@"64bit",
510 .booke,
511 .cmpb,
512 .fcpsgn,
513 .fpcvt,
514 .fprnd,
515 .fre,
516 .fres,
517 .frsqrte,
518 .frsqrtes,
519 .fsqrt,
520 .icbt,
521 .isel,
522 .ldbrx,
523 .lfiwax,
524 .mfocrf,
525 .recipprec,
526 .slow_popcntd,
527 .stfiwx,
528 }),
529 };
530 pub const a2q = Cpu{
531 .name = "a2q",
532 .llvm_name = "a2q",
533 .features = featureSet(&[_]Feature{
534 .@"64bit",
535 .booke,
536 .cmpb,
537 .fcpsgn,
538 .fpcvt,
539 .fprnd,
540 .fre,
541 .fres,
542 .frsqrte,
543 .frsqrtes,
544 .fsqrt,
545 .icbt,
546 .isel,
547 .ldbrx,
548 .lfiwax,
549 .mfocrf,
550 .qpx,
551 .recipprec,
552 .slow_popcntd,
553 .stfiwx,
554 }),
555 };
556 pub const e500 = Cpu{
557 .name = "e500",
558 .llvm_name = "e500",
559 .features = featureSet(&[_]Feature{
560 .booke,
561 .icbt,
562 .isel,
563 }),
564 };
565 pub const e500mc = Cpu{
566 .name = "e500mc",
567 .llvm_name = "e500mc",
568 .features = featureSet(&[_]Feature{
569 .booke,
570 .icbt,
571 .isel,
572 .stfiwx,
573 }),
574 };
575 pub const e5500 = Cpu{
576 .name = "e5500",
577 .llvm_name = "e5500",
578 .features = featureSet(&[_]Feature{
579 .@"64bit",
580 .booke,
581 .icbt,
582 .isel,
583 .mfocrf,
584 .stfiwx,
585 }),
586 };
587 pub const g3 = Cpu{
588 .name = "g3",
589 .llvm_name = "g3",
590 .features = featureSet(&[_]Feature{
591 .fres,
592 .frsqrte,
593 }),
594 };
595 pub const g4 = Cpu{
596 .name = "g4",
597 .llvm_name = "g4",
598 .features = featureSet(&[_]Feature{
599 .altivec,
600 .fres,
601 .frsqrte,
602 }),
603 };
604 pub const @"g4+" = Cpu{
605 .name = "g4+",
606 .llvm_name = "g4+",
607 .features = featureSet(&[_]Feature{
608 .altivec,
609 .fres,
610 .frsqrte,
611 }),
612 };
613 pub const g5 = Cpu{
614 .name = "g5",
615 .llvm_name = "g5",
616 .features = featureSet(&[_]Feature{
617 .@"64bit",
618 .altivec,
619 .fres,
620 .frsqrte,
621 .fsqrt,
622 .mfocrf,
623 .stfiwx,
624 }),
625 };
626 pub const generic = Cpu{
627 .name = "generic",
628 .llvm_name = "generic",
629 .features = featureSet(&[_]Feature{
630 .hard_float,
631 }),
632 };
633 pub const ppc = Cpu{
634 .name = "ppc",
635 .llvm_name = "ppc",
636 .features = featureSet(&[_]Feature{
637 .hard_float,
638 }),
639 };
640 pub const ppc32 = Cpu{
641 .name = "ppc32",
642 .llvm_name = "ppc32",
643 .features = featureSet(&[_]Feature{
644 .hard_float,
645 }),
646 };
647 pub const ppc64 = Cpu{
648 .name = "ppc64",
649 .llvm_name = "ppc64",
650 .features = featureSet(&[_]Feature{
651 .@"64bit",
652 .altivec,
653 .fres,
654 .frsqrte,
655 .fsqrt,
656 .mfocrf,
657 .stfiwx,
658 }),
659 };
660 pub const ppc64le = Cpu{
661 .name = "ppc64le",
662 .llvm_name = "ppc64le",
663 .features = featureSet(&[_]Feature{
664 .@"64bit",
665 .altivec,
666 .bpermd,
667 .cmpb,
668 .crypto,
669 .direct_move,
670 .extdiv,
671 .fcpsgn,
672 .fpcvt,
673 .fprnd,
674 .fre,
675 .fres,
676 .frsqrte,
677 .frsqrtes,
678 .fsqrt,
679 .htm,
680 .icbt,
681 .isel,
682 .ldbrx,
683 .lfiwax,
684 .mfocrf,
685 .partword_atomics,
686 .popcntd,
687 .power8_altivec,
688 .power8_vector,
689 .recipprec,
690 .stfiwx,
691 .two_const_nr,
692 .vsx,
693 }),
694 };
695 pub const pwr3 = Cpu{
696 .name = "pwr3",
697 .llvm_name = "pwr3",
698 .features = featureSet(&[_]Feature{
699 .@"64bit",
700 .altivec,
701 .fres,
702 .frsqrte,
703 .mfocrf,
704 .stfiwx,
705 }),
706 };
707 pub const pwr4 = Cpu{
708 .name = "pwr4",
709 .llvm_name = "pwr4",
710 .features = featureSet(&[_]Feature{
711 .@"64bit",
712 .altivec,
713 .fres,
714 .frsqrte,
715 .fsqrt,
716 .mfocrf,
717 .stfiwx,
718 }),
719 };
720 pub const pwr5 = Cpu{
721 .name = "pwr5",
722 .llvm_name = "pwr5",
723 .features = featureSet(&[_]Feature{
724 .@"64bit",
725 .altivec,
726 .fre,
727 .fres,
728 .frsqrte,
729 .frsqrtes,
730 .fsqrt,
731 .mfocrf,
732 .stfiwx,
733 }),
734 };
735 pub const pwr5x = Cpu{
736 .name = "pwr5x",
737 .llvm_name = "pwr5x",
738 .features = featureSet(&[_]Feature{
739 .@"64bit",
740 .altivec,
741 .fprnd,
742 .fre,
743 .fres,
744 .frsqrte,
745 .frsqrtes,
746 .fsqrt,
747 .mfocrf,
748 .stfiwx,
749 }),
750 };
751 pub const pwr6 = Cpu{
752 .name = "pwr6",
753 .llvm_name = "pwr6",
754 .features = featureSet(&[_]Feature{
755 .@"64bit",
756 .altivec,
757 .cmpb,
758 .fcpsgn,
759 .fprnd,
760 .fre,
761 .fres,
762 .frsqrte,
763 .frsqrtes,
764 .fsqrt,
765 .lfiwax,
766 .mfocrf,
767 .recipprec,
768 .stfiwx,
769 }),
770 };
771 pub const pwr6x = Cpu{
772 .name = "pwr6x",
773 .llvm_name = "pwr6x",
774 .features = featureSet(&[_]Feature{
775 .@"64bit",
776 .altivec,
777 .cmpb,
778 .fcpsgn,
779 .fprnd,
780 .fre,
781 .fres,
782 .frsqrte,
783 .frsqrtes,
784 .fsqrt,
785 .lfiwax,
786 .mfocrf,
787 .recipprec,
788 .stfiwx,
789 }),
790 };
791 pub const pwr7 = Cpu{
792 .name = "pwr7",
793 .llvm_name = "pwr7",
794 .features = featureSet(&[_]Feature{
795 .@"64bit",
796 .altivec,
797 .bpermd,
798 .cmpb,
799 .extdiv,
800 .fcpsgn,
801 .fpcvt,
802 .fprnd,
803 .fre,
804 .fres,
805 .frsqrte,
806 .frsqrtes,
807 .fsqrt,
808 .isel,
809 .ldbrx,
810 .lfiwax,
811 .mfocrf,
812 .popcntd,
813 .recipprec,
814 .stfiwx,
815 .two_const_nr,
816 .vsx,
817 }),
818 };
819 pub const pwr8 = Cpu{
820 .name = "pwr8",
821 .llvm_name = "pwr8",
822 .features = featureSet(&[_]Feature{
823 .@"64bit",
824 .altivec,
825 .bpermd,
826 .cmpb,
827 .crypto,
828 .direct_move,
829 .extdiv,
830 .fcpsgn,
831 .fpcvt,
832 .fprnd,
833 .fre,
834 .fres,
835 .frsqrte,
836 .frsqrtes,
837 .fsqrt,
838 .htm,
839 .icbt,
840 .isel,
841 .ldbrx,
842 .lfiwax,
843 .mfocrf,
844 .partword_atomics,
845 .popcntd,
846 .power8_altivec,
847 .power8_vector,
848 .recipprec,
849 .stfiwx,
850 .two_const_nr,
851 .vsx,
852 }),
853 };
854 pub const pwr9 = Cpu{
855 .name = "pwr9",
856 .llvm_name = "pwr9",
857 .features = featureSet(&[_]Feature{
858 .@"64bit",
859 .altivec,
860 .bpermd,
861 .cmpb,
862 .crypto,
863 .direct_move,
864 .extdiv,
865 .fcpsgn,
866 .fpcvt,
867 .fprnd,
868 .fre,
869 .fres,
870 .frsqrte,
871 .frsqrtes,
872 .fsqrt,
873 .htm,
874 .icbt,
875 .isa_v30_instructions,
876 .isel,
877 .ldbrx,
878 .lfiwax,
879 .mfocrf,
880 .partword_atomics,
881 .popcntd,
882 .power8_altivec,
883 .power8_vector,
884 .power9_altivec,
885 .power9_vector,
886 .ppc_postra_sched,
887 .ppc_prera_sched,
888 .recipprec,
889 .stfiwx,
890 .two_const_nr,
891 .vectors_use_two_units,
892 .vsx,
893 }),
894 };
895};
896
897/// All powerpc CPUs, sorted alphabetically by name.
898/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
899/// compiler has inefficient memory and CPU usage, affecting build times.
900pub const all_cpus = &[_]*const Cpu{
901 &cpu.@"440",
902 &cpu.@"450",
903 &cpu.@"601",
904 &cpu.@"602",
905 &cpu.@"603",
906 &cpu.@"603e",
907 &cpu.@"603ev",
908 &cpu.@"604",
909 &cpu.@"604e",
910 &cpu.@"620",
911 &cpu.@"7400",
912 &cpu.@"7450",
913 &cpu.@"750",
914 &cpu.@"970",
915 &cpu.a2,
916 &cpu.a2q,
917 &cpu.e500,
918 &cpu.e500mc,
919 &cpu.e5500,
920 &cpu.g3,
921 &cpu.g4,
922 &cpu.@"g4+",
923 &cpu.g5,
924 &cpu.generic,
925 &cpu.ppc,
926 &cpu.ppc32,
927 &cpu.ppc64,
928 &cpu.ppc64le,
929 &cpu.pwr3,
930 &cpu.pwr4,
931 &cpu.pwr5,
932 &cpu.pwr5x,
933 &cpu.pwr6,
934 &cpu.pwr6x,
935 &cpu.pwr7,
936 &cpu.pwr8,
937 &cpu.pwr9,
938};
lib/std/target/riscv.zig created+122
......@@ -0,0 +1,122 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"64bit",
6 a,
7 c,
8 d,
9 e,
10 f,
11 m,
12 relax,
13};
14
15pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
16
17pub const all_features = blk: {
18 const len = @typeInfo(Feature).Enum.fields.len;
19 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
20 var result: [len]Cpu.Feature = undefined;
21 result[@enumToInt(Feature.@"64bit")] = .{
22 .llvm_name = "64bit",
23 .description = "Implements RV64",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
26 result[@enumToInt(Feature.a)] = .{
27 .llvm_name = "a",
28 .description = "'A' (Atomic Instructions)",
29 .dependencies = featureSet(&[_]Feature{}),
30 };
31 result[@enumToInt(Feature.c)] = .{
32 .llvm_name = "c",
33 .description = "'C' (Compressed Instructions)",
34 .dependencies = featureSet(&[_]Feature{}),
35 };
36 result[@enumToInt(Feature.d)] = .{
37 .llvm_name = "d",
38 .description = "'D' (Double-Precision Floating-Point)",
39 .dependencies = featureSet(&[_]Feature{
40 .f,
41 }),
42 };
43 result[@enumToInt(Feature.e)] = .{
44 .llvm_name = "e",
45 .description = "Implements RV32E (provides 16 rather than 32 GPRs)",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.f)] = .{
49 .llvm_name = "f",
50 .description = "'F' (Single-Precision Floating-Point)",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.m)] = .{
54 .llvm_name = "m",
55 .description = "'M' (Integer Multiplication and Division)",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.relax)] = .{
59 .llvm_name = "relax",
60 .description = "Enable Linker relaxation.",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 const ti = @typeInfo(Feature);
64 for (result) |*elem, i| {
65 elem.index = i;
66 elem.name = ti.Enum.fields[i].name;
67 }
68 break :blk result;
69};
70
71pub const cpu = struct {
72 pub const baseline_rv32 = Cpu{
73 .name = "baseline_rv32",
74 .llvm_name = "generic-rv32",
75 .features = featureSet(&[_]Feature{
76 .a,
77 .c,
78 .d,
79 .f,
80 .m,
81 .relax,
82 }),
83 };
84
85 pub const baseline_rv64 = Cpu{
86 .name = "baseline_rv64",
87 .llvm_name = "generic-rv64",
88 .features = featureSet(&[_]Feature{
89 .@"64bit",
90 .a,
91 .c,
92 .d,
93 .f,
94 .m,
95 .relax,
96 }),
97 };
98
99 pub const generic_rv32 = Cpu{
100 .name = "generic_rv32",
101 .llvm_name = "generic-rv32",
102 .features = featureSet(&[_]Feature{}),
103 };
104
105 pub const generic_rv64 = Cpu{
106 .name = "generic_rv64",
107 .llvm_name = "generic-rv64",
108 .features = featureSet(&[_]Feature{
109 .@"64bit",
110 }),
111 };
112};
113
114/// All riscv CPUs, sorted alphabetically by name.
115/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
116/// compiler has inefficient memory and CPU usage, affecting build times.
117pub const all_cpus = &[_]*const Cpu{
118 &cpu.baseline_rv32,
119 &cpu.baseline_rv64,
120 &cpu.generic_rv32,
121 &cpu.generic_rv64,
122};
lib/std/target/sparc.zig created+495
......@@ -0,0 +1,495 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deprecated_v8,
6 detectroundchange,
7 fixallfdivsqrt,
8 hard_quad_float,
9 hasleoncasa,
10 hasumacsmac,
11 insertnopload,
12 leon,
13 leoncyclecounter,
14 leonpwrpsr,
15 no_fmuls,
16 no_fsmuld,
17 popc,
18 soft_float,
19 soft_mul_div,
20 v9,
21 vis,
22 vis2,
23 vis3,
24};
25
26pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
27
28pub const all_features = blk: {
29 const len = @typeInfo(Feature).Enum.fields.len;
30 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
31 var result: [len]Cpu.Feature = undefined;
32 result[@enumToInt(Feature.deprecated_v8)] = .{
33 .llvm_name = "deprecated-v8",
34 .description = "Enable deprecated V8 instructions in V9 mode",
35 .dependencies = featureSet(&[_]Feature{}),
36 };
37 result[@enumToInt(Feature.detectroundchange)] = .{
38 .llvm_name = "detectroundchange",
39 .description = "LEON3 erratum detection: Detects any rounding mode change request: use only the round-to-nearest rounding mode",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@enumToInt(Feature.fixallfdivsqrt)] = .{
43 .llvm_name = "fixallfdivsqrt",
44 .description = "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store",
45 .dependencies = featureSet(&[_]Feature{}),
46 };
47 result[@enumToInt(Feature.hard_quad_float)] = .{
48 .llvm_name = "hard-quad-float",
49 .description = "Enable quad-word floating point instructions",
50 .dependencies = featureSet(&[_]Feature{}),
51 };
52 result[@enumToInt(Feature.hasleoncasa)] = .{
53 .llvm_name = "hasleoncasa",
54 .description = "Enable CASA instruction for LEON3 and LEON4 processors",
55 .dependencies = featureSet(&[_]Feature{}),
56 };
57 result[@enumToInt(Feature.hasumacsmac)] = .{
58 .llvm_name = "hasumacsmac",
59 .description = "Enable UMAC and SMAC for LEON3 and LEON4 processors",
60 .dependencies = featureSet(&[_]Feature{}),
61 };
62 result[@enumToInt(Feature.insertnopload)] = .{
63 .llvm_name = "insertnopload",
64 .description = "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction",
65 .dependencies = featureSet(&[_]Feature{}),
66 };
67 result[@enumToInt(Feature.leon)] = .{
68 .llvm_name = "leon",
69 .description = "Enable LEON extensions",
70 .dependencies = featureSet(&[_]Feature{}),
71 };
72 result[@enumToInt(Feature.leoncyclecounter)] = .{
73 .llvm_name = "leoncyclecounter",
74 .description = "Use the Leon cycle counter register",
75 .dependencies = featureSet(&[_]Feature{}),
76 };
77 result[@enumToInt(Feature.leonpwrpsr)] = .{
78 .llvm_name = "leonpwrpsr",
79 .description = "Enable the PWRPSR instruction",
80 .dependencies = featureSet(&[_]Feature{}),
81 };
82 result[@enumToInt(Feature.no_fmuls)] = .{
83 .llvm_name = "no-fmuls",
84 .description = "Disable the fmuls instruction.",
85 .dependencies = featureSet(&[_]Feature{}),
86 };
87 result[@enumToInt(Feature.no_fsmuld)] = .{
88 .llvm_name = "no-fsmuld",
89 .description = "Disable the fsmuld instruction.",
90 .dependencies = featureSet(&[_]Feature{}),
91 };
92 result[@enumToInt(Feature.popc)] = .{
93 .llvm_name = "popc",
94 .description = "Use the popc (population count) instruction",
95 .dependencies = featureSet(&[_]Feature{}),
96 };
97 result[@enumToInt(Feature.soft_float)] = .{
98 .llvm_name = "soft-float",
99 .description = "Use software emulation for floating point",
100 .dependencies = featureSet(&[_]Feature{}),
101 };
102 result[@enumToInt(Feature.soft_mul_div)] = .{
103 .llvm_name = "soft-mul-div",
104 .description = "Use software emulation for integer multiply and divide",
105 .dependencies = featureSet(&[_]Feature{}),
106 };
107 result[@enumToInt(Feature.v9)] = .{
108 .llvm_name = "v9",
109 .description = "Enable SPARC-V9 instructions",
110 .dependencies = featureSet(&[_]Feature{}),
111 };
112 result[@enumToInt(Feature.vis)] = .{
113 .llvm_name = "vis",
114 .description = "Enable UltraSPARC Visual Instruction Set extensions",
115 .dependencies = featureSet(&[_]Feature{}),
116 };
117 result[@enumToInt(Feature.vis2)] = .{
118 .llvm_name = "vis2",
119 .description = "Enable Visual Instruction Set extensions II",
120 .dependencies = featureSet(&[_]Feature{}),
121 };
122 result[@enumToInt(Feature.vis3)] = .{
123 .llvm_name = "vis3",
124 .description = "Enable Visual Instruction Set extensions III",
125 .dependencies = featureSet(&[_]Feature{}),
126 };
127 const ti = @typeInfo(Feature);
128 for (result) |*elem, i| {
129 elem.index = i;
130 elem.name = ti.Enum.fields[i].name;
131 }
132 break :blk result;
133};
134
135pub const cpu = struct {
136 pub const at697e = Cpu{
137 .name = "at697e",
138 .llvm_name = "at697e",
139 .features = featureSet(&[_]Feature{
140 .insertnopload,
141 .leon,
142 }),
143 };
144 pub const at697f = Cpu{
145 .name = "at697f",
146 .llvm_name = "at697f",
147 .features = featureSet(&[_]Feature{
148 .insertnopload,
149 .leon,
150 }),
151 };
152 pub const f934 = Cpu{
153 .name = "f934",
154 .llvm_name = "f934",
155 .features = featureSet(&[_]Feature{}),
156 };
157 pub const generic = Cpu{
158 .name = "generic",
159 .llvm_name = "generic",
160 .features = featureSet(&[_]Feature{}),
161 };
162 pub const gr712rc = Cpu{
163 .name = "gr712rc",
164 .llvm_name = "gr712rc",
165 .features = featureSet(&[_]Feature{
166 .hasleoncasa,
167 .leon,
168 }),
169 };
170 pub const gr740 = Cpu{
171 .name = "gr740",
172 .llvm_name = "gr740",
173 .features = featureSet(&[_]Feature{
174 .hasleoncasa,
175 .hasumacsmac,
176 .leon,
177 .leoncyclecounter,
178 .leonpwrpsr,
179 }),
180 };
181 pub const hypersparc = Cpu{
182 .name = "hypersparc",
183 .llvm_name = "hypersparc",
184 .features = featureSet(&[_]Feature{}),
185 };
186 pub const leon2 = Cpu{
187 .name = "leon2",
188 .llvm_name = "leon2",
189 .features = featureSet(&[_]Feature{
190 .leon,
191 }),
192 };
193 pub const leon3 = Cpu{
194 .name = "leon3",
195 .llvm_name = "leon3",
196 .features = featureSet(&[_]Feature{
197 .hasumacsmac,
198 .leon,
199 }),
200 };
201 pub const leon4 = Cpu{
202 .name = "leon4",
203 .llvm_name = "leon4",
204 .features = featureSet(&[_]Feature{
205 .hasleoncasa,
206 .hasumacsmac,
207 .leon,
208 }),
209 };
210 pub const ma2080 = Cpu{
211 .name = "ma2080",
212 .llvm_name = "ma2080",
213 .features = featureSet(&[_]Feature{
214 .hasleoncasa,
215 .leon,
216 }),
217 };
218 pub const ma2085 = Cpu{
219 .name = "ma2085",
220 .llvm_name = "ma2085",
221 .features = featureSet(&[_]Feature{
222 .hasleoncasa,
223 .leon,
224 }),
225 };
226 pub const ma2100 = Cpu{
227 .name = "ma2100",
228 .llvm_name = "ma2100",
229 .features = featureSet(&[_]Feature{
230 .hasleoncasa,
231 .leon,
232 }),
233 };
234 pub const ma2150 = Cpu{
235 .name = "ma2150",
236 .llvm_name = "ma2150",
237 .features = featureSet(&[_]Feature{
238 .hasleoncasa,
239 .leon,
240 }),
241 };
242 pub const ma2155 = Cpu{
243 .name = "ma2155",
244 .llvm_name = "ma2155",
245 .features = featureSet(&[_]Feature{
246 .hasleoncasa,
247 .leon,
248 }),
249 };
250 pub const ma2450 = Cpu{
251 .name = "ma2450",
252 .llvm_name = "ma2450",
253 .features = featureSet(&[_]Feature{
254 .hasleoncasa,
255 .leon,
256 }),
257 };
258 pub const ma2455 = Cpu{
259 .name = "ma2455",
260 .llvm_name = "ma2455",
261 .features = featureSet(&[_]Feature{
262 .hasleoncasa,
263 .leon,
264 }),
265 };
266 pub const ma2480 = Cpu{
267 .name = "ma2480",
268 .llvm_name = "ma2480",
269 .features = featureSet(&[_]Feature{
270 .hasleoncasa,
271 .leon,
272 }),
273 };
274 pub const ma2485 = Cpu{
275 .name = "ma2485",
276 .llvm_name = "ma2485",
277 .features = featureSet(&[_]Feature{
278 .hasleoncasa,
279 .leon,
280 }),
281 };
282 pub const ma2x5x = Cpu{
283 .name = "ma2x5x",
284 .llvm_name = "ma2x5x",
285 .features = featureSet(&[_]Feature{
286 .hasleoncasa,
287 .leon,
288 }),
289 };
290 pub const ma2x8x = Cpu{
291 .name = "ma2x8x",
292 .llvm_name = "ma2x8x",
293 .features = featureSet(&[_]Feature{
294 .hasleoncasa,
295 .leon,
296 }),
297 };
298 pub const myriad2 = Cpu{
299 .name = "myriad2",
300 .llvm_name = "myriad2",
301 .features = featureSet(&[_]Feature{
302 .hasleoncasa,
303 .leon,
304 }),
305 };
306 pub const myriad2_1 = Cpu{
307 .name = "myriad2_1",
308 .llvm_name = "myriad2.1",
309 .features = featureSet(&[_]Feature{
310 .hasleoncasa,
311 .leon,
312 }),
313 };
314 pub const myriad2_2 = Cpu{
315 .name = "myriad2_2",
316 .llvm_name = "myriad2.2",
317 .features = featureSet(&[_]Feature{
318 .hasleoncasa,
319 .leon,
320 }),
321 };
322 pub const myriad2_3 = Cpu{
323 .name = "myriad2_3",
324 .llvm_name = "myriad2.3",
325 .features = featureSet(&[_]Feature{
326 .hasleoncasa,
327 .leon,
328 }),
329 };
330 pub const niagara = Cpu{
331 .name = "niagara",
332 .llvm_name = "niagara",
333 .features = featureSet(&[_]Feature{
334 .deprecated_v8,
335 .v9,
336 .vis,
337 .vis2,
338 }),
339 };
340 pub const niagara2 = Cpu{
341 .name = "niagara2",
342 .llvm_name = "niagara2",
343 .features = featureSet(&[_]Feature{
344 .deprecated_v8,
345 .popc,
346 .v9,
347 .vis,
348 .vis2,
349 }),
350 };
351 pub const niagara3 = Cpu{
352 .name = "niagara3",
353 .llvm_name = "niagara3",
354 .features = featureSet(&[_]Feature{
355 .deprecated_v8,
356 .popc,
357 .v9,
358 .vis,
359 .vis2,
360 }),
361 };
362 pub const niagara4 = Cpu{
363 .name = "niagara4",
364 .llvm_name = "niagara4",
365 .features = featureSet(&[_]Feature{
366 .deprecated_v8,
367 .popc,
368 .v9,
369 .vis,
370 .vis2,
371 .vis3,
372 }),
373 };
374 pub const sparclet = Cpu{
375 .name = "sparclet",
376 .llvm_name = "sparclet",
377 .features = featureSet(&[_]Feature{}),
378 };
379 pub const sparclite = Cpu{
380 .name = "sparclite",
381 .llvm_name = "sparclite",
382 .features = featureSet(&[_]Feature{}),
383 };
384 pub const sparclite86x = Cpu{
385 .name = "sparclite86x",
386 .llvm_name = "sparclite86x",
387 .features = featureSet(&[_]Feature{}),
388 };
389 pub const supersparc = Cpu{
390 .name = "supersparc",
391 .llvm_name = "supersparc",
392 .features = featureSet(&[_]Feature{}),
393 };
394 pub const tsc701 = Cpu{
395 .name = "tsc701",
396 .llvm_name = "tsc701",
397 .features = featureSet(&[_]Feature{}),
398 };
399 pub const ultrasparc = Cpu{
400 .name = "ultrasparc",
401 .llvm_name = "ultrasparc",
402 .features = featureSet(&[_]Feature{
403 .deprecated_v8,
404 .v9,
405 .vis,
406 }),
407 };
408 pub const ultrasparc3 = Cpu{
409 .name = "ultrasparc3",
410 .llvm_name = "ultrasparc3",
411 .features = featureSet(&[_]Feature{
412 .deprecated_v8,
413 .v9,
414 .vis,
415 .vis2,
416 }),
417 };
418 pub const ut699 = Cpu{
419 .name = "ut699",
420 .llvm_name = "ut699",
421 .features = featureSet(&[_]Feature{
422 .fixallfdivsqrt,
423 .insertnopload,
424 .leon,
425 .no_fmuls,
426 .no_fsmuld,
427 }),
428 };
429 pub const v7 = Cpu{
430 .name = "v7",
431 .llvm_name = "v7",
432 .features = featureSet(&[_]Feature{
433 .no_fsmuld,
434 .soft_mul_div,
435 }),
436 };
437 pub const v8 = Cpu{
438 .name = "v8",
439 .llvm_name = "v8",
440 .features = featureSet(&[_]Feature{}),
441 };
442 pub const v9 = Cpu{
443 .name = "v9",
444 .llvm_name = "v9",
445 .features = featureSet(&[_]Feature{
446 .v9,
447 }),
448 };
449};
450
451/// All sparc CPUs, sorted alphabetically by name.
452/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
453/// compiler has inefficient memory and CPU usage, affecting build times.
454pub const all_cpus = &[_]*const Cpu{
455 &cpu.at697e,
456 &cpu.at697f,
457 &cpu.f934,
458 &cpu.generic,
459 &cpu.gr712rc,
460 &cpu.gr740,
461 &cpu.hypersparc,
462 &cpu.leon2,
463 &cpu.leon3,
464 &cpu.leon4,
465 &cpu.ma2080,
466 &cpu.ma2085,
467 &cpu.ma2100,
468 &cpu.ma2150,
469 &cpu.ma2155,
470 &cpu.ma2450,
471 &cpu.ma2455,
472 &cpu.ma2480,
473 &cpu.ma2485,
474 &cpu.ma2x5x,
475 &cpu.ma2x8x,
476 &cpu.myriad2,
477 &cpu.myriad2_1,
478 &cpu.myriad2_2,
479 &cpu.myriad2_3,
480 &cpu.niagara,
481 &cpu.niagara2,
482 &cpu.niagara3,
483 &cpu.niagara4,
484 &cpu.sparclet,
485 &cpu.sparclite,
486 &cpu.sparclite86x,
487 &cpu.supersparc,
488 &cpu.tsc701,
489 &cpu.ultrasparc,
490 &cpu.ultrasparc3,
491 &cpu.ut699,
492 &cpu.v7,
493 &cpu.v8,
494 &cpu.v9,
495};
lib/std/target/systemz.zig created+510
......@@ -0,0 +1,510 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 deflate_conversion,
6 dfp_packed_conversion,
7 dfp_zoned_conversion,
8 distinct_ops,
9 enhanced_dat_2,
10 enhanced_sort,
11 execution_hint,
12 fast_serialization,
13 fp_extension,
14 guarded_storage,
15 high_word,
16 insert_reference_bits_multiple,
17 interlocked_access1,
18 load_and_trap,
19 load_and_zero_rightmost_byte,
20 load_store_on_cond,
21 load_store_on_cond_2,
22 message_security_assist_extension3,
23 message_security_assist_extension4,
24 message_security_assist_extension5,
25 message_security_assist_extension7,
26 message_security_assist_extension8,
27 message_security_assist_extension9,
28 miscellaneous_extensions,
29 miscellaneous_extensions_2,
30 miscellaneous_extensions_3,
31 population_count,
32 processor_assist,
33 reset_reference_bits_multiple,
34 transactional_execution,
35 vector,
36 vector_enhancements_1,
37 vector_enhancements_2,
38 vector_packed_decimal,
39 vector_packed_decimal_enhancement,
40};
41
42pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
43
44pub const all_features = blk: {
45 const len = @typeInfo(Feature).Enum.fields.len;
46 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
47 var result: [len]Cpu.Feature = undefined;
48 result[@enumToInt(Feature.deflate_conversion)] = .{
49 .llvm_name = "deflate-conversion",
50 .description = "Assume that the deflate-conversion facility is installed",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.dfp_packed_conversion)] = .{
54 .llvm_name = "dfp-packed-conversion",
55 .description = "Assume that the DFP packed-conversion facility is installed",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.dfp_zoned_conversion)] = .{
59 .llvm_name = "dfp-zoned-conversion",
60 .description = "Assume that the DFP zoned-conversion facility is installed",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.distinct_ops)] = .{
64 .llvm_name = "distinct-ops",
65 .description = "Assume that the distinct-operands facility is installed",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.enhanced_dat_2)] = .{
69 .llvm_name = "enhanced-dat-2",
70 .description = "Assume that the enhanced-DAT facility 2 is installed",
71 .dependencies = featureSet(&[_]Feature{}),
72 };
73 result[@enumToInt(Feature.enhanced_sort)] = .{
74 .llvm_name = "enhanced-sort",
75 .description = "Assume that the enhanced-sort facility is installed",
76 .dependencies = featureSet(&[_]Feature{}),
77 };
78 result[@enumToInt(Feature.execution_hint)] = .{
79 .llvm_name = "execution-hint",
80 .description = "Assume that the execution-hint facility is installed",
81 .dependencies = featureSet(&[_]Feature{}),
82 };
83 result[@enumToInt(Feature.fast_serialization)] = .{
84 .llvm_name = "fast-serialization",
85 .description = "Assume that the fast-serialization facility is installed",
86 .dependencies = featureSet(&[_]Feature{}),
87 };
88 result[@enumToInt(Feature.fp_extension)] = .{
89 .llvm_name = "fp-extension",
90 .description = "Assume that the floating-point extension facility is installed",
91 .dependencies = featureSet(&[_]Feature{}),
92 };
93 result[@enumToInt(Feature.guarded_storage)] = .{
94 .llvm_name = "guarded-storage",
95 .description = "Assume that the guarded-storage facility is installed",
96 .dependencies = featureSet(&[_]Feature{}),
97 };
98 result[@enumToInt(Feature.high_word)] = .{
99 .llvm_name = "high-word",
100 .description = "Assume that the high-word facility is installed",
101 .dependencies = featureSet(&[_]Feature{}),
102 };
103 result[@enumToInt(Feature.insert_reference_bits_multiple)] = .{
104 .llvm_name = "insert-reference-bits-multiple",
105 .description = "Assume that the insert-reference-bits-multiple facility is installed",
106 .dependencies = featureSet(&[_]Feature{}),
107 };
108 result[@enumToInt(Feature.interlocked_access1)] = .{
109 .llvm_name = "interlocked-access1",
110 .description = "Assume that interlocked-access facility 1 is installed",
111 .dependencies = featureSet(&[_]Feature{}),
112 };
113 result[@enumToInt(Feature.load_and_trap)] = .{
114 .llvm_name = "load-and-trap",
115 .description = "Assume that the load-and-trap facility is installed",
116 .dependencies = featureSet(&[_]Feature{}),
117 };
118 result[@enumToInt(Feature.load_and_zero_rightmost_byte)] = .{
119 .llvm_name = "load-and-zero-rightmost-byte",
120 .description = "Assume that the load-and-zero-rightmost-byte facility is installed",
121 .dependencies = featureSet(&[_]Feature{}),
122 };
123 result[@enumToInt(Feature.load_store_on_cond)] = .{
124 .llvm_name = "load-store-on-cond",
125 .description = "Assume that the load/store-on-condition facility is installed",
126 .dependencies = featureSet(&[_]Feature{}),
127 };
128 result[@enumToInt(Feature.load_store_on_cond_2)] = .{
129 .llvm_name = "load-store-on-cond-2",
130 .description = "Assume that the load/store-on-condition facility 2 is installed",
131 .dependencies = featureSet(&[_]Feature{}),
132 };
133 result[@enumToInt(Feature.message_security_assist_extension3)] = .{
134 .llvm_name = "message-security-assist-extension3",
135 .description = "Assume that the message-security-assist extension facility 3 is installed",
136 .dependencies = featureSet(&[_]Feature{}),
137 };
138 result[@enumToInt(Feature.message_security_assist_extension4)] = .{
139 .llvm_name = "message-security-assist-extension4",
140 .description = "Assume that the message-security-assist extension facility 4 is installed",
141 .dependencies = featureSet(&[_]Feature{}),
142 };
143 result[@enumToInt(Feature.message_security_assist_extension5)] = .{
144 .llvm_name = "message-security-assist-extension5",
145 .description = "Assume that the message-security-assist extension facility 5 is installed",
146 .dependencies = featureSet(&[_]Feature{}),
147 };
148 result[@enumToInt(Feature.message_security_assist_extension7)] = .{
149 .llvm_name = "message-security-assist-extension7",
150 .description = "Assume that the message-security-assist extension facility 7 is installed",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.message_security_assist_extension8)] = .{
154 .llvm_name = "message-security-assist-extension8",
155 .description = "Assume that the message-security-assist extension facility 8 is installed",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.message_security_assist_extension9)] = .{
159 .llvm_name = "message-security-assist-extension9",
160 .description = "Assume that the message-security-assist extension facility 9 is installed",
161 .dependencies = featureSet(&[_]Feature{}),
162 };
163 result[@enumToInt(Feature.miscellaneous_extensions)] = .{
164 .llvm_name = "miscellaneous-extensions",
165 .description = "Assume that the miscellaneous-extensions facility is installed",
166 .dependencies = featureSet(&[_]Feature{}),
167 };
168 result[@enumToInt(Feature.miscellaneous_extensions_2)] = .{
169 .llvm_name = "miscellaneous-extensions-2",
170 .description = "Assume that the miscellaneous-extensions facility 2 is installed",
171 .dependencies = featureSet(&[_]Feature{}),
172 };
173 result[@enumToInt(Feature.miscellaneous_extensions_3)] = .{
174 .llvm_name = "miscellaneous-extensions-3",
175 .description = "Assume that the miscellaneous-extensions facility 3 is installed",
176 .dependencies = featureSet(&[_]Feature{}),
177 };
178 result[@enumToInt(Feature.population_count)] = .{
179 .llvm_name = "population-count",
180 .description = "Assume that the population-count facility is installed",
181 .dependencies = featureSet(&[_]Feature{}),
182 };
183 result[@enumToInt(Feature.processor_assist)] = .{
184 .llvm_name = "processor-assist",
185 .description = "Assume that the processor-assist facility is installed",
186 .dependencies = featureSet(&[_]Feature{}),
187 };
188 result[@enumToInt(Feature.reset_reference_bits_multiple)] = .{
189 .llvm_name = "reset-reference-bits-multiple",
190 .description = "Assume that the reset-reference-bits-multiple facility is installed",
191 .dependencies = featureSet(&[_]Feature{}),
192 };
193 result[@enumToInt(Feature.transactional_execution)] = .{
194 .llvm_name = "transactional-execution",
195 .description = "Assume that the transactional-execution facility is installed",
196 .dependencies = featureSet(&[_]Feature{}),
197 };
198 result[@enumToInt(Feature.vector)] = .{
199 .llvm_name = "vector",
200 .description = "Assume that the vectory facility is installed",
201 .dependencies = featureSet(&[_]Feature{}),
202 };
203 result[@enumToInt(Feature.vector_enhancements_1)] = .{
204 .llvm_name = "vector-enhancements-1",
205 .description = "Assume that the vector enhancements facility 1 is installed",
206 .dependencies = featureSet(&[_]Feature{}),
207 };
208 result[@enumToInt(Feature.vector_enhancements_2)] = .{
209 .llvm_name = "vector-enhancements-2",
210 .description = "Assume that the vector enhancements facility 2 is installed",
211 .dependencies = featureSet(&[_]Feature{}),
212 };
213 result[@enumToInt(Feature.vector_packed_decimal)] = .{
214 .llvm_name = "vector-packed-decimal",
215 .description = "Assume that the vector packed decimal facility is installed",
216 .dependencies = featureSet(&[_]Feature{}),
217 };
218 result[@enumToInt(Feature.vector_packed_decimal_enhancement)] = .{
219 .llvm_name = "vector-packed-decimal-enhancement",
220 .description = "Assume that the vector packed decimal enhancement facility is installed",
221 .dependencies = featureSet(&[_]Feature{}),
222 };
223 const ti = @typeInfo(Feature);
224 for (result) |*elem, i| {
225 elem.index = i;
226 elem.name = ti.Enum.fields[i].name;
227 }
228 break :blk result;
229};
230
231pub const cpu = struct {
232 pub const arch10 = Cpu{
233 .name = "arch10",
234 .llvm_name = "arch10",
235 .features = featureSet(&[_]Feature{
236 .dfp_zoned_conversion,
237 .distinct_ops,
238 .enhanced_dat_2,
239 .execution_hint,
240 .fast_serialization,
241 .fp_extension,
242 .high_word,
243 .interlocked_access1,
244 .load_and_trap,
245 .load_store_on_cond,
246 .message_security_assist_extension3,
247 .message_security_assist_extension4,
248 .miscellaneous_extensions,
249 .population_count,
250 .processor_assist,
251 .reset_reference_bits_multiple,
252 .transactional_execution,
253 }),
254 };
255 pub const arch11 = Cpu{
256 .name = "arch11",
257 .llvm_name = "arch11",
258 .features = featureSet(&[_]Feature{
259 .dfp_packed_conversion,
260 .dfp_zoned_conversion,
261 .distinct_ops,
262 .enhanced_dat_2,
263 .execution_hint,
264 .fast_serialization,
265 .fp_extension,
266 .high_word,
267 .interlocked_access1,
268 .load_and_trap,
269 .load_and_zero_rightmost_byte,
270 .load_store_on_cond,
271 .load_store_on_cond_2,
272 .message_security_assist_extension3,
273 .message_security_assist_extension4,
274 .message_security_assist_extension5,
275 .miscellaneous_extensions,
276 .population_count,
277 .processor_assist,
278 .reset_reference_bits_multiple,
279 .transactional_execution,
280 .vector,
281 }),
282 };
283 pub const arch12 = Cpu{
284 .name = "arch12",
285 .llvm_name = "arch12",
286 .features = featureSet(&[_]Feature{
287 .dfp_packed_conversion,
288 .dfp_zoned_conversion,
289 .distinct_ops,
290 .enhanced_dat_2,
291 .execution_hint,
292 .fast_serialization,
293 .fp_extension,
294 .guarded_storage,
295 .high_word,
296 .insert_reference_bits_multiple,
297 .interlocked_access1,
298 .load_and_trap,
299 .load_and_zero_rightmost_byte,
300 .load_store_on_cond,
301 .load_store_on_cond_2,
302 .message_security_assist_extension3,
303 .message_security_assist_extension4,
304 .message_security_assist_extension5,
305 .message_security_assist_extension7,
306 .message_security_assist_extension8,
307 .miscellaneous_extensions,
308 .miscellaneous_extensions_2,
309 .population_count,
310 .processor_assist,
311 .reset_reference_bits_multiple,
312 .transactional_execution,
313 .vector,
314 .vector_enhancements_1,
315 .vector_packed_decimal,
316 }),
317 };
318 pub const arch13 = Cpu{
319 .name = "arch13",
320 .llvm_name = "arch13",
321 .features = featureSet(&[_]Feature{
322 .deflate_conversion,
323 .dfp_packed_conversion,
324 .dfp_zoned_conversion,
325 .distinct_ops,
326 .enhanced_dat_2,
327 .enhanced_sort,
328 .execution_hint,
329 .fast_serialization,
330 .fp_extension,
331 .guarded_storage,
332 .high_word,
333 .insert_reference_bits_multiple,
334 .interlocked_access1,
335 .load_and_trap,
336 .load_and_zero_rightmost_byte,
337 .load_store_on_cond,
338 .load_store_on_cond_2,
339 .message_security_assist_extension3,
340 .message_security_assist_extension4,
341 .message_security_assist_extension5,
342 .message_security_assist_extension7,
343 .message_security_assist_extension8,
344 .message_security_assist_extension9,
345 .miscellaneous_extensions,
346 .miscellaneous_extensions_2,
347 .miscellaneous_extensions_3,
348 .population_count,
349 .processor_assist,
350 .reset_reference_bits_multiple,
351 .transactional_execution,
352 .vector,
353 .vector_enhancements_1,
354 .vector_enhancements_2,
355 .vector_packed_decimal,
356 .vector_packed_decimal_enhancement,
357 }),
358 };
359 pub const arch8 = Cpu{
360 .name = "arch8",
361 .llvm_name = "arch8",
362 .features = featureSet(&[_]Feature{}),
363 };
364 pub const arch9 = Cpu{
365 .name = "arch9",
366 .llvm_name = "arch9",
367 .features = featureSet(&[_]Feature{
368 .distinct_ops,
369 .fast_serialization,
370 .fp_extension,
371 .high_word,
372 .interlocked_access1,
373 .load_store_on_cond,
374 .message_security_assist_extension3,
375 .message_security_assist_extension4,
376 .population_count,
377 .reset_reference_bits_multiple,
378 }),
379 };
380 pub const generic = Cpu{
381 .name = "generic",
382 .llvm_name = "generic",
383 .features = featureSet(&[_]Feature{}),
384 };
385 pub const z10 = Cpu{
386 .name = "z10",
387 .llvm_name = "z10",
388 .features = featureSet(&[_]Feature{}),
389 };
390 pub const z13 = Cpu{
391 .name = "z13",
392 .llvm_name = "z13",
393 .features = featureSet(&[_]Feature{
394 .dfp_packed_conversion,
395 .dfp_zoned_conversion,
396 .distinct_ops,
397 .enhanced_dat_2,
398 .execution_hint,
399 .fast_serialization,
400 .fp_extension,
401 .high_word,
402 .interlocked_access1,
403 .load_and_trap,
404 .load_and_zero_rightmost_byte,
405 .load_store_on_cond,
406 .load_store_on_cond_2,
407 .message_security_assist_extension3,
408 .message_security_assist_extension4,
409 .message_security_assist_extension5,
410 .miscellaneous_extensions,
411 .population_count,
412 .processor_assist,
413 .reset_reference_bits_multiple,
414 .transactional_execution,
415 .vector,
416 }),
417 };
418 pub const z14 = Cpu{
419 .name = "z14",
420 .llvm_name = "z14",
421 .features = featureSet(&[_]Feature{
422 .dfp_packed_conversion,
423 .dfp_zoned_conversion,
424 .distinct_ops,
425 .enhanced_dat_2,
426 .execution_hint,
427 .fast_serialization,
428 .fp_extension,
429 .guarded_storage,
430 .high_word,
431 .insert_reference_bits_multiple,
432 .interlocked_access1,
433 .load_and_trap,
434 .load_and_zero_rightmost_byte,
435 .load_store_on_cond,
436 .load_store_on_cond_2,
437 .message_security_assist_extension3,
438 .message_security_assist_extension4,
439 .message_security_assist_extension5,
440 .message_security_assist_extension7,
441 .message_security_assist_extension8,
442 .miscellaneous_extensions,
443 .miscellaneous_extensions_2,
444 .population_count,
445 .processor_assist,
446 .reset_reference_bits_multiple,
447 .transactional_execution,
448 .vector,
449 .vector_enhancements_1,
450 .vector_packed_decimal,
451 }),
452 };
453 pub const z196 = Cpu{
454 .name = "z196",
455 .llvm_name = "z196",
456 .features = featureSet(&[_]Feature{
457 .distinct_ops,
458 .fast_serialization,
459 .fp_extension,
460 .high_word,
461 .interlocked_access1,
462 .load_store_on_cond,
463 .message_security_assist_extension3,
464 .message_security_assist_extension4,
465 .population_count,
466 .reset_reference_bits_multiple,
467 }),
468 };
469 pub const zEC12 = Cpu{
470 .name = "zEC12",
471 .llvm_name = "zEC12",
472 .features = featureSet(&[_]Feature{
473 .dfp_zoned_conversion,
474 .distinct_ops,
475 .enhanced_dat_2,
476 .execution_hint,
477 .fast_serialization,
478 .fp_extension,
479 .high_word,
480 .interlocked_access1,
481 .load_and_trap,
482 .load_store_on_cond,
483 .message_security_assist_extension3,
484 .message_security_assist_extension4,
485 .miscellaneous_extensions,
486 .population_count,
487 .processor_assist,
488 .reset_reference_bits_multiple,
489 .transactional_execution,
490 }),
491 };
492};
493
494/// All systemz CPUs, sorted alphabetically by name.
495/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
496/// compiler has inefficient memory and CPU usage, affecting build times.
497pub const all_cpus = &[_]*const Cpu{
498 &cpu.arch10,
499 &cpu.arch11,
500 &cpu.arch12,
501 &cpu.arch13,
502 &cpu.arch8,
503 &cpu.arch9,
504 &cpu.generic,
505 &cpu.z10,
506 &cpu.z13,
507 &cpu.z14,
508 &cpu.z196,
509 &cpu.zEC12,
510};
lib/std/target/wasm.zig created+114
......@@ -0,0 +1,114 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 atomics,
6 bulk_memory,
7 exception_handling,
8 multivalue,
9 mutable_globals,
10 nontrapping_fptoint,
11 sign_ext,
12 simd128,
13 tail_call,
14 unimplemented_simd128,
15};
16
17pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
18
19pub const all_features = blk: {
20 const len = @typeInfo(Feature).Enum.fields.len;
21 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
22 var result: [len]Cpu.Feature = undefined;
23 result[@enumToInt(Feature.atomics)] = .{
24 .llvm_name = "atomics",
25 .description = "Enable Atomics",
26 .dependencies = featureSet(&[_]Feature{}),
27 };
28 result[@enumToInt(Feature.bulk_memory)] = .{
29 .llvm_name = "bulk-memory",
30 .description = "Enable bulk memory operations",
31 .dependencies = featureSet(&[_]Feature{}),
32 };
33 result[@enumToInt(Feature.exception_handling)] = .{
34 .llvm_name = "exception-handling",
35 .description = "Enable Wasm exception handling",
36 .dependencies = featureSet(&[_]Feature{}),
37 };
38 result[@enumToInt(Feature.multivalue)] = .{
39 .llvm_name = "multivalue",
40 .description = "Enable multivalue blocks, instructions, and functions",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 result[@enumToInt(Feature.mutable_globals)] = .{
44 .llvm_name = "mutable-globals",
45 .description = "Enable mutable globals",
46 .dependencies = featureSet(&[_]Feature{}),
47 };
48 result[@enumToInt(Feature.nontrapping_fptoint)] = .{
49 .llvm_name = "nontrapping-fptoint",
50 .description = "Enable non-trapping float-to-int conversion operators",
51 .dependencies = featureSet(&[_]Feature{}),
52 };
53 result[@enumToInt(Feature.sign_ext)] = .{
54 .llvm_name = "sign-ext",
55 .description = "Enable sign extension operators",
56 .dependencies = featureSet(&[_]Feature{}),
57 };
58 result[@enumToInt(Feature.simd128)] = .{
59 .llvm_name = "simd128",
60 .description = "Enable 128-bit SIMD",
61 .dependencies = featureSet(&[_]Feature{}),
62 };
63 result[@enumToInt(Feature.tail_call)] = .{
64 .llvm_name = "tail-call",
65 .description = "Enable tail call instructions",
66 .dependencies = featureSet(&[_]Feature{}),
67 };
68 result[@enumToInt(Feature.unimplemented_simd128)] = .{
69 .llvm_name = "unimplemented-simd128",
70 .description = "Enable 128-bit SIMD not yet implemented in engines",
71 .dependencies = featureSet(&[_]Feature{
72 .simd128,
73 }),
74 };
75 const ti = @typeInfo(Feature);
76 for (result) |*elem, i| {
77 elem.index = i;
78 elem.name = ti.Enum.fields[i].name;
79 }
80 break :blk result;
81};
82
83pub const cpu = struct {
84 pub const bleeding_edge = Cpu{
85 .name = "bleeding_edge",
86 .llvm_name = "bleeding-edge",
87 .features = featureSet(&[_]Feature{
88 .atomics,
89 .mutable_globals,
90 .nontrapping_fptoint,
91 .sign_ext,
92 .simd128,
93 }),
94 };
95 pub const generic = Cpu{
96 .name = "generic",
97 .llvm_name = "generic",
98 .features = featureSet(&[_]Feature{}),
99 };
100 pub const mvp = Cpu{
101 .name = "mvp",
102 .llvm_name = "mvp",
103 .features = featureSet(&[_]Feature{}),
104 };
105};
106
107/// All wasm CPUs, sorted alphabetically by name.
108/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
109/// compiler has inefficient memory and CPU usage, affecting build times.
110pub const all_cpus = &[_]*const Cpu{
111 &cpu.bleeding_edge,
112 &cpu.generic,
113 &cpu.mvp,
114};
lib/std/target/x86.zig created+2859
......@@ -0,0 +1,2859 @@
1const std = @import("../std.zig");
2const Cpu = std.Target.Cpu;
3
4pub const Feature = enum {
5 @"3dnow",
6 @"3dnowa",
7 @"64bit",
8 adx,
9 aes,
10 avx,
11 avx2,
12 avx512bf16,
13 avx512bitalg,
14 avx512bw,
15 avx512cd,
16 avx512dq,
17 avx512er,
18 avx512f,
19 avx512ifma,
20 avx512pf,
21 avx512vbmi,
22 avx512vbmi2,
23 avx512vl,
24 avx512vnni,
25 avx512vp2intersect,
26 avx512vpopcntdq,
27 bmi,
28 bmi2,
29 branchfusion,
30 cldemote,
31 clflushopt,
32 clwb,
33 clzero,
34 cmov,
35 cx16,
36 cx8,
37 enqcmd,
38 ermsb,
39 f16c,
40 false_deps_lzcnt_tzcnt,
41 false_deps_popcnt,
42 fast_11bytenop,
43 fast_15bytenop,
44 fast_bextr,
45 fast_gather,
46 fast_hops,
47 fast_lzcnt,
48 fast_partial_ymm_or_zmm_write,
49 fast_scalar_fsqrt,
50 fast_scalar_shift_masks,
51 fast_shld_rotate,
52 fast_variable_shuffle,
53 fast_vector_fsqrt,
54 fast_vector_shift_masks,
55 fma,
56 fma4,
57 fsgsbase,
58 fxsr,
59 gfni,
60 idivl_to_divb,
61 idivq_to_divl,
62 invpcid,
63 lea_sp,
64 lea_uses_ag,
65 lwp,
66 lzcnt,
67 macrofusion,
68 merge_to_threeway_branch,
69 mmx,
70 movbe,
71 movdir64b,
72 movdiri,
73 mpx,
74 mwaitx,
75 nopl,
76 pad_short_functions,
77 pclmul,
78 pconfig,
79 pku,
80 popcnt,
81 prefer_256_bit,
82 prefetchwt1,
83 prfchw,
84 ptwrite,
85 rdpid,
86 rdrnd,
87 rdseed,
88 retpoline,
89 retpoline_external_thunk,
90 retpoline_indirect_branches,
91 retpoline_indirect_calls,
92 rtm,
93 sahf,
94 sgx,
95 sha,
96 shstk,
97 slow_3ops_lea,
98 slow_incdec,
99 slow_lea,
100 slow_pmaddwd,
101 slow_pmulld,
102 slow_shld,
103 slow_two_mem_ops,
104 slow_unaligned_mem_16,
105 slow_unaligned_mem_32,
106 soft_float,
107 sse,
108 sse_unaligned_mem,
109 sse2,
110 sse3,
111 sse4_1,
112 sse4_2,
113 sse4a,
114 ssse3,
115 tbm,
116 vaes,
117 vpclmulqdq,
118 waitpkg,
119 wbnoinvd,
120 x87,
121 xop,
122 xsave,
123 xsavec,
124 xsaveopt,
125 xsaves,
126};
127
128pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
129
130pub const all_features = blk: {
131 const len = @typeInfo(Feature).Enum.fields.len;
132 std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
133 var result: [len]Cpu.Feature = undefined;
134 result[@enumToInt(Feature.@"3dnow")] = .{
135 .llvm_name = "3dnow",
136 .description = "Enable 3DNow! instructions",
137 .dependencies = featureSet(&[_]Feature{
138 .mmx,
139 }),
140 };
141 result[@enumToInt(Feature.@"3dnowa")] = .{
142 .llvm_name = "3dnowa",
143 .description = "Enable 3DNow! Athlon instructions",
144 .dependencies = featureSet(&[_]Feature{
145 .@"3dnow",
146 }),
147 };
148 result[@enumToInt(Feature.@"64bit")] = .{
149 .llvm_name = "64bit",
150 .description = "Support 64-bit instructions",
151 .dependencies = featureSet(&[_]Feature{}),
152 };
153 result[@enumToInt(Feature.adx)] = .{
154 .llvm_name = "adx",
155 .description = "Support ADX instructions",
156 .dependencies = featureSet(&[_]Feature{}),
157 };
158 result[@enumToInt(Feature.aes)] = .{
159 .llvm_name = "aes",
160 .description = "Enable AES instructions",
161 .dependencies = featureSet(&[_]Feature{
162 .sse2,
163 }),
164 };
165 result[@enumToInt(Feature.avx)] = .{
166 .llvm_name = "avx",
167 .description = "Enable AVX instructions",
168 .dependencies = featureSet(&[_]Feature{
169 .sse4_2,
170 }),
171 };
172 result[@enumToInt(Feature.avx2)] = .{
173 .llvm_name = "avx2",
174 .description = "Enable AVX2 instructions",
175 .dependencies = featureSet(&[_]Feature{
176 .avx,
177 }),
178 };
179 result[@enumToInt(Feature.avx512bf16)] = .{
180 .llvm_name = "avx512bf16",
181 .description = "Support bfloat16 floating point",
182 .dependencies = featureSet(&[_]Feature{
183 .avx512bw,
184 }),
185 };
186 result[@enumToInt(Feature.avx512bitalg)] = .{
187 .llvm_name = "avx512bitalg",
188 .description = "Enable AVX-512 Bit Algorithms",
189 .dependencies = featureSet(&[_]Feature{
190 .avx512bw,
191 }),
192 };
193 result[@enumToInt(Feature.avx512bw)] = .{
194 .llvm_name = "avx512bw",
195 .description = "Enable AVX-512 Byte and Word Instructions",
196 .dependencies = featureSet(&[_]Feature{
197 .avx512f,
198 }),
199 };
200 result[@enumToInt(Feature.avx512cd)] = .{
201 .llvm_name = "avx512cd",
202 .description = "Enable AVX-512 Conflict Detection Instructions",
203 .dependencies = featureSet(&[_]Feature{
204 .avx512f,
205 }),
206 };
207 result[@enumToInt(Feature.avx512dq)] = .{
208 .llvm_name = "avx512dq",
209 .description = "Enable AVX-512 Doubleword and Quadword Instructions",
210 .dependencies = featureSet(&[_]Feature{
211 .avx512f,
212 }),
213 };
214 result[@enumToInt(Feature.avx512er)] = .{
215 .llvm_name = "avx512er",
216 .description = "Enable AVX-512 Exponential and Reciprocal Instructions",
217 .dependencies = featureSet(&[_]Feature{
218 .avx512f,
219 }),
220 };
221 result[@enumToInt(Feature.avx512f)] = .{
222 .llvm_name = "avx512f",
223 .description = "Enable AVX-512 instructions",
224 .dependencies = featureSet(&[_]Feature{
225 .avx2,
226 .f16c,
227 .fma,
228 }),
229 };
230 result[@enumToInt(Feature.avx512ifma)] = .{
231 .llvm_name = "avx512ifma",
232 .description = "Enable AVX-512 Integer Fused Multiple-Add",
233 .dependencies = featureSet(&[_]Feature{
234 .avx512f,
235 }),
236 };
237 result[@enumToInt(Feature.avx512pf)] = .{
238 .llvm_name = "avx512pf",
239 .description = "Enable AVX-512 PreFetch Instructions",
240 .dependencies = featureSet(&[_]Feature{
241 .avx512f,
242 }),
243 };
244 result[@enumToInt(Feature.avx512vbmi)] = .{
245 .llvm_name = "avx512vbmi",
246 .description = "Enable AVX-512 Vector Byte Manipulation Instructions",
247 .dependencies = featureSet(&[_]Feature{
248 .avx512bw,
249 }),
250 };
251 result[@enumToInt(Feature.avx512vbmi2)] = .{
252 .llvm_name = "avx512vbmi2",
253 .description = "Enable AVX-512 further Vector Byte Manipulation Instructions",
254 .dependencies = featureSet(&[_]Feature{
255 .avx512bw,
256 }),
257 };
258 result[@enumToInt(Feature.avx512vl)] = .{
259 .llvm_name = "avx512vl",
260 .description = "Enable AVX-512 Vector Length eXtensions",
261 .dependencies = featureSet(&[_]Feature{
262 .avx512f,
263 }),
264 };
265 result[@enumToInt(Feature.avx512vnni)] = .{
266 .llvm_name = "avx512vnni",
267 .description = "Enable AVX-512 Vector Neural Network Instructions",
268 .dependencies = featureSet(&[_]Feature{
269 .avx512f,
270 }),
271 };
272 result[@enumToInt(Feature.avx512vp2intersect)] = .{
273 .llvm_name = "avx512vp2intersect",
274 .description = "Enable AVX-512 vp2intersect",
275 .dependencies = featureSet(&[_]Feature{
276 .avx512f,
277 }),
278 };
279 result[@enumToInt(Feature.avx512vpopcntdq)] = .{
280 .llvm_name = "avx512vpopcntdq",
281 .description = "Enable AVX-512 Population Count Instructions",
282 .dependencies = featureSet(&[_]Feature{
283 .avx512f,
284 }),
285 };
286 result[@enumToInt(Feature.bmi)] = .{
287 .llvm_name = "bmi",
288 .description = "Support BMI instructions",
289 .dependencies = featureSet(&[_]Feature{}),
290 };
291 result[@enumToInt(Feature.bmi2)] = .{
292 .llvm_name = "bmi2",
293 .description = "Support BMI2 instructions",
294 .dependencies = featureSet(&[_]Feature{}),
295 };
296 result[@enumToInt(Feature.branchfusion)] = .{
297 .llvm_name = "branchfusion",
298 .description = "CMP/TEST can be fused with conditional branches",
299 .dependencies = featureSet(&[_]Feature{}),
300 };
301 result[@enumToInt(Feature.cldemote)] = .{
302 .llvm_name = "cldemote",
303 .description = "Enable Cache Demote",
304 .dependencies = featureSet(&[_]Feature{}),
305 };
306 result[@enumToInt(Feature.clflushopt)] = .{
307 .llvm_name = "clflushopt",
308 .description = "Flush A Cache Line Optimized",
309 .dependencies = featureSet(&[_]Feature{}),
310 };
311 result[@enumToInt(Feature.clwb)] = .{
312 .llvm_name = "clwb",
313 .description = "Cache Line Write Back",
314 .dependencies = featureSet(&[_]Feature{}),
315 };
316 result[@enumToInt(Feature.clzero)] = .{
317 .llvm_name = "clzero",
318 .description = "Enable Cache Line Zero",
319 .dependencies = featureSet(&[_]Feature{}),
320 };
321 result[@enumToInt(Feature.cmov)] = .{
322 .llvm_name = "cmov",
323 .description = "Enable conditional move instructions",
324 .dependencies = featureSet(&[_]Feature{}),
325 };
326 result[@enumToInt(Feature.cx16)] = .{
327 .llvm_name = "cx16",
328 .description = "64-bit with cmpxchg16b",
329 .dependencies = featureSet(&[_]Feature{
330 .cx8,
331 }),
332 };
333 result[@enumToInt(Feature.cx8)] = .{
334 .llvm_name = "cx8",
335 .description = "Support CMPXCHG8B instructions",
336 .dependencies = featureSet(&[_]Feature{}),
337 };
338 result[@enumToInt(Feature.enqcmd)] = .{
339 .llvm_name = "enqcmd",
340 .description = "Has ENQCMD instructions",
341 .dependencies = featureSet(&[_]Feature{}),
342 };
343 result[@enumToInt(Feature.ermsb)] = .{
344 .llvm_name = "ermsb",
345 .description = "REP MOVS/STOS are fast",
346 .dependencies = featureSet(&[_]Feature{}),
347 };
348 result[@enumToInt(Feature.f16c)] = .{
349 .llvm_name = "f16c",
350 .description = "Support 16-bit floating point conversion instructions",
351 .dependencies = featureSet(&[_]Feature{
352 .avx,
353 }),
354 };
355 result[@enumToInt(Feature.false_deps_lzcnt_tzcnt)] = .{
356 .llvm_name = "false-deps-lzcnt-tzcnt",
357 .description = "LZCNT/TZCNT have a false dependency on dest register",
358 .dependencies = featureSet(&[_]Feature{}),
359 };
360 result[@enumToInt(Feature.false_deps_popcnt)] = .{
361 .llvm_name = "false-deps-popcnt",
362 .description = "POPCNT has a false dependency on dest register",
363 .dependencies = featureSet(&[_]Feature{}),
364 };
365 result[@enumToInt(Feature.fast_11bytenop)] = .{
366 .llvm_name = "fast-11bytenop",
367 .description = "Target can quickly decode up to 11 byte NOPs",
368 .dependencies = featureSet(&[_]Feature{}),
369 };
370 result[@enumToInt(Feature.fast_15bytenop)] = .{
371 .llvm_name = "fast-15bytenop",
372 .description = "Target can quickly decode up to 15 byte NOPs",
373 .dependencies = featureSet(&[_]Feature{}),
374 };
375 result[@enumToInt(Feature.fast_bextr)] = .{
376 .llvm_name = "fast-bextr",
377 .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput",
378 .dependencies = featureSet(&[_]Feature{}),
379 };
380 result[@enumToInt(Feature.fast_gather)] = .{
381 .llvm_name = "fast-gather",
382 .description = "Indicates if gather is reasonably fast",
383 .dependencies = featureSet(&[_]Feature{}),
384 };
385 result[@enumToInt(Feature.fast_hops)] = .{
386 .llvm_name = "fast-hops",
387 .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles",
388 .dependencies = featureSet(&[_]Feature{
389 .sse3,
390 }),
391 };
392 result[@enumToInt(Feature.fast_lzcnt)] = .{
393 .llvm_name = "fast-lzcnt",
394 .description = "LZCNT instructions are as fast as most simple integer ops",
395 .dependencies = featureSet(&[_]Feature{}),
396 };
397 result[@enumToInt(Feature.fast_partial_ymm_or_zmm_write)] = .{
398 .llvm_name = "fast-partial-ymm-or-zmm-write",
399 .description = "Partial writes to YMM/ZMM registers are fast",
400 .dependencies = featureSet(&[_]Feature{}),
401 };
402 result[@enumToInt(Feature.fast_scalar_fsqrt)] = .{
403 .llvm_name = "fast-scalar-fsqrt",
404 .description = "Scalar SQRT is fast (disable Newton-Raphson)",
405 .dependencies = featureSet(&[_]Feature{}),
406 };
407 result[@enumToInt(Feature.fast_scalar_shift_masks)] = .{
408 .llvm_name = "fast-scalar-shift-masks",
409 .description = "Prefer a left/right scalar logical shift pair over a shift+and pair",
410 .dependencies = featureSet(&[_]Feature{}),
411 };
412 result[@enumToInt(Feature.fast_shld_rotate)] = .{
413 .llvm_name = "fast-shld-rotate",
414 .description = "SHLD can be used as a faster rotate",
415 .dependencies = featureSet(&[_]Feature{}),
416 };
417 result[@enumToInt(Feature.fast_variable_shuffle)] = .{
418 .llvm_name = "fast-variable-shuffle",
419 .description = "Shuffles with variable masks are fast",
420 .dependencies = featureSet(&[_]Feature{}),
421 };
422 result[@enumToInt(Feature.fast_vector_fsqrt)] = .{
423 .llvm_name = "fast-vector-fsqrt",
424 .description = "Vector SQRT is fast (disable Newton-Raphson)",
425 .dependencies = featureSet(&[_]Feature{}),
426 };
427 result[@enumToInt(Feature.fast_vector_shift_masks)] = .{
428 .llvm_name = "fast-vector-shift-masks",
429 .description = "Prefer a left/right vector logical shift pair over a shift+and pair",
430 .dependencies = featureSet(&[_]Feature{}),
431 };
432 result[@enumToInt(Feature.fma)] = .{
433 .llvm_name = "fma",
434 .description = "Enable three-operand fused multiple-add",
435 .dependencies = featureSet(&[_]Feature{
436 .avx,
437 }),
438 };
439 result[@enumToInt(Feature.fma4)] = .{
440 .llvm_name = "fma4",
441 .description = "Enable four-operand fused multiple-add",
442 .dependencies = featureSet(&[_]Feature{
443 .avx,
444 .sse4a,
445 }),
446 };
447 result[@enumToInt(Feature.fsgsbase)] = .{
448 .llvm_name = "fsgsbase",
449 .description = "Support FS/GS Base instructions",
450 .dependencies = featureSet(&[_]Feature{}),
451 };
452 result[@enumToInt(Feature.fxsr)] = .{
453 .llvm_name = "fxsr",
454 .description = "Support fxsave/fxrestore instructions",
455 .dependencies = featureSet(&[_]Feature{}),
456 };
457 result[@enumToInt(Feature.gfni)] = .{
458 .llvm_name = "gfni",
459 .description = "Enable Galois Field Arithmetic Instructions",
460 .dependencies = featureSet(&[_]Feature{
461 .sse2,
462 }),
463 };
464 result[@enumToInt(Feature.idivl_to_divb)] = .{
465 .llvm_name = "idivl-to-divb",
466 .description = "Use 8-bit divide for positive values less than 256",
467 .dependencies = featureSet(&[_]Feature{}),
468 };
469 result[@enumToInt(Feature.idivq_to_divl)] = .{
470 .llvm_name = "idivq-to-divl",
471 .description = "Use 32-bit divide for positive values less than 2^32",
472 .dependencies = featureSet(&[_]Feature{}),
473 };
474 result[@enumToInt(Feature.invpcid)] = .{
475 .llvm_name = "invpcid",
476 .description = "Invalidate Process-Context Identifier",
477 .dependencies = featureSet(&[_]Feature{}),
478 };
479 result[@enumToInt(Feature.lea_sp)] = .{
480 .llvm_name = "lea-sp",
481 .description = "Use LEA for adjusting the stack pointer",
482 .dependencies = featureSet(&[_]Feature{}),
483 };
484 result[@enumToInt(Feature.lea_uses_ag)] = .{
485 .llvm_name = "lea-uses-ag",
486 .description = "LEA instruction needs inputs at AG stage",
487 .dependencies = featureSet(&[_]Feature{}),
488 };
489 result[@enumToInt(Feature.lwp)] = .{
490 .llvm_name = "lwp",
491 .description = "Enable LWP instructions",
492 .dependencies = featureSet(&[_]Feature{}),
493 };
494 result[@enumToInt(Feature.lzcnt)] = .{
495 .llvm_name = "lzcnt",
496 .description = "Support LZCNT instruction",
497 .dependencies = featureSet(&[_]Feature{}),
498 };
499 result[@enumToInt(Feature.macrofusion)] = .{
500 .llvm_name = "macrofusion",
501 .description = "Various instructions can be fused with conditional branches",
502 .dependencies = featureSet(&[_]Feature{}),
503 };
504 result[@enumToInt(Feature.merge_to_threeway_branch)] = .{
505 .llvm_name = "merge-to-threeway-branch",
506 .description = "Merge branches to a three-way conditional branch",
507 .dependencies = featureSet(&[_]Feature{}),
508 };
509 result[@enumToInt(Feature.mmx)] = .{
510 .llvm_name = "mmx",
511 .description = "Enable MMX instructions",
512 .dependencies = featureSet(&[_]Feature{}),
513 };
514 result[@enumToInt(Feature.movbe)] = .{
515 .llvm_name = "movbe",
516 .description = "Support MOVBE instruction",
517 .dependencies = featureSet(&[_]Feature{}),
518 };
519 result[@enumToInt(Feature.movdir64b)] = .{
520 .llvm_name = "movdir64b",
521 .description = "Support movdir64b instruction",
522 .dependencies = featureSet(&[_]Feature{}),
523 };
524 result[@enumToInt(Feature.movdiri)] = .{
525 .llvm_name = "movdiri",
526 .description = "Support movdiri instruction",
527 .dependencies = featureSet(&[_]Feature{}),
528 };
529 result[@enumToInt(Feature.mpx)] = .{
530 .llvm_name = "mpx",
531 .description = "Support MPX instructions",
532 .dependencies = featureSet(&[_]Feature{}),
533 };
534 result[@enumToInt(Feature.mwaitx)] = .{
535 .llvm_name = "mwaitx",
536 .description = "Enable MONITORX/MWAITX timer functionality",
537 .dependencies = featureSet(&[_]Feature{}),
538 };
539 result[@enumToInt(Feature.nopl)] = .{
540 .llvm_name = "nopl",
541 .description = "Enable NOPL instruction",
542 .dependencies = featureSet(&[_]Feature{}),
543 };
544 result[@enumToInt(Feature.pad_short_functions)] = .{
545 .llvm_name = "pad-short-functions",
546 .description = "Pad short functions",
547 .dependencies = featureSet(&[_]Feature{}),
548 };
549 result[@enumToInt(Feature.pclmul)] = .{
550 .llvm_name = "pclmul",
551 .description = "Enable packed carry-less multiplication instructions",
552 .dependencies = featureSet(&[_]Feature{
553 .sse2,
554 }),
555 };
556 result[@enumToInt(Feature.pconfig)] = .{
557 .llvm_name = "pconfig",
558 .description = "platform configuration instruction",
559 .dependencies = featureSet(&[_]Feature{}),
560 };
561 result[@enumToInt(Feature.pku)] = .{
562 .llvm_name = "pku",
563 .description = "Enable protection keys",
564 .dependencies = featureSet(&[_]Feature{}),
565 };
566 result[@enumToInt(Feature.popcnt)] = .{
567 .llvm_name = "popcnt",
568 .description = "Support POPCNT instruction",
569 .dependencies = featureSet(&[_]Feature{}),
570 };
571 result[@enumToInt(Feature.prefer_256_bit)] = .{
572 .llvm_name = "prefer-256-bit",
573 .description = "Prefer 256-bit AVX instructions",
574 .dependencies = featureSet(&[_]Feature{}),
575 };
576 result[@enumToInt(Feature.prefetchwt1)] = .{
577 .llvm_name = "prefetchwt1",
578 .description = "Prefetch with Intent to Write and T1 Hint",
579 .dependencies = featureSet(&[_]Feature{}),
580 };
581 result[@enumToInt(Feature.prfchw)] = .{
582 .llvm_name = "prfchw",
583 .description = "Support PRFCHW instructions",
584 .dependencies = featureSet(&[_]Feature{}),
585 };
586 result[@enumToInt(Feature.ptwrite)] = .{
587 .llvm_name = "ptwrite",
588 .description = "Support ptwrite instruction",
589 .dependencies = featureSet(&[_]Feature{}),
590 };
591 result[@enumToInt(Feature.rdpid)] = .{
592 .llvm_name = "rdpid",
593 .description = "Support RDPID instructions",
594 .dependencies = featureSet(&[_]Feature{}),
595 };
596 result[@enumToInt(Feature.rdrnd)] = .{
597 .llvm_name = "rdrnd",
598 .description = "Support RDRAND instruction",
599 .dependencies = featureSet(&[_]Feature{}),
600 };
601 result[@enumToInt(Feature.rdseed)] = .{
602 .llvm_name = "rdseed",
603 .description = "Support RDSEED instruction",
604 .dependencies = featureSet(&[_]Feature{}),
605 };
606 result[@enumToInt(Feature.retpoline)] = .{
607 .llvm_name = "retpoline",
608 .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct",
609 .dependencies = featureSet(&[_]Feature{
610 .retpoline_indirect_branches,
611 .retpoline_indirect_calls,
612 }),
613 };
614 result[@enumToInt(Feature.retpoline_external_thunk)] = .{
615 .llvm_name = "retpoline-external-thunk",
616 .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature",
617 .dependencies = featureSet(&[_]Feature{
618 .retpoline_indirect_calls,
619 }),
620 };
621 result[@enumToInt(Feature.retpoline_indirect_branches)] = .{
622 .llvm_name = "retpoline-indirect-branches",
623 .description = "Remove speculation of indirect branches from the generated code",
624 .dependencies = featureSet(&[_]Feature{}),
625 };
626 result[@enumToInt(Feature.retpoline_indirect_calls)] = .{
627 .llvm_name = "retpoline-indirect-calls",
628 .description = "Remove speculation of indirect calls from the generated code",
629 .dependencies = featureSet(&[_]Feature{}),
630 };
631 result[@enumToInt(Feature.rtm)] = .{
632 .llvm_name = "rtm",
633 .description = "Support RTM instructions",
634 .dependencies = featureSet(&[_]Feature{}),
635 };
636 result[@enumToInt(Feature.sahf)] = .{
637 .llvm_name = "sahf",
638 .description = "Support LAHF and SAHF instructions",
639 .dependencies = featureSet(&[_]Feature{}),
640 };
641 result[@enumToInt(Feature.sgx)] = .{
642 .llvm_name = "sgx",
643 .description = "Enable Software Guard Extensions",
644 .dependencies = featureSet(&[_]Feature{}),
645 };
646 result[@enumToInt(Feature.sha)] = .{
647 .llvm_name = "sha",
648 .description = "Enable SHA instructions",
649 .dependencies = featureSet(&[_]Feature{
650 .sse2,
651 }),
652 };
653 result[@enumToInt(Feature.shstk)] = .{
654 .llvm_name = "shstk",
655 .description = "Support CET Shadow-Stack instructions",
656 .dependencies = featureSet(&[_]Feature{}),
657 };
658 result[@enumToInt(Feature.slow_3ops_lea)] = .{
659 .llvm_name = "slow-3ops-lea",
660 .description = "LEA instruction with 3 ops or certain registers is slow",
661 .dependencies = featureSet(&[_]Feature{}),
662 };
663 result[@enumToInt(Feature.slow_incdec)] = .{
664 .llvm_name = "slow-incdec",
665 .description = "INC and DEC instructions are slower than ADD and SUB",
666 .dependencies = featureSet(&[_]Feature{}),
667 };
668 result[@enumToInt(Feature.slow_lea)] = .{
669 .llvm_name = "slow-lea",
670 .description = "LEA instruction with certain arguments is slow",
671 .dependencies = featureSet(&[_]Feature{}),
672 };
673 result[@enumToInt(Feature.slow_pmaddwd)] = .{
674 .llvm_name = "slow-pmaddwd",
675 .description = "PMADDWD is slower than PMULLD",
676 .dependencies = featureSet(&[_]Feature{}),
677 };
678 result[@enumToInt(Feature.slow_pmulld)] = .{
679 .llvm_name = "slow-pmulld",
680 .description = "PMULLD instruction is slow",
681 .dependencies = featureSet(&[_]Feature{}),
682 };
683 result[@enumToInt(Feature.slow_shld)] = .{
684 .llvm_name = "slow-shld",
685 .description = "SHLD instruction is slow",
686 .dependencies = featureSet(&[_]Feature{}),
687 };
688 result[@enumToInt(Feature.slow_two_mem_ops)] = .{
689 .llvm_name = "slow-two-mem-ops",
690 .description = "Two memory operand instructions are slow",
691 .dependencies = featureSet(&[_]Feature{}),
692 };
693 result[@enumToInt(Feature.slow_unaligned_mem_16)] = .{
694 .llvm_name = "slow-unaligned-mem-16",
695 .description = "Slow unaligned 16-byte memory access",
696 .dependencies = featureSet(&[_]Feature{}),
697 };
698 result[@enumToInt(Feature.slow_unaligned_mem_32)] = .{
699 .llvm_name = "slow-unaligned-mem-32",
700 .description = "Slow unaligned 32-byte memory access",
701 .dependencies = featureSet(&[_]Feature{}),
702 };
703 result[@enumToInt(Feature.soft_float)] = .{
704 .llvm_name = "soft-float",
705 .description = "Use software floating point features",
706 .dependencies = featureSet(&[_]Feature{}),
707 };
708 result[@enumToInt(Feature.sse)] = .{
709 .llvm_name = "sse",
710 .description = "Enable SSE instructions",
711 .dependencies = featureSet(&[_]Feature{}),
712 };
713 result[@enumToInt(Feature.sse_unaligned_mem)] = .{
714 .llvm_name = "sse-unaligned-mem",
715 .description = "Allow unaligned memory operands with SSE instructions",
716 .dependencies = featureSet(&[_]Feature{}),
717 };
718 result[@enumToInt(Feature.sse2)] = .{
719 .llvm_name = "sse2",
720 .description = "Enable SSE2 instructions",
721 .dependencies = featureSet(&[_]Feature{
722 .sse,
723 }),
724 };
725 result[@enumToInt(Feature.sse3)] = .{
726 .llvm_name = "sse3",
727 .description = "Enable SSE3 instructions",
728 .dependencies = featureSet(&[_]Feature{
729 .sse2,
730 }),
731 };
732 result[@enumToInt(Feature.sse4_1)] = .{
733 .llvm_name = "sse4.1",
734 .description = "Enable SSE 4.1 instructions",
735 .dependencies = featureSet(&[_]Feature{
736 .ssse3,
737 }),
738 };
739 result[@enumToInt(Feature.sse4_2)] = .{
740 .llvm_name = "sse4.2",
741 .description = "Enable SSE 4.2 instructions",
742 .dependencies = featureSet(&[_]Feature{
743 .sse4_1,
744 }),
745 };
746 result[@enumToInt(Feature.sse4a)] = .{
747 .llvm_name = "sse4a",
748 .description = "Support SSE 4a instructions",
749 .dependencies = featureSet(&[_]Feature{
750 .sse3,
751 }),
752 };
753 result[@enumToInt(Feature.ssse3)] = .{
754 .llvm_name = "ssse3",
755 .description = "Enable SSSE3 instructions",
756 .dependencies = featureSet(&[_]Feature{
757 .sse3,
758 }),
759 };
760 result[@enumToInt(Feature.tbm)] = .{
761 .llvm_name = "tbm",
762 .description = "Enable TBM instructions",
763 .dependencies = featureSet(&[_]Feature{}),
764 };
765 result[@enumToInt(Feature.vaes)] = .{
766 .llvm_name = "vaes",
767 .description = "Promote selected AES instructions to AVX512/AVX registers",
768 .dependencies = featureSet(&[_]Feature{
769 .aes,
770 .avx,
771 }),
772 };
773 result[@enumToInt(Feature.vpclmulqdq)] = .{
774 .llvm_name = "vpclmulqdq",
775 .description = "Enable vpclmulqdq instructions",
776 .dependencies = featureSet(&[_]Feature{
777 .avx,
778 .pclmul,
779 }),
780 };
781 result[@enumToInt(Feature.waitpkg)] = .{
782 .llvm_name = "waitpkg",
783 .description = "Wait and pause enhancements",
784 .dependencies = featureSet(&[_]Feature{}),
785 };
786 result[@enumToInt(Feature.wbnoinvd)] = .{
787 .llvm_name = "wbnoinvd",
788 .description = "Write Back No Invalidate",
789 .dependencies = featureSet(&[_]Feature{}),
790 };
791 result[@enumToInt(Feature.x87)] = .{
792 .llvm_name = "x87",
793 .description = "Enable X87 float instructions",
794 .dependencies = featureSet(&[_]Feature{}),
795 };
796 result[@enumToInt(Feature.xop)] = .{
797 .llvm_name = "xop",
798 .description = "Enable XOP instructions",
799 .dependencies = featureSet(&[_]Feature{
800 .fma4,
801 }),
802 };
803 result[@enumToInt(Feature.xsave)] = .{
804 .llvm_name = "xsave",
805 .description = "Support xsave instructions",
806 .dependencies = featureSet(&[_]Feature{}),
807 };
808 result[@enumToInt(Feature.xsavec)] = .{
809 .llvm_name = "xsavec",
810 .description = "Support xsavec instructions",
811 .dependencies = featureSet(&[_]Feature{}),
812 };
813 result[@enumToInt(Feature.xsaveopt)] = .{
814 .llvm_name = "xsaveopt",
815 .description = "Support xsaveopt instructions",
816 .dependencies = featureSet(&[_]Feature{}),
817 };
818 result[@enumToInt(Feature.xsaves)] = .{
819 .llvm_name = "xsaves",
820 .description = "Support xsaves instructions",
821 .dependencies = featureSet(&[_]Feature{}),
822 };
823 const ti = @typeInfo(Feature);
824 for (result) |*elem, i| {
825 elem.index = i;
826 elem.name = ti.Enum.fields[i].name;
827 }
828 break :blk result;
829};
830
831pub const cpu = struct {
832 pub const amdfam10 = Cpu{
833 .name = "amdfam10",
834 .llvm_name = "amdfam10",
835 .features = featureSet(&[_]Feature{
836 .@"3dnowa",
837 .@"64bit",
838 .cmov,
839 .cx16,
840 .cx8,
841 .fast_scalar_shift_masks,
842 .fxsr,
843 .lzcnt,
844 .nopl,
845 .popcnt,
846 .sahf,
847 .slow_shld,
848 .sse4a,
849 .x87,
850 }),
851 };
852 pub const athlon = Cpu{
853 .name = "athlon",
854 .llvm_name = "athlon",
855 .features = featureSet(&[_]Feature{
856 .@"3dnowa",
857 .cmov,
858 .cx8,
859 .nopl,
860 .slow_shld,
861 .slow_unaligned_mem_16,
862 .x87,
863 }),
864 };
865 pub const athlon_4 = Cpu{
866 .name = "athlon_4",
867 .llvm_name = "athlon-4",
868 .features = featureSet(&[_]Feature{
869 .@"3dnowa",
870 .cmov,
871 .cx8,
872 .fxsr,
873 .nopl,
874 .slow_shld,
875 .slow_unaligned_mem_16,
876 .sse,
877 .x87,
878 }),
879 };
880 pub const athlon_fx = Cpu{
881 .name = "athlon_fx",
882 .llvm_name = "athlon-fx",
883 .features = featureSet(&[_]Feature{
884 .@"3dnowa",
885 .@"64bit",
886 .cmov,
887 .cx8,
888 .fast_scalar_shift_masks,
889 .fxsr,
890 .nopl,
891 .slow_shld,
892 .slow_unaligned_mem_16,
893 .sse2,
894 .x87,
895 }),
896 };
897 pub const athlon_mp = Cpu{
898 .name = "athlon_mp",
899 .llvm_name = "athlon-mp",
900 .features = featureSet(&[_]Feature{
901 .@"3dnowa",
902 .cmov,
903 .cx8,
904 .fxsr,
905 .nopl,
906 .slow_shld,
907 .slow_unaligned_mem_16,
908 .sse,
909 .x87,
910 }),
911 };
912 pub const athlon_tbird = Cpu{
913 .name = "athlon_tbird",
914 .llvm_name = "athlon-tbird",
915 .features = featureSet(&[_]Feature{
916 .@"3dnowa",
917 .cmov,
918 .cx8,
919 .nopl,
920 .slow_shld,
921 .slow_unaligned_mem_16,
922 .x87,
923 }),
924 };
925 pub const athlon_xp = Cpu{
926 .name = "athlon_xp",
927 .llvm_name = "athlon-xp",
928 .features = featureSet(&[_]Feature{
929 .@"3dnowa",
930 .cmov,
931 .cx8,
932 .fxsr,
933 .nopl,
934 .slow_shld,
935 .slow_unaligned_mem_16,
936 .sse,
937 .x87,
938 }),
939 };
940 pub const athlon64 = Cpu{
941 .name = "athlon64",
942 .llvm_name = "athlon64",
943 .features = featureSet(&[_]Feature{
944 .@"3dnowa",
945 .@"64bit",
946 .cmov,
947 .cx8,
948 .fast_scalar_shift_masks,
949 .fxsr,
950 .nopl,
951 .slow_shld,
952 .slow_unaligned_mem_16,
953 .sse2,
954 .x87,
955 }),
956 };
957 pub const athlon64_sse3 = Cpu{
958 .name = "athlon64_sse3",
959 .llvm_name = "athlon64-sse3",
960 .features = featureSet(&[_]Feature{
961 .@"3dnowa",
962 .@"64bit",
963 .cmov,
964 .cx16,
965 .cx8,
966 .fast_scalar_shift_masks,
967 .fxsr,
968 .nopl,
969 .slow_shld,
970 .slow_unaligned_mem_16,
971 .sse3,
972 .x87,
973 }),
974 };
975 pub const atom = Cpu{
976 .name = "atom",
977 .llvm_name = "atom",
978 .features = featureSet(&[_]Feature{
979 .@"64bit",
980 .cmov,
981 .cx16,
982 .cx8,
983 .fxsr,
984 .idivl_to_divb,
985 .idivq_to_divl,
986 .lea_sp,
987 .lea_uses_ag,
988 .mmx,
989 .movbe,
990 .nopl,
991 .pad_short_functions,
992 .sahf,
993 .slow_two_mem_ops,
994 .slow_unaligned_mem_16,
995 .ssse3,
996 .x87,
997 }),
998 };
999 pub const barcelona = Cpu{
1000 .name = "barcelona",
1001 .llvm_name = "barcelona",
1002 .features = featureSet(&[_]Feature{
1003 .@"3dnowa",
1004 .@"64bit",
1005 .cmov,
1006 .cx16,
1007 .cx8,
1008 .fast_scalar_shift_masks,
1009 .fxsr,
1010 .lzcnt,
1011 .nopl,
1012 .popcnt,
1013 .sahf,
1014 .slow_shld,
1015 .sse4a,
1016 .x87,
1017 }),
1018 };
1019 pub const bdver1 = Cpu{
1020 .name = "bdver1",
1021 .llvm_name = "bdver1",
1022 .features = featureSet(&[_]Feature{
1023 .@"64bit",
1024 .aes,
1025 .branchfusion,
1026 .cmov,
1027 .cx16,
1028 .cx8,
1029 .fast_11bytenop,
1030 .fast_scalar_shift_masks,
1031 .fxsr,
1032 .lwp,
1033 .lzcnt,
1034 .mmx,
1035 .nopl,
1036 .pclmul,
1037 .popcnt,
1038 .prfchw,
1039 .sahf,
1040 .slow_shld,
1041 .x87,
1042 .xop,
1043 .xsave,
1044 }),
1045 };
1046 pub const bdver2 = Cpu{
1047 .name = "bdver2",
1048 .llvm_name = "bdver2",
1049 .features = featureSet(&[_]Feature{
1050 .@"64bit",
1051 .aes,
1052 .bmi,
1053 .branchfusion,
1054 .cmov,
1055 .cx16,
1056 .cx8,
1057 .f16c,
1058 .fast_11bytenop,
1059 .fast_bextr,
1060 .fast_scalar_shift_masks,
1061 .fma,
1062 .fxsr,
1063 .lwp,
1064 .lzcnt,
1065 .mmx,
1066 .nopl,
1067 .pclmul,
1068 .popcnt,
1069 .prfchw,
1070 .sahf,
1071 .slow_shld,
1072 .tbm,
1073 .x87,
1074 .xop,
1075 .xsave,
1076 }),
1077 };
1078 pub const bdver3 = Cpu{
1079 .name = "bdver3",
1080 .llvm_name = "bdver3",
1081 .features = featureSet(&[_]Feature{
1082 .@"64bit",
1083 .aes,
1084 .bmi,
1085 .branchfusion,
1086 .cmov,
1087 .cx16,
1088 .cx8,
1089 .f16c,
1090 .fast_11bytenop,
1091 .fast_bextr,
1092 .fast_scalar_shift_masks,
1093 .fma,
1094 .fsgsbase,
1095 .fxsr,
1096 .lwp,
1097 .lzcnt,
1098 .mmx,
1099 .nopl,
1100 .pclmul,
1101 .popcnt,
1102 .prfchw,
1103 .sahf,
1104 .slow_shld,
1105 .tbm,
1106 .x87,
1107 .xop,
1108 .xsave,
1109 .xsaveopt,
1110 }),
1111 };
1112 pub const bdver4 = Cpu{
1113 .name = "bdver4",
1114 .llvm_name = "bdver4",
1115 .features = featureSet(&[_]Feature{
1116 .@"64bit",
1117 .aes,
1118 .avx2,
1119 .bmi,
1120 .bmi2,
1121 .branchfusion,
1122 .cmov,
1123 .cx16,
1124 .cx8,
1125 .f16c,
1126 .fast_11bytenop,
1127 .fast_bextr,
1128 .fast_scalar_shift_masks,
1129 .fma,
1130 .fsgsbase,
1131 .fxsr,
1132 .lwp,
1133 .lzcnt,
1134 .mmx,
1135 .mwaitx,
1136 .nopl,
1137 .pclmul,
1138 .popcnt,
1139 .prfchw,
1140 .sahf,
1141 .slow_shld,
1142 .tbm,
1143 .x87,
1144 .xop,
1145 .xsave,
1146 .xsaveopt,
1147 }),
1148 };
1149 pub const bonnell = Cpu{
1150 .name = "bonnell",
1151 .llvm_name = "bonnell",
1152 .features = featureSet(&[_]Feature{
1153 .@"64bit",
1154 .cmov,
1155 .cx16,
1156 .cx8,
1157 .fxsr,
1158 .idivl_to_divb,
1159 .idivq_to_divl,
1160 .lea_sp,
1161 .lea_uses_ag,
1162 .mmx,
1163 .movbe,
1164 .nopl,
1165 .pad_short_functions,
1166 .sahf,
1167 .slow_two_mem_ops,
1168 .slow_unaligned_mem_16,
1169 .ssse3,
1170 .x87,
1171 }),
1172 };
1173 pub const broadwell = Cpu{
1174 .name = "broadwell",
1175 .llvm_name = "broadwell",
1176 .features = featureSet(&[_]Feature{
1177 .@"64bit",
1178 .adx,
1179 .avx,
1180 .avx2,
1181 .bmi,
1182 .bmi2,
1183 .cmov,
1184 .cx16,
1185 .cx8,
1186 .ermsb,
1187 .f16c,
1188 .false_deps_lzcnt_tzcnt,
1189 .false_deps_popcnt,
1190 .fast_scalar_fsqrt,
1191 .fast_shld_rotate,
1192 .fast_variable_shuffle,
1193 .fma,
1194 .fsgsbase,
1195 .fxsr,
1196 .idivq_to_divl,
1197 .invpcid,
1198 .lzcnt,
1199 .macrofusion,
1200 .merge_to_threeway_branch,
1201 .mmx,
1202 .movbe,
1203 .nopl,
1204 .pclmul,
1205 .popcnt,
1206 .prfchw,
1207 .rdrnd,
1208 .rdseed,
1209 .sahf,
1210 .slow_3ops_lea,
1211 .sse4_2,
1212 .x87,
1213 .xsave,
1214 .xsaveopt,
1215 }),
1216 };
1217 pub const btver1 = Cpu{
1218 .name = "btver1",
1219 .llvm_name = "btver1",
1220 .features = featureSet(&[_]Feature{
1221 .@"64bit",
1222 .cmov,
1223 .cx16,
1224 .cx8,
1225 .fast_15bytenop,
1226 .fast_scalar_shift_masks,
1227 .fast_vector_shift_masks,
1228 .fxsr,
1229 .lzcnt,
1230 .mmx,
1231 .nopl,
1232 .popcnt,
1233 .prfchw,
1234 .sahf,
1235 .slow_shld,
1236 .sse4a,
1237 .ssse3,
1238 .x87,
1239 }),
1240 };
1241 pub const btver2 = Cpu{
1242 .name = "btver2",
1243 .llvm_name = "btver2",
1244 .features = featureSet(&[_]Feature{
1245 .@"64bit",
1246 .aes,
1247 .avx,
1248 .bmi,
1249 .cmov,
1250 .cx16,
1251 .cx8,
1252 .f16c,
1253 .fast_15bytenop,
1254 .fast_bextr,
1255 .fast_hops,
1256 .fast_lzcnt,
1257 .fast_partial_ymm_or_zmm_write,
1258 .fast_scalar_shift_masks,
1259 .fast_vector_shift_masks,
1260 .fxsr,
1261 .lzcnt,
1262 .mmx,
1263 .movbe,
1264 .nopl,
1265 .pclmul,
1266 .popcnt,
1267 .prfchw,
1268 .sahf,
1269 .slow_shld,
1270 .sse4a,
1271 .ssse3,
1272 .x87,
1273 .xsave,
1274 .xsaveopt,
1275 }),
1276 };
1277 pub const c3 = Cpu{
1278 .name = "c3",
1279 .llvm_name = "c3",
1280 .features = featureSet(&[_]Feature{
1281 .@"3dnow",
1282 .slow_unaligned_mem_16,
1283 .x87,
1284 }),
1285 };
1286 pub const c3_2 = Cpu{
1287 .name = "c3_2",
1288 .llvm_name = "c3-2",
1289 .features = featureSet(&[_]Feature{
1290 .cmov,
1291 .cx8,
1292 .fxsr,
1293 .mmx,
1294 .slow_unaligned_mem_16,
1295 .sse,
1296 .x87,
1297 }),
1298 };
1299 pub const cannonlake = Cpu{
1300 .name = "cannonlake",
1301 .llvm_name = "cannonlake",
1302 .features = featureSet(&[_]Feature{
1303 .@"64bit",
1304 .adx,
1305 .aes,
1306 .avx,
1307 .avx2,
1308 .avx512bw,
1309 .avx512cd,
1310 .avx512dq,
1311 .avx512f,
1312 .avx512ifma,
1313 .avx512vbmi,
1314 .avx512vl,
1315 .bmi,
1316 .bmi2,
1317 .clflushopt,
1318 .cmov,
1319 .cx16,
1320 .cx8,
1321 .ermsb,
1322 .f16c,
1323 .fast_gather,
1324 .fast_scalar_fsqrt,
1325 .fast_shld_rotate,
1326 .fast_variable_shuffle,
1327 .fast_vector_fsqrt,
1328 .fma,
1329 .fsgsbase,
1330 .fxsr,
1331 .idivq_to_divl,
1332 .invpcid,
1333 .lzcnt,
1334 .macrofusion,
1335 .merge_to_threeway_branch,
1336 .mmx,
1337 .movbe,
1338 .mpx,
1339 .nopl,
1340 .pclmul,
1341 .pku,
1342 .popcnt,
1343 .prfchw,
1344 .rdrnd,
1345 .rdseed,
1346 .sahf,
1347 .sgx,
1348 .sha,
1349 .slow_3ops_lea,
1350 .sse4_2,
1351 .x87,
1352 .xsave,
1353 .xsavec,
1354 .xsaveopt,
1355 .xsaves,
1356 }),
1357 };
1358 pub const cascadelake = Cpu{
1359 .name = "cascadelake",
1360 .llvm_name = "cascadelake",
1361 .features = featureSet(&[_]Feature{
1362 .@"64bit",
1363 .adx,
1364 .aes,
1365 .avx,
1366 .avx2,
1367 .avx512bw,
1368 .avx512cd,
1369 .avx512dq,
1370 .avx512f,
1371 .avx512vl,
1372 .avx512vnni,
1373 .bmi,
1374 .bmi2,
1375 .clflushopt,
1376 .clwb,
1377 .cmov,
1378 .cx16,
1379 .cx8,
1380 .ermsb,
1381 .f16c,
1382 .false_deps_popcnt,
1383 .fast_gather,
1384 .fast_scalar_fsqrt,
1385 .fast_shld_rotate,
1386 .fast_variable_shuffle,
1387 .fast_vector_fsqrt,
1388 .fma,
1389 .fsgsbase,
1390 .fxsr,
1391 .idivq_to_divl,
1392 .invpcid,
1393 .lzcnt,
1394 .macrofusion,
1395 .merge_to_threeway_branch,
1396 .mmx,
1397 .movbe,
1398 .mpx,
1399 .nopl,
1400 .pclmul,
1401 .pku,
1402 .popcnt,
1403 .prfchw,
1404 .rdrnd,
1405 .rdseed,
1406 .sahf,
1407 .slow_3ops_lea,
1408 .sse4_2,
1409 .x87,
1410 .xsave,
1411 .xsavec,
1412 .xsaveopt,
1413 .xsaves,
1414 }),
1415 };
1416 pub const cooperlake = Cpu{
1417 .name = "cooperlake",
1418 .llvm_name = "cooperlake",
1419 .features = featureSet(&[_]Feature{
1420 .@"64bit",
1421 .adx,
1422 .aes,
1423 .avx,
1424 .avx2,
1425 .avx512bf16,
1426 .avx512bw,
1427 .avx512cd,
1428 .avx512dq,
1429 .avx512f,
1430 .avx512vl,
1431 .avx512vnni,
1432 .bmi,
1433 .bmi2,
1434 .clflushopt,
1435 .clwb,
1436 .cmov,
1437 .cx16,
1438 .cx8,
1439 .ermsb,
1440 .f16c,
1441 .false_deps_popcnt,
1442 .fast_gather,
1443 .fast_scalar_fsqrt,
1444 .fast_shld_rotate,
1445 .fast_variable_shuffle,
1446 .fast_vector_fsqrt,
1447 .fma,
1448 .fsgsbase,
1449 .fxsr,
1450 .idivq_to_divl,
1451 .invpcid,
1452 .lzcnt,
1453 .macrofusion,
1454 .merge_to_threeway_branch,
1455 .mmx,
1456 .movbe,
1457 .mpx,
1458 .nopl,
1459 .pclmul,
1460 .pku,
1461 .popcnt,
1462 .prfchw,
1463 .rdrnd,
1464 .rdseed,
1465 .sahf,
1466 .slow_3ops_lea,
1467 .sse4_2,
1468 .x87,
1469 .xsave,
1470 .xsavec,
1471 .xsaveopt,
1472 .xsaves,
1473 }),
1474 };
1475 pub const core_avx_i = Cpu{
1476 .name = "core_avx_i",
1477 .llvm_name = "core-avx-i",
1478 .features = featureSet(&[_]Feature{
1479 .@"64bit",
1480 .avx,
1481 .cmov,
1482 .cx16,
1483 .cx8,
1484 .f16c,
1485 .false_deps_popcnt,
1486 .fast_scalar_fsqrt,
1487 .fast_shld_rotate,
1488 .fsgsbase,
1489 .fxsr,
1490 .idivq_to_divl,
1491 .macrofusion,
1492 .merge_to_threeway_branch,
1493 .mmx,
1494 .nopl,
1495 .pclmul,
1496 .popcnt,
1497 .rdrnd,
1498 .sahf,
1499 .slow_3ops_lea,
1500 .slow_unaligned_mem_32,
1501 .sse4_2,
1502 .x87,
1503 .xsave,
1504 .xsaveopt,
1505 }),
1506 };
1507 pub const core_avx2 = Cpu{
1508 .name = "core_avx2",
1509 .llvm_name = "core-avx2",
1510 .features = featureSet(&[_]Feature{
1511 .@"64bit",
1512 .avx,
1513 .avx2,
1514 .bmi,
1515 .bmi2,
1516 .cmov,
1517 .cx16,
1518 .cx8,
1519 .ermsb,
1520 .f16c,
1521 .false_deps_lzcnt_tzcnt,
1522 .false_deps_popcnt,
1523 .fast_scalar_fsqrt,
1524 .fast_shld_rotate,
1525 .fast_variable_shuffle,
1526 .fma,
1527 .fsgsbase,
1528 .fxsr,
1529 .idivq_to_divl,
1530 .invpcid,
1531 .lzcnt,
1532 .macrofusion,
1533 .merge_to_threeway_branch,
1534 .mmx,
1535 .movbe,
1536 .nopl,
1537 .pclmul,
1538 .popcnt,
1539 .rdrnd,
1540 .sahf,
1541 .slow_3ops_lea,
1542 .sse4_2,
1543 .x87,
1544 .xsave,
1545 .xsaveopt,
1546 }),
1547 };
1548 pub const core2 = Cpu{
1549 .name = "core2",
1550 .llvm_name = "core2",
1551 .features = featureSet(&[_]Feature{
1552 .@"64bit",
1553 .cmov,
1554 .cx16,
1555 .cx8,
1556 .fxsr,
1557 .macrofusion,
1558 .mmx,
1559 .nopl,
1560 .sahf,
1561 .slow_unaligned_mem_16,
1562 .ssse3,
1563 .x87,
1564 }),
1565 };
1566 pub const corei7 = Cpu{
1567 .name = "corei7",
1568 .llvm_name = "corei7",
1569 .features = featureSet(&[_]Feature{
1570 .@"64bit",
1571 .cmov,
1572 .cx16,
1573 .cx8,
1574 .fxsr,
1575 .macrofusion,
1576 .mmx,
1577 .nopl,
1578 .popcnt,
1579 .sahf,
1580 .sse4_2,
1581 .x87,
1582 }),
1583 };
1584 pub const corei7_avx = Cpu{
1585 .name = "corei7_avx",
1586 .llvm_name = "corei7-avx",
1587 .features = featureSet(&[_]Feature{
1588 .@"64bit",
1589 .avx,
1590 .cmov,
1591 .cx16,
1592 .cx8,
1593 .false_deps_popcnt,
1594 .fast_scalar_fsqrt,
1595 .fast_shld_rotate,
1596 .fxsr,
1597 .idivq_to_divl,
1598 .macrofusion,
1599 .merge_to_threeway_branch,
1600 .mmx,
1601 .nopl,
1602 .pclmul,
1603 .popcnt,
1604 .sahf,
1605 .slow_3ops_lea,
1606 .slow_unaligned_mem_32,
1607 .sse4_2,
1608 .x87,
1609 .xsave,
1610 .xsaveopt,
1611 }),
1612 };
1613 pub const generic = Cpu{
1614 .name = "generic",
1615 .llvm_name = "generic",
1616 .features = featureSet(&[_]Feature{
1617 .cx8,
1618 .slow_unaligned_mem_16,
1619 .x87,
1620 }),
1621 };
1622 pub const geode = Cpu{
1623 .name = "geode",
1624 .llvm_name = "geode",
1625 .features = featureSet(&[_]Feature{
1626 .@"3dnowa",
1627 .cx8,
1628 .slow_unaligned_mem_16,
1629 .x87,
1630 }),
1631 };
1632 pub const goldmont = Cpu{
1633 .name = "goldmont",
1634 .llvm_name = "goldmont",
1635 .features = featureSet(&[_]Feature{
1636 .@"64bit",
1637 .aes,
1638 .clflushopt,
1639 .cmov,
1640 .cx16,
1641 .cx8,
1642 .false_deps_popcnt,
1643 .fsgsbase,
1644 .fxsr,
1645 .mmx,
1646 .movbe,
1647 .mpx,
1648 .nopl,
1649 .pclmul,
1650 .popcnt,
1651 .prfchw,
1652 .rdrnd,
1653 .rdseed,
1654 .sahf,
1655 .sha,
1656 .slow_incdec,
1657 .slow_lea,
1658 .slow_two_mem_ops,
1659 .sse4_2,
1660 .ssse3,
1661 .x87,
1662 .xsave,
1663 .xsavec,
1664 .xsaveopt,
1665 .xsaves,
1666 }),
1667 };
1668 pub const goldmont_plus = Cpu{
1669 .name = "goldmont_plus",
1670 .llvm_name = "goldmont-plus",
1671 .features = featureSet(&[_]Feature{
1672 .@"64bit",
1673 .aes,
1674 .clflushopt,
1675 .cmov,
1676 .cx16,
1677 .cx8,
1678 .fsgsbase,
1679 .fxsr,
1680 .mmx,
1681 .movbe,
1682 .mpx,
1683 .nopl,
1684 .pclmul,
1685 .popcnt,
1686 .prfchw,
1687 .ptwrite,
1688 .rdpid,
1689 .rdrnd,
1690 .rdseed,
1691 .sahf,
1692 .sgx,
1693 .sha,
1694 .slow_incdec,
1695 .slow_lea,
1696 .slow_two_mem_ops,
1697 .sse4_2,
1698 .ssse3,
1699 .x87,
1700 .xsave,
1701 .xsavec,
1702 .xsaveopt,
1703 .xsaves,
1704 }),
1705 };
1706 pub const haswell = Cpu{
1707 .name = "haswell",
1708 .llvm_name = "haswell",
1709 .features = featureSet(&[_]Feature{
1710 .@"64bit",
1711 .avx,
1712 .avx2,
1713 .bmi,
1714 .bmi2,
1715 .cmov,
1716 .cx16,
1717 .cx8,
1718 .ermsb,
1719 .f16c,
1720 .false_deps_lzcnt_tzcnt,
1721 .false_deps_popcnt,
1722 .fast_scalar_fsqrt,
1723 .fast_shld_rotate,
1724 .fast_variable_shuffle,
1725 .fma,
1726 .fsgsbase,
1727 .fxsr,
1728 .idivq_to_divl,
1729 .invpcid,
1730 .lzcnt,
1731 .macrofusion,
1732 .merge_to_threeway_branch,
1733 .mmx,
1734 .movbe,
1735 .nopl,
1736 .pclmul,
1737 .popcnt,
1738 .rdrnd,
1739 .sahf,
1740 .slow_3ops_lea,
1741 .sse4_2,
1742 .x87,
1743 .xsave,
1744 .xsaveopt,
1745 }),
1746 };
1747 pub const _i386 = Cpu{
1748 .name = "_i386",
1749 .llvm_name = "i386",
1750 .features = featureSet(&[_]Feature{
1751 .slow_unaligned_mem_16,
1752 .x87,
1753 }),
1754 };
1755 pub const _i486 = Cpu{
1756 .name = "_i486",
1757 .llvm_name = "i486",
1758 .features = featureSet(&[_]Feature{
1759 .slow_unaligned_mem_16,
1760 .x87,
1761 }),
1762 };
1763 pub const _i586 = Cpu{
1764 .name = "_i586",
1765 .llvm_name = "i586",
1766 .features = featureSet(&[_]Feature{
1767 .cx8,
1768 .slow_unaligned_mem_16,
1769 .x87,
1770 }),
1771 };
1772 pub const _i686 = Cpu{
1773 .name = "_i686",
1774 .llvm_name = "i686",
1775 .features = featureSet(&[_]Feature{
1776 .cmov,
1777 .cx8,
1778 .slow_unaligned_mem_16,
1779 .x87,
1780 }),
1781 };
1782 pub const icelake_client = Cpu{
1783 .name = "icelake_client",
1784 .llvm_name = "icelake-client",
1785 .features = featureSet(&[_]Feature{
1786 .@"64bit",
1787 .adx,
1788 .aes,
1789 .avx,
1790 .avx2,
1791 .avx512bitalg,
1792 .avx512bw,
1793 .avx512cd,
1794 .avx512dq,
1795 .avx512f,
1796 .avx512ifma,
1797 .avx512vbmi,
1798 .avx512vbmi2,
1799 .avx512vl,
1800 .avx512vnni,
1801 .avx512vpopcntdq,
1802 .bmi,
1803 .bmi2,
1804 .clflushopt,
1805 .clwb,
1806 .cmov,
1807 .cx16,
1808 .cx8,
1809 .ermsb,
1810 .f16c,
1811 .fast_gather,
1812 .fast_scalar_fsqrt,
1813 .fast_shld_rotate,
1814 .fast_variable_shuffle,
1815 .fast_vector_fsqrt,
1816 .fma,
1817 .fsgsbase,
1818 .fxsr,
1819 .gfni,
1820 .idivq_to_divl,
1821 .invpcid,
1822 .lzcnt,
1823 .macrofusion,
1824 .merge_to_threeway_branch,
1825 .mmx,
1826 .movbe,
1827 .mpx,
1828 .nopl,
1829 .pclmul,
1830 .pku,
1831 .popcnt,
1832 .prfchw,
1833 .rdpid,
1834 .rdrnd,
1835 .rdseed,
1836 .sahf,
1837 .sgx,
1838 .sha,
1839 .slow_3ops_lea,
1840 .sse4_2,
1841 .vaes,
1842 .vpclmulqdq,
1843 .x87,
1844 .xsave,
1845 .xsavec,
1846 .xsaveopt,
1847 .xsaves,
1848 }),
1849 };
1850 pub const icelake_server = Cpu{
1851 .name = "icelake_server",
1852 .llvm_name = "icelake-server",
1853 .features = featureSet(&[_]Feature{
1854 .@"64bit",
1855 .adx,
1856 .aes,
1857 .avx,
1858 .avx2,
1859 .avx512bitalg,
1860 .avx512bw,
1861 .avx512cd,
1862 .avx512dq,
1863 .avx512f,
1864 .avx512ifma,
1865 .avx512vbmi,
1866 .avx512vbmi2,
1867 .avx512vl,
1868 .avx512vnni,
1869 .avx512vpopcntdq,
1870 .bmi,
1871 .bmi2,
1872 .clflushopt,
1873 .clwb,
1874 .cmov,
1875 .cx16,
1876 .cx8,
1877 .ermsb,
1878 .f16c,
1879 .fast_gather,
1880 .fast_scalar_fsqrt,
1881 .fast_shld_rotate,
1882 .fast_variable_shuffle,
1883 .fast_vector_fsqrt,
1884 .fma,
1885 .fsgsbase,
1886 .fxsr,
1887 .gfni,
1888 .idivq_to_divl,
1889 .invpcid,
1890 .lzcnt,
1891 .macrofusion,
1892 .merge_to_threeway_branch,
1893 .mmx,
1894 .movbe,
1895 .mpx,
1896 .nopl,
1897 .pclmul,
1898 .pconfig,
1899 .pku,
1900 .popcnt,
1901 .prfchw,
1902 .rdpid,
1903 .rdrnd,
1904 .rdseed,
1905 .sahf,
1906 .sgx,
1907 .sha,
1908 .slow_3ops_lea,
1909 .sse4_2,
1910 .vaes,
1911 .vpclmulqdq,
1912 .wbnoinvd,
1913 .x87,
1914 .xsave,
1915 .xsavec,
1916 .xsaveopt,
1917 .xsaves,
1918 }),
1919 };
1920 pub const ivybridge = Cpu{
1921 .name = "ivybridge",
1922 .llvm_name = "ivybridge",
1923 .features = featureSet(&[_]Feature{
1924 .@"64bit",
1925 .avx,
1926 .cmov,
1927 .cx16,
1928 .cx8,
1929 .f16c,
1930 .false_deps_popcnt,
1931 .fast_scalar_fsqrt,
1932 .fast_shld_rotate,
1933 .fsgsbase,
1934 .fxsr,
1935 .idivq_to_divl,
1936 .macrofusion,
1937 .merge_to_threeway_branch,
1938 .mmx,
1939 .nopl,
1940 .pclmul,
1941 .popcnt,
1942 .rdrnd,
1943 .sahf,
1944 .slow_3ops_lea,
1945 .slow_unaligned_mem_32,
1946 .sse4_2,
1947 .x87,
1948 .xsave,
1949 .xsaveopt,
1950 }),
1951 };
1952 pub const k6 = Cpu{
1953 .name = "k6",
1954 .llvm_name = "k6",
1955 .features = featureSet(&[_]Feature{
1956 .cx8,
1957 .mmx,
1958 .slow_unaligned_mem_16,
1959 .x87,
1960 }),
1961 };
1962 pub const k6_2 = Cpu{
1963 .name = "k6_2",
1964 .llvm_name = "k6-2",
1965 .features = featureSet(&[_]Feature{
1966 .@"3dnow",
1967 .cx8,
1968 .slow_unaligned_mem_16,
1969 .x87,
1970 }),
1971 };
1972 pub const k6_3 = Cpu{
1973 .name = "k6_3",
1974 .llvm_name = "k6-3",
1975 .features = featureSet(&[_]Feature{
1976 .@"3dnow",
1977 .cx8,
1978 .slow_unaligned_mem_16,
1979 .x87,
1980 }),
1981 };
1982 pub const k8 = Cpu{
1983 .name = "k8",
1984 .llvm_name = "k8",
1985 .features = featureSet(&[_]Feature{
1986 .@"3dnowa",
1987 .@"64bit",
1988 .cmov,
1989 .cx8,
1990 .fast_scalar_shift_masks,
1991 .fxsr,
1992 .nopl,
1993 .slow_shld,
1994 .slow_unaligned_mem_16,
1995 .sse2,
1996 .x87,
1997 }),
1998 };
1999 pub const k8_sse3 = Cpu{
2000 .name = "k8_sse3",
2001 .llvm_name = "k8-sse3",
2002 .features = featureSet(&[_]Feature{
2003 .@"3dnowa",
2004 .@"64bit",
2005 .cmov,
2006 .cx16,
2007 .cx8,
2008 .fast_scalar_shift_masks,
2009 .fxsr,
2010 .nopl,
2011 .slow_shld,
2012 .slow_unaligned_mem_16,
2013 .sse3,
2014 .x87,
2015 }),
2016 };
2017 pub const knl = Cpu{
2018 .name = "knl",
2019 .llvm_name = "knl",
2020 .features = featureSet(&[_]Feature{
2021 .@"64bit",
2022 .adx,
2023 .aes,
2024 .avx512cd,
2025 .avx512er,
2026 .avx512f,
2027 .avx512pf,
2028 .bmi,
2029 .bmi2,
2030 .cmov,
2031 .cx16,
2032 .cx8,
2033 .f16c,
2034 .fast_gather,
2035 .fast_partial_ymm_or_zmm_write,
2036 .fma,
2037 .fsgsbase,
2038 .fxsr,
2039 .idivq_to_divl,
2040 .lzcnt,
2041 .mmx,
2042 .movbe,
2043 .nopl,
2044 .pclmul,
2045 .popcnt,
2046 .prefetchwt1,
2047 .prfchw,
2048 .rdrnd,
2049 .rdseed,
2050 .sahf,
2051 .slow_3ops_lea,
2052 .slow_incdec,
2053 .slow_pmaddwd,
2054 .slow_two_mem_ops,
2055 .x87,
2056 .xsave,
2057 .xsaveopt,
2058 }),
2059 };
2060 pub const knm = Cpu{
2061 .name = "knm",
2062 .llvm_name = "knm",
2063 .features = featureSet(&[_]Feature{
2064 .@"64bit",
2065 .adx,
2066 .aes,
2067 .avx512cd,
2068 .avx512er,
2069 .avx512f,
2070 .avx512pf,
2071 .avx512vpopcntdq,
2072 .bmi,
2073 .bmi2,
2074 .cmov,
2075 .cx16,
2076 .cx8,
2077 .f16c,
2078 .fast_gather,
2079 .fast_partial_ymm_or_zmm_write,
2080 .fma,
2081 .fsgsbase,
2082 .fxsr,
2083 .idivq_to_divl,
2084 .lzcnt,
2085 .mmx,
2086 .movbe,
2087 .nopl,
2088 .pclmul,
2089 .popcnt,
2090 .prefetchwt1,
2091 .prfchw,
2092 .rdrnd,
2093 .rdseed,
2094 .sahf,
2095 .slow_3ops_lea,
2096 .slow_incdec,
2097 .slow_pmaddwd,
2098 .slow_two_mem_ops,
2099 .x87,
2100 .xsave,
2101 .xsaveopt,
2102 }),
2103 };
2104 pub const lakemont = Cpu{
2105 .name = "lakemont",
2106 .llvm_name = "lakemont",
2107 .features = featureSet(&[_]Feature{}),
2108 };
2109 pub const nehalem = Cpu{
2110 .name = "nehalem",
2111 .llvm_name = "nehalem",
2112 .features = featureSet(&[_]Feature{
2113 .@"64bit",
2114 .cmov,
2115 .cx16,
2116 .cx8,
2117 .fxsr,
2118 .macrofusion,
2119 .mmx,
2120 .nopl,
2121 .popcnt,
2122 .sahf,
2123 .sse4_2,
2124 .x87,
2125 }),
2126 };
2127 pub const nocona = Cpu{
2128 .name = "nocona",
2129 .llvm_name = "nocona",
2130 .features = featureSet(&[_]Feature{
2131 .@"64bit",
2132 .cmov,
2133 .cx16,
2134 .cx8,
2135 .fxsr,
2136 .mmx,
2137 .nopl,
2138 .slow_unaligned_mem_16,
2139 .sse3,
2140 .x87,
2141 }),
2142 };
2143 pub const opteron = Cpu{
2144 .name = "opteron",
2145 .llvm_name = "opteron",
2146 .features = featureSet(&[_]Feature{
2147 .@"3dnowa",
2148 .@"64bit",
2149 .cmov,
2150 .cx8,
2151 .fast_scalar_shift_masks,
2152 .fxsr,
2153 .nopl,
2154 .slow_shld,
2155 .slow_unaligned_mem_16,
2156 .sse2,
2157 .x87,
2158 }),
2159 };
2160 pub const opteron_sse3 = Cpu{
2161 .name = "opteron_sse3",
2162 .llvm_name = "opteron-sse3",
2163 .features = featureSet(&[_]Feature{
2164 .@"3dnowa",
2165 .@"64bit",
2166 .cmov,
2167 .cx16,
2168 .cx8,
2169 .fast_scalar_shift_masks,
2170 .fxsr,
2171 .nopl,
2172 .slow_shld,
2173 .slow_unaligned_mem_16,
2174 .sse3,
2175 .x87,
2176 }),
2177 };
2178 pub const penryn = Cpu{
2179 .name = "penryn",
2180 .llvm_name = "penryn",
2181 .features = featureSet(&[_]Feature{
2182 .@"64bit",
2183 .cmov,
2184 .cx16,
2185 .cx8,
2186 .fxsr,
2187 .macrofusion,
2188 .mmx,
2189 .nopl,
2190 .sahf,
2191 .slow_unaligned_mem_16,
2192 .sse4_1,
2193 .x87,
2194 }),
2195 };
2196 pub const pentium = Cpu{
2197 .name = "pentium",
2198 .llvm_name = "pentium",
2199 .features = featureSet(&[_]Feature{
2200 .cx8,
2201 .slow_unaligned_mem_16,
2202 .x87,
2203 }),
2204 };
2205 pub const pentium_m = Cpu{
2206 .name = "pentium_m",
2207 .llvm_name = "pentium-m",
2208 .features = featureSet(&[_]Feature{
2209 .cmov,
2210 .cx8,
2211 .fxsr,
2212 .mmx,
2213 .nopl,
2214 .slow_unaligned_mem_16,
2215 .sse2,
2216 .x87,
2217 }),
2218 };
2219 pub const pentium_mmx = Cpu{
2220 .name = "pentium_mmx",
2221 .llvm_name = "pentium-mmx",
2222 .features = featureSet(&[_]Feature{
2223 .cx8,
2224 .mmx,
2225 .slow_unaligned_mem_16,
2226 .x87,
2227 }),
2228 };
2229 pub const pentium2 = Cpu{
2230 .name = "pentium2",
2231 .llvm_name = "pentium2",
2232 .features = featureSet(&[_]Feature{
2233 .cmov,
2234 .cx8,
2235 .fxsr,
2236 .mmx,
2237 .nopl,
2238 .slow_unaligned_mem_16,
2239 .x87,
2240 }),
2241 };
2242 pub const pentium3 = Cpu{
2243 .name = "pentium3",
2244 .llvm_name = "pentium3",
2245 .features = featureSet(&[_]Feature{
2246 .cmov,
2247 .cx8,
2248 .fxsr,
2249 .mmx,
2250 .nopl,
2251 .slow_unaligned_mem_16,
2252 .sse,
2253 .x87,
2254 }),
2255 };
2256 pub const pentium3m = Cpu{
2257 .name = "pentium3m",
2258 .llvm_name = "pentium3m",
2259 .features = featureSet(&[_]Feature{
2260 .cmov,
2261 .cx8,
2262 .fxsr,
2263 .mmx,
2264 .nopl,
2265 .slow_unaligned_mem_16,
2266 .sse,
2267 .x87,
2268 }),
2269 };
2270 pub const pentium4 = Cpu{
2271 .name = "pentium4",
2272 .llvm_name = "pentium4",
2273 .features = featureSet(&[_]Feature{
2274 .cmov,
2275 .cx8,
2276 .fxsr,
2277 .mmx,
2278 .nopl,
2279 .slow_unaligned_mem_16,
2280 .sse2,
2281 .x87,
2282 }),
2283 };
2284 pub const pentium4m = Cpu{
2285 .name = "pentium4m",
2286 .llvm_name = "pentium4m",
2287 .features = featureSet(&[_]Feature{
2288 .cmov,
2289 .cx8,
2290 .fxsr,
2291 .mmx,
2292 .nopl,
2293 .slow_unaligned_mem_16,
2294 .sse2,
2295 .x87,
2296 }),
2297 };
2298 pub const pentiumpro = Cpu{
2299 .name = "pentiumpro",
2300 .llvm_name = "pentiumpro",
2301 .features = featureSet(&[_]Feature{
2302 .cmov,
2303 .cx8,
2304 .nopl,
2305 .slow_unaligned_mem_16,
2306 .x87,
2307 }),
2308 };
2309 pub const prescott = Cpu{
2310 .name = "prescott",
2311 .llvm_name = "prescott",
2312 .features = featureSet(&[_]Feature{
2313 .cmov,
2314 .cx8,
2315 .fxsr,
2316 .mmx,
2317 .nopl,
2318 .slow_unaligned_mem_16,
2319 .sse3,
2320 .x87,
2321 }),
2322 };
2323 pub const sandybridge = Cpu{
2324 .name = "sandybridge",
2325 .llvm_name = "sandybridge",
2326 .features = featureSet(&[_]Feature{
2327 .@"64bit",
2328 .avx,
2329 .cmov,
2330 .cx16,
2331 .cx8,
2332 .false_deps_popcnt,
2333 .fast_scalar_fsqrt,
2334 .fast_shld_rotate,
2335 .fxsr,
2336 .idivq_to_divl,
2337 .macrofusion,
2338 .merge_to_threeway_branch,
2339 .mmx,
2340 .nopl,
2341 .pclmul,
2342 .popcnt,
2343 .sahf,
2344 .slow_3ops_lea,
2345 .slow_unaligned_mem_32,
2346 .sse4_2,
2347 .x87,
2348 .xsave,
2349 .xsaveopt,
2350 }),
2351 };
2352 pub const silvermont = Cpu{
2353 .name = "silvermont",
2354 .llvm_name = "silvermont",
2355 .features = featureSet(&[_]Feature{
2356 .@"64bit",
2357 .cmov,
2358 .cx16,
2359 .cx8,
2360 .false_deps_popcnt,
2361 .fxsr,
2362 .idivq_to_divl,
2363 .mmx,
2364 .movbe,
2365 .nopl,
2366 .pclmul,
2367 .popcnt,
2368 .prfchw,
2369 .rdrnd,
2370 .sahf,
2371 .slow_incdec,
2372 .slow_lea,
2373 .slow_pmulld,
2374 .slow_two_mem_ops,
2375 .sse4_2,
2376 .ssse3,
2377 .x87,
2378 }),
2379 };
2380 pub const skx = Cpu{
2381 .name = "skx",
2382 .llvm_name = "skx",
2383 .features = featureSet(&[_]Feature{
2384 .@"64bit",
2385 .adx,
2386 .aes,
2387 .avx,
2388 .avx2,
2389 .avx512bw,
2390 .avx512cd,
2391 .avx512dq,
2392 .avx512f,
2393 .avx512vl,
2394 .bmi,
2395 .bmi2,
2396 .clflushopt,
2397 .clwb,
2398 .cmov,
2399 .cx16,
2400 .cx8,
2401 .ermsb,
2402 .f16c,
2403 .false_deps_popcnt,
2404 .fast_gather,
2405 .fast_scalar_fsqrt,
2406 .fast_shld_rotate,
2407 .fast_variable_shuffle,
2408 .fast_vector_fsqrt,
2409 .fma,
2410 .fsgsbase,
2411 .fxsr,
2412 .idivq_to_divl,
2413 .invpcid,
2414 .lzcnt,
2415 .macrofusion,
2416 .merge_to_threeway_branch,
2417 .mmx,
2418 .movbe,
2419 .mpx,
2420 .nopl,
2421 .pclmul,
2422 .pku,
2423 .popcnt,
2424 .prfchw,
2425 .rdrnd,
2426 .rdseed,
2427 .sahf,
2428 .slow_3ops_lea,
2429 .sse4_2,
2430 .x87,
2431 .xsave,
2432 .xsavec,
2433 .xsaveopt,
2434 .xsaves,
2435 }),
2436 };
2437 pub const skylake = Cpu{
2438 .name = "skylake",
2439 .llvm_name = "skylake",
2440 .features = featureSet(&[_]Feature{
2441 .@"64bit",
2442 .adx,
2443 .aes,
2444 .avx,
2445 .avx2,
2446 .bmi,
2447 .bmi2,
2448 .clflushopt,
2449 .cmov,
2450 .cx16,
2451 .cx8,
2452 .ermsb,
2453 .f16c,
2454 .false_deps_popcnt,
2455 .fast_gather,
2456 .fast_scalar_fsqrt,
2457 .fast_shld_rotate,
2458 .fast_variable_shuffle,
2459 .fast_vector_fsqrt,
2460 .fma,
2461 .fsgsbase,
2462 .fxsr,
2463 .idivq_to_divl,
2464 .invpcid,
2465 .lzcnt,
2466 .macrofusion,
2467 .merge_to_threeway_branch,
2468 .mmx,
2469 .movbe,
2470 .mpx,
2471 .nopl,
2472 .pclmul,
2473 .popcnt,
2474 .prfchw,
2475 .rdrnd,
2476 .rdseed,
2477 .sahf,
2478 .sgx,
2479 .slow_3ops_lea,
2480 .sse4_2,
2481 .x87,
2482 .xsave,
2483 .xsavec,
2484 .xsaveopt,
2485 .xsaves,
2486 }),
2487 };
2488 pub const skylake_avx512 = Cpu{
2489 .name = "skylake_avx512",
2490 .llvm_name = "skylake-avx512",
2491 .features = featureSet(&[_]Feature{
2492 .@"64bit",
2493 .adx,
2494 .aes,
2495 .avx,
2496 .avx2,
2497 .avx512bw,
2498 .avx512cd,
2499 .avx512dq,
2500 .avx512f,
2501 .avx512vl,
2502 .bmi,
2503 .bmi2,
2504 .clflushopt,
2505 .clwb,
2506 .cmov,
2507 .cx16,
2508 .cx8,
2509 .ermsb,
2510 .f16c,
2511 .false_deps_popcnt,
2512 .fast_gather,
2513 .fast_scalar_fsqrt,
2514 .fast_shld_rotate,
2515 .fast_variable_shuffle,
2516 .fast_vector_fsqrt,
2517 .fma,
2518 .fsgsbase,
2519 .fxsr,
2520 .idivq_to_divl,
2521 .invpcid,
2522 .lzcnt,
2523 .macrofusion,
2524 .merge_to_threeway_branch,
2525 .mmx,
2526 .movbe,
2527 .mpx,
2528 .nopl,
2529 .pclmul,
2530 .pku,
2531 .popcnt,
2532 .prfchw,
2533 .rdrnd,
2534 .rdseed,
2535 .sahf,
2536 .slow_3ops_lea,
2537 .sse4_2,
2538 .x87,
2539 .xsave,
2540 .xsavec,
2541 .xsaveopt,
2542 .xsaves,
2543 }),
2544 };
2545 pub const slm = Cpu{
2546 .name = "slm",
2547 .llvm_name = "slm",
2548 .features = featureSet(&[_]Feature{
2549 .@"64bit",
2550 .cmov,
2551 .cx16,
2552 .cx8,
2553 .false_deps_popcnt,
2554 .fxsr,
2555 .idivq_to_divl,
2556 .mmx,
2557 .movbe,
2558 .nopl,
2559 .pclmul,
2560 .popcnt,
2561 .prfchw,
2562 .rdrnd,
2563 .sahf,
2564 .slow_incdec,
2565 .slow_lea,
2566 .slow_pmulld,
2567 .slow_two_mem_ops,
2568 .sse4_2,
2569 .ssse3,
2570 .x87,
2571 }),
2572 };
2573 pub const tremont = Cpu{
2574 .name = "tremont",
2575 .llvm_name = "tremont",
2576 .features = featureSet(&[_]Feature{
2577 .@"64bit",
2578 .aes,
2579 .cldemote,
2580 .clflushopt,
2581 .cmov,
2582 .cx16,
2583 .cx8,
2584 .fsgsbase,
2585 .fxsr,
2586 .gfni,
2587 .mmx,
2588 .movbe,
2589 .movdir64b,
2590 .movdiri,
2591 .mpx,
2592 .nopl,
2593 .pclmul,
2594 .popcnt,
2595 .prfchw,
2596 .ptwrite,
2597 .rdpid,
2598 .rdrnd,
2599 .rdseed,
2600 .sahf,
2601 .sgx,
2602 .sha,
2603 .slow_incdec,
2604 .slow_lea,
2605 .slow_two_mem_ops,
2606 .sse4_2,
2607 .ssse3,
2608 .waitpkg,
2609 .x87,
2610 .xsave,
2611 .xsavec,
2612 .xsaveopt,
2613 .xsaves,
2614 }),
2615 };
2616 pub const westmere = Cpu{
2617 .name = "westmere",
2618 .llvm_name = "westmere",
2619 .features = featureSet(&[_]Feature{
2620 .@"64bit",
2621 .cmov,
2622 .cx16,
2623 .cx8,
2624 .fxsr,
2625 .macrofusion,
2626 .mmx,
2627 .nopl,
2628 .pclmul,
2629 .popcnt,
2630 .sahf,
2631 .sse4_2,
2632 .x87,
2633 }),
2634 };
2635 pub const winchip_c6 = Cpu{
2636 .name = "winchip_c6",
2637 .llvm_name = "winchip-c6",
2638 .features = featureSet(&[_]Feature{
2639 .mmx,
2640 .slow_unaligned_mem_16,
2641 .x87,
2642 }),
2643 };
2644 pub const winchip2 = Cpu{
2645 .name = "winchip2",
2646 .llvm_name = "winchip2",
2647 .features = featureSet(&[_]Feature{
2648 .@"3dnow",
2649 .slow_unaligned_mem_16,
2650 .x87,
2651 }),
2652 };
2653 pub const x86_64 = Cpu{
2654 .name = "x86_64",
2655 .llvm_name = "x86-64",
2656 .features = featureSet(&[_]Feature{
2657 .@"64bit",
2658 .cmov,
2659 .cx8,
2660 .fxsr,
2661 .macrofusion,
2662 .mmx,
2663 .nopl,
2664 .slow_3ops_lea,
2665 .slow_incdec,
2666 .sse2,
2667 .x87,
2668 }),
2669 };
2670 pub const yonah = Cpu{
2671 .name = "yonah",
2672 .llvm_name = "yonah",
2673 .features = featureSet(&[_]Feature{
2674 .cmov,
2675 .cx8,
2676 .fxsr,
2677 .mmx,
2678 .nopl,
2679 .slow_unaligned_mem_16,
2680 .sse3,
2681 .x87,
2682 }),
2683 };
2684 pub const znver1 = Cpu{
2685 .name = "znver1",
2686 .llvm_name = "znver1",
2687 .features = featureSet(&[_]Feature{
2688 .@"64bit",
2689 .adx,
2690 .aes,
2691 .avx2,
2692 .bmi,
2693 .bmi2,
2694 .branchfusion,
2695 .clflushopt,
2696 .clzero,
2697 .cmov,
2698 .cx16,
2699 .f16c,
2700 .fast_15bytenop,
2701 .fast_bextr,
2702 .fast_lzcnt,
2703 .fast_scalar_shift_masks,
2704 .fma,
2705 .fsgsbase,
2706 .fxsr,
2707 .lzcnt,
2708 .mmx,
2709 .movbe,
2710 .mwaitx,
2711 .nopl,
2712 .pclmul,
2713 .popcnt,
2714 .prfchw,
2715 .rdrnd,
2716 .rdseed,
2717 .sahf,
2718 .sha,
2719 .slow_shld,
2720 .sse4a,
2721 .x87,
2722 .xsave,
2723 .xsavec,
2724 .xsaveopt,
2725 .xsaves,
2726 }),
2727 };
2728 pub const znver2 = Cpu{
2729 .name = "znver2",
2730 .llvm_name = "znver2",
2731 .features = featureSet(&[_]Feature{
2732 .@"64bit",
2733 .adx,
2734 .aes,
2735 .avx2,
2736 .bmi,
2737 .bmi2,
2738 .branchfusion,
2739 .clflushopt,
2740 .clwb,
2741 .clzero,
2742 .cmov,
2743 .cx16,
2744 .f16c,
2745 .fast_15bytenop,
2746 .fast_bextr,
2747 .fast_lzcnt,
2748 .fast_scalar_shift_masks,
2749 .fma,
2750 .fsgsbase,
2751 .fxsr,
2752 .lzcnt,
2753 .mmx,
2754 .movbe,
2755 .mwaitx,
2756 .nopl,
2757 .pclmul,
2758 .popcnt,
2759 .prfchw,
2760 .rdpid,
2761 .rdrnd,
2762 .rdseed,
2763 .sahf,
2764 .sha,
2765 .slow_shld,
2766 .sse4a,
2767 .wbnoinvd,
2768 .x87,
2769 .xsave,
2770 .xsavec,
2771 .xsaveopt,
2772 .xsaves,
2773 }),
2774 };
2775};
2776
2777/// All x86 CPUs, sorted alphabetically by name.
2778/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2779/// compiler has inefficient memory and CPU usage, affecting build times.
2780pub const all_cpus = &[_]*const Cpu{
2781 &cpu.amdfam10,
2782 &cpu.athlon,
2783 &cpu.athlon_4,
2784 &cpu.athlon_fx,
2785 &cpu.athlon_mp,
2786 &cpu.athlon_tbird,
2787 &cpu.athlon_xp,
2788 &cpu.athlon64,
2789 &cpu.athlon64_sse3,
2790 &cpu.atom,
2791 &cpu.barcelona,
2792 &cpu.bdver1,
2793 &cpu.bdver2,
2794 &cpu.bdver3,
2795 &cpu.bdver4,
2796 &cpu.bonnell,
2797 &cpu.broadwell,
2798 &cpu.btver1,
2799 &cpu.btver2,
2800 &cpu.c3,
2801 &cpu.c3_2,
2802 &cpu.cannonlake,
2803 &cpu.cascadelake,
2804 &cpu.cooperlake,
2805 &cpu.core_avx_i,
2806 &cpu.core_avx2,
2807 &cpu.core2,
2808 &cpu.corei7,
2809 &cpu.corei7_avx,
2810 &cpu.generic,
2811 &cpu.geode,
2812 &cpu.goldmont,
2813 &cpu.goldmont_plus,
2814 &cpu.haswell,
2815 &cpu._i386,
2816 &cpu._i486,
2817 &cpu._i586,
2818 &cpu._i686,
2819 &cpu.icelake_client,
2820 &cpu.icelake_server,
2821 &cpu.ivybridge,
2822 &cpu.k6,
2823 &cpu.k6_2,
2824 &cpu.k6_3,
2825 &cpu.k8,
2826 &cpu.k8_sse3,
2827 &cpu.knl,
2828 &cpu.knm,
2829 &cpu.lakemont,
2830 &cpu.nehalem,
2831 &cpu.nocona,
2832 &cpu.opteron,
2833 &cpu.opteron_sse3,
2834 &cpu.penryn,
2835 &cpu.pentium,
2836 &cpu.pentium_m,
2837 &cpu.pentium_mmx,
2838 &cpu.pentium2,
2839 &cpu.pentium3,
2840 &cpu.pentium3m,
2841 &cpu.pentium4,
2842 &cpu.pentium4m,
2843 &cpu.pentiumpro,
2844 &cpu.prescott,
2845 &cpu.sandybridge,
2846 &cpu.silvermont,
2847 &cpu.skx,
2848 &cpu.skylake,
2849 &cpu.skylake_avx512,
2850 &cpu.slm,
2851 &cpu.tremont,
2852 &cpu.westmere,
2853 &cpu.winchip_c6,
2854 &cpu.winchip2,
2855 &cpu.x86_64,
2856 &cpu.yonah,
2857 &cpu.znver1,
2858 &cpu.znver2,
2859};
src-self-hosted/clang.zig+2
......@@ -768,6 +768,7 @@ pub extern fn ZigClangFieldDecl_getCanonicalDecl(field_decl: ?*const struct_ZigC
768768pub extern fn ZigClangEnumDecl_getCanonicalDecl(self: ?*const struct_ZigClangEnumDecl) ?*const struct_ZigClangTagDecl;
769769pub extern fn ZigClangTypedefNameDecl_getCanonicalDecl(self: ?*const struct_ZigClangTypedefNameDecl) ?*const struct_ZigClangTypedefNameDecl;
770770pub extern fn ZigClangFunctionDecl_getCanonicalDecl(self: ?*const struct_ZigClangFunctionDecl) ?*const struct_ZigClangFunctionDecl;
771pub extern fn ZigClangParmVarDecl_getOriginalType(self: ?*const struct_ZigClangParmVarDecl) struct_ZigClangQualType;
771772pub extern fn ZigClangVarDecl_getCanonicalDecl(self: ?*const struct_ZigClangVarDecl) ?*const struct_ZigClangVarDecl;
772773pub extern fn ZigClangVarDecl_getSectionAttribute(self: *const ZigClangVarDecl, len: *usize) ?[*]const u8;
773774pub extern fn ZigClangFunctionDecl_getAlignedAttribute(self: *const ZigClangFunctionDecl, *const ZigClangASTContext) c_uint;
......@@ -809,6 +810,7 @@ pub extern fn ZigClangQualType_isRestrictQualified(self: struct_ZigClangQualType
809810pub extern fn ZigClangType_getTypeClass(self: ?*const struct_ZigClangType) ZigClangTypeClass;
810811pub extern fn ZigClangType_getPointeeType(self: ?*const struct_ZigClangType) struct_ZigClangQualType;
811812pub extern fn ZigClangType_isVoidType(self: ?*const struct_ZigClangType) bool;
813pub extern fn ZigClangType_isConstantArrayType(self: ?*const struct_ZigClangType) bool;
812814pub extern fn ZigClangType_isRecordType(self: ?*const struct_ZigClangType) bool;
813815pub extern fn ZigClangType_isArrayType(self: ?*const struct_ZigClangType) bool;
814816pub extern fn ZigClangType_isBooleanType(self: ?*const struct_ZigClangType) bool;
src-self-hosted/main.zig+3-43
......@@ -79,7 +79,9 @@ pub fn main() !void {
7979 } else if (mem.eql(u8, cmd, "libc")) {
8080 return cmdLibC(allocator, cmd_args);
8181 } else if (mem.eql(u8, cmd, "targets")) {
82 return cmdTargets(allocator, cmd_args);
82 // TODO figure out the current target rather than using the target that was specified when
83 // compiling the compiler
84 return @import("print_targets.zig").cmdTargets(allocator, cmd_args, stdout, Target.current);
8385 } else if (mem.eql(u8, cmd, "version")) {
8486 return cmdVersion(allocator, cmd_args);
8587 } else if (mem.eql(u8, cmd, "zen")) {
......@@ -789,48 +791,6 @@ async fn fmtPath(fmt: *Fmt, file_path_ref: []const u8, check_mode: bool) FmtErro
789791 }
790792}
791793
792// cmd:targets /////////////////////////////////////////////////////////////////////////////////////
793
794fn cmdTargets(allocator: *Allocator, args: []const []const u8) !void {
795 try stdout.write("Architectures:\n");
796 {
797 comptime var i: usize = 0;
798 inline while (i < @memberCount(builtin.Arch)) : (i += 1) {
799 comptime const arch_tag = @memberName(builtin.Arch, i);
800 // NOTE: Cannot use empty string, see #918.
801 comptime const native_str = if (comptime mem.eql(u8, arch_tag, @tagName(builtin.arch))) " (native)\n" else "\n";
802
803 try stdout.print(" {}{}", .{ arch_tag, native_str });
804 }
805 }
806 try stdout.write("\n");
807
808 try stdout.write("Operating Systems:\n");
809 {
810 comptime var i: usize = 0;
811 inline while (i < @memberCount(Target.Os)) : (i += 1) {
812 comptime const os_tag = @memberName(Target.Os, i);
813 // NOTE: Cannot use empty string, see #918.
814 comptime const native_str = if (comptime mem.eql(u8, os_tag, @tagName(builtin.os))) " (native)\n" else "\n";
815
816 try stdout.print(" {}{}", .{ os_tag, native_str });
817 }
818 }
819 try stdout.write("\n");
820
821 try stdout.write("C ABIs:\n");
822 {
823 comptime var i: usize = 0;
824 inline while (i < @memberCount(Target.Abi)) : (i += 1) {
825 comptime const abi_tag = @memberName(Target.Abi, i);
826 // NOTE: Cannot use empty string, see #918.
827 comptime const native_str = if (comptime mem.eql(u8, abi_tag, @tagName(builtin.abi))) " (native)\n" else "\n";
828
829 try stdout.print(" {}{}", .{ abi_tag, native_str });
830 }
831 }
832}
833
834794fn cmdVersion(allocator: *Allocator, args: []const []const u8) !void {
835795 try stdout.print("{}\n", .{std.mem.toSliceConst(u8, c.ZIG_VERSION_STRING)});
836796}
src-self-hosted/print_targets.zig created+251
......@@ -0,0 +1,251 @@
1const std = @import("std");
2const fs = std.fs;
3const io = std.io;
4const mem = std.mem;
5const Allocator = mem.Allocator;
6const Target = std.Target;
7
8// TODO this is hard-coded until self-hosted gains this information canonically
9const available_libcs = [_][]const u8{
10 "aarch64_be-linux-gnu",
11 "aarch64_be-linux-musl",
12 "aarch64_be-windows-gnu",
13 "aarch64-linux-gnu",
14 "aarch64-linux-musl",
15 "aarch64-windows-gnu",
16 "armeb-linux-gnueabi",
17 "armeb-linux-gnueabihf",
18 "armeb-linux-musleabi",
19 "armeb-linux-musleabihf",
20 "armeb-windows-gnu",
21 "arm-linux-gnueabi",
22 "arm-linux-gnueabihf",
23 "arm-linux-musleabi",
24 "arm-linux-musleabihf",
25 "arm-windows-gnu",
26 "i386-linux-gnu",
27 "i386-linux-musl",
28 "i386-windows-gnu",
29 "mips64el-linux-gnuabi64",
30 "mips64el-linux-gnuabin32",
31 "mips64el-linux-musl",
32 "mips64-linux-gnuabi64",
33 "mips64-linux-gnuabin32",
34 "mips64-linux-musl",
35 "mipsel-linux-gnu",
36 "mipsel-linux-musl",
37 "mips-linux-gnu",
38 "mips-linux-musl",
39 "powerpc64le-linux-gnu",
40 "powerpc64le-linux-musl",
41 "powerpc64-linux-gnu",
42 "powerpc64-linux-musl",
43 "powerpc-linux-gnu",
44 "powerpc-linux-musl",
45 "riscv64-linux-gnu",
46 "riscv64-linux-musl",
47 "s390x-linux-gnu",
48 "s390x-linux-musl",
49 "sparc-linux-gnu",
50 "sparcv9-linux-gnu",
51 "wasm32-freestanding-musl",
52 "x86_64-linux-gnu (native)",
53 "x86_64-linux-gnux32",
54 "x86_64-linux-musl",
55 "x86_64-windows-gnu",
56};
57
58// TODO this is hard-coded until self-hosted gains this information canonically
59const available_glibcs = [_][]const u8{
60 "2.0",
61 "2.1",
62 "2.1.1",
63 "2.1.2",
64 "2.1.3",
65 "2.2",
66 "2.2.1",
67 "2.2.2",
68 "2.2.3",
69 "2.2.4",
70 "2.2.5",
71 "2.2.6",
72 "2.3",
73 "2.3.2",
74 "2.3.3",
75 "2.3.4",
76 "2.4",
77 "2.5",
78 "2.6",
79 "2.7",
80 "2.8",
81 "2.9",
82 "2.10",
83 "2.11",
84 "2.12",
85 "2.13",
86 "2.14",
87 "2.15",
88 "2.16",
89 "2.17",
90 "2.18",
91 "2.19",
92 "2.22",
93 "2.23",
94 "2.24",
95 "2.25",
96 "2.26",
97 "2.27",
98 "2.28",
99 "2.29",
100 "2.30",
101};
102
103pub fn cmdTargets(
104 allocator: *Allocator,
105 args: []const []const u8,
106 stdout: *io.OutStream(fs.File.WriteError),
107 native_target: Target,
108) !void {
109 const BOS = io.BufferedOutStream(fs.File.WriteError);
110 var bos = BOS.init(stdout);
111 var jws = std.json.WriteStream(BOS.Stream, 6).init(&bos.stream);
112
113 try jws.beginObject();
114
115 try jws.objectField("arch");
116 try jws.beginObject();
117 {
118 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
119 try jws.objectField(field.name);
120 if (field.field_type == void) {
121 try jws.emitNull();
122 } else {
123 try jws.emitString(@typeName(field.field_type));
124 }
125 }
126 }
127 try jws.endObject();
128
129 try jws.objectField("subArch");
130 try jws.beginObject();
131 const sub_arch_list = [_]type{
132 Target.Arch.Arm32,
133 Target.Arch.Arm64,
134 Target.Arch.Kalimba,
135 Target.Arch.Mips,
136 };
137 inline for (sub_arch_list) |SubArch| {
138 try jws.objectField(@typeName(SubArch));
139 try jws.beginArray();
140 inline for (@typeInfo(SubArch).Enum.fields) |field| {
141 try jws.arrayElem();
142 try jws.emitString(field.name);
143 }
144 try jws.endArray();
145 }
146 try jws.endObject();
147
148 try jws.objectField("os");
149 try jws.beginArray();
150 inline for (@typeInfo(Target.Os).Enum.fields) |field| {
151 try jws.arrayElem();
152 try jws.emitString(field.name);
153 }
154 try jws.endArray();
155
156 try jws.objectField("abi");
157 try jws.beginArray();
158 inline for (@typeInfo(Target.Abi).Enum.fields) |field| {
159 try jws.arrayElem();
160 try jws.emitString(field.name);
161 }
162 try jws.endArray();
163
164 try jws.objectField("libc");
165 try jws.beginArray();
166 for (available_libcs) |libc| {
167 try jws.arrayElem();
168 try jws.emitString(libc);
169 }
170 try jws.endArray();
171
172 try jws.objectField("glibc");
173 try jws.beginArray();
174 for (available_glibcs) |glibc| {
175 try jws.arrayElem();
176 try jws.emitString(glibc);
177 }
178 try jws.endArray();
179
180 try jws.objectField("cpus");
181 try jws.beginObject();
182 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
183 try jws.objectField(field.name);
184 try jws.beginObject();
185 const arch = @unionInit(Target.Arch, field.name, undefined);
186 for (arch.allCpus()) |cpu| {
187 try jws.objectField(cpu.name);
188 try jws.beginArray();
189 for (arch.allFeaturesList()) |feature, i| {
190 if (cpu.features.isEnabled(@intCast(u8, i))) {
191 try jws.arrayElem();
192 try jws.emitString(feature.name);
193 }
194 }
195 try jws.endArray();
196 }
197 try jws.endObject();
198 }
199 try jws.endObject();
200
201 try jws.objectField("cpuFeatures");
202 try jws.beginObject();
203 inline for (@typeInfo(Target.Arch).Union.fields) |field| {
204 try jws.objectField(field.name);
205 try jws.beginArray();
206 const arch = @unionInit(Target.Arch, field.name, undefined);
207 for (arch.allFeaturesList()) |feature| {
208 try jws.arrayElem();
209 try jws.emitString(feature.name);
210 }
211 try jws.endArray();
212 }
213 try jws.endObject();
214
215 try jws.objectField("native");
216 try jws.beginObject();
217 {
218 const triple = try native_target.zigTriple(allocator);
219 defer allocator.free(triple);
220 try jws.objectField("triple");
221 try jws.emitString(triple);
222 }
223 try jws.objectField("arch");
224 try jws.emitString(@tagName(native_target.getArch()));
225 try jws.objectField("os");
226 try jws.emitString(@tagName(native_target.getOs()));
227 try jws.objectField("abi");
228 try jws.emitString(@tagName(native_target.getAbi()));
229 try jws.objectField("cpuName");
230 const cpu_features = native_target.getCpuFeatures();
231 try jws.emitString(cpu_features.cpu.name);
232 {
233 try jws.objectField("cpuFeatures");
234 try jws.beginArray();
235 for (native_target.getArch().allFeaturesList()) |feature, i_usize| {
236 const index = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
237 if (cpu_features.features.isEnabled(index)) {
238 try jws.arrayElem();
239 try jws.emitString(feature.name);
240 }
241 }
242 try jws.endArray();
243 }
244 // TODO implement native glibc version detection in self-hosted
245 try jws.endObject();
246
247 try jws.endObject();
248
249 try bos.stream.writeByte('\n');
250 return bos.flush();
251}
src-self-hosted/stage1.zig+304-1
......@@ -9,9 +9,11 @@ const process = std.process;
99const Allocator = mem.Allocator;
1010const ArrayList = std.ArrayList;
1111const Buffer = std.Buffer;
12const Target = std.Target;
1213const self_hosted_main = @import("main.zig");
1314const errmsg = @import("errmsg.zig");
1415const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer;
16const assert = std.debug.assert;
1517
1618var stderr_file: fs.File = undefined;
1719var stderr: *io.OutStream(fs.File.WriteError) = undefined;
......@@ -63,6 +65,7 @@ const Error = extern enum {
6365 CacheUnavailable,
6466 PathTooLong,
6567 CCompilerCannotFindFile,
68 NoCCompilerInstalled,
6669 ReadingDepFile,
6770 InvalidDepFile,
6871 MissingArchitecture,
......@@ -80,6 +83,15 @@ const Error = extern enum {
8083 OperationAborted,
8184 BrokenPipe,
8285 NoSpaceLeft,
86 NotLazy,
87 IsAsync,
88 ImportOutsidePkgPath,
89 UnknownCpu,
90 UnknownSubArchitecture,
91 UnknownCpuFeature,
92 InvalidCpuFeatures,
93 InvalidLlvmCpuFeaturesFormat,
94 UnknownApplicationBinaryInterface,
8395};
8496
8597const FILE = std.c.FILE;
......@@ -149,7 +161,7 @@ fn fmtMain(argc: c_int, argv: [*]const [*:0]const u8) !void {
149161 const argc_usize = @intCast(usize, argc);
150162 var arg_i: usize = 0;
151163 while (arg_i < argc_usize) : (arg_i += 1) {
152 try args_list.append(std.mem.toSliceConst(u8, argv[arg_i]));
164 try args_list.append(mem.toSliceConst(u8, argv[arg_i]));
153165 }
154166
155167 stdout = &std.io.getStdOut().outStream().stream;
......@@ -527,3 +539,294 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz
527539 node.activate();
528540 node.context.maybeRefresh();
529541}
542
543fn cpuFeaturesFromLLVM(
544 arch: Target.Arch,
545 llvm_cpu_name_z: ?[*:0]const u8,
546 llvm_cpu_features_opt: ?[*:0]const u8,
547) !Target.CpuFeatures {
548 var result = arch.getBaselineCpuFeatures();
549
550 if (llvm_cpu_name_z) |cpu_name_z| {
551 const llvm_cpu_name = mem.toSliceConst(u8, cpu_name_z);
552
553 for (arch.allCpus()) |cpu| {
554 const this_llvm_name = cpu.llvm_name orelse continue;
555 if (mem.eql(u8, this_llvm_name, llvm_cpu_name)) {
556 // Here we use the non-dependencies-populated set,
557 // so that subtracting features later in this function
558 // affect the prepopulated set.
559 result = Target.CpuFeatures{
560 .cpu = cpu,
561 .features = cpu.features,
562 };
563 break;
564 }
565 }
566 }
567
568 const all_features = arch.allFeaturesList();
569
570 if (llvm_cpu_features_opt) |llvm_cpu_features| {
571 var it = mem.tokenize(mem.toSliceConst(u8, llvm_cpu_features), ",");
572 while (it.next()) |decorated_llvm_feat| {
573 var op: enum {
574 add,
575 sub,
576 } = undefined;
577 var llvm_feat: []const u8 = undefined;
578 if (mem.startsWith(u8, decorated_llvm_feat, "+")) {
579 op = .add;
580 llvm_feat = decorated_llvm_feat[1..];
581 } else if (mem.startsWith(u8, decorated_llvm_feat, "-")) {
582 op = .sub;
583 llvm_feat = decorated_llvm_feat[1..];
584 } else {
585 return error.InvalidLlvmCpuFeaturesFormat;
586 }
587 for (all_features) |feature, index_usize| {
588 const this_llvm_name = feature.llvm_name orelse continue;
589 if (mem.eql(u8, llvm_feat, this_llvm_name)) {
590 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
591 switch (op) {
592 .add => result.features.addFeature(index),
593 .sub => result.features.removeFeature(index),
594 }
595 break;
596 }
597 }
598 }
599 }
600
601 result.features.populateDependencies(all_features);
602 return result;
603}
604
605// ABI warning
606export fn stage2_cmd_targets(zig_triple: [*:0]const u8) c_int {
607 cmdTargets(zig_triple) catch |err| {
608 std.debug.warn("unable to list targets: {}\n", .{@errorName(err)});
609 return -1;
610 };
611 return 0;
612}
613
614fn cmdTargets(zig_triple: [*:0]const u8) !void {
615 var target = try Target.parse(mem.toSliceConst(u8, zig_triple));
616 target.Cross.cpu_features = blk: {
617 const llvm = @import("llvm.zig");
618 const llvm_cpu_name = llvm.GetHostCPUName();
619 const llvm_cpu_features = llvm.GetNativeFeatures();
620 break :blk try cpuFeaturesFromLLVM(target.Cross.arch, llvm_cpu_name, llvm_cpu_features);
621 };
622 return @import("print_targets.zig").cmdTargets(
623 std.heap.c_allocator,
624 &[0][]u8{},
625 &std.io.getStdOut().outStream().stream,
626 target,
627 );
628}
629
630const Stage2CpuFeatures = struct {
631 allocator: *mem.Allocator,
632 cpu_features: Target.CpuFeatures,
633
634 llvm_features_str: ?[*:0]const u8,
635
636 builtin_str: [:0]const u8,
637 cache_hash: [:0]const u8,
638
639 const Self = @This();
640
641 fn createFromNative(allocator: *mem.Allocator) !*Self {
642 const arch = Target.current.getArch();
643 const llvm = @import("llvm.zig");
644 const llvm_cpu_name = llvm.GetHostCPUName();
645 const llvm_cpu_features = llvm.GetNativeFeatures();
646 const cpu_features = try cpuFeaturesFromLLVM(arch, llvm_cpu_name, llvm_cpu_features);
647 return createFromCpuFeatures(allocator, arch, cpu_features);
648 }
649
650 fn createFromCpuFeatures(
651 allocator: *mem.Allocator,
652 arch: Target.Arch,
653 cpu_features: Target.CpuFeatures,
654 ) !*Self {
655 const self = try allocator.create(Self);
656 errdefer allocator.destroy(self);
657
658 const cache_hash = try std.fmt.allocPrint0(allocator, "{}\n{}", .{
659 cpu_features.cpu.name,
660 cpu_features.features.asBytes(),
661 });
662 errdefer allocator.free(cache_hash);
663
664 const generic_arch_name = arch.genericName();
665 var builtin_str_buffer = try std.Buffer.allocPrint(allocator,
666 \\CpuFeatures{{
667 \\ .cpu = &Target.{}.cpu.{},
668 \\ .features = Target.{}.featureSet(&[_]Target.{}.Feature{{
669 \\
670 , .{
671 generic_arch_name,
672 cpu_features.cpu.name,
673 generic_arch_name,
674 generic_arch_name,
675 });
676 defer builtin_str_buffer.deinit();
677
678 var llvm_features_buffer = try std.Buffer.initSize(allocator, 0);
679 defer llvm_features_buffer.deinit();
680
681 for (arch.allFeaturesList()) |feature, index_usize| {
682 const index = @intCast(Target.Cpu.Feature.Set.Index, index_usize);
683 const is_enabled = cpu_features.features.isEnabled(index);
684
685 if (feature.llvm_name) |llvm_name| {
686 const plus_or_minus = "-+"[@boolToInt(is_enabled)];
687 try llvm_features_buffer.appendByte(plus_or_minus);
688 try llvm_features_buffer.append(llvm_name);
689 try llvm_features_buffer.append(",");
690 }
691
692 if (is_enabled) {
693 // TODO some kind of "zig identifier escape" function rather than
694 // unconditionally using @"" syntax
695 try builtin_str_buffer.append(" .@\"");
696 try builtin_str_buffer.append(feature.name);
697 try builtin_str_buffer.append("\",\n");
698 }
699 }
700
701 try builtin_str_buffer.append(
702 \\ }),
703 \\};
704 \\
705 );
706
707 assert(mem.endsWith(u8, llvm_features_buffer.toSliceConst(), ","));
708 llvm_features_buffer.shrink(llvm_features_buffer.len() - 1);
709
710 self.* = Self{
711 .allocator = allocator,
712 .cpu_features = cpu_features,
713 .llvm_features_str = llvm_features_buffer.toOwnedSlice().ptr,
714 .builtin_str = builtin_str_buffer.toOwnedSlice(),
715 .cache_hash = cache_hash,
716 };
717 return self;
718 }
719
720 fn destroy(self: *Self) void {
721 self.allocator.free(self.cache_hash);
722 self.allocator.free(self.builtin_str);
723 // TODO if (self.llvm_features_str) |llvm_features_str| self.allocator.free(llvm_features_str);
724 self.allocator.destroy(self);
725 }
726};
727
728// ABI warning
729export fn stage2_cpu_features_parse(
730 result: **Stage2CpuFeatures,
731 zig_triple: ?[*:0]const u8,
732 cpu_name: ?[*:0]const u8,
733 cpu_features: ?[*:0]const u8,
734) Error {
735 result.* = stage2ParseCpuFeatures(zig_triple, cpu_name, cpu_features) catch |err| switch (err) {
736 error.OutOfMemory => return .OutOfMemory,
737 error.UnknownArchitecture => return .UnknownArchitecture,
738 error.UnknownSubArchitecture => return .UnknownSubArchitecture,
739 error.UnknownOperatingSystem => return .UnknownOperatingSystem,
740 error.UnknownApplicationBinaryInterface => return .UnknownApplicationBinaryInterface,
741 error.MissingOperatingSystem => return .MissingOperatingSystem,
742 error.MissingArchitecture => return .MissingArchitecture,
743 error.InvalidLlvmCpuFeaturesFormat => return .InvalidLlvmCpuFeaturesFormat,
744 error.InvalidCpuFeatures => return .InvalidCpuFeatures,
745 };
746 return .None;
747}
748
749fn stage2ParseCpuFeatures(
750 zig_triple_oz: ?[*:0]const u8,
751 cpu_name_oz: ?[*:0]const u8,
752 cpu_features_oz: ?[*:0]const u8,
753) !*Stage2CpuFeatures {
754 const zig_triple_z = zig_triple_oz orelse return Stage2CpuFeatures.createFromNative(std.heap.c_allocator);
755 const target = try Target.parse(mem.toSliceConst(u8, zig_triple_z));
756 const arch = target.Cross.arch;
757
758 const cpu = if (cpu_name_oz) |cpu_name_z| blk: {
759 const cpu_name = mem.toSliceConst(u8, cpu_name_z);
760 break :blk arch.parseCpu(cpu_name) catch |err| switch (err) {
761 error.UnknownCpu => {
762 std.debug.warn("Unknown CPU: '{}'\nAvailable CPUs for architecture '{}':\n", .{
763 cpu_name,
764 @tagName(arch),
765 });
766 for (arch.allCpus()) |cpu| {
767 std.debug.warn(" {}\n", .{cpu.name});
768 }
769 process.exit(1);
770 },
771 else => |e| return e,
772 };
773 } else target.Cross.cpu_features.cpu;
774
775 var set = if (cpu_features_oz) |cpu_features_z| blk: {
776 const cpu_features = mem.toSliceConst(u8, cpu_features_z);
777 break :blk arch.parseCpuFeatureSet(cpu, cpu_features) catch |err| switch (err) {
778 error.UnknownCpuFeature => {
779 std.debug.warn(
780 \\Unknown CPU features specified.
781 \\Available CPU features for architecture '{}':
782 \\
783 , .{@tagName(arch)});
784 for (arch.allFeaturesList()) |feature| {
785 std.debug.warn(" {}\n", .{feature.name});
786 }
787 process.exit(1);
788 },
789 else => |e| return e,
790 };
791 } else cpu.features;
792
793 if (arch.subArchFeature()) |index| {
794 set.addFeature(index);
795 }
796 set.populateDependencies(arch.allFeaturesList());
797
798 return Stage2CpuFeatures.createFromCpuFeatures(std.heap.c_allocator, arch, .{
799 .cpu = cpu,
800 .features = set,
801 });
802}
803
804// ABI warning
805export fn stage2_cpu_features_get_cache_hash(
806 cpu_features: *const Stage2CpuFeatures,
807 ptr: *[*:0]const u8,
808 len: *usize,
809) void {
810 ptr.* = cpu_features.cache_hash.ptr;
811 len.* = cpu_features.cache_hash.len;
812}
813
814// ABI warning
815export fn stage2_cpu_features_get_builtin_str(
816 cpu_features: *const Stage2CpuFeatures,
817 ptr: *[*:0]const u8,
818 len: *usize,
819) void {
820 ptr.* = cpu_features.builtin_str.ptr;
821 len.* = cpu_features.builtin_str.len;
822}
823
824// ABI warning
825export fn stage2_cpu_features_get_llvm_cpu(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
826 return if (cpu_features.cpu_features.cpu.llvm_name) |s| s.ptr else null;
827}
828
829// ABI warning
830export fn stage2_cpu_features_get_llvm_features(cpu_features: *const Stage2CpuFeatures) ?[*:0]const u8 {
831 return cpu_features.llvm_features_str;
832}
src-self-hosted/translate_c.zig+62-60
......@@ -289,8 +289,7 @@ pub fn translate(
289289 tree.errors = ast.Tree.ErrorList.init(arena);
290290
291291 tree.root_node = try arena.create(ast.Node.Root);
292 tree.root_node.* = ast.Node.Root{
293 .base = ast.Node{ .id = ast.Node.Id.Root },
292 tree.root_node.* = .{
294293 .decls = ast.Node.Root.DeclList.init(arena),
295294 // initialized with the eof token at the end
296295 .eof_token = undefined,
......@@ -440,7 +439,6 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
440439 .PrivateExtern => return failDecl(c, fn_decl_loc, fn_name, "unsupported storage class: private extern", .{}),
441440 .Auto => unreachable, // Not legal on functions
442441 .Register => unreachable, // Not legal on functions
443 else => unreachable,
444442 },
445443 };
446444
......@@ -487,6 +485,7 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
487485 block_scope.block_node = block_node;
488486
489487 var it = proto_node.params.iterator(0);
488 var param_id: c_uint = 0;
490489 while (it.next()) |p| {
491490 const param = @fieldParentPtr(ast.Node.ParamDecl, "base", p.*);
492491 const param_name = if (param.name_token) |name_tok|
......@@ -500,18 +499,27 @@ fn visitFnDecl(c: *Context, fn_decl: *const ZigClangFunctionDecl) Error!void {
500499
501500 const mangled_param_name = try block_scope.makeMangledName(c, param_name);
502501
502 const c_param = ZigClangFunctionDecl_getParamDecl(fn_decl, param_id);
503 const qual_type = ZigClangParmVarDecl_getOriginalType(c_param);
504 const is_const = ZigClangQualType_isConstQualified(qual_type);
505
503506 const arg_name = blk: {
504 const bare_arg_name = try std.fmt.allocPrint(c.a(), "arg_{}", .{mangled_param_name});
507 const param_prefix = if (is_const) "" else "arg_";
508 const bare_arg_name = try std.fmt.allocPrint(c.a(), "{}{}", .{param_prefix, mangled_param_name});
505509 break :blk try block_scope.makeMangledName(c, bare_arg_name);
506510 };
507511
508 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
509 node.eq_token = try appendToken(c, .Equal, "=");
510 node.init_node = try transCreateNodeIdentifier(c, arg_name);
511 node.semicolon_token = try appendToken(c, .Semicolon, ";");
512 try block_node.statements.push(&node.base);
513 param.name_token = try appendIdentifier(c, arg_name);
514 _ = try appendToken(c, .Colon, ":");
512 if (!is_const) {
513 const node = try transCreateNodeVarDecl(c, false, false, mangled_param_name);
514 node.eq_token = try appendToken(c, .Equal, "=");
515 node.init_node = try transCreateNodeIdentifier(c, arg_name);
516 node.semicolon_token = try appendToken(c, .Semicolon, ";");
517 try block_node.statements.push(&node.base);
518 param.name_token = try appendIdentifier(c, arg_name);
519 _ = try appendToken(c, .Colon, ":");
520 }
521
522 param_id += 1;
515523 }
516524
517525 transCompoundStmtInline(rp, &block_scope.base, @ptrCast(*const ZigClangCompoundStmt, body_stmt), block_node) catch |err| switch (err) {
......@@ -877,25 +885,23 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
877885 // types, while that's not ISO-C compliant many compilers allow this and
878886 // default to the usual integer type used for all the enums.
879887
880 // TODO only emit this tag type if the enum tag type is not the default.
881 // I don't know what the default is, need to figure out how clang is deciding.
882 // it appears to at least be different across gcc/msvc
883 if (int_type.ptr != null and
884 !isCBuiltinType(int_type, .UInt) and
885 !isCBuiltinType(int_type, .Int))
886 {
887 _ = try appendToken(c, .LParen, "(");
888 container_node.init_arg_expr = .{
889 .Type = transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
888 // default to c_int since msvc and gcc default to different types
889 _ = try appendToken(c, .LParen, "(");
890 container_node.init_arg_expr = .{
891 .Type = if (int_type.ptr != null and
892 !isCBuiltinType(int_type, .UInt) and
893 !isCBuiltinType(int_type, .Int))
894 transQualType(rp, int_type, enum_loc) catch |err| switch (err) {
890895 error.UnsupportedType => {
891896 try failDecl(c, enum_loc, name, "unable to translate enum tag type", .{});
892897 return null;
893898 },
894899 else => |e| return e,
895 },
896 };
897 _ = try appendToken(c, .RParen, ")");
898 }
900 }
901 else
902 try transCreateNodeIdentifier(c, "c_int"),
903 };
904 _ = try appendToken(c, .RParen, ")");
899905
900906 container_node.lbrace_token = try appendToken(c, .LBrace, "{");
901907
......@@ -953,6 +959,19 @@ fn transEnumDecl(c: *Context, enum_decl: *const ZigClangEnumDecl) Error!?*ast.No
953959 tld_node.semicolon_token = try appendToken(c, .Semicolon, ";");
954960 try addTopLevelDecl(c, field_name, &tld_node.base);
955961 }
962 // make non exhaustive
963 const field_node = try c.a().create(ast.Node.ContainerField);
964 field_node.* = .{
965 .doc_comments = null,
966 .comptime_token = null,
967 .name_token = try appendIdentifier(c, "_"),
968 .type_expr = null,
969 .value_expr = null,
970 .align_expr = null,
971 };
972
973 try container_node.fields_and_decls.push(&field_node.base);
974 _ = try appendToken(c, .Comma, ",");
956975 container_node.rbrace_token = try appendToken(c, .RBrace, "}");
957976
958977 break :blk &container_node.base;
......@@ -1231,18 +1250,6 @@ fn transBinaryOperator(
12311250 op_id = .BitOr;
12321251 op_token = try appendToken(rp.c, .Pipe, "|");
12331252 },
1234 .Assign,
1235 .MulAssign,
1236 .DivAssign,
1237 .RemAssign,
1238 .AddAssign,
1239 .SubAssign,
1240 .ShlAssign,
1241 .ShrAssign,
1242 .AndAssign,
1243 .XorAssign,
1244 .OrAssign,
1245 => unreachable,
12461253 else => unreachable,
12471254 }
12481255
......@@ -1678,7 +1685,6 @@ fn transStringLiteral(
16781685 "TODO: support string literal kind {}",
16791686 .{kind},
16801687 ),
1681 else => unreachable,
16821688 }
16831689}
16841690
......@@ -1986,7 +1992,8 @@ fn transInitListExprArray(
19861992 const arr_type = ZigClangType_getAsArrayTypeUnsafe(ty);
19871993 const child_qt = ZigClangArrayType_getElementType(arr_type);
19881994 const init_count = ZigClangInitListExpr_getNumInits(expr);
1989 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, ty);
1995 assert(ZigClangType_isConstantArrayType(@ptrCast(*const ZigClangType, arr_type)));
1996 const const_arr_ty = @ptrCast(*const ZigClangConstantArrayType, arr_type);
19901997 const size_ap_int = ZigClangConstantArrayType_getSize(const_arr_ty);
19911998 const all_count = ZigClangAPInt_getLimitedValue(size_ap_int, math.maxInt(usize));
19921999 const leftover_count = all_count - init_count;
......@@ -2206,6 +2213,19 @@ fn transDoWhileLoop(
22062213 .id = .Loop,
22072214 };
22082215
2216 // if (!cond) break;
2217 const if_node = try transCreateNodeIf(rp.c);
2218 var cond_scope = Scope{
2219 .parent = scope,
2220 .id = .Condition,
2221 };
2222 const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
2223 prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
2224 _ = try appendToken(rp.c, .RParen, ")");
2225 if_node.condition = &prefix_op.base;
2226 if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
2227 _ = try appendToken(rp.c, .Semicolon, ";");
2228
22092229 const body_node = if (ZigClangStmt_getStmtClass(ZigClangDoStmt_getBody(stmt)) == .CompoundStmtClass) blk: {
22102230 // there's already a block in C, so we'll append our condition to it.
22112231 // c: do {
......@@ -2217,10 +2237,7 @@ fn transDoWhileLoop(
22172237 // zig: b;
22182238 // zig: if (!cond) break;
22192239 // zig: }
2220 const body = (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;
2221 // if this is used as an expression in Zig it needs to be immediately followed by a semicolon
2222 _ = try appendToken(rp.c, .Semicolon, ";");
2223 break :blk body;
2240 break :blk (try transStmt(rp, &loop_scope, ZigClangDoStmt_getBody(stmt), .unused, .r_value)).cast(ast.Node.Block).?;
22242241 } else blk: {
22252242 // the C statement is without a block, so we need to create a block to contain it.
22262243 // c: do
......@@ -2236,19 +2253,6 @@ fn transDoWhileLoop(
22362253 break :blk block;
22372254 };
22382255
2239 // if (!cond) break;
2240 const if_node = try transCreateNodeIf(rp.c);
2241 var cond_scope = Scope{
2242 .parent = scope,
2243 .id = .Condition,
2244 };
2245 const prefix_op = try transCreateNodePrefixOp(rp.c, .BoolNot, .Bang, "!");
2246 prefix_op.rhs = try transBoolExpr(rp, &cond_scope, @ptrCast(*const ZigClangExpr, ZigClangDoStmt_getCond(stmt)), .used, .r_value, true);
2247 _ = try appendToken(rp.c, .RParen, ")");
2248 if_node.condition = &prefix_op.base;
2249 if_node.body = &(try transCreateNodeBreak(rp.c, null)).base;
2250 _ = try appendToken(rp.c, .Semicolon, ";");
2251
22522256 try body_node.statements.push(&if_node.base);
22532257 if (new)
22542258 body_node.rbrace = try appendToken(rp.c, .RBrace, "}");
......@@ -4783,8 +4787,7 @@ fn appendIdentifier(c: *Context, name: []const u8) !ast.TokenIndex {
47834787fn transCreateNodeIdentifier(c: *Context, name: []const u8) !*ast.Node {
47844788 const token_index = try appendIdentifier(c, name);
47854789 const identifier = try c.a().create(ast.Node.Identifier);
4786 identifier.* = ast.Node.Identifier{
4787 .base = ast.Node{ .id = ast.Node.Id.Identifier },
4790 identifier.* = .{
47884791 .token = token_index,
47894792 };
47904793 return &identifier.base;
......@@ -4923,8 +4926,7 @@ fn transMacroFnDefine(c: *Context, it: *ctok.TokenList.Iterator, name: []const u
49234926
49244927 const token_index = try appendToken(c, .Keyword_var, "var");
49254928 const identifier = try c.a().create(ast.Node.Identifier);
4926 identifier.* = ast.Node.Identifier{
4927 .base = ast.Node{ .id = ast.Node.Id.Identifier },
4929 identifier.* = .{
49284930 .token = token_index,
49294931 };
49304932
src/all_types.hpp+1383-908
......@@ -33,12 +33,15 @@ struct BuiltinFnEntry;
3333struct TypeStructField;
3434struct CodeGen;
3535struct ZigValue;
36struct IrInstruction;
37struct IrInstructionCast;
38struct IrInstructionAllocaGen;
39struct IrInstructionCallGen;
40struct IrInstructionAwaitGen;
41struct IrBasicBlock;
36struct IrInst;
37struct IrInstSrc;
38struct IrInstGen;
39struct IrInstGenCast;
40struct IrInstGenAlloca;
41struct IrInstGenCall;
42struct IrInstGenAwait;
43struct IrBasicBlockSrc;
44struct IrBasicBlockGen;
4245struct ScopeDecls;
4346struct ZigWindowsSDK;
4447struct Tld;
......@@ -50,6 +53,7 @@ struct ResultLocPeerParent;
5053struct ResultLocBitCast;
5154struct ResultLocCast;
5255struct ResultLocReturn;
56struct IrExecutableGen;
5357
5458enum PtrLen {
5559 PtrLenUnknown,
......@@ -97,8 +101,8 @@ enum X64CABIClass {
97101 X64CABIClass_SSE,
98102};
99103
100struct IrExecutable {
101 ZigList<IrBasicBlock *> basic_block_list;
104struct IrExecutableSrc {
105 ZigList<IrBasicBlockSrc *> basic_block_list;
102106 Buf *name;
103107 ZigFn *name_fn;
104108 size_t mem_slot_count;
......@@ -108,8 +112,7 @@ struct IrExecutable {
108112 ZigFn *fn_entry;
109113 Buf *c_import_buf;
110114 AstNode *source_node;
111 IrExecutable *parent_exec;
112 IrExecutable *source_exec;
115 IrExecutableGen *parent_exec;
113116 IrAnalyze *analysis;
114117 Scope *begin_scope;
115118 ErrorMsg *first_err_trace_msg;
......@@ -124,6 +127,32 @@ struct IrExecutable {
124127 void src();
125128};
126129
130struct IrExecutableGen {
131 ZigList<IrBasicBlockGen *> basic_block_list;
132 Buf *name;
133 ZigFn *name_fn;
134 size_t mem_slot_count;
135 size_t next_debug_id;
136 size_t *backward_branch_count;
137 size_t *backward_branch_quota;
138 ZigFn *fn_entry;
139 Buf *c_import_buf;
140 AstNode *source_node;
141 IrExecutableGen *parent_exec;
142 IrExecutableSrc *source_exec;
143 Scope *begin_scope;
144 ErrorMsg *first_err_trace_msg;
145 ZigList<Tld *> tld_list;
146
147 bool is_inline;
148 bool is_generic_instantiation;
149 bool need_err_code_spill;
150
151 // This is a function for use in the debugger to print
152 // the source location.
153 void src();
154};
155
127156enum OutType {
128157 OutTypeUnknown,
129158 OutTypeExe,
......@@ -287,7 +316,7 @@ struct ConstErrValue {
287316
288317struct ConstBoundFnValue {
289318 ZigFn *fn;
290 IrInstruction *first_arg;
319 IrInstGen *first_arg;
291320};
292321
293322struct ConstArgTuple {
......@@ -350,14 +379,14 @@ struct LazyValueAlignOf {
350379 LazyValue base;
351380
352381 IrAnalyze *ira;
353 IrInstruction *target_type;
382 IrInstGen *target_type;
354383};
355384
356385struct LazyValueSizeOf {
357386 LazyValue base;
358387
359388 IrAnalyze *ira;
360 IrInstruction *target_type;
389 IrInstGen *target_type;
361390
362391 bool bit_size;
363392};
......@@ -366,9 +395,9 @@ struct LazyValueSliceType {
366395 LazyValue base;
367396
368397 IrAnalyze *ira;
369 IrInstruction *sentinel; // can be null
370 IrInstruction *elem_type;
371 IrInstruction *align_inst; // can be null
398 IrInstGen *sentinel; // can be null
399 IrInstGen *elem_type;
400 IrInstGen *align_inst; // can be null
372401
373402 bool is_const;
374403 bool is_volatile;
......@@ -379,8 +408,8 @@ struct LazyValueArrayType {
379408 LazyValue base;
380409
381410 IrAnalyze *ira;
382 IrInstruction *sentinel; // can be null
383 IrInstruction *elem_type;
411 IrInstGen *sentinel; // can be null
412 IrInstGen *elem_type;
384413 uint64_t length;
385414};
386415
......@@ -388,9 +417,9 @@ struct LazyValuePtrType {
388417 LazyValue base;
389418
390419 IrAnalyze *ira;
391 IrInstruction *sentinel; // can be null
392 IrInstruction *elem_type;
393 IrInstruction *align_inst; // can be null
420 IrInstGen *sentinel; // can be null
421 IrInstGen *elem_type;
422 IrInstGen *align_inst; // can be null
394423
395424 PtrLen ptr_len;
396425 uint32_t bit_offset_in_host;
......@@ -405,7 +434,7 @@ struct LazyValueOptType {
405434 LazyValue base;
406435
407436 IrAnalyze *ira;
408 IrInstruction *payload_type;
437 IrInstGen *payload_type;
409438};
410439
411440struct LazyValueFnType {
......@@ -413,9 +442,9 @@ struct LazyValueFnType {
413442
414443 IrAnalyze *ira;
415444 AstNode *proto_node;
416 IrInstruction **param_types;
417 IrInstruction *align_inst; // can be null
418 IrInstruction *return_type;
445 IrInstGen **param_types;
446 IrInstGen *align_inst; // can be null
447 IrInstGen *return_type;
419448
420449 CallingConvention cc;
421450 bool is_generic;
......@@ -425,8 +454,8 @@ struct LazyValueErrUnionType {
425454 LazyValue base;
426455
427456 IrAnalyze *ira;
428 IrInstruction *err_set_type;
429 IrInstruction *payload_type;
457 IrInstGen *err_set_type;
458 IrInstGen *payload_type;
430459 Buf *type_name;
431460};
432461
......@@ -1389,6 +1418,7 @@ struct ZigTypeEnum {
13891418 ContainerLayout layout;
13901419 ResolveStatus resolve_status;
13911420
1421 bool non_exhaustive;
13921422 bool resolve_loop_flag;
13931423};
13941424
......@@ -1605,19 +1635,19 @@ struct ZigFn {
16051635 // in the case of async functions this is the implicit return type according to the
16061636 // zig source code, not according to zig ir
16071637 ZigType *src_implicit_return_type;
1608 IrExecutable *ir_executable;
1609 IrExecutable analyzed_executable;
1638 IrExecutableSrc *ir_executable;
1639 IrExecutableGen analyzed_executable;
16101640 size_t prealloc_bbc;
16111641 size_t prealloc_backward_branch_quota;
16121642 AstNode **param_source_nodes;
16131643 Buf **param_names;
1614 IrInstruction *err_code_spill;
1644 IrInstGen *err_code_spill;
16151645 AstNode *assumed_non_async;
16161646
16171647 AstNode *fn_no_inline_set_node;
16181648 AstNode *fn_static_eval_set_node;
16191649
1620 ZigList<IrInstructionAllocaGen *> alloca_gen_list;
1650 ZigList<IrInstGenAlloca *> alloca_gen_list;
16211651 ZigList<ZigVar *> variable_list;
16221652
16231653 Buf *section_name;
......@@ -1629,8 +1659,8 @@ struct ZigFn {
16291659 AstNode *non_async_node;
16301660
16311661 ZigList<GlobalExport> export_list;
1632 ZigList<IrInstructionCallGen *> call_list;
1633 ZigList<IrInstructionAwaitGen *> await_list;
1662 ZigList<IrInstGenCall *> call_list;
1663 ZigList<IrInstGenAwait *> await_list;
16341664
16351665 LLVMValueRef valgrind_client_request_array;
16361666
......@@ -2101,8 +2131,9 @@ struct CodeGen {
21012131 Buf *zig_c_headers_dir; // Cannot be overridden; derived from zig_lib_dir.
21022132 Buf *zig_std_special_dir; // Cannot be overridden; derived from zig_lib_dir.
21032133
2104 IrInstruction *invalid_instruction;
2105 IrInstruction *unreach_instruction;
2134 IrInstSrc *invalid_inst_src;
2135 IrInstGen *invalid_inst_gen;
2136 IrInstGen *unreach_instruction;
21062137
21072138 ZigValue panic_msg_vals[PanicMsgIdCount];
21082139
......@@ -2147,6 +2178,7 @@ struct CodeGen {
21472178 bool verbose_llvm_ir;
21482179 bool verbose_cimport;
21492180 bool verbose_cc;
2181 bool verbose_llvm_cpu_features;
21502182 bool error_during_imports;
21512183 bool generate_error_name_table;
21522184 bool enable_cache; // mutually exclusive with output_dir
......@@ -2225,8 +2257,8 @@ struct ZigVar {
22252257 ZigValue *const_value;
22262258 ZigType *var_type;
22272259 LLVMValueRef value_ref;
2228 IrInstruction *is_comptime;
2229 IrInstruction *ptr_instruction;
2260 IrInstSrc *is_comptime;
2261 IrInstGen *ptr_instruction;
22302262 // which node is the declaration of the variable
22312263 AstNode *decl_node;
22322264 ZigLLVMDILocalVariable *di_loc_var;
......@@ -2234,7 +2266,7 @@ struct ZigVar {
22342266 Scope *parent_scope;
22352267 Scope *child_scope;
22362268 LLVMValueRef param_value_ref;
2237 IrExecutable *owner_exec;
2269 IrExecutableSrc *owner_exec;
22382270
22392271 Buf *section_name;
22402272
......@@ -2325,11 +2357,11 @@ struct ScopeBlock {
23252357 Scope base;
23262358
23272359 Buf *name;
2328 IrBasicBlock *end_block;
2329 IrInstruction *is_comptime;
2360 IrBasicBlockSrc *end_block;
2361 IrInstSrc *is_comptime;
23302362 ResultLocPeerParent *peer_parent;
2331 ZigList<IrInstruction *> *incoming_values;
2332 ZigList<IrBasicBlock *> *incoming_blocks;
2363 ZigList<IrInstSrc *> *incoming_values;
2364 ZigList<IrBasicBlockSrc *> *incoming_blocks;
23332365
23342366 AstNode *safety_set_node;
23352367 AstNode *fast_math_set_node;
......@@ -2380,11 +2412,11 @@ struct ScopeLoop {
23802412
23812413 LVal lval;
23822414 Buf *name;
2383 IrBasicBlock *break_block;
2384 IrBasicBlock *continue_block;
2385 IrInstruction *is_comptime;
2386 ZigList<IrInstruction *> *incoming_values;
2387 ZigList<IrBasicBlock *> *incoming_blocks;
2415 IrBasicBlockSrc *break_block;
2416 IrBasicBlockSrc *continue_block;
2417 IrInstSrc *is_comptime;
2418 ZigList<IrInstSrc *> *incoming_values;
2419 ZigList<IrBasicBlockSrc *> *incoming_blocks;
23882420 ResultLocPeerParent *peer_parent;
23892421 ScopeExpr *spill_scope;
23902422};
......@@ -2395,7 +2427,7 @@ struct ScopeLoop {
23952427struct ScopeRuntime {
23962428 Scope base;
23972429
2398 IrInstruction *is_comptime;
2430 IrInstSrc *is_comptime;
23992431};
24002432
24012433// This scope is created for a suspend block in order to have labeled
......@@ -2474,319 +2506,450 @@ enum AtomicRmwOp {
24742506// to another basic block.
24752507// Phi instructions must be first in a basic block.
24762508// The last instruction in a basic block must be of type unreachable.
2477struct IrBasicBlock {
2478 ZigList<IrInstruction *> instruction_list;
2479 IrBasicBlock *other;
2509struct IrBasicBlockSrc {
2510 ZigList<IrInstSrc *> instruction_list;
2511 IrBasicBlockGen *child;
2512 Scope *scope;
2513 const char *name_hint;
2514 IrInst *suspend_instruction_ref;
2515
2516 uint32_t ref_count;
2517 uint32_t index; // index into the basic block list
2518
2519 uint32_t debug_id;
2520 bool suspended;
2521 bool in_resume_stack;
2522};
2523
2524struct IrBasicBlockGen {
2525 ZigList<IrInstGen *> instruction_list;
2526 IrBasicBlockSrc *parent;
24802527 Scope *scope;
24812528 const char *name_hint;
2482 size_t debug_id;
2483 size_t ref_count;
2484 // index into the basic block list
2485 size_t index;
2529 uint32_t index; // index into the basic block list
2530 uint32_t ref_count;
24862531 LLVMBasicBlockRef llvm_block;
24872532 LLVMBasicBlockRef llvm_exit_block;
24882533 // The instruction that referenced this basic block and caused us to
24892534 // analyze the basic block. If the same instruction wants us to emit
24902535 // the same basic block, then we re-generate it instead of saving it.
2491 IrInstruction *ref_instruction;
2536 IrInst *ref_instruction;
24922537 // When this is non-null, a branch to this basic block is only allowed
24932538 // if the branch is comptime. The instruction points to the reason
24942539 // the basic block must be comptime.
2495 IrInstruction *must_be_comptime_source_instr;
2496 IrInstruction *suspend_instruction_ref;
2540 IrInst *must_be_comptime_source_instr;
2541
2542 uint32_t debug_id;
24972543 bool already_appended;
2498 bool suspended;
2499 bool in_resume_stack;
25002544};
25012545
2502// These instructions are in transition to having "pass 1" instructions
2503// and "pass 2" instructions. The pass 1 instructions are suffixed with Src
2504// and pass 2 are suffixed with Gen.
2505// Once all instructions are separated in this way, they'll have different
2506// base types for better type safety.
25072546// Src instructions are generated by ir_gen_* functions in ir.cpp from AST.
25082547// ir_analyze_* functions consume Src instructions and produce Gen instructions.
2548// Src instructions do not have type information; Gen instructions do.
2549enum IrInstSrcId {
2550 IrInstSrcIdInvalid,
2551 IrInstSrcIdDeclVar,
2552 IrInstSrcIdBr,
2553 IrInstSrcIdCondBr,
2554 IrInstSrcIdSwitchBr,
2555 IrInstSrcIdSwitchVar,
2556 IrInstSrcIdSwitchElseVar,
2557 IrInstSrcIdSwitchTarget,
2558 IrInstSrcIdPhi,
2559 IrInstSrcIdUnOp,
2560 IrInstSrcIdBinOp,
2561 IrInstSrcIdMergeErrSets,
2562 IrInstSrcIdLoadPtr,
2563 IrInstSrcIdStorePtr,
2564 IrInstSrcIdFieldPtr,
2565 IrInstSrcIdElemPtr,
2566 IrInstSrcIdVarPtr,
2567 IrInstSrcIdCall,
2568 IrInstSrcIdCallArgs,
2569 IrInstSrcIdCallExtra,
2570 IrInstSrcIdConst,
2571 IrInstSrcIdReturn,
2572 IrInstSrcIdContainerInitList,
2573 IrInstSrcIdContainerInitFields,
2574 IrInstSrcIdUnreachable,
2575 IrInstSrcIdTypeOf,
2576 IrInstSrcIdSetCold,
2577 IrInstSrcIdSetRuntimeSafety,
2578 IrInstSrcIdSetFloatMode,
2579 IrInstSrcIdArrayType,
2580 IrInstSrcIdAnyFrameType,
2581 IrInstSrcIdSliceType,
2582 IrInstSrcIdAsm,
2583 IrInstSrcIdSizeOf,
2584 IrInstSrcIdTestNonNull,
2585 IrInstSrcIdOptionalUnwrapPtr,
2586 IrInstSrcIdClz,
2587 IrInstSrcIdCtz,
2588 IrInstSrcIdPopCount,
2589 IrInstSrcIdBswap,
2590 IrInstSrcIdBitReverse,
2591 IrInstSrcIdImport,
2592 IrInstSrcIdCImport,
2593 IrInstSrcIdCInclude,
2594 IrInstSrcIdCDefine,
2595 IrInstSrcIdCUndef,
2596 IrInstSrcIdRef,
2597 IrInstSrcIdCompileErr,
2598 IrInstSrcIdCompileLog,
2599 IrInstSrcIdErrName,
2600 IrInstSrcIdEmbedFile,
2601 IrInstSrcIdCmpxchg,
2602 IrInstSrcIdFence,
2603 IrInstSrcIdTruncate,
2604 IrInstSrcIdIntCast,
2605 IrInstSrcIdFloatCast,
2606 IrInstSrcIdIntToFloat,
2607 IrInstSrcIdFloatToInt,
2608 IrInstSrcIdBoolToInt,
2609 IrInstSrcIdIntType,
2610 IrInstSrcIdVectorType,
2611 IrInstSrcIdShuffleVector,
2612 IrInstSrcIdSplat,
2613 IrInstSrcIdBoolNot,
2614 IrInstSrcIdMemset,
2615 IrInstSrcIdMemcpy,
2616 IrInstSrcIdSlice,
2617 IrInstSrcIdMemberCount,
2618 IrInstSrcIdMemberType,
2619 IrInstSrcIdMemberName,
2620 IrInstSrcIdBreakpoint,
2621 IrInstSrcIdReturnAddress,
2622 IrInstSrcIdFrameAddress,
2623 IrInstSrcIdFrameHandle,
2624 IrInstSrcIdFrameType,
2625 IrInstSrcIdFrameSize,
2626 IrInstSrcIdAlignOf,
2627 IrInstSrcIdOverflowOp,
2628 IrInstSrcIdTestErr,
2629 IrInstSrcIdMulAdd,
2630 IrInstSrcIdFloatOp,
2631 IrInstSrcIdUnwrapErrCode,
2632 IrInstSrcIdUnwrapErrPayload,
2633 IrInstSrcIdFnProto,
2634 IrInstSrcIdTestComptime,
2635 IrInstSrcIdPtrCast,
2636 IrInstSrcIdBitCast,
2637 IrInstSrcIdIntToPtr,
2638 IrInstSrcIdPtrToInt,
2639 IrInstSrcIdIntToEnum,
2640 IrInstSrcIdEnumToInt,
2641 IrInstSrcIdIntToErr,
2642 IrInstSrcIdErrToInt,
2643 IrInstSrcIdCheckSwitchProngs,
2644 IrInstSrcIdCheckStatementIsVoid,
2645 IrInstSrcIdTypeName,
2646 IrInstSrcIdDeclRef,
2647 IrInstSrcIdPanic,
2648 IrInstSrcIdTagName,
2649 IrInstSrcIdTagType,
2650 IrInstSrcIdFieldParentPtr,
2651 IrInstSrcIdByteOffsetOf,
2652 IrInstSrcIdBitOffsetOf,
2653 IrInstSrcIdTypeInfo,
2654 IrInstSrcIdType,
2655 IrInstSrcIdHasField,
2656 IrInstSrcIdTypeId,
2657 IrInstSrcIdSetEvalBranchQuota,
2658 IrInstSrcIdPtrType,
2659 IrInstSrcIdAlignCast,
2660 IrInstSrcIdImplicitCast,
2661 IrInstSrcIdResolveResult,
2662 IrInstSrcIdResetResult,
2663 IrInstSrcIdOpaqueType,
2664 IrInstSrcIdSetAlignStack,
2665 IrInstSrcIdArgType,
2666 IrInstSrcIdExport,
2667 IrInstSrcIdErrorReturnTrace,
2668 IrInstSrcIdErrorUnion,
2669 IrInstSrcIdAtomicRmw,
2670 IrInstSrcIdAtomicLoad,
2671 IrInstSrcIdAtomicStore,
2672 IrInstSrcIdSaveErrRetAddr,
2673 IrInstSrcIdAddImplicitReturnType,
2674 IrInstSrcIdErrSetCast,
2675 IrInstSrcIdToBytes,
2676 IrInstSrcIdFromBytes,
2677 IrInstSrcIdCheckRuntimeScope,
2678 IrInstSrcIdHasDecl,
2679 IrInstSrcIdUndeclaredIdent,
2680 IrInstSrcIdAlloca,
2681 IrInstSrcIdEndExpr,
2682 IrInstSrcIdUnionInitNamedField,
2683 IrInstSrcIdSuspendBegin,
2684 IrInstSrcIdSuspendFinish,
2685 IrInstSrcIdAwait,
2686 IrInstSrcIdResume,
2687 IrInstSrcIdSpillBegin,
2688 IrInstSrcIdSpillEnd,
2689};
2690
25092691// ir_render_* functions in codegen.cpp consume Gen instructions and produce LLVM IR.
25102692// Src instructions do not have type information; Gen instructions do.
2511enum IrInstructionId {
2512 IrInstructionIdInvalid,
2513 IrInstructionIdDeclVarSrc,
2514 IrInstructionIdDeclVarGen,
2515 IrInstructionIdBr,
2516 IrInstructionIdCondBr,
2517 IrInstructionIdSwitchBr,
2518 IrInstructionIdSwitchVar,
2519 IrInstructionIdSwitchElseVar,
2520 IrInstructionIdSwitchTarget,
2521 IrInstructionIdPhi,
2522 IrInstructionIdUnOp,
2523 IrInstructionIdBinOp,
2524 IrInstructionIdMergeErrSets,
2525 IrInstructionIdLoadPtr,
2526 IrInstructionIdLoadPtrGen,
2527 IrInstructionIdStorePtr,
2528 IrInstructionIdVectorStoreElem,
2529 IrInstructionIdFieldPtr,
2530 IrInstructionIdStructFieldPtr,
2531 IrInstructionIdUnionFieldPtr,
2532 IrInstructionIdElemPtr,
2533 IrInstructionIdVarPtr,
2534 IrInstructionIdReturnPtr,
2535 IrInstructionIdCallSrc,
2536 IrInstructionIdCallSrcArgs,
2537 IrInstructionIdCallExtra,
2538 IrInstructionIdCallGen,
2539 IrInstructionIdConst,
2540 IrInstructionIdReturn,
2541 IrInstructionIdCast,
2542 IrInstructionIdResizeSlice,
2543 IrInstructionIdContainerInitList,
2544 IrInstructionIdContainerInitFields,
2545 IrInstructionIdUnreachable,
2546 IrInstructionIdTypeOf,
2547 IrInstructionIdSetCold,
2548 IrInstructionIdSetRuntimeSafety,
2549 IrInstructionIdSetFloatMode,
2550 IrInstructionIdArrayType,
2551 IrInstructionIdAnyFrameType,
2552 IrInstructionIdSliceType,
2553 IrInstructionIdAsmSrc,
2554 IrInstructionIdAsmGen,
2555 IrInstructionIdSizeOf,
2556 IrInstructionIdTestNonNull,
2557 IrInstructionIdOptionalUnwrapPtr,
2558 IrInstructionIdOptionalWrap,
2559 IrInstructionIdUnionTag,
2560 IrInstructionIdClz,
2561 IrInstructionIdCtz,
2562 IrInstructionIdPopCount,
2563 IrInstructionIdBswap,
2564 IrInstructionIdBitReverse,
2565 IrInstructionIdImport,
2566 IrInstructionIdCImport,
2567 IrInstructionIdCInclude,
2568 IrInstructionIdCDefine,
2569 IrInstructionIdCUndef,
2570 IrInstructionIdRef,
2571 IrInstructionIdRefGen,
2572 IrInstructionIdCompileErr,
2573 IrInstructionIdCompileLog,
2574 IrInstructionIdErrName,
2575 IrInstructionIdEmbedFile,
2576 IrInstructionIdCmpxchgSrc,
2577 IrInstructionIdCmpxchgGen,
2578 IrInstructionIdFence,
2579 IrInstructionIdTruncate,
2580 IrInstructionIdIntCast,
2581 IrInstructionIdFloatCast,
2582 IrInstructionIdIntToFloat,
2583 IrInstructionIdFloatToInt,
2584 IrInstructionIdBoolToInt,
2585 IrInstructionIdIntType,
2586 IrInstructionIdVectorType,
2587 IrInstructionIdShuffleVector,
2588 IrInstructionIdSplatSrc,
2589 IrInstructionIdSplatGen,
2590 IrInstructionIdBoolNot,
2591 IrInstructionIdMemset,
2592 IrInstructionIdMemcpy,
2593 IrInstructionIdSliceSrc,
2594 IrInstructionIdSliceGen,
2595 IrInstructionIdMemberCount,
2596 IrInstructionIdMemberType,
2597 IrInstructionIdMemberName,
2598 IrInstructionIdBreakpoint,
2599 IrInstructionIdReturnAddress,
2600 IrInstructionIdFrameAddress,
2601 IrInstructionIdFrameHandle,
2602 IrInstructionIdFrameType,
2603 IrInstructionIdFrameSizeSrc,
2604 IrInstructionIdFrameSizeGen,
2605 IrInstructionIdAlignOf,
2606 IrInstructionIdOverflowOp,
2607 IrInstructionIdTestErrSrc,
2608 IrInstructionIdTestErrGen,
2609 IrInstructionIdMulAdd,
2610 IrInstructionIdFloatOp,
2611 IrInstructionIdUnwrapErrCode,
2612 IrInstructionIdUnwrapErrPayload,
2613 IrInstructionIdErrWrapCode,
2614 IrInstructionIdErrWrapPayload,
2615 IrInstructionIdFnProto,
2616 IrInstructionIdTestComptime,
2617 IrInstructionIdPtrCastSrc,
2618 IrInstructionIdPtrCastGen,
2619 IrInstructionIdBitCastSrc,
2620 IrInstructionIdBitCastGen,
2621 IrInstructionIdWidenOrShorten,
2622 IrInstructionIdIntToPtr,
2623 IrInstructionIdPtrToInt,
2624 IrInstructionIdIntToEnum,
2625 IrInstructionIdEnumToInt,
2626 IrInstructionIdIntToErr,
2627 IrInstructionIdErrToInt,
2628 IrInstructionIdCheckSwitchProngs,
2629 IrInstructionIdCheckStatementIsVoid,
2630 IrInstructionIdTypeName,
2631 IrInstructionIdDeclRef,
2632 IrInstructionIdPanic,
2633 IrInstructionIdTagName,
2634 IrInstructionIdTagType,
2635 IrInstructionIdFieldParentPtr,
2636 IrInstructionIdByteOffsetOf,
2637 IrInstructionIdBitOffsetOf,
2638 IrInstructionIdTypeInfo,
2639 IrInstructionIdType,
2640 IrInstructionIdHasField,
2641 IrInstructionIdTypeId,
2642 IrInstructionIdSetEvalBranchQuota,
2643 IrInstructionIdPtrType,
2644 IrInstructionIdAlignCast,
2645 IrInstructionIdImplicitCast,
2646 IrInstructionIdResolveResult,
2647 IrInstructionIdResetResult,
2648 IrInstructionIdOpaqueType,
2649 IrInstructionIdSetAlignStack,
2650 IrInstructionIdArgType,
2651 IrInstructionIdExport,
2652 IrInstructionIdErrorReturnTrace,
2653 IrInstructionIdErrorUnion,
2654 IrInstructionIdAtomicRmw,
2655 IrInstructionIdAtomicLoad,
2656 IrInstructionIdAtomicStore,
2657 IrInstructionIdSaveErrRetAddr,
2658 IrInstructionIdAddImplicitReturnType,
2659 IrInstructionIdErrSetCast,
2660 IrInstructionIdToBytes,
2661 IrInstructionIdFromBytes,
2662 IrInstructionIdCheckRuntimeScope,
2663 IrInstructionIdVectorToArray,
2664 IrInstructionIdArrayToVector,
2665 IrInstructionIdAssertZero,
2666 IrInstructionIdAssertNonNull,
2667 IrInstructionIdHasDecl,
2668 IrInstructionIdUndeclaredIdent,
2669 IrInstructionIdAllocaSrc,
2670 IrInstructionIdAllocaGen,
2671 IrInstructionIdEndExpr,
2672 IrInstructionIdPtrOfArrayToSlice,
2673 IrInstructionIdUnionInitNamedField,
2674 IrInstructionIdSuspendBegin,
2675 IrInstructionIdSuspendFinish,
2676 IrInstructionIdAwaitSrc,
2677 IrInstructionIdAwaitGen,
2678 IrInstructionIdResume,
2679 IrInstructionIdSpillBegin,
2680 IrInstructionIdSpillEnd,
2681 IrInstructionIdVectorExtractElem,
2682};
2683
2684struct IrInstruction {
2685 Scope *scope;
2686 AstNode *source_node;
2687 LLVMValueRef llvm_value;
2688 ZigValue *value;
2689 uint32_t debug_id;
2693enum IrInstGenId {
2694 IrInstGenIdInvalid,
2695 IrInstGenIdDeclVar,
2696 IrInstGenIdBr,
2697 IrInstGenIdCondBr,
2698 IrInstGenIdSwitchBr,
2699 IrInstGenIdPhi,
2700 IrInstGenIdBinaryNot,
2701 IrInstGenIdNegation,
2702 IrInstGenIdNegationWrapping,
2703 IrInstGenIdBinOp,
2704 IrInstGenIdLoadPtr,
2705 IrInstGenIdStorePtr,
2706 IrInstGenIdVectorStoreElem,
2707 IrInstGenIdStructFieldPtr,
2708 IrInstGenIdUnionFieldPtr,
2709 IrInstGenIdElemPtr,
2710 IrInstGenIdVarPtr,
2711 IrInstGenIdReturnPtr,
2712 IrInstGenIdCall,
2713 IrInstGenIdReturn,
2714 IrInstGenIdCast,
2715 IrInstGenIdResizeSlice,
2716 IrInstGenIdUnreachable,
2717 IrInstGenIdAsm,
2718 IrInstGenIdTestNonNull,
2719 IrInstGenIdOptionalUnwrapPtr,
2720 IrInstGenIdOptionalWrap,
2721 IrInstGenIdUnionTag,
2722 IrInstGenIdClz,
2723 IrInstGenIdCtz,
2724 IrInstGenIdPopCount,
2725 IrInstGenIdBswap,
2726 IrInstGenIdBitReverse,
2727 IrInstGenIdRef,
2728 IrInstGenIdErrName,
2729 IrInstGenIdCmpxchg,
2730 IrInstGenIdFence,
2731 IrInstGenIdTruncate,
2732 IrInstGenIdShuffleVector,
2733 IrInstGenIdSplat,
2734 IrInstGenIdBoolNot,
2735 IrInstGenIdMemset,
2736 IrInstGenIdMemcpy,
2737 IrInstGenIdSlice,
2738 IrInstGenIdBreakpoint,
2739 IrInstGenIdReturnAddress,
2740 IrInstGenIdFrameAddress,
2741 IrInstGenIdFrameHandle,
2742 IrInstGenIdFrameSize,
2743 IrInstGenIdOverflowOp,
2744 IrInstGenIdTestErr,
2745 IrInstGenIdMulAdd,
2746 IrInstGenIdFloatOp,
2747 IrInstGenIdUnwrapErrCode,
2748 IrInstGenIdUnwrapErrPayload,
2749 IrInstGenIdErrWrapCode,
2750 IrInstGenIdErrWrapPayload,
2751 IrInstGenIdPtrCast,
2752 IrInstGenIdBitCast,
2753 IrInstGenIdWidenOrShorten,
2754 IrInstGenIdIntToPtr,
2755 IrInstGenIdPtrToInt,
2756 IrInstGenIdIntToEnum,
2757 IrInstGenIdIntToErr,
2758 IrInstGenIdErrToInt,
2759 IrInstGenIdPanic,
2760 IrInstGenIdTagName,
2761 IrInstGenIdFieldParentPtr,
2762 IrInstGenIdAlignCast,
2763 IrInstGenIdErrorReturnTrace,
2764 IrInstGenIdAtomicRmw,
2765 IrInstGenIdAtomicLoad,
2766 IrInstGenIdAtomicStore,
2767 IrInstGenIdSaveErrRetAddr,
2768 IrInstGenIdVectorToArray,
2769 IrInstGenIdArrayToVector,
2770 IrInstGenIdAssertZero,
2771 IrInstGenIdAssertNonNull,
2772 IrInstGenIdPtrOfArrayToSlice,
2773 IrInstGenIdSuspendBegin,
2774 IrInstGenIdSuspendFinish,
2775 IrInstGenIdAwait,
2776 IrInstGenIdResume,
2777 IrInstGenIdSpillBegin,
2778 IrInstGenIdSpillEnd,
2779 IrInstGenIdVectorExtractElem,
2780 IrInstGenIdAlloca,
2781 IrInstGenIdConst,
2782};
2783
2784// Common fields between IrInstSrc and IrInstGen. This allows future passes
2785// after pass2 to be added to zig.
2786struct IrInst {
26902787 // if ref_count is zero and the instruction has no side effects,
26912788 // the instruction can be omitted in codegen
26922789 uint32_t ref_count;
2790 uint32_t debug_id;
2791
2792 Scope *scope;
2793 AstNode *source_node;
2794
2795 // for debugging purposes, these are useful to call to inspect the instruction
2796 void dump();
2797 void src();
2798};
2799
2800struct IrInstSrc {
2801 IrInst base;
2802
2803 IrInstSrcId id;
2804 // true if this instruction was generated by zig and not from user code
2805 // this matters for the "unreachable code" compile error
2806 bool is_gen;
2807 bool is_noreturn;
2808
26932809 // When analyzing IR, instructions that point to this instruction in the "old ir"
26942810 // can find the instruction that corresponds to this value in the "new ir"
26952811 // with this child field.
2696 IrInstruction *child;
2697 IrBasicBlock *owner_bb;
2812 IrInstGen *child;
2813 IrBasicBlockSrc *owner_bb;
2814
2815 // for debugging purposes, these are useful to call to inspect the instruction
2816 void dump();
2817 void src();
2818};
2819
2820struct IrInstGen {
2821 IrInst base;
2822
2823 IrInstGenId id;
2824
2825 LLVMValueRef llvm_value;
2826 ZigValue *value;
2827 IrBasicBlockGen *owner_bb;
26982828 // Nearly any instruction can have to be stored as a local variable before suspending
26992829 // and then loaded after resuming, in case there is an expression with a suspend point
27002830 // in it, such as: x + await y
2701 IrInstruction *spill;
2702 IrInstructionId id;
2703 // true if this instruction was generated by zig and not from user code
2704 bool is_gen;
2831 IrInstGen *spill;
27052832
27062833 // for debugging purposes, these are useful to call to inspect the instruction
27072834 void dump();
27082835 void src();
27092836};
27102837
2711struct IrInstructionDeclVarSrc {
2712 IrInstruction base;
2838struct IrInstSrcDeclVar {
2839 IrInstSrc base;
27132840
27142841 ZigVar *var;
2715 IrInstruction *var_type;
2716 IrInstruction *align_value;
2717 IrInstruction *ptr;
2842 IrInstSrc *var_type;
2843 IrInstSrc *align_value;
2844 IrInstSrc *ptr;
27182845};
27192846
2720struct IrInstructionDeclVarGen {
2721 IrInstruction base;
2847struct IrInstGenDeclVar {
2848 IrInstGen base;
27222849
27232850 ZigVar *var;
2724 IrInstruction *var_ptr;
2851 IrInstGen *var_ptr;
27252852};
27262853
2727struct IrInstructionCondBr {
2728 IrInstruction base;
2854struct IrInstSrcCondBr {
2855 IrInstSrc base;
27292856
2730 IrInstruction *condition;
2731 IrBasicBlock *then_block;
2732 IrBasicBlock *else_block;
2733 IrInstruction *is_comptime;
2857 IrInstSrc *condition;
2858 IrBasicBlockSrc *then_block;
2859 IrBasicBlockSrc *else_block;
2860 IrInstSrc *is_comptime;
27342861 ResultLoc *result_loc;
27352862};
27362863
2737struct IrInstructionBr {
2738 IrInstruction base;
2864struct IrInstGenCondBr {
2865 IrInstGen base;
2866
2867 IrInstGen *condition;
2868 IrBasicBlockGen *then_block;
2869 IrBasicBlockGen *else_block;
2870};
2871
2872struct IrInstSrcBr {
2873 IrInstSrc base;
2874
2875 IrBasicBlockSrc *dest_block;
2876 IrInstSrc *is_comptime;
2877};
2878
2879struct IrInstGenBr {
2880 IrInstGen base;
2881
2882 IrBasicBlockGen *dest_block;
2883};
2884
2885struct IrInstSrcSwitchBrCase {
2886 IrInstSrc *value;
2887 IrBasicBlockSrc *block;
2888};
2889
2890struct IrInstSrcSwitchBr {
2891 IrInstSrc base;
27392892
2740 IrBasicBlock *dest_block;
2741 IrInstruction *is_comptime;
2893 IrInstSrc *target_value;
2894 IrBasicBlockSrc *else_block;
2895 size_t case_count;
2896 IrInstSrcSwitchBrCase *cases;
2897 IrInstSrc *is_comptime;
2898 IrInstSrc *switch_prongs_void;
27422899};
27432900
2744struct IrInstructionSwitchBrCase {
2745 IrInstruction *value;
2746 IrBasicBlock *block;
2901struct IrInstGenSwitchBrCase {
2902 IrInstGen *value;
2903 IrBasicBlockGen *block;
27472904};
27482905
2749struct IrInstructionSwitchBr {
2750 IrInstruction base;
2906struct IrInstGenSwitchBr {
2907 IrInstGen base;
27512908
2752 IrInstruction *target_value;
2753 IrBasicBlock *else_block;
2909 IrInstGen *target_value;
2910 IrBasicBlockGen *else_block;
27542911 size_t case_count;
2755 IrInstructionSwitchBrCase *cases;
2756 IrInstruction *is_comptime;
2757 IrInstruction *switch_prongs_void;
2912 IrInstGenSwitchBrCase *cases;
27582913};
27592914
2760struct IrInstructionSwitchVar {
2761 IrInstruction base;
2915struct IrInstSrcSwitchVar {
2916 IrInstSrc base;
27622917
2763 IrInstruction *target_value_ptr;
2764 IrInstruction **prongs_ptr;
2918 IrInstSrc *target_value_ptr;
2919 IrInstSrc **prongs_ptr;
27652920 size_t prongs_len;
27662921};
27672922
2768struct IrInstructionSwitchElseVar {
2769 IrInstruction base;
2923struct IrInstSrcSwitchElseVar {
2924 IrInstSrc base;
27702925
2771 IrInstruction *target_value_ptr;
2772 IrInstructionSwitchBr *switch_br;
2926 IrInstSrc *target_value_ptr;
2927 IrInstSrcSwitchBr *switch_br;
27732928};
27742929
2775struct IrInstructionSwitchTarget {
2776 IrInstruction base;
2930struct IrInstSrcSwitchTarget {
2931 IrInstSrc base;
27772932
2778 IrInstruction *target_value_ptr;
2933 IrInstSrc *target_value_ptr;
27792934};
27802935
2781struct IrInstructionPhi {
2782 IrInstruction base;
2936struct IrInstSrcPhi {
2937 IrInstSrc base;
27832938
27842939 size_t incoming_count;
2785 IrBasicBlock **incoming_blocks;
2786 IrInstruction **incoming_values;
2940 IrBasicBlockSrc **incoming_blocks;
2941 IrInstSrc **incoming_values;
27872942 ResultLocPeerParent *peer_parent;
27882943};
27892944
2945struct IrInstGenPhi {
2946 IrInstGen base;
2947
2948 size_t incoming_count;
2949 IrBasicBlockGen **incoming_blocks;
2950 IrInstGen **incoming_values;
2951};
2952
27902953enum IrUnOp {
27912954 IrUnOpInvalid,
27922955 IrUnOpBinNot,
......@@ -2796,15 +2959,30 @@ enum IrUnOp {
27962959 IrUnOpOptional,
27972960};
27982961
2799struct IrInstructionUnOp {
2800 IrInstruction base;
2962struct IrInstSrcUnOp {
2963 IrInstSrc base;
28012964
28022965 IrUnOp op_id;
28032966 LVal lval;
2804 IrInstruction *value;
2967 IrInstSrc *value;
28052968 ResultLoc *result_loc;
28062969};
28072970
2971struct IrInstGenBinaryNot {
2972 IrInstGen base;
2973 IrInstGen *operand;
2974};
2975
2976struct IrInstGenNegation {
2977 IrInstGen base;
2978 IrInstGen *operand;
2979};
2980
2981struct IrInstGenNegationWrapping {
2982 IrInstGen base;
2983 IrInstGen *operand;
2984};
2985
28082986enum IrBinOp {
28092987 IrBinOpInvalid,
28102988 IrBinOpBoolOr,
......@@ -2839,113 +3017,144 @@ enum IrBinOp {
28393017 IrBinOpArrayMult,
28403018};
28413019
2842struct IrInstructionBinOp {
2843 IrInstruction base;
3020struct IrInstSrcBinOp {
3021 IrInstSrc base;
3022
3023 IrInstSrc *op1;
3024 IrInstSrc *op2;
3025 IrBinOp op_id;
3026 bool safety_check_on;
3027};
3028
3029struct IrInstGenBinOp {
3030 IrInstGen base;
28443031
2845 IrInstruction *op1;
2846 IrInstruction *op2;
3032 IrInstGen *op1;
3033 IrInstGen *op2;
28473034 IrBinOp op_id;
28483035 bool safety_check_on;
28493036};
28503037
2851struct IrInstructionMergeErrSets {
2852 IrInstruction base;
3038struct IrInstSrcMergeErrSets {
3039 IrInstSrc base;
28533040
2854 IrInstruction *op1;
2855 IrInstruction *op2;
3041 IrInstSrc *op1;
3042 IrInstSrc *op2;
28563043 Buf *type_name;
28573044};
28583045
2859struct IrInstructionLoadPtr {
2860 IrInstruction base;
3046struct IrInstSrcLoadPtr {
3047 IrInstSrc base;
28613048
2862 IrInstruction *ptr;
3049 IrInstSrc *ptr;
28633050};
28643051
2865struct IrInstructionLoadPtrGen {
2866 IrInstruction base;
3052struct IrInstGenLoadPtr {
3053 IrInstGen base;
28673054
2868 IrInstruction *ptr;
2869 IrInstruction *result_loc;
3055 IrInstGen *ptr;
3056 IrInstGen *result_loc;
28703057};
28713058
2872struct IrInstructionStorePtr {
2873 IrInstruction base;
3059struct IrInstSrcStorePtr {
3060 IrInstSrc base;
3061
3062 IrInstSrc *ptr;
3063 IrInstSrc *value;
28743064
28753065 bool allow_write_through_const;
2876 IrInstruction *ptr;
2877 IrInstruction *value;
28783066};
28793067
2880struct IrInstructionVectorStoreElem {
2881 IrInstruction base;
3068struct IrInstGenStorePtr {
3069 IrInstGen base;
28823070
2883 IrInstruction *vector_ptr;
2884 IrInstruction *index;
2885 IrInstruction *value;
3071 IrInstGen *ptr;
3072 IrInstGen *value;
28863073};
28873074
2888struct IrInstructionFieldPtr {
2889 IrInstruction base;
3075struct IrInstGenVectorStoreElem {
3076 IrInstGen base;
28903077
2891 bool initializing;
2892 IrInstruction *container_ptr;
3078 IrInstGen *vector_ptr;
3079 IrInstGen *index;
3080 IrInstGen *value;
3081};
3082
3083struct IrInstSrcFieldPtr {
3084 IrInstSrc base;
3085
3086 IrInstSrc *container_ptr;
28933087 Buf *field_name_buffer;
2894 IrInstruction *field_name_expr;
3088 IrInstSrc *field_name_expr;
3089 bool initializing;
28953090};
28963091
2897struct IrInstructionStructFieldPtr {
2898 IrInstruction base;
3092struct IrInstGenStructFieldPtr {
3093 IrInstGen base;
28993094
2900 IrInstruction *struct_ptr;
3095 IrInstGen *struct_ptr;
29013096 TypeStructField *field;
29023097 bool is_const;
29033098};
29043099
2905struct IrInstructionUnionFieldPtr {
2906 IrInstruction base;
3100struct IrInstGenUnionFieldPtr {
3101 IrInstGen base;
29073102
3103 IrInstGen *union_ptr;
3104 TypeUnionField *field;
29083105 bool safety_check_on;
29093106 bool initializing;
2910 IrInstruction *union_ptr;
2911 TypeUnionField *field;
29123107};
29133108
2914struct IrInstructionElemPtr {
2915 IrInstruction base;
3109struct IrInstSrcElemPtr {
3110 IrInstSrc base;
29163111
2917 IrInstruction *array_ptr;
2918 IrInstruction *elem_index;
3112 IrInstSrc *array_ptr;
3113 IrInstSrc *elem_index;
29193114 AstNode *init_array_type_source_node;
29203115 PtrLen ptr_len;
29213116 bool safety_check_on;
29223117};
29233118
2924struct IrInstructionVarPtr {
2925 IrInstruction base;
3119struct IrInstGenElemPtr {
3120 IrInstGen base;
3121
3122 IrInstGen *array_ptr;
3123 IrInstGen *elem_index;
3124 bool safety_check_on;
3125};
3126
3127struct IrInstSrcVarPtr {
3128 IrInstSrc base;
29263129
29273130 ZigVar *var;
29283131 ScopeFnDef *crossed_fndef_scope;
29293132};
29303133
3134struct IrInstGenVarPtr {
3135 IrInstGen base;
3136
3137 ZigVar *var;
3138};
3139
29313140// For functions that have a return type for which handle_is_ptr is true, a
29323141// result location pointer is the secret first parameter ("sret"). This
29333142// instruction returns that pointer.
2934struct IrInstructionReturnPtr {
2935 IrInstruction base;
3143struct IrInstGenReturnPtr {
3144 IrInstGen base;
29363145};
29373146
2938struct IrInstructionCallSrc {
2939 IrInstruction base;
3147struct IrInstSrcCall {
3148 IrInstSrc base;
29403149
2941 IrInstruction *fn_ref;
3150 IrInstSrc *fn_ref;
29423151 ZigFn *fn_entry;
29433152 size_t arg_count;
2944 IrInstruction **args;
2945 IrInstruction *ret_ptr;
3153 IrInstSrc **args;
3154 IrInstSrc *ret_ptr;
29463155 ResultLoc *result_loc;
29473156
2948 IrInstruction *new_stack;
3157 IrInstSrc *new_stack;
29493158
29503159 CallModifier modifier;
29513160 bool is_async_call_builtin;
......@@ -2953,12 +3162,12 @@ struct IrInstructionCallSrc {
29533162
29543163// This is a pass1 instruction, used by @call when the args node is
29553164// a tuple or struct literal.
2956struct IrInstructionCallSrcArgs {
2957 IrInstruction base;
3165struct IrInstSrcCallArgs {
3166 IrInstSrc base;
29583167
2959 IrInstruction *options;
2960 IrInstruction *fn_ref;
2961 IrInstruction **args_ptr;
3168 IrInstSrc *options;
3169 IrInstSrc *fn_ref;
3170 IrInstSrc **args_ptr;
29623171 size_t args_len;
29633172 ResultLoc *result_loc;
29643173};
......@@ -2966,42 +3175,54 @@ struct IrInstructionCallSrcArgs {
29663175// This is a pass1 instruction, used by @call, when the args node
29673176// is not a literal.
29683177// `args` is expected to be either a struct or a tuple.
2969struct IrInstructionCallExtra {
2970 IrInstruction base;
3178struct IrInstSrcCallExtra {
3179 IrInstSrc base;
29713180
2972 IrInstruction *options;
2973 IrInstruction *fn_ref;
2974 IrInstruction *args;
3181 IrInstSrc *options;
3182 IrInstSrc *fn_ref;
3183 IrInstSrc *args;
29753184 ResultLoc *result_loc;
29763185};
29773186
2978struct IrInstructionCallGen {
2979 IrInstruction base;
3187struct IrInstGenCall {
3188 IrInstGen base;
29803189
2981 IrInstruction *fn_ref;
3190 IrInstGen *fn_ref;
29823191 ZigFn *fn_entry;
29833192 size_t arg_count;
2984 IrInstruction **args;
2985 IrInstruction *result_loc;
2986 IrInstruction *frame_result_loc;
2987 IrInstruction *new_stack;
3193 IrInstGen **args;
3194 IrInstGen *result_loc;
3195 IrInstGen *frame_result_loc;
3196 IrInstGen *new_stack;
29883197
29893198 CallModifier modifier;
29903199
29913200 bool is_async_call_builtin;
29923201};
29933202
2994struct IrInstructionConst {
2995 IrInstruction base;
3203struct IrInstSrcConst {
3204 IrInstSrc base;
3205
3206 ZigValue *value;
3207};
3208
3209struct IrInstGenConst {
3210 IrInstGen base;
3211};
3212
3213struct IrInstSrcReturn {
3214 IrInstSrc base;
3215
3216 IrInstSrc *operand;
29963217};
29973218
29983219// When an IrExecutable is not in a function, a return instruction means that
29993220// the expression returns with that value, even though a return statement from
30003221// an AST perspective is invalid.
3001struct IrInstructionReturn {
3002 IrInstruction base;
3222struct IrInstGenReturn {
3223 IrInstGen base;
30033224
3004 IrInstruction *operand;
3225 IrInstGen *operand;
30053226};
30063227
30073228enum CastOp {
......@@ -3016,89 +3237,92 @@ enum CastOp {
30163237};
30173238
30183239// TODO get rid of this instruction, replace with instructions for each op code
3019struct IrInstructionCast {
3020 IrInstruction base;
3240struct IrInstGenCast {
3241 IrInstGen base;
30213242
3022 IrInstruction *value;
3023 ZigType *dest_type;
3243 IrInstGen *value;
30243244 CastOp cast_op;
30253245};
30263246
3027struct IrInstructionResizeSlice {
3028 IrInstruction base;
3247struct IrInstGenResizeSlice {
3248 IrInstGen base;
30293249
3030 IrInstruction *operand;
3031 IrInstruction *result_loc;
3250 IrInstGen *operand;
3251 IrInstGen *result_loc;
30323252};
30333253
3034struct IrInstructionContainerInitList {
3035 IrInstruction base;
3254struct IrInstSrcContainerInitList {
3255 IrInstSrc base;
30363256
3037 IrInstruction *elem_type;
3257 IrInstSrc *elem_type;
30383258 size_t item_count;
3039 IrInstruction **elem_result_loc_list;
3040 IrInstruction *result_loc;
3259 IrInstSrc **elem_result_loc_list;
3260 IrInstSrc *result_loc;
30413261 AstNode *init_array_type_source_node;
30423262};
30433263
3044struct IrInstructionContainerInitFieldsField {
3264struct IrInstSrcContainerInitFieldsField {
30453265 Buf *name;
30463266 AstNode *source_node;
30473267 TypeStructField *type_struct_field;
3048 IrInstruction *result_loc;
3268 IrInstSrc *result_loc;
30493269};
30503270
3051struct IrInstructionContainerInitFields {
3052 IrInstruction base;
3271struct IrInstSrcContainerInitFields {
3272 IrInstSrc base;
30533273
30543274 size_t field_count;
3055 IrInstructionContainerInitFieldsField *fields;
3056 IrInstruction *result_loc;
3275 IrInstSrcContainerInitFieldsField *fields;
3276 IrInstSrc *result_loc;
3277};
3278
3279struct IrInstSrcUnreachable {
3280 IrInstSrc base;
30573281};
30583282
3059struct IrInstructionUnreachable {
3060 IrInstruction base;
3283struct IrInstGenUnreachable {
3284 IrInstGen base;
30613285};
30623286
3063struct IrInstructionTypeOf {
3064 IrInstruction base;
3287struct IrInstSrcTypeOf {
3288 IrInstSrc base;
30653289
3066 IrInstruction *value;
3290 IrInstSrc *value;
30673291};
30683292
3069struct IrInstructionSetCold {
3070 IrInstruction base;
3293struct IrInstSrcSetCold {
3294 IrInstSrc base;
30713295
3072 IrInstruction *is_cold;
3296 IrInstSrc *is_cold;
30733297};
30743298
3075struct IrInstructionSetRuntimeSafety {
3076 IrInstruction base;
3299struct IrInstSrcSetRuntimeSafety {
3300 IrInstSrc base;
30773301
3078 IrInstruction *safety_on;
3302 IrInstSrc *safety_on;
30793303};
30803304
3081struct IrInstructionSetFloatMode {
3082 IrInstruction base;
3305struct IrInstSrcSetFloatMode {
3306 IrInstSrc base;
30833307
3084 IrInstruction *scope_value;
3085 IrInstruction *mode_value;
3308 IrInstSrc *scope_value;
3309 IrInstSrc *mode_value;
30863310};
30873311
3088struct IrInstructionArrayType {
3089 IrInstruction base;
3312struct IrInstSrcArrayType {
3313 IrInstSrc base;
30903314
3091 IrInstruction *size;
3092 IrInstruction *sentinel;
3093 IrInstruction *child_type;
3315 IrInstSrc *size;
3316 IrInstSrc *sentinel;
3317 IrInstSrc *child_type;
30943318};
30953319
3096struct IrInstructionPtrType {
3097 IrInstruction base;
3320struct IrInstSrcPtrType {
3321 IrInstSrc base;
30983322
3099 IrInstruction *sentinel;
3100 IrInstruction *align_value;
3101 IrInstruction *child_type;
3323 IrInstSrc *sentinel;
3324 IrInstSrc *align_value;
3325 IrInstSrc *child_type;
31023326 uint32_t bit_offset_start;
31033327 uint32_t host_int_bytes;
31043328 PtrLen ptr_len;
......@@ -3107,375 +3331,459 @@ struct IrInstructionPtrType {
31073331 bool is_allow_zero;
31083332};
31093333
3110struct IrInstructionAnyFrameType {
3111 IrInstruction base;
3334struct IrInstSrcAnyFrameType {
3335 IrInstSrc base;
31123336
3113 IrInstruction *payload_type;
3337 IrInstSrc *payload_type;
31143338};
31153339
3116struct IrInstructionSliceType {
3117 IrInstruction base;
3340struct IrInstSrcSliceType {
3341 IrInstSrc base;
31183342
3119 IrInstruction *sentinel;
3120 IrInstruction *align_value;
3121 IrInstruction *child_type;
3343 IrInstSrc *sentinel;
3344 IrInstSrc *align_value;
3345 IrInstSrc *child_type;
31223346 bool is_const;
31233347 bool is_volatile;
31243348 bool is_allow_zero;
31253349};
31263350
3127struct IrInstructionAsmSrc {
3128 IrInstruction base;
3351struct IrInstSrcAsm {
3352 IrInstSrc base;
31293353
3130 IrInstruction *asm_template;
3131 IrInstruction **input_list;
3132 IrInstruction **output_types;
3354 IrInstSrc *asm_template;
3355 IrInstSrc **input_list;
3356 IrInstSrc **output_types;
31333357 ZigVar **output_vars;
31343358 size_t return_count;
31353359 bool has_side_effects;
31363360 bool is_global;
31373361};
31383362
3139struct IrInstructionAsmGen {
3140 IrInstruction base;
3363struct IrInstGenAsm {
3364 IrInstGen base;
31413365
31423366 Buf *asm_template;
31433367 AsmToken *token_list;
31443368 size_t token_list_len;
3145 IrInstruction **input_list;
3146 IrInstruction **output_types;
3369 IrInstGen **input_list;
3370 IrInstGen **output_types;
31473371 ZigVar **output_vars;
31483372 size_t return_count;
31493373 bool has_side_effects;
31503374};
31513375
3152struct IrInstructionSizeOf {
3153 IrInstruction base;
3376struct IrInstSrcSizeOf {
3377 IrInstSrc base;
31543378
3379 IrInstSrc *type_value;
31553380 bool bit_size;
3156 IrInstruction *type_value;
31573381};
31583382
31593383// returns true if nonnull, returns false if null
3160// this is so that `zeroes` sets maybe values to null
3161struct IrInstructionTestNonNull {
3162 IrInstruction base;
3384struct IrInstSrcTestNonNull {
3385 IrInstSrc base;
3386
3387 IrInstSrc *value;
3388};
3389
3390struct IrInstGenTestNonNull {
3391 IrInstGen base;
31633392
3164 IrInstruction *value;
3393 IrInstGen *value;
31653394};
31663395
31673396// Takes a pointer to an optional value, returns a pointer
31683397// to the payload.
3169struct IrInstructionOptionalUnwrapPtr {
3170 IrInstruction base;
3398struct IrInstSrcOptionalUnwrapPtr {
3399 IrInstSrc base;
3400
3401 IrInstSrc *base_ptr;
3402 bool safety_check_on;
3403 bool initializing;
3404};
31713405
3406struct IrInstGenOptionalUnwrapPtr {
3407 IrInstGen base;
3408
3409 IrInstGen *base_ptr;
31723410 bool safety_check_on;
31733411 bool initializing;
3174 IrInstruction *base_ptr;
31753412};
31763413
3177struct IrInstructionCtz {
3178 IrInstruction base;
3414struct IrInstSrcCtz {
3415 IrInstSrc base;
3416
3417 IrInstSrc *type;
3418 IrInstSrc *op;
3419};
3420
3421struct IrInstGenCtz {
3422 IrInstGen base;
3423
3424 IrInstGen *op;
3425};
3426
3427struct IrInstSrcClz {
3428 IrInstSrc base;
3429
3430 IrInstSrc *type;
3431 IrInstSrc *op;
3432};
3433
3434struct IrInstGenClz {
3435 IrInstGen base;
31793436
3180 IrInstruction *type;
3181 IrInstruction *op;
3437 IrInstGen *op;
31823438};
31833439
3184struct IrInstructionClz {
3185 IrInstruction base;
3440struct IrInstSrcPopCount {
3441 IrInstSrc base;
31863442
3187 IrInstruction *type;
3188 IrInstruction *op;
3443 IrInstSrc *type;
3444 IrInstSrc *op;
31893445};
31903446
3191struct IrInstructionPopCount {
3192 IrInstruction base;
3447struct IrInstGenPopCount {
3448 IrInstGen base;
31933449
3194 IrInstruction *type;
3195 IrInstruction *op;
3450 IrInstGen *op;
31963451};
31973452
3198struct IrInstructionUnionTag {
3199 IrInstruction base;
3453struct IrInstGenUnionTag {
3454 IrInstGen base;
32003455
3201 IrInstruction *value;
3456 IrInstGen *value;
32023457};
32033458
3204struct IrInstructionImport {
3205 IrInstruction base;
3459struct IrInstSrcImport {
3460 IrInstSrc base;
32063461
3207 IrInstruction *name;
3462 IrInstSrc *name;
32083463};
32093464
3210struct IrInstructionRef {
3211 IrInstruction base;
3465struct IrInstSrcRef {
3466 IrInstSrc base;
32123467
3213 IrInstruction *value;
3468 IrInstSrc *value;
32143469 bool is_const;
32153470 bool is_volatile;
32163471};
32173472
3218struct IrInstructionRefGen {
3219 IrInstruction base;
3473struct IrInstGenRef {
3474 IrInstGen base;
32203475
3221 IrInstruction *operand;
3222 IrInstruction *result_loc;
3476 IrInstGen *operand;
3477 IrInstGen *result_loc;
32233478};
32243479
3225struct IrInstructionCompileErr {
3226 IrInstruction base;
3480struct IrInstSrcCompileErr {
3481 IrInstSrc base;
32273482
3228 IrInstruction *msg;
3483 IrInstSrc *msg;
32293484};
32303485
3231struct IrInstructionCompileLog {
3232 IrInstruction base;
3486struct IrInstSrcCompileLog {
3487 IrInstSrc base;
32333488
32343489 size_t msg_count;
3235 IrInstruction **msg_list;
3490 IrInstSrc **msg_list;
32363491};
32373492
3238struct IrInstructionErrName {
3239 IrInstruction base;
3493struct IrInstSrcErrName {
3494 IrInstSrc base;
32403495
3241 IrInstruction *value;
3496 IrInstSrc *value;
32423497};
32433498
3244struct IrInstructionCImport {
3245 IrInstruction base;
3499struct IrInstGenErrName {
3500 IrInstGen base;
3501
3502 IrInstGen *value;
3503};
3504
3505struct IrInstSrcCImport {
3506 IrInstSrc base;
32463507};
32473508
3248struct IrInstructionCInclude {
3249 IrInstruction base;
3509struct IrInstSrcCInclude {
3510 IrInstSrc base;
32503511
3251 IrInstruction *name;
3512 IrInstSrc *name;
32523513};
32533514
3254struct IrInstructionCDefine {
3255 IrInstruction base;
3515struct IrInstSrcCDefine {
3516 IrInstSrc base;
32563517
3257 IrInstruction *name;
3258 IrInstruction *value;
3518 IrInstSrc *name;
3519 IrInstSrc *value;
32593520};
32603521
3261struct IrInstructionCUndef {
3262 IrInstruction base;
3522struct IrInstSrcCUndef {
3523 IrInstSrc base;
32633524
3264 IrInstruction *name;
3525 IrInstSrc *name;
32653526};
32663527
3267struct IrInstructionEmbedFile {
3268 IrInstruction base;
3528struct IrInstSrcEmbedFile {
3529 IrInstSrc base;
32693530
3270 IrInstruction *name;
3531 IrInstSrc *name;
32713532};
32723533
3273struct IrInstructionCmpxchgSrc {
3274 IrInstruction base;
3534struct IrInstSrcCmpxchg {
3535 IrInstSrc base;
32753536
32763537 bool is_weak;
3277 IrInstruction *type_value;
3278 IrInstruction *ptr;
3279 IrInstruction *cmp_value;
3280 IrInstruction *new_value;
3281 IrInstruction *success_order_value;
3282 IrInstruction *failure_order_value;
3538 IrInstSrc *type_value;
3539 IrInstSrc *ptr;
3540 IrInstSrc *cmp_value;
3541 IrInstSrc *new_value;
3542 IrInstSrc *success_order_value;
3543 IrInstSrc *failure_order_value;
32833544 ResultLoc *result_loc;
32843545};
32853546
3286struct IrInstructionCmpxchgGen {
3287 IrInstruction base;
3547struct IrInstGenCmpxchg {
3548 IrInstGen base;
32883549
3289 bool is_weak;
32903550 AtomicOrder success_order;
32913551 AtomicOrder failure_order;
3292 IrInstruction *ptr;
3293 IrInstruction *cmp_value;
3294 IrInstruction *new_value;
3295 IrInstruction *result_loc;
3552 IrInstGen *ptr;
3553 IrInstGen *cmp_value;
3554 IrInstGen *new_value;
3555 IrInstGen *result_loc;
3556 bool is_weak;
32963557};
32973558
3298struct IrInstructionFence {
3299 IrInstruction base;
3559struct IrInstSrcFence {
3560 IrInstSrc base;
3561
3562 IrInstSrc *order;
3563};
33003564
3301 IrInstruction *order_value;
3565struct IrInstGenFence {
3566 IrInstGen base;
33023567
3303 // if this instruction gets to runtime then we know these values:
33043568 AtomicOrder order;
33053569};
33063570
3307struct IrInstructionTruncate {
3308 IrInstruction base;
3571struct IrInstSrcTruncate {
3572 IrInstSrc base;
3573
3574 IrInstSrc *dest_type;
3575 IrInstSrc *target;
3576};
3577
3578struct IrInstGenTruncate {
3579 IrInstGen base;
33093580
3310 IrInstruction *dest_type;
3311 IrInstruction *target;
3581 IrInstGen *target;
33123582};
33133583
3314struct IrInstructionIntCast {
3315 IrInstruction base;
3584struct IrInstSrcIntCast {
3585 IrInstSrc base;
33163586
3317 IrInstruction *dest_type;
3318 IrInstruction *target;
3587 IrInstSrc *dest_type;
3588 IrInstSrc *target;
33193589};
33203590
3321struct IrInstructionFloatCast {
3322 IrInstruction base;
3591struct IrInstSrcFloatCast {
3592 IrInstSrc base;
33233593
3324 IrInstruction *dest_type;
3325 IrInstruction *target;
3594 IrInstSrc *dest_type;
3595 IrInstSrc *target;
33263596};
33273597
3328struct IrInstructionErrSetCast {
3329 IrInstruction base;
3598struct IrInstSrcErrSetCast {
3599 IrInstSrc base;
33303600
3331 IrInstruction *dest_type;
3332 IrInstruction *target;
3601 IrInstSrc *dest_type;
3602 IrInstSrc *target;
33333603};
33343604
3335struct IrInstructionToBytes {
3336 IrInstruction base;
3605struct IrInstSrcToBytes {
3606 IrInstSrc base;
33373607
3338 IrInstruction *target;
3608 IrInstSrc *target;
33393609 ResultLoc *result_loc;
33403610};
33413611
3342struct IrInstructionFromBytes {
3343 IrInstruction base;
3612struct IrInstSrcFromBytes {
3613 IrInstSrc base;
33443614
3345 IrInstruction *dest_child_type;
3346 IrInstruction *target;
3615 IrInstSrc *dest_child_type;
3616 IrInstSrc *target;
33473617 ResultLoc *result_loc;
33483618};
33493619
3350struct IrInstructionIntToFloat {
3351 IrInstruction base;
3620struct IrInstSrcIntToFloat {
3621 IrInstSrc base;
33523622
3353 IrInstruction *dest_type;
3354 IrInstruction *target;
3623 IrInstSrc *dest_type;
3624 IrInstSrc *target;
33553625};
33563626
3357struct IrInstructionFloatToInt {
3358 IrInstruction base;
3627struct IrInstSrcFloatToInt {
3628 IrInstSrc base;
33593629
3360 IrInstruction *dest_type;
3361 IrInstruction *target;
3630 IrInstSrc *dest_type;
3631 IrInstSrc *target;
33623632};
33633633
3364struct IrInstructionBoolToInt {
3365 IrInstruction base;
3634struct IrInstSrcBoolToInt {
3635 IrInstSrc base;
33663636
3367 IrInstruction *target;
3637 IrInstSrc *target;
33683638};
33693639
3370struct IrInstructionIntType {
3371 IrInstruction base;
3640struct IrInstSrcIntType {
3641 IrInstSrc base;
33723642
3373 IrInstruction *is_signed;
3374 IrInstruction *bit_count;
3643 IrInstSrc *is_signed;
3644 IrInstSrc *bit_count;
33753645};
33763646
3377struct IrInstructionVectorType {
3378 IrInstruction base;
3647struct IrInstSrcVectorType {
3648 IrInstSrc base;
33793649
3380 IrInstruction *len;
3381 IrInstruction *elem_type;
3650 IrInstSrc *len;
3651 IrInstSrc *elem_type;
33823652};
33833653
3384struct IrInstructionBoolNot {
3385 IrInstruction base;
3654struct IrInstSrcBoolNot {
3655 IrInstSrc base;
33863656
3387 IrInstruction *value;
3657 IrInstSrc *value;
33883658};
33893659
3390struct IrInstructionMemset {
3391 IrInstruction base;
3660struct IrInstGenBoolNot {
3661 IrInstGen base;
33923662
3393 IrInstruction *dest_ptr;
3394 IrInstruction *byte;
3395 IrInstruction *count;
3663 IrInstGen *value;
33963664};
33973665
3398struct IrInstructionMemcpy {
3399 IrInstruction base;
3666struct IrInstSrcMemset {
3667 IrInstSrc base;
34003668
3401 IrInstruction *dest_ptr;
3402 IrInstruction *src_ptr;
3403 IrInstruction *count;
3669 IrInstSrc *dest_ptr;
3670 IrInstSrc *byte;
3671 IrInstSrc *count;
34043672};
34053673
3406struct IrInstructionSliceSrc {
3407 IrInstruction base;
3674struct IrInstGenMemset {
3675 IrInstGen base;
34083676
3409 bool safety_check_on;
3410 IrInstruction *ptr;
3411 IrInstruction *start;
3412 IrInstruction *end;
3413 IrInstruction *sentinel;
3677 IrInstGen *dest_ptr;
3678 IrInstGen *byte;
3679 IrInstGen *count;
3680};
3681
3682struct IrInstSrcMemcpy {
3683 IrInstSrc base;
3684
3685 IrInstSrc *dest_ptr;
3686 IrInstSrc *src_ptr;
3687 IrInstSrc *count;
3688};
3689
3690struct IrInstGenMemcpy {
3691 IrInstGen base;
3692
3693 IrInstGen *dest_ptr;
3694 IrInstGen *src_ptr;
3695 IrInstGen *count;
3696};
3697
3698struct IrInstSrcSlice {
3699 IrInstSrc base;
3700
3701 IrInstSrc *ptr;
3702 IrInstSrc *start;
3703 IrInstSrc *end;
3704 IrInstSrc *sentinel;
34143705 ResultLoc *result_loc;
3706 bool safety_check_on;
34153707};
34163708
3417struct IrInstructionSliceGen {
3418 IrInstruction base;
3709struct IrInstGenSlice {
3710 IrInstGen base;
34193711
3712 IrInstGen *ptr;
3713 IrInstGen *start;
3714 IrInstGen *end;
3715 IrInstGen *result_loc;
34203716 bool safety_check_on;
3421 IrInstruction *ptr;
3422 IrInstruction *start;
3423 IrInstruction *end;
3424 IrInstruction *result_loc;
34253717};
34263718
3427struct IrInstructionMemberCount {
3428 IrInstruction base;
3719struct IrInstSrcMemberCount {
3720 IrInstSrc base;
3721
3722 IrInstSrc *container;
3723};
3724
3725struct IrInstSrcMemberType {
3726 IrInstSrc base;
34293727
3430 IrInstruction *container;
3728 IrInstSrc *container_type;
3729 IrInstSrc *member_index;
34313730};
34323731
3433struct IrInstructionMemberType {
3434 IrInstruction base;
3732struct IrInstSrcMemberName {
3733 IrInstSrc base;
3734
3735 IrInstSrc *container_type;
3736 IrInstSrc *member_index;
3737};
3738
3739struct IrInstSrcBreakpoint {
3740 IrInstSrc base;
3741};
34353742
3436 IrInstruction *container_type;
3437 IrInstruction *member_index;
3743struct IrInstGenBreakpoint {
3744 IrInstGen base;
34383745};
34393746
3440struct IrInstructionMemberName {
3441 IrInstruction base;
3747struct IrInstSrcReturnAddress {
3748 IrInstSrc base;
3749};
34423750
3443 IrInstruction *container_type;
3444 IrInstruction *member_index;
3751struct IrInstGenReturnAddress {
3752 IrInstGen base;
34453753};
34463754
3447struct IrInstructionBreakpoint {
3448 IrInstruction base;
3755struct IrInstSrcFrameAddress {
3756 IrInstSrc base;
34493757};
34503758
3451struct IrInstructionReturnAddress {
3452 IrInstruction base;
3759struct IrInstGenFrameAddress {
3760 IrInstGen base;
34533761};
34543762
3455struct IrInstructionFrameAddress {
3456 IrInstruction base;
3763struct IrInstSrcFrameHandle {
3764 IrInstSrc base;
34573765};
34583766
3459struct IrInstructionFrameHandle {
3460 IrInstruction base;
3767struct IrInstGenFrameHandle {
3768 IrInstGen base;
34613769};
34623770
3463struct IrInstructionFrameType {
3464 IrInstruction base;
3771struct IrInstSrcFrameType {
3772 IrInstSrc base;
34653773
3466 IrInstruction *fn;
3774 IrInstSrc *fn;
34673775};
34683776
3469struct IrInstructionFrameSizeSrc {
3470 IrInstruction base;
3777struct IrInstSrcFrameSize {
3778 IrInstSrc base;
34713779
3472 IrInstruction *fn;
3780 IrInstSrc *fn;
34733781};
34743782
3475struct IrInstructionFrameSizeGen {
3476 IrInstruction base;
3783struct IrInstGenFrameSize {
3784 IrInstGen base;
34773785
3478 IrInstruction *fn;
3786 IrInstGen *fn;
34793787};
34803788
34813789enum IrOverflowOp {
......@@ -3485,559 +3793,713 @@ enum IrOverflowOp {
34853793 IrOverflowOpShl,
34863794};
34873795
3488struct IrInstructionOverflowOp {
3489 IrInstruction base;
3796struct IrInstSrcOverflowOp {
3797 IrInstSrc base;
3798
3799 IrOverflowOp op;
3800 IrInstSrc *type_value;
3801 IrInstSrc *op1;
3802 IrInstSrc *op2;
3803 IrInstSrc *result_ptr;
3804};
3805
3806struct IrInstGenOverflowOp {
3807 IrInstGen base;
34903808
34913809 IrOverflowOp op;
3492 IrInstruction *type_value;
3493 IrInstruction *op1;
3494 IrInstruction *op2;
3495 IrInstruction *result_ptr;
3810 IrInstGen *op1;
3811 IrInstGen *op2;
3812 IrInstGen *result_ptr;
34963813
3814 // TODO can this field be removed?
34973815 ZigType *result_ptr_type;
34983816};
34993817
3500struct IrInstructionMulAdd {
3501 IrInstruction base;
3818struct IrInstSrcMulAdd {
3819 IrInstSrc base;
3820
3821 IrInstSrc *type_value;
3822 IrInstSrc *op1;
3823 IrInstSrc *op2;
3824 IrInstSrc *op3;
3825};
3826
3827struct IrInstGenMulAdd {
3828 IrInstGen base;
35023829
3503 IrInstruction *type_value;
3504 IrInstruction *op1;
3505 IrInstruction *op2;
3506 IrInstruction *op3;
3830 IrInstGen *op1;
3831 IrInstGen *op2;
3832 IrInstGen *op3;
35073833};
35083834
3509struct IrInstructionAlignOf {
3510 IrInstruction base;
3835struct IrInstSrcAlignOf {
3836 IrInstSrc base;
35113837
3512 IrInstruction *type_value;
3838 IrInstSrc *type_value;
35133839};
35143840
35153841// returns true if error, returns false if not error
3516struct IrInstructionTestErrSrc {
3517 IrInstruction base;
3842struct IrInstSrcTestErr {
3843 IrInstSrc base;
35183844
3845 IrInstSrc *base_ptr;
35193846 bool resolve_err_set;
35203847 bool base_ptr_is_payload;
3521 IrInstruction *base_ptr;
35223848};
35233849
3524struct IrInstructionTestErrGen {
3525 IrInstruction base;
3850struct IrInstGenTestErr {
3851 IrInstGen base;
35263852
3527 IrInstruction *err_union;
3853 IrInstGen *err_union;
35283854};
35293855
35303856// Takes an error union pointer, returns a pointer to the error code.
3531struct IrInstructionUnwrapErrCode {
3532 IrInstruction base;
3857struct IrInstSrcUnwrapErrCode {
3858 IrInstSrc base;
35333859
3860 IrInstSrc *err_union_ptr;
35343861 bool initializing;
3535 IrInstruction *err_union_ptr;
35363862};
35373863
3538struct IrInstructionUnwrapErrPayload {
3539 IrInstruction base;
3864struct IrInstGenUnwrapErrCode {
3865 IrInstGen base;
35403866
3867 IrInstGen *err_union_ptr;
3868 bool initializing;
3869};
3870
3871struct IrInstSrcUnwrapErrPayload {
3872 IrInstSrc base;
3873
3874 IrInstSrc *value;
3875 bool safety_check_on;
3876 bool initializing;
3877};
3878
3879struct IrInstGenUnwrapErrPayload {
3880 IrInstGen base;
3881
3882 IrInstGen *value;
35413883 bool safety_check_on;
35423884 bool initializing;
3543 IrInstruction *value;
35443885};
35453886
3546struct IrInstructionOptionalWrap {
3547 IrInstruction base;
3887struct IrInstGenOptionalWrap {
3888 IrInstGen base;
35483889
3549 IrInstruction *operand;
3550 IrInstruction *result_loc;
3890 IrInstGen *operand;
3891 IrInstGen *result_loc;
35513892};
35523893
3553struct IrInstructionErrWrapPayload {
3554 IrInstruction base;
3894struct IrInstGenErrWrapPayload {
3895 IrInstGen base;
35553896
3556 IrInstruction *operand;
3557 IrInstruction *result_loc;
3897 IrInstGen *operand;
3898 IrInstGen *result_loc;
35583899};
35593900
3560struct IrInstructionErrWrapCode {
3561 IrInstruction base;
3901struct IrInstGenErrWrapCode {
3902 IrInstGen base;
35623903
3563 IrInstruction *operand;
3564 IrInstruction *result_loc;
3904 IrInstGen *operand;
3905 IrInstGen *result_loc;
35653906};
35663907
3567struct IrInstructionFnProto {
3568 IrInstruction base;
3908struct IrInstSrcFnProto {
3909 IrInstSrc base;
35693910
3570 IrInstruction **param_types;
3571 IrInstruction *align_value;
3572 IrInstruction *callconv_value;
3573 IrInstruction *return_type;
3911 IrInstSrc **param_types;
3912 IrInstSrc *align_value;
3913 IrInstSrc *callconv_value;
3914 IrInstSrc *return_type;
35743915 bool is_var_args;
35753916};
35763917
35773918// true if the target value is compile time known, false otherwise
3578struct IrInstructionTestComptime {
3579 IrInstruction base;
3919struct IrInstSrcTestComptime {
3920 IrInstSrc base;
35803921
3581 IrInstruction *value;
3922 IrInstSrc *value;
35823923};
35833924
3584struct IrInstructionPtrCastSrc {
3585 IrInstruction base;
3925struct IrInstSrcPtrCast {
3926 IrInstSrc base;
35863927
3587 IrInstruction *dest_type;
3588 IrInstruction *ptr;
3928 IrInstSrc *dest_type;
3929 IrInstSrc *ptr;
35893930 bool safety_check_on;
35903931};
35913932
3592struct IrInstructionPtrCastGen {
3593 IrInstruction base;
3933struct IrInstGenPtrCast {
3934 IrInstGen base;
35943935
3595 IrInstruction *ptr;
3936 IrInstGen *ptr;
35963937 bool safety_check_on;
35973938};
35983939
3599struct IrInstructionImplicitCast {
3600 IrInstruction base;
3940struct IrInstSrcImplicitCast {
3941 IrInstSrc base;
36013942
3602 IrInstruction *operand;
3943 IrInstSrc *operand;
36033944 ResultLocCast *result_loc_cast;
36043945};
36053946
3606struct IrInstructionBitCastSrc {
3607 IrInstruction base;
3947struct IrInstSrcBitCast {
3948 IrInstSrc base;
36083949
3609 IrInstruction *operand;
3950 IrInstSrc *operand;
36103951 ResultLocBitCast *result_loc_bit_cast;
36113952};
36123953
3613struct IrInstructionBitCastGen {
3614 IrInstruction base;
3954struct IrInstGenBitCast {
3955 IrInstGen base;
3956
3957 IrInstGen *operand;
3958};
3959
3960struct IrInstGenWidenOrShorten {
3961 IrInstGen base;
3962
3963 IrInstGen *target;
3964};
3965
3966struct IrInstSrcPtrToInt {
3967 IrInstSrc base;
3968
3969 IrInstSrc *target;
3970};
3971
3972struct IrInstGenPtrToInt {
3973 IrInstGen base;
3974
3975 IrInstGen *target;
3976};
3977
3978struct IrInstSrcIntToPtr {
3979 IrInstSrc base;
3980
3981 IrInstSrc *dest_type;
3982 IrInstSrc *target;
3983};
3984
3985struct IrInstGenIntToPtr {
3986 IrInstGen base;
36153987
3616 IrInstruction *operand;
3988 IrInstGen *target;
36173989};
36183990
3619struct IrInstructionWidenOrShorten {
3620 IrInstruction base;
3991struct IrInstSrcIntToEnum {
3992 IrInstSrc base;
36213993
3622 IrInstruction *target;
3994 IrInstSrc *dest_type;
3995 IrInstSrc *target;
36233996};
36243997
3625struct IrInstructionPtrToInt {
3626 IrInstruction base;
3998struct IrInstGenIntToEnum {
3999 IrInstGen base;
36274000
3628 IrInstruction *target;
4001 IrInstGen *target;
36294002};
36304003
3631struct IrInstructionIntToPtr {
3632 IrInstruction base;
4004struct IrInstSrcEnumToInt {
4005 IrInstSrc base;
36334006
3634 IrInstruction *dest_type;
3635 IrInstruction *target;
4007 IrInstSrc *target;
36364008};
36374009
3638struct IrInstructionIntToEnum {
3639 IrInstruction base;
4010struct IrInstSrcIntToErr {
4011 IrInstSrc base;
36404012
3641 IrInstruction *dest_type;
3642 IrInstruction *target;
4013 IrInstSrc *target;
36434014};
36444015
3645struct IrInstructionEnumToInt {
3646 IrInstruction base;
4016struct IrInstGenIntToErr {
4017 IrInstGen base;
36474018
3648 IrInstruction *target;
4019 IrInstGen *target;
36494020};
36504021
3651struct IrInstructionIntToErr {
3652 IrInstruction base;
4022struct IrInstSrcErrToInt {
4023 IrInstSrc base;
36534024
3654 IrInstruction *target;
4025 IrInstSrc *target;
36554026};
36564027
3657struct IrInstructionErrToInt {
3658 IrInstruction base;
4028struct IrInstGenErrToInt {
4029 IrInstGen base;
36594030
3660 IrInstruction *target;
4031 IrInstGen *target;
36614032};
36624033
3663struct IrInstructionCheckSwitchProngsRange {
3664 IrInstruction *start;
3665 IrInstruction *end;
4034struct IrInstSrcCheckSwitchProngsRange {
4035 IrInstSrc *start;
4036 IrInstSrc *end;
36664037};
36674038
3668struct IrInstructionCheckSwitchProngs {
3669 IrInstruction base;
4039struct IrInstSrcCheckSwitchProngs {
4040 IrInstSrc base;
36704041
3671 IrInstruction *target_value;
3672 IrInstructionCheckSwitchProngsRange *ranges;
4042 IrInstSrc *target_value;
4043 IrInstSrcCheckSwitchProngsRange *ranges;
36734044 size_t range_count;
36744045 bool have_else_prong;
4046 bool have_underscore_prong;
36754047};
36764048
3677struct IrInstructionCheckStatementIsVoid {
3678 IrInstruction base;
4049struct IrInstSrcCheckStatementIsVoid {
4050 IrInstSrc base;
36794051
3680 IrInstruction *statement_value;
4052 IrInstSrc *statement_value;
36814053};
36824054
3683struct IrInstructionTypeName {
3684 IrInstruction base;
4055struct IrInstSrcTypeName {
4056 IrInstSrc base;
36854057
3686 IrInstruction *type_value;
4058 IrInstSrc *type_value;
36874059};
36884060
3689struct IrInstructionDeclRef {
3690 IrInstruction base;
4061struct IrInstSrcDeclRef {
4062 IrInstSrc base;
36914063
36924064 LVal lval;
36934065 Tld *tld;
36944066};
36954067
3696struct IrInstructionPanic {
3697 IrInstruction base;
4068struct IrInstSrcPanic {
4069 IrInstSrc base;
4070
4071 IrInstSrc *msg;
4072};
4073
4074struct IrInstGenPanic {
4075 IrInstGen base;
4076
4077 IrInstGen *msg;
4078};
4079
4080struct IrInstSrcTagName {
4081 IrInstSrc base;
4082
4083 IrInstSrc *target;
4084};
4085
4086struct IrInstGenTagName {
4087 IrInstGen base;
36984088
3699 IrInstruction *msg;
4089 IrInstGen *target;
37004090};
37014091
3702struct IrInstructionTagName {
3703 IrInstruction base;
4092struct IrInstSrcTagType {
4093 IrInstSrc base;
37044094
3705 IrInstruction *target;
4095 IrInstSrc *target;
37064096};
37074097
3708struct IrInstructionTagType {
3709 IrInstruction base;
4098struct IrInstSrcFieldParentPtr {
4099 IrInstSrc base;
37104100
3711 IrInstruction *target;
4101 IrInstSrc *type_value;
4102 IrInstSrc *field_name;
4103 IrInstSrc *field_ptr;
37124104};
37134105
3714struct IrInstructionFieldParentPtr {
3715 IrInstruction base;
4106struct IrInstGenFieldParentPtr {
4107 IrInstGen base;
37164108
3717 IrInstruction *type_value;
3718 IrInstruction *field_name;
3719 IrInstruction *field_ptr;
4109 IrInstGen *field_ptr;
37204110 TypeStructField *field;
37214111};
37224112
3723struct IrInstructionByteOffsetOf {
3724 IrInstruction base;
4113struct IrInstSrcByteOffsetOf {
4114 IrInstSrc base;
4115
4116 IrInstSrc *type_value;
4117 IrInstSrc *field_name;
4118};
4119
4120struct IrInstSrcBitOffsetOf {
4121 IrInstSrc base;
37254122
3726 IrInstruction *type_value;
3727 IrInstruction *field_name;
4123 IrInstSrc *type_value;
4124 IrInstSrc *field_name;
37284125};
37294126
3730struct IrInstructionBitOffsetOf {
3731 IrInstruction base;
4127struct IrInstSrcTypeInfo {
4128 IrInstSrc base;
37324129
3733 IrInstruction *type_value;
3734 IrInstruction *field_name;
4130 IrInstSrc *type_value;
37354131};
37364132
3737struct IrInstructionTypeInfo {
3738 IrInstruction base;
4133struct IrInstSrcType {
4134 IrInstSrc base;
37394135
3740 IrInstruction *type_value;
4136 IrInstSrc *type_info;
37414137};
37424138
3743struct IrInstructionType {
3744 IrInstruction base;
4139struct IrInstSrcHasField {
4140 IrInstSrc base;
37454141
3746 IrInstruction *type_info;
4142 IrInstSrc *container_type;
4143 IrInstSrc *field_name;
37474144};
37484145
3749struct IrInstructionHasField {
3750 IrInstruction base;
4146struct IrInstSrcTypeId {
4147 IrInstSrc base;
37514148
3752 IrInstruction *container_type;
3753 IrInstruction *field_name;
4149 IrInstSrc *type_value;
37544150};
37554151
3756struct IrInstructionTypeId {
3757 IrInstruction base;
4152struct IrInstSrcSetEvalBranchQuota {
4153 IrInstSrc base;
37584154
3759 IrInstruction *type_value;
4155 IrInstSrc *new_quota;
37604156};
37614157
3762struct IrInstructionSetEvalBranchQuota {
3763 IrInstruction base;
4158struct IrInstSrcAlignCast {
4159 IrInstSrc base;
37644160
3765 IrInstruction *new_quota;
4161 IrInstSrc *align_bytes;
4162 IrInstSrc *target;
37664163};
37674164
3768struct IrInstructionAlignCast {
3769 IrInstruction base;
4165struct IrInstGenAlignCast {
4166 IrInstGen base;
37704167
3771 IrInstruction *align_bytes;
3772 IrInstruction *target;
4168 IrInstGen *target;
37734169};
37744170
3775struct IrInstructionOpaqueType {
3776 IrInstruction base;
4171struct IrInstSrcOpaqueType {
4172 IrInstSrc base;
37774173};
37784174
3779struct IrInstructionSetAlignStack {
3780 IrInstruction base;
4175struct IrInstSrcSetAlignStack {
4176 IrInstSrc base;
37814177
3782 IrInstruction *align_bytes;
4178 IrInstSrc *align_bytes;
37834179};
37844180
3785struct IrInstructionArgType {
3786 IrInstruction base;
4181struct IrInstSrcArgType {
4182 IrInstSrc base;
37874183
3788 IrInstruction *fn_type;
3789 IrInstruction *arg_index;
4184 IrInstSrc *fn_type;
4185 IrInstSrc *arg_index;
37904186 bool allow_var;
37914187};
37924188
3793struct IrInstructionExport {
3794 IrInstruction base;
4189struct IrInstSrcExport {
4190 IrInstSrc base;
4191
4192 IrInstSrc *target;
4193 IrInstSrc *options;
4194};
4195
4196enum IrInstErrorReturnTraceOptional {
4197 IrInstErrorReturnTraceNull,
4198 IrInstErrorReturnTraceNonNull,
4199};
4200
4201struct IrInstSrcErrorReturnTrace {
4202 IrInstSrc base;
37954203
3796 IrInstruction *target;
3797 IrInstruction *options;
4204 IrInstErrorReturnTraceOptional optional;
37984205};
37994206
3800struct IrInstructionErrorReturnTrace {
3801 IrInstruction base;
4207struct IrInstGenErrorReturnTrace {
4208 IrInstGen base;
38024209
3803 enum Optional {
3804 Null,
3805 NonNull,
3806 } optional;
4210 IrInstErrorReturnTraceOptional optional;
38074211};
38084212
3809struct IrInstructionErrorUnion {
3810 IrInstruction base;
4213struct IrInstSrcErrorUnion {
4214 IrInstSrc base;
38114215
3812 IrInstruction *err_set;
3813 IrInstruction *payload;
4216 IrInstSrc *err_set;
4217 IrInstSrc *payload;
38144218 Buf *type_name;
38154219};
38164220
3817struct IrInstructionAtomicRmw {
3818 IrInstruction base;
4221struct IrInstSrcAtomicRmw {
4222 IrInstSrc base;
4223
4224 IrInstSrc *operand_type;
4225 IrInstSrc *ptr;
4226 IrInstSrc *op;
4227 IrInstSrc *operand;
4228 IrInstSrc *ordering;
4229};
4230
4231struct IrInstGenAtomicRmw {
4232 IrInstGen base;
4233
4234 IrInstGen *ptr;
4235 IrInstGen *operand;
4236 AtomicRmwOp op;
4237 AtomicOrder ordering;
4238};
4239
4240struct IrInstSrcAtomicLoad {
4241 IrInstSrc base;
4242
4243 IrInstSrc *operand_type;
4244 IrInstSrc *ptr;
4245 IrInstSrc *ordering;
4246};
4247
4248struct IrInstGenAtomicLoad {
4249 IrInstGen base;
38194250
3820 IrInstruction *operand_type;
3821 IrInstruction *ptr;
3822 IrInstruction *op;
3823 AtomicRmwOp resolved_op;
3824 IrInstruction *operand;
3825 IrInstruction *ordering;
3826 AtomicOrder resolved_ordering;
4251 IrInstGen *ptr;
4252 AtomicOrder ordering;
38274253};
38284254
3829struct IrInstructionAtomicLoad {
3830 IrInstruction base;
4255struct IrInstSrcAtomicStore {
4256 IrInstSrc base;
38314257
3832 IrInstruction *operand_type;
3833 IrInstruction *ptr;
3834 IrInstruction *ordering;
3835 AtomicOrder resolved_ordering;
4258 IrInstSrc *operand_type;
4259 IrInstSrc *ptr;
4260 IrInstSrc *value;
4261 IrInstSrc *ordering;
38364262};
38374263
3838struct IrInstructionAtomicStore {
3839 IrInstruction base;
4264struct IrInstGenAtomicStore {
4265 IrInstGen base;
4266
4267 IrInstGen *ptr;
4268 IrInstGen *value;
4269 AtomicOrder ordering;
4270};
38404271
3841 IrInstruction *operand_type;
3842 IrInstruction *ptr;
3843 IrInstruction *value;
3844 IrInstruction *ordering;
3845 AtomicOrder resolved_ordering;
4272struct IrInstSrcSaveErrRetAddr {
4273 IrInstSrc base;
38464274};
38474275
3848struct IrInstructionSaveErrRetAddr {
3849 IrInstruction base;
4276struct IrInstGenSaveErrRetAddr {
4277 IrInstGen base;
38504278};
38514279
3852struct IrInstructionAddImplicitReturnType {
3853 IrInstruction base;
4280struct IrInstSrcAddImplicitReturnType {
4281 IrInstSrc base;
38544282
3855 IrInstruction *value;
4283 IrInstSrc *value;
38564284 ResultLocReturn *result_loc_ret;
38574285};
38584286
3859// For float ops which take a single argument
3860struct IrInstructionFloatOp {
3861 IrInstruction base;
4287// For float ops that take a single argument
4288struct IrInstSrcFloatOp {
4289 IrInstSrc base;
4290
4291 IrInstSrc *operand;
4292 BuiltinFnId fn_id;
4293};
4294
4295struct IrInstGenFloatOp {
4296 IrInstGen base;
38624297
4298 IrInstGen *operand;
38634299 BuiltinFnId fn_id;
3864 IrInstruction *operand;
38654300};
38664301
3867struct IrInstructionCheckRuntimeScope {
3868 IrInstruction base;
4302struct IrInstSrcCheckRuntimeScope {
4303 IrInstSrc base;
4304
4305 IrInstSrc *scope_is_comptime;
4306 IrInstSrc *is_comptime;
4307};
4308
4309struct IrInstSrcBswap {
4310 IrInstSrc base;
4311
4312 IrInstSrc *type;
4313 IrInstSrc *op;
4314};
4315
4316struct IrInstGenBswap {
4317 IrInstGen base;
4318
4319 IrInstGen *op;
4320};
4321
4322struct IrInstSrcBitReverse {
4323 IrInstSrc base;
38694324
3870 IrInstruction *scope_is_comptime;
3871 IrInstruction *is_comptime;
4325 IrInstSrc *type;
4326 IrInstSrc *op;
38724327};
38734328
3874struct IrInstructionBswap {
3875 IrInstruction base;
4329struct IrInstGenBitReverse {
4330 IrInstGen base;
38764331
3877 IrInstruction *type;
3878 IrInstruction *op;
4332 IrInstGen *op;
38794333};
38804334
3881struct IrInstructionBitReverse {
3882 IrInstruction base;
4335struct IrInstGenArrayToVector {
4336 IrInstGen base;
38834337
3884 IrInstruction *type;
3885 IrInstruction *op;
4338 IrInstGen *array;
38864339};
38874340
3888struct IrInstructionArrayToVector {
3889 IrInstruction base;
4341struct IrInstGenVectorToArray {
4342 IrInstGen base;
38904343
3891 IrInstruction *array;
4344 IrInstGen *vector;
4345 IrInstGen *result_loc;
38924346};
38934347
3894struct IrInstructionVectorToArray {
3895 IrInstruction base;
4348struct IrInstSrcShuffleVector {
4349 IrInstSrc base;
38964350
3897 IrInstruction *vector;
3898 IrInstruction *result_loc;
4351 IrInstSrc *scalar_type;
4352 IrInstSrc *a;
4353 IrInstSrc *b;
4354 IrInstSrc *mask; // This is in zig-format, not llvm format
38994355};
39004356
3901struct IrInstructionShuffleVector {
3902 IrInstruction base;
4357struct IrInstGenShuffleVector {
4358 IrInstGen base;
39034359
3904 IrInstruction *scalar_type;
3905 IrInstruction *a;
3906 IrInstruction *b;
3907 IrInstruction *mask; // This is in zig-format, not llvm format
4360 IrInstGen *a;
4361 IrInstGen *b;
4362 IrInstGen *mask; // This is in zig-format, not llvm format
39084363};
39094364
3910struct IrInstructionSplatSrc {
3911 IrInstruction base;
4365struct IrInstSrcSplat {
4366 IrInstSrc base;
39124367
3913 IrInstruction *len;
3914 IrInstruction *scalar;
4368 IrInstSrc *len;
4369 IrInstSrc *scalar;
39154370};
39164371
3917struct IrInstructionSplatGen {
3918 IrInstruction base;
4372struct IrInstGenSplat {
4373 IrInstGen base;
39194374
3920 IrInstruction *scalar;
4375 IrInstGen *scalar;
39214376};
39224377
3923struct IrInstructionAssertZero {
3924 IrInstruction base;
4378struct IrInstGenAssertZero {
4379 IrInstGen base;
39254380
3926 IrInstruction *target;
4381 IrInstGen *target;
39274382};
39284383
3929struct IrInstructionAssertNonNull {
3930 IrInstruction base;
4384struct IrInstGenAssertNonNull {
4385 IrInstGen base;
39314386
3932 IrInstruction *target;
4387 IrInstGen *target;
39334388};
39344389
3935struct IrInstructionUnionInitNamedField {
3936 IrInstruction base;
4390struct IrInstSrcUnionInitNamedField {
4391 IrInstSrc base;
39374392
3938 IrInstruction *union_type;
3939 IrInstruction *field_name;
3940 IrInstruction *field_result_loc;
3941 IrInstruction *result_loc;
4393 IrInstSrc *union_type;
4394 IrInstSrc *field_name;
4395 IrInstSrc *field_result_loc;
4396 IrInstSrc *result_loc;
39424397};
39434398
3944struct IrInstructionHasDecl {
3945 IrInstruction base;
4399struct IrInstSrcHasDecl {
4400 IrInstSrc base;
39464401
3947 IrInstruction *container;
3948 IrInstruction *name;
4402 IrInstSrc *container;
4403 IrInstSrc *name;
39494404};
39504405
3951struct IrInstructionUndeclaredIdent {
3952 IrInstruction base;
4406struct IrInstSrcUndeclaredIdent {
4407 IrInstSrc base;
39534408
39544409 Buf *name;
39554410};
39564411
3957struct IrInstructionAllocaSrc {
3958 IrInstruction base;
4412struct IrInstSrcAlloca {
4413 IrInstSrc base;
39594414
3960 IrInstruction *align;
3961 IrInstruction *is_comptime;
4415 IrInstSrc *align;
4416 IrInstSrc *is_comptime;
39624417 const char *name_hint;
39634418};
39644419
3965struct IrInstructionAllocaGen {
3966 IrInstruction base;
4420struct IrInstGenAlloca {
4421 IrInstGen base;
39674422
39684423 uint32_t align;
39694424 const char *name_hint;
39704425 size_t field_index;
39714426};
39724427
3973struct IrInstructionEndExpr {
3974 IrInstruction base;
4428struct IrInstSrcEndExpr {
4429 IrInstSrc base;
39754430
3976 IrInstruction *value;
4431 IrInstSrc *value;
39774432 ResultLoc *result_loc;
39784433};
39794434
39804435// This one is for writing through the result pointer.
3981struct IrInstructionResolveResult {
3982 IrInstruction base;
4436struct IrInstSrcResolveResult {
4437 IrInstSrc base;
39834438
39844439 ResultLoc *result_loc;
3985 IrInstruction *ty;
4440 IrInstSrc *ty;
39864441};
39874442
3988// This one is when you want to read the value of the result.
3989// You have to give the value in case it is comptime.
3990struct IrInstructionResultPtr {
3991 IrInstruction base;
4443struct IrInstSrcResetResult {
4444 IrInstSrc base;
39924445
39934446 ResultLoc *result_loc;
3994 IrInstruction *result;
39954447};
39964448
3997struct IrInstructionResetResult {
3998 IrInstruction base;
4449struct IrInstGenPtrOfArrayToSlice {
4450 IrInstGen base;
39994451
4000 ResultLoc *result_loc;
4452 IrInstGen *operand;
4453 IrInstGen *result_loc;
40014454};
40024455
4003struct IrInstructionPtrOfArrayToSlice {
4004 IrInstruction base;
4005
4006 IrInstruction *operand;
4007 IrInstruction *result_loc;
4456struct IrInstSrcSuspendBegin {
4457 IrInstSrc base;
40084458};
40094459
4010struct IrInstructionSuspendBegin {
4011 IrInstruction base;
4460struct IrInstGenSuspendBegin {
4461 IrInstGen base;
40124462
40134463 LLVMBasicBlockRef resume_bb;
40144464};
40154465
4016struct IrInstructionSuspendFinish {
4017 IrInstruction base;
4466struct IrInstSrcSuspendFinish {
4467 IrInstSrc base;
4468
4469 IrInstSrcSuspendBegin *begin;
4470};
4471
4472struct IrInstGenSuspendFinish {
4473 IrInstGen base;
40184474
4019 IrInstructionSuspendBegin *begin;
4475 IrInstGenSuspendBegin *begin;
40204476};
40214477
4022struct IrInstructionAwaitSrc {
4023 IrInstruction base;
4478struct IrInstSrcAwait {
4479 IrInstSrc base;
40244480
4025 IrInstruction *frame;
4481 IrInstSrc *frame;
40264482 ResultLoc *result_loc;
40274483};
40284484
4029struct IrInstructionAwaitGen {
4030 IrInstruction base;
4485struct IrInstGenAwait {
4486 IrInstGen base;
40314487
4032 IrInstruction *frame;
4033 IrInstruction *result_loc;
4488 IrInstGen *frame;
4489 IrInstGen *result_loc;
40344490 ZigFn *target_fn;
40354491};
40364492
4037struct IrInstructionResume {
4038 IrInstruction base;
4493struct IrInstSrcResume {
4494 IrInstSrc base;
4495
4496 IrInstSrc *frame;
4497};
4498
4499struct IrInstGenResume {
4500 IrInstGen base;
40394501
4040 IrInstruction *frame;
4502 IrInstGen *frame;
40414503};
40424504
40434505enum SpillId {
......@@ -4045,24 +4507,37 @@ enum SpillId {
40454507 SpillIdRetErrCode,
40464508};
40474509
4048struct IrInstructionSpillBegin {
4049 IrInstruction base;
4510struct IrInstSrcSpillBegin {
4511 IrInstSrc base;
4512
4513 IrInstSrc *operand;
4514 SpillId spill_id;
4515};
4516
4517struct IrInstGenSpillBegin {
4518 IrInstGen base;
40504519
40514520 SpillId spill_id;
4052 IrInstruction *operand;
4521 IrInstGen *operand;
4522};
4523
4524struct IrInstSrcSpillEnd {
4525 IrInstSrc base;
4526
4527 IrInstSrcSpillBegin *begin;
40534528};
40544529
4055struct IrInstructionSpillEnd {
4056 IrInstruction base;
4530struct IrInstGenSpillEnd {
4531 IrInstGen base;
40574532
4058 IrInstructionSpillBegin *begin;
4533 IrInstGenSpillBegin *begin;
40594534};
40604535
4061struct IrInstructionVectorExtractElem {
4062 IrInstruction base;
4536struct IrInstGenVectorExtractElem {
4537 IrInstGen base;
40634538
4064 IrInstruction *vector;
4065 IrInstruction *index;
4539 IrInstGen *vector;
4540 IrInstGen *index;
40664541};
40674542
40684543enum ResultLocId {
......@@ -4083,9 +4558,9 @@ struct ResultLoc {
40834558 ResultLocId id;
40844559 bool written;
40854560 bool allow_write_through_const;
4086 IrInstruction *resolved_loc; // result ptr
4087 IrInstruction *source_instruction;
4088 IrInstruction *gen_instruction; // value to store to the result loc
4561 IrInstGen *resolved_loc; // result ptr
4562 IrInstSrc *source_instruction;
4563 IrInstGen *gen_instruction; // value to store to the result loc
40894564 ZigType *implicit_elem_type;
40904565};
40914566
......@@ -4115,18 +4590,18 @@ struct ResultLocPeerParent {
41154590
41164591 bool skipped;
41174592 bool done_resuming;
4118 IrBasicBlock *end_bb;
4593 IrBasicBlockSrc *end_bb;
41194594 ResultLoc *parent;
41204595 ZigList<ResultLocPeer *> peers;
41214596 ZigType *resolved_type;
4122 IrInstruction *is_comptime;
4597 IrInstSrc *is_comptime;
41234598};
41244599
41254600struct ResultLocPeer {
41264601 ResultLoc base;
41274602
41284603 ResultLocPeerParent *parent;
4129 IrBasicBlock *next_bb;
4604 IrBasicBlockSrc *next_bb;
41304605 IrSuspendPosition suspend_pos;
41314606};
41324607
......@@ -4197,7 +4672,7 @@ struct FnWalkAttrs {
41974672struct FnWalkCall {
41984673 ZigList<LLVMValueRef> *gen_param_values;
41994674 ZigList<ZigType *> *gen_param_types;
4200 IrInstructionCallGen *inst;
4675 IrInstGenCall *inst;
42014676 bool is_var_args;
42024677};
42034678
src/analyze.cpp+128-71
......@@ -199,7 +199,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent) {
199199 return scope;
200200}
201201
202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime) {
202Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime) {
203203 ScopeRuntime *scope = allocate<ScopeRuntime>(1);
204204 scope->is_comptime = is_comptime;
205205 init_scope(g, &scope->base, ScopeIdRuntime, node, parent);
......@@ -1120,7 +1120,7 @@ ZigValue *analyze_const_value(CodeGen *g, Scope *scope, AstNode *node, ZigType *
11201120 &backward_branch_count, &backward_branch_quota,
11211121 nullptr, nullptr, node, type_name, nullptr, nullptr, undef)))
11221122 {
1123 return g->invalid_instruction->value;
1123 return g->invalid_inst_gen->value;
11241124 }
11251125 destroy(result_ptr, "ZigValue");
11261126 return result;
......@@ -2586,15 +2586,8 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
25862586 return ErrorSemanticAnalyzeFail;
25872587 }
25882588
2589 enum_type->data.enumeration.src_field_count = field_count;
2590 enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
2591 enum_type->data.enumeration.fields_by_name.init(field_count);
2592
25932589 Scope *scope = &enum_type->data.enumeration.decls_scope->base;
25942590
2595 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
2596 occupied_tag_values.init(field_count);
2597
25982591 ZigType *tag_int_type;
25992592 if (enum_type->data.enumeration.layout == ContainerLayoutExtern) {
26002593 tag_int_type = get_c_int_type(g, CIntTypeInt);
......@@ -2629,13 +2622,14 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
26292622 buf_ptr(&wanted_tag_int_type->name)));
26302623 add_error_note(g, msg, decl_node->data.container_decl.init_arg_expr,
26312624 buf_sprintf("any integral type of size 8, 16, 32, 64 or 128 bit is valid"));
2632 return ErrorNone;
2625 return ErrorSemanticAnalyzeFail;
26332626 }
26342627 }
26352628 tag_int_type = wanted_tag_int_type;
26362629 }
26372630 }
26382631
2632 enum_type->data.enumeration.non_exhaustive = false;
26392633 enum_type->data.enumeration.tag_int_type = tag_int_type;
26402634 enum_type->size_in_bits = tag_int_type->size_in_bits;
26412635 enum_type->abi_size = tag_int_type->abi_size;
......@@ -2644,6 +2638,31 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
26442638 BigInt bi_one;
26452639 bigint_init_unsigned(&bi_one, 1);
26462640
2641 AstNode *last_field_node = decl_node->data.container_decl.fields.at(field_count - 1);
2642 if (buf_eql_str(last_field_node->data.struct_field.name, "_")) {
2643 field_count -= 1;
2644 if (field_count > 1 && log2_u64(field_count) == enum_type->size_in_bits) {
2645 add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum specifies every value"));
2646 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2647 }
2648 if (decl_node->data.container_decl.init_arg_expr == nullptr) {
2649 add_node_error(g, last_field_node, buf_sprintf("non-exhaustive enum must specify size"));
2650 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2651 }
2652 if (last_field_node->data.struct_field.value != nullptr) {
2653 add_node_error(g, last_field_node, buf_sprintf("value assigned to '_' field of non-exhaustive enum"));
2654 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2655 }
2656 enum_type->data.enumeration.non_exhaustive = true;
2657 }
2658
2659 enum_type->data.enumeration.src_field_count = field_count;
2660 enum_type->data.enumeration.fields = allocate<TypeEnumField>(field_count);
2661 enum_type->data.enumeration.fields_by_name.init(field_count);
2662
2663 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> occupied_tag_values = {};
2664 occupied_tag_values.init(field_count);
2665
26472666 TypeEnumField *last_enum_field = nullptr;
26482667
26492668 for (uint32_t field_i = 0; field_i < field_count; field_i += 1) {
......@@ -2665,6 +2684,11 @@ static Error resolve_enum_zero_bits(CodeGen *g, ZigType *enum_type) {
26652684 buf_sprintf("consider 'union(enum)' here"));
26662685 }
26672686
2687 if (buf_eql_str(type_enum_field->name, "_")) {
2688 add_node_error(g, field_node, buf_sprintf("'_' field of non-exhaustive enum must be last"));
2689 enum_type->data.enumeration.resolve_status = ResolveStatusInvalid;
2690 }
2691
26682692 auto field_entry = enum_type->data.enumeration.fields_by_name.put_unique(type_enum_field->name, type_enum_field);
26692693 if (field_entry != nullptr) {
26702694 ErrorMsg *msg = add_node_error(g, field_node,
......@@ -3343,7 +3367,7 @@ static void get_fully_qualified_decl_name(CodeGen *g, Buf *buf, Tld *tld, bool i
33433367
33443368ZigFn *create_fn_raw(CodeGen *g, FnInline inline_value) {
33453369 ZigFn *fn_entry = allocate<ZigFn>(1, "ZigFn");
3346 fn_entry->ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
3370 fn_entry->ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
33473371
33483372 fn_entry->prealloc_backward_branch_quota = default_backward_branch_quota;
33493373
......@@ -4089,7 +4113,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
40894113 if (type_is_invalid(result->type)) {
40904114 dest_decls_scope->any_imports_failed = true;
40914115 using_namespace->base.resolution = TldResolutionInvalid;
4092 using_namespace->using_namespace_value = g->invalid_instruction->value;
4116 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
40934117 return;
40944118 }
40954119
......@@ -4098,7 +4122,7 @@ static void preview_use_decl(CodeGen *g, TldUsingNamespace *using_namespace, Sco
40984122 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&result->data.x_type->name)));
40994123 dest_decls_scope->any_imports_failed = true;
41004124 using_namespace->base.resolution = TldResolutionInvalid;
4101 using_namespace->using_namespace_value = g->invalid_instruction->value;
4125 using_namespace->using_namespace_value = g->invalid_inst_gen->value;
41024126 return;
41034127 }
41044128}
......@@ -4659,12 +4683,12 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
46594683 }
46604684
46614685 for (size_t i = 0; i < fn->call_list.length; i += 1) {
4662 IrInstructionCallGen *call = fn->call_list.at(i);
4686 IrInstGenCall *call = fn->call_list.at(i);
46634687 if (call->fn_entry == nullptr) {
46644688 // TODO function pointer call here, could be anything
46654689 continue;
46664690 }
4667 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.source_node, must_not_be_async,
4691 switch (analyze_callee_async(g, fn, call->fn_entry, call->base.base.source_node, must_not_be_async,
46684692 call->modifier))
46694693 {
46704694 case ErrorSemanticAnalyzeFail:
......@@ -4682,10 +4706,10 @@ static void analyze_fn_async(CodeGen *g, ZigFn *fn, bool resolve_frame) {
46824706 }
46834707 }
46844708 for (size_t i = 0; i < fn->await_list.length; i += 1) {
4685 IrInstructionAwaitGen *await = fn->await_list.at(i);
4709 IrInstGenAwait *await = fn->await_list.at(i);
46864710 // TODO If this is a noasync await, it doesn't count
46874711 // https://github.com/ziglang/zig/issues/3157
4688 switch (analyze_callee_async(g, fn, await->target_fn, await->base.source_node, must_not_be_async,
4712 switch (analyze_callee_async(g, fn, await->target_fn, await->base.base.source_node, must_not_be_async,
46894713 CallModifierNone))
46904714 {
46914715 case ErrorSemanticAnalyzeFail:
......@@ -4782,7 +4806,7 @@ static void analyze_fn_ir(CodeGen *g, ZigFn *fn, AstNode *return_type_node) {
47824806
47834807 if (g->verbose_ir) {
47844808 fprintf(stderr, "fn %s() { // (analyzed)\n", buf_ptr(&fn->symbol_name));
4785 ir_print(g, stderr, &fn->analyzed_executable, 4, IrPassGen);
4809 ir_print_gen(g, stderr, &fn->analyzed_executable, 4);
47864810 fprintf(stderr, "}\n");
47874811 }
47884812 fn->anal_state = FnAnalStateComplete;
......@@ -4825,7 +4849,7 @@ static void analyze_fn_body(CodeGen *g, ZigFn *fn_table_entry) {
48254849 fprintf(stderr, "\n");
48264850 ast_render(stderr, fn_table_entry->body_node, 4);
48274851 fprintf(stderr, "\nfn %s() { // (IR)\n", buf_ptr(&fn_table_entry->symbol_name));
4828 ir_print(g, stderr, fn_table_entry->ir_executable, 4, IrPassSrc);
4852 ir_print_src(g, stderr, fn_table_entry->ir_executable, 4);
48294853 fprintf(stderr, "}\n");
48304854 }
48314855
......@@ -6189,13 +6213,13 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
61896213 ZigType *fn_type = get_async_fn_type(g, fn->type_entry);
61906214
61916215 if (fn->analyzed_executable.need_err_code_spill) {
6192 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
6193 alloca_gen->base.id = IrInstructionIdAllocaGen;
6194 alloca_gen->base.source_node = fn->proto_node;
6195 alloca_gen->base.scope = fn->child_scope;
6216 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
6217 alloca_gen->base.id = IrInstGenIdAlloca;
6218 alloca_gen->base.base.source_node = fn->proto_node;
6219 alloca_gen->base.base.scope = fn->child_scope;
61966220 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
61976221 alloca_gen->base.value->type = get_pointer_to_type(g, g->builtin_types.entry_global_error_set, false);
6198 alloca_gen->base.ref_count = 1;
6222 alloca_gen->base.base.ref_count = 1;
61996223 alloca_gen->name_hint = "";
62006224 fn->alloca_gen_list.append(alloca_gen);
62016225 fn->err_code_spill = &alloca_gen->base;
......@@ -6203,18 +6227,18 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62036227
62046228 ZigType *largest_call_frame_type = nullptr;
62056229 // Later we'll change this to be largest_call_frame_type instead of void.
6206 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
6230 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn->fndef_scope->base, fn->body_node,
62076231 fn, g->builtin_types.entry_void, "@async_call_frame");
62086232
62096233 for (size_t i = 0; i < fn->call_list.length; i += 1) {
6210 IrInstructionCallGen *call = fn->call_list.at(i);
6234 IrInstGenCall *call = fn->call_list.at(i);
62116235 if (call->new_stack != nullptr) {
62126236 // don't need to allocate a frame for this
62136237 continue;
62146238 }
62156239 ZigFn *callee = call->fn_entry;
62166240 if (callee == nullptr) {
6217 add_node_error(g, call->base.source_node,
6241 add_node_error(g, call->base.base.source_node,
62186242 buf_sprintf("function is not comptime-known; @asyncCall required"));
62196243 return ErrorSemanticAnalyzeFail;
62206244 }
......@@ -6224,14 +6248,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62246248 if (callee->anal_state == FnAnalStateProbing) {
62256249 ErrorMsg *msg = add_node_error(g, fn->proto_node,
62266250 buf_sprintf("unable to determine async function frame of '%s'", buf_ptr(&fn->symbol_name)));
6227 g->trace_err = add_error_note(g, msg, call->base.source_node,
6251 g->trace_err = add_error_note(g, msg, call->base.base.source_node,
62286252 buf_sprintf("analysis of function '%s' depends on the frame", buf_ptr(&callee->symbol_name)));
62296253 return ErrorSemanticAnalyzeFail;
62306254 }
62316255
62326256 ZigType *callee_frame_type = get_fn_frame_type(g, callee);
62336257 frame_type->data.frame.resolve_loop_type = callee_frame_type;
6234 frame_type->data.frame.resolve_loop_src_node = call->base.source_node;
6258 frame_type->data.frame.resolve_loop_src_node = call->base.base.source_node;
62356259
62366260 analyze_fn_body(g, callee);
62376261 if (callee->anal_state == FnAnalStateInvalid) {
......@@ -6247,7 +6271,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62476271 if (!fn_is_async(callee))
62486272 continue;
62496273
6250 mark_suspension_point(call->base.scope);
6274 mark_suspension_point(call->base.base.scope);
62516275
62526276 if ((err = type_resolve(g, callee_frame_type, ResolveStatusSizeKnown))) {
62536277 return err;
......@@ -6269,7 +6293,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62696293 // For example: foo() + await z
62706294 // The funtion call result of foo() must be spilled.
62716295 for (size_t i = 0; i < fn->await_list.length; i += 1) {
6272 IrInstructionAwaitGen *await = fn->await_list.at(i);
6296 IrInstGenAwait *await = fn->await_list.at(i);
62736297 // TODO If this is a noasync await, it doesn't suspend
62746298 // https://github.com/ziglang/zig/issues/3157
62756299 if (await->base.value->special != ConstValSpecialRuntime) {
......@@ -6291,52 +6315,51 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
62916315 }
62926316 // This await is a suspend point, but it might not need a spill.
62936317 // We do need to mark the ExprScope as having a suspend point in it.
6294 mark_suspension_point(await->base.scope);
6318 mark_suspension_point(await->base.base.scope);
62956319
62966320 if (await->result_loc != nullptr) {
62976321 // If there's a result location, that is the spill
62986322 continue;
62996323 }
6300 if (await->base.ref_count == 0)
6324 if (await->base.base.ref_count == 0)
63016325 continue;
63026326 if (!type_has_bits(await->base.value->type))
63036327 continue;
6304 await->result_loc = ir_create_alloca(g, await->base.scope, await->base.source_node, fn,
6328 await->result_loc = ir_create_alloca(g, await->base.base.scope, await->base.base.source_node, fn,
63056329 await->base.value->type, "");
63066330 }
63076331 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6308 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
6332 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
63096333 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6310 IrInstruction *instruction = block->instruction_list.at(instr_i);
6311 if (instruction->id == IrInstructionIdSuspendFinish) {
6312 mark_suspension_point(instruction->scope);
6334 IrInstGen *instruction = block->instruction_list.at(instr_i);
6335 if (instruction->id == IrInstGenIdSuspendFinish) {
6336 mark_suspension_point(instruction->base.scope);
63136337 }
63146338 }
63156339 }
63166340 // Now that we've marked all the expr scopes that have to spill, we go over the instructions
63176341 // and spill the relevant ones.
63186342 for (size_t block_i = 0; block_i < fn->analyzed_executable.basic_block_list.length; block_i += 1) {
6319 IrBasicBlock *block = fn->analyzed_executable.basic_block_list.at(block_i);
6343 IrBasicBlockGen *block = fn->analyzed_executable.basic_block_list.at(block_i);
63206344 for (size_t instr_i = 0; instr_i < block->instruction_list.length; instr_i += 1) {
6321 IrInstruction *instruction = block->instruction_list.at(instr_i);
6322 if (instruction->id == IrInstructionIdAwaitGen ||
6323 instruction->id == IrInstructionIdVarPtr ||
6324 instruction->id == IrInstructionIdDeclRef ||
6325 instruction->id == IrInstructionIdAllocaGen)
6345 IrInstGen *instruction = block->instruction_list.at(instr_i);
6346 if (instruction->id == IrInstGenIdAwait ||
6347 instruction->id == IrInstGenIdVarPtr ||
6348 instruction->id == IrInstGenIdAlloca)
63266349 {
63276350 // This instruction does its own spilling specially, or otherwise doesn't need it.
63286351 continue;
63296352 }
63306353 if (instruction->value->special != ConstValSpecialRuntime)
63316354 continue;
6332 if (instruction->ref_count == 0)
6355 if (instruction->base.ref_count == 0)
63336356 continue;
63346357 if ((err = type_resolve(g, instruction->value->type, ResolveStatusZeroBitsKnown)))
63356358 return ErrorSemanticAnalyzeFail;
63366359 if (!type_has_bits(instruction->value->type))
63376360 continue;
6338 if (scope_needs_spill(instruction->scope)) {
6339 instruction->spill = ir_create_alloca(g, instruction->scope, instruction->source_node,
6361 if (scope_needs_spill(instruction->base.scope)) {
6362 instruction->spill = ir_create_alloca(g, instruction->base.scope, instruction->base.source_node,
63406363 fn, instruction->value->type, "");
63416364 }
63426365 }
......@@ -6387,14 +6410,14 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
63876410 }
63886411
63896412 for (size_t alloca_i = 0; alloca_i < fn->alloca_gen_list.length; alloca_i += 1) {
6390 IrInstructionAllocaGen *instruction = fn->alloca_gen_list.at(alloca_i);
6413 IrInstGenAlloca *instruction = fn->alloca_gen_list.at(alloca_i);
63916414 instruction->field_index = SIZE_MAX;
63926415 ZigType *ptr_type = instruction->base.value->type;
63936416 assert(ptr_type->id == ZigTypeIdPointer);
63946417 ZigType *child_type = ptr_type->data.pointer.child_type;
63956418 if (!type_has_bits(child_type))
63966419 continue;
6397 if (instruction->base.ref_count == 0)
6420 if (instruction->base.base.ref_count == 0)
63986421 continue;
63996422 if (instruction->base.value->special != ConstValSpecialRuntime) {
64006423 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
......@@ -6405,7 +6428,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
64056428 }
64066429
64076430 frame_type->data.frame.resolve_loop_type = child_type;
6408 frame_type->data.frame.resolve_loop_src_node = instruction->base.source_node;
6431 frame_type->data.frame.resolve_loop_src_node = instruction->base.base.source_node;
64096432 if ((err = type_resolve(g, child_type, ResolveStatusSizeKnown))) {
64106433 return err;
64116434 }
......@@ -6419,7 +6442,7 @@ static Error resolve_async_frame(CodeGen *g, ZigType *frame_type) {
64196442 instruction->field_index = fields.length;
64206443
64216444 src_assert(child_type->id != ZigTypeIdPointer || child_type->data.pointer.inferred_struct_field == nullptr,
6422 instruction->base.source_node);
6445 instruction->base.base.source_node);
64236446 fields.append({name, child_type, instruction->align});
64246447 }
64256448
......@@ -6552,8 +6575,10 @@ bool ir_get_var_is_comptime(ZigVar *var) {
65526575 // As an optimization, is_comptime values which are constant are allowed
65536576 // to be omitted from analysis. In this case, there is no child instruction
65546577 // and we simply look at the unanalyzed const parent instruction.
6555 assert(var->is_comptime->value->type->id == ZigTypeIdBool);
6556 var->is_comptime_memoized_value = var->is_comptime->value->data.x_bool;
6578 assert(var->is_comptime->id == IrInstSrcIdConst);
6579 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(var->is_comptime);
6580 assert(const_inst->value->type->id == ZigTypeIdBool);
6581 var->is_comptime_memoized_value = const_inst->value->data.x_bool;
65576582 var->is_comptime = nullptr;
65586583 return var->is_comptime_memoized_value;
65596584}
......@@ -8315,7 +8340,7 @@ static void resolve_llvm_types_enum(CodeGen *g, ZigType *enum_type, ResolveStatu
83158340
83168341 uint32_t field_count = enum_type->data.enumeration.src_field_count;
83178342
8318 assert(enum_type->data.enumeration.fields);
8343 assert(field_count == 0 || enum_type->data.enumeration.fields != nullptr);
83198344 ZigLLVMDIEnumerator **di_enumerators = allocate<ZigLLVMDIEnumerator*>(field_count);
83208345
83218346 for (uint32_t i = 0; i < field_count; i += 1) {
......@@ -9196,21 +9221,6 @@ void src_assert(bool ok, AstNode *source_node) {
91969221 stage2_panic(msg, strlen(msg));
91979222}
91989223
9199IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
9200 ZigType *var_type, const char *name_hint)
9201{
9202 IrInstructionAllocaGen *alloca_gen = allocate<IrInstructionAllocaGen>(1);
9203 alloca_gen->base.id = IrInstructionIdAllocaGen;
9204 alloca_gen->base.source_node = source_node;
9205 alloca_gen->base.scope = scope;
9206 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
9207 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
9208 alloca_gen->base.ref_count = 1;
9209 alloca_gen->name_hint = name_hint;
9210 fn->alloca_gen_list.append(alloca_gen);
9211 return &alloca_gen->base;
9212}
9213
92149224Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
92159225 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path)
92169226{
......@@ -9271,8 +9281,17 @@ Error analyze_import(CodeGen *g, ZigType *source_import, Buf *import_target_str,
92719281}
92729282
92739283
9274void IrExecutable::src() {
9275 IrExecutable *it;
9284void IrExecutableSrc::src() {
9285 if (this->source_node != nullptr) {
9286 this->source_node->src();
9287 }
9288 if (this->parent_exec != nullptr) {
9289 this->parent_exec->src();
9290 }
9291}
9292
9293void IrExecutableGen::src() {
9294 IrExecutableGen *it;
92769295 for (it = this; it != nullptr && it->source_node != nullptr; it = it->parent_exec) {
92779296 it->source_node->src();
92789297 }
......@@ -9523,3 +9542,41 @@ static void dump_value_indent(ZigValue *val, int indent) {
95239542void ZigValue::dump() {
95249543 dump_value_indent(this, 0);
95259544}
9545
9546// float ops that take a single argument
9547//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign, lround, llround, lrint, llrint
9548const char *float_op_to_name(BuiltinFnId op) {
9549 switch (op) {
9550 case BuiltinFnIdSqrt:
9551 return "sqrt";
9552 case BuiltinFnIdSin:
9553 return "sin";
9554 case BuiltinFnIdCos:
9555 return "cos";
9556 case BuiltinFnIdExp:
9557 return "exp";
9558 case BuiltinFnIdExp2:
9559 return "exp2";
9560 case BuiltinFnIdLog:
9561 return "log";
9562 case BuiltinFnIdLog10:
9563 return "log10";
9564 case BuiltinFnIdLog2:
9565 return "log2";
9566 case BuiltinFnIdFabs:
9567 return "fabs";
9568 case BuiltinFnIdFloor:
9569 return "floor";
9570 case BuiltinFnIdCeil:
9571 return "ceil";
9572 case BuiltinFnIdTrunc:
9573 return "trunc";
9574 case BuiltinFnIdNearbyInt:
9575 return "nearbyint";
9576 case BuiltinFnIdRound:
9577 return "round";
9578 default:
9579 zig_unreachable();
9580 }
9581}
9582
src/analyze.hpp+2-3
......@@ -120,7 +120,7 @@ ScopeLoop *create_loop_scope(CodeGen *g, AstNode *node, Scope *parent);
120120ScopeSuspend *create_suspend_scope(CodeGen *g, AstNode *node, Scope *parent);
121121ScopeFnDef *create_fndef_scope(CodeGen *g, AstNode *node, Scope *parent, ZigFn *fn_entry);
122122Scope *create_comptime_scope(CodeGen *g, AstNode *node, Scope *parent);
123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstruction *is_comptime);
123Scope *create_runtime_scope(CodeGen *g, AstNode *node, Scope *parent, IrInstSrc *is_comptime);
124124Scope *create_typeof_scope(CodeGen *g, AstNode *node, Scope *parent);
125125ScopeExpr *create_expr_scope(CodeGen *g, AstNode *node, Scope *parent);
126126
......@@ -271,8 +271,6 @@ ZigType *resolve_struct_field_type(CodeGen *g, TypeStructField *struct_field);
271271
272272void add_async_error_notes(CodeGen *g, ErrorMsg *msg, ZigFn *fn);
273273
274IrInstruction *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
275 ZigType *var_type, const char *name_hint);
276274Error analyze_import(CodeGen *codegen, ZigType *source_import, Buf *import_target_str,
277275 ZigType **out_import, Buf **out_import_target_path, Buf *out_full_path);
278276ZigValue *get_the_one_possible_value(CodeGen *g, ZigType *type_entry);
......@@ -281,4 +279,5 @@ void copy_const_val(ZigValue *dest, ZigValue *src);
281279bool type_has_optional_repr(ZigType *ty);
282280bool is_opt_err_set(ZigType *ty);
283281bool type_is_numeric(ZigType *ty);
282const char *float_op_to_name(BuiltinFnId op);
284283#endif
src/codegen.cpp+467-517
......@@ -31,11 +31,6 @@ enum ResumeId {
3131 ResumeIdCall,
3232};
3333
34// TODO https://github.com/ziglang/zig/issues/2883
35// Until then we have this same default as Clang.
36// This avoids https://github.com/ziglang/zig/issues/3275
37static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax";
38
3934static void init_darwin_native(CodeGen *g) {
4035 char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET");
4136 char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET");
......@@ -192,7 +187,7 @@ static void generate_error_name_table(CodeGen *g);
192187static bool value_is_all_undef(CodeGen *g, ZigValue *const_val);
193188static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_type, LLVMValueRef ptr);
194189static LLVMValueRef build_alloca(CodeGen *g, ZigType *type_entry, const char *name, uint32_t alignment);
195static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
190static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
196191 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
197192 LLVMValueRef result_loc, bool non_async);
198193static Error get_tmp_filename(CodeGen *g, Buf *out, Buf *suffix);
......@@ -878,14 +873,14 @@ static LLVMValueRef get_handle_value(CodeGen *g, LLVMValueRef ptr, ZigType *type
878873 }
879874}
880875
881static void ir_assert(bool ok, IrInstruction *source_instruction) {
876static void ir_assert(bool ok, IrInstGen *source_instruction) {
882877 if (ok) return;
883 src_assert(ok, source_instruction->source_node);
878 src_assert(ok, source_instruction->base.source_node);
884879}
885880
886static bool ir_want_fast_math(CodeGen *g, IrInstruction *instruction) {
881static bool ir_want_fast_math(CodeGen *g, IrInstGen *instruction) {
887882 // TODO memoize
888 Scope *scope = instruction->scope;
883 Scope *scope = instruction->base.scope;
889884 while (scope) {
890885 if (scope->id == ScopeIdBlock) {
891886 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -920,8 +915,8 @@ static bool ir_want_runtime_safety_scope(CodeGen *g, Scope *scope) {
920915 g->build_mode != BuildModeSmallRelease);
921916}
922917
923static bool ir_want_runtime_safety(CodeGen *g, IrInstruction *instruction) {
924 return ir_want_runtime_safety_scope(g, instruction->scope);
918static bool ir_want_runtime_safety(CodeGen *g, IrInstGen *instruction) {
919 return ir_want_runtime_safety_scope(g, instruction->base.scope);
925920}
926921
927922static Buf *panic_msg_buf(PanicMsgId msg_id) {
......@@ -1047,8 +1042,8 @@ static void gen_assertion_scope(CodeGen *g, PanicMsgId msg_id, Scope *source_sco
10471042 }
10481043}
10491044
1050static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstruction *source_instruction) {
1051 return gen_assertion_scope(g, msg_id, source_instruction->scope);
1045static void gen_assertion(CodeGen *g, PanicMsgId msg_id, IrInstGen *source_instruction) {
1046 return gen_assertion_scope(g, msg_id, source_instruction->base.scope);
10521047}
10531048
10541049static LLVMValueRef get_stacksave_fn_val(CodeGen *g) {
......@@ -1762,7 +1757,7 @@ static void gen_var_debug_decl(CodeGen *g, ZigVar *var) {
17621757 LLVMGetInsertBlock(g->builder));
17631758}
17641759
1765static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
1760static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstGen *instruction) {
17661761 Error err;
17671762
17681763 bool value_has_bits;
......@@ -1773,8 +1768,8 @@ static LLVMValueRef ir_llvm_value(CodeGen *g, IrInstruction *instruction) {
17731768 return nullptr;
17741769
17751770 if (!instruction->llvm_value) {
1776 if (instruction->id == IrInstructionIdAwaitGen) {
1777 IrInstructionAwaitGen *await = reinterpret_cast<IrInstructionAwaitGen*>(instruction);
1771 if (instruction->id == IrInstGenIdAwait) {
1772 IrInstGenAwait *await = reinterpret_cast<IrInstGenAwait*>(instruction);
17781773 if (await->result_loc != nullptr) {
17791774 return get_handle_value(g, ir_llvm_value(g, await->result_loc),
17801775 await->result_loc->value->type->data.pointer.child_type, await->result_loc->value->type);
......@@ -1857,9 +1852,9 @@ static bool iter_function_params_c_abi(CodeGen *g, ZigType *fn_type, FnWalk *fn_
18571852 case FnWalkIdCall: {
18581853 if (src_i >= fn_walk->data.call.inst->arg_count)
18591854 return false;
1860 IrInstruction *arg = fn_walk->data.call.inst->args[src_i];
1855 IrInstGen *arg = fn_walk->data.call.inst->args[src_i];
18611856 ty = arg->value->type;
1862 source_node = arg->source_node;
1857 source_node = arg->base.source_node;
18631858 val = ir_llvm_value(g, arg);
18641859 break;
18651860 }
......@@ -2092,10 +2087,10 @@ void walk_function_params(CodeGen *g, ZigType *fn_type, FnWalk *fn_walk) {
20922087 return;
20932088 }
20942089 if (fn_walk->id == FnWalkIdCall) {
2095 IrInstructionCallGen *instruction = fn_walk->data.call.inst;
2090 IrInstGenCall *instruction = fn_walk->data.call.inst;
20962091 bool is_var_args = fn_walk->data.call.is_var_args;
20972092 for (size_t call_i = 0; call_i < instruction->arg_count; call_i += 1) {
2098 IrInstruction *param_instruction = instruction->args[call_i];
2093 IrInstGen *param_instruction = instruction->args[call_i];
20992094 ZigType *param_type = param_instruction->value->type;
21002095 if (is_var_args || type_has_bits(param_type)) {
21012096 LLVMValueRef param_value = ir_llvm_value(g, param_instruction);
......@@ -2310,14 +2305,14 @@ static LLVMValueRef get_merge_err_ret_traces_fn_val(CodeGen *g) {
23102305 return fn_val;
23112306
23122307}
2313static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *executable,
2314 IrInstructionSaveErrRetAddr *save_err_ret_addr_instruction)
2308static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutableGen *executable,
2309 IrInstGenSaveErrRetAddr *save_err_ret_addr_instruction)
23152310{
23162311 assert(g->have_err_ret_tracing);
23172312
23182313 LLVMValueRef return_err_fn = get_return_err_fn(g);
23192314 bool is_llvm_alloca;
2320 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.scope,
2315 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, save_err_ret_addr_instruction->base.base.scope,
23212316 &is_llvm_alloca);
23222317 ZigLLVMBuildCall(g->builder, return_err_fn, &my_err_trace_val, 1,
23232318 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -2332,7 +2327,7 @@ static LLVMValueRef ir_render_save_err_ret_addr(CodeGen *g, IrExecutable *execut
23322327 return nullptr;
23332328}
23342329
2335static void gen_assert_resume_id(CodeGen *g, IrInstruction *source_instr, ResumeId resume_id, PanicMsgId msg_id,
2330static void gen_assert_resume_id(CodeGen *g, IrInstGen *source_instr, ResumeId resume_id, PanicMsgId msg_id,
23362331 LLVMBasicBlockRef end_bb)
23372332{
23382333 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
......@@ -2409,7 +2404,7 @@ static LLVMValueRef gen_maybe_atomic_op(CodeGen *g, LLVMAtomicRMWBinOp op, LLVMV
24092404 }
24102405}
24112406
2412static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
2407static void gen_async_return(CodeGen *g, IrInstGenReturn *instruction) {
24132408 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
24142409
24152410 ZigType *operand_type = (instruction->operand != nullptr) ? instruction->operand->value->type : nullptr;
......@@ -2488,7 +2483,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
24882483 frame_index_trace_arg(g, ret_type) + 1, "");
24892484 LLVMValueRef dest_trace_ptr = LLVMBuildLoad(g->builder, awaiter_trace_ptr_ptr, "");
24902485 bool is_llvm_alloca;
2491 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
2486 LLVMValueRef my_err_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
24922487 LLVMValueRef args[] = { dest_trace_ptr, my_err_trace_val };
24932488 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
24942489 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -2503,7 +2498,7 @@ static void gen_async_return(CodeGen *g, IrInstructionReturn *instruction) {
25032498 LLVMBuildRetVoid(g->builder);
25042499}
25052500
2506static LLVMValueRef ir_render_return(CodeGen *g, IrExecutable *executable, IrInstructionReturn *instruction) {
2501static LLVMValueRef ir_render_return(CodeGen *g, IrExecutableGen *executable, IrInstGenReturn *instruction) {
25072502 if (fn_is_async(g->cur_fn)) {
25082503 gen_async_return(g, instruction);
25092504 return nullptr;
......@@ -2844,12 +2839,12 @@ static LLVMValueRef gen_rem(CodeGen *g, bool want_runtime_safety, bool want_fast
28442839
28452840}
28462841
2847static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutable *executable,
2848 IrInstructionBinOp *bin_op_instruction)
2842static LLVMValueRef ir_render_bin_op(CodeGen *g, IrExecutableGen *executable,
2843 IrInstGenBinOp *bin_op_instruction)
28492844{
28502845 IrBinOp op_id = bin_op_instruction->op_id;
2851 IrInstruction *op1 = bin_op_instruction->op1;
2852 IrInstruction *op2 = bin_op_instruction->op2;
2846 IrInstGen *op1 = bin_op_instruction->op1;
2847 IrInstGen *op2 = bin_op_instruction->op2;
28532848
28542849 ZigType *operand_type = op1->value->type;
28552850 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
......@@ -3054,8 +3049,8 @@ static void add_error_range_check(CodeGen *g, ZigType *err_set_type, ZigType *in
30543049 }
30553050}
30563051
3057static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
3058 IrInstructionResizeSlice *instruction)
3052static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutableGen *executable,
3053 IrInstGenResizeSlice *instruction)
30593054{
30603055 ZigType *actual_type = instruction->operand->value->type;
30613056 ZigType *wanted_type = instruction->base.value->type;
......@@ -3122,8 +3117,8 @@ static LLVMValueRef ir_render_resize_slice(CodeGen *g, IrExecutable *executable,
31223117 return result_loc;
31233118}
31243119
3125static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
3126 IrInstructionCast *cast_instruction)
3120static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutableGen *executable,
3121 IrInstGenCast *cast_instruction)
31273122{
31283123 ZigType *actual_type = cast_instruction->value->value->type;
31293124 ZigType *wanted_type = cast_instruction->base.value->type;
......@@ -3200,8 +3195,8 @@ static LLVMValueRef ir_render_cast(CodeGen *g, IrExecutable *executable,
32003195 zig_unreachable();
32013196}
32023197
3203static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *executable,
3204 IrInstructionPtrOfArrayToSlice *instruction)
3198static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutableGen *executable,
3199 IrInstGenPtrOfArrayToSlice *instruction)
32053200{
32063201 ZigType *actual_type = instruction->operand->value->type;
32073202 ZigType *slice_type = instruction->base.value->type;
......@@ -3237,8 +3232,8 @@ static LLVMValueRef ir_render_ptr_of_array_to_slice(CodeGen *g, IrExecutable *ex
32373232 return result_loc;
32383233}
32393234
3240static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
3241 IrInstructionPtrCastGen *instruction)
3235static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutableGen *executable,
3236 IrInstGenPtrCast *instruction)
32423237{
32433238 ZigType *wanted_type = instruction->base.value->type;
32443239 if (!type_has_bits(wanted_type)) {
......@@ -3263,8 +3258,8 @@ static LLVMValueRef ir_render_ptr_cast(CodeGen *g, IrExecutable *executable,
32633258 return result_ptr;
32643259}
32653260
3266static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
3267 IrInstructionBitCastGen *instruction)
3261static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutableGen *executable,
3262 IrInstGenBitCast *instruction)
32683263{
32693264 ZigType *wanted_type = instruction->base.value->type;
32703265 ZigType *actual_type = instruction->operand->value->type;
......@@ -3287,8 +3282,8 @@ static LLVMValueRef ir_render_bit_cast(CodeGen *g, IrExecutable *executable,
32873282 }
32883283}
32893284
3290static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executable,
3291 IrInstructionWidenOrShorten *instruction)
3285static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutableGen *executable,
3286 IrInstGenWidenOrShorten *instruction)
32923287{
32933288 ZigType *actual_type = instruction->target->value->type;
32943289 // TODO instead of this logic, use the Noop instruction to change the type from
......@@ -3304,7 +3299,7 @@ static LLVMValueRef ir_render_widen_or_shorten(CodeGen *g, IrExecutable *executa
33043299 instruction->base.value->type, target_val);
33053300}
33063301
3307static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, IrInstructionIntToPtr *instruction) {
3302static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToPtr *instruction) {
33083303 ZigType *wanted_type = instruction->base.value->type;
33093304 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
33103305
......@@ -3342,13 +3337,13 @@ static LLVMValueRef ir_render_int_to_ptr(CodeGen *g, IrExecutable *executable, I
33423337 return LLVMBuildIntToPtr(g->builder, target_val, get_llvm_type(g, wanted_type), "");
33433338}
33443339
3345static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutable *executable, IrInstructionPtrToInt *instruction) {
3340static LLVMValueRef ir_render_ptr_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenPtrToInt *instruction) {
33463341 ZigType *wanted_type = instruction->base.value->type;
33473342 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
33483343 return LLVMBuildPtrToInt(g->builder, target_val, get_llvm_type(g, wanted_type), "");
33493344}
33503345
3351static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable, IrInstructionIntToEnum *instruction) {
3346static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToEnum *instruction) {
33523347 ZigType *wanted_type = instruction->base.value->type;
33533348 assert(wanted_type->id == ZigTypeIdEnum);
33543349 ZigType *tag_int_type = wanted_type->data.enumeration.tag_int_type;
......@@ -3357,7 +3352,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
33573352 LLVMValueRef tag_int_value = gen_widen_or_shorten(g, ir_want_runtime_safety(g, &instruction->base),
33583353 instruction->target->value->type, tag_int_type, target_val);
33593354
3360 if (ir_want_runtime_safety(g, &instruction->base) && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {
3355 if (ir_want_runtime_safety(g, &instruction->base) && !wanted_type->data.enumeration.non_exhaustive) {
33613356 LLVMBasicBlockRef bad_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadValue");
33623357 LLVMBasicBlockRef ok_value_block = LLVMAppendBasicBlock(g->cur_fn_val, "OkValue");
33633358 size_t field_count = wanted_type->data.enumeration.src_field_count;
......@@ -3375,7 +3370,7 @@ static LLVMValueRef ir_render_int_to_enum(CodeGen *g, IrExecutable *executable,
33753370 return tag_int_value;
33763371}
33773372
3378static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, IrInstructionIntToErr *instruction) {
3373static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutableGen *executable, IrInstGenIntToErr *instruction) {
33793374 ZigType *wanted_type = instruction->base.value->type;
33803375 assert(wanted_type->id == ZigTypeIdErrorSet);
33813376
......@@ -3392,7 +3387,7 @@ static LLVMValueRef ir_render_int_to_err(CodeGen *g, IrExecutable *executable, I
33923387 return gen_widen_or_shorten(g, false, actual_type, g->err_tag_type, target_val);
33933388}
33943389
3395static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, IrInstructionErrToInt *instruction) {
3390static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutableGen *executable, IrInstGenErrToInt *instruction) {
33963391 ZigType *wanted_type = instruction->base.value->type;
33973392 assert(wanted_type->id == ZigTypeIdInt);
33983393 assert(!wanted_type->data.integral.is_signed);
......@@ -3418,8 +3413,8 @@ static LLVMValueRef ir_render_err_to_int(CodeGen *g, IrExecutable *executable, I
34183413 }
34193414}
34203415
3421static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
3422 IrInstructionUnreachable *unreachable_instruction)
3416static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutableGen *executable,
3417 IrInstGenUnreachable *unreachable_instruction)
34233418{
34243419 if (ir_want_runtime_safety(g, &unreachable_instruction->base)) {
34253420 gen_safety_crash(g, PanicMsgIdUnreachable);
......@@ -3429,8 +3424,8 @@ static LLVMValueRef ir_render_unreachable(CodeGen *g, IrExecutable *executable,
34293424 return nullptr;
34303425}
34313426
3432static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
3433 IrInstructionCondBr *cond_br_instruction)
3427static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutableGen *executable,
3428 IrInstGenCondBr *cond_br_instruction)
34343429{
34353430 LLVMBuildCondBr(g->builder,
34363431 ir_llvm_value(g, cond_br_instruction->condition),
......@@ -3439,51 +3434,56 @@ static LLVMValueRef ir_render_cond_br(CodeGen *g, IrExecutable *executable,
34393434 return nullptr;
34403435}
34413436
3442static LLVMValueRef ir_render_br(CodeGen *g, IrExecutable *executable, IrInstructionBr *br_instruction) {
3437static LLVMValueRef ir_render_br(CodeGen *g, IrExecutableGen *executable, IrInstGenBr *br_instruction) {
34433438 LLVMBuildBr(g->builder, br_instruction->dest_block->llvm_block);
34443439 return nullptr;
34453440}
34463441
3447static LLVMValueRef ir_render_un_op(CodeGen *g, IrExecutable *executable, IrInstructionUnOp *un_op_instruction) {
3448 IrUnOp op_id = un_op_instruction->op_id;
3449 LLVMValueRef expr = ir_llvm_value(g, un_op_instruction->value);
3450 ZigType *operand_type = un_op_instruction->value->value->type;
3451 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ? operand_type->data.vector.elem_type : operand_type;
3452
3453 switch (op_id) {
3454 case IrUnOpInvalid:
3455 case IrUnOpOptional:
3456 case IrUnOpDereference:
3457 zig_unreachable();
3458 case IrUnOpNegation:
3459 case IrUnOpNegationWrap:
3460 {
3461 if (scalar_type->id == ZigTypeIdFloat) {
3462 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, &un_op_instruction->base));
3463 return LLVMBuildFNeg(g->builder, expr, "");
3464 } else if (scalar_type->id == ZigTypeIdInt) {
3465 if (op_id == IrUnOpNegationWrap) {
3466 return LLVMBuildNeg(g->builder, expr, "");
3467 } else if (ir_want_runtime_safety(g, &un_op_instruction->base)) {
3468 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(expr));
3469 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, expr);
3470 } else if (scalar_type->data.integral.is_signed) {
3471 return LLVMBuildNSWNeg(g->builder, expr, "");
3472 } else {
3473 return LLVMBuildNUWNeg(g->builder, expr, "");
3474 }
3475 } else {
3476 zig_unreachable();
3477 }
3478 }
3479 case IrUnOpBinNot:
3480 return LLVMBuildNot(g->builder, expr, "");
3442static LLVMValueRef ir_render_binary_not(CodeGen *g, IrExecutableGen *executable,
3443 IrInstGenBinaryNot *inst)
3444{
3445 LLVMValueRef operand = ir_llvm_value(g, inst->operand);
3446 return LLVMBuildNot(g->builder, operand, "");
3447}
3448
3449static LLVMValueRef ir_gen_negation(CodeGen *g, IrInstGen *inst, IrInstGen *operand, bool wrapping) {
3450 LLVMValueRef llvm_operand = ir_llvm_value(g, operand);
3451 ZigType *operand_type = operand->value->type;
3452 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
3453 operand_type->data.vector.elem_type : operand_type;
3454
3455 if (scalar_type->id == ZigTypeIdFloat) {
3456 ZigLLVMSetFastMath(g->builder, ir_want_fast_math(g, inst));
3457 return LLVMBuildFNeg(g->builder, llvm_operand, "");
3458 } else if (scalar_type->id == ZigTypeIdInt) {
3459 if (wrapping) {
3460 return LLVMBuildNeg(g->builder, llvm_operand, "");
3461 } else if (ir_want_runtime_safety(g, inst)) {
3462 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(llvm_operand));
3463 return gen_overflow_op(g, operand_type, AddSubMulSub, zero, llvm_operand);
3464 } else if (scalar_type->data.integral.is_signed) {
3465 return LLVMBuildNSWNeg(g->builder, llvm_operand, "");
3466 } else {
3467 return LLVMBuildNUWNeg(g->builder, llvm_operand, "");
3468 }
3469 } else {
3470 zig_unreachable();
34813471 }
3472}
34823473
3483 zig_unreachable();
3474static LLVMValueRef ir_render_negation(CodeGen *g, IrExecutableGen *executable,
3475 IrInstGenNegation *inst)
3476{
3477 return ir_gen_negation(g, &inst->base, inst->operand, false);
34843478}
34853479
3486static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutable *executable, IrInstructionBoolNot *instruction) {
3480static LLVMValueRef ir_render_negation_wrapping(CodeGen *g, IrExecutableGen *executable,
3481 IrInstGenNegationWrapping *inst)
3482{
3483 return ir_gen_negation(g, &inst->base, inst->operand, true);
3484}
3485
3486static LLVMValueRef ir_render_bool_not(CodeGen *g, IrExecutableGen *executable, IrInstGenBoolNot *instruction) {
34873487 LLVMValueRef value = ir_llvm_value(g, instruction->value);
34883488 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(value));
34893489 return LLVMBuildICmp(g->builder, LLVMIntEQ, value, zero, "");
......@@ -3497,14 +3497,14 @@ static void render_decl_var(CodeGen *g, ZigVar *var) {
34973497 gen_var_debug_decl(g, var);
34983498}
34993499
3500static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutable *executable, IrInstructionDeclVarGen *instruction) {
3500static LLVMValueRef ir_render_decl_var(CodeGen *g, IrExecutableGen *executable, IrInstGenDeclVar *instruction) {
35013501 instruction->var->ptr_instruction = instruction->var_ptr;
35023502 render_decl_var(g, instruction->var);
35033503 return nullptr;
35043504}
35053505
3506static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutable *executable,
3507 IrInstructionLoadPtrGen *instruction)
3506static LLVMValueRef ir_render_load_ptr(CodeGen *g, IrExecutableGen *executable,
3507 IrInstGenLoadPtr *instruction)
35083508{
35093509 ZigType *child_type = instruction->base.value->type;
35103510 if (!type_has_bits(child_type))
......@@ -3706,7 +3706,7 @@ static void gen_undef_init(CodeGen *g, uint32_t ptr_align_bytes, ZigType *value_
37063706 }
37073707}
37083708
3709static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, IrInstructionStorePtr *instruction) {
3709static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenStorePtr *instruction) {
37103710 Error err;
37113711
37123712 ZigType *ptr_type = instruction->ptr->value->type;
......@@ -3716,7 +3716,7 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
37163716 codegen_report_errors_and_exit(g);
37173717 if (!ptr_type_has_bits)
37183718 return nullptr;
3719 if (instruction->ptr->ref_count == 0) {
3719 if (instruction->ptr->base.ref_count == 0) {
37203720 // In this case, this StorePtr instruction should be elided. Something happened like this:
37213721 // var t = true;
37223722 // const x = if (t) Num.Two else unreachable;
......@@ -3738,8 +3738,8 @@ static LLVMValueRef ir_render_store_ptr(CodeGen *g, IrExecutable *executable, Ir
37383738 return nullptr;
37393739}
37403740
3741static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *executable,
3742 IrInstructionVectorStoreElem *instruction)
3741static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutableGen *executable,
3742 IrInstGenVectorStoreElem *instruction)
37433743{
37443744 LLVMValueRef vector_ptr = ir_llvm_value(g, instruction->vector_ptr);
37453745 LLVMValueRef index = ir_llvm_value(g, instruction->index);
......@@ -3751,7 +3751,7 @@ static LLVMValueRef ir_render_vector_store_elem(CodeGen *g, IrExecutable *execut
37513751 return nullptr;
37523752}
37533753
3754static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrInstructionVarPtr *instruction) {
3754static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenVarPtr *instruction) {
37553755 if (instruction->base.value->special != ConstValSpecialRuntime)
37563756 return ir_llvm_value(g, &instruction->base);
37573757 ZigVar *var = instruction->var;
......@@ -3763,8 +3763,8 @@ static LLVMValueRef ir_render_var_ptr(CodeGen *g, IrExecutable *executable, IrIn
37633763 }
37643764}
37653765
3766static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
3767 IrInstructionReturnPtr *instruction)
3766static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutableGen *executable,
3767 IrInstGenReturnPtr *instruction)
37683768{
37693769 if (!type_has_bits(instruction->base.value->type))
37703770 return nullptr;
......@@ -3772,7 +3772,7 @@ static LLVMValueRef ir_render_return_ptr(CodeGen *g, IrExecutable *executable,
37723772 return g->cur_ret_ptr;
37733773}
37743774
3775static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutable *executable, IrInstructionElemPtr *instruction) {
3775static LLVMValueRef ir_render_elem_ptr(CodeGen *g, IrExecutableGen *executable, IrInstGenElemPtr *instruction) {
37763776 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->array_ptr);
37773777 ZigType *array_ptr_type = instruction->array_ptr->value->type;
37783778 assert(array_ptr_type->id == ZigTypeIdPointer);
......@@ -3948,7 +3948,7 @@ static void render_async_spills(CodeGen *g) {
39483948 ZigType *frame_type = g->cur_fn->frame_type->data.frame.locals_struct;
39493949
39503950 for (size_t alloca_i = 0; alloca_i < g->cur_fn->alloca_gen_list.length; alloca_i += 1) {
3951 IrInstructionAllocaGen *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
3951 IrInstGenAlloca *instruction = g->cur_fn->alloca_gen_list.at(alloca_i);
39523952 if (instruction->field_index == SIZE_MAX)
39533953 continue;
39543954
......@@ -4015,7 +4015,7 @@ static void gen_init_stack_trace(CodeGen *g, LLVMValueRef trace_field_ptr, LLVMV
40154015 LLVMBuildStore(g->builder, LLVMConstInt(usize_type_ref, stack_trace_ptr_count, false), addrs_len_ptr);
40164016}
40174017
4018static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstructionCallGen *instruction) {
4018static LLVMValueRef ir_render_call(CodeGen *g, IrExecutableGen *executable, IrInstGenCall *instruction) {
40194019 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
40204020
40214021 LLVMValueRef fn_val;
......@@ -4150,7 +4150,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
41504150 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, frame_result_loc,
41514151 frame_index_trace_arg(g, src_return_type) + 1, "");
41524152 bool is_llvm_alloca;
4153 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope,
4153 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope,
41544154 &is_llvm_alloca);
41554155 LLVMBuildStore(g->builder, my_err_ret_trace_val, err_ret_trace_ptr_ptr);
41564156 }
......@@ -4209,7 +4209,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
42094209 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
42104210
42114211 bool is_llvm_alloca;
4212 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
4212 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
42134213 }
42144214 }
42154215 } else {
......@@ -4218,7 +4218,7 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
42184218 }
42194219 if (prefix_arg_err_ret_stack) {
42204220 bool is_llvm_alloca;
4221 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca));
4221 gen_param_values.append(get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca));
42224222 }
42234223 }
42244224 FnWalk fn_walk = {};
......@@ -4328,13 +4328,13 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
43284328
43294329 LLVMPositionBuilderAtEnd(g->builder, call_bb);
43304330 gen_assert_resume_id(g, &instruction->base, ResumeIdReturn, PanicMsgIdResumedAnAwaitingFn, nullptr);
4331 render_async_var_decls(g, instruction->base.scope);
4331 render_async_var_decls(g, instruction->base.base.scope);
43324332
43334333 if (!type_has_bits(src_return_type))
43344334 return nullptr;
43354335
43364336 if (result_loc != nullptr) {
4337 if (instruction->result_loc->id == IrInstructionIdReturnPtr) {
4337 if (instruction->result_loc->id == IrInstGenIdReturnPtr) {
43384338 instruction->base.spill = nullptr;
43394339 return g->cur_ret_ptr;
43404340 } else {
......@@ -4394,8 +4394,8 @@ static LLVMValueRef ir_render_call(CodeGen *g, IrExecutable *executable, IrInstr
43944394 }
43954395}
43964396
4397static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executable,
4398 IrInstructionStructFieldPtr *instruction)
4397static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutableGen *executable,
4398 IrInstGenStructFieldPtr *instruction)
43994399{
44004400 Error err;
44014401
......@@ -4445,8 +4445,8 @@ static LLVMValueRef ir_render_struct_field_ptr(CodeGen *g, IrExecutable *executa
44454445 return field_ptr_val;
44464446}
44474447
4448static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutable *executable,
4449 IrInstructionUnionFieldPtr *instruction)
4448static LLVMValueRef ir_render_union_field_ptr(CodeGen *g, IrExecutableGen *executable,
4449 IrInstGenUnionFieldPtr *instruction)
44504450{
44514451 if (instruction->base.value->special != ConstValSpecialRuntime)
44524452 return nullptr;
......@@ -4545,8 +4545,8 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
45454545 return SIZE_MAX;
45464546}
45474547
4548static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrInstructionAsmGen *instruction) {
4549 AstNode *asm_node = instruction->base.source_node;
4548static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutableGen *executable, IrInstGenAsm *instruction) {
4549 AstNode *asm_node = instruction->base.base.source_node;
45504550 assert(asm_node->type == NodeTypeAsmExpr);
45514551 AstNodeAsmExpr *asm_expr = &asm_node->data.asm_expr;
45524552
......@@ -4630,7 +4630,7 @@ static LLVMValueRef ir_render_asm_gen(CodeGen *g, IrExecutable *executable, IrIn
46304630 for (size_t i = 0; i < asm_expr->input_list.length; i += 1, total_index += 1, param_index += 1) {
46314631 AsmInput *asm_input = asm_expr->input_list.at(i);
46324632 buf_replace(asm_input->constraint, ',', '|');
4633 IrInstruction *ir_input = instruction->input_list[i];
4633 IrInstGen *ir_input = instruction->input_list[i];
46344634 buf_append_buf(&constraint_buf, asm_input->constraint);
46354635 if (total_index + 1 < total_constraint_count) {
46364636 buf_append_char(&constraint_buf, ',');
......@@ -4693,14 +4693,14 @@ static LLVMValueRef gen_non_null_bit(CodeGen *g, ZigType *maybe_type, LLVMValueR
46934693 return gen_load_untyped(g, maybe_field_ptr, 0, false, "");
46944694}
46954695
4696static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutable *executable,
4697 IrInstructionTestNonNull *instruction)
4696static LLVMValueRef ir_render_test_non_null(CodeGen *g, IrExecutableGen *executable,
4697 IrInstGenTestNonNull *instruction)
46984698{
46994699 return gen_non_null_bit(g, instruction->value->value->type, ir_llvm_value(g, instruction->value));
47004700}
47014701
4702static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *executable,
4703 IrInstructionOptionalUnwrapPtr *instruction)
4702static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutableGen *executable,
4703 IrInstGenOptionalUnwrapPtr *instruction)
47044704{
47054705 if (instruction->base.value->special != ConstValSpecialRuntime)
47064706 return nullptr;
......@@ -4802,7 +4802,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFn
48024802 return fn_val;
48034803}
48044804
4805static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstructionClz *instruction) {
4805static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutableGen *executable, IrInstGenClz *instruction) {
48064806 ZigType *int_type = instruction->op->value->type;
48074807 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdClz);
48084808 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4814,7 +4814,7 @@ static LLVMValueRef ir_render_clz(CodeGen *g, IrExecutable *executable, IrInstru
48144814 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48154815}
48164816
4817static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstructionCtz *instruction) {
4817static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutableGen *executable, IrInstGenCtz *instruction) {
48184818 ZigType *int_type = instruction->op->value->type;
48194819 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdCtz);
48204820 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4826,7 +4826,7 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru
48264826 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48274827}
48284828
4829static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executable, IrInstructionShuffleVector *instruction) {
4829static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutableGen *executable, IrInstGenShuffleVector *instruction) {
48304830 uint64_t len_a = instruction->a->value->type->data.vector.len;
48314831 uint64_t len_mask = instruction->mask->value->type->data.vector.len;
48324832
......@@ -4835,7 +4835,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
48354835 // when changing code, so Zig uses negative numbers to index the
48364836 // second vector. These start at -1 and go down, and are easiest to use
48374837 // with the ~ operator. Here we convert between the two formats.
4838 IrInstruction *mask = instruction->mask;
4838 IrInstGen *mask = instruction->mask;
48394839 LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);
48404840 for (uint64_t i = 0; i < len_mask; i++) {
48414841 if (mask->value->data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {
......@@ -4856,7 +4856,7 @@ static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executabl
48564856 llvm_mask_value, "");
48574857}
48584858
4859static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {
4859static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutableGen *executable, IrInstGenSplat *instruction) {
48604860 ZigType *result_type = instruction->base.value->type;
48614861 ir_assert(result_type->id == ZigTypeIdVector, &instruction->base);
48624862 uint32_t len = result_type->data.vector.len;
......@@ -4868,7 +4868,7 @@ static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInst
48684868 return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
48694869}
48704870
4871static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {
4871static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutableGen *executable, IrInstGenPopCount *instruction) {
48724872 ZigType *int_type = instruction->op->value->type;
48734873 LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);
48744874 LLVMValueRef operand = ir_llvm_value(g, instruction->op);
......@@ -4876,7 +4876,7 @@ static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, Ir
48764876 return gen_widen_or_shorten(g, false, int_type, instruction->base.value->type, wrong_size_int);
48774877}
48784878
4879static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, IrInstructionSwitchBr *instruction) {
4879static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutableGen *executable, IrInstGenSwitchBr *instruction) {
48804880 ZigType *target_type = instruction->target_value->value->type;
48814881 LLVMBasicBlockRef else_block = instruction->else_block->llvm_block;
48824882
......@@ -4890,7 +4890,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
48904890 (unsigned)instruction->case_count);
48914891
48924892 for (size_t i = 0; i < instruction->case_count; i += 1) {
4893 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
4893 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
48944894
48954895 LLVMValueRef case_value = ir_llvm_value(g, this_case->value);
48964896 if (target_type->id == ZigTypeIdPointer) {
......@@ -4904,7 +4904,7 @@ static LLVMValueRef ir_render_switch_br(CodeGen *g, IrExecutable *executable, Ir
49044904 return nullptr;
49054905}
49064906
4907static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstructionPhi *instruction) {
4907static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutableGen *executable, IrInstGenPhi *instruction) {
49084908 if (!type_has_bits(instruction->base.value->type))
49094909 return nullptr;
49104910
......@@ -4926,7 +4926,7 @@ static LLVMValueRef ir_render_phi(CodeGen *g, IrExecutable *executable, IrInstru
49264926 return phi;
49274927}
49284928
4929static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstructionRefGen *instruction) {
4929static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutableGen *executable, IrInstGenRef *instruction) {
49304930 if (!type_has_bits(instruction->base.value->type)) {
49314931 return nullptr;
49324932 }
......@@ -4940,7 +4940,7 @@ static LLVMValueRef ir_render_ref(CodeGen *g, IrExecutable *executable, IrInstru
49404940 }
49414941}
49424942
4943static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutable *executable, IrInstructionErrName *instruction) {
4943static LLVMValueRef ir_render_err_name(CodeGen *g, IrExecutableGen *executable, IrInstGenErrName *instruction) {
49444944 assert(g->generate_error_name_table);
49454945
49464946 if (g->errors_by_index.length == 1) {
......@@ -5061,11 +5061,16 @@ static LLVMValueRef get_enum_tag_name_function(CodeGen *g, ZigType *enum_type) {
50615061 return fn_val;
50625062}
50635063
5064static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable,
5065 IrInstructionTagName *instruction)
5064static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutableGen *executable,
5065 IrInstGenTagName *instruction)
50665066{
50675067 ZigType *enum_type = instruction->target->value->type;
50685068 assert(enum_type->id == ZigTypeIdEnum);
5069 if (enum_type->data.enumeration.non_exhaustive) {
5070 add_node_error(g, instruction->base.base.source_node,
5071 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
5072 codegen_report_errors_and_exit(g);
5073 }
50695074
50705075 LLVMValueRef enum_name_function = get_enum_tag_name_function(g, enum_type);
50715076
......@@ -5074,8 +5079,8 @@ static LLVMValueRef ir_render_enum_tag_name(CodeGen *g, IrExecutable *executable
50745079 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
50755080}
50765081
5077static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executable,
5078 IrInstructionFieldParentPtr *instruction)
5082static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutableGen *executable,
5083 IrInstGenFieldParentPtr *instruction)
50795084{
50805085 ZigType *container_ptr_type = instruction->base.value->type;
50815086 assert(container_ptr_type->id == ZigTypeIdPointer);
......@@ -5101,7 +5106,7 @@ static LLVMValueRef ir_render_field_parent_ptr(CodeGen *g, IrExecutable *executa
51015106 }
51025107}
51035108
5104static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, IrInstructionAlignCast *instruction) {
5109static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutableGen *executable, IrInstGenAlignCast *instruction) {
51055110 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
51065111 assert(target_val);
51075112
......@@ -5164,11 +5169,11 @@ static LLVMValueRef ir_render_align_cast(CodeGen *g, IrExecutable *executable, I
51645169 return target_val;
51655170}
51665171
5167static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutable *executable,
5168 IrInstructionErrorReturnTrace *instruction)
5172static LLVMValueRef ir_render_error_return_trace(CodeGen *g, IrExecutableGen *executable,
5173 IrInstGenErrorReturnTrace *instruction)
51695174{
51705175 bool is_llvm_alloca;
5171 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
5176 LLVMValueRef cur_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
51725177 if (cur_err_ret_trace_val == nullptr) {
51735178 return LLVMConstNull(get_llvm_type(g, ptr_to_stack_trace_type(g)));
51745179 }
......@@ -5206,7 +5211,7 @@ static enum ZigLLVM_AtomicRMWBinOp to_ZigLLVMAtomicRMWBinOp(AtomicRmwOp op, bool
52065211 zig_unreachable();
52075212}
52085213
5209static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrInstructionCmpxchgGen *instruction) {
5214static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutableGen *executable, IrInstGenCmpxchg *instruction) {
52105215 LLVMValueRef ptr_val = ir_llvm_value(g, instruction->ptr);
52115216 LLVMValueRef cmp_val = ir_llvm_value(g, instruction->cmp_value);
52125217 LLVMValueRef new_val = ir_llvm_value(g, instruction->new_value);
......@@ -5247,13 +5252,13 @@ static LLVMValueRef ir_render_cmpxchg(CodeGen *g, IrExecutable *executable, IrIn
52475252 return result_loc;
52485253}
52495254
5250static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutable *executable, IrInstructionFence *instruction) {
5255static LLVMValueRef ir_render_fence(CodeGen *g, IrExecutableGen *executable, IrInstGenFence *instruction) {
52515256 LLVMAtomicOrdering atomic_order = to_LLVMAtomicOrdering(instruction->order);
52525257 LLVMBuildFence(g->builder, atomic_order, false, "");
52535258 return nullptr;
52545259}
52555260
5256static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrInstructionTruncate *instruction) {
5261static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutableGen *executable, IrInstGenTruncate *instruction) {
52575262 LLVMValueRef target_val = ir_llvm_value(g, instruction->target);
52585263 ZigType *dest_type = instruction->base.value->type;
52595264 ZigType *src_type = instruction->target->value->type;
......@@ -5268,7 +5273,7 @@ static LLVMValueRef ir_render_truncate(CodeGen *g, IrExecutable *executable, IrI
52685273 }
52695274}
52705275
5271static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrInstructionMemset *instruction) {
5276static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutableGen *executable, IrInstGenMemset *instruction) {
52725277 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
52735278 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
52745279
......@@ -5280,7 +5285,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
52805285
52815286 bool val_is_undef = value_is_all_undef(g, instruction->byte->value);
52825287 LLVMValueRef fill_char;
5283 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.scope)) {
5288 if (val_is_undef && ir_want_runtime_safety_scope(g, instruction->base.base.scope)) {
52845289 fill_char = LLVMConstInt(LLVMInt8Type(), 0xaa, false);
52855290 } else {
52865291 fill_char = ir_llvm_value(g, instruction->byte);
......@@ -5294,7 +5299,7 @@ static LLVMValueRef ir_render_memset(CodeGen *g, IrExecutable *executable, IrIns
52945299 return nullptr;
52955300}
52965301
5297static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrInstructionMemcpy *instruction) {
5302static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutableGen *executable, IrInstGenMemcpy *instruction) {
52985303 LLVMValueRef dest_ptr = ir_llvm_value(g, instruction->dest_ptr);
52995304 LLVMValueRef src_ptr = ir_llvm_value(g, instruction->src_ptr);
53005305 LLVMValueRef len_val = ir_llvm_value(g, instruction->count);
......@@ -5316,7 +5321,7 @@ static LLVMValueRef ir_render_memcpy(CodeGen *g, IrExecutable *executable, IrIns
53165321 return nullptr;
53175322}
53185323
5319static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutable *executable, IrInstructionSliceGen *instruction) {
5324static LLVMValueRef ir_render_slice(CodeGen *g, IrExecutableGen *executable, IrInstGenSlice *instruction) {
53205325 LLVMValueRef array_ptr_ptr = ir_llvm_value(g, instruction->ptr);
53215326 ZigType *array_ptr_type = instruction->ptr->value->type;
53225327 assert(array_ptr_type->id == ZigTypeIdPointer);
......@@ -5478,13 +5483,13 @@ static LLVMValueRef get_trap_fn_val(CodeGen *g) {
54785483}
54795484
54805485
5481static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutable *executable, IrInstructionBreakpoint *instruction) {
5486static LLVMValueRef ir_render_breakpoint(CodeGen *g, IrExecutableGen *executable, IrInstGenBreakpoint *instruction) {
54825487 LLVMBuildCall(g->builder, get_trap_fn_val(g), nullptr, 0, "");
54835488 return nullptr;
54845489}
54855490
5486static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutable *executable,
5487 IrInstructionReturnAddress *instruction)
5491static LLVMValueRef ir_render_return_address(CodeGen *g, IrExecutableGen *executable,
5492 IrInstGenReturnAddress *instruction)
54885493{
54895494 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
54905495 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_return_address_fn_val(g), &zero, 1, "");
......@@ -5505,19 +5510,19 @@ static LLVMValueRef get_frame_address_fn_val(CodeGen *g) {
55055510 return g->frame_address_fn_val;
55065511}
55075512
5508static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutable *executable,
5509 IrInstructionFrameAddress *instruction)
5513static LLVMValueRef ir_render_frame_address(CodeGen *g, IrExecutableGen *executable,
5514 IrInstGenFrameAddress *instruction)
55105515{
55115516 LLVMValueRef zero = LLVMConstNull(g->builtin_types.entry_i32->llvm_type);
55125517 LLVMValueRef ptr_val = LLVMBuildCall(g->builder, get_frame_address_fn_val(g), &zero, 1, "");
55135518 return LLVMBuildPtrToInt(g->builder, ptr_val, g->builtin_types.entry_usize->llvm_type, "");
55145519}
55155520
5516static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutable *executable, IrInstructionFrameHandle *instruction) {
5521static LLVMValueRef ir_render_handle(CodeGen *g, IrExecutableGen *executable, IrInstGenFrameHandle *instruction) {
55175522 return g->cur_frame_ptr;
55185523}
55195524
5520static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp *instruction) {
5525static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstGenOverflowOp *instruction) {
55215526 ZigType *int_type = instruction->result_ptr_type;
55225527 assert(int_type->id == ZigTypeIdInt);
55235528
......@@ -5542,7 +5547,7 @@ static LLVMValueRef render_shl_with_overflow(CodeGen *g, IrInstructionOverflowOp
55425547 return overflow_bit;
55435548}
55445549
5545static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable, IrInstructionOverflowOp *instruction) {
5550static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutableGen *executable, IrInstGenOverflowOp *instruction) {
55465551 AddSubMul add_sub_mul;
55475552 switch (instruction->op) {
55485553 case IrOverflowOpAdd:
......@@ -5580,7 +5585,7 @@ static LLVMValueRef ir_render_overflow_op(CodeGen *g, IrExecutable *executable,
55805585 return overflow_bit;
55815586}
55825587
5583static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrInstructionTestErrGen *instruction) {
5588static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutableGen *executable, IrInstGenTestErr *instruction) {
55845589 ZigType *err_union_type = instruction->err_union->value->type;
55855590 ZigType *payload_type = err_union_type->data.error_union.payload_type;
55865591 LLVMValueRef err_union_handle = ir_llvm_value(g, instruction->err_union);
......@@ -5597,8 +5602,8 @@ static LLVMValueRef ir_render_test_err(CodeGen *g, IrExecutable *executable, IrI
55975602 return LLVMBuildICmp(g->builder, LLVMIntNE, err_val, zero, "");
55985603}
55995604
5600static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executable,
5601 IrInstructionUnwrapErrCode *instruction)
5605static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutableGen *executable,
5606 IrInstGenUnwrapErrCode *instruction)
56025607{
56035608 if (instruction->base.value->special != ConstValSpecialRuntime)
56045609 return nullptr;
......@@ -5617,8 +5622,8 @@ static LLVMValueRef ir_render_unwrap_err_code(CodeGen *g, IrExecutable *executab
56175622 }
56185623}
56195624
5620static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *executable,
5621 IrInstructionUnwrapErrPayload *instruction)
5625static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutableGen *executable,
5626 IrInstGenUnwrapErrPayload *instruction)
56225627{
56235628 Error err;
56245629
......@@ -5661,7 +5666,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
56615666 LLVMBuildCondBr(g->builder, cond_val, ok_block, err_block);
56625667
56635668 LLVMPositionBuilderAtEnd(g->builder, err_block);
5664 gen_safety_crash_for_err(g, err_val, instruction->base.scope);
5669 gen_safety_crash_for_err(g, err_val, instruction->base.base.scope);
56655670
56665671 LLVMPositionBuilderAtEnd(g->builder, ok_block);
56675672 }
......@@ -5678,7 +5683,7 @@ static LLVMValueRef ir_render_unwrap_err_payload(CodeGen *g, IrExecutable *execu
56785683 }
56795684}
56805685
5681static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable, IrInstructionOptionalWrap *instruction) {
5686static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutableGen *executable, IrInstGenOptionalWrap *instruction) {
56825687 ZigType *wanted_type = instruction->base.value->type;
56835688
56845689 assert(wanted_type->id == ZigTypeIdOptional);
......@@ -5714,7 +5719,7 @@ static LLVMValueRef ir_render_optional_wrap(CodeGen *g, IrExecutable *executable
57145719 return result_loc;
57155720}
57165721
5717static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapCode *instruction) {
5722static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapCode *instruction) {
57185723 ZigType *wanted_type = instruction->base.value->type;
57195724
57205725 assert(wanted_type->id == ZigTypeIdErrorUnion);
......@@ -5734,7 +5739,7 @@ static LLVMValueRef ir_render_err_wrap_code(CodeGen *g, IrExecutable *executable
57345739 return result_loc;
57355740}
57365741
5737static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executable, IrInstructionErrWrapPayload *instruction) {
5742static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutableGen *executable, IrInstGenErrWrapPayload *instruction) {
57385743 ZigType *wanted_type = instruction->base.value->type;
57395744
57405745 assert(wanted_type->id == ZigTypeIdErrorUnion);
......@@ -5765,7 +5770,7 @@ static LLVMValueRef ir_render_err_wrap_payload(CodeGen *g, IrExecutable *executa
57655770 return result_loc;
57665771}
57675772
5768static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, IrInstructionUnionTag *instruction) {
5773static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutableGen *executable, IrInstGenUnionTag *instruction) {
57695774 ZigType *union_type = instruction->value->value->type;
57705775
57715776 ZigType *tag_type = union_type->data.unionation.tag_type;
......@@ -5783,15 +5788,15 @@ static LLVMValueRef ir_render_union_tag(CodeGen *g, IrExecutable *executable, Ir
57835788 return get_handle_value(g, tag_field_ptr, tag_type, ptr_type);
57845789}
57855790
5786static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutable *executable, IrInstructionPanic *instruction) {
5791static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutableGen *executable, IrInstGenPanic *instruction) {
57875792 bool is_llvm_alloca;
5788 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
5793 LLVMValueRef err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
57895794 gen_panic(g, ir_llvm_value(g, instruction->msg), err_ret_trace_val, is_llvm_alloca);
57905795 return nullptr;
57915796}
57925797
5793static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
5794 IrInstructionAtomicRmw *instruction)
5798static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutableGen *executable,
5799 IrInstGenAtomicRmw *instruction)
57955800{
57965801 bool is_signed;
57975802 ZigType *operand_type = instruction->operand->value->type;
......@@ -5801,8 +5806,8 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
58015806 } else {
58025807 is_signed = false;
58035808 }
5804 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->resolved_op, is_signed, is_float);
5805 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5809 enum ZigLLVM_AtomicRMWBinOp op = to_ZigLLVMAtomicRMWBinOp(instruction->op, is_signed, is_float);
5810 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58065811 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58075812 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58085813
......@@ -5819,20 +5824,20 @@ static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
58195824 return LLVMBuildIntToPtr(g->builder, uncasted_result, get_llvm_type(g, operand_type), "");
58205825}
58215826
5822static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutable *executable,
5823 IrInstructionAtomicLoad *instruction)
5827static LLVMValueRef ir_render_atomic_load(CodeGen *g, IrExecutableGen *executable,
5828 IrInstGenAtomicLoad *instruction)
58245829{
5825 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5830 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58265831 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58275832 LLVMValueRef load_inst = gen_load(g, ptr, instruction->ptr->value->type, "");
58285833 LLVMSetOrdering(load_inst, ordering);
58295834 return load_inst;
58305835}
58315836
5832static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
5833 IrInstructionAtomicStore *instruction)
5837static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutableGen *executable,
5838 IrInstGenAtomicStore *instruction)
58345839{
5835 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
5840 LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->ordering);
58365841 LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
58375842 LLVMValueRef value = ir_llvm_value(g, instruction->value);
58385843 LLVMValueRef store_inst = gen_store(g, value, ptr, instruction->ptr->value->type);
......@@ -5840,13 +5845,13 @@ static LLVMValueRef ir_render_atomic_store(CodeGen *g, IrExecutable *executable,
58405845 return nullptr;
58415846}
58425847
5843static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutable *executable, IrInstructionFloatOp *instruction) {
5848static LLVMValueRef ir_render_float_op(CodeGen *g, IrExecutableGen *executable, IrInstGenFloatOp *instruction) {
58445849 LLVMValueRef operand = ir_llvm_value(g, instruction->operand);
58455850 LLVMValueRef fn_val = get_float_fn(g, instruction->base.value->type, ZigLLVMFnIdFloatOp, instruction->fn_id);
58465851 return LLVMBuildCall(g->builder, fn_val, &operand, 1, "");
58475852}
58485853
5849static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrInstructionMulAdd *instruction) {
5854static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutableGen *executable, IrInstGenMulAdd *instruction) {
58505855 LLVMValueRef op1 = ir_llvm_value(g, instruction->op1);
58515856 LLVMValueRef op2 = ir_llvm_value(g, instruction->op2);
58525857 LLVMValueRef op3 = ir_llvm_value(g, instruction->op3);
......@@ -5861,7 +5866,7 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn
58615866 return LLVMBuildCall(g->builder, fn_val, args, 3, "");
58625867}
58635868
5864static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInstructionBswap *instruction) {
5869static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutableGen *executable, IrInstGenBswap *instruction) {
58655870 LLVMValueRef op = ir_llvm_value(g, instruction->op);
58665871 ZigType *expr_type = instruction->base.value->type;
58675872 bool is_vector = expr_type->id == ZigTypeIdVector;
......@@ -5895,7 +5900,7 @@ static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInst
58955900 return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");
58965901}
58975902
5898static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable, IrInstructionBitReverse *instruction) {
5903static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutableGen *executable, IrInstGenBitReverse *instruction) {
58995904 LLVMValueRef op = ir_llvm_value(g, instruction->op);
59005905 ZigType *int_type = instruction->base.value->type;
59015906 assert(int_type->id == ZigTypeIdInt);
......@@ -5903,8 +5908,8 @@ static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable,
59035908 return LLVMBuildCall(g->builder, fn_val, &op, 1, "");
59045909}
59055910
5906static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executable,
5907 IrInstructionVectorToArray *instruction)
5911static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutableGen *executable,
5912 IrInstGenVectorToArray *instruction)
59085913{
59095914 ZigType *array_type = instruction->base.value->type;
59105915 assert(array_type->id == ZigTypeIdArray);
......@@ -5937,8 +5942,8 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab
59375942 return result_loc;
59385943}
59395944
5940static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executable,
5941 IrInstructionArrayToVector *instruction)
5945static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutableGen *executable,
5946 IrInstGenArrayToVector *instruction)
59425947{
59435948 ZigType *vector_type = instruction->base.value->type;
59445949 assert(vector_type->id == ZigTypeIdVector);
......@@ -5974,8 +5979,8 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab
59745979 }
59755980}
59765981
5977static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
5978 IrInstructionAssertZero *instruction)
5982static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutableGen *executable,
5983 IrInstGenAssertZero *instruction)
59795984{
59805985 LLVMValueRef target = ir_llvm_value(g, instruction->target);
59815986 ZigType *int_type = instruction->target->value->type;
......@@ -5985,8 +5990,8 @@ static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
59855990 return nullptr;
59865991}
59875992
5988static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executable,
5989 IrInstructionAssertNonNull *instruction)
5993static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutableGen *executable,
5994 IrInstGenAssertNonNull *instruction)
59905995{
59915996 LLVMValueRef target = ir_llvm_value(g, instruction->target);
59925997 ZigType *target_type = instruction->target->value->type;
......@@ -6010,8 +6015,8 @@ static LLVMValueRef ir_render_assert_non_null(CodeGen *g, IrExecutable *executab
60106015 return nullptr;
60116016}
60126017
6013static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable,
6014 IrInstructionSuspendBegin *instruction)
6018static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutableGen *executable,
6019 IrInstGenSuspendBegin *instruction)
60156020{
60166021 if (fn_is_async(g->cur_fn)) {
60176022 instruction->resume_bb = gen_suspend_begin(g, "SuspendResume");
......@@ -6019,8 +6024,8 @@ static LLVMValueRef ir_render_suspend_begin(CodeGen *g, IrExecutable *executable
60196024 return nullptr;
60206025}
60216026
6022static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executable,
6023 IrInstructionSuspendFinish *instruction)
6027static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutableGen *executable,
6028 IrInstGenSuspendFinish *instruction)
60246029{
60256030 LLVMBuildRetVoid(g->builder);
60266031
......@@ -6028,11 +6033,11 @@ static LLVMValueRef ir_render_suspend_finish(CodeGen *g, IrExecutable *executabl
60286033 if (ir_want_runtime_safety(g, &instruction->base)) {
60296034 LLVMBuildStore(g->builder, g->cur_bad_not_suspended_index, g->cur_async_resume_index_ptr);
60306035 }
6031 render_async_var_decls(g, instruction->base.scope);
6036 render_async_var_decls(g, instruction->base.base.scope);
60326037 return nullptr;
60336038}
60346039
6035static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_instr,
6040static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstGen *source_instr,
60366041 LLVMValueRef target_frame_ptr, ZigType *result_type, ZigType *ptr_result_type,
60376042 LLVMValueRef result_loc, bool non_async)
60386043{
......@@ -6058,7 +6063,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
60586063 frame_index_trace_arg(g, result_type), "");
60596064 LLVMValueRef src_trace_ptr = LLVMBuildLoad(g->builder, their_trace_ptr_ptr, "");
60606065 bool is_llvm_alloca;
6061 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->scope, &is_llvm_alloca);
6066 LLVMValueRef dest_trace_ptr = get_cur_err_ret_trace_val(g, source_instr->base.scope, &is_llvm_alloca);
60626067 LLVMValueRef args[] = { dest_trace_ptr, src_trace_ptr };
60636068 ZigLLVMBuildCall(g->builder, get_merge_err_ret_traces_fn_val(g), args, 2,
60646069 get_llvm_cc(g, CallingConventionUnspecified), ZigLLVM_CallAttrAuto, "");
......@@ -6071,7 +6076,7 @@ static LLVMValueRef gen_await_early_return(CodeGen *g, IrInstruction *source_ins
60716076 }
60726077}
60736078
6074static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInstructionAwaitGen *instruction) {
6079static LLVMValueRef ir_render_await(CodeGen *g, IrExecutableGen *executable, IrInstGenAwait *instruction) {
60756080 LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
60766081 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
60776082 LLVMValueRef target_frame_ptr = ir_llvm_value(g, instruction->frame);
......@@ -6108,7 +6113,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
61086113 // supply the error return trace pointer
61096114 if (codegen_fn_has_err_ret_tracing_arg(g, result_type)) {
61106115 bool is_llvm_alloca;
6111 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.scope, &is_llvm_alloca);
6116 LLVMValueRef my_err_ret_trace_val = get_cur_err_ret_trace_val(g, instruction->base.base.scope, &is_llvm_alloca);
61126117 assert(my_err_ret_trace_val != nullptr);
61136118 LLVMValueRef err_ret_trace_ptr_ptr = LLVMBuildStructGEP(g->builder, target_frame_ptr,
61146119 frame_index_trace_arg(g, result_type) + 1, "");
......@@ -6156,7 +6161,7 @@ static LLVMValueRef ir_render_await(CodeGen *g, IrExecutable *executable, IrInst
61566161 return nullptr;
61576162}
61586163
6159static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrInstructionResume *instruction) {
6164static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutableGen *executable, IrInstGenResume *instruction) {
61606165 LLVMValueRef frame = ir_llvm_value(g, instruction->frame);
61616166 ZigType *frame_type = instruction->frame->value->type;
61626167 assert(frame_type->id == ZigTypeIdAnyFrame);
......@@ -6165,15 +6170,15 @@ static LLVMValueRef ir_render_resume(CodeGen *g, IrExecutable *executable, IrIns
61656170 return nullptr;
61666171}
61676172
6168static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutable *executable,
6169 IrInstructionFrameSizeGen *instruction)
6173static LLVMValueRef ir_render_frame_size(CodeGen *g, IrExecutableGen *executable,
6174 IrInstGenFrameSize *instruction)
61706175{
61716176 LLVMValueRef fn_val = ir_llvm_value(g, instruction->fn);
61726177 return gen_frame_size(g, fn_val);
61736178}
61746179
6175static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
6176 IrInstructionSpillBegin *instruction)
6180static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutableGen *executable,
6181 IrInstGenSpillBegin *instruction)
61776182{
61786183 if (!fn_is_async(g->cur_fn))
61796184 return nullptr;
......@@ -6192,7 +6197,7 @@ static LLVMValueRef ir_render_spill_begin(CodeGen *g, IrExecutable *executable,
61926197 zig_unreachable();
61936198}
61946199
6195static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, IrInstructionSpillEnd *instruction) {
6200static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutableGen *executable, IrInstGenSpillEnd *instruction) {
61966201 if (!fn_is_async(g->cur_fn))
61976202 return ir_llvm_value(g, instruction->begin->operand);
61986203
......@@ -6208,17 +6213,17 @@ static LLVMValueRef ir_render_spill_end(CodeGen *g, IrExecutable *executable, Ir
62086213 zig_unreachable();
62096214}
62106215
6211static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutable *executable,
6212 IrInstructionVectorExtractElem *instruction)
6216static LLVMValueRef ir_render_vector_extract_elem(CodeGen *g, IrExecutableGen *executable,
6217 IrInstGenVectorExtractElem *instruction)
62136218{
62146219 LLVMValueRef vector = ir_llvm_value(g, instruction->vector);
62156220 LLVMValueRef index = ir_llvm_value(g, instruction->index);
62166221 return LLVMBuildExtractElement(g->builder, vector, index, "");
62176222}
62186223
6219static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
6220 AstNode *source_node = instruction->source_node;
6221 Scope *scope = instruction->scope;
6224static void set_debug_location(CodeGen *g, IrInstGen *instruction) {
6225 AstNode *source_node = instruction->base.source_node;
6226 Scope *scope = instruction->base.scope;
62226227
62236228 assert(source_node);
62246229 assert(scope);
......@@ -6227,263 +6232,183 @@ static void set_debug_location(CodeGen *g, IrInstruction *instruction) {
62276232 (int)source_node->column + 1, get_di_scope(g, scope));
62286233}
62296234
6230static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable, IrInstruction *instruction) {
6235static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutableGen *executable, IrInstGen *instruction) {
62316236 switch (instruction->id) {
6232 case IrInstructionIdInvalid:
6233 case IrInstructionIdConst:
6234 case IrInstructionIdTypeOf:
6235 case IrInstructionIdFieldPtr:
6236 case IrInstructionIdSetCold:
6237 case IrInstructionIdSetRuntimeSafety:
6238 case IrInstructionIdSetFloatMode:
6239 case IrInstructionIdArrayType:
6240 case IrInstructionIdAnyFrameType:
6241 case IrInstructionIdSliceType:
6242 case IrInstructionIdSizeOf:
6243 case IrInstructionIdSwitchTarget:
6244 case IrInstructionIdContainerInitFields:
6245 case IrInstructionIdCompileErr:
6246 case IrInstructionIdCompileLog:
6247 case IrInstructionIdImport:
6248 case IrInstructionIdCImport:
6249 case IrInstructionIdCInclude:
6250 case IrInstructionIdCDefine:
6251 case IrInstructionIdCUndef:
6252 case IrInstructionIdEmbedFile:
6253 case IrInstructionIdIntType:
6254 case IrInstructionIdVectorType:
6255 case IrInstructionIdMemberCount:
6256 case IrInstructionIdMemberType:
6257 case IrInstructionIdMemberName:
6258 case IrInstructionIdAlignOf:
6259 case IrInstructionIdFnProto:
6260 case IrInstructionIdTestComptime:
6261 case IrInstructionIdCheckSwitchProngs:
6262 case IrInstructionIdCheckStatementIsVoid:
6263 case IrInstructionIdTypeName:
6264 case IrInstructionIdDeclRef:
6265 case IrInstructionIdSwitchVar:
6266 case IrInstructionIdSwitchElseVar:
6267 case IrInstructionIdByteOffsetOf:
6268 case IrInstructionIdBitOffsetOf:
6269 case IrInstructionIdTypeInfo:
6270 case IrInstructionIdType:
6271 case IrInstructionIdHasField:
6272 case IrInstructionIdTypeId:
6273 case IrInstructionIdSetEvalBranchQuota:
6274 case IrInstructionIdPtrType:
6275 case IrInstructionIdOpaqueType:
6276 case IrInstructionIdSetAlignStack:
6277 case IrInstructionIdArgType:
6278 case IrInstructionIdTagType:
6279 case IrInstructionIdExport:
6280 case IrInstructionIdErrorUnion:
6281 case IrInstructionIdAddImplicitReturnType:
6282 case IrInstructionIdIntCast:
6283 case IrInstructionIdFloatCast:
6284 case IrInstructionIdIntToFloat:
6285 case IrInstructionIdFloatToInt:
6286 case IrInstructionIdBoolToInt:
6287 case IrInstructionIdErrSetCast:
6288 case IrInstructionIdFromBytes:
6289 case IrInstructionIdToBytes:
6290 case IrInstructionIdEnumToInt:
6291 case IrInstructionIdCheckRuntimeScope:
6292 case IrInstructionIdDeclVarSrc:
6293 case IrInstructionIdPtrCastSrc:
6294 case IrInstructionIdCmpxchgSrc:
6295 case IrInstructionIdLoadPtr:
6296 case IrInstructionIdHasDecl:
6297 case IrInstructionIdUndeclaredIdent:
6298 case IrInstructionIdCallExtra:
6299 case IrInstructionIdCallSrc:
6300 case IrInstructionIdCallSrcArgs:
6301 case IrInstructionIdAllocaSrc:
6302 case IrInstructionIdEndExpr:
6303 case IrInstructionIdImplicitCast:
6304 case IrInstructionIdResolveResult:
6305 case IrInstructionIdResetResult:
6306 case IrInstructionIdContainerInitList:
6307 case IrInstructionIdSliceSrc:
6308 case IrInstructionIdRef:
6309 case IrInstructionIdBitCastSrc:
6310 case IrInstructionIdTestErrSrc:
6311 case IrInstructionIdUnionInitNamedField:
6312 case IrInstructionIdFrameType:
6313 case IrInstructionIdFrameSizeSrc:
6314 case IrInstructionIdAllocaGen:
6315 case IrInstructionIdAwaitSrc:
6316 case IrInstructionIdSplatSrc:
6317 case IrInstructionIdMergeErrSets:
6318 case IrInstructionIdAsmSrc:
6237 case IrInstGenIdInvalid:
6238 case IrInstGenIdConst:
6239 case IrInstGenIdAlloca:
63196240 zig_unreachable();
63206241
6321 case IrInstructionIdDeclVarGen:
6322 return ir_render_decl_var(g, executable, (IrInstructionDeclVarGen *)instruction);
6323 case IrInstructionIdReturn:
6324 return ir_render_return(g, executable, (IrInstructionReturn *)instruction);
6325 case IrInstructionIdBinOp:
6326 return ir_render_bin_op(g, executable, (IrInstructionBinOp *)instruction);
6327 case IrInstructionIdCast:
6328 return ir_render_cast(g, executable, (IrInstructionCast *)instruction);
6329 case IrInstructionIdUnreachable:
6330 return ir_render_unreachable(g, executable, (IrInstructionUnreachable *)instruction);
6331 case IrInstructionIdCondBr:
6332 return ir_render_cond_br(g, executable, (IrInstructionCondBr *)instruction);
6333 case IrInstructionIdBr:
6334 return ir_render_br(g, executable, (IrInstructionBr *)instruction);
6335 case IrInstructionIdUnOp:
6336 return ir_render_un_op(g, executable, (IrInstructionUnOp *)instruction);
6337 case IrInstructionIdLoadPtrGen:
6338 return ir_render_load_ptr(g, executable, (IrInstructionLoadPtrGen *)instruction);
6339 case IrInstructionIdStorePtr:
6340 return ir_render_store_ptr(g, executable, (IrInstructionStorePtr *)instruction);
6341 case IrInstructionIdVectorStoreElem:
6342 return ir_render_vector_store_elem(g, executable, (IrInstructionVectorStoreElem *)instruction);
6343 case IrInstructionIdVarPtr:
6344 return ir_render_var_ptr(g, executable, (IrInstructionVarPtr *)instruction);
6345 case IrInstructionIdReturnPtr:
6346 return ir_render_return_ptr(g, executable, (IrInstructionReturnPtr *)instruction);
6347 case IrInstructionIdElemPtr:
6348 return ir_render_elem_ptr(g, executable, (IrInstructionElemPtr *)instruction);
6349 case IrInstructionIdCallGen:
6350 return ir_render_call(g, executable, (IrInstructionCallGen *)instruction);
6351 case IrInstructionIdStructFieldPtr:
6352 return ir_render_struct_field_ptr(g, executable, (IrInstructionStructFieldPtr *)instruction);
6353 case IrInstructionIdUnionFieldPtr:
6354 return ir_render_union_field_ptr(g, executable, (IrInstructionUnionFieldPtr *)instruction);
6355 case IrInstructionIdAsmGen:
6356 return ir_render_asm_gen(g, executable, (IrInstructionAsmGen *)instruction);
6357 case IrInstructionIdTestNonNull:
6358 return ir_render_test_non_null(g, executable, (IrInstructionTestNonNull *)instruction);
6359 case IrInstructionIdOptionalUnwrapPtr:
6360 return ir_render_optional_unwrap_ptr(g, executable, (IrInstructionOptionalUnwrapPtr *)instruction);
6361 case IrInstructionIdClz:
6362 return ir_render_clz(g, executable, (IrInstructionClz *)instruction);
6363 case IrInstructionIdCtz:
6364 return ir_render_ctz(g, executable, (IrInstructionCtz *)instruction);
6365 case IrInstructionIdPopCount:
6366 return ir_render_pop_count(g, executable, (IrInstructionPopCount *)instruction);
6367 case IrInstructionIdSwitchBr:
6368 return ir_render_switch_br(g, executable, (IrInstructionSwitchBr *)instruction);
6369 case IrInstructionIdBswap:
6370 return ir_render_bswap(g, executable, (IrInstructionBswap *)instruction);
6371 case IrInstructionIdBitReverse:
6372 return ir_render_bit_reverse(g, executable, (IrInstructionBitReverse *)instruction);
6373 case IrInstructionIdPhi:
6374 return ir_render_phi(g, executable, (IrInstructionPhi *)instruction);
6375 case IrInstructionIdRefGen:
6376 return ir_render_ref(g, executable, (IrInstructionRefGen *)instruction);
6377 case IrInstructionIdErrName:
6378 return ir_render_err_name(g, executable, (IrInstructionErrName *)instruction);
6379 case IrInstructionIdCmpxchgGen:
6380 return ir_render_cmpxchg(g, executable, (IrInstructionCmpxchgGen *)instruction);
6381 case IrInstructionIdFence:
6382 return ir_render_fence(g, executable, (IrInstructionFence *)instruction);
6383 case IrInstructionIdTruncate:
6384 return ir_render_truncate(g, executable, (IrInstructionTruncate *)instruction);
6385 case IrInstructionIdBoolNot:
6386 return ir_render_bool_not(g, executable, (IrInstructionBoolNot *)instruction);
6387 case IrInstructionIdMemset:
6388 return ir_render_memset(g, executable, (IrInstructionMemset *)instruction);
6389 case IrInstructionIdMemcpy:
6390 return ir_render_memcpy(g, executable, (IrInstructionMemcpy *)instruction);
6391 case IrInstructionIdSliceGen:
6392 return ir_render_slice(g, executable, (IrInstructionSliceGen *)instruction);
6393 case IrInstructionIdBreakpoint:
6394 return ir_render_breakpoint(g, executable, (IrInstructionBreakpoint *)instruction);
6395 case IrInstructionIdReturnAddress:
6396 return ir_render_return_address(g, executable, (IrInstructionReturnAddress *)instruction);
6397 case IrInstructionIdFrameAddress:
6398 return ir_render_frame_address(g, executable, (IrInstructionFrameAddress *)instruction);
6399 case IrInstructionIdFrameHandle:
6400 return ir_render_handle(g, executable, (IrInstructionFrameHandle *)instruction);
6401 case IrInstructionIdOverflowOp:
6402 return ir_render_overflow_op(g, executable, (IrInstructionOverflowOp *)instruction);
6403 case IrInstructionIdTestErrGen:
6404 return ir_render_test_err(g, executable, (IrInstructionTestErrGen *)instruction);
6405 case IrInstructionIdUnwrapErrCode:
6406 return ir_render_unwrap_err_code(g, executable, (IrInstructionUnwrapErrCode *)instruction);
6407 case IrInstructionIdUnwrapErrPayload:
6408 return ir_render_unwrap_err_payload(g, executable, (IrInstructionUnwrapErrPayload *)instruction);
6409 case IrInstructionIdOptionalWrap:
6410 return ir_render_optional_wrap(g, executable, (IrInstructionOptionalWrap *)instruction);
6411 case IrInstructionIdErrWrapCode:
6412 return ir_render_err_wrap_code(g, executable, (IrInstructionErrWrapCode *)instruction);
6413 case IrInstructionIdErrWrapPayload:
6414 return ir_render_err_wrap_payload(g, executable, (IrInstructionErrWrapPayload *)instruction);
6415 case IrInstructionIdUnionTag:
6416 return ir_render_union_tag(g, executable, (IrInstructionUnionTag *)instruction);
6417 case IrInstructionIdPtrCastGen:
6418 return ir_render_ptr_cast(g, executable, (IrInstructionPtrCastGen *)instruction);
6419 case IrInstructionIdBitCastGen:
6420 return ir_render_bit_cast(g, executable, (IrInstructionBitCastGen *)instruction);
6421 case IrInstructionIdWidenOrShorten:
6422 return ir_render_widen_or_shorten(g, executable, (IrInstructionWidenOrShorten *)instruction);
6423 case IrInstructionIdPtrToInt:
6424 return ir_render_ptr_to_int(g, executable, (IrInstructionPtrToInt *)instruction);
6425 case IrInstructionIdIntToPtr:
6426 return ir_render_int_to_ptr(g, executable, (IrInstructionIntToPtr *)instruction);
6427 case IrInstructionIdIntToEnum:
6428 return ir_render_int_to_enum(g, executable, (IrInstructionIntToEnum *)instruction);
6429 case IrInstructionIdIntToErr:
6430 return ir_render_int_to_err(g, executable, (IrInstructionIntToErr *)instruction);
6431 case IrInstructionIdErrToInt:
6432 return ir_render_err_to_int(g, executable, (IrInstructionErrToInt *)instruction);
6433 case IrInstructionIdPanic:
6434 return ir_render_panic(g, executable, (IrInstructionPanic *)instruction);
6435 case IrInstructionIdTagName:
6436 return ir_render_enum_tag_name(g, executable, (IrInstructionTagName *)instruction);
6437 case IrInstructionIdFieldParentPtr:
6438 return ir_render_field_parent_ptr(g, executable, (IrInstructionFieldParentPtr *)instruction);
6439 case IrInstructionIdAlignCast:
6440 return ir_render_align_cast(g, executable, (IrInstructionAlignCast *)instruction);
6441 case IrInstructionIdErrorReturnTrace:
6442 return ir_render_error_return_trace(g, executable, (IrInstructionErrorReturnTrace *)instruction);
6443 case IrInstructionIdAtomicRmw:
6444 return ir_render_atomic_rmw(g, executable, (IrInstructionAtomicRmw *)instruction);
6445 case IrInstructionIdAtomicLoad:
6446 return ir_render_atomic_load(g, executable, (IrInstructionAtomicLoad *)instruction);
6447 case IrInstructionIdAtomicStore:
6448 return ir_render_atomic_store(g, executable, (IrInstructionAtomicStore *)instruction);
6449 case IrInstructionIdSaveErrRetAddr:
6450 return ir_render_save_err_ret_addr(g, executable, (IrInstructionSaveErrRetAddr *)instruction);
6451 case IrInstructionIdFloatOp:
6452 return ir_render_float_op(g, executable, (IrInstructionFloatOp *)instruction);
6453 case IrInstructionIdMulAdd:
6454 return ir_render_mul_add(g, executable, (IrInstructionMulAdd *)instruction);
6455 case IrInstructionIdArrayToVector:
6456 return ir_render_array_to_vector(g, executable, (IrInstructionArrayToVector *)instruction);
6457 case IrInstructionIdVectorToArray:
6458 return ir_render_vector_to_array(g, executable, (IrInstructionVectorToArray *)instruction);
6459 case IrInstructionIdAssertZero:
6460 return ir_render_assert_zero(g, executable, (IrInstructionAssertZero *)instruction);
6461 case IrInstructionIdAssertNonNull:
6462 return ir_render_assert_non_null(g, executable, (IrInstructionAssertNonNull *)instruction);
6463 case IrInstructionIdResizeSlice:
6464 return ir_render_resize_slice(g, executable, (IrInstructionResizeSlice *)instruction);
6465 case IrInstructionIdPtrOfArrayToSlice:
6466 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstructionPtrOfArrayToSlice *)instruction);
6467 case IrInstructionIdSuspendBegin:
6468 return ir_render_suspend_begin(g, executable, (IrInstructionSuspendBegin *)instruction);
6469 case IrInstructionIdSuspendFinish:
6470 return ir_render_suspend_finish(g, executable, (IrInstructionSuspendFinish *)instruction);
6471 case IrInstructionIdResume:
6472 return ir_render_resume(g, executable, (IrInstructionResume *)instruction);
6473 case IrInstructionIdFrameSizeGen:
6474 return ir_render_frame_size(g, executable, (IrInstructionFrameSizeGen *)instruction);
6475 case IrInstructionIdAwaitGen:
6476 return ir_render_await(g, executable, (IrInstructionAwaitGen *)instruction);
6477 case IrInstructionIdSpillBegin:
6478 return ir_render_spill_begin(g, executable, (IrInstructionSpillBegin *)instruction);
6479 case IrInstructionIdSpillEnd:
6480 return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);
6481 case IrInstructionIdShuffleVector:
6482 return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);
6483 case IrInstructionIdSplatGen:
6484 return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);
6485 case IrInstructionIdVectorExtractElem:
6486 return ir_render_vector_extract_elem(g, executable, (IrInstructionVectorExtractElem *) instruction);
6242 case IrInstGenIdDeclVar:
6243 return ir_render_decl_var(g, executable, (IrInstGenDeclVar *)instruction);
6244 case IrInstGenIdReturn:
6245 return ir_render_return(g, executable, (IrInstGenReturn *)instruction);
6246 case IrInstGenIdBinOp:
6247 return ir_render_bin_op(g, executable, (IrInstGenBinOp *)instruction);
6248 case IrInstGenIdCast:
6249 return ir_render_cast(g, executable, (IrInstGenCast *)instruction);
6250 case IrInstGenIdUnreachable:
6251 return ir_render_unreachable(g, executable, (IrInstGenUnreachable *)instruction);
6252 case IrInstGenIdCondBr:
6253 return ir_render_cond_br(g, executable, (IrInstGenCondBr *)instruction);
6254 case IrInstGenIdBr:
6255 return ir_render_br(g, executable, (IrInstGenBr *)instruction);
6256 case IrInstGenIdBinaryNot:
6257 return ir_render_binary_not(g, executable, (IrInstGenBinaryNot *)instruction);
6258 case IrInstGenIdNegation:
6259 return ir_render_negation(g, executable, (IrInstGenNegation *)instruction);
6260 case IrInstGenIdNegationWrapping:
6261 return ir_render_negation_wrapping(g, executable, (IrInstGenNegationWrapping *)instruction);
6262 case IrInstGenIdLoadPtr:
6263 return ir_render_load_ptr(g, executable, (IrInstGenLoadPtr *)instruction);
6264 case IrInstGenIdStorePtr:
6265 return ir_render_store_ptr(g, executable, (IrInstGenStorePtr *)instruction);
6266 case IrInstGenIdVectorStoreElem:
6267 return ir_render_vector_store_elem(g, executable, (IrInstGenVectorStoreElem *)instruction);
6268 case IrInstGenIdVarPtr:
6269 return ir_render_var_ptr(g, executable, (IrInstGenVarPtr *)instruction);
6270 case IrInstGenIdReturnPtr:
6271 return ir_render_return_ptr(g, executable, (IrInstGenReturnPtr *)instruction);
6272 case IrInstGenIdElemPtr:
6273 return ir_render_elem_ptr(g, executable, (IrInstGenElemPtr *)instruction);
6274 case IrInstGenIdCall:
6275 return ir_render_call(g, executable, (IrInstGenCall *)instruction);
6276 case IrInstGenIdStructFieldPtr:
6277 return ir_render_struct_field_ptr(g, executable, (IrInstGenStructFieldPtr *)instruction);
6278 case IrInstGenIdUnionFieldPtr:
6279 return ir_render_union_field_ptr(g, executable, (IrInstGenUnionFieldPtr *)instruction);
6280 case IrInstGenIdAsm:
6281 return ir_render_asm_gen(g, executable, (IrInstGenAsm *)instruction);
6282 case IrInstGenIdTestNonNull:
6283 return ir_render_test_non_null(g, executable, (IrInstGenTestNonNull *)instruction);
6284 case IrInstGenIdOptionalUnwrapPtr:
6285 return ir_render_optional_unwrap_ptr(g, executable, (IrInstGenOptionalUnwrapPtr *)instruction);
6286 case IrInstGenIdClz:
6287 return ir_render_clz(g, executable, (IrInstGenClz *)instruction);
6288 case IrInstGenIdCtz:
6289 return ir_render_ctz(g, executable, (IrInstGenCtz *)instruction);
6290 case IrInstGenIdPopCount:
6291 return ir_render_pop_count(g, executable, (IrInstGenPopCount *)instruction);
6292 case IrInstGenIdSwitchBr:
6293 return ir_render_switch_br(g, executable, (IrInstGenSwitchBr *)instruction);
6294 case IrInstGenIdBswap:
6295 return ir_render_bswap(g, executable, (IrInstGenBswap *)instruction);
6296 case IrInstGenIdBitReverse:
6297 return ir_render_bit_reverse(g, executable, (IrInstGenBitReverse *)instruction);
6298 case IrInstGenIdPhi:
6299 return ir_render_phi(g, executable, (IrInstGenPhi *)instruction);
6300 case IrInstGenIdRef:
6301 return ir_render_ref(g, executable, (IrInstGenRef *)instruction);
6302 case IrInstGenIdErrName:
6303 return ir_render_err_name(g, executable, (IrInstGenErrName *)instruction);
6304 case IrInstGenIdCmpxchg:
6305 return ir_render_cmpxchg(g, executable, (IrInstGenCmpxchg *)instruction);
6306 case IrInstGenIdFence:
6307 return ir_render_fence(g, executable, (IrInstGenFence *)instruction);
6308 case IrInstGenIdTruncate:
6309 return ir_render_truncate(g, executable, (IrInstGenTruncate *)instruction);
6310 case IrInstGenIdBoolNot:
6311 return ir_render_bool_not(g, executable, (IrInstGenBoolNot *)instruction);
6312 case IrInstGenIdMemset:
6313 return ir_render_memset(g, executable, (IrInstGenMemset *)instruction);
6314 case IrInstGenIdMemcpy:
6315 return ir_render_memcpy(g, executable, (IrInstGenMemcpy *)instruction);
6316 case IrInstGenIdSlice:
6317 return ir_render_slice(g, executable, (IrInstGenSlice *)instruction);
6318 case IrInstGenIdBreakpoint:
6319 return ir_render_breakpoint(g, executable, (IrInstGenBreakpoint *)instruction);
6320 case IrInstGenIdReturnAddress:
6321 return ir_render_return_address(g, executable, (IrInstGenReturnAddress *)instruction);
6322 case IrInstGenIdFrameAddress:
6323 return ir_render_frame_address(g, executable, (IrInstGenFrameAddress *)instruction);
6324 case IrInstGenIdFrameHandle:
6325 return ir_render_handle(g, executable, (IrInstGenFrameHandle *)instruction);
6326 case IrInstGenIdOverflowOp:
6327 return ir_render_overflow_op(g, executable, (IrInstGenOverflowOp *)instruction);
6328 case IrInstGenIdTestErr:
6329 return ir_render_test_err(g, executable, (IrInstGenTestErr *)instruction);
6330 case IrInstGenIdUnwrapErrCode:
6331 return ir_render_unwrap_err_code(g, executable, (IrInstGenUnwrapErrCode *)instruction);
6332 case IrInstGenIdUnwrapErrPayload:
6333 return ir_render_unwrap_err_payload(g, executable, (IrInstGenUnwrapErrPayload *)instruction);
6334 case IrInstGenIdOptionalWrap:
6335 return ir_render_optional_wrap(g, executable, (IrInstGenOptionalWrap *)instruction);
6336 case IrInstGenIdErrWrapCode:
6337 return ir_render_err_wrap_code(g, executable, (IrInstGenErrWrapCode *)instruction);
6338 case IrInstGenIdErrWrapPayload:
6339 return ir_render_err_wrap_payload(g, executable, (IrInstGenErrWrapPayload *)instruction);
6340 case IrInstGenIdUnionTag:
6341 return ir_render_union_tag(g, executable, (IrInstGenUnionTag *)instruction);
6342 case IrInstGenIdPtrCast:
6343 return ir_render_ptr_cast(g, executable, (IrInstGenPtrCast *)instruction);
6344 case IrInstGenIdBitCast:
6345 return ir_render_bit_cast(g, executable, (IrInstGenBitCast *)instruction);
6346 case IrInstGenIdWidenOrShorten:
6347 return ir_render_widen_or_shorten(g, executable, (IrInstGenWidenOrShorten *)instruction);
6348 case IrInstGenIdPtrToInt:
6349 return ir_render_ptr_to_int(g, executable, (IrInstGenPtrToInt *)instruction);
6350 case IrInstGenIdIntToPtr:
6351 return ir_render_int_to_ptr(g, executable, (IrInstGenIntToPtr *)instruction);
6352 case IrInstGenIdIntToEnum:
6353 return ir_render_int_to_enum(g, executable, (IrInstGenIntToEnum *)instruction);
6354 case IrInstGenIdIntToErr:
6355 return ir_render_int_to_err(g, executable, (IrInstGenIntToErr *)instruction);
6356 case IrInstGenIdErrToInt:
6357 return ir_render_err_to_int(g, executable, (IrInstGenErrToInt *)instruction);
6358 case IrInstGenIdPanic:
6359 return ir_render_panic(g, executable, (IrInstGenPanic *)instruction);
6360 case IrInstGenIdTagName:
6361 return ir_render_enum_tag_name(g, executable, (IrInstGenTagName *)instruction);
6362 case IrInstGenIdFieldParentPtr:
6363 return ir_render_field_parent_ptr(g, executable, (IrInstGenFieldParentPtr *)instruction);
6364 case IrInstGenIdAlignCast:
6365 return ir_render_align_cast(g, executable, (IrInstGenAlignCast *)instruction);
6366 case IrInstGenIdErrorReturnTrace:
6367 return ir_render_error_return_trace(g, executable, (IrInstGenErrorReturnTrace *)instruction);
6368 case IrInstGenIdAtomicRmw:
6369 return ir_render_atomic_rmw(g, executable, (IrInstGenAtomicRmw *)instruction);
6370 case IrInstGenIdAtomicLoad:
6371 return ir_render_atomic_load(g, executable, (IrInstGenAtomicLoad *)instruction);
6372 case IrInstGenIdAtomicStore:
6373 return ir_render_atomic_store(g, executable, (IrInstGenAtomicStore *)instruction);
6374 case IrInstGenIdSaveErrRetAddr:
6375 return ir_render_save_err_ret_addr(g, executable, (IrInstGenSaveErrRetAddr *)instruction);
6376 case IrInstGenIdFloatOp:
6377 return ir_render_float_op(g, executable, (IrInstGenFloatOp *)instruction);
6378 case IrInstGenIdMulAdd:
6379 return ir_render_mul_add(g, executable, (IrInstGenMulAdd *)instruction);
6380 case IrInstGenIdArrayToVector:
6381 return ir_render_array_to_vector(g, executable, (IrInstGenArrayToVector *)instruction);
6382 case IrInstGenIdVectorToArray:
6383 return ir_render_vector_to_array(g, executable, (IrInstGenVectorToArray *)instruction);
6384 case IrInstGenIdAssertZero:
6385 return ir_render_assert_zero(g, executable, (IrInstGenAssertZero *)instruction);
6386 case IrInstGenIdAssertNonNull:
6387 return ir_render_assert_non_null(g, executable, (IrInstGenAssertNonNull *)instruction);
6388 case IrInstGenIdResizeSlice:
6389 return ir_render_resize_slice(g, executable, (IrInstGenResizeSlice *)instruction);
6390 case IrInstGenIdPtrOfArrayToSlice:
6391 return ir_render_ptr_of_array_to_slice(g, executable, (IrInstGenPtrOfArrayToSlice *)instruction);
6392 case IrInstGenIdSuspendBegin:
6393 return ir_render_suspend_begin(g, executable, (IrInstGenSuspendBegin *)instruction);
6394 case IrInstGenIdSuspendFinish:
6395 return ir_render_suspend_finish(g, executable, (IrInstGenSuspendFinish *)instruction);
6396 case IrInstGenIdResume:
6397 return ir_render_resume(g, executable, (IrInstGenResume *)instruction);
6398 case IrInstGenIdFrameSize:
6399 return ir_render_frame_size(g, executable, (IrInstGenFrameSize *)instruction);
6400 case IrInstGenIdAwait:
6401 return ir_render_await(g, executable, (IrInstGenAwait *)instruction);
6402 case IrInstGenIdSpillBegin:
6403 return ir_render_spill_begin(g, executable, (IrInstGenSpillBegin *)instruction);
6404 case IrInstGenIdSpillEnd:
6405 return ir_render_spill_end(g, executable, (IrInstGenSpillEnd *)instruction);
6406 case IrInstGenIdShuffleVector:
6407 return ir_render_shuffle_vector(g, executable, (IrInstGenShuffleVector *) instruction);
6408 case IrInstGenIdSplat:
6409 return ir_render_splat(g, executable, (IrInstGenSplat *) instruction);
6410 case IrInstGenIdVectorExtractElem:
6411 return ir_render_vector_extract_elem(g, executable, (IrInstGenVectorExtractElem *) instruction);
64876412 }
64886413 zig_unreachable();
64896414}
......@@ -6491,21 +6416,21 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
64916416static void ir_render(CodeGen *g, ZigFn *fn_entry) {
64926417 assert(fn_entry);
64936418
6494 IrExecutable *executable = &fn_entry->analyzed_executable;
6419 IrExecutableGen *executable = &fn_entry->analyzed_executable;
64956420 assert(executable->basic_block_list.length > 0);
64966421
64976422 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
6498 IrBasicBlock *current_block = executable->basic_block_list.at(block_i);
6423 IrBasicBlockGen *current_block = executable->basic_block_list.at(block_i);
64996424 if (get_scope_typeof(current_block->scope) != nullptr) {
65006425 LLVMBuildBr(g->builder, current_block->llvm_block);
65016426 }
65026427 assert(current_block->llvm_block);
65036428 LLVMPositionBuilderAtEnd(g->builder, current_block->llvm_block);
65046429 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
6505 IrInstruction *instruction = current_block->instruction_list.at(instr_i);
6506 if (instruction->ref_count == 0 && !ir_has_side_effects(instruction))
6430 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
6431 if (instruction->base.ref_count == 0 && !ir_inst_gen_has_side_effects(instruction))
65076432 continue;
6508 if (get_scope_typeof(instruction->scope) != nullptr)
6433 if (get_scope_typeof(instruction->base.scope) != nullptr)
65096434 continue;
65106435
65116436 if (!g->strip_debug_symbols) {
......@@ -7397,7 +7322,7 @@ static void generate_error_name_table(CodeGen *g) {
73977322}
73987323
73997324static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
7400 IrExecutable *executable = &fn->analyzed_executable;
7325 IrExecutableGen *executable = &fn->analyzed_executable;
74017326 assert(executable->basic_block_list.length > 0);
74027327 LLVMValueRef fn_val = fn_llvm_value(g, fn);
74037328 LLVMBasicBlockRef first_bb = nullptr;
......@@ -7406,7 +7331,7 @@ static void build_all_basic_blocks(CodeGen *g, ZigFn *fn) {
74067331 g->cur_preamble_llvm_block = first_bb;
74077332 }
74087333 for (size_t block_i = 0; block_i < executable->basic_block_list.length; block_i += 1) {
7409 IrBasicBlock *bb = executable->basic_block_list.at(block_i);
7334 IrBasicBlockGen *bb = executable->basic_block_list.at(block_i);
74107335 bb->llvm_block = LLVMAppendBasicBlock(fn_val, bb->name_hint);
74117336 }
74127337 if (first_bb == nullptr) {
......@@ -7639,10 +7564,10 @@ static void do_code_gen(CodeGen *g) {
76397564 if (!is_async) {
76407565 // allocate async frames for noasync calls & awaits to async functions
76417566 ZigType *largest_call_frame_type = nullptr;
7642 IrInstruction *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
7567 IrInstGen *all_calls_alloca = ir_create_alloca(g, &fn_table_entry->fndef_scope->base,
76437568 fn_table_entry->body_node, fn_table_entry, g->builtin_types.entry_void, "@async_call_frame");
76447569 for (size_t i = 0; i < fn_table_entry->call_list.length; i += 1) {
7645 IrInstructionCallGen *call = fn_table_entry->call_list.at(i);
7570 IrInstGenCall *call = fn_table_entry->call_list.at(i);
76467571 if (call->fn_entry == nullptr)
76477572 continue;
76487573 if (!fn_is_async(call->fn_entry))
......@@ -7664,7 +7589,7 @@ static void do_code_gen(CodeGen *g) {
76647589 }
76657590 // allocate temporary stack data
76667591 for (size_t alloca_i = 0; alloca_i < fn_table_entry->alloca_gen_list.length; alloca_i += 1) {
7667 IrInstructionAllocaGen *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
7592 IrInstGenAlloca *instruction = fn_table_entry->alloca_gen_list.at(alloca_i);
76687593 ZigType *ptr_type = instruction->base.value->type;
76697594 assert(ptr_type->id == ZigTypeIdPointer);
76707595 ZigType *child_type = ptr_type->data.pointer.child_type;
......@@ -7672,7 +7597,7 @@ static void do_code_gen(CodeGen *g) {
76727597 zig_unreachable();
76737598 if (!type_has_bits(child_type))
76747599 continue;
7675 if (instruction->base.ref_count == 0)
7600 if (instruction->base.base.ref_count == 0)
76767601 continue;
76777602 if (instruction->base.value->special != ConstValSpecialRuntime) {
76787603 if (const_ptr_pointee(nullptr, g, instruction->base.value, nullptr)->special !=
......@@ -7789,7 +7714,7 @@ static void do_code_gen(CodeGen *g) {
77897714 ZigLLVMSetCurrentDebugLocation(g->builder, (int)source_node->line + 1,
77907715 (int)source_node->column + 1, get_di_scope(g, fn_table_entry->child_scope));
77917716 }
7792 IrExecutable *executable = &fn_table_entry->analyzed_executable;
7717 IrExecutableGen *executable = &fn_table_entry->analyzed_executable;
77937718 LLVMBasicBlockRef bad_resume_block = LLVMAppendBasicBlock(g->cur_fn_val, "BadResume");
77947719 LLVMPositionBuilderAtEnd(g->builder, bad_resume_block);
77957720 gen_assertion_scope(g, PanicMsgIdBadResume, fn_table_entry->child_scope);
......@@ -7816,7 +7741,7 @@ static void do_code_gen(CodeGen *g) {
78167741 g->cur_async_switch_instr = switch_instr;
78177742
78187743 LLVMValueRef zero = LLVMConstNull(usize_type_ref);
7819 IrBasicBlock *entry_block = executable->basic_block_list.at(0);
7744 IrBasicBlockGen *entry_block = executable->basic_block_list.at(0);
78207745 LLVMAddCase(switch_instr, zero, entry_block->llvm_block);
78217746 g->cur_resume_block_count += 1;
78227747
......@@ -7848,7 +7773,7 @@ static void do_code_gen(CodeGen *g) {
78487773
78497774 gen_init_stack_trace(g, trace_field_ptr, addrs_field_ptr);
78507775 }
7851 render_async_var_decls(g, entry_block->instruction_list.at(0)->scope);
7776 render_async_var_decls(g, entry_block->instruction_list.at(0)->base.scope);
78527777 } else {
78537778 // create debug variable declarations for parameters
78547779 // rely on the first variables in the variable_list being parameters.
......@@ -7937,6 +7862,12 @@ static void zig_llvm_emit_output(CodeGen *g) {
79377862 default:
79387863 zig_unreachable();
79397864 }
7865 LLVMDisposeModule(g->module);
7866 g->module = nullptr;
7867 LLVMDisposeTargetData(g->target_data_ref);
7868 g->target_data_ref = nullptr;
7869 LLVMDisposeTargetMachine(g->target_machine);
7870 g->target_machine = nullptr;
79407871}
79417872
79427873struct CIntTypeInfo {
......@@ -8574,6 +8505,17 @@ Buf *codegen_generate_builtin_source(CodeGen *g) {
85748505 buf_appendf(contents, "pub const os = Os.%s;\n", cur_os);
85758506 buf_appendf(contents, "pub const arch = %s;\n", cur_arch);
85768507 buf_appendf(contents, "pub const abi = Abi.%s;\n", cur_abi);
8508 {
8509 buf_append_str(contents, "pub const cpu_features: CpuFeatures = ");
8510 if (g->zig_target->cpu_features != nullptr) {
8511 const char *ptr;
8512 size_t len;
8513 stage2_cpu_features_get_builtin_str(g->zig_target->cpu_features, &ptr, &len);
8514 buf_append_mem(contents, ptr, len);
8515 } else {
8516 buf_append_str(contents, "arch.getBaselineCpuFeatures();\n");
8517 }
8518 }
85778519 if (g->libc_link_lib != nullptr && g->zig_target->glibc_version != nullptr) {
85788520 buf_appendf(contents,
85798521 "pub const glibc_version: ?Version = Version{.major = %d, .minor = %d, .patch = %d};\n",
......@@ -8641,6 +8583,12 @@ static Error define_builtin_compile_vars(CodeGen *g) {
86418583 cache_int(&cache_hash, g->zig_target->vendor);
86428584 cache_int(&cache_hash, g->zig_target->os);
86438585 cache_int(&cache_hash, g->zig_target->abi);
8586 if (g->zig_target->cpu_features != nullptr) {
8587 const char *ptr;
8588 size_t len;
8589 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
8590 cache_str(&cache_hash, ptr);
8591 }
86448592 if (g->zig_target->glibc_version != nullptr) {
86458593 cache_int(&cache_hash, g->zig_target->glibc_version->major);
86468594 cache_int(&cache_hash, g->zig_target->glibc_version->minor);
......@@ -8765,37 +8713,25 @@ static void init(CodeGen *g) {
87658713 reloc_mode = LLVMRelocStatic;
87668714 }
87678715
8768 const char *target_specific_cpu_args;
8769 const char *target_specific_features;
8716 const char *target_specific_cpu_args = "";
8717 const char *target_specific_features = "";
8718
87708719 if (g->zig_target->is_native) {
8771 // LLVM creates invalid binaries on Windows sometimes.
8772 // See https://github.com/ziglang/zig/issues/508
8773 // As a workaround we do not use target native features on Windows.
8774 if (g->zig_target->os == OsWindows || g->zig_target->os == OsUefi) {
8775 target_specific_cpu_args = "";
8776 target_specific_features = "";
8777 } else {
8778 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8779 target_specific_features = ZigLLVMGetNativeFeatures();
8780 }
8781 } else if (target_is_riscv(g->zig_target)) {
8782 // TODO https://github.com/ziglang/zig/issues/2883
8783 // Be aware of https://github.com/ziglang/zig/issues/3275
8784 target_specific_cpu_args = "";
8785 target_specific_features = riscv_default_features;
8786 } else if (g->zig_target->arch == ZigLLVM_x86) {
8787 // This is because we're really targeting i686 rather than i386.
8788 // It's pretty much impossible to use many of the language features
8789 // such as fp16 if you stick use the x87 only. This is also what clang
8790 // uses as base cpu.
8791 // TODO https://github.com/ziglang/zig/issues/2883
8792 target_specific_cpu_args = "pentium4";
8793 target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": "";
8794 } else {
8795 target_specific_cpu_args = "";
8796 target_specific_features = "";
8720 target_specific_cpu_args = ZigLLVMGetHostCPUName();
8721 target_specific_features = ZigLLVMGetNativeFeatures();
87978722 }
87988723
8724 // Override CPU and features if defined by user.
8725 if (g->zig_target->cpu_features != nullptr) {
8726 target_specific_cpu_args = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
8727 target_specific_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
8728 }
8729 if (g->verbose_llvm_cpu_features) {
8730 fprintf(stderr, "name=%s triple=%s\n", buf_ptr(g->root_out_name), buf_ptr(&g->llvm_triple_str));
8731 fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
8732 fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
8733 }
8734
87998735 g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
88008736 target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
88018737 LLVMCodeModelDefault, g->function_sections);
......@@ -8842,15 +8778,17 @@ static void init(CodeGen *g) {
88428778 define_builtin_types(g);
88438779 define_intern_values(g);
88448780
8845 IrInstruction *sentinel_instructions = allocate<IrInstruction>(2);
8846 g->invalid_instruction = &sentinel_instructions[0];
8847 g->invalid_instruction->value = allocate<ZigValue>(1, "ZigValue");
8848 g->invalid_instruction->value->type = g->builtin_types.entry_invalid;
8781 IrInstGen *sentinel_instructions = allocate<IrInstGen>(2);
8782 g->invalid_inst_gen = &sentinel_instructions[0];
8783 g->invalid_inst_gen->value = allocate<ZigValue>(1, "ZigValue");
8784 g->invalid_inst_gen->value->type = g->builtin_types.entry_invalid;
88498785
88508786 g->unreach_instruction = &sentinel_instructions[1];
88518787 g->unreach_instruction->value = allocate<ZigValue>(1, "ZigValue");
88528788 g->unreach_instruction->value->type = g->builtin_types.entry_unreachable;
88538789
8790 g->invalid_inst_src = allocate<IrInstSrc>(1);
8791
88548792 define_builtin_fns(g);
88558793 Error err;
88568794 if ((err = define_builtin_compile_vars(g))) {
......@@ -8992,7 +8930,10 @@ static void detect_libc(CodeGen *g) {
89928930 "See `zig libc --help` for more details.\n", err_str(err));
89938931 exit(1);
89948932 }
8995 if ((err = os_make_path(g->cache_dir))) {
8933 Buf libc_txt_dir = BUF_INIT;
8934 os_path_dirname(libc_txt, &libc_txt_dir);
8935 buf_deinit(&libc_txt_dir);
8936 if ((err = os_make_path(&libc_txt_dir))) {
89968937 fprintf(stderr, "Unable to create %s directory: %s\n",
89978938 buf_ptr(g->cache_dir), err_str(err));
89988939 exit(1);
......@@ -9121,21 +9062,22 @@ void add_cc_args(CodeGen *g, ZigList<const char *> &args, const char *out_dep_pa
91219062 args.append("-target");
91229063 args.append(buf_ptr(&g->llvm_triple_str));
91239064
9124 if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) {
9125 // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's
9126 // cross compilation CPU info for RISCV.
9127 // TODO: https://github.com/ziglang/zig/issues/2883
9065 const char *llvm_cpu = stage2_cpu_features_get_llvm_cpu(g->zig_target->cpu_features);
9066 if (llvm_cpu != nullptr) {
91289067 args.append("-Xclang");
9129 args.append("-target-feature");
9068 args.append("-target-cpu");
91309069 args.append("-Xclang");
9131 args.append(riscv_default_features);
9132 } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) {
9070 args.append(llvm_cpu);
9071 }
9072 const char *llvm_target_features = stage2_cpu_features_get_llvm_features(g->zig_target->cpu_features);
9073 if (llvm_target_features != nullptr) {
91339074 args.append("-Xclang");
91349075 args.append("-target-feature");
91359076 args.append("-Xclang");
9136 args.append("-sse");
9077 args.append(llvm_target_features);
91379078 }
91389079 }
9080
91399081 if (g->zig_target->os == OsFreestanding) {
91409082 args.append("-ffreestanding");
91419083 }
......@@ -9783,6 +9725,7 @@ static void prepend_c_type_to_decl_list(CodeGen *g, GenH *gen_h, ZigType *type_e
97839725 zig_unreachable();
97849726 case ZigTypeIdVoid:
97859727 case ZigTypeIdUnreachable:
9728 return;
97869729 case ZigTypeIdBool:
97879730 g->c_want_stdbool = true;
97889731 return;
......@@ -10329,6 +10272,12 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) {
1032910272 cache_int(ch, g->zig_target->vendor);
1033010273 cache_int(ch, g->zig_target->os);
1033110274 cache_int(ch, g->zig_target->abi);
10275 if (g->zig_target->cpu_features != nullptr) {
10276 const char *ptr;
10277 size_t len;
10278 stage2_cpu_features_get_cache_hash(g->zig_target->cpu_features, &ptr, &len);
10279 cache_str(ch, ptr);
10280 }
1033210281 if (g->zig_target->glibc_version != nullptr) {
1033310282 cache_int(ch, g->zig_target->glibc_version->major);
1033410283 cache_int(ch, g->zig_target->glibc_version->minor);
......@@ -10669,6 +10618,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o
1066910618 child_gen->verbose_llvm_ir = parent_gen->verbose_llvm_ir;
1067010619 child_gen->verbose_cimport = parent_gen->verbose_cimport;
1067110620 child_gen->verbose_cc = parent_gen->verbose_cc;
10621 child_gen->verbose_llvm_cpu_features = parent_gen->verbose_llvm_cpu_features;
1067210622 child_gen->llvm_argv = parent_gen->llvm_argv;
1067310623 child_gen->dynamic_linker_path = parent_gen->dynamic_linker_path;
1067410624
src/error.cpp+6
......@@ -58,6 +58,12 @@ const char *err_str(Error err) {
5858 case ErrorNotLazy: return "not lazy";
5959 case ErrorIsAsync: return "is async";
6060 case ErrorImportOutsidePkgPath: return "import of file outside package path";
61 case ErrorUnknownCpu: return "unknown CPU";
62 case ErrorUnknownSubArchitecture: return "unknown sub-architecture";
63 case ErrorUnknownCpuFeature: return "unknown CPU feature";
64 case ErrorInvalidCpuFeatures: return "invalid CPU features";
65 case ErrorInvalidLlvmCpuFeaturesFormat: return "invalid LLVM CPU features format";
66 case ErrorUnknownApplicationBinaryInterface: return "unknown application binary interface";
6167 }
6268 return "(invalid error)";
6369}
src/ir.cpp+7344-6405
......@@ -17,27 +17,33 @@
1717
1818#include <errno.h>
1919
20struct IrBuilder {
20struct IrBuilderSrc {
2121 CodeGen *codegen;
22 IrExecutable *exec;
23 IrBasicBlock *current_basic_block;
22 IrExecutableSrc *exec;
23 IrBasicBlockSrc *current_basic_block;
2424 AstNode *main_block_node;
2525};
2626
27struct IrBuilderGen {
28 CodeGen *codegen;
29 IrExecutableGen *exec;
30 IrBasicBlockGen *current_basic_block;
31};
32
2733struct IrAnalyze {
2834 CodeGen *codegen;
29 IrBuilder old_irb;
30 IrBuilder new_irb;
35 IrBuilderSrc old_irb;
36 IrBuilderGen new_irb;
3137 size_t old_bb_index;
3238 size_t instruction_index;
3339 ZigType *explicit_return_type;
3440 AstNode *explicit_return_type_source_node;
35 ZigList<IrInstruction *> src_implicit_return_type_list;
41 ZigList<IrInstGen *> src_implicit_return_type_list;
3642 ZigList<IrSuspendPosition> resume_stack;
37 IrBasicBlock *const_predecessor_bb;
43 IrBasicBlockSrc *const_predecessor_bb;
3844 size_t ref_count;
3945 size_t break_debug_id; // for debugging purposes
40 IrInstruction *return_ptr;
46 IrInstGen *return_ptr;
4147
4248 // For the purpose of using in a debugger
4349 void dump();
......@@ -202,412 +208,537 @@ struct DbgIrBreakPoint {
202208DbgIrBreakPoint dbg_ir_breakpoints_buf[20];
203209size_t dbg_ir_breakpoints_count = 0;
204210
205static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope);
206static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
211static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope);
212static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
207213 ResultLoc *result_loc);
208static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type);
209static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
210 IrInstruction *value, ZigType *expected_type);
211static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
214static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type);
215static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
216 IrInstGen *value, ZigType *expected_type);
217static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr,
212218 ResultLoc *result_loc);
213static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg);
214static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
215 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing);
216static void ir_assert(bool ok, IrInstruction *source_instruction);
217static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var);
218static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op);
219static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval, ResultLoc *result_loc);
220static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc);
219static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg);
220static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
221 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing);
222static void ir_assert(bool ok, IrInst* source_instruction);
223static void ir_assert_gen(bool ok, IrInstGen *source_instruction);
224static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var);
225static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op);
226static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval, ResultLoc *result_loc);
227static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc);
221228static ZigType *adjust_ptr_align(CodeGen *g, ZigType *ptr_type, uint32_t new_align);
222229static ZigType *adjust_slice_align(CodeGen *g, ZigType *slice_type, uint32_t new_align);
223230static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, uint8_t *buf, ZigValue *val);
224231static void buf_write_value_bytes(CodeGen *codegen, uint8_t *buf, ZigValue *val);
225232static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
226233 ZigValue *out_val, ZigValue *ptr_val);
227static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
228 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on);
229static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed);
234static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
235 ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on);
236static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed);
230237static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align);
231static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
238static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
232239 ZigType *ptr_type);
233static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
240static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
234241 ZigType *dest_type);
235static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
236 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
237 bool allow_discard);
238static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
239 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
240 bool allow_discard);
241static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
242 IrInstruction *base_ptr, bool safety_check_on, bool initializing);
243static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
244 IrInstruction *base_ptr, bool safety_check_on, bool initializing);
245static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
246 IrInstruction *base_ptr, bool initializing);
247static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
248 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const);
249static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
250 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
242static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
243 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
244static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
245 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime, bool allow_discard);
246static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
247 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
248static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
249 IrInstGen *base_ptr, bool safety_check_on, bool initializing);
250static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
251 IrInstGen *base_ptr, bool initializing);
252static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
253 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const);
254static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
255 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
251256 LVal lval, ResultLoc *parent_result_loc);
252257static void ir_reset_result(ResultLoc *result_loc);
253static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
258static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
254259 Scope *scope, AstNode *source_node, Buf *out_bare_name);
255static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
260static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
256261 ResultLoc *parent_result_loc);
257static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
258 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing);
259static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
260 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type);
262static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
263 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing);
264static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
265 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type);
261266static ResultLoc *no_result_loc(void);
262static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value);
267static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value);
268static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst *source_instr);
269
270static void destroy_instruction_src(IrInstSrc *inst) {
271#ifdef ZIG_ENABLE_MEM_PROFILE
272 const char *name = ir_inst_src_type_str(inst->id);
273#else
274 const char *name = nullptr;
275#endif
276 switch (inst->id) {
277 case IrInstSrcIdInvalid:
278 zig_unreachable();
279 case IrInstSrcIdReturn:
280 return destroy(reinterpret_cast<IrInstSrcReturn *>(inst), name);
281 case IrInstSrcIdConst:
282 return destroy(reinterpret_cast<IrInstSrcConst *>(inst), name);
283 case IrInstSrcIdBinOp:
284 return destroy(reinterpret_cast<IrInstSrcBinOp *>(inst), name);
285 case IrInstSrcIdMergeErrSets:
286 return destroy(reinterpret_cast<IrInstSrcMergeErrSets *>(inst), name);
287 case IrInstSrcIdDeclVar:
288 return destroy(reinterpret_cast<IrInstSrcDeclVar *>(inst), name);
289 case IrInstSrcIdCall:
290 return destroy(reinterpret_cast<IrInstSrcCall *>(inst), name);
291 case IrInstSrcIdCallExtra:
292 return destroy(reinterpret_cast<IrInstSrcCallExtra *>(inst), name);
293 case IrInstSrcIdUnOp:
294 return destroy(reinterpret_cast<IrInstSrcUnOp *>(inst), name);
295 case IrInstSrcIdCondBr:
296 return destroy(reinterpret_cast<IrInstSrcCondBr *>(inst), name);
297 case IrInstSrcIdBr:
298 return destroy(reinterpret_cast<IrInstSrcBr *>(inst), name);
299 case IrInstSrcIdPhi:
300 return destroy(reinterpret_cast<IrInstSrcPhi *>(inst), name);
301 case IrInstSrcIdContainerInitList:
302 return destroy(reinterpret_cast<IrInstSrcContainerInitList *>(inst), name);
303 case IrInstSrcIdContainerInitFields:
304 return destroy(reinterpret_cast<IrInstSrcContainerInitFields *>(inst), name);
305 case IrInstSrcIdUnreachable:
306 return destroy(reinterpret_cast<IrInstSrcUnreachable *>(inst), name);
307 case IrInstSrcIdElemPtr:
308 return destroy(reinterpret_cast<IrInstSrcElemPtr *>(inst), name);
309 case IrInstSrcIdVarPtr:
310 return destroy(reinterpret_cast<IrInstSrcVarPtr *>(inst), name);
311 case IrInstSrcIdLoadPtr:
312 return destroy(reinterpret_cast<IrInstSrcLoadPtr *>(inst), name);
313 case IrInstSrcIdStorePtr:
314 return destroy(reinterpret_cast<IrInstSrcStorePtr *>(inst), name);
315 case IrInstSrcIdTypeOf:
316 return destroy(reinterpret_cast<IrInstSrcTypeOf *>(inst), name);
317 case IrInstSrcIdFieldPtr:
318 return destroy(reinterpret_cast<IrInstSrcFieldPtr *>(inst), name);
319 case IrInstSrcIdSetCold:
320 return destroy(reinterpret_cast<IrInstSrcSetCold *>(inst), name);
321 case IrInstSrcIdSetRuntimeSafety:
322 return destroy(reinterpret_cast<IrInstSrcSetRuntimeSafety *>(inst), name);
323 case IrInstSrcIdSetFloatMode:
324 return destroy(reinterpret_cast<IrInstSrcSetFloatMode *>(inst), name);
325 case IrInstSrcIdArrayType:
326 return destroy(reinterpret_cast<IrInstSrcArrayType *>(inst), name);
327 case IrInstSrcIdSliceType:
328 return destroy(reinterpret_cast<IrInstSrcSliceType *>(inst), name);
329 case IrInstSrcIdAnyFrameType:
330 return destroy(reinterpret_cast<IrInstSrcAnyFrameType *>(inst), name);
331 case IrInstSrcIdAsm:
332 return destroy(reinterpret_cast<IrInstSrcAsm *>(inst), name);
333 case IrInstSrcIdSizeOf:
334 return destroy(reinterpret_cast<IrInstSrcSizeOf *>(inst), name);
335 case IrInstSrcIdTestNonNull:
336 return destroy(reinterpret_cast<IrInstSrcTestNonNull *>(inst), name);
337 case IrInstSrcIdOptionalUnwrapPtr:
338 return destroy(reinterpret_cast<IrInstSrcOptionalUnwrapPtr *>(inst), name);
339 case IrInstSrcIdPopCount:
340 return destroy(reinterpret_cast<IrInstSrcPopCount *>(inst), name);
341 case IrInstSrcIdClz:
342 return destroy(reinterpret_cast<IrInstSrcClz *>(inst), name);
343 case IrInstSrcIdCtz:
344 return destroy(reinterpret_cast<IrInstSrcCtz *>(inst), name);
345 case IrInstSrcIdBswap:
346 return destroy(reinterpret_cast<IrInstSrcBswap *>(inst), name);
347 case IrInstSrcIdBitReverse:
348 return destroy(reinterpret_cast<IrInstSrcBitReverse *>(inst), name);
349 case IrInstSrcIdSwitchBr:
350 return destroy(reinterpret_cast<IrInstSrcSwitchBr *>(inst), name);
351 case IrInstSrcIdSwitchVar:
352 return destroy(reinterpret_cast<IrInstSrcSwitchVar *>(inst), name);
353 case IrInstSrcIdSwitchElseVar:
354 return destroy(reinterpret_cast<IrInstSrcSwitchElseVar *>(inst), name);
355 case IrInstSrcIdSwitchTarget:
356 return destroy(reinterpret_cast<IrInstSrcSwitchTarget *>(inst), name);
357 case IrInstSrcIdImport:
358 return destroy(reinterpret_cast<IrInstSrcImport *>(inst), name);
359 case IrInstSrcIdRef:
360 return destroy(reinterpret_cast<IrInstSrcRef *>(inst), name);
361 case IrInstSrcIdCompileErr:
362 return destroy(reinterpret_cast<IrInstSrcCompileErr *>(inst), name);
363 case IrInstSrcIdCompileLog:
364 return destroy(reinterpret_cast<IrInstSrcCompileLog *>(inst), name);
365 case IrInstSrcIdErrName:
366 return destroy(reinterpret_cast<IrInstSrcErrName *>(inst), name);
367 case IrInstSrcIdCImport:
368 return destroy(reinterpret_cast<IrInstSrcCImport *>(inst), name);
369 case IrInstSrcIdCInclude:
370 return destroy(reinterpret_cast<IrInstSrcCInclude *>(inst), name);
371 case IrInstSrcIdCDefine:
372 return destroy(reinterpret_cast<IrInstSrcCDefine *>(inst), name);
373 case IrInstSrcIdCUndef:
374 return destroy(reinterpret_cast<IrInstSrcCUndef *>(inst), name);
375 case IrInstSrcIdEmbedFile:
376 return destroy(reinterpret_cast<IrInstSrcEmbedFile *>(inst), name);
377 case IrInstSrcIdCmpxchg:
378 return destroy(reinterpret_cast<IrInstSrcCmpxchg *>(inst), name);
379 case IrInstSrcIdFence:
380 return destroy(reinterpret_cast<IrInstSrcFence *>(inst), name);
381 case IrInstSrcIdTruncate:
382 return destroy(reinterpret_cast<IrInstSrcTruncate *>(inst), name);
383 case IrInstSrcIdIntCast:
384 return destroy(reinterpret_cast<IrInstSrcIntCast *>(inst), name);
385 case IrInstSrcIdFloatCast:
386 return destroy(reinterpret_cast<IrInstSrcFloatCast *>(inst), name);
387 case IrInstSrcIdErrSetCast:
388 return destroy(reinterpret_cast<IrInstSrcErrSetCast *>(inst), name);
389 case IrInstSrcIdFromBytes:
390 return destroy(reinterpret_cast<IrInstSrcFromBytes *>(inst), name);
391 case IrInstSrcIdToBytes:
392 return destroy(reinterpret_cast<IrInstSrcToBytes *>(inst), name);
393 case IrInstSrcIdIntToFloat:
394 return destroy(reinterpret_cast<IrInstSrcIntToFloat *>(inst), name);
395 case IrInstSrcIdFloatToInt:
396 return destroy(reinterpret_cast<IrInstSrcFloatToInt *>(inst), name);
397 case IrInstSrcIdBoolToInt:
398 return destroy(reinterpret_cast<IrInstSrcBoolToInt *>(inst), name);
399 case IrInstSrcIdIntType:
400 return destroy(reinterpret_cast<IrInstSrcIntType *>(inst), name);
401 case IrInstSrcIdVectorType:
402 return destroy(reinterpret_cast<IrInstSrcVectorType *>(inst), name);
403 case IrInstSrcIdShuffleVector:
404 return destroy(reinterpret_cast<IrInstSrcShuffleVector *>(inst), name);
405 case IrInstSrcIdSplat:
406 return destroy(reinterpret_cast<IrInstSrcSplat *>(inst), name);
407 case IrInstSrcIdBoolNot:
408 return destroy(reinterpret_cast<IrInstSrcBoolNot *>(inst), name);
409 case IrInstSrcIdMemset:
410 return destroy(reinterpret_cast<IrInstSrcMemset *>(inst), name);
411 case IrInstSrcIdMemcpy:
412 return destroy(reinterpret_cast<IrInstSrcMemcpy *>(inst), name);
413 case IrInstSrcIdSlice:
414 return destroy(reinterpret_cast<IrInstSrcSlice *>(inst), name);
415 case IrInstSrcIdMemberCount:
416 return destroy(reinterpret_cast<IrInstSrcMemberCount *>(inst), name);
417 case IrInstSrcIdMemberType:
418 return destroy(reinterpret_cast<IrInstSrcMemberType *>(inst), name);
419 case IrInstSrcIdMemberName:
420 return destroy(reinterpret_cast<IrInstSrcMemberName *>(inst), name);
421 case IrInstSrcIdBreakpoint:
422 return destroy(reinterpret_cast<IrInstSrcBreakpoint *>(inst), name);
423 case IrInstSrcIdReturnAddress:
424 return destroy(reinterpret_cast<IrInstSrcReturnAddress *>(inst), name);
425 case IrInstSrcIdFrameAddress:
426 return destroy(reinterpret_cast<IrInstSrcFrameAddress *>(inst), name);
427 case IrInstSrcIdFrameHandle:
428 return destroy(reinterpret_cast<IrInstSrcFrameHandle *>(inst), name);
429 case IrInstSrcIdFrameType:
430 return destroy(reinterpret_cast<IrInstSrcFrameType *>(inst), name);
431 case IrInstSrcIdFrameSize:
432 return destroy(reinterpret_cast<IrInstSrcFrameSize *>(inst), name);
433 case IrInstSrcIdAlignOf:
434 return destroy(reinterpret_cast<IrInstSrcAlignOf *>(inst), name);
435 case IrInstSrcIdOverflowOp:
436 return destroy(reinterpret_cast<IrInstSrcOverflowOp *>(inst), name);
437 case IrInstSrcIdTestErr:
438 return destroy(reinterpret_cast<IrInstSrcTestErr *>(inst), name);
439 case IrInstSrcIdUnwrapErrCode:
440 return destroy(reinterpret_cast<IrInstSrcUnwrapErrCode *>(inst), name);
441 case IrInstSrcIdUnwrapErrPayload:
442 return destroy(reinterpret_cast<IrInstSrcUnwrapErrPayload *>(inst), name);
443 case IrInstSrcIdFnProto:
444 return destroy(reinterpret_cast<IrInstSrcFnProto *>(inst), name);
445 case IrInstSrcIdTestComptime:
446 return destroy(reinterpret_cast<IrInstSrcTestComptime *>(inst), name);
447 case IrInstSrcIdPtrCast:
448 return destroy(reinterpret_cast<IrInstSrcPtrCast *>(inst), name);
449 case IrInstSrcIdBitCast:
450 return destroy(reinterpret_cast<IrInstSrcBitCast *>(inst), name);
451 case IrInstSrcIdPtrToInt:
452 return destroy(reinterpret_cast<IrInstSrcPtrToInt *>(inst), name);
453 case IrInstSrcIdIntToPtr:
454 return destroy(reinterpret_cast<IrInstSrcIntToPtr *>(inst), name);
455 case IrInstSrcIdIntToEnum:
456 return destroy(reinterpret_cast<IrInstSrcIntToEnum *>(inst), name);
457 case IrInstSrcIdIntToErr:
458 return destroy(reinterpret_cast<IrInstSrcIntToErr *>(inst), name);
459 case IrInstSrcIdErrToInt:
460 return destroy(reinterpret_cast<IrInstSrcErrToInt *>(inst), name);
461 case IrInstSrcIdCheckSwitchProngs:
462 return destroy(reinterpret_cast<IrInstSrcCheckSwitchProngs *>(inst), name);
463 case IrInstSrcIdCheckStatementIsVoid:
464 return destroy(reinterpret_cast<IrInstSrcCheckStatementIsVoid *>(inst), name);
465 case IrInstSrcIdTypeName:
466 return destroy(reinterpret_cast<IrInstSrcTypeName *>(inst), name);
467 case IrInstSrcIdTagName:
468 return destroy(reinterpret_cast<IrInstSrcTagName *>(inst), name);
469 case IrInstSrcIdPtrType:
470 return destroy(reinterpret_cast<IrInstSrcPtrType *>(inst), name);
471 case IrInstSrcIdDeclRef:
472 return destroy(reinterpret_cast<IrInstSrcDeclRef *>(inst), name);
473 case IrInstSrcIdPanic:
474 return destroy(reinterpret_cast<IrInstSrcPanic *>(inst), name);
475 case IrInstSrcIdFieldParentPtr:
476 return destroy(reinterpret_cast<IrInstSrcFieldParentPtr *>(inst), name);
477 case IrInstSrcIdByteOffsetOf:
478 return destroy(reinterpret_cast<IrInstSrcByteOffsetOf *>(inst), name);
479 case IrInstSrcIdBitOffsetOf:
480 return destroy(reinterpret_cast<IrInstSrcBitOffsetOf *>(inst), name);
481 case IrInstSrcIdTypeInfo:
482 return destroy(reinterpret_cast<IrInstSrcTypeInfo *>(inst), name);
483 case IrInstSrcIdType:
484 return destroy(reinterpret_cast<IrInstSrcType *>(inst), name);
485 case IrInstSrcIdHasField:
486 return destroy(reinterpret_cast<IrInstSrcHasField *>(inst), name);
487 case IrInstSrcIdTypeId:
488 return destroy(reinterpret_cast<IrInstSrcTypeId *>(inst), name);
489 case IrInstSrcIdSetEvalBranchQuota:
490 return destroy(reinterpret_cast<IrInstSrcSetEvalBranchQuota *>(inst), name);
491 case IrInstSrcIdAlignCast:
492 return destroy(reinterpret_cast<IrInstSrcAlignCast *>(inst), name);
493 case IrInstSrcIdImplicitCast:
494 return destroy(reinterpret_cast<IrInstSrcImplicitCast *>(inst), name);
495 case IrInstSrcIdResolveResult:
496 return destroy(reinterpret_cast<IrInstSrcResolveResult *>(inst), name);
497 case IrInstSrcIdResetResult:
498 return destroy(reinterpret_cast<IrInstSrcResetResult *>(inst), name);
499 case IrInstSrcIdOpaqueType:
500 return destroy(reinterpret_cast<IrInstSrcOpaqueType *>(inst), name);
501 case IrInstSrcIdSetAlignStack:
502 return destroy(reinterpret_cast<IrInstSrcSetAlignStack *>(inst), name);
503 case IrInstSrcIdArgType:
504 return destroy(reinterpret_cast<IrInstSrcArgType *>(inst), name);
505 case IrInstSrcIdTagType:
506 return destroy(reinterpret_cast<IrInstSrcTagType *>(inst), name);
507 case IrInstSrcIdExport:
508 return destroy(reinterpret_cast<IrInstSrcExport *>(inst), name);
509 case IrInstSrcIdErrorReturnTrace:
510 return destroy(reinterpret_cast<IrInstSrcErrorReturnTrace *>(inst), name);
511 case IrInstSrcIdErrorUnion:
512 return destroy(reinterpret_cast<IrInstSrcErrorUnion *>(inst), name);
513 case IrInstSrcIdAtomicRmw:
514 return destroy(reinterpret_cast<IrInstSrcAtomicRmw *>(inst), name);
515 case IrInstSrcIdSaveErrRetAddr:
516 return destroy(reinterpret_cast<IrInstSrcSaveErrRetAddr *>(inst), name);
517 case IrInstSrcIdAddImplicitReturnType:
518 return destroy(reinterpret_cast<IrInstSrcAddImplicitReturnType *>(inst), name);
519 case IrInstSrcIdFloatOp:
520 return destroy(reinterpret_cast<IrInstSrcFloatOp *>(inst), name);
521 case IrInstSrcIdMulAdd:
522 return destroy(reinterpret_cast<IrInstSrcMulAdd *>(inst), name);
523 case IrInstSrcIdAtomicLoad:
524 return destroy(reinterpret_cast<IrInstSrcAtomicLoad *>(inst), name);
525 case IrInstSrcIdAtomicStore:
526 return destroy(reinterpret_cast<IrInstSrcAtomicStore *>(inst), name);
527 case IrInstSrcIdEnumToInt:
528 return destroy(reinterpret_cast<IrInstSrcEnumToInt *>(inst), name);
529 case IrInstSrcIdCheckRuntimeScope:
530 return destroy(reinterpret_cast<IrInstSrcCheckRuntimeScope *>(inst), name);
531 case IrInstSrcIdHasDecl:
532 return destroy(reinterpret_cast<IrInstSrcHasDecl *>(inst), name);
533 case IrInstSrcIdUndeclaredIdent:
534 return destroy(reinterpret_cast<IrInstSrcUndeclaredIdent *>(inst), name);
535 case IrInstSrcIdAlloca:
536 return destroy(reinterpret_cast<IrInstSrcAlloca *>(inst), name);
537 case IrInstSrcIdEndExpr:
538 return destroy(reinterpret_cast<IrInstSrcEndExpr *>(inst), name);
539 case IrInstSrcIdUnionInitNamedField:
540 return destroy(reinterpret_cast<IrInstSrcUnionInitNamedField *>(inst), name);
541 case IrInstSrcIdSuspendBegin:
542 return destroy(reinterpret_cast<IrInstSrcSuspendBegin *>(inst), name);
543 case IrInstSrcIdSuspendFinish:
544 return destroy(reinterpret_cast<IrInstSrcSuspendFinish *>(inst), name);
545 case IrInstSrcIdResume:
546 return destroy(reinterpret_cast<IrInstSrcResume *>(inst), name);
547 case IrInstSrcIdAwait:
548 return destroy(reinterpret_cast<IrInstSrcAwait *>(inst), name);
549 case IrInstSrcIdSpillBegin:
550 return destroy(reinterpret_cast<IrInstSrcSpillBegin *>(inst), name);
551 case IrInstSrcIdSpillEnd:
552 return destroy(reinterpret_cast<IrInstSrcSpillEnd *>(inst), name);
553 case IrInstSrcIdCallArgs:
554 return destroy(reinterpret_cast<IrInstSrcCallArgs *>(inst), name);
555 }
556 zig_unreachable();
557}
263558
264static void destroy_instruction(IrInstruction *inst) {
559void destroy_instruction_gen(IrInstGen *inst) {
265560#ifdef ZIG_ENABLE_MEM_PROFILE
266 const char *name = ir_instruction_type_str(inst->id);
561 const char *name = ir_inst_gen_type_str(inst->id);
267562#else
268563 const char *name = nullptr;
269564#endif
270565 switch (inst->id) {
271 case IrInstructionIdInvalid:
566 case IrInstGenIdInvalid:
272567 zig_unreachable();
273 case IrInstructionIdReturn:
274 return destroy(reinterpret_cast<IrInstructionReturn *>(inst), name);
275 case IrInstructionIdConst:
276 return destroy(reinterpret_cast<IrInstructionConst *>(inst), name);
277 case IrInstructionIdBinOp:
278 return destroy(reinterpret_cast<IrInstructionBinOp *>(inst), name);
279 case IrInstructionIdMergeErrSets:
280 return destroy(reinterpret_cast<IrInstructionMergeErrSets *>(inst), name);
281 case IrInstructionIdDeclVarSrc:
282 return destroy(reinterpret_cast<IrInstructionDeclVarSrc *>(inst), name);
283 case IrInstructionIdCast:
284 return destroy(reinterpret_cast<IrInstructionCast *>(inst), name);
285 case IrInstructionIdCallSrc:
286 return destroy(reinterpret_cast<IrInstructionCallSrc *>(inst), name);
287 case IrInstructionIdCallSrcArgs:
288 return destroy(reinterpret_cast<IrInstructionCallSrcArgs *>(inst), name);
289 case IrInstructionIdCallExtra:
290 return destroy(reinterpret_cast<IrInstructionCallExtra *>(inst), name);
291 case IrInstructionIdCallGen:
292 return destroy(reinterpret_cast<IrInstructionCallGen *>(inst), name);
293 case IrInstructionIdUnOp:
294 return destroy(reinterpret_cast<IrInstructionUnOp *>(inst), name);
295 case IrInstructionIdCondBr:
296 return destroy(reinterpret_cast<IrInstructionCondBr *>(inst), name);
297 case IrInstructionIdBr:
298 return destroy(reinterpret_cast<IrInstructionBr *>(inst), name);
299 case IrInstructionIdPhi:
300 return destroy(reinterpret_cast<IrInstructionPhi *>(inst), name);
301 case IrInstructionIdContainerInitList:
302 return destroy(reinterpret_cast<IrInstructionContainerInitList *>(inst), name);
303 case IrInstructionIdContainerInitFields:
304 return destroy(reinterpret_cast<IrInstructionContainerInitFields *>(inst), name);
305 case IrInstructionIdUnreachable:
306 return destroy(reinterpret_cast<IrInstructionUnreachable *>(inst), name);
307 case IrInstructionIdElemPtr:
308 return destroy(reinterpret_cast<IrInstructionElemPtr *>(inst), name);
309 case IrInstructionIdVarPtr:
310 return destroy(reinterpret_cast<IrInstructionVarPtr *>(inst), name);
311 case IrInstructionIdReturnPtr:
312 return destroy(reinterpret_cast<IrInstructionReturnPtr *>(inst), name);
313 case IrInstructionIdLoadPtr:
314 return destroy(reinterpret_cast<IrInstructionLoadPtr *>(inst), name);
315 case IrInstructionIdLoadPtrGen:
316 return destroy(reinterpret_cast<IrInstructionLoadPtrGen *>(inst), name);
317 case IrInstructionIdStorePtr:
318 return destroy(reinterpret_cast<IrInstructionStorePtr *>(inst), name);
319 case IrInstructionIdVectorStoreElem:
320 return destroy(reinterpret_cast<IrInstructionVectorStoreElem *>(inst), name);
321 case IrInstructionIdTypeOf:
322 return destroy(reinterpret_cast<IrInstructionTypeOf *>(inst), name);
323 case IrInstructionIdFieldPtr:
324 return destroy(reinterpret_cast<IrInstructionFieldPtr *>(inst), name);
325 case IrInstructionIdStructFieldPtr:
326 return destroy(reinterpret_cast<IrInstructionStructFieldPtr *>(inst), name);
327 case IrInstructionIdUnionFieldPtr:
328 return destroy(reinterpret_cast<IrInstructionUnionFieldPtr *>(inst), name);
329 case IrInstructionIdSetCold:
330 return destroy(reinterpret_cast<IrInstructionSetCold *>(inst), name);
331 case IrInstructionIdSetRuntimeSafety:
332 return destroy(reinterpret_cast<IrInstructionSetRuntimeSafety *>(inst), name);
333 case IrInstructionIdSetFloatMode:
334 return destroy(reinterpret_cast<IrInstructionSetFloatMode *>(inst), name);
335 case IrInstructionIdArrayType:
336 return destroy(reinterpret_cast<IrInstructionArrayType *>(inst), name);
337 case IrInstructionIdSliceType:
338 return destroy(reinterpret_cast<IrInstructionSliceType *>(inst), name);
339 case IrInstructionIdAnyFrameType:
340 return destroy(reinterpret_cast<IrInstructionAnyFrameType *>(inst), name);
341 case IrInstructionIdAsmSrc:
342 return destroy(reinterpret_cast<IrInstructionAsmSrc *>(inst), name);
343 case IrInstructionIdAsmGen:
344 return destroy(reinterpret_cast<IrInstructionAsmGen *>(inst), name);
345 case IrInstructionIdSizeOf:
346 return destroy(reinterpret_cast<IrInstructionSizeOf *>(inst), name);
347 case IrInstructionIdTestNonNull:
348 return destroy(reinterpret_cast<IrInstructionTestNonNull *>(inst), name);
349 case IrInstructionIdOptionalUnwrapPtr:
350 return destroy(reinterpret_cast<IrInstructionOptionalUnwrapPtr *>(inst), name);
351 case IrInstructionIdPopCount:
352 return destroy(reinterpret_cast<IrInstructionPopCount *>(inst), name);
353 case IrInstructionIdClz:
354 return destroy(reinterpret_cast<IrInstructionClz *>(inst), name);
355 case IrInstructionIdCtz:
356 return destroy(reinterpret_cast<IrInstructionCtz *>(inst), name);
357 case IrInstructionIdBswap:
358 return destroy(reinterpret_cast<IrInstructionBswap *>(inst), name);
359 case IrInstructionIdBitReverse:
360 return destroy(reinterpret_cast<IrInstructionBitReverse *>(inst), name);
361 case IrInstructionIdSwitchBr:
362 return destroy(reinterpret_cast<IrInstructionSwitchBr *>(inst), name);
363 case IrInstructionIdSwitchVar:
364 return destroy(reinterpret_cast<IrInstructionSwitchVar *>(inst), name);
365 case IrInstructionIdSwitchElseVar:
366 return destroy(reinterpret_cast<IrInstructionSwitchElseVar *>(inst), name);
367 case IrInstructionIdSwitchTarget:
368 return destroy(reinterpret_cast<IrInstructionSwitchTarget *>(inst), name);
369 case IrInstructionIdUnionTag:
370 return destroy(reinterpret_cast<IrInstructionUnionTag *>(inst), name);
371 case IrInstructionIdImport:
372 return destroy(reinterpret_cast<IrInstructionImport *>(inst), name);
373 case IrInstructionIdRef:
374 return destroy(reinterpret_cast<IrInstructionRef *>(inst), name);
375 case IrInstructionIdRefGen:
376 return destroy(reinterpret_cast<IrInstructionRefGen *>(inst), name);
377 case IrInstructionIdCompileErr:
378 return destroy(reinterpret_cast<IrInstructionCompileErr *>(inst), name);
379 case IrInstructionIdCompileLog:
380 return destroy(reinterpret_cast<IrInstructionCompileLog *>(inst), name);
381 case IrInstructionIdErrName:
382 return destroy(reinterpret_cast<IrInstructionErrName *>(inst), name);
383 case IrInstructionIdCImport:
384 return destroy(reinterpret_cast<IrInstructionCImport *>(inst), name);
385 case IrInstructionIdCInclude:
386 return destroy(reinterpret_cast<IrInstructionCInclude *>(inst), name);
387 case IrInstructionIdCDefine:
388 return destroy(reinterpret_cast<IrInstructionCDefine *>(inst), name);
389 case IrInstructionIdCUndef:
390 return destroy(reinterpret_cast<IrInstructionCUndef *>(inst), name);
391 case IrInstructionIdEmbedFile:
392 return destroy(reinterpret_cast<IrInstructionEmbedFile *>(inst), name);
393 case IrInstructionIdCmpxchgSrc:
394 return destroy(reinterpret_cast<IrInstructionCmpxchgSrc *>(inst), name);
395 case IrInstructionIdCmpxchgGen:
396 return destroy(reinterpret_cast<IrInstructionCmpxchgGen *>(inst), name);
397 case IrInstructionIdFence:
398 return destroy(reinterpret_cast<IrInstructionFence *>(inst), name);
399 case IrInstructionIdTruncate:
400 return destroy(reinterpret_cast<IrInstructionTruncate *>(inst), name);
401 case IrInstructionIdIntCast:
402 return destroy(reinterpret_cast<IrInstructionIntCast *>(inst), name);
403 case IrInstructionIdFloatCast:
404 return destroy(reinterpret_cast<IrInstructionFloatCast *>(inst), name);
405 case IrInstructionIdErrSetCast:
406 return destroy(reinterpret_cast<IrInstructionErrSetCast *>(inst), name);
407 case IrInstructionIdFromBytes:
408 return destroy(reinterpret_cast<IrInstructionFromBytes *>(inst), name);
409 case IrInstructionIdToBytes:
410 return destroy(reinterpret_cast<IrInstructionToBytes *>(inst), name);
411 case IrInstructionIdIntToFloat:
412 return destroy(reinterpret_cast<IrInstructionIntToFloat *>(inst), name);
413 case IrInstructionIdFloatToInt:
414 return destroy(reinterpret_cast<IrInstructionFloatToInt *>(inst), name);
415 case IrInstructionIdBoolToInt:
416 return destroy(reinterpret_cast<IrInstructionBoolToInt *>(inst), name);
417 case IrInstructionIdIntType:
418 return destroy(reinterpret_cast<IrInstructionIntType *>(inst), name);
419 case IrInstructionIdVectorType:
420 return destroy(reinterpret_cast<IrInstructionVectorType *>(inst), name);
421 case IrInstructionIdShuffleVector:
422 return destroy(reinterpret_cast<IrInstructionShuffleVector *>(inst), name);
423 case IrInstructionIdSplatSrc:
424 return destroy(reinterpret_cast<IrInstructionSplatSrc *>(inst), name);
425 case IrInstructionIdSplatGen:
426 return destroy(reinterpret_cast<IrInstructionSplatGen *>(inst), name);
427 case IrInstructionIdBoolNot:
428 return destroy(reinterpret_cast<IrInstructionBoolNot *>(inst), name);
429 case IrInstructionIdMemset:
430 return destroy(reinterpret_cast<IrInstructionMemset *>(inst), name);
431 case IrInstructionIdMemcpy:
432 return destroy(reinterpret_cast<IrInstructionMemcpy *>(inst), name);
433 case IrInstructionIdSliceSrc:
434 return destroy(reinterpret_cast<IrInstructionSliceSrc *>(inst), name);
435 case IrInstructionIdSliceGen:
436 return destroy(reinterpret_cast<IrInstructionSliceGen *>(inst), name);
437 case IrInstructionIdMemberCount:
438 return destroy(reinterpret_cast<IrInstructionMemberCount *>(inst), name);
439 case IrInstructionIdMemberType:
440 return destroy(reinterpret_cast<IrInstructionMemberType *>(inst), name);
441 case IrInstructionIdMemberName:
442 return destroy(reinterpret_cast<IrInstructionMemberName *>(inst), name);
443 case IrInstructionIdBreakpoint:
444 return destroy(reinterpret_cast<IrInstructionBreakpoint *>(inst), name);
445 case IrInstructionIdReturnAddress:
446 return destroy(reinterpret_cast<IrInstructionReturnAddress *>(inst), name);
447 case IrInstructionIdFrameAddress:
448 return destroy(reinterpret_cast<IrInstructionFrameAddress *>(inst), name);
449 case IrInstructionIdFrameHandle:
450 return destroy(reinterpret_cast<IrInstructionFrameHandle *>(inst), name);
451 case IrInstructionIdFrameType:
452 return destroy(reinterpret_cast<IrInstructionFrameType *>(inst), name);
453 case IrInstructionIdFrameSizeSrc:
454 return destroy(reinterpret_cast<IrInstructionFrameSizeSrc *>(inst), name);
455 case IrInstructionIdFrameSizeGen:
456 return destroy(reinterpret_cast<IrInstructionFrameSizeGen *>(inst), name);
457 case IrInstructionIdAlignOf:
458 return destroy(reinterpret_cast<IrInstructionAlignOf *>(inst), name);
459 case IrInstructionIdOverflowOp:
460 return destroy(reinterpret_cast<IrInstructionOverflowOp *>(inst), name);
461 case IrInstructionIdTestErrSrc:
462 return destroy(reinterpret_cast<IrInstructionTestErrSrc *>(inst), name);
463 case IrInstructionIdTestErrGen:
464 return destroy(reinterpret_cast<IrInstructionTestErrGen *>(inst), name);
465 case IrInstructionIdUnwrapErrCode:
466 return destroy(reinterpret_cast<IrInstructionUnwrapErrCode *>(inst), name);
467 case IrInstructionIdUnwrapErrPayload:
468 return destroy(reinterpret_cast<IrInstructionUnwrapErrPayload *>(inst), name);
469 case IrInstructionIdOptionalWrap:
470 return destroy(reinterpret_cast<IrInstructionOptionalWrap *>(inst), name);
471 case IrInstructionIdErrWrapCode:
472 return destroy(reinterpret_cast<IrInstructionErrWrapCode *>(inst), name);
473 case IrInstructionIdErrWrapPayload:
474 return destroy(reinterpret_cast<IrInstructionErrWrapPayload *>(inst), name);
475 case IrInstructionIdFnProto:
476 return destroy(reinterpret_cast<IrInstructionFnProto *>(inst), name);
477 case IrInstructionIdTestComptime:
478 return destroy(reinterpret_cast<IrInstructionTestComptime *>(inst), name);
479 case IrInstructionIdPtrCastSrc:
480 return destroy(reinterpret_cast<IrInstructionPtrCastSrc *>(inst), name);
481 case IrInstructionIdPtrCastGen:
482 return destroy(reinterpret_cast<IrInstructionPtrCastGen *>(inst), name);
483 case IrInstructionIdBitCastSrc:
484 return destroy(reinterpret_cast<IrInstructionBitCastSrc *>(inst), name);
485 case IrInstructionIdBitCastGen:
486 return destroy(reinterpret_cast<IrInstructionBitCastGen *>(inst), name);
487 case IrInstructionIdWidenOrShorten:
488 return destroy(reinterpret_cast<IrInstructionWidenOrShorten *>(inst), name);
489 case IrInstructionIdPtrToInt:
490 return destroy(reinterpret_cast<IrInstructionPtrToInt *>(inst), name);
491 case IrInstructionIdIntToPtr:
492 return destroy(reinterpret_cast<IrInstructionIntToPtr *>(inst), name);
493 case IrInstructionIdIntToEnum:
494 return destroy(reinterpret_cast<IrInstructionIntToEnum *>(inst), name);
495 case IrInstructionIdIntToErr:
496 return destroy(reinterpret_cast<IrInstructionIntToErr *>(inst), name);
497 case IrInstructionIdErrToInt:
498 return destroy(reinterpret_cast<IrInstructionErrToInt *>(inst), name);
499 case IrInstructionIdCheckSwitchProngs:
500 return destroy(reinterpret_cast<IrInstructionCheckSwitchProngs *>(inst), name);
501 case IrInstructionIdCheckStatementIsVoid:
502 return destroy(reinterpret_cast<IrInstructionCheckStatementIsVoid *>(inst), name);
503 case IrInstructionIdTypeName:
504 return destroy(reinterpret_cast<IrInstructionTypeName *>(inst), name);
505 case IrInstructionIdTagName:
506 return destroy(reinterpret_cast<IrInstructionTagName *>(inst), name);
507 case IrInstructionIdPtrType:
508 return destroy(reinterpret_cast<IrInstructionPtrType *>(inst), name);
509 case IrInstructionIdDeclRef:
510 return destroy(reinterpret_cast<IrInstructionDeclRef *>(inst), name);
511 case IrInstructionIdPanic:
512 return destroy(reinterpret_cast<IrInstructionPanic *>(inst), name);
513 case IrInstructionIdFieldParentPtr:
514 return destroy(reinterpret_cast<IrInstructionFieldParentPtr *>(inst), name);
515 case IrInstructionIdByteOffsetOf:
516 return destroy(reinterpret_cast<IrInstructionByteOffsetOf *>(inst), name);
517 case IrInstructionIdBitOffsetOf:
518 return destroy(reinterpret_cast<IrInstructionBitOffsetOf *>(inst), name);
519 case IrInstructionIdTypeInfo:
520 return destroy(reinterpret_cast<IrInstructionTypeInfo *>(inst), name);
521 case IrInstructionIdType:
522 return destroy(reinterpret_cast<IrInstructionType *>(inst), name);
523 case IrInstructionIdHasField:
524 return destroy(reinterpret_cast<IrInstructionHasField *>(inst), name);
525 case IrInstructionIdTypeId:
526 return destroy(reinterpret_cast<IrInstructionTypeId *>(inst), name);
527 case IrInstructionIdSetEvalBranchQuota:
528 return destroy(reinterpret_cast<IrInstructionSetEvalBranchQuota *>(inst), name);
529 case IrInstructionIdAlignCast:
530 return destroy(reinterpret_cast<IrInstructionAlignCast *>(inst), name);
531 case IrInstructionIdImplicitCast:
532 return destroy(reinterpret_cast<IrInstructionImplicitCast *>(inst), name);
533 case IrInstructionIdResolveResult:
534 return destroy(reinterpret_cast<IrInstructionResolveResult *>(inst), name);
535 case IrInstructionIdResetResult:
536 return destroy(reinterpret_cast<IrInstructionResetResult *>(inst), name);
537 case IrInstructionIdOpaqueType:
538 return destroy(reinterpret_cast<IrInstructionOpaqueType *>(inst), name);
539 case IrInstructionIdSetAlignStack:
540 return destroy(reinterpret_cast<IrInstructionSetAlignStack *>(inst), name);
541 case IrInstructionIdArgType:
542 return destroy(reinterpret_cast<IrInstructionArgType *>(inst), name);
543 case IrInstructionIdTagType:
544 return destroy(reinterpret_cast<IrInstructionTagType *>(inst), name);
545 case IrInstructionIdExport:
546 return destroy(reinterpret_cast<IrInstructionExport *>(inst), name);
547 case IrInstructionIdErrorReturnTrace:
548 return destroy(reinterpret_cast<IrInstructionErrorReturnTrace *>(inst), name);
549 case IrInstructionIdErrorUnion:
550 return destroy(reinterpret_cast<IrInstructionErrorUnion *>(inst), name);
551 case IrInstructionIdAtomicRmw:
552 return destroy(reinterpret_cast<IrInstructionAtomicRmw *>(inst), name);
553 case IrInstructionIdSaveErrRetAddr:
554 return destroy(reinterpret_cast<IrInstructionSaveErrRetAddr *>(inst), name);
555 case IrInstructionIdAddImplicitReturnType:
556 return destroy(reinterpret_cast<IrInstructionAddImplicitReturnType *>(inst), name);
557 case IrInstructionIdFloatOp:
558 return destroy(reinterpret_cast<IrInstructionFloatOp *>(inst), name);
559 case IrInstructionIdMulAdd:
560 return destroy(reinterpret_cast<IrInstructionMulAdd *>(inst), name);
561 case IrInstructionIdAtomicLoad:
562 return destroy(reinterpret_cast<IrInstructionAtomicLoad *>(inst), name);
563 case IrInstructionIdAtomicStore:
564 return destroy(reinterpret_cast<IrInstructionAtomicStore *>(inst), name);
565 case IrInstructionIdEnumToInt:
566 return destroy(reinterpret_cast<IrInstructionEnumToInt *>(inst), name);
567 case IrInstructionIdCheckRuntimeScope:
568 return destroy(reinterpret_cast<IrInstructionCheckRuntimeScope *>(inst), name);
569 case IrInstructionIdDeclVarGen:
570 return destroy(reinterpret_cast<IrInstructionDeclVarGen *>(inst), name);
571 case IrInstructionIdArrayToVector:
572 return destroy(reinterpret_cast<IrInstructionArrayToVector *>(inst), name);
573 case IrInstructionIdVectorToArray:
574 return destroy(reinterpret_cast<IrInstructionVectorToArray *>(inst), name);
575 case IrInstructionIdPtrOfArrayToSlice:
576 return destroy(reinterpret_cast<IrInstructionPtrOfArrayToSlice *>(inst), name);
577 case IrInstructionIdAssertZero:
578 return destroy(reinterpret_cast<IrInstructionAssertZero *>(inst), name);
579 case IrInstructionIdAssertNonNull:
580 return destroy(reinterpret_cast<IrInstructionAssertNonNull *>(inst), name);
581 case IrInstructionIdResizeSlice:
582 return destroy(reinterpret_cast<IrInstructionResizeSlice *>(inst), name);
583 case IrInstructionIdHasDecl:
584 return destroy(reinterpret_cast<IrInstructionHasDecl *>(inst), name);
585 case IrInstructionIdUndeclaredIdent:
586 return destroy(reinterpret_cast<IrInstructionUndeclaredIdent *>(inst), name);
587 case IrInstructionIdAllocaSrc:
588 return destroy(reinterpret_cast<IrInstructionAllocaSrc *>(inst), name);
589 case IrInstructionIdAllocaGen:
590 return destroy(reinterpret_cast<IrInstructionAllocaGen *>(inst), name);
591 case IrInstructionIdEndExpr:
592 return destroy(reinterpret_cast<IrInstructionEndExpr *>(inst), name);
593 case IrInstructionIdUnionInitNamedField:
594 return destroy(reinterpret_cast<IrInstructionUnionInitNamedField *>(inst), name);
595 case IrInstructionIdSuspendBegin:
596 return destroy(reinterpret_cast<IrInstructionSuspendBegin *>(inst), name);
597 case IrInstructionIdSuspendFinish:
598 return destroy(reinterpret_cast<IrInstructionSuspendFinish *>(inst), name);
599 case IrInstructionIdResume:
600 return destroy(reinterpret_cast<IrInstructionResume *>(inst), name);
601 case IrInstructionIdAwaitSrc:
602 return destroy(reinterpret_cast<IrInstructionAwaitSrc *>(inst), name);
603 case IrInstructionIdAwaitGen:
604 return destroy(reinterpret_cast<IrInstructionAwaitGen *>(inst), name);
605 case IrInstructionIdSpillBegin:
606 return destroy(reinterpret_cast<IrInstructionSpillBegin *>(inst), name);
607 case IrInstructionIdSpillEnd:
608 return destroy(reinterpret_cast<IrInstructionSpillEnd *>(inst), name);
609 case IrInstructionIdVectorExtractElem:
610 return destroy(reinterpret_cast<IrInstructionVectorExtractElem *>(inst), name);
568 case IrInstGenIdReturn:
569 return destroy(reinterpret_cast<IrInstGenReturn *>(inst), name);
570 case IrInstGenIdConst:
571 return destroy(reinterpret_cast<IrInstGenConst *>(inst), name);
572 case IrInstGenIdBinOp:
573 return destroy(reinterpret_cast<IrInstGenBinOp *>(inst), name);
574 case IrInstGenIdCast:
575 return destroy(reinterpret_cast<IrInstGenCast *>(inst), name);
576 case IrInstGenIdCall:
577 return destroy(reinterpret_cast<IrInstGenCall *>(inst), name);
578 case IrInstGenIdCondBr:
579 return destroy(reinterpret_cast<IrInstGenCondBr *>(inst), name);
580 case IrInstGenIdBr:
581 return destroy(reinterpret_cast<IrInstGenBr *>(inst), name);
582 case IrInstGenIdPhi:
583 return destroy(reinterpret_cast<IrInstGenPhi *>(inst), name);
584 case IrInstGenIdUnreachable:
585 return destroy(reinterpret_cast<IrInstGenUnreachable *>(inst), name);
586 case IrInstGenIdElemPtr:
587 return destroy(reinterpret_cast<IrInstGenElemPtr *>(inst), name);
588 case IrInstGenIdVarPtr:
589 return destroy(reinterpret_cast<IrInstGenVarPtr *>(inst), name);
590 case IrInstGenIdReturnPtr:
591 return destroy(reinterpret_cast<IrInstGenReturnPtr *>(inst), name);
592 case IrInstGenIdLoadPtr:
593 return destroy(reinterpret_cast<IrInstGenLoadPtr *>(inst), name);
594 case IrInstGenIdStorePtr:
595 return destroy(reinterpret_cast<IrInstGenStorePtr *>(inst), name);
596 case IrInstGenIdVectorStoreElem:
597 return destroy(reinterpret_cast<IrInstGenVectorStoreElem *>(inst), name);
598 case IrInstGenIdStructFieldPtr:
599 return destroy(reinterpret_cast<IrInstGenStructFieldPtr *>(inst), name);
600 case IrInstGenIdUnionFieldPtr:
601 return destroy(reinterpret_cast<IrInstGenUnionFieldPtr *>(inst), name);
602 case IrInstGenIdAsm:
603 return destroy(reinterpret_cast<IrInstGenAsm *>(inst), name);
604 case IrInstGenIdTestNonNull:
605 return destroy(reinterpret_cast<IrInstGenTestNonNull *>(inst), name);
606 case IrInstGenIdOptionalUnwrapPtr:
607 return destroy(reinterpret_cast<IrInstGenOptionalUnwrapPtr *>(inst), name);
608 case IrInstGenIdPopCount:
609 return destroy(reinterpret_cast<IrInstGenPopCount *>(inst), name);
610 case IrInstGenIdClz:
611 return destroy(reinterpret_cast<IrInstGenClz *>(inst), name);
612 case IrInstGenIdCtz:
613 return destroy(reinterpret_cast<IrInstGenCtz *>(inst), name);
614 case IrInstGenIdBswap:
615 return destroy(reinterpret_cast<IrInstGenBswap *>(inst), name);
616 case IrInstGenIdBitReverse:
617 return destroy(reinterpret_cast<IrInstGenBitReverse *>(inst), name);
618 case IrInstGenIdSwitchBr:
619 return destroy(reinterpret_cast<IrInstGenSwitchBr *>(inst), name);
620 case IrInstGenIdUnionTag:
621 return destroy(reinterpret_cast<IrInstGenUnionTag *>(inst), name);
622 case IrInstGenIdRef:
623 return destroy(reinterpret_cast<IrInstGenRef *>(inst), name);
624 case IrInstGenIdErrName:
625 return destroy(reinterpret_cast<IrInstGenErrName *>(inst), name);
626 case IrInstGenIdCmpxchg:
627 return destroy(reinterpret_cast<IrInstGenCmpxchg *>(inst), name);
628 case IrInstGenIdFence:
629 return destroy(reinterpret_cast<IrInstGenFence *>(inst), name);
630 case IrInstGenIdTruncate:
631 return destroy(reinterpret_cast<IrInstGenTruncate *>(inst), name);
632 case IrInstGenIdShuffleVector:
633 return destroy(reinterpret_cast<IrInstGenShuffleVector *>(inst), name);
634 case IrInstGenIdSplat:
635 return destroy(reinterpret_cast<IrInstGenSplat *>(inst), name);
636 case IrInstGenIdBoolNot:
637 return destroy(reinterpret_cast<IrInstGenBoolNot *>(inst), name);
638 case IrInstGenIdMemset:
639 return destroy(reinterpret_cast<IrInstGenMemset *>(inst), name);
640 case IrInstGenIdMemcpy:
641 return destroy(reinterpret_cast<IrInstGenMemcpy *>(inst), name);
642 case IrInstGenIdSlice:
643 return destroy(reinterpret_cast<IrInstGenSlice *>(inst), name);
644 case IrInstGenIdBreakpoint:
645 return destroy(reinterpret_cast<IrInstGenBreakpoint *>(inst), name);
646 case IrInstGenIdReturnAddress:
647 return destroy(reinterpret_cast<IrInstGenReturnAddress *>(inst), name);
648 case IrInstGenIdFrameAddress:
649 return destroy(reinterpret_cast<IrInstGenFrameAddress *>(inst), name);
650 case IrInstGenIdFrameHandle:
651 return destroy(reinterpret_cast<IrInstGenFrameHandle *>(inst), name);
652 case IrInstGenIdFrameSize:
653 return destroy(reinterpret_cast<IrInstGenFrameSize *>(inst), name);
654 case IrInstGenIdOverflowOp:
655 return destroy(reinterpret_cast<IrInstGenOverflowOp *>(inst), name);
656 case IrInstGenIdTestErr:
657 return destroy(reinterpret_cast<IrInstGenTestErr *>(inst), name);
658 case IrInstGenIdUnwrapErrCode:
659 return destroy(reinterpret_cast<IrInstGenUnwrapErrCode *>(inst), name);
660 case IrInstGenIdUnwrapErrPayload:
661 return destroy(reinterpret_cast<IrInstGenUnwrapErrPayload *>(inst), name);
662 case IrInstGenIdOptionalWrap:
663 return destroy(reinterpret_cast<IrInstGenOptionalWrap *>(inst), name);
664 case IrInstGenIdErrWrapCode:
665 return destroy(reinterpret_cast<IrInstGenErrWrapCode *>(inst), name);
666 case IrInstGenIdErrWrapPayload:
667 return destroy(reinterpret_cast<IrInstGenErrWrapPayload *>(inst), name);
668 case IrInstGenIdPtrCast:
669 return destroy(reinterpret_cast<IrInstGenPtrCast *>(inst), name);
670 case IrInstGenIdBitCast:
671 return destroy(reinterpret_cast<IrInstGenBitCast *>(inst), name);
672 case IrInstGenIdWidenOrShorten:
673 return destroy(reinterpret_cast<IrInstGenWidenOrShorten *>(inst), name);
674 case IrInstGenIdPtrToInt:
675 return destroy(reinterpret_cast<IrInstGenPtrToInt *>(inst), name);
676 case IrInstGenIdIntToPtr:
677 return destroy(reinterpret_cast<IrInstGenIntToPtr *>(inst), name);
678 case IrInstGenIdIntToEnum:
679 return destroy(reinterpret_cast<IrInstGenIntToEnum *>(inst), name);
680 case IrInstGenIdIntToErr:
681 return destroy(reinterpret_cast<IrInstGenIntToErr *>(inst), name);
682 case IrInstGenIdErrToInt:
683 return destroy(reinterpret_cast<IrInstGenErrToInt *>(inst), name);
684 case IrInstGenIdTagName:
685 return destroy(reinterpret_cast<IrInstGenTagName *>(inst), name);
686 case IrInstGenIdPanic:
687 return destroy(reinterpret_cast<IrInstGenPanic *>(inst), name);
688 case IrInstGenIdFieldParentPtr:
689 return destroy(reinterpret_cast<IrInstGenFieldParentPtr *>(inst), name);
690 case IrInstGenIdAlignCast:
691 return destroy(reinterpret_cast<IrInstGenAlignCast *>(inst), name);
692 case IrInstGenIdErrorReturnTrace:
693 return destroy(reinterpret_cast<IrInstGenErrorReturnTrace *>(inst), name);
694 case IrInstGenIdAtomicRmw:
695 return destroy(reinterpret_cast<IrInstGenAtomicRmw *>(inst), name);
696 case IrInstGenIdSaveErrRetAddr:
697 return destroy(reinterpret_cast<IrInstGenSaveErrRetAddr *>(inst), name);
698 case IrInstGenIdFloatOp:
699 return destroy(reinterpret_cast<IrInstGenFloatOp *>(inst), name);
700 case IrInstGenIdMulAdd:
701 return destroy(reinterpret_cast<IrInstGenMulAdd *>(inst), name);
702 case IrInstGenIdAtomicLoad:
703 return destroy(reinterpret_cast<IrInstGenAtomicLoad *>(inst), name);
704 case IrInstGenIdAtomicStore:
705 return destroy(reinterpret_cast<IrInstGenAtomicStore *>(inst), name);
706 case IrInstGenIdDeclVar:
707 return destroy(reinterpret_cast<IrInstGenDeclVar *>(inst), name);
708 case IrInstGenIdArrayToVector:
709 return destroy(reinterpret_cast<IrInstGenArrayToVector *>(inst), name);
710 case IrInstGenIdVectorToArray:
711 return destroy(reinterpret_cast<IrInstGenVectorToArray *>(inst), name);
712 case IrInstGenIdPtrOfArrayToSlice:
713 return destroy(reinterpret_cast<IrInstGenPtrOfArrayToSlice *>(inst), name);
714 case IrInstGenIdAssertZero:
715 return destroy(reinterpret_cast<IrInstGenAssertZero *>(inst), name);
716 case IrInstGenIdAssertNonNull:
717 return destroy(reinterpret_cast<IrInstGenAssertNonNull *>(inst), name);
718 case IrInstGenIdResizeSlice:
719 return destroy(reinterpret_cast<IrInstGenResizeSlice *>(inst), name);
720 case IrInstGenIdAlloca:
721 return destroy(reinterpret_cast<IrInstGenAlloca *>(inst), name);
722 case IrInstGenIdSuspendBegin:
723 return destroy(reinterpret_cast<IrInstGenSuspendBegin *>(inst), name);
724 case IrInstGenIdSuspendFinish:
725 return destroy(reinterpret_cast<IrInstGenSuspendFinish *>(inst), name);
726 case IrInstGenIdResume:
727 return destroy(reinterpret_cast<IrInstGenResume *>(inst), name);
728 case IrInstGenIdAwait:
729 return destroy(reinterpret_cast<IrInstGenAwait *>(inst), name);
730 case IrInstGenIdSpillBegin:
731 return destroy(reinterpret_cast<IrInstGenSpillBegin *>(inst), name);
732 case IrInstGenIdSpillEnd:
733 return destroy(reinterpret_cast<IrInstGenSpillEnd *>(inst), name);
734 case IrInstGenIdVectorExtractElem:
735 return destroy(reinterpret_cast<IrInstGenVectorExtractElem *>(inst), name);
736 case IrInstGenIdBinaryNot:
737 return destroy(reinterpret_cast<IrInstGenBinaryNot *>(inst), name);
738 case IrInstGenIdNegation:
739 return destroy(reinterpret_cast<IrInstGenNegation *>(inst), name);
740 case IrInstGenIdNegationWrapping:
741 return destroy(reinterpret_cast<IrInstGenNegationWrapping *>(inst), name);
611742 }
612743 zig_unreachable();
613744}
......@@ -623,17 +754,17 @@ static void ira_deref(IrAnalyze *ira) {
623754 assert(ira->ref_count != 0);
624755
625756 for (size_t bb_i = 0; bb_i < ira->old_irb.exec->basic_block_list.length; bb_i += 1) {
626 IrBasicBlock *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
757 IrBasicBlockSrc *pass1_bb = ira->old_irb.exec->basic_block_list.items[bb_i];
627758 for (size_t inst_i = 0; inst_i < pass1_bb->instruction_list.length; inst_i += 1) {
628 IrInstruction *pass1_inst = pass1_bb->instruction_list.items[inst_i];
629 destroy_instruction(pass1_inst);
759 IrInstSrc *pass1_inst = pass1_bb->instruction_list.items[inst_i];
760 destroy_instruction_src(pass1_inst);
630761 }
631 destroy(pass1_bb, "IrBasicBlock");
762 destroy(pass1_bb, "IrBasicBlockSrc");
632763 }
633764 ira->old_irb.exec->basic_block_list.deinit();
634765 ira->old_irb.exec->tld_list.deinit();
635766 // cannot destroy here because of var->owner_exec
636 //destroy(ira->old_irb.exec, "IrExecutablePass1");
767 //destroy(ira->old_irb.exec, "IrExecutableSrc");
637768 ira->src_implicit_return_type_list.deinit();
638769 ira->resume_stack.deinit();
639770 destroy(ira, "IrAnalyze");
......@@ -780,7 +911,7 @@ static bool types_have_same_zig_comptime_repr(CodeGen *codegen, ZigType *expecte
780911 zig_unreachable();
781912}
782913
783static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
914static bool ir_should_inline(IrExecutableSrc *exec, Scope *scope) {
784915 if (exec->is_inline)
785916 return true;
786917
......@@ -796,23 +927,35 @@ static bool ir_should_inline(IrExecutable *exec, Scope *scope) {
796927 return false;
797928}
798929
799static void ir_instruction_append(IrBasicBlock *basic_block, IrInstruction *instruction) {
930static void ir_instruction_append(IrBasicBlockSrc *basic_block, IrInstSrc *instruction) {
931 assert(basic_block);
932 assert(instruction);
933 basic_block->instruction_list.append(instruction);
934}
935
936static void ir_inst_gen_append(IrBasicBlockGen *basic_block, IrInstGen *instruction) {
800937 assert(basic_block);
801938 assert(instruction);
802939 basic_block->instruction_list.append(instruction);
803940}
804941
805static size_t exec_next_debug_id(IrExecutable *exec) {
942static size_t exec_next_debug_id(IrExecutableSrc *exec) {
943 size_t result = exec->next_debug_id;
944 exec->next_debug_id += 1;
945 return result;
946}
947
948static size_t exec_next_debug_id_gen(IrExecutableGen *exec) {
806949 size_t result = exec->next_debug_id;
807950 exec->next_debug_id += 1;
808951 return result;
809952}
810953
811static ZigFn *exec_fn_entry(IrExecutable *exec) {
954static ZigFn *exec_fn_entry(IrExecutableSrc *exec) {
812955 return exec->fn_entry;
813956}
814957
815static Buf *exec_c_import_buf(IrExecutable *exec) {
958static Buf *exec_c_import_buf(IrExecutableSrc *exec) {
816959 return exec->c_import_buf;
817960}
818961
......@@ -820,28 +963,42 @@ static bool value_is_comptime(ZigValue *const_val) {
820963 return const_val->special != ConstValSpecialRuntime;
821964}
822965
823static bool instr_is_comptime(IrInstruction *instruction) {
966static bool instr_is_comptime(IrInstGen *instruction) {
824967 return value_is_comptime(instruction->value);
825968}
826969
827static bool instr_is_unreachable(IrInstruction *instruction) {
828 return instruction->value->type && instruction->value->type->id == ZigTypeIdUnreachable;
970static bool instr_is_unreachable(IrInstSrc *instruction) {
971 return instruction->is_noreturn;
829972}
830973
831static void ir_link_new_bb(IrBasicBlock *new_bb, IrBasicBlock *old_bb) {
832 new_bb->other = old_bb;
833 old_bb->other = new_bb;
974static void ir_link_new_bb(IrBasicBlockGen *new_bb, IrBasicBlockSrc *old_bb) {
975 new_bb->parent = old_bb;
976 old_bb->child = new_bb;
834977}
835978
836static void ir_ref_bb(IrBasicBlock *bb) {
979static void ir_ref_bb(IrBasicBlockSrc *bb) {
837980 bb->ref_count += 1;
838981}
839982
840static void ir_ref_instruction(IrInstruction *instruction, IrBasicBlock *cur_bb) {
841 assert(instruction->id != IrInstructionIdInvalid);
842 instruction->ref_count += 1;
843 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
983static void ir_ref_bb_gen(IrBasicBlockGen *bb) {
984 bb->ref_count += 1;
985}
986
987static void ir_ref_instruction(IrInstSrc *instruction, IrBasicBlockSrc *cur_bb) {
988 assert(instruction->id != IrInstSrcIdInvalid);
989 instruction->base.ref_count += 1;
990 if (instruction->owner_bb != cur_bb && !instr_is_unreachable(instruction)
991 && instruction->id != IrInstSrcIdConst)
992 {
844993 ir_ref_bb(instruction->owner_bb);
994 }
995}
996
997static void ir_ref_inst_gen(IrInstGen *instruction, IrBasicBlockGen *cur_bb) {
998 assert(instruction->id != IrInstGenIdInvalid);
999 instruction->base.ref_count += 1;
1000 if (instruction->owner_bb != cur_bb && !instr_is_comptime(instruction))
1001 ir_ref_bb_gen(instruction->owner_bb);
8451002}
8461003
8471004static void ir_ref_var(ZigVar *var) {
......@@ -890,962 +1047,1259 @@ ZigType *ir_analyze_type_expr(IrAnalyze *ira, Scope *scope, AstNode *node) {
8901047 return res_type;
8911048}
8921049
893static IrBasicBlock *ir_create_basic_block(IrBuilder *irb, Scope *scope, const char *name_hint) {
894 IrBasicBlock *result = allocate<IrBasicBlock>(1, "IrBasicBlock");
1050static IrBasicBlockSrc *ir_create_basic_block(IrBuilderSrc *irb, Scope *scope, const char *name_hint) {
1051 IrBasicBlockSrc *result = allocate<IrBasicBlockSrc>(1, "IrBasicBlockSrc");
8951052 result->scope = scope;
8961053 result->name_hint = name_hint;
8971054 result->debug_id = exec_next_debug_id(irb->exec);
898 result->index = SIZE_MAX; // set later
1055 result->index = UINT32_MAX; // set later
8991056 return result;
9001057}
9011058
902static IrBasicBlock *ir_build_bb_from(IrBuilder *irb, IrBasicBlock *other_bb) {
903 IrBasicBlock *new_bb = ir_create_basic_block(irb, other_bb->scope, other_bb->name_hint);
1059static IrBasicBlockGen *ir_create_basic_block_gen(IrAnalyze *ira, Scope *scope, const char *name_hint) {
1060 IrBasicBlockGen *result = allocate<IrBasicBlockGen>(1, "IrBasicBlockGen");
1061 result->scope = scope;
1062 result->name_hint = name_hint;
1063 result->debug_id = exec_next_debug_id_gen(ira->new_irb.exec);
1064 result->index = UINT32_MAX; // set later
1065 return result;
1066}
1067
1068static IrBasicBlockGen *ir_build_bb_from(IrAnalyze *ira, IrBasicBlockSrc *other_bb) {
1069 IrBasicBlockGen *new_bb = ir_create_basic_block_gen(ira, other_bb->scope, other_bb->name_hint);
9041070 ir_link_new_bb(new_bb, other_bb);
9051071 return new_bb;
9061072}
9071073
908static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarSrc *) {
909 return IrInstructionIdDeclVarSrc;
1074static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclVar *) {
1075 return IrInstSrcIdDeclVar;
1076}
1077
1078static constexpr IrInstSrcId ir_inst_id(IrInstSrcBr *) {
1079 return IrInstSrcIdBr;
1080}
1081
1082static constexpr IrInstSrcId ir_inst_id(IrInstSrcCondBr *) {
1083 return IrInstSrcIdCondBr;
1084}
1085
1086static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchBr *) {
1087 return IrInstSrcIdSwitchBr;
1088}
1089
1090static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchVar *) {
1091 return IrInstSrcIdSwitchVar;
1092}
1093
1094static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchElseVar *) {
1095 return IrInstSrcIdSwitchElseVar;
1096}
1097
1098static constexpr IrInstSrcId ir_inst_id(IrInstSrcSwitchTarget *) {
1099 return IrInstSrcIdSwitchTarget;
1100}
1101
1102static constexpr IrInstSrcId ir_inst_id(IrInstSrcPhi *) {
1103 return IrInstSrcIdPhi;
1104}
1105
1106static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnOp *) {
1107 return IrInstSrcIdUnOp;
1108}
1109
1110static constexpr IrInstSrcId ir_inst_id(IrInstSrcBinOp *) {
1111 return IrInstSrcIdBinOp;
1112}
1113
1114static constexpr IrInstSrcId ir_inst_id(IrInstSrcMergeErrSets *) {
1115 return IrInstSrcIdMergeErrSets;
1116}
1117
1118static constexpr IrInstSrcId ir_inst_id(IrInstSrcLoadPtr *) {
1119 return IrInstSrcIdLoadPtr;
1120}
1121
1122static constexpr IrInstSrcId ir_inst_id(IrInstSrcStorePtr *) {
1123 return IrInstSrcIdStorePtr;
1124}
1125
1126static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldPtr *) {
1127 return IrInstSrcIdFieldPtr;
1128}
1129
1130static constexpr IrInstSrcId ir_inst_id(IrInstSrcElemPtr *) {
1131 return IrInstSrcIdElemPtr;
1132}
1133
1134static constexpr IrInstSrcId ir_inst_id(IrInstSrcVarPtr *) {
1135 return IrInstSrcIdVarPtr;
1136}
1137
1138static constexpr IrInstSrcId ir_inst_id(IrInstSrcCall *) {
1139 return IrInstSrcIdCall;
1140}
1141
1142static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallArgs *) {
1143 return IrInstSrcIdCallArgs;
1144}
1145
1146static constexpr IrInstSrcId ir_inst_id(IrInstSrcCallExtra *) {
1147 return IrInstSrcIdCallExtra;
1148}
1149
1150static constexpr IrInstSrcId ir_inst_id(IrInstSrcConst *) {
1151 return IrInstSrcIdConst;
1152}
1153
1154static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturn *) {
1155 return IrInstSrcIdReturn;
1156}
1157
1158static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitList *) {
1159 return IrInstSrcIdContainerInitList;
1160}
1161
1162static constexpr IrInstSrcId ir_inst_id(IrInstSrcContainerInitFields *) {
1163 return IrInstSrcIdContainerInitFields;
1164}
1165
1166static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnreachable *) {
1167 return IrInstSrcIdUnreachable;
1168}
1169
1170static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeOf *) {
1171 return IrInstSrcIdTypeOf;
1172}
1173
1174static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetCold *) {
1175 return IrInstSrcIdSetCold;
1176}
1177
1178static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetRuntimeSafety *) {
1179 return IrInstSrcIdSetRuntimeSafety;
1180}
1181
1182static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetFloatMode *) {
1183 return IrInstSrcIdSetFloatMode;
1184}
1185
1186static constexpr IrInstSrcId ir_inst_id(IrInstSrcArrayType *) {
1187 return IrInstSrcIdArrayType;
1188}
1189
1190static constexpr IrInstSrcId ir_inst_id(IrInstSrcAnyFrameType *) {
1191 return IrInstSrcIdAnyFrameType;
1192}
1193
1194static constexpr IrInstSrcId ir_inst_id(IrInstSrcSliceType *) {
1195 return IrInstSrcIdSliceType;
1196}
1197
1198static constexpr IrInstSrcId ir_inst_id(IrInstSrcAsm *) {
1199 return IrInstSrcIdAsm;
1200}
1201
1202static constexpr IrInstSrcId ir_inst_id(IrInstSrcSizeOf *) {
1203 return IrInstSrcIdSizeOf;
1204}
1205
1206static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestNonNull *) {
1207 return IrInstSrcIdTestNonNull;
1208}
1209
1210static constexpr IrInstSrcId ir_inst_id(IrInstSrcOptionalUnwrapPtr *) {
1211 return IrInstSrcIdOptionalUnwrapPtr;
1212}
1213
1214static constexpr IrInstSrcId ir_inst_id(IrInstSrcClz *) {
1215 return IrInstSrcIdClz;
1216}
1217
1218static constexpr IrInstSrcId ir_inst_id(IrInstSrcCtz *) {
1219 return IrInstSrcIdCtz;
1220}
1221
1222static constexpr IrInstSrcId ir_inst_id(IrInstSrcPopCount *) {
1223 return IrInstSrcIdPopCount;
1224}
1225
1226static constexpr IrInstSrcId ir_inst_id(IrInstSrcBswap *) {
1227 return IrInstSrcIdBswap;
1228}
1229
1230static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitReverse *) {
1231 return IrInstSrcIdBitReverse;
1232}
1233
1234static constexpr IrInstSrcId ir_inst_id(IrInstSrcImport *) {
1235 return IrInstSrcIdImport;
1236}
1237
1238static constexpr IrInstSrcId ir_inst_id(IrInstSrcCImport *) {
1239 return IrInstSrcIdCImport;
1240}
1241
1242static constexpr IrInstSrcId ir_inst_id(IrInstSrcCInclude *) {
1243 return IrInstSrcIdCInclude;
1244}
1245
1246static constexpr IrInstSrcId ir_inst_id(IrInstSrcCDefine *) {
1247 return IrInstSrcIdCDefine;
1248}
1249
1250static constexpr IrInstSrcId ir_inst_id(IrInstSrcCUndef *) {
1251 return IrInstSrcIdCUndef;
1252}
1253
1254static constexpr IrInstSrcId ir_inst_id(IrInstSrcRef *) {
1255 return IrInstSrcIdRef;
1256}
1257
1258static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileErr *) {
1259 return IrInstSrcIdCompileErr;
1260}
1261
1262static constexpr IrInstSrcId ir_inst_id(IrInstSrcCompileLog *) {
1263 return IrInstSrcIdCompileLog;
1264}
1265
1266static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrName *) {
1267 return IrInstSrcIdErrName;
1268}
1269
1270static constexpr IrInstSrcId ir_inst_id(IrInstSrcEmbedFile *) {
1271 return IrInstSrcIdEmbedFile;
1272}
1273
1274static constexpr IrInstSrcId ir_inst_id(IrInstSrcCmpxchg *) {
1275 return IrInstSrcIdCmpxchg;
1276}
1277
1278static constexpr IrInstSrcId ir_inst_id(IrInstSrcFence *) {
1279 return IrInstSrcIdFence;
1280}
1281
1282static constexpr IrInstSrcId ir_inst_id(IrInstSrcTruncate *) {
1283 return IrInstSrcIdTruncate;
1284}
1285
1286static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntCast *) {
1287 return IrInstSrcIdIntCast;
1288}
1289
1290static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatCast *) {
1291 return IrInstSrcIdFloatCast;
1292}
1293
1294static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToFloat *) {
1295 return IrInstSrcIdIntToFloat;
1296}
1297
1298static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatToInt *) {
1299 return IrInstSrcIdFloatToInt;
1300}
1301
1302static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolToInt *) {
1303 return IrInstSrcIdBoolToInt;
9101304}
9111305
912static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclVarGen *) {
913 return IrInstructionIdDeclVarGen;
1306static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntType *) {
1307 return IrInstSrcIdIntType;
9141308}
9151309
916static constexpr IrInstructionId ir_instruction_id(IrInstructionCondBr *) {
917 return IrInstructionIdCondBr;
1310static constexpr IrInstSrcId ir_inst_id(IrInstSrcVectorType *) {
1311 return IrInstSrcIdVectorType;
9181312}
9191313
920static constexpr IrInstructionId ir_instruction_id(IrInstructionBr *) {
921 return IrInstructionIdBr;
1314static constexpr IrInstSrcId ir_inst_id(IrInstSrcShuffleVector *) {
1315 return IrInstSrcIdShuffleVector;
9221316}
9231317
924static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchBr *) {
925 return IrInstructionIdSwitchBr;
1318static constexpr IrInstSrcId ir_inst_id(IrInstSrcSplat *) {
1319 return IrInstSrcIdSplat;
9261320}
9271321
928static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchVar *) {
929 return IrInstructionIdSwitchVar;
1322static constexpr IrInstSrcId ir_inst_id(IrInstSrcBoolNot *) {
1323 return IrInstSrcIdBoolNot;
9301324}
9311325
932static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchElseVar *) {
933 return IrInstructionIdSwitchElseVar;
1326static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemset *) {
1327 return IrInstSrcIdMemset;
9341328}
9351329
936static constexpr IrInstructionId ir_instruction_id(IrInstructionSwitchTarget *) {
937 return IrInstructionIdSwitchTarget;
1330static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemcpy *) {
1331 return IrInstSrcIdMemcpy;
9381332}
9391333
940static constexpr IrInstructionId ir_instruction_id(IrInstructionPhi *) {
941 return IrInstructionIdPhi;
1334static constexpr IrInstSrcId ir_inst_id(IrInstSrcSlice *) {
1335 return IrInstSrcIdSlice;
9421336}
9431337
944static constexpr IrInstructionId ir_instruction_id(IrInstructionUnOp *) {
945 return IrInstructionIdUnOp;
1338static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberCount *) {
1339 return IrInstSrcIdMemberCount;
9461340}
9471341
948static constexpr IrInstructionId ir_instruction_id(IrInstructionBinOp *) {
949 return IrInstructionIdBinOp;
1342static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberType *) {
1343 return IrInstSrcIdMemberType;
9501344}
9511345
952static constexpr IrInstructionId ir_instruction_id(IrInstructionMergeErrSets *) {
953 return IrInstructionIdMergeErrSets;
1346static constexpr IrInstSrcId ir_inst_id(IrInstSrcMemberName *) {
1347 return IrInstSrcIdMemberName;
9541348}
9551349
956static constexpr IrInstructionId ir_instruction_id(IrInstructionExport *) {
957 return IrInstructionIdExport;
1350static constexpr IrInstSrcId ir_inst_id(IrInstSrcBreakpoint *) {
1351 return IrInstSrcIdBreakpoint;
9581352}
9591353
960static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtr *) {
961 return IrInstructionIdLoadPtr;
1354static constexpr IrInstSrcId ir_inst_id(IrInstSrcReturnAddress *) {
1355 return IrInstSrcIdReturnAddress;
9621356}
9631357
964static constexpr IrInstructionId ir_instruction_id(IrInstructionLoadPtrGen *) {
965 return IrInstructionIdLoadPtrGen;
1358static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameAddress *) {
1359 return IrInstSrcIdFrameAddress;
9661360}
9671361
968static constexpr IrInstructionId ir_instruction_id(IrInstructionStorePtr *) {
969 return IrInstructionIdStorePtr;
1362static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameHandle *) {
1363 return IrInstSrcIdFrameHandle;
9701364}
9711365
972static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorStoreElem *) {
973 return IrInstructionIdVectorStoreElem;
1366static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameType *) {
1367 return IrInstSrcIdFrameType;
9741368}
9751369
976static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldPtr *) {
977 return IrInstructionIdFieldPtr;
1370static constexpr IrInstSrcId ir_inst_id(IrInstSrcFrameSize *) {
1371 return IrInstSrcIdFrameSize;
9781372}
9791373
980static constexpr IrInstructionId ir_instruction_id(IrInstructionStructFieldPtr *) {
981 return IrInstructionIdStructFieldPtr;
1374static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignOf *) {
1375 return IrInstSrcIdAlignOf;
9821376}
9831377
984static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionFieldPtr *) {
985 return IrInstructionIdUnionFieldPtr;
1378static constexpr IrInstSrcId ir_inst_id(IrInstSrcOverflowOp *) {
1379 return IrInstSrcIdOverflowOp;
9861380}
9871381
988static constexpr IrInstructionId ir_instruction_id(IrInstructionElemPtr *) {
989 return IrInstructionIdElemPtr;
1382static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestErr *) {
1383 return IrInstSrcIdTestErr;
9901384}
9911385
992static constexpr IrInstructionId ir_instruction_id(IrInstructionVarPtr *) {
993 return IrInstructionIdVarPtr;
1386static constexpr IrInstSrcId ir_inst_id(IrInstSrcMulAdd *) {
1387 return IrInstSrcIdMulAdd;
9941388}
9951389
996static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnPtr *) {
997 return IrInstructionIdReturnPtr;
1390static constexpr IrInstSrcId ir_inst_id(IrInstSrcFloatOp *) {
1391 return IrInstSrcIdFloatOp;
9981392}
9991393
1000static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrc *) {
1001 return IrInstructionIdCallSrc;
1394static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrCode *) {
1395 return IrInstSrcIdUnwrapErrCode;
10021396}
10031397
1004static constexpr IrInstructionId ir_instruction_id(IrInstructionCallSrcArgs *) {
1005 return IrInstructionIdCallSrcArgs;
1398static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnwrapErrPayload *) {
1399 return IrInstSrcIdUnwrapErrPayload;
10061400}
10071401
1008static constexpr IrInstructionId ir_instruction_id(IrInstructionCallExtra *) {
1009 return IrInstructionIdCallExtra;
1402static constexpr IrInstSrcId ir_inst_id(IrInstSrcFnProto *) {
1403 return IrInstSrcIdFnProto;
10101404}
10111405
1012static constexpr IrInstructionId ir_instruction_id(IrInstructionCallGen *) {
1013 return IrInstructionIdCallGen;
1406static constexpr IrInstSrcId ir_inst_id(IrInstSrcTestComptime *) {
1407 return IrInstSrcIdTestComptime;
10141408}
10151409
1016static constexpr IrInstructionId ir_instruction_id(IrInstructionConst *) {
1017 return IrInstructionIdConst;
1410static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrCast *) {
1411 return IrInstSrcIdPtrCast;
10181412}
10191413
1020static constexpr IrInstructionId ir_instruction_id(IrInstructionReturn *) {
1021 return IrInstructionIdReturn;
1414static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitCast *) {
1415 return IrInstSrcIdBitCast;
10221416}
10231417
1024static constexpr IrInstructionId ir_instruction_id(IrInstructionCast *) {
1025 return IrInstructionIdCast;
1418static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToPtr *) {
1419 return IrInstSrcIdIntToPtr;
10261420}
10271421
1028static constexpr IrInstructionId ir_instruction_id(IrInstructionResizeSlice *) {
1029 return IrInstructionIdResizeSlice;
1422static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrToInt *) {
1423 return IrInstSrcIdPtrToInt;
10301424}
10311425
1032static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitList *) {
1033 return IrInstructionIdContainerInitList;
1426static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToEnum *) {
1427 return IrInstSrcIdIntToEnum;
10341428}
10351429
1036static constexpr IrInstructionId ir_instruction_id(IrInstructionContainerInitFields *) {
1037 return IrInstructionIdContainerInitFields;
1430static constexpr IrInstSrcId ir_inst_id(IrInstSrcEnumToInt *) {
1431 return IrInstSrcIdEnumToInt;
10381432}
10391433
1040static constexpr IrInstructionId ir_instruction_id(IrInstructionUnreachable *) {
1041 return IrInstructionIdUnreachable;
1434static constexpr IrInstSrcId ir_inst_id(IrInstSrcIntToErr *) {
1435 return IrInstSrcIdIntToErr;
10421436}
10431437
1044static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeOf *) {
1045 return IrInstructionIdTypeOf;
1438static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrToInt *) {
1439 return IrInstSrcIdErrToInt;
10461440}
10471441
1048static constexpr IrInstructionId ir_instruction_id(IrInstructionSetCold *) {
1049 return IrInstructionIdSetCold;
1442static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckSwitchProngs *) {
1443 return IrInstSrcIdCheckSwitchProngs;
10501444}
10511445
1052static constexpr IrInstructionId ir_instruction_id(IrInstructionSetRuntimeSafety *) {
1053 return IrInstructionIdSetRuntimeSafety;
1446static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckStatementIsVoid *) {
1447 return IrInstSrcIdCheckStatementIsVoid;
10541448}
10551449
1056static constexpr IrInstructionId ir_instruction_id(IrInstructionSetFloatMode *) {
1057 return IrInstructionIdSetFloatMode;
1450static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeName *) {
1451 return IrInstSrcIdTypeName;
10581452}
10591453
1060static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayType *) {
1061 return IrInstructionIdArrayType;
1454static constexpr IrInstSrcId ir_inst_id(IrInstSrcDeclRef *) {
1455 return IrInstSrcIdDeclRef;
10621456}
10631457
1064static constexpr IrInstructionId ir_instruction_id(IrInstructionAnyFrameType *) {
1065 return IrInstructionIdAnyFrameType;
1458static constexpr IrInstSrcId ir_inst_id(IrInstSrcPanic *) {
1459 return IrInstSrcIdPanic;
10661460}
10671461
1068static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceType *) {
1069 return IrInstructionIdSliceType;
1462static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagName *) {
1463 return IrInstSrcIdTagName;
10701464}
10711465
1072static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmSrc *) {
1073 return IrInstructionIdAsmSrc;
1466static constexpr IrInstSrcId ir_inst_id(IrInstSrcTagType *) {
1467 return IrInstSrcIdTagType;
10741468}
10751469
1076static constexpr IrInstructionId ir_instruction_id(IrInstructionAsmGen *) {
1077 return IrInstructionIdAsmGen;
1470static constexpr IrInstSrcId ir_inst_id(IrInstSrcFieldParentPtr *) {
1471 return IrInstSrcIdFieldParentPtr;
10781472}
10791473
1080static constexpr IrInstructionId ir_instruction_id(IrInstructionSizeOf *) {
1081 return IrInstructionIdSizeOf;
1474static constexpr IrInstSrcId ir_inst_id(IrInstSrcByteOffsetOf *) {
1475 return IrInstSrcIdByteOffsetOf;
10821476}
10831477
1084static constexpr IrInstructionId ir_instruction_id(IrInstructionTestNonNull *) {
1085 return IrInstructionIdTestNonNull;
1478static constexpr IrInstSrcId ir_inst_id(IrInstSrcBitOffsetOf *) {
1479 return IrInstSrcIdBitOffsetOf;
10861480}
10871481
1088static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalUnwrapPtr *) {
1089 return IrInstructionIdOptionalUnwrapPtr;
1482static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeInfo *) {
1483 return IrInstSrcIdTypeInfo;
10901484}
10911485
1092static constexpr IrInstructionId ir_instruction_id(IrInstructionClz *) {
1093 return IrInstructionIdClz;
1486static constexpr IrInstSrcId ir_inst_id(IrInstSrcType *) {
1487 return IrInstSrcIdType;
10941488}
10951489
1096static constexpr IrInstructionId ir_instruction_id(IrInstructionCtz *) {
1097 return IrInstructionIdCtz;
1490static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasField *) {
1491 return IrInstSrcIdHasField;
10981492}
10991493
1100static constexpr IrInstructionId ir_instruction_id(IrInstructionPopCount *) {
1101 return IrInstructionIdPopCount;
1494static constexpr IrInstSrcId ir_inst_id(IrInstSrcTypeId *) {
1495 return IrInstSrcIdTypeId;
11021496}
11031497
1104static constexpr IrInstructionId ir_instruction_id(IrInstructionBswap *) {
1105 return IrInstructionIdBswap;
1498static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetEvalBranchQuota *) {
1499 return IrInstSrcIdSetEvalBranchQuota;
11061500}
11071501
1108static constexpr IrInstructionId ir_instruction_id(IrInstructionBitReverse *) {
1109 return IrInstructionIdBitReverse;
1502static constexpr IrInstSrcId ir_inst_id(IrInstSrcPtrType *) {
1503 return IrInstSrcIdPtrType;
11101504}
11111505
1112static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionTag *) {
1113 return IrInstructionIdUnionTag;
1506static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlignCast *) {
1507 return IrInstSrcIdAlignCast;
11141508}
11151509
1116static constexpr IrInstructionId ir_instruction_id(IrInstructionImport *) {
1117 return IrInstructionIdImport;
1510static constexpr IrInstSrcId ir_inst_id(IrInstSrcImplicitCast *) {
1511 return IrInstSrcIdImplicitCast;
11181512}
11191513
1120static constexpr IrInstructionId ir_instruction_id(IrInstructionCImport *) {
1121 return IrInstructionIdCImport;
1514static constexpr IrInstSrcId ir_inst_id(IrInstSrcResolveResult *) {
1515 return IrInstSrcIdResolveResult;
11221516}
11231517
1124static constexpr IrInstructionId ir_instruction_id(IrInstructionCInclude *) {
1125 return IrInstructionIdCInclude;
1518static constexpr IrInstSrcId ir_inst_id(IrInstSrcResetResult *) {
1519 return IrInstSrcIdResetResult;
11261520}
11271521
1128static constexpr IrInstructionId ir_instruction_id(IrInstructionCDefine *) {
1129 return IrInstructionIdCDefine;
1522static constexpr IrInstSrcId ir_inst_id(IrInstSrcOpaqueType *) {
1523 return IrInstSrcIdOpaqueType;
11301524}
11311525
1132static constexpr IrInstructionId ir_instruction_id(IrInstructionCUndef *) {
1133 return IrInstructionIdCUndef;
1526static constexpr IrInstSrcId ir_inst_id(IrInstSrcSetAlignStack *) {
1527 return IrInstSrcIdSetAlignStack;
11341528}
11351529
1136static constexpr IrInstructionId ir_instruction_id(IrInstructionRef *) {
1137 return IrInstructionIdRef;
1530static constexpr IrInstSrcId ir_inst_id(IrInstSrcArgType *) {
1531 return IrInstSrcIdArgType;
11381532}
11391533
1140static constexpr IrInstructionId ir_instruction_id(IrInstructionRefGen *) {
1141 return IrInstructionIdRefGen;
1534static constexpr IrInstSrcId ir_inst_id(IrInstSrcExport *) {
1535 return IrInstSrcIdExport;
11421536}
11431537
1144static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileErr *) {
1145 return IrInstructionIdCompileErr;
1538static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorReturnTrace *) {
1539 return IrInstSrcIdErrorReturnTrace;
11461540}
11471541
1148static constexpr IrInstructionId ir_instruction_id(IrInstructionCompileLog *) {
1149 return IrInstructionIdCompileLog;
1542static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrorUnion *) {
1543 return IrInstSrcIdErrorUnion;
11501544}
11511545
1152static constexpr IrInstructionId ir_instruction_id(IrInstructionErrName *) {
1153 return IrInstructionIdErrName;
1546static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicRmw *) {
1547 return IrInstSrcIdAtomicRmw;
11541548}
11551549
1156static constexpr IrInstructionId ir_instruction_id(IrInstructionEmbedFile *) {
1157 return IrInstructionIdEmbedFile;
1550static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicLoad *) {
1551 return IrInstSrcIdAtomicLoad;
11581552}
11591553
1160static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgSrc *) {
1161 return IrInstructionIdCmpxchgSrc;
1554static constexpr IrInstSrcId ir_inst_id(IrInstSrcAtomicStore *) {
1555 return IrInstSrcIdAtomicStore;
11621556}
11631557
1164static constexpr IrInstructionId ir_instruction_id(IrInstructionCmpxchgGen *) {
1165 return IrInstructionIdCmpxchgGen;
1558static constexpr IrInstSrcId ir_inst_id(IrInstSrcSaveErrRetAddr *) {
1559 return IrInstSrcIdSaveErrRetAddr;
11661560}
11671561
1168static constexpr IrInstructionId ir_instruction_id(IrInstructionFence *) {
1169 return IrInstructionIdFence;
1562static constexpr IrInstSrcId ir_inst_id(IrInstSrcAddImplicitReturnType *) {
1563 return IrInstSrcIdAddImplicitReturnType;
11701564}
11711565
1172static constexpr IrInstructionId ir_instruction_id(IrInstructionTruncate *) {
1173 return IrInstructionIdTruncate;
1566static constexpr IrInstSrcId ir_inst_id(IrInstSrcErrSetCast *) {
1567 return IrInstSrcIdErrSetCast;
11741568}
11751569
1176static constexpr IrInstructionId ir_instruction_id(IrInstructionIntCast *) {
1177 return IrInstructionIdIntCast;
1570static constexpr IrInstSrcId ir_inst_id(IrInstSrcToBytes *) {
1571 return IrInstSrcIdToBytes;
11781572}
11791573
1180static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatCast *) {
1181 return IrInstructionIdFloatCast;
1574static constexpr IrInstSrcId ir_inst_id(IrInstSrcFromBytes *) {
1575 return IrInstSrcIdFromBytes;
11821576}
11831577
1184static constexpr IrInstructionId ir_instruction_id(IrInstructionErrSetCast *) {
1185 return IrInstructionIdErrSetCast;
1578static constexpr IrInstSrcId ir_inst_id(IrInstSrcCheckRuntimeScope *) {
1579 return IrInstSrcIdCheckRuntimeScope;
11861580}
11871581
1188static constexpr IrInstructionId ir_instruction_id(IrInstructionToBytes *) {
1189 return IrInstructionIdToBytes;
1582static constexpr IrInstSrcId ir_inst_id(IrInstSrcHasDecl *) {
1583 return IrInstSrcIdHasDecl;
11901584}
11911585
1192static constexpr IrInstructionId ir_instruction_id(IrInstructionFromBytes *) {
1193 return IrInstructionIdFromBytes;
1586static constexpr IrInstSrcId ir_inst_id(IrInstSrcUndeclaredIdent *) {
1587 return IrInstSrcIdUndeclaredIdent;
11941588}
11951589
1196static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToFloat *) {
1197 return IrInstructionIdIntToFloat;
1590static constexpr IrInstSrcId ir_inst_id(IrInstSrcAlloca *) {
1591 return IrInstSrcIdAlloca;
11981592}
11991593
1200static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatToInt *) {
1201 return IrInstructionIdFloatToInt;
1594static constexpr IrInstSrcId ir_inst_id(IrInstSrcEndExpr *) {
1595 return IrInstSrcIdEndExpr;
12021596}
12031597
1204static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolToInt *) {
1205 return IrInstructionIdBoolToInt;
1598static constexpr IrInstSrcId ir_inst_id(IrInstSrcUnionInitNamedField *) {
1599 return IrInstSrcIdUnionInitNamedField;
12061600}
12071601
1208static constexpr IrInstructionId ir_instruction_id(IrInstructionIntType *) {
1209 return IrInstructionIdIntType;
1602static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendBegin *) {
1603 return IrInstSrcIdSuspendBegin;
12101604}
12111605
1212static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorType *) {
1213 return IrInstructionIdVectorType;
1606static constexpr IrInstSrcId ir_inst_id(IrInstSrcSuspendFinish *) {
1607 return IrInstSrcIdSuspendFinish;
12141608}
12151609
1216static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) {
1217 return IrInstructionIdShuffleVector;
1610static constexpr IrInstSrcId ir_inst_id(IrInstSrcAwait *) {
1611 return IrInstSrcIdAwait;
12181612}
12191613
1220static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {
1221 return IrInstructionIdSplatSrc;
1614static constexpr IrInstSrcId ir_inst_id(IrInstSrcResume *) {
1615 return IrInstSrcIdResume;
12221616}
12231617
1224static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {
1225 return IrInstructionIdSplatGen;
1618static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillBegin *) {
1619 return IrInstSrcIdSpillBegin;
12261620}
12271621
1228static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {
1229 return IrInstructionIdBoolNot;
1622static constexpr IrInstSrcId ir_inst_id(IrInstSrcSpillEnd *) {
1623 return IrInstSrcIdSpillEnd;
12301624}
12311625
1232static constexpr IrInstructionId ir_instruction_id(IrInstructionMemset *) {
1233 return IrInstructionIdMemset;
1626
1627static constexpr IrInstGenId ir_inst_id(IrInstGenDeclVar *) {
1628 return IrInstGenIdDeclVar;
12341629}
12351630
1236static constexpr IrInstructionId ir_instruction_id(IrInstructionMemcpy *) {
1237 return IrInstructionIdMemcpy;
1631static constexpr IrInstGenId ir_inst_id(IrInstGenBr *) {
1632 return IrInstGenIdBr;
12381633}
12391634
1240static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceSrc *) {
1241 return IrInstructionIdSliceSrc;
1635static constexpr IrInstGenId ir_inst_id(IrInstGenCondBr *) {
1636 return IrInstGenIdCondBr;
12421637}
12431638
1244static constexpr IrInstructionId ir_instruction_id(IrInstructionSliceGen *) {
1245 return IrInstructionIdSliceGen;
1639static constexpr IrInstGenId ir_inst_id(IrInstGenSwitchBr *) {
1640 return IrInstGenIdSwitchBr;
12461641}
12471642
1248static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberCount *) {
1249 return IrInstructionIdMemberCount;
1643static constexpr IrInstGenId ir_inst_id(IrInstGenPhi *) {
1644 return IrInstGenIdPhi;
12501645}
12511646
1252static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberType *) {
1253 return IrInstructionIdMemberType;
1647static constexpr IrInstGenId ir_inst_id(IrInstGenBinaryNot *) {
1648 return IrInstGenIdBinaryNot;
12541649}
12551650
1256static constexpr IrInstructionId ir_instruction_id(IrInstructionMemberName *) {
1257 return IrInstructionIdMemberName;
1651static constexpr IrInstGenId ir_inst_id(IrInstGenNegation *) {
1652 return IrInstGenIdNegation;
12581653}
12591654
1260static constexpr IrInstructionId ir_instruction_id(IrInstructionBreakpoint *) {
1261 return IrInstructionIdBreakpoint;
1655static constexpr IrInstGenId ir_inst_id(IrInstGenNegationWrapping *) {
1656 return IrInstGenIdNegationWrapping;
12621657}
12631658
1264static constexpr IrInstructionId ir_instruction_id(IrInstructionReturnAddress *) {
1265 return IrInstructionIdReturnAddress;
1659static constexpr IrInstGenId ir_inst_id(IrInstGenBinOp *) {
1660 return IrInstGenIdBinOp;
12661661}
12671662
1268static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameAddress *) {
1269 return IrInstructionIdFrameAddress;
1663static constexpr IrInstGenId ir_inst_id(IrInstGenLoadPtr *) {
1664 return IrInstGenIdLoadPtr;
12701665}
12711666
1272static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameHandle *) {
1273 return IrInstructionIdFrameHandle;
1667static constexpr IrInstGenId ir_inst_id(IrInstGenStorePtr *) {
1668 return IrInstGenIdStorePtr;
12741669}
12751670
1276static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameType *) {
1277 return IrInstructionIdFrameType;
1671static constexpr IrInstGenId ir_inst_id(IrInstGenVectorStoreElem *) {
1672 return IrInstGenIdVectorStoreElem;
12781673}
12791674
1280static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeSrc *) {
1281 return IrInstructionIdFrameSizeSrc;
1675static constexpr IrInstGenId ir_inst_id(IrInstGenStructFieldPtr *) {
1676 return IrInstGenIdStructFieldPtr;
12821677}
12831678
1284static constexpr IrInstructionId ir_instruction_id(IrInstructionFrameSizeGen *) {
1285 return IrInstructionIdFrameSizeGen;
1679static constexpr IrInstGenId ir_inst_id(IrInstGenUnionFieldPtr *) {
1680 return IrInstGenIdUnionFieldPtr;
12861681}
12871682
1288static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignOf *) {
1289 return IrInstructionIdAlignOf;
1683static constexpr IrInstGenId ir_inst_id(IrInstGenElemPtr *) {
1684 return IrInstGenIdElemPtr;
12901685}
12911686
1292static constexpr IrInstructionId ir_instruction_id(IrInstructionOverflowOp *) {
1293 return IrInstructionIdOverflowOp;
1687static constexpr IrInstGenId ir_inst_id(IrInstGenVarPtr *) {
1688 return IrInstGenIdVarPtr;
12941689}
12951690
1296static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrSrc *) {
1297 return IrInstructionIdTestErrSrc;
1691static constexpr IrInstGenId ir_inst_id(IrInstGenReturnPtr *) {
1692 return IrInstGenIdReturnPtr;
12981693}
12991694
1300static constexpr IrInstructionId ir_instruction_id(IrInstructionTestErrGen *) {
1301 return IrInstructionIdTestErrGen;
1695static constexpr IrInstGenId ir_inst_id(IrInstGenCall *) {
1696 return IrInstGenIdCall;
13021697}
13031698
1304static constexpr IrInstructionId ir_instruction_id(IrInstructionMulAdd *) {
1305 return IrInstructionIdMulAdd;
1699static constexpr IrInstGenId ir_inst_id(IrInstGenReturn *) {
1700 return IrInstGenIdReturn;
13061701}
13071702
1308static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrCode *) {
1309 return IrInstructionIdUnwrapErrCode;
1703static constexpr IrInstGenId ir_inst_id(IrInstGenCast *) {
1704 return IrInstGenIdCast;
13101705}
13111706
1312static constexpr IrInstructionId ir_instruction_id(IrInstructionUnwrapErrPayload *) {
1313 return IrInstructionIdUnwrapErrPayload;
1707static constexpr IrInstGenId ir_inst_id(IrInstGenResizeSlice *) {
1708 return IrInstGenIdResizeSlice;
13141709}
13151710
1316static constexpr IrInstructionId ir_instruction_id(IrInstructionOptionalWrap *) {
1317 return IrInstructionIdOptionalWrap;
1711static constexpr IrInstGenId ir_inst_id(IrInstGenUnreachable *) {
1712 return IrInstGenIdUnreachable;
13181713}
13191714
1320static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapPayload *) {
1321 return IrInstructionIdErrWrapPayload;
1715static constexpr IrInstGenId ir_inst_id(IrInstGenAsm *) {
1716 return IrInstGenIdAsm;
13221717}
13231718
1324static constexpr IrInstructionId ir_instruction_id(IrInstructionErrWrapCode *) {
1325 return IrInstructionIdErrWrapCode;
1719static constexpr IrInstGenId ir_inst_id(IrInstGenTestNonNull *) {
1720 return IrInstGenIdTestNonNull;
13261721}
13271722
1328static constexpr IrInstructionId ir_instruction_id(IrInstructionFnProto *) {
1329 return IrInstructionIdFnProto;
1723static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalUnwrapPtr *) {
1724 return IrInstGenIdOptionalUnwrapPtr;
13301725}
13311726
1332static constexpr IrInstructionId ir_instruction_id(IrInstructionTestComptime *) {
1333 return IrInstructionIdTestComptime;
1727static constexpr IrInstGenId ir_inst_id(IrInstGenOptionalWrap *) {
1728 return IrInstGenIdOptionalWrap;
13341729}
13351730
1336static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastSrc *) {
1337 return IrInstructionIdPtrCastSrc;
1731static constexpr IrInstGenId ir_inst_id(IrInstGenUnionTag *) {
1732 return IrInstGenIdUnionTag;
13381733}
13391734
1340static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrCastGen *) {
1341 return IrInstructionIdPtrCastGen;
1735static constexpr IrInstGenId ir_inst_id(IrInstGenClz *) {
1736 return IrInstGenIdClz;
13421737}
13431738
1344static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastSrc *) {
1345 return IrInstructionIdBitCastSrc;
1739static constexpr IrInstGenId ir_inst_id(IrInstGenCtz *) {
1740 return IrInstGenIdCtz;
13461741}
13471742
1348static constexpr IrInstructionId ir_instruction_id(IrInstructionBitCastGen *) {
1349 return IrInstructionIdBitCastGen;
1743static constexpr IrInstGenId ir_inst_id(IrInstGenPopCount *) {
1744 return IrInstGenIdPopCount;
13501745}
13511746
1352static constexpr IrInstructionId ir_instruction_id(IrInstructionWidenOrShorten *) {
1353 return IrInstructionIdWidenOrShorten;
1747static constexpr IrInstGenId ir_inst_id(IrInstGenBswap *) {
1748 return IrInstGenIdBswap;
13541749}
13551750
1356static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrToInt *) {
1357 return IrInstructionIdPtrToInt;
1751static constexpr IrInstGenId ir_inst_id(IrInstGenBitReverse *) {
1752 return IrInstGenIdBitReverse;
13581753}
13591754
1360static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToPtr *) {
1361 return IrInstructionIdIntToPtr;
1755static constexpr IrInstGenId ir_inst_id(IrInstGenRef *) {
1756 return IrInstGenIdRef;
13621757}
13631758
1364static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToEnum *) {
1365 return IrInstructionIdIntToEnum;
1759static constexpr IrInstGenId ir_inst_id(IrInstGenErrName *) {
1760 return IrInstGenIdErrName;
13661761}
13671762
1368static constexpr IrInstructionId ir_instruction_id(IrInstructionEnumToInt *) {
1369 return IrInstructionIdEnumToInt;
1763static constexpr IrInstGenId ir_inst_id(IrInstGenCmpxchg *) {
1764 return IrInstGenIdCmpxchg;
13701765}
13711766
1372static constexpr IrInstructionId ir_instruction_id(IrInstructionIntToErr *) {
1373 return IrInstructionIdIntToErr;
1767static constexpr IrInstGenId ir_inst_id(IrInstGenFence *) {
1768 return IrInstGenIdFence;
13741769}
13751770
1376static constexpr IrInstructionId ir_instruction_id(IrInstructionErrToInt *) {
1377 return IrInstructionIdErrToInt;
1771static constexpr IrInstGenId ir_inst_id(IrInstGenTruncate *) {
1772 return IrInstGenIdTruncate;
13781773}
13791774
1380static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckSwitchProngs *) {
1381 return IrInstructionIdCheckSwitchProngs;
1775static constexpr IrInstGenId ir_inst_id(IrInstGenShuffleVector *) {
1776 return IrInstGenIdShuffleVector;
13821777}
13831778
1384static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckStatementIsVoid *) {
1385 return IrInstructionIdCheckStatementIsVoid;
1779static constexpr IrInstGenId ir_inst_id(IrInstGenSplat *) {
1780 return IrInstGenIdSplat;
13861781}
13871782
1388static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeName *) {
1389 return IrInstructionIdTypeName;
1783static constexpr IrInstGenId ir_inst_id(IrInstGenBoolNot *) {
1784 return IrInstGenIdBoolNot;
13901785}
13911786
1392static constexpr IrInstructionId ir_instruction_id(IrInstructionDeclRef *) {
1393 return IrInstructionIdDeclRef;
1787static constexpr IrInstGenId ir_inst_id(IrInstGenMemset *) {
1788 return IrInstGenIdMemset;
13941789}
13951790
1396static constexpr IrInstructionId ir_instruction_id(IrInstructionPanic *) {
1397 return IrInstructionIdPanic;
1791static constexpr IrInstGenId ir_inst_id(IrInstGenMemcpy *) {
1792 return IrInstGenIdMemcpy;
13981793}
13991794
1400static constexpr IrInstructionId ir_instruction_id(IrInstructionTagName *) {
1401 return IrInstructionIdTagName;
1795static constexpr IrInstGenId ir_inst_id(IrInstGenSlice *) {
1796 return IrInstGenIdSlice;
14021797}
14031798
1404static constexpr IrInstructionId ir_instruction_id(IrInstructionTagType *) {
1405 return IrInstructionIdTagType;
1799static constexpr IrInstGenId ir_inst_id(IrInstGenBreakpoint *) {
1800 return IrInstGenIdBreakpoint;
14061801}
14071802
1408static constexpr IrInstructionId ir_instruction_id(IrInstructionFieldParentPtr *) {
1409 return IrInstructionIdFieldParentPtr;
1803static constexpr IrInstGenId ir_inst_id(IrInstGenReturnAddress *) {
1804 return IrInstGenIdReturnAddress;
14101805}
14111806
1412static constexpr IrInstructionId ir_instruction_id(IrInstructionByteOffsetOf *) {
1413 return IrInstructionIdByteOffsetOf;
1807static constexpr IrInstGenId ir_inst_id(IrInstGenFrameAddress *) {
1808 return IrInstGenIdFrameAddress;
14141809}
14151810
1416static constexpr IrInstructionId ir_instruction_id(IrInstructionBitOffsetOf *) {
1417 return IrInstructionIdBitOffsetOf;
1811static constexpr IrInstGenId ir_inst_id(IrInstGenFrameHandle *) {
1812 return IrInstGenIdFrameHandle;
14181813}
14191814
1420static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeInfo *) {
1421 return IrInstructionIdTypeInfo;
1815static constexpr IrInstGenId ir_inst_id(IrInstGenFrameSize *) {
1816 return IrInstGenIdFrameSize;
14221817}
14231818
1424static constexpr IrInstructionId ir_instruction_id(IrInstructionType *) {
1425 return IrInstructionIdType;
1819static constexpr IrInstGenId ir_inst_id(IrInstGenOverflowOp *) {
1820 return IrInstGenIdOverflowOp;
14261821}
14271822
1428static constexpr IrInstructionId ir_instruction_id(IrInstructionHasField *) {
1429 return IrInstructionIdHasField;
1823static constexpr IrInstGenId ir_inst_id(IrInstGenTestErr *) {
1824 return IrInstGenIdTestErr;
14301825}
14311826
1432static constexpr IrInstructionId ir_instruction_id(IrInstructionTypeId *) {
1433 return IrInstructionIdTypeId;
1827static constexpr IrInstGenId ir_inst_id(IrInstGenMulAdd *) {
1828 return IrInstGenIdMulAdd;
14341829}
14351830
1436static constexpr IrInstructionId ir_instruction_id(IrInstructionSetEvalBranchQuota *) {
1437 return IrInstructionIdSetEvalBranchQuota;
1831static constexpr IrInstGenId ir_inst_id(IrInstGenFloatOp *) {
1832 return IrInstGenIdFloatOp;
14381833}
14391834
1440static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrType *) {
1441 return IrInstructionIdPtrType;
1835static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrCode *) {
1836 return IrInstGenIdUnwrapErrCode;
14421837}
14431838
1444static constexpr IrInstructionId ir_instruction_id(IrInstructionAlignCast *) {
1445 return IrInstructionIdAlignCast;
1839static constexpr IrInstGenId ir_inst_id(IrInstGenUnwrapErrPayload *) {
1840 return IrInstGenIdUnwrapErrPayload;
14461841}
14471842
1448static constexpr IrInstructionId ir_instruction_id(IrInstructionImplicitCast *) {
1449 return IrInstructionIdImplicitCast;
1843static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapCode *) {
1844 return IrInstGenIdErrWrapCode;
14501845}
14511846
1452static constexpr IrInstructionId ir_instruction_id(IrInstructionResolveResult *) {
1453 return IrInstructionIdResolveResult;
1847static constexpr IrInstGenId ir_inst_id(IrInstGenErrWrapPayload *) {
1848 return IrInstGenIdErrWrapPayload;
14541849}
14551850
1456static constexpr IrInstructionId ir_instruction_id(IrInstructionResetResult *) {
1457 return IrInstructionIdResetResult;
1851static constexpr IrInstGenId ir_inst_id(IrInstGenPtrCast *) {
1852 return IrInstGenIdPtrCast;
14581853}
14591854
1460static constexpr IrInstructionId ir_instruction_id(IrInstructionPtrOfArrayToSlice *) {
1461 return IrInstructionIdPtrOfArrayToSlice;
1855static constexpr IrInstGenId ir_inst_id(IrInstGenBitCast *) {
1856 return IrInstGenIdBitCast;
14621857}
14631858
1464static constexpr IrInstructionId ir_instruction_id(IrInstructionOpaqueType *) {
1465 return IrInstructionIdOpaqueType;
1859static constexpr IrInstGenId ir_inst_id(IrInstGenWidenOrShorten *) {
1860 return IrInstGenIdWidenOrShorten;
14661861}
14671862
1468static constexpr IrInstructionId ir_instruction_id(IrInstructionSetAlignStack *) {
1469 return IrInstructionIdSetAlignStack;
1863static constexpr IrInstGenId ir_inst_id(IrInstGenIntToPtr *) {
1864 return IrInstGenIdIntToPtr;
14701865}
14711866
1472static constexpr IrInstructionId ir_instruction_id(IrInstructionArgType *) {
1473 return IrInstructionIdArgType;
1867static constexpr IrInstGenId ir_inst_id(IrInstGenPtrToInt *) {
1868 return IrInstGenIdPtrToInt;
14741869}
14751870
1476static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorReturnTrace *) {
1477 return IrInstructionIdErrorReturnTrace;
1871static constexpr IrInstGenId ir_inst_id(IrInstGenIntToEnum *) {
1872 return IrInstGenIdIntToEnum;
14781873}
14791874
1480static constexpr IrInstructionId ir_instruction_id(IrInstructionErrorUnion *) {
1481 return IrInstructionIdErrorUnion;
1875static constexpr IrInstGenId ir_inst_id(IrInstGenIntToErr *) {
1876 return IrInstGenIdIntToErr;
14821877}
14831878
1484static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicRmw *) {
1485 return IrInstructionIdAtomicRmw;
1879static constexpr IrInstGenId ir_inst_id(IrInstGenErrToInt *) {
1880 return IrInstGenIdErrToInt;
14861881}
14871882
1488static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicLoad *) {
1489 return IrInstructionIdAtomicLoad;
1883static constexpr IrInstGenId ir_inst_id(IrInstGenPanic *) {
1884 return IrInstGenIdPanic;
14901885}
14911886
1492static constexpr IrInstructionId ir_instruction_id(IrInstructionAtomicStore *) {
1493 return IrInstructionIdAtomicStore;
1887static constexpr IrInstGenId ir_inst_id(IrInstGenTagName *) {
1888 return IrInstGenIdTagName;
14941889}
14951890
1496static constexpr IrInstructionId ir_instruction_id(IrInstructionSaveErrRetAddr *) {
1497 return IrInstructionIdSaveErrRetAddr;
1891static constexpr IrInstGenId ir_inst_id(IrInstGenFieldParentPtr *) {
1892 return IrInstGenIdFieldParentPtr;
14981893}
14991894
1500static constexpr IrInstructionId ir_instruction_id(IrInstructionAddImplicitReturnType *) {
1501 return IrInstructionIdAddImplicitReturnType;
1895static constexpr IrInstGenId ir_inst_id(IrInstGenAlignCast *) {
1896 return IrInstGenIdAlignCast;
15021897}
15031898
1504static constexpr IrInstructionId ir_instruction_id(IrInstructionFloatOp *) {
1505 return IrInstructionIdFloatOp;
1899static constexpr IrInstGenId ir_inst_id(IrInstGenErrorReturnTrace *) {
1900 return IrInstGenIdErrorReturnTrace;
15061901}
15071902
1508static constexpr IrInstructionId ir_instruction_id(IrInstructionCheckRuntimeScope *) {
1509 return IrInstructionIdCheckRuntimeScope;
1903static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicRmw *) {
1904 return IrInstGenIdAtomicRmw;
15101905}
15111906
1512static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorToArray *) {
1513 return IrInstructionIdVectorToArray;
1907static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicLoad *) {
1908 return IrInstGenIdAtomicLoad;
15141909}
15151910
1516static constexpr IrInstructionId ir_instruction_id(IrInstructionArrayToVector *) {
1517 return IrInstructionIdArrayToVector;
1911static constexpr IrInstGenId ir_inst_id(IrInstGenAtomicStore *) {
1912 return IrInstGenIdAtomicStore;
15181913}
15191914
1520static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertZero *) {
1521 return IrInstructionIdAssertZero;
1915static constexpr IrInstGenId ir_inst_id(IrInstGenSaveErrRetAddr *) {
1916 return IrInstGenIdSaveErrRetAddr;
15221917}
15231918
1524static constexpr IrInstructionId ir_instruction_id(IrInstructionAssertNonNull *) {
1525 return IrInstructionIdAssertNonNull;
1919static constexpr IrInstGenId ir_inst_id(IrInstGenVectorToArray *) {
1920 return IrInstGenIdVectorToArray;
15261921}
15271922
1528static constexpr IrInstructionId ir_instruction_id(IrInstructionHasDecl *) {
1529 return IrInstructionIdHasDecl;
1923static constexpr IrInstGenId ir_inst_id(IrInstGenArrayToVector *) {
1924 return IrInstGenIdArrayToVector;
15301925}
15311926
1532static constexpr IrInstructionId ir_instruction_id(IrInstructionUndeclaredIdent *) {
1533 return IrInstructionIdUndeclaredIdent;
1927static constexpr IrInstGenId ir_inst_id(IrInstGenAssertZero *) {
1928 return IrInstGenIdAssertZero;
15341929}
15351930
1536static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaSrc *) {
1537 return IrInstructionIdAllocaSrc;
1931static constexpr IrInstGenId ir_inst_id(IrInstGenAssertNonNull *) {
1932 return IrInstGenIdAssertNonNull;
15381933}
15391934
1540static constexpr IrInstructionId ir_instruction_id(IrInstructionAllocaGen *) {
1541 return IrInstructionIdAllocaGen;
1935static constexpr IrInstGenId ir_inst_id(IrInstGenPtrOfArrayToSlice *) {
1936 return IrInstGenIdPtrOfArrayToSlice;
15421937}
15431938
1544static constexpr IrInstructionId ir_instruction_id(IrInstructionEndExpr *) {
1545 return IrInstructionIdEndExpr;
1939static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendBegin *) {
1940 return IrInstGenIdSuspendBegin;
15461941}
15471942
1548static constexpr IrInstructionId ir_instruction_id(IrInstructionUnionInitNamedField *) {
1549 return IrInstructionIdUnionInitNamedField;
1943static constexpr IrInstGenId ir_inst_id(IrInstGenSuspendFinish *) {
1944 return IrInstGenIdSuspendFinish;
15501945}
15511946
1552static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendBegin *) {
1553 return IrInstructionIdSuspendBegin;
1947static constexpr IrInstGenId ir_inst_id(IrInstGenAwait *) {
1948 return IrInstGenIdAwait;
15541949}
15551950
1556static constexpr IrInstructionId ir_instruction_id(IrInstructionSuspendFinish *) {
1557 return IrInstructionIdSuspendFinish;
1951static constexpr IrInstGenId ir_inst_id(IrInstGenResume *) {
1952 return IrInstGenIdResume;
15581953}
15591954
1560static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitSrc *) {
1561 return IrInstructionIdAwaitSrc;
1955static constexpr IrInstGenId ir_inst_id(IrInstGenSpillBegin *) {
1956 return IrInstGenIdSpillBegin;
15621957}
15631958
1564static constexpr IrInstructionId ir_instruction_id(IrInstructionAwaitGen *) {
1565 return IrInstructionIdAwaitGen;
1959static constexpr IrInstGenId ir_inst_id(IrInstGenSpillEnd *) {
1960 return IrInstGenIdSpillEnd;
15661961}
15671962
1568static constexpr IrInstructionId ir_instruction_id(IrInstructionResume *) {
1569 return IrInstructionIdResume;
1963static constexpr IrInstGenId ir_inst_id(IrInstGenVectorExtractElem *) {
1964 return IrInstGenIdVectorExtractElem;
15701965}
15711966
1572static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillBegin *) {
1573 return IrInstructionIdSpillBegin;
1967static constexpr IrInstGenId ir_inst_id(IrInstGenAlloca *) {
1968 return IrInstGenIdAlloca;
15741969}
15751970
1576static constexpr IrInstructionId ir_instruction_id(IrInstructionSpillEnd *) {
1577 return IrInstructionIdSpillEnd;
1971static constexpr IrInstGenId ir_inst_id(IrInstGenConst *) {
1972 return IrInstGenIdConst;
15781973}
15791974
1580static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorExtractElem *) {
1581 return IrInstructionIdVectorExtractElem;
1975template<typename T>
1976static T *ir_create_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
1977 const char *name = nullptr;
1978#ifdef ZIG_ENABLE_MEM_PROFILE
1979 T *dummy = nullptr;
1980 name = ir_inst_src_type_str(ir_inst_id(dummy));
1981#endif
1982 T *special_instruction = allocate<T>(1, name);
1983 special_instruction->base.id = ir_inst_id(special_instruction);
1984 special_instruction->base.base.scope = scope;
1985 special_instruction->base.base.source_node = source_node;
1986 special_instruction->base.base.debug_id = exec_next_debug_id(irb->exec);
1987 special_instruction->base.owner_bb = irb->current_basic_block;
1988 return special_instruction;
15821989}
15831990
15841991template<typename T>
1585static T *ir_create_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1992static T *ir_create_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
15861993 const char *name = nullptr;
15871994#ifdef ZIG_ENABLE_MEM_PROFILE
15881995 T *dummy = nullptr;
1589 name = ir_instruction_type_str(ir_instruction_id(dummy));
1996 name = ir_inst_gen_type_str(ir_inst_id(dummy));
15901997#endif
15911998 T *special_instruction = allocate<T>(1, name);
1592 special_instruction->base.id = ir_instruction_id(special_instruction);
1593 special_instruction->base.scope = scope;
1594 special_instruction->base.source_node = source_node;
1595 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
1999 special_instruction->base.id = ir_inst_id(special_instruction);
2000 special_instruction->base.base.scope = scope;
2001 special_instruction->base.base.source_node = source_node;
2002 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
15962003 special_instruction->base.owner_bb = irb->current_basic_block;
15972004 special_instruction->base.value = allocate<ZigValue>(1, "ZigValue");
15982005 return special_instruction;
15992006}
16002007
16012008template<typename T>
1602static T *ir_create_instruction_noval(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2009static T *ir_create_inst_noval(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
16032010 const char *name = nullptr;
16042011#ifdef ZIG_ENABLE_MEM_PROFILE
16052012 T *dummy = nullptr;
1606 name = ir_instruction_type_str(ir_instruction_id(dummy));
2013 name = ir_inst_gen_type_str(ir_inst_id(dummy));
16072014#endif
16082015 T *special_instruction = allocate<T>(1, name);
1609 special_instruction->base.id = ir_instruction_id(special_instruction);
1610 special_instruction->base.scope = scope;
1611 special_instruction->base.source_node = source_node;
1612 special_instruction->base.debug_id = exec_next_debug_id(irb->exec);
2016 special_instruction->base.id = ir_inst_id(special_instruction);
2017 special_instruction->base.base.scope = scope;
2018 special_instruction->base.base.source_node = source_node;
2019 special_instruction->base.base.debug_id = exec_next_debug_id_gen(irb->exec);
16132020 special_instruction->base.owner_bb = irb->current_basic_block;
16142021 return special_instruction;
16152022}
16162023
16172024template<typename T>
1618static T *ir_build_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2025static T *ir_build_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
16192026 T *special_instruction = ir_create_instruction<T>(irb, scope, source_node);
16202027 ir_instruction_append(irb->current_basic_block, &special_instruction->base);
16212028 return special_instruction;
16222029}
16232030
1624static IrInstruction *ir_build_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *dest_type,
1625 IrInstruction *value, CastOp cast_op)
2031template<typename T>
2032static T *ir_build_inst_gen(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2033 T *special_instruction = ir_create_inst_gen<T>(irb, scope, source_node);
2034 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2035 return special_instruction;
2036}
2037
2038template<typename T>
2039static T *ir_build_inst_noreturn(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2040 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2041 special_instruction->base.value = irb->codegen->intern.for_unreachable();
2042 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2043 return special_instruction;
2044}
2045
2046template<typename T>
2047static T *ir_build_inst_void(IrBuilderGen *irb, Scope *scope, AstNode *source_node) {
2048 T *special_instruction = ir_create_inst_noval<T>(irb, scope, source_node);
2049 special_instruction->base.value = irb->codegen->intern.for_void();
2050 ir_inst_gen_append(irb->current_basic_block, &special_instruction->base);
2051 return special_instruction;
2052}
2053
2054IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
2055 ZigType *var_type, const char *name_hint)
16262056{
1627 IrInstructionCast *cast_instruction = ir_build_instruction<IrInstructionCast>(irb, scope, source_node);
1628 cast_instruction->dest_type = dest_type;
1629 cast_instruction->value = value;
1630 cast_instruction->cast_op = cast_op;
2057 IrInstGenAlloca *alloca_gen = allocate<IrInstGenAlloca>(1);
2058 alloca_gen->base.id = IrInstGenIdAlloca;
2059 alloca_gen->base.base.source_node = source_node;
2060 alloca_gen->base.base.scope = scope;
2061 alloca_gen->base.value = allocate<ZigValue>(1, "ZigValue");
2062 alloca_gen->base.value->type = get_pointer_to_type(g, var_type, false);
2063 alloca_gen->base.base.ref_count = 1;
2064 alloca_gen->name_hint = name_hint;
2065 fn->alloca_gen_list.append(alloca_gen);
2066 return &alloca_gen->base;
2067}
16312068
1632 ir_ref_instruction(value, irb->current_basic_block);
2069static IrInstGen *ir_build_cast(IrAnalyze *ira, IrInst *source_instr,ZigType *dest_type,
2070 IrInstGen *value, CastOp cast_op)
2071{
2072 IrInstGenCast *inst = ir_build_inst_gen<IrInstGenCast>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2073 inst->base.value->type = dest_type;
2074 inst->value = value;
2075 inst->cast_op = cast_op;
16332076
1634 return &cast_instruction->base;
2077 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
2078
2079 return &inst->base;
16352080}
16362081
1637static IrInstruction *ir_build_cond_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *condition,
1638 IrBasicBlock *then_block, IrBasicBlock *else_block, IrInstruction *is_comptime)
2082static IrInstSrc *ir_build_cond_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *condition,
2083 IrBasicBlockSrc *then_block, IrBasicBlockSrc *else_block, IrInstSrc *is_comptime)
16392084{
1640 IrInstructionCondBr *cond_br_instruction = ir_build_instruction<IrInstructionCondBr>(irb, scope, source_node);
1641 cond_br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
1642 cond_br_instruction->base.value->special = ConstValSpecialStatic;
1643 cond_br_instruction->condition = condition;
1644 cond_br_instruction->then_block = then_block;
1645 cond_br_instruction->else_block = else_block;
1646 cond_br_instruction->is_comptime = is_comptime;
2085 IrInstSrcCondBr *inst = ir_build_instruction<IrInstSrcCondBr>(irb, scope, source_node);
2086 inst->base.is_noreturn = true;
2087 inst->condition = condition;
2088 inst->then_block = then_block;
2089 inst->else_block = else_block;
2090 inst->is_comptime = is_comptime;
16472091
16482092 ir_ref_instruction(condition, irb->current_basic_block);
16492093 ir_ref_bb(then_block);
16502094 ir_ref_bb(else_block);
16512095 if (is_comptime != nullptr) ir_ref_instruction(is_comptime, irb->current_basic_block);
16522096
1653 return &cond_br_instruction->base;
2097 return &inst->base;
16542098}
16552099
1656static IrInstruction *ir_build_return(IrBuilder *irb, Scope *scope, AstNode *source_node,
1657 IrInstruction *operand)
2100static IrInstGen *ir_build_cond_br_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *condition,
2101 IrBasicBlockGen *then_block, IrBasicBlockGen *else_block)
16582102{
1659 IrInstructionReturn *return_instruction = ir_build_instruction<IrInstructionReturn>(irb, scope, source_node);
1660 return_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
1661 return_instruction->base.value->special = ConstValSpecialStatic;
1662 return_instruction->operand = operand;
2103 IrInstGenCondBr *inst = ir_build_inst_noreturn<IrInstGenCondBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2104 inst->condition = condition;
2105 inst->then_block = then_block;
2106 inst->else_block = else_block;
2107
2108 ir_ref_inst_gen(condition, ira->new_irb.current_basic_block);
2109 ir_ref_bb_gen(then_block);
2110 ir_ref_bb_gen(else_block);
2111
2112 return &inst->base;
2113}
2114
2115static IrInstSrc *ir_build_return_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand) {
2116 IrInstSrcReturn *inst = ir_build_instruction<IrInstSrcReturn>(irb, scope, source_node);
2117 inst->base.is_noreturn = true;
2118 inst->operand = operand;
16632119
16642120 if (operand != nullptr) ir_ref_instruction(operand, irb->current_basic_block);
16652121
1666 return &return_instruction->base;
2122 return &inst->base;
2123}
2124
2125static IrInstGen *ir_build_return_gen(IrAnalyze *ira, IrInst *source_inst, IrInstGen *operand) {
2126 IrInstGenReturn *inst = ir_build_inst_noreturn<IrInstGenReturn>(&ira->new_irb,
2127 source_inst->scope, source_inst->source_node);
2128 inst->operand = operand;
2129
2130 if (operand != nullptr) ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2131
2132 return &inst->base;
16672133}
16682134
1669static IrInstruction *ir_build_const_void(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1670 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2135static IrInstSrc *ir_build_const_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2136 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
16712137 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1672 const_instruction->base.value = irb->codegen->intern.for_void();
2138 const_instruction->value = irb->codegen->intern.for_void();
16732139 return &const_instruction->base;
16742140}
16752141
1676static IrInstruction *ir_build_const_undefined(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1677 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2142static IrInstSrc *ir_build_const_undefined(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2143 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
16782144 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1679 const_instruction->base.value = irb->codegen->intern.for_undefined();
2145 const_instruction->value = irb->codegen->intern.for_undefined();
16802146 return &const_instruction->base;
16812147}
16822148
1683static IrInstruction *ir_build_const_uint(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1684 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1685 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
1686 const_instruction->base.value->special = ConstValSpecialStatic;
1687 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
2149static IrInstSrc *ir_build_const_uint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
2150 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2151 const_instruction->value = create_const_vals(1);
2152 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
2153 const_instruction->value->special = ConstValSpecialStatic;
2154 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
16882155 return &const_instruction->base;
16892156}
16902157
1691static IrInstruction *ir_build_const_bigint(IrBuilder *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
1692 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1693 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_int;
1694 const_instruction->base.value->special = ConstValSpecialStatic;
1695 bigint_init_bigint(&const_instruction->base.value->data.x_bigint, bigint);
2158static IrInstSrc *ir_build_const_bigint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigInt *bigint) {
2159 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2160 const_instruction->value = create_const_vals(1);
2161 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_int;
2162 const_instruction->value->special = ConstValSpecialStatic;
2163 bigint_init_bigint(&const_instruction->value->data.x_bigint, bigint);
16962164 return &const_instruction->base;
16972165}
16982166
1699static IrInstruction *ir_build_const_bigfloat(IrBuilder *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
1700 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1701 const_instruction->base.value->type = irb->codegen->builtin_types.entry_num_lit_float;
1702 const_instruction->base.value->special = ConstValSpecialStatic;
1703 bigfloat_init_bigfloat(&const_instruction->base.value->data.x_bigfloat, bigfloat);
2167static IrInstSrc *ir_build_const_bigfloat(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, BigFloat *bigfloat) {
2168 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2169 const_instruction->value = create_const_vals(1);
2170 const_instruction->value->type = irb->codegen->builtin_types.entry_num_lit_float;
2171 const_instruction->value->special = ConstValSpecialStatic;
2172 bigfloat_init_bigfloat(&const_instruction->value->data.x_bigfloat, bigfloat);
17042173 return &const_instruction->base;
17052174}
17062175
1707static IrInstruction *ir_build_const_null(IrBuilder *irb, Scope *scope, AstNode *source_node) {
1708 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(irb, scope, source_node);
2176static IrInstSrc *ir_build_const_null(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2177 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
17092178 ir_instruction_append(irb->current_basic_block, &const_instruction->base);
1710 const_instruction->base.value = irb->codegen->intern.for_null();
2179 const_instruction->value = irb->codegen->intern.for_null();
17112180 return &const_instruction->base;
17122181}
17132182
1714static IrInstruction *ir_build_const_usize(IrBuilder *irb, Scope *scope, AstNode *source_node, uint64_t value) {
1715 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1716 const_instruction->base.value->type = irb->codegen->builtin_types.entry_usize;
1717 const_instruction->base.value->special = ConstValSpecialStatic;
1718 bigint_init_unsigned(&const_instruction->base.value->data.x_bigint, value);
2183static IrInstSrc *ir_build_const_usize(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, uint64_t value) {
2184 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2185 const_instruction->value = create_const_vals(1);
2186 const_instruction->value->type = irb->codegen->builtin_types.entry_usize;
2187 const_instruction->value->special = ConstValSpecialStatic;
2188 bigint_init_unsigned(&const_instruction->value->data.x_bigint, value);
17192189 return &const_instruction->base;
17202190}
17212191
1722static IrInstruction *ir_create_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2192static IrInstSrc *ir_create_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
17232193 ZigType *type_entry)
17242194{
1725 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1726 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
1727 const_instruction->base.value->special = ConstValSpecialStatic;
1728 const_instruction->base.value->data.x_type = type_entry;
2195 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
2196 const_instruction->value = create_const_vals(1);
2197 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
2198 const_instruction->value->special = ConstValSpecialStatic;
2199 const_instruction->value->data.x_type = type_entry;
17292200 return &const_instruction->base;
17302201}
17312202
1732static IrInstruction *ir_build_const_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2203static IrInstSrc *ir_build_const_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
17332204 ZigType *type_entry)
17342205{
1735 IrInstruction *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
2206 IrInstSrc *instruction = ir_create_const_type(irb, scope, source_node, type_entry);
17362207 ir_instruction_append(irb->current_basic_block, instruction);
17372208 return instruction;
17382209}
17392210
1740static IrInstruction *ir_create_const_fn(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigFn *fn_entry) {
1741 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1742 const_instruction->base.value->type = fn_entry->type_entry;
1743 const_instruction->base.value->special = ConstValSpecialStatic;
1744 const_instruction->base.value->data.x_ptr.data.fn.fn_entry = fn_entry;
1745 const_instruction->base.value->data.x_ptr.mut = ConstPtrMutComptimeConst;
1746 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialFunction;
1747 return &const_instruction->base;
1748}
1749
1750static IrInstruction *ir_build_const_import(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigType *import) {
1751 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1752 const_instruction->base.value->type = irb->codegen->builtin_types.entry_type;
1753 const_instruction->base.value->special = ConstValSpecialStatic;
1754 const_instruction->base.value->data.x_type = import;
1755 return &const_instruction->base;
1756}
1757
1758static IrInstruction *ir_build_const_bool(IrBuilder *irb, Scope *scope, AstNode *source_node, bool value) {
1759 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1760 const_instruction->base.value->type = irb->codegen->builtin_types.entry_bool;
1761 const_instruction->base.value->special = ConstValSpecialStatic;
1762 const_instruction->base.value->data.x_bool = value;
2211static IrInstSrc *ir_build_const_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigType *import) {
2212 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2213 const_instruction->value = create_const_vals(1);
2214 const_instruction->value->type = irb->codegen->builtin_types.entry_type;
2215 const_instruction->value->special = ConstValSpecialStatic;
2216 const_instruction->value->data.x_type = import;
17632217 return &const_instruction->base;
17642218}
17652219
1766static IrInstruction *ir_build_const_enum_literal(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *name) {
1767 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1768 const_instruction->base.value->type = irb->codegen->builtin_types.entry_enum_literal;
1769 const_instruction->base.value->special = ConstValSpecialStatic;
1770 const_instruction->base.value->data.x_enum_literal = name;
2220static IrInstSrc *ir_build_const_bool(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, bool value) {
2221 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2222 const_instruction->value = create_const_vals(1);
2223 const_instruction->value->type = irb->codegen->builtin_types.entry_bool;
2224 const_instruction->value->special = ConstValSpecialStatic;
2225 const_instruction->value->data.x_bool = value;
17712226 return &const_instruction->base;
17722227}
17732228
1774static IrInstruction *ir_build_const_bound_fn(IrBuilder *irb, Scope *scope, AstNode *source_node,
1775 ZigFn *fn_entry, IrInstruction *first_arg)
1776{
1777 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, source_node);
1778 const_instruction->base.value->type = get_bound_fn_type(irb->codegen, fn_entry);
1779 const_instruction->base.value->special = ConstValSpecialStatic;
1780 const_instruction->base.value->data.x_bound_fn.fn = fn_entry;
1781 const_instruction->base.value->data.x_bound_fn.first_arg = first_arg;
2229static IrInstSrc *ir_build_const_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
2230 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, source_node);
2231 const_instruction->value = create_const_vals(1);
2232 const_instruction->value->type = irb->codegen->builtin_types.entry_enum_literal;
2233 const_instruction->value->special = ConstValSpecialStatic;
2234 const_instruction->value->data.x_enum_literal = name;
17822235 return &const_instruction->base;
17832236}
17842237
1785static IrInstruction *ir_create_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
1786 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(irb, scope, source_node);
1787 init_const_str_lit(irb->codegen, const_instruction->base.value, str);
2238static IrInstSrc *ir_create_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
2239 IrInstSrcConst *const_instruction = ir_create_instruction<IrInstSrcConst>(irb, scope, source_node);
2240 const_instruction->value = create_const_vals(1);
2241 init_const_str_lit(irb->codegen, const_instruction->value, str);
17882242
17892243 return &const_instruction->base;
17902244}
17912245
1792static IrInstruction *ir_build_const_str_lit(IrBuilder *irb, Scope *scope, AstNode *source_node, Buf *str) {
1793 IrInstruction *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
2246static IrInstSrc *ir_build_const_str_lit(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *str) {
2247 IrInstSrc *instruction = ir_create_const_str_lit(irb, scope, source_node, str);
17942248 ir_instruction_append(irb->current_basic_block, instruction);
17952249 return instruction;
17962250}
17972251
1798static IrInstruction *ir_build_bin_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
1799 IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
2252static IrInstSrc *ir_build_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrBinOp op_id,
2253 IrInstSrc *op1, IrInstSrc *op2, bool safety_check_on)
18002254{
1801 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(irb, scope, source_node);
1802 bin_op_instruction->op_id = op_id;
1803 bin_op_instruction->op1 = op1;
1804 bin_op_instruction->op2 = op2;
1805 bin_op_instruction->safety_check_on = safety_check_on;
2255 IrInstSrcBinOp *inst = ir_build_instruction<IrInstSrcBinOp>(irb, scope, source_node);
2256 inst->op_id = op_id;
2257 inst->op1 = op1;
2258 inst->op2 = op2;
2259 inst->safety_check_on = safety_check_on;
18062260
18072261 ir_ref_instruction(op1, irb->current_basic_block);
18082262 ir_ref_instruction(op2, irb->current_basic_block);
18092263
1810 return &bin_op_instruction->base;
2264 return &inst->base;
18112265}
18122266
1813static IrInstruction *ir_build_bin_op_gen(IrAnalyze *ira, IrInstruction *source_instr, ZigType *res_type,
1814 IrBinOp op_id, IrInstruction *op1, IrInstruction *op2, bool safety_check_on)
2267static IrInstGen *ir_build_bin_op_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *res_type,
2268 IrBinOp op_id, IrInstGen *op1, IrInstGen *op2, bool safety_check_on)
18152269{
1816 IrInstructionBinOp *bin_op_instruction = ir_build_instruction<IrInstructionBinOp>(&ira->new_irb,
2270 IrInstGenBinOp *inst = ir_build_inst_gen<IrInstGenBinOp>(&ira->new_irb,
18172271 source_instr->scope, source_instr->source_node);
1818 bin_op_instruction->base.value->type = res_type;
1819 bin_op_instruction->op_id = op_id;
1820 bin_op_instruction->op1 = op1;
1821 bin_op_instruction->op2 = op2;
1822 bin_op_instruction->safety_check_on = safety_check_on;
2272 inst->base.value->type = res_type;
2273 inst->op_id = op_id;
2274 inst->op1 = op1;
2275 inst->op2 = op2;
2276 inst->safety_check_on = safety_check_on;
18232277
1824 ir_ref_instruction(op1, ira->new_irb.current_basic_block);
1825 ir_ref_instruction(op2, ira->new_irb.current_basic_block);
2278 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
2279 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
18262280
1827 return &bin_op_instruction->base;
2281 return &inst->base;
18282282}
18292283
18302284
1831static IrInstruction *ir_build_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *source_node,
1832 IrInstruction *op1, IrInstruction *op2, Buf *type_name)
2285static IrInstSrc *ir_build_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2286 IrInstSrc *op1, IrInstSrc *op2, Buf *type_name)
18332287{
1834 IrInstructionMergeErrSets *merge_err_sets_instruction = ir_build_instruction<IrInstructionMergeErrSets>(irb, scope, source_node);
1835 merge_err_sets_instruction->op1 = op1;
1836 merge_err_sets_instruction->op2 = op2;
1837 merge_err_sets_instruction->type_name = type_name;
2288 IrInstSrcMergeErrSets *inst = ir_build_instruction<IrInstSrcMergeErrSets>(irb, scope, source_node);
2289 inst->op1 = op1;
2290 inst->op2 = op2;
2291 inst->type_name = type_name;
18382292
18392293 ir_ref_instruction(op1, irb->current_basic_block);
18402294 ir_ref_instruction(op2, irb->current_basic_block);
18412295
1842 return &merge_err_sets_instruction->base;
2296 return &inst->base;
18432297}
18442298
1845static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
2299static IrInstSrc *ir_build_var_ptr_x(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
18462300 ScopeFnDef *crossed_fndef_scope)
18472301{
1848 IrInstructionVarPtr *instruction = ir_build_instruction<IrInstructionVarPtr>(irb, scope, source_node);
2302 IrInstSrcVarPtr *instruction = ir_build_instruction<IrInstSrcVarPtr>(irb, scope, source_node);
18492303 instruction->var = var;
18502304 instruction->crossed_fndef_scope = crossed_fndef_scope;
18512305
......@@ -1854,24 +2308,30 @@ static IrInstruction *ir_build_var_ptr_x(IrBuilder *irb, Scope *scope, AstNode *
18542308 return &instruction->base;
18552309}
18562310
1857static IrInstruction *ir_build_var_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
2311static IrInstSrc *ir_build_var_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var) {
18582312 return ir_build_var_ptr_x(irb, scope, source_node, var, nullptr);
18592313}
18602314
1861static IrInstruction *ir_build_return_ptr(IrAnalyze *ira, Scope *scope, AstNode *source_node,
1862 ZigType *ty)
1863{
1864 IrInstructionReturnPtr *instruction = ir_build_instruction<IrInstructionReturnPtr>(&ira->new_irb,
1865 scope, source_node);
2315static IrInstGen *ir_build_var_ptr_gen(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
2316 IrInstGenVarPtr *instruction = ir_build_inst_gen<IrInstGenVarPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2317 instruction->var = var;
2318
2319 ir_ref_var(var);
2320
2321 return &instruction->base;
2322}
2323
2324static IrInstGen *ir_build_return_ptr(IrAnalyze *ira, Scope *scope, AstNode *source_node, ZigType *ty) {
2325 IrInstGenReturnPtr *instruction = ir_build_inst_gen<IrInstGenReturnPtr>(&ira->new_irb, scope, source_node);
18662326 instruction->base.value->type = ty;
18672327 return &instruction->base;
18682328}
18692329
1870static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1871 IrInstruction *array_ptr, IrInstruction *elem_index, bool safety_check_on, PtrLen ptr_len,
2330static IrInstSrc *ir_build_elem_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2331 IrInstSrc *array_ptr, IrInstSrc *elem_index, bool safety_check_on, PtrLen ptr_len,
18722332 AstNode *init_array_type_source_node)
18732333{
1874 IrInstructionElemPtr *instruction = ir_build_instruction<IrInstructionElemPtr>(irb, scope, source_node);
2334 IrInstSrcElemPtr *instruction = ir_build_instruction<IrInstSrcElemPtr>(irb, scope, source_node);
18752335 instruction->array_ptr = array_ptr;
18762336 instruction->elem_index = elem_index;
18772337 instruction->safety_check_on = safety_check_on;
......@@ -1884,10 +2344,25 @@ static IrInstruction *ir_build_elem_ptr(IrBuilder *irb, Scope *scope, AstNode *s
18842344 return &instruction->base;
18852345}
18862346
1887static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scope, AstNode *source_node,
1888 IrInstruction *container_ptr, IrInstruction *field_name_expr, bool initializing)
2347static IrInstGen *ir_build_elem_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
2348 IrInstGen *array_ptr, IrInstGen *elem_index, bool safety_check_on, ZigType *return_type)
18892349{
1890 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
2350 IrInstGenElemPtr *instruction = ir_build_inst_gen<IrInstGenElemPtr>(&ira->new_irb, scope, source_node);
2351 instruction->base.value->type = return_type;
2352 instruction->array_ptr = array_ptr;
2353 instruction->elem_index = elem_index;
2354 instruction->safety_check_on = safety_check_on;
2355
2356 ir_ref_inst_gen(array_ptr, ira->new_irb.current_basic_block);
2357 ir_ref_inst_gen(elem_index, ira->new_irb.current_basic_block);
2358
2359 return &instruction->base;
2360}
2361
2362static IrInstSrc *ir_build_field_ptr_instruction(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2363 IrInstSrc *container_ptr, IrInstSrc *field_name_expr, bool initializing)
2364{
2365 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
18912366 instruction->container_ptr = container_ptr;
18922367 instruction->field_name_buffer = nullptr;
18932368 instruction->field_name_expr = field_name_expr;
......@@ -1899,10 +2374,10 @@ static IrInstruction *ir_build_field_ptr_instruction(IrBuilder *irb, Scope *scop
18992374 return &instruction->base;
19002375}
19012376
1902static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1903 IrInstruction *container_ptr, Buf *field_name, bool initializing)
2377static IrInstSrc *ir_build_field_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2378 IrInstSrc *container_ptr, Buf *field_name, bool initializing)
19042379{
1905 IrInstructionFieldPtr *instruction = ir_build_instruction<IrInstructionFieldPtr>(irb, scope, source_node);
2380 IrInstSrcFieldPtr *instruction = ir_build_instruction<IrInstSrcFieldPtr>(irb, scope, source_node);
19062381 instruction->container_ptr = container_ptr;
19072382 instruction->field_name_buffer = field_name;
19082383 instruction->field_name_expr = nullptr;
......@@ -1913,10 +2388,10 @@ static IrInstruction *ir_build_field_ptr(IrBuilder *irb, Scope *scope, AstNode *
19132388 return &instruction->base;
19142389}
19152390
1916static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
1917 IrInstruction *container_type, IrInstruction *field_name)
2391static IrInstSrc *ir_build_has_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2392 IrInstSrc *container_type, IrInstSrc *field_name)
19182393{
1919 IrInstructionHasField *instruction = ir_build_instruction<IrInstructionHasField>(irb, scope, source_node);
2394 IrInstSrcHasField *instruction = ir_build_instruction<IrInstSrcHasField>(irb, scope, source_node);
19202395 instruction->container_type = container_type;
19212396 instruction->field_name = field_name;
19222397
......@@ -1926,36 +2401,39 @@ static IrInstruction *ir_build_has_field(IrBuilder *irb, Scope *scope, AstNode *
19262401 return &instruction->base;
19272402}
19282403
1929static IrInstruction *ir_build_struct_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1930 IrInstruction *struct_ptr, TypeStructField *field)
2404static IrInstGen *ir_build_struct_field_ptr(IrAnalyze *ira, IrInst *source_instr,
2405 IrInstGen *struct_ptr, TypeStructField *field, ZigType *ptr_type)
19312406{
1932 IrInstructionStructFieldPtr *instruction = ir_build_instruction<IrInstructionStructFieldPtr>(irb, scope, source_node);
1933 instruction->struct_ptr = struct_ptr;
1934 instruction->field = field;
2407 IrInstGenStructFieldPtr *inst = ir_build_inst_gen<IrInstGenStructFieldPtr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2408 inst->base.value->type = ptr_type;
2409 inst->struct_ptr = struct_ptr;
2410 inst->field = field;
19352411
1936 ir_ref_instruction(struct_ptr, irb->current_basic_block);
2412 ir_ref_inst_gen(struct_ptr, ira->new_irb.current_basic_block);
19372413
1938 return &instruction->base;
2414 return &inst->base;
19392415}
19402416
1941static IrInstruction *ir_build_union_field_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
1942 IrInstruction *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing)
2417static IrInstGen *ir_build_union_field_ptr(IrAnalyze *ira, IrInst *source_instr,
2418 IrInstGen *union_ptr, TypeUnionField *field, bool safety_check_on, bool initializing, ZigType *ptr_type)
19432419{
1944 IrInstructionUnionFieldPtr *instruction = ir_build_instruction<IrInstructionUnionFieldPtr>(irb, scope, source_node);
1945 instruction->initializing = initializing;
1946 instruction->safety_check_on = safety_check_on;
1947 instruction->union_ptr = union_ptr;
1948 instruction->field = field;
2420 IrInstGenUnionFieldPtr *inst = ir_build_inst_gen<IrInstGenUnionFieldPtr>(&ira->new_irb,
2421 source_instr->scope, source_instr->source_node);
2422 inst->base.value->type = ptr_type;
2423 inst->initializing = initializing;
2424 inst->safety_check_on = safety_check_on;
2425 inst->union_ptr = union_ptr;
2426 inst->field = field;
19492427
1950 ir_ref_instruction(union_ptr, irb->current_basic_block);
2428 ir_ref_inst_gen(union_ptr, ira->new_irb.current_basic_block);
19512429
1952 return &instruction->base;
2430 return &inst->base;
19532431}
19542432
1955static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode *source_node,
1956 IrInstruction *options, IrInstruction *fn_ref, IrInstruction *args, ResultLoc *result_loc)
2433static IrInstSrc *ir_build_call_extra(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2434 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc *args, ResultLoc *result_loc)
19572435{
1958 IrInstructionCallExtra *call_instruction = ir_build_instruction<IrInstructionCallExtra>(irb, scope, source_node);
2436 IrInstSrcCallExtra *call_instruction = ir_build_instruction<IrInstSrcCallExtra>(irb, scope, source_node);
19592437 call_instruction->options = options;
19602438 call_instruction->fn_ref = fn_ref;
19612439 call_instruction->args = args;
......@@ -1968,11 +2446,11 @@ static IrInstruction *ir_build_call_extra(IrBuilder *irb, Scope *scope, AstNode
19682446 return &call_instruction->base;
19692447}
19702448
1971static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
1972 IrInstruction *options, IrInstruction *fn_ref, IrInstruction **args_ptr, size_t args_len,
2449static IrInstSrc *ir_build_call_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2450 IrInstSrc *options, IrInstSrc *fn_ref, IrInstSrc **args_ptr, size_t args_len,
19732451 ResultLoc *result_loc)
19742452{
1975 IrInstructionCallSrcArgs *call_instruction = ir_build_instruction<IrInstructionCallSrcArgs>(irb, scope, source_node);
2453 IrInstSrcCallArgs *call_instruction = ir_build_instruction<IrInstSrcCallArgs>(irb, scope, source_node);
19762454 call_instruction->options = options;
19772455 call_instruction->fn_ref = fn_ref;
19782456 call_instruction->args_ptr = args_ptr;
......@@ -1987,12 +2465,12 @@ static IrInstruction *ir_build_call_src_args(IrBuilder *irb, Scope *scope, AstNo
19872465 return &call_instruction->base;
19882466}
19892467
1990static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
1991 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
1992 IrInstruction *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
1993 IrInstruction *new_stack, ResultLoc *result_loc)
2468static IrInstSrc *ir_build_call_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2469 ZigFn *fn_entry, IrInstSrc *fn_ref, size_t arg_count, IrInstSrc **args,
2470 IrInstSrc *ret_ptr, CallModifier modifier, bool is_async_call_builtin,
2471 IrInstSrc *new_stack, ResultLoc *result_loc)
19942472{
1995 IrInstructionCallSrc *call_instruction = ir_build_instruction<IrInstructionCallSrc>(irb, scope, source_node);
2473 IrInstSrcCall *call_instruction = ir_build_instruction<IrInstSrcCall>(irb, scope, source_node);
19962474 call_instruction->fn_entry = fn_entry;
19972475 call_instruction->fn_ref = fn_ref;
19982476 call_instruction->args = args;
......@@ -2012,12 +2490,12 @@ static IrInstruction *ir_build_call_src(IrBuilder *irb, Scope *scope, AstNode *s
20122490 return &call_instruction->base;
20132491}
20142492
2015static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *source_instruction,
2016 ZigFn *fn_entry, IrInstruction *fn_ref, size_t arg_count, IrInstruction **args,
2017 CallModifier modifier, IrInstruction *new_stack, bool is_async_call_builtin,
2018 IrInstruction *result_loc, ZigType *return_type)
2493static IrInstGenCall *ir_build_call_gen(IrAnalyze *ira, IrInst *source_instruction,
2494 ZigFn *fn_entry, IrInstGen *fn_ref, size_t arg_count, IrInstGen **args,
2495 CallModifier modifier, IrInstGen *new_stack, bool is_async_call_builtin,
2496 IrInstGen *result_loc, ZigType *return_type)
20192497{
2020 IrInstructionCallGen *call_instruction = ir_build_instruction<IrInstructionCallGen>(&ira->new_irb,
2498 IrInstGenCall *call_instruction = ir_build_inst_gen<IrInstGenCall>(&ira->new_irb,
20212499 source_instruction->scope, source_instruction->source_node);
20222500 call_instruction->base.value->type = return_type;
20232501 call_instruction->fn_entry = fn_entry;
......@@ -2029,23 +2507,23 @@ static IrInstructionCallGen *ir_build_call_gen(IrAnalyze *ira, IrInstruction *so
20292507 call_instruction->new_stack = new_stack;
20302508 call_instruction->result_loc = result_loc;
20312509
2032 if (fn_ref != nullptr) ir_ref_instruction(fn_ref, ira->new_irb.current_basic_block);
2510 if (fn_ref != nullptr) ir_ref_inst_gen(fn_ref, ira->new_irb.current_basic_block);
20332511 for (size_t i = 0; i < arg_count; i += 1)
2034 ir_ref_instruction(args[i], ira->new_irb.current_basic_block);
2035 if (new_stack != nullptr) ir_ref_instruction(new_stack, ira->new_irb.current_basic_block);
2036 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
2512 ir_ref_inst_gen(args[i], ira->new_irb.current_basic_block);
2513 if (new_stack != nullptr) ir_ref_inst_gen(new_stack, ira->new_irb.current_basic_block);
2514 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
20372515
20382516 return call_instruction;
20392517}
20402518
2041static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source_node,
2042 size_t incoming_count, IrBasicBlock **incoming_blocks, IrInstruction **incoming_values,
2519static IrInstSrc *ir_build_phi(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2520 size_t incoming_count, IrBasicBlockSrc **incoming_blocks, IrInstSrc **incoming_values,
20432521 ResultLocPeerParent *peer_parent)
20442522{
20452523 assert(incoming_count != 0);
20462524 assert(incoming_count != SIZE_MAX);
20472525
2048 IrInstructionPhi *phi_instruction = ir_build_instruction<IrInstructionPhi>(irb, scope, source_node);
2526 IrInstSrcPhi *phi_instruction = ir_build_instruction<IrInstSrcPhi>(irb, scope, source_node);
20492527 phi_instruction->incoming_count = incoming_count;
20502528 phi_instruction->incoming_blocks = incoming_blocks;
20512529 phi_instruction->incoming_values = incoming_values;
......@@ -2059,56 +2537,77 @@ static IrInstruction *ir_build_phi(IrBuilder *irb, Scope *scope, AstNode *source
20592537 return &phi_instruction->base;
20602538}
20612539
2062static IrInstruction *ir_create_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
2063 IrBasicBlock *dest_block, IrInstruction *is_comptime)
2540static IrInstGen *ir_build_phi_gen(IrAnalyze *ira, IrInst *source_instr, size_t incoming_count,
2541 IrBasicBlockGen **incoming_blocks, IrInstGen **incoming_values, ZigType *result_type)
20642542{
2065 IrInstructionBr *br_instruction = ir_create_instruction<IrInstructionBr>(irb, scope, source_node);
2066 br_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2067 br_instruction->base.value->special = ConstValSpecialStatic;
2068 br_instruction->dest_block = dest_block;
2069 br_instruction->is_comptime = is_comptime;
2543 assert(incoming_count != 0);
2544 assert(incoming_count != SIZE_MAX);
2545
2546 IrInstGenPhi *phi_instruction = ir_build_inst_gen<IrInstGenPhi>(&ira->new_irb,
2547 source_instr->scope, source_instr->source_node);
2548 phi_instruction->base.value->type = result_type;
2549 phi_instruction->incoming_count = incoming_count;
2550 phi_instruction->incoming_blocks = incoming_blocks;
2551 phi_instruction->incoming_values = incoming_values;
2552
2553 for (size_t i = 0; i < incoming_count; i += 1) {
2554 ir_ref_bb_gen(incoming_blocks[i]);
2555 ir_ref_inst_gen(incoming_values[i], ira->new_irb.current_basic_block);
2556 }
2557
2558 return &phi_instruction->base;
2559}
2560
2561static IrInstSrc *ir_build_br(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2562 IrBasicBlockSrc *dest_block, IrInstSrc *is_comptime)
2563{
2564 IrInstSrcBr *inst = ir_build_instruction<IrInstSrcBr>(irb, scope, source_node);
2565 inst->base.is_noreturn = true;
2566 inst->dest_block = dest_block;
2567 inst->is_comptime = is_comptime;
20702568
20712569 ir_ref_bb(dest_block);
20722570 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
20732571
2074 return &br_instruction->base;
2572 return &inst->base;
20752573}
20762574
2077static IrInstruction *ir_build_br(IrBuilder *irb, Scope *scope, AstNode *source_node,
2078 IrBasicBlock *dest_block, IrInstruction *is_comptime)
2079{
2080 IrInstruction *instruction = ir_create_br(irb, scope, source_node, dest_block, is_comptime);
2081 ir_instruction_append(irb->current_basic_block, instruction);
2082 return instruction;
2575static IrInstGen *ir_build_br_gen(IrAnalyze *ira, IrInst *source_instr, IrBasicBlockGen *dest_block) {
2576 IrInstGenBr *inst = ir_build_inst_noreturn<IrInstGenBr>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2577 inst->dest_block = dest_block;
2578
2579 ir_ref_bb_gen(dest_block);
2580
2581 return &inst->base;
20832582}
20842583
2085static IrInstruction *ir_build_ptr_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2086 IrInstruction *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
2087 IrInstruction *sentinel, IrInstruction *align_value,
2584static IrInstSrc *ir_build_ptr_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2585 IrInstSrc *child_type, bool is_const, bool is_volatile, PtrLen ptr_len,
2586 IrInstSrc *sentinel, IrInstSrc *align_value,
20882587 uint32_t bit_offset_start, uint32_t host_int_bytes, bool is_allow_zero)
20892588{
2090 IrInstructionPtrType *ptr_type_of_instruction = ir_build_instruction<IrInstructionPtrType>(irb, scope, source_node);
2091 ptr_type_of_instruction->sentinel = sentinel;
2092 ptr_type_of_instruction->align_value = align_value;
2093 ptr_type_of_instruction->child_type = child_type;
2094 ptr_type_of_instruction->is_const = is_const;
2095 ptr_type_of_instruction->is_volatile = is_volatile;
2096 ptr_type_of_instruction->ptr_len = ptr_len;
2097 ptr_type_of_instruction->bit_offset_start = bit_offset_start;
2098 ptr_type_of_instruction->host_int_bytes = host_int_bytes;
2099 ptr_type_of_instruction->is_allow_zero = is_allow_zero;
2589 IrInstSrcPtrType *inst = ir_build_instruction<IrInstSrcPtrType>(irb, scope, source_node);
2590 inst->sentinel = sentinel;
2591 inst->align_value = align_value;
2592 inst->child_type = child_type;
2593 inst->is_const = is_const;
2594 inst->is_volatile = is_volatile;
2595 inst->ptr_len = ptr_len;
2596 inst->bit_offset_start = bit_offset_start;
2597 inst->host_int_bytes = host_int_bytes;
2598 inst->is_allow_zero = is_allow_zero;
21002599
21012600 if (sentinel) ir_ref_instruction(sentinel, irb->current_basic_block);
21022601 if (align_value) ir_ref_instruction(align_value, irb->current_basic_block);
21032602 ir_ref_instruction(child_type, irb->current_basic_block);
21042603
2105 return &ptr_type_of_instruction->base;
2604 return &inst->base;
21062605}
21072606
2108static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2109 IrInstruction *value, LVal lval, ResultLoc *result_loc)
2607static IrInstSrc *ir_build_un_op_lval(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2608 IrInstSrc *value, LVal lval, ResultLoc *result_loc)
21102609{
2111 IrInstructionUnOp *instruction = ir_build_instruction<IrInstructionUnOp>(irb, scope, source_node);
2610 IrInstSrcUnOp *instruction = ir_build_instruction<IrInstSrcUnOp>(irb, scope, source_node);
21122611 instruction->op_id = op_id;
21132612 instruction->value = value;
21142613 instruction->lval = lval;
......@@ -2119,18 +2618,55 @@ static IrInstruction *ir_build_un_op_lval(IrBuilder *irb, Scope *scope, AstNode
21192618 return &instruction->base;
21202619}
21212620
2122static IrInstruction *ir_build_un_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2123 IrInstruction *value)
2621static IrInstSrc *ir_build_un_op(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrUnOp op_id,
2622 IrInstSrc *value)
21242623{
21252624 return ir_build_un_op_lval(irb, scope, source_node, op_id, value, LValNone, nullptr);
21262625}
21272626
2128static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope, AstNode *source_node,
2129 size_t item_count, IrInstruction **elem_result_loc_list, IrInstruction *result_loc,
2627static IrInstGen *ir_build_negation(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand, ZigType *expr_type) {
2628 IrInstGenNegation *instruction = ir_build_inst_gen<IrInstGenNegation>(&ira->new_irb,
2629 source_instr->scope, source_instr->source_node);
2630 instruction->base.value->type = expr_type;
2631 instruction->operand = operand;
2632
2633 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2634
2635 return &instruction->base;
2636}
2637
2638static IrInstGen *ir_build_negation_wrapping(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2639 ZigType *expr_type)
2640{
2641 IrInstGenNegationWrapping *instruction = ir_build_inst_gen<IrInstGenNegationWrapping>(&ira->new_irb,
2642 source_instr->scope, source_instr->source_node);
2643 instruction->base.value->type = expr_type;
2644 instruction->operand = operand;
2645
2646 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2647
2648 return &instruction->base;
2649}
2650
2651static IrInstGen *ir_build_binary_not(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
2652 ZigType *expr_type)
2653{
2654 IrInstGenBinaryNot *instruction = ir_build_inst_gen<IrInstGenBinaryNot>(&ira->new_irb,
2655 source_instr->scope, source_instr->source_node);
2656 instruction->base.value->type = expr_type;
2657 instruction->operand = operand;
2658
2659 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2660
2661 return &instruction->base;
2662}
2663
2664static IrInstSrc *ir_build_container_init_list(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2665 size_t item_count, IrInstSrc **elem_result_loc_list, IrInstSrc *result_loc,
21302666 AstNode *init_array_type_source_node)
21312667{
2132 IrInstructionContainerInitList *container_init_list_instruction =
2133 ir_build_instruction<IrInstructionContainerInitList>(irb, scope, source_node);
2668 IrInstSrcContainerInitList *container_init_list_instruction =
2669 ir_build_instruction<IrInstSrcContainerInitList>(irb, scope, source_node);
21342670 container_init_list_instruction->item_count = item_count;
21352671 container_init_list_instruction->elem_result_loc_list = elem_result_loc_list;
21362672 container_init_list_instruction->result_loc = result_loc;
......@@ -2144,11 +2680,11 @@ static IrInstruction *ir_build_container_init_list(IrBuilder *irb, Scope *scope,
21442680 return &container_init_list_instruction->base;
21452681}
21462682
2147static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scope, AstNode *source_node,
2148 size_t field_count, IrInstructionContainerInitFieldsField *fields, IrInstruction *result_loc)
2683static IrInstSrc *ir_build_container_init_fields(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2684 size_t field_count, IrInstSrcContainerInitFieldsField *fields, IrInstSrc *result_loc)
21492685{
2150 IrInstructionContainerInitFields *container_init_fields_instruction =
2151 ir_build_instruction<IrInstructionContainerInitFields>(irb, scope, source_node);
2686 IrInstSrcContainerInitFields *container_init_fields_instruction =
2687 ir_build_instruction<IrInstSrcContainerInitFields>(irb, scope, source_node);
21522688 container_init_fields_instruction->field_count = field_count;
21532689 container_init_fields_instruction->fields = fields;
21542690 container_init_fields_instruction->result_loc = result_loc;
......@@ -2161,20 +2697,21 @@ static IrInstruction *ir_build_container_init_fields(IrBuilder *irb, Scope *scop
21612697 return &container_init_fields_instruction->base;
21622698}
21632699
2164static IrInstruction *ir_build_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2165 IrInstructionUnreachable *unreachable_instruction =
2166 ir_build_instruction<IrInstructionUnreachable>(irb, scope, source_node);
2167 unreachable_instruction->base.value->special = ConstValSpecialStatic;
2168 unreachable_instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2169 return &unreachable_instruction->base;
2700static IrInstSrc *ir_build_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
2701 IrInstSrcUnreachable *inst = ir_build_instruction<IrInstSrcUnreachable>(irb, scope, source_node);
2702 inst->base.is_noreturn = true;
2703 return &inst->base;
2704}
2705
2706static IrInstGen *ir_build_unreachable_gen(IrAnalyze *ira, IrInst *source_instr) {
2707 IrInstGenUnreachable *inst = ir_build_inst_noreturn<IrInstGenUnreachable>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2708 return &inst->base;
21702709}
21712710
2172static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
2173 IrInstruction *ptr, IrInstruction *value)
2711static IrInstSrcStorePtr *ir_build_store_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2712 IrInstSrc *ptr, IrInstSrc *value)
21742713{
2175 IrInstructionStorePtr *instruction = ir_build_instruction<IrInstructionStorePtr>(irb, scope, source_node);
2176 instruction->base.value->special = ConstValSpecialStatic;
2177 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2714 IrInstSrcStorePtr *instruction = ir_build_instruction<IrInstSrcStorePtr>(irb, scope, source_node);
21782715 instruction->ptr = ptr;
21792716 instruction->value = value;
21802717
......@@ -2184,76 +2721,83 @@ static IrInstructionStorePtr *ir_build_store_ptr(IrBuilder *irb, Scope *scope, A
21842721 return instruction;
21852722}
21862723
2187static IrInstruction *ir_build_vector_store_elem(IrAnalyze *ira, IrInstruction *source_instruction,
2188 IrInstruction *vector_ptr, IrInstruction *index, IrInstruction *value)
2724static IrInstGen *ir_build_store_ptr_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *ptr, IrInstGen *value) {
2725 IrInstGenStorePtr *instruction = ir_build_inst_void<IrInstGenStorePtr>(&ira->new_irb,
2726 source_instr->scope, source_instr->source_node);
2727 instruction->ptr = ptr;
2728 instruction->value = value;
2729
2730 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2731 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
2732
2733 return &instruction->base;
2734}
2735
2736static IrInstGen *ir_build_vector_store_elem(IrAnalyze *ira, IrInst *src_inst,
2737 IrInstGen *vector_ptr, IrInstGen *index, IrInstGen *value)
21892738{
2190 IrInstructionVectorStoreElem *inst = ir_build_instruction<IrInstructionVectorStoreElem>(
2191 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2192 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2739 IrInstGenVectorStoreElem *inst = ir_build_inst_void<IrInstGenVectorStoreElem>(
2740 &ira->new_irb, src_inst->scope, src_inst->source_node);
21932741 inst->vector_ptr = vector_ptr;
21942742 inst->index = index;
21952743 inst->value = value;
21962744
2197 ir_ref_instruction(vector_ptr, ira->new_irb.current_basic_block);
2198 ir_ref_instruction(index, ira->new_irb.current_basic_block);
2199 ir_ref_instruction(value, ira->new_irb.current_basic_block);
2745 ir_ref_inst_gen(vector_ptr, ira->new_irb.current_basic_block);
2746 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
2747 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
22002748
22012749 return &inst->base;
22022750}
22032751
2204static IrInstruction *ir_build_var_decl_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2205 ZigVar *var, IrInstruction *align_value, IrInstruction *ptr)
2752static IrInstSrc *ir_build_var_decl_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2753 ZigVar *var, IrInstSrc *align_value, IrInstSrc *ptr)
22062754{
2207 IrInstructionDeclVarSrc *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarSrc>(irb, scope, source_node);
2208 decl_var_instruction->base.value->special = ConstValSpecialStatic;
2209 decl_var_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
2210 decl_var_instruction->var = var;
2211 decl_var_instruction->align_value = align_value;
2212 decl_var_instruction->ptr = ptr;
2755 IrInstSrcDeclVar *inst = ir_build_instruction<IrInstSrcDeclVar>(irb, scope, source_node);
2756 inst->var = var;
2757 inst->align_value = align_value;
2758 inst->ptr = ptr;
22132759
22142760 if (align_value != nullptr) ir_ref_instruction(align_value, irb->current_basic_block);
22152761 ir_ref_instruction(ptr, irb->current_basic_block);
22162762
2217 return &decl_var_instruction->base;
2763 return &inst->base;
22182764}
22192765
2220static IrInstruction *ir_build_var_decl_gen(IrAnalyze *ira, IrInstruction *source_instruction,
2221 ZigVar *var, IrInstruction *var_ptr)
2766static IrInstGen *ir_build_var_decl_gen(IrAnalyze *ira, IrInst *source_instruction,
2767 ZigVar *var, IrInstGen *var_ptr)
22222768{
2223 IrInstructionDeclVarGen *decl_var_instruction = ir_build_instruction<IrInstructionDeclVarGen>(&ira->new_irb,
2769 IrInstGenDeclVar *inst = ir_build_inst_gen<IrInstGenDeclVar>(&ira->new_irb,
22242770 source_instruction->scope, source_instruction->source_node);
2225 decl_var_instruction->base.value->special = ConstValSpecialStatic;
2226 decl_var_instruction->base.value->type = ira->codegen->builtin_types.entry_void;
2227 decl_var_instruction->var = var;
2228 decl_var_instruction->var_ptr = var_ptr;
2771 inst->base.value->special = ConstValSpecialStatic;
2772 inst->base.value->type = ira->codegen->builtin_types.entry_void;
2773 inst->var = var;
2774 inst->var_ptr = var_ptr;
22292775
2230 ir_ref_instruction(var_ptr, ira->new_irb.current_basic_block);
2776 ir_ref_inst_gen(var_ptr, ira->new_irb.current_basic_block);
22312777
2232 return &decl_var_instruction->base;
2778 return &inst->base;
22332779}
22342780
2235static IrInstruction *ir_build_resize_slice(IrAnalyze *ira, IrInstruction *source_instruction,
2236 IrInstruction *operand, ZigType *ty, IrInstruction *result_loc)
2781static IrInstGen *ir_build_resize_slice(IrAnalyze *ira, IrInst *source_instruction,
2782 IrInstGen *operand, ZigType *ty, IrInstGen *result_loc)
22372783{
2238 IrInstructionResizeSlice *instruction = ir_build_instruction<IrInstructionResizeSlice>(&ira->new_irb,
2784 IrInstGenResizeSlice *instruction = ir_build_inst_gen<IrInstGenResizeSlice>(&ira->new_irb,
22392785 source_instruction->scope, source_instruction->source_node);
22402786 instruction->base.value->type = ty;
22412787 instruction->operand = operand;
22422788 instruction->result_loc = result_loc;
22432789
2244 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2245 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
2790 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
2791 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
22462792
22472793 return &instruction->base;
22482794}
22492795
2250static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *source_node,
2251 IrInstruction *target, IrInstruction *options)
2796static IrInstSrc *ir_build_export(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2797 IrInstSrc *target, IrInstSrc *options)
22522798{
2253 IrInstructionExport *export_instruction = ir_build_instruction<IrInstructionExport>(
2799 IrInstSrcExport *export_instruction = ir_build_instruction<IrInstSrcExport>(
22542800 irb, scope, source_node);
2255 export_instruction->base.value->special = ConstValSpecialStatic;
2256 export_instruction->base.value->type = irb->codegen->builtin_types.entry_void;
22572801 export_instruction->target = target;
22582802 export_instruction->options = options;
22592803
......@@ -2263,8 +2807,8 @@ static IrInstruction *ir_build_export(IrBuilder *irb, Scope *scope, AstNode *sou
22632807 return &export_instruction->base;
22642808}
22652809
2266static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *ptr) {
2267 IrInstructionLoadPtr *instruction = ir_build_instruction<IrInstructionLoadPtr>(irb, scope, source_node);
2810static IrInstSrc *ir_build_load_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *ptr) {
2811 IrInstSrcLoadPtr *instruction = ir_build_instruction<IrInstSrcLoadPtr>(irb, scope, source_node);
22682812 instruction->ptr = ptr;
22692813
22702814 ir_ref_instruction(ptr, irb->current_basic_block);
......@@ -2272,8 +2816,23 @@ static IrInstruction *ir_build_load_ptr(IrBuilder *irb, Scope *scope, AstNode *s
22722816 return &instruction->base;
22732817}
22742818
2275static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2276 IrInstructionTypeOf *instruction = ir_build_instruction<IrInstructionTypeOf>(irb, scope, source_node);
2819static IrInstGen *ir_build_load_ptr_gen(IrAnalyze *ira, IrInst *source_instruction,
2820 IrInstGen *ptr, ZigType *ty, IrInstGen *result_loc)
2821{
2822 IrInstGenLoadPtr *instruction = ir_build_inst_gen<IrInstGenLoadPtr>(
2823 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
2824 instruction->base.value->type = ty;
2825 instruction->ptr = ptr;
2826 instruction->result_loc = result_loc;
2827
2828 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
2829 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
2830
2831 return &instruction->base;
2832}
2833
2834static IrInstSrc *ir_build_typeof(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
2835 IrInstSrcTypeOf *instruction = ir_build_instruction<IrInstSrcTypeOf>(irb, scope, source_node);
22772836 instruction->value = value;
22782837
22792838 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2281,8 +2840,8 @@ static IrInstruction *ir_build_typeof(IrBuilder *irb, Scope *scope, AstNode *sou
22812840 return &instruction->base;
22822841}
22832842
2284static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_cold) {
2285 IrInstructionSetCold *instruction = ir_build_instruction<IrInstructionSetCold>(irb, scope, source_node);
2843static IrInstSrc *ir_build_set_cold(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_cold) {
2844 IrInstSrcSetCold *instruction = ir_build_instruction<IrInstSrcSetCold>(irb, scope, source_node);
22862845 instruction->is_cold = is_cold;
22872846
22882847 ir_ref_instruction(is_cold, irb->current_basic_block);
......@@ -2290,21 +2849,21 @@ static IrInstruction *ir_build_set_cold(IrBuilder *irb, Scope *scope, AstNode *s
22902849 return &instruction->base;
22912850}
22922851
2293static IrInstruction *ir_build_set_runtime_safety(IrBuilder *irb, Scope *scope, AstNode *source_node,
2294 IrInstruction *safety_on)
2852static IrInstSrc *ir_build_set_runtime_safety(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2853 IrInstSrc *safety_on)
22952854{
2296 IrInstructionSetRuntimeSafety *instruction = ir_build_instruction<IrInstructionSetRuntimeSafety>(irb, scope, source_node);
2297 instruction->safety_on = safety_on;
2855 IrInstSrcSetRuntimeSafety *inst = ir_build_instruction<IrInstSrcSetRuntimeSafety>(irb, scope, source_node);
2856 inst->safety_on = safety_on;
22982857
22992858 ir_ref_instruction(safety_on, irb->current_basic_block);
23002859
2301 return &instruction->base;
2860 return &inst->base;
23022861}
23032862
2304static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstNode *source_node,
2305 IrInstruction *mode_value)
2863static IrInstSrc *ir_build_set_float_mode(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2864 IrInstSrc *mode_value)
23062865{
2307 IrInstructionSetFloatMode *instruction = ir_build_instruction<IrInstructionSetFloatMode>(irb, scope, source_node);
2866 IrInstSrcSetFloatMode *instruction = ir_build_instruction<IrInstSrcSetFloatMode>(irb, scope, source_node);
23082867 instruction->mode_value = mode_value;
23092868
23102869 ir_ref_instruction(mode_value, irb->current_basic_block);
......@@ -2312,10 +2871,10 @@ static IrInstruction *ir_build_set_float_mode(IrBuilder *irb, Scope *scope, AstN
23122871 return &instruction->base;
23132872}
23142873
2315static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *size,
2316 IrInstruction *sentinel, IrInstruction *child_type)
2874static IrInstSrc *ir_build_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *size,
2875 IrInstSrc *sentinel, IrInstSrc *child_type)
23172876{
2318 IrInstructionArrayType *instruction = ir_build_instruction<IrInstructionArrayType>(irb, scope, source_node);
2877 IrInstSrcArrayType *instruction = ir_build_instruction<IrInstSrcArrayType>(irb, scope, source_node);
23192878 instruction->size = size;
23202879 instruction->sentinel = sentinel;
23212880 instruction->child_type = child_type;
......@@ -2327,10 +2886,10 @@ static IrInstruction *ir_build_array_type(IrBuilder *irb, Scope *scope, AstNode
23272886 return &instruction->base;
23282887}
23292888
2330static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2331 IrInstruction *payload_type)
2889static IrInstSrc *ir_build_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2890 IrInstSrc *payload_type)
23322891{
2333 IrInstructionAnyFrameType *instruction = ir_build_instruction<IrInstructionAnyFrameType>(irb, scope, source_node);
2892 IrInstSrcAnyFrameType *instruction = ir_build_instruction<IrInstSrcAnyFrameType>(irb, scope, source_node);
23342893 instruction->payload_type = payload_type;
23352894
23362895 if (payload_type != nullptr) ir_ref_instruction(payload_type, irb->current_basic_block);
......@@ -2338,11 +2897,11 @@ static IrInstruction *ir_build_anyframe_type(IrBuilder *irb, Scope *scope, AstNo
23382897 return &instruction->base;
23392898}
23402899
2341static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
2342 IrInstruction *child_type, bool is_const, bool is_volatile,
2343 IrInstruction *sentinel, IrInstruction *align_value, bool is_allow_zero)
2900static IrInstSrc *ir_build_slice_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2901 IrInstSrc *child_type, bool is_const, bool is_volatile,
2902 IrInstSrc *sentinel, IrInstSrc *align_value, bool is_allow_zero)
23442903{
2345 IrInstructionSliceType *instruction = ir_build_instruction<IrInstructionSliceType>(irb, scope, source_node);
2904 IrInstSrcSliceType *instruction = ir_build_instruction<IrInstSrcSliceType>(irb, scope, source_node);
23462905 instruction->is_const = is_const;
23472906 instruction->is_volatile = is_volatile;
23482907 instruction->child_type = child_type;
......@@ -2357,11 +2916,11 @@ static IrInstruction *ir_build_slice_type(IrBuilder *irb, Scope *scope, AstNode
23572916 return &instruction->base;
23582917}
23592918
2360static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2361 IrInstruction *asm_template, IrInstruction **input_list, IrInstruction **output_types,
2919static IrInstSrc *ir_build_asm_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2920 IrInstSrc *asm_template, IrInstSrc **input_list, IrInstSrc **output_types,
23622921 ZigVar **output_vars, size_t return_count, bool has_side_effects, bool is_global)
23632922{
2364 IrInstructionAsmSrc *instruction = ir_build_instruction<IrInstructionAsmSrc>(irb, scope, source_node);
2923 IrInstSrcAsm *instruction = ir_build_instruction<IrInstSrcAsm>(irb, scope, source_node);
23652924 instruction->asm_template = asm_template;
23662925 instruction->input_list = input_list;
23672926 instruction->output_types = output_types;
......@@ -2372,24 +2931,25 @@ static IrInstruction *ir_build_asm_src(IrBuilder *irb, Scope *scope, AstNode *so
23722931
23732932 assert(source_node->type == NodeTypeAsmExpr);
23742933 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
2375 IrInstruction *output_type = output_types[i];
2934 IrInstSrc *output_type = output_types[i];
23762935 if (output_type) ir_ref_instruction(output_type, irb->current_basic_block);
23772936 }
23782937
23792938 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
2380 IrInstruction *input_value = input_list[i];
2939 IrInstSrc *input_value = input_list[i];
23812940 ir_ref_instruction(input_value, irb->current_basic_block);
23822941 }
23832942
23842943 return &instruction->base;
23852944}
23862945
2387static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
2946static IrInstGen *ir_build_asm_gen(IrAnalyze *ira, IrInst *source_instr,
23882947 Buf *asm_template, AsmToken *token_list, size_t token_list_len,
2389 IrInstruction **input_list, IrInstruction **output_types, ZigVar **output_vars, size_t return_count,
2390 bool has_side_effects)
2948 IrInstGen **input_list, IrInstGen **output_types, ZigVar **output_vars, size_t return_count,
2949 bool has_side_effects, ZigType *return_type)
23912950{
2392 IrInstructionAsmGen *instruction = ir_build_instruction<IrInstructionAsmGen>(&ira->new_irb, scope, source_node);
2951 IrInstGenAsm *instruction = ir_build_inst_gen<IrInstGenAsm>(&ira->new_irb, source_instr->scope, source_instr->source_node);
2952 instruction->base.value->type = return_type;
23932953 instruction->asm_template = asm_template;
23942954 instruction->token_list = token_list;
23952955 instruction->token_list_len = token_list_len;
......@@ -2399,22 +2959,24 @@ static IrInstruction *ir_build_asm_gen(IrAnalyze *ira, Scope *scope, AstNode *so
23992959 instruction->return_count = return_count;
24002960 instruction->has_side_effects = has_side_effects;
24012961
2402 assert(source_node->type == NodeTypeAsmExpr);
2403 for (size_t i = 0; i < source_node->data.asm_expr.output_list.length; i += 1) {
2404 IrInstruction *output_type = output_types[i];
2405 if (output_type) ir_ref_instruction(output_type, ira->new_irb.current_basic_block);
2962 assert(source_instr->source_node->type == NodeTypeAsmExpr);
2963 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.output_list.length; i += 1) {
2964 IrInstGen *output_type = output_types[i];
2965 if (output_type) ir_ref_inst_gen(output_type, ira->new_irb.current_basic_block);
24062966 }
24072967
2408 for (size_t i = 0; i < source_node->data.asm_expr.input_list.length; i += 1) {
2409 IrInstruction *input_value = input_list[i];
2410 ir_ref_instruction(input_value, ira->new_irb.current_basic_block);
2968 for (size_t i = 0; i < source_instr->source_node->data.asm_expr.input_list.length; i += 1) {
2969 IrInstGen *input_value = input_list[i];
2970 ir_ref_inst_gen(input_value, ira->new_irb.current_basic_block);
24112971 }
24122972
24132973 return &instruction->base;
24142974}
24152975
2416static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value, bool bit_size) {
2417 IrInstructionSizeOf *instruction = ir_build_instruction<IrInstructionSizeOf>(irb, scope, source_node);
2976static IrInstSrc *ir_build_size_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value,
2977 bool bit_size)
2978{
2979 IrInstSrcSizeOf *instruction = ir_build_instruction<IrInstSrcSizeOf>(irb, scope, source_node);
24182980 instruction->type_value = type_value;
24192981 instruction->bit_size = bit_size;
24202982
......@@ -2423,8 +2985,10 @@ static IrInstruction *ir_build_size_of(IrBuilder *irb, Scope *scope, AstNode *so
24232985 return &instruction->base;
24242986}
24252987
2426static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2427 IrInstructionTestNonNull *instruction = ir_build_instruction<IrInstructionTestNonNull>(irb, scope, source_node);
2988static IrInstSrc *ir_build_test_non_null_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
2989 IrInstSrc *value)
2990{
2991 IrInstSrcTestNonNull *instruction = ir_build_instruction<IrInstSrcTestNonNull>(irb, scope, source_node);
24282992 instruction->value = value;
24292993
24302994 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2432,10 +2996,21 @@ static IrInstruction *ir_build_test_nonnull(IrBuilder *irb, Scope *scope, AstNod
24322996 return &instruction->base;
24332997}
24342998
2435static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
2436 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
2999static IrInstGen *ir_build_test_non_null_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
3000 IrInstGenTestNonNull *inst = ir_build_inst_gen<IrInstGenTestNonNull>(&ira->new_irb,
3001 source_instr->scope, source_instr->source_node);
3002 inst->base.value->type = ira->codegen->builtin_types.entry_bool;
3003 inst->value = value;
3004
3005 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3006
3007 return &inst->base;
3008}
3009
3010static IrInstSrc *ir_build_optional_unwrap_ptr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3011 IrInstSrc *base_ptr, bool safety_check_on, bool initializing)
24373012{
2438 IrInstructionOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstructionOptionalUnwrapPtr>(irb, scope, source_node);
3013 IrInstSrcOptionalUnwrapPtr *instruction = ir_build_instruction<IrInstSrcOptionalUnwrapPtr>(irb, scope, source_node);
24393014 instruction->base_ptr = base_ptr;
24403015 instruction->safety_check_on = safety_check_on;
24413016 instruction->initializing = initializing;
......@@ -2445,113 +3020,198 @@ static IrInstruction *ir_build_optional_unwrap_ptr(IrBuilder *irb, Scope *scope,
24453020 return &instruction->base;
24463021}
24473022
2448static IrInstruction *ir_build_optional_wrap(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_ty,
2449 IrInstruction *operand, IrInstruction *result_loc)
3023static IrInstGen *ir_build_optional_unwrap_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
3024 IrInstGen *base_ptr, bool safety_check_on, bool initializing, ZigType *result_type)
3025{
3026 IrInstGenOptionalUnwrapPtr *inst = ir_build_inst_gen<IrInstGenOptionalUnwrapPtr>(&ira->new_irb,
3027 source_instr->scope, source_instr->source_node);
3028 inst->base.value->type = result_type;
3029 inst->base_ptr = base_ptr;
3030 inst->safety_check_on = safety_check_on;
3031 inst->initializing = initializing;
3032
3033 ir_ref_inst_gen(base_ptr, ira->new_irb.current_basic_block);
3034
3035 return &inst->base;
3036}
3037
3038static IrInstGen *ir_build_optional_wrap(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_ty,
3039 IrInstGen *operand, IrInstGen *result_loc)
24503040{
2451 IrInstructionOptionalWrap *instruction = ir_build_instruction<IrInstructionOptionalWrap>(
3041 IrInstGenOptionalWrap *instruction = ir_build_inst_gen<IrInstGenOptionalWrap>(
24523042 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24533043 instruction->base.value->type = result_ty;
24543044 instruction->operand = operand;
24553045 instruction->result_loc = result_loc;
24563046
2457 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2458 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3047 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3048 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24593049
24603050 return &instruction->base;
24613051}
24623052
2463static IrInstruction *ir_build_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instruction,
2464 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
3053static IrInstGen *ir_build_err_wrap_payload(IrAnalyze *ira, IrInst *source_instruction,
3054 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
24653055{
2466 IrInstructionErrWrapPayload *instruction = ir_build_instruction<IrInstructionErrWrapPayload>(
3056 IrInstGenErrWrapPayload *instruction = ir_build_inst_gen<IrInstGenErrWrapPayload>(
24673057 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24683058 instruction->base.value->type = result_type;
24693059 instruction->operand = operand;
24703060 instruction->result_loc = result_loc;
24713061
2472 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2473 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3062 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3063 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24743064
24753065 return &instruction->base;
24763066}
24773067
2478static IrInstruction *ir_build_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instruction,
2479 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
3068static IrInstGen *ir_build_err_wrap_code(IrAnalyze *ira, IrInst *source_instruction,
3069 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
24803070{
2481 IrInstructionErrWrapCode *instruction = ir_build_instruction<IrInstructionErrWrapCode>(
3071 IrInstGenErrWrapCode *instruction = ir_build_inst_gen<IrInstGenErrWrapCode>(
24823072 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
24833073 instruction->base.value->type = result_type;
24843074 instruction->operand = operand;
24853075 instruction->result_loc = result_loc;
24863076
2487 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2488 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3077 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3078 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
24893079
24903080 return &instruction->base;
24913081}
24923082
2493static IrInstruction *ir_build_clz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2494 IrInstructionClz *instruction = ir_build_instruction<IrInstructionClz>(irb, scope, source_node);
3083static IrInstSrc *ir_build_clz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3084 IrInstSrc *op)
3085{
3086 IrInstSrcClz *instruction = ir_build_instruction<IrInstSrcClz>(irb, scope, source_node);
24953087 instruction->type = type;
24963088 instruction->op = op;
24973089
2498 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3090 ir_ref_instruction(type, irb->current_basic_block);
24993091 ir_ref_instruction(op, irb->current_basic_block);
25003092
25013093 return &instruction->base;
25023094}
25033095
2504static IrInstruction *ir_build_ctz(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2505 IrInstructionCtz *instruction = ir_build_instruction<IrInstructionCtz>(irb, scope, source_node);
3096static IrInstGen *ir_build_clz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
3097 IrInstGenClz *instruction = ir_build_inst_gen<IrInstGenClz>(&ira->new_irb,
3098 source_instr->scope, source_instr->source_node);
3099 instruction->base.value->type = result_type;
3100 instruction->op = op;
3101
3102 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3103
3104 return &instruction->base;
3105}
3106
3107static IrInstSrc *ir_build_ctz(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3108 IrInstSrc *op)
3109{
3110 IrInstSrcCtz *instruction = ir_build_instruction<IrInstSrcCtz>(irb, scope, source_node);
25063111 instruction->type = type;
25073112 instruction->op = op;
25083113
2509 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3114 ir_ref_instruction(type, irb->current_basic_block);
25103115 ir_ref_instruction(op, irb->current_basic_block);
25113116
25123117 return &instruction->base;
25133118}
25143119
2515static IrInstruction *ir_build_pop_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2516 IrInstructionPopCount *instruction = ir_build_instruction<IrInstructionPopCount>(irb, scope, source_node);
3120static IrInstGen *ir_build_ctz_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type, IrInstGen *op) {
3121 IrInstGenCtz *instruction = ir_build_inst_gen<IrInstGenCtz>(&ira->new_irb,
3122 source_instr->scope, source_instr->source_node);
3123 instruction->base.value->type = result_type;
3124 instruction->op = op;
3125
3126 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3127
3128 return &instruction->base;
3129}
3130
3131static IrInstSrc *ir_build_pop_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3132 IrInstSrc *op)
3133{
3134 IrInstSrcPopCount *instruction = ir_build_instruction<IrInstSrcPopCount>(irb, scope, source_node);
25173135 instruction->type = type;
25183136 instruction->op = op;
25193137
2520 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3138 ir_ref_instruction(type, irb->current_basic_block);
25213139 ir_ref_instruction(op, irb->current_basic_block);
25223140
25233141 return &instruction->base;
25243142}
25253143
2526static IrInstruction *ir_build_bswap(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2527 IrInstructionBswap *instruction = ir_build_instruction<IrInstructionBswap>(irb, scope, source_node);
3144static IrInstGen *ir_build_pop_count_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *result_type,
3145 IrInstGen *op)
3146{
3147 IrInstGenPopCount *instruction = ir_build_inst_gen<IrInstGenPopCount>(&ira->new_irb,
3148 source_instr->scope, source_instr->source_node);
3149 instruction->base.value->type = result_type;
3150 instruction->op = op;
3151
3152 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3153
3154 return &instruction->base;
3155}
3156
3157static IrInstSrc *ir_build_bswap(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3158 IrInstSrc *op)
3159{
3160 IrInstSrcBswap *instruction = ir_build_instruction<IrInstSrcBswap>(irb, scope, source_node);
25283161 instruction->type = type;
25293162 instruction->op = op;
25303163
2531 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3164 ir_ref_instruction(type, irb->current_basic_block);
25323165 ir_ref_instruction(op, irb->current_basic_block);
25333166
25343167 return &instruction->base;
25353168}
25363169
2537static IrInstruction *ir_build_bit_reverse(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type, IrInstruction *op) {
2538 IrInstructionBitReverse *instruction = ir_build_instruction<IrInstructionBitReverse>(irb, scope, source_node);
3170static IrInstGen *ir_build_bswap_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *op_type,
3171 IrInstGen *op)
3172{
3173 IrInstGenBswap *instruction = ir_build_inst_gen<IrInstGenBswap>(&ira->new_irb,
3174 source_instr->scope, source_instr->source_node);
3175 instruction->base.value->type = op_type;
3176 instruction->op = op;
3177
3178 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3179
3180 return &instruction->base;
3181}
3182
3183static IrInstSrc *ir_build_bit_reverse(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type,
3184 IrInstSrc *op)
3185{
3186 IrInstSrcBitReverse *instruction = ir_build_instruction<IrInstSrcBitReverse>(irb, scope, source_node);
25393187 instruction->type = type;
25403188 instruction->op = op;
25413189
2542 if (type != nullptr) ir_ref_instruction(type, irb->current_basic_block);
3190 ir_ref_instruction(type, irb->current_basic_block);
25433191 ir_ref_instruction(op, irb->current_basic_block);
25443192
25453193 return &instruction->base;
25463194}
25473195
2548static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target_value,
2549 IrBasicBlock *else_block, size_t case_count, IrInstructionSwitchBrCase *cases, IrInstruction *is_comptime,
2550 IrInstruction *switch_prongs_void)
3196static IrInstGen *ir_build_bit_reverse_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *int_type,
3197 IrInstGen *op)
3198{
3199 IrInstGenBitReverse *instruction = ir_build_inst_gen<IrInstGenBitReverse>(&ira->new_irb,
3200 source_instr->scope, source_instr->source_node);
3201 instruction->base.value->type = int_type;
3202 instruction->op = op;
3203
3204 ir_ref_inst_gen(op, ira->new_irb.current_basic_block);
3205
3206 return &instruction->base;
3207}
3208
3209static IrInstSrcSwitchBr *ir_build_switch_br_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3210 IrInstSrc *target_value, IrBasicBlockSrc *else_block, size_t case_count, IrInstSrcSwitchBrCase *cases,
3211 IrInstSrc *is_comptime, IrInstSrc *switch_prongs_void)
25513212{
2552 IrInstructionSwitchBr *instruction = ir_build_instruction<IrInstructionSwitchBr>(irb, scope, source_node);
2553 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
2554 instruction->base.value->special = ConstValSpecialStatic;
3213 IrInstSrcSwitchBr *instruction = ir_build_instruction<IrInstSrcSwitchBr>(irb, scope, source_node);
3214 instruction->base.is_noreturn = true;
25553215 instruction->target_value = target_value;
25563216 instruction->else_block = else_block;
25573217 instruction->case_count = case_count;
......@@ -2560,9 +3220,9 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
25603220 instruction->switch_prongs_void = switch_prongs_void;
25613221
25623222 ir_ref_instruction(target_value, irb->current_basic_block);
2563 if (is_comptime) ir_ref_instruction(is_comptime, irb->current_basic_block);
3223 ir_ref_instruction(is_comptime, irb->current_basic_block);
25643224 ir_ref_bb(else_block);
2565 if (switch_prongs_void) ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
3225 ir_ref_instruction(switch_prongs_void, irb->current_basic_block);
25663226
25673227 for (size_t i = 0; i < case_count; i += 1) {
25683228 ir_ref_instruction(cases[i].value, irb->current_basic_block);
......@@ -2572,10 +3232,31 @@ static IrInstructionSwitchBr *ir_build_switch_br(IrBuilder *irb, Scope *scope, A
25723232 return instruction;
25733233}
25743234
2575static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNode *source_node,
2576 IrInstruction *target_value_ptr)
3235static IrInstGenSwitchBr *ir_build_switch_br_gen(IrAnalyze *ira, IrInst *source_instr,
3236 IrInstGen *target_value, IrBasicBlockGen *else_block, size_t case_count, IrInstGenSwitchBrCase *cases)
3237{
3238 IrInstGenSwitchBr *instruction = ir_build_inst_noreturn<IrInstGenSwitchBr>(&ira->new_irb,
3239 source_instr->scope, source_instr->source_node);
3240 instruction->target_value = target_value;
3241 instruction->else_block = else_block;
3242 instruction->case_count = case_count;
3243 instruction->cases = cases;
3244
3245 ir_ref_inst_gen(target_value, ira->new_irb.current_basic_block);
3246 ir_ref_bb_gen(else_block);
3247
3248 for (size_t i = 0; i < case_count; i += 1) {
3249 ir_ref_inst_gen(cases[i].value, ira->new_irb.current_basic_block);
3250 ir_ref_bb_gen(cases[i].block);
3251 }
3252
3253 return instruction;
3254}
3255
3256static IrInstSrc *ir_build_switch_target(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3257 IrInstSrc *target_value_ptr)
25773258{
2578 IrInstructionSwitchTarget *instruction = ir_build_instruction<IrInstructionSwitchTarget>(irb, scope, source_node);
3259 IrInstSrcSwitchTarget *instruction = ir_build_instruction<IrInstSrcSwitchTarget>(irb, scope, source_node);
25793260 instruction->target_value_ptr = target_value_ptr;
25803261
25813262 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
......@@ -2583,10 +3264,10 @@ static IrInstruction *ir_build_switch_target(IrBuilder *irb, Scope *scope, AstNo
25833264 return &instruction->base;
25843265}
25853266
2586static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
2587 IrInstruction *target_value_ptr, IrInstruction **prongs_ptr, size_t prongs_len)
3267static IrInstSrc *ir_build_switch_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3268 IrInstSrc *target_value_ptr, IrInstSrc **prongs_ptr, size_t prongs_len)
25883269{
2589 IrInstructionSwitchVar *instruction = ir_build_instruction<IrInstructionSwitchVar>(irb, scope, source_node);
3270 IrInstSrcSwitchVar *instruction = ir_build_instruction<IrInstSrcSwitchVar>(irb, scope, source_node);
25903271 instruction->target_value_ptr = target_value_ptr;
25913272 instruction->prongs_ptr = prongs_ptr;
25923273 instruction->prongs_len = prongs_len;
......@@ -2600,10 +3281,10 @@ static IrInstruction *ir_build_switch_var(IrBuilder *irb, Scope *scope, AstNode
26003281}
26013282
26023283// For this instruction the switch_br must be set later.
2603static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scope *scope, AstNode *source_node,
2604 IrInstruction *target_value_ptr)
3284static IrInstSrcSwitchElseVar *ir_build_switch_else_var(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3285 IrInstSrc *target_value_ptr)
26053286{
2606 IrInstructionSwitchElseVar *instruction = ir_build_instruction<IrInstructionSwitchElseVar>(irb, scope, source_node);
3287 IrInstSrcSwitchElseVar *instruction = ir_build_instruction<IrInstSrcSwitchElseVar>(irb, scope, source_node);
26073288 instruction->target_value_ptr = target_value_ptr;
26083289
26093290 ir_ref_instruction(target_value_ptr, irb->current_basic_block);
......@@ -2611,17 +3292,21 @@ static IrInstructionSwitchElseVar *ir_build_switch_else_var(IrBuilder *irb, Scop
26113292 return instruction;
26123293}
26133294
2614static IrInstruction *ir_build_union_tag(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2615 IrInstructionUnionTag *instruction = ir_build_instruction<IrInstructionUnionTag>(irb, scope, source_node);
3295static IrInstGen *ir_build_union_tag(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
3296 ZigType *tag_type)
3297{
3298 IrInstGenUnionTag *instruction = ir_build_inst_gen<IrInstGenUnionTag>(&ira->new_irb,
3299 source_instr->scope, source_instr->source_node);
26163300 instruction->value = value;
3301 instruction->base.value->type = tag_type;
26173302
2618 ir_ref_instruction(value, irb->current_basic_block);
3303 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
26193304
26203305 return &instruction->base;
26213306}
26223307
2623static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2624 IrInstructionImport *instruction = ir_build_instruction<IrInstructionImport>(irb, scope, source_node);
3308static IrInstSrc *ir_build_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3309 IrInstSrcImport *instruction = ir_build_instruction<IrInstSrcImport>(irb, scope, source_node);
26253310 instruction->name = name;
26263311
26273312 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2629,10 +3314,10 @@ static IrInstruction *ir_build_import(IrBuilder *irb, Scope *scope, AstNode *sou
26293314 return &instruction->base;
26303315}
26313316
2632static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value,
3317static IrInstSrc *ir_build_ref_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value,
26333318 bool is_const, bool is_volatile)
26343319{
2635 IrInstructionRef *instruction = ir_build_instruction<IrInstructionRef>(irb, scope, source_node);
3320 IrInstSrcRef *instruction = ir_build_instruction<IrInstSrcRef>(irb, scope, source_node);
26363321 instruction->value = value;
26373322 instruction->is_const = is_const;
26383323 instruction->is_volatile = is_volatile;
......@@ -2642,23 +3327,23 @@ static IrInstruction *ir_build_ref(IrBuilder *irb, Scope *scope, AstNode *source
26423327 return &instruction->base;
26433328}
26443329
2645static IrInstruction *ir_build_ref_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
2646 IrInstruction *operand, IrInstruction *result_loc)
3330static IrInstGen *ir_build_ref_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3331 IrInstGen *operand, IrInstGen *result_loc)
26473332{
2648 IrInstructionRefGen *instruction = ir_build_instruction<IrInstructionRefGen>(&ira->new_irb,
3333 IrInstGenRef *instruction = ir_build_inst_gen<IrInstGenRef>(&ira->new_irb,
26493334 source_instruction->scope, source_instruction->source_node);
26503335 instruction->base.value->type = result_type;
26513336 instruction->operand = operand;
26523337 instruction->result_loc = result_loc;
26533338
2654 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
2655 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3339 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
3340 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
26563341
26573342 return &instruction->base;
26583343}
26593344
2660static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
2661 IrInstructionCompileErr *instruction = ir_build_instruction<IrInstructionCompileErr>(irb, scope, source_node);
3345static IrInstSrc *ir_build_compile_err(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
3346 IrInstSrcCompileErr *instruction = ir_build_instruction<IrInstSrcCompileErr>(irb, scope, source_node);
26623347 instruction->msg = msg;
26633348
26643349 ir_ref_instruction(msg, irb->current_basic_block);
......@@ -2666,10 +3351,10 @@ static IrInstruction *ir_build_compile_err(IrBuilder *irb, Scope *scope, AstNode
26663351 return &instruction->base;
26673352}
26683353
2669static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode *source_node,
2670 size_t msg_count, IrInstruction **msg_list)
3354static IrInstSrc *ir_build_compile_log(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3355 size_t msg_count, IrInstSrc **msg_list)
26713356{
2672 IrInstructionCompileLog *instruction = ir_build_instruction<IrInstructionCompileLog>(irb, scope, source_node);
3357 IrInstSrcCompileLog *instruction = ir_build_instruction<IrInstSrcCompileLog>(irb, scope, source_node);
26733358 instruction->msg_count = msg_count;
26743359 instruction->msg_list = msg_list;
26753360
......@@ -2680,8 +3365,8 @@ static IrInstruction *ir_build_compile_log(IrBuilder *irb, Scope *scope, AstNode
26803365 return &instruction->base;
26813366}
26823367
2683static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2684 IrInstructionErrName *instruction = ir_build_instruction<IrInstructionErrName>(irb, scope, source_node);
3368static IrInstSrc *ir_build_err_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3369 IrInstSrcErrName *instruction = ir_build_instruction<IrInstSrcErrName>(irb, scope, source_node);
26853370 instruction->value = value;
26863371
26873372 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2689,13 +3374,26 @@ static IrInstruction *ir_build_err_name(IrBuilder *irb, Scope *scope, AstNode *s
26893374 return &instruction->base;
26903375}
26913376
2692static IrInstruction *ir_build_c_import(IrBuilder *irb, Scope *scope, AstNode *source_node) {
2693 IrInstructionCImport *instruction = ir_build_instruction<IrInstructionCImport>(irb, scope, source_node);
3377static IrInstGen *ir_build_err_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
3378 ZigType *str_type)
3379{
3380 IrInstGenErrName *instruction = ir_build_inst_gen<IrInstGenErrName>(&ira->new_irb,
3381 source_instr->scope, source_instr->source_node);
3382 instruction->base.value->type = str_type;
3383 instruction->value = value;
3384
3385 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3386
26943387 return &instruction->base;
26953388}
26963389
2697static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2698 IrInstructionCInclude *instruction = ir_build_instruction<IrInstructionCInclude>(irb, scope, source_node);
3390static IrInstSrc *ir_build_c_import(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3391 IrInstSrcCImport *instruction = ir_build_instruction<IrInstSrcCImport>(irb, scope, source_node);
3392 return &instruction->base;
3393}
3394
3395static IrInstSrc *ir_build_c_include(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3396 IrInstSrcCInclude *instruction = ir_build_instruction<IrInstSrcCInclude>(irb, scope, source_node);
26993397 instruction->name = name;
27003398
27013399 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2703,8 +3401,8 @@ static IrInstruction *ir_build_c_include(IrBuilder *irb, Scope *scope, AstNode *
27033401 return &instruction->base;
27043402}
27053403
2706static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name, IrInstruction *value) {
2707 IrInstructionCDefine *instruction = ir_build_instruction<IrInstructionCDefine>(irb, scope, source_node);
3404static IrInstSrc *ir_build_c_define(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name, IrInstSrc *value) {
3405 IrInstSrcCDefine *instruction = ir_build_instruction<IrInstSrcCDefine>(irb, scope, source_node);
27083406 instruction->name = name;
27093407 instruction->value = value;
27103408
......@@ -2714,8 +3412,8 @@ static IrInstruction *ir_build_c_define(IrBuilder *irb, Scope *scope, AstNode *s
27143412 return &instruction->base;
27153413}
27163414
2717static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2718 IrInstructionCUndef *instruction = ir_build_instruction<IrInstructionCUndef>(irb, scope, source_node);
3415static IrInstSrc *ir_build_c_undef(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3416 IrInstSrcCUndef *instruction = ir_build_instruction<IrInstSrcCUndef>(irb, scope, source_node);
27193417 instruction->name = name;
27203418
27213419 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2723,8 +3421,8 @@ static IrInstruction *ir_build_c_undef(IrBuilder *irb, Scope *scope, AstNode *so
27233421 return &instruction->base;
27243422}
27253423
2726static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *name) {
2727 IrInstructionEmbedFile *instruction = ir_build_instruction<IrInstructionEmbedFile>(irb, scope, source_node);
3424static IrInstSrc *ir_build_embed_file(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *name) {
3425 IrInstSrcEmbedFile *instruction = ir_build_instruction<IrInstSrcEmbedFile>(irb, scope, source_node);
27283426 instruction->name = name;
27293427
27303428 ir_ref_instruction(name, irb->current_basic_block);
......@@ -2732,11 +3430,11 @@ static IrInstruction *ir_build_embed_file(IrBuilder *irb, Scope *scope, AstNode
27323430 return &instruction->base;
27333431}
27343432
2735static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2736 IrInstruction *type_value, IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
2737 IrInstruction *success_order_value, IrInstruction *failure_order_value, bool is_weak, ResultLoc *result_loc)
3433static IrInstSrc *ir_build_cmpxchg_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3434 IrInstSrc *type_value, IrInstSrc *ptr, IrInstSrc *cmp_value, IrInstSrc *new_value,
3435 IrInstSrc *success_order_value, IrInstSrc *failure_order_value, bool is_weak, ResultLoc *result_loc)
27383436{
2739 IrInstructionCmpxchgSrc *instruction = ir_build_instruction<IrInstructionCmpxchgSrc>(irb, scope, source_node);
3437 IrInstSrcCmpxchg *instruction = ir_build_instruction<IrInstSrcCmpxchg>(irb, scope, source_node);
27403438 instruction->type_value = type_value;
27413439 instruction->ptr = ptr;
27423440 instruction->cmp_value = cmp_value;
......@@ -2756,11 +3454,11 @@ static IrInstruction *ir_build_cmpxchg_src(IrBuilder *irb, Scope *scope, AstNode
27563454 return &instruction->base;
27573455}
27583456
2759static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
2760 IrInstruction *ptr, IrInstruction *cmp_value, IrInstruction *new_value,
2761 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstruction *result_loc)
3457static IrInstGen *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3458 IrInstGen *ptr, IrInstGen *cmp_value, IrInstGen *new_value,
3459 AtomicOrder success_order, AtomicOrder failure_order, bool is_weak, IrInstGen *result_loc)
27623460{
2763 IrInstructionCmpxchgGen *instruction = ir_build_instruction<IrInstructionCmpxchgGen>(&ira->new_irb,
3461 IrInstGenCmpxchg *instruction = ir_build_inst_gen<IrInstGenCmpxchg>(&ira->new_irb,
27643462 source_instruction->scope, source_instruction->source_node);
27653463 instruction->base.value->type = result_type;
27663464 instruction->ptr = ptr;
......@@ -2771,26 +3469,35 @@ static IrInstruction *ir_build_cmpxchg_gen(IrAnalyze *ira, IrInstruction *source
27713469 instruction->is_weak = is_weak;
27723470 instruction->result_loc = result_loc;
27733471
2774 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
2775 ir_ref_instruction(cmp_value, ira->new_irb.current_basic_block);
2776 ir_ref_instruction(new_value, ira->new_irb.current_basic_block);
2777 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3472 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3473 ir_ref_inst_gen(cmp_value, ira->new_irb.current_basic_block);
3474 ir_ref_inst_gen(new_value, ira->new_irb.current_basic_block);
3475 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
27783476
27793477 return &instruction->base;
27803478}
27813479
2782static IrInstruction *ir_build_fence(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *order_value, AtomicOrder order) {
2783 IrInstructionFence *instruction = ir_build_instruction<IrInstructionFence>(irb, scope, source_node);
2784 instruction->order_value = order_value;
3480static IrInstSrc *ir_build_fence(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *order) {
3481 IrInstSrcFence *instruction = ir_build_instruction<IrInstSrcFence>(irb, scope, source_node);
27853482 instruction->order = order;
27863483
2787 ir_ref_instruction(order_value, irb->current_basic_block);
3484 ir_ref_instruction(order, irb->current_basic_block);
3485
3486 return &instruction->base;
3487}
3488
3489static IrInstGen *ir_build_fence_gen(IrAnalyze *ira, IrInst *source_instr, AtomicOrder order) {
3490 IrInstGenFence *instruction = ir_build_inst_void<IrInstGenFence>(&ira->new_irb,
3491 source_instr->scope, source_instr->source_node);
3492 instruction->order = order;
27883493
27893494 return &instruction->base;
27903495}
27913496
2792static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2793 IrInstructionTruncate *instruction = ir_build_instruction<IrInstructionTruncate>(irb, scope, source_node);
3497static IrInstSrc *ir_build_truncate(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3498 IrInstSrc *dest_type, IrInstSrc *target)
3499{
3500 IrInstSrcTruncate *instruction = ir_build_instruction<IrInstSrcTruncate>(irb, scope, source_node);
27943501 instruction->dest_type = dest_type;
27953502 instruction->target = target;
27963503
......@@ -2800,8 +3507,23 @@ static IrInstruction *ir_build_truncate(IrBuilder *irb, Scope *scope, AstNode *s
28003507 return &instruction->base;
28013508}
28023509
2803static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2804 IrInstructionIntCast *instruction = ir_build_instruction<IrInstructionIntCast>(irb, scope, source_node);
3510static IrInstGen *ir_build_truncate_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *dest_type,
3511 IrInstGen *target)
3512{
3513 IrInstGenTruncate *instruction = ir_build_inst_gen<IrInstGenTruncate>(&ira->new_irb,
3514 source_instr->scope, source_instr->source_node);
3515 instruction->base.value->type = dest_type;
3516 instruction->target = target;
3517
3518 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
3519
3520 return &instruction->base;
3521}
3522
3523static IrInstSrc *ir_build_int_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
3524 IrInstSrc *target)
3525{
3526 IrInstSrcIntCast *instruction = ir_build_instruction<IrInstSrcIntCast>(irb, scope, source_node);
28053527 instruction->dest_type = dest_type;
28063528 instruction->target = target;
28073529
......@@ -2811,8 +3533,10 @@ static IrInstruction *ir_build_int_cast(IrBuilder *irb, Scope *scope, AstNode *s
28113533 return &instruction->base;
28123534}
28133535
2814static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2815 IrInstructionFloatCast *instruction = ir_build_instruction<IrInstructionFloatCast>(irb, scope, source_node);
3536static IrInstSrc *ir_build_float_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *dest_type,
3537 IrInstSrc *target)
3538{
3539 IrInstSrcFloatCast *instruction = ir_build_instruction<IrInstSrcFloatCast>(irb, scope, source_node);
28163540 instruction->dest_type = dest_type;
28173541 instruction->target = target;
28183542
......@@ -2822,8 +3546,10 @@ static IrInstruction *ir_build_float_cast(IrBuilder *irb, Scope *scope, AstNode
28223546 return &instruction->base;
28233547}
28243548
2825static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2826 IrInstructionErrSetCast *instruction = ir_build_instruction<IrInstructionErrSetCast>(irb, scope, source_node);
3549static IrInstSrc *ir_build_err_set_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3550 IrInstSrc *dest_type, IrInstSrc *target)
3551{
3552 IrInstSrcErrSetCast *instruction = ir_build_instruction<IrInstSrcErrSetCast>(irb, scope, source_node);
28273553 instruction->dest_type = dest_type;
28283554 instruction->target = target;
28293555
......@@ -2833,10 +3559,10 @@ static IrInstruction *ir_build_err_set_cast(IrBuilder *irb, Scope *scope, AstNod
28333559 return &instruction->base;
28343560}
28353561
2836static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target,
3562static IrInstSrc *ir_build_to_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target,
28373563 ResultLoc *result_loc)
28383564{
2839 IrInstructionToBytes *instruction = ir_build_instruction<IrInstructionToBytes>(irb, scope, source_node);
3565 IrInstSrcToBytes *instruction = ir_build_instruction<IrInstSrcToBytes>(irb, scope, source_node);
28403566 instruction->target = target;
28413567 instruction->result_loc = result_loc;
28423568
......@@ -2845,10 +3571,10 @@ static IrInstruction *ir_build_to_bytes(IrBuilder *irb, Scope *scope, AstNode *s
28453571 return &instruction->base;
28463572}
28473573
2848static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode *source_node,
2849 IrInstruction *dest_child_type, IrInstruction *target, ResultLoc *result_loc)
3574static IrInstSrc *ir_build_from_bytes(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3575 IrInstSrc *dest_child_type, IrInstSrc *target, ResultLoc *result_loc)
28503576{
2851 IrInstructionFromBytes *instruction = ir_build_instruction<IrInstructionFromBytes>(irb, scope, source_node);
3577 IrInstSrcFromBytes *instruction = ir_build_instruction<IrInstSrcFromBytes>(irb, scope, source_node);
28523578 instruction->dest_child_type = dest_child_type;
28533579 instruction->target = target;
28543580 instruction->result_loc = result_loc;
......@@ -2859,8 +3585,10 @@ static IrInstruction *ir_build_from_bytes(IrBuilder *irb, Scope *scope, AstNode
28593585 return &instruction->base;
28603586}
28613587
2862static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2863 IrInstructionIntToFloat *instruction = ir_build_instruction<IrInstructionIntToFloat>(irb, scope, source_node);
3588static IrInstSrc *ir_build_int_to_float(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3589 IrInstSrc *dest_type, IrInstSrc *target)
3590{
3591 IrInstSrcIntToFloat *instruction = ir_build_instruction<IrInstSrcIntToFloat>(irb, scope, source_node);
28643592 instruction->dest_type = dest_type;
28653593 instruction->target = target;
28663594
......@@ -2870,8 +3598,10 @@ static IrInstruction *ir_build_int_to_float(IrBuilder *irb, Scope *scope, AstNod
28703598 return &instruction->base;
28713599}
28723600
2873static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *dest_type, IrInstruction *target) {
2874 IrInstructionFloatToInt *instruction = ir_build_instruction<IrInstructionFloatToInt>(irb, scope, source_node);
3601static IrInstSrc *ir_build_float_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3602 IrInstSrc *dest_type, IrInstSrc *target)
3603{
3604 IrInstSrcFloatToInt *instruction = ir_build_instruction<IrInstSrcFloatToInt>(irb, scope, source_node);
28753605 instruction->dest_type = dest_type;
28763606 instruction->target = target;
28773607
......@@ -2881,8 +3611,8 @@ static IrInstruction *ir_build_float_to_int(IrBuilder *irb, Scope *scope, AstNod
28813611 return &instruction->base;
28823612}
28833613
2884static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *target) {
2885 IrInstructionBoolToInt *instruction = ir_build_instruction<IrInstructionBoolToInt>(irb, scope, source_node);
3614static IrInstSrc *ir_build_bool_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
3615 IrInstSrcBoolToInt *instruction = ir_build_instruction<IrInstSrcBoolToInt>(irb, scope, source_node);
28863616 instruction->target = target;
28873617
28883618 ir_ref_instruction(target, irb->current_basic_block);
......@@ -2890,8 +3620,10 @@ static IrInstruction *ir_build_bool_to_int(IrBuilder *irb, Scope *scope, AstNode
28903620 return &instruction->base;
28913621}
28923622
2893static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *is_signed, IrInstruction *bit_count) {
2894 IrInstructionIntType *instruction = ir_build_instruction<IrInstructionIntType>(irb, scope, source_node);
3623static IrInstSrc *ir_build_int_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *is_signed,
3624 IrInstSrc *bit_count)
3625{
3626 IrInstSrcIntType *instruction = ir_build_instruction<IrInstSrcIntType>(irb, scope, source_node);
28953627 instruction->is_signed = is_signed;
28963628 instruction->bit_count = bit_count;
28973629
......@@ -2901,10 +3633,10 @@ static IrInstruction *ir_build_int_type(IrBuilder *irb, Scope *scope, AstNode *s
29013633 return &instruction->base;
29023634}
29033635
2904static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *len,
2905 IrInstruction *elem_type)
3636static IrInstSrc *ir_build_vector_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *len,
3637 IrInstSrc *elem_type)
29063638{
2907 IrInstructionVectorType *instruction = ir_build_instruction<IrInstructionVectorType>(irb, scope, source_node);
3639 IrInstSrcVectorType *instruction = ir_build_instruction<IrInstSrcVectorType>(irb, scope, source_node);
29083640 instruction->len = len;
29093641 instruction->elem_type = elem_type;
29103642
......@@ -2914,18 +3646,16 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode
29143646 return &instruction->base;
29153647}
29163648
2917static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstNode *source_node,
2918 IrInstruction *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
3649static IrInstSrc *ir_build_shuffle_vector(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3650 IrInstSrc *scalar_type, IrInstSrc *a, IrInstSrc *b, IrInstSrc *mask)
29193651{
2920 IrInstructionShuffleVector *instruction = ir_build_instruction<IrInstructionShuffleVector>(irb, scope, source_node);
3652 IrInstSrcShuffleVector *instruction = ir_build_instruction<IrInstSrcShuffleVector>(irb, scope, source_node);
29213653 instruction->scalar_type = scalar_type;
29223654 instruction->a = a;
29233655 instruction->b = b;
29243656 instruction->mask = mask;
29253657
2926 if (scalar_type != nullptr) {
2927 ir_ref_instruction(scalar_type, irb->current_basic_block);
2928 }
3658 if (scalar_type != nullptr) ir_ref_instruction(scalar_type, irb->current_basic_block);
29293659 ir_ref_instruction(a, irb->current_basic_block);
29303660 ir_ref_instruction(b, irb->current_basic_block);
29313661 ir_ref_instruction(mask, irb->current_basic_block);
......@@ -2933,10 +3663,26 @@ static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstN
29333663 return &instruction->base;
29343664}
29353665
2936static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2937 IrInstruction *len, IrInstruction *scalar)
3666static IrInstGen *ir_build_shuffle_vector_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
3667 ZigType *result_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
3668{
3669 IrInstGenShuffleVector *inst = ir_build_inst_gen<IrInstGenShuffleVector>(&ira->new_irb, scope, source_node);
3670 inst->base.value->type = result_type;
3671 inst->a = a;
3672 inst->b = b;
3673 inst->mask = mask;
3674
3675 ir_ref_inst_gen(a, ira->new_irb.current_basic_block);
3676 ir_ref_inst_gen(b, ira->new_irb.current_basic_block);
3677 ir_ref_inst_gen(mask, ira->new_irb.current_basic_block);
3678
3679 return &inst->base;
3680}
3681
3682static IrInstSrc *ir_build_splat_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3683 IrInstSrc *len, IrInstSrc *scalar)
29383684{
2939 IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);
3685 IrInstSrcSplat *instruction = ir_build_instruction<IrInstSrcSplat>(irb, scope, source_node);
29403686 instruction->len = len;
29413687 instruction->scalar = scalar;
29423688
......@@ -2946,8 +3692,21 @@ static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *
29463692 return &instruction->base;
29473693}
29483694
2949static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
2950 IrInstructionBoolNot *instruction = ir_build_instruction<IrInstructionBoolNot>(irb, scope, source_node);
3695static IrInstGen *ir_build_splat_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *result_type,
3696 IrInstGen *scalar)
3697{
3698 IrInstGenSplat *instruction = ir_build_inst_gen<IrInstGenSplat>(
3699 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3700 instruction->base.value->type = result_type;
3701 instruction->scalar = scalar;
3702
3703 ir_ref_inst_gen(scalar, ira->new_irb.current_basic_block);
3704
3705 return &instruction->base;
3706}
3707
3708static IrInstSrc *ir_build_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
3709 IrInstSrcBoolNot *instruction = ir_build_instruction<IrInstSrcBoolNot>(irb, scope, source_node);
29513710 instruction->value = value;
29523711
29533712 ir_ref_instruction(value, irb->current_basic_block);
......@@ -2955,10 +3714,21 @@ static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *s
29553714 return &instruction->base;
29563715}
29573716
2958static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *source_node,
2959 IrInstruction *dest_ptr, IrInstruction *byte, IrInstruction *count)
3717static IrInstGen *ir_build_bool_not_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value) {
3718 IrInstGenBoolNot *instruction = ir_build_inst_gen<IrInstGenBoolNot>(&ira->new_irb,
3719 source_instr->scope, source_instr->source_node);
3720 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3721 instruction->value = value;
3722
3723 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
3724
3725 return &instruction->base;
3726}
3727
3728static IrInstSrc *ir_build_memset_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3729 IrInstSrc *dest_ptr, IrInstSrc *byte, IrInstSrc *count)
29603730{
2961 IrInstructionMemset *instruction = ir_build_instruction<IrInstructionMemset>(irb, scope, source_node);
3731 IrInstSrcMemset *instruction = ir_build_instruction<IrInstSrcMemset>(irb, scope, source_node);
29623732 instruction->dest_ptr = dest_ptr;
29633733 instruction->byte = byte;
29643734 instruction->count = count;
......@@ -2970,10 +3740,26 @@ static IrInstruction *ir_build_memset(IrBuilder *irb, Scope *scope, AstNode *sou
29703740 return &instruction->base;
29713741}
29723742
2973static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *source_node,
2974 IrInstruction *dest_ptr, IrInstruction *src_ptr, IrInstruction *count)
3743static IrInstGen *ir_build_memset_gen(IrAnalyze *ira, IrInst *source_instr,
3744 IrInstGen *dest_ptr, IrInstGen *byte, IrInstGen *count)
3745{
3746 IrInstGenMemset *instruction = ir_build_inst_void<IrInstGenMemset>(&ira->new_irb,
3747 source_instr->scope, source_instr->source_node);
3748 instruction->dest_ptr = dest_ptr;
3749 instruction->byte = byte;
3750 instruction->count = count;
3751
3752 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3753 ir_ref_inst_gen(byte, ira->new_irb.current_basic_block);
3754 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3755
3756 return &instruction->base;
3757}
3758
3759static IrInstSrc *ir_build_memcpy_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3760 IrInstSrc *dest_ptr, IrInstSrc *src_ptr, IrInstSrc *count)
29753761{
2976 IrInstructionMemcpy *instruction = ir_build_instruction<IrInstructionMemcpy>(irb, scope, source_node);
3762 IrInstSrcMemcpy *instruction = ir_build_instruction<IrInstSrcMemcpy>(irb, scope, source_node);
29773763 instruction->dest_ptr = dest_ptr;
29783764 instruction->src_ptr = src_ptr;
29793765 instruction->count = count;
......@@ -2985,11 +3771,27 @@ static IrInstruction *ir_build_memcpy(IrBuilder *irb, Scope *scope, AstNode *sou
29853771 return &instruction->base;
29863772}
29873773
2988static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
2989 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, IrInstruction *sentinel,
3774static IrInstGen *ir_build_memcpy_gen(IrAnalyze *ira, IrInst *source_instr,
3775 IrInstGen *dest_ptr, IrInstGen *src_ptr, IrInstGen *count)
3776{
3777 IrInstGenMemcpy *instruction = ir_build_inst_void<IrInstGenMemcpy>(&ira->new_irb,
3778 source_instr->scope, source_instr->source_node);
3779 instruction->dest_ptr = dest_ptr;
3780 instruction->src_ptr = src_ptr;
3781 instruction->count = count;
3782
3783 ir_ref_inst_gen(dest_ptr, ira->new_irb.current_basic_block);
3784 ir_ref_inst_gen(src_ptr, ira->new_irb.current_basic_block);
3785 ir_ref_inst_gen(count, ira->new_irb.current_basic_block);
3786
3787 return &instruction->base;
3788}
3789
3790static IrInstSrc *ir_build_slice_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3791 IrInstSrc *ptr, IrInstSrc *start, IrInstSrc *end, IrInstSrc *sentinel,
29903792 bool safety_check_on, ResultLoc *result_loc)
29913793{
2992 IrInstructionSliceSrc *instruction = ir_build_instruction<IrInstructionSliceSrc>(irb, scope, source_node);
3794 IrInstSrcSlice *instruction = ir_build_instruction<IrInstSrcSlice>(irb, scope, source_node);
29933795 instruction->ptr = ptr;
29943796 instruction->start = start;
29953797 instruction->end = end;
......@@ -3005,23 +3807,10 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
30053807 return &instruction->base;
30063808}
30073809
3008static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
3009 IrInstruction *scalar)
3010{
3011 IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
3012 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3013 instruction->base.value->type = result_type;
3014 instruction->scalar = scalar;
3015
3016 ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
3017
3018 return &instruction->base;
3019}
3020
3021static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
3022 IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
3810static IrInstGen *ir_build_slice_gen(IrAnalyze *ira, IrInst *source_instruction, ZigType *slice_type,
3811 IrInstGen *ptr, IrInstGen *start, IrInstGen *end, bool safety_check_on, IrInstGen *result_loc)
30233812{
3024 IrInstructionSliceGen *instruction = ir_build_instruction<IrInstructionSliceGen>(
3813 IrInstGenSlice *instruction = ir_build_inst_gen<IrInstGenSlice>(
30253814 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
30263815 instruction->base.value->type = slice_type;
30273816 instruction->ptr = ptr;
......@@ -3030,16 +3819,16 @@ static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_i
30303819 instruction->safety_check_on = safety_check_on;
30313820 instruction->result_loc = result_loc;
30323821
3033 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3034 ir_ref_instruction(start, ira->new_irb.current_basic_block);
3035 if (end) ir_ref_instruction(end, ira->new_irb.current_basic_block);
3036 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
3822 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
3823 ir_ref_inst_gen(start, ira->new_irb.current_basic_block);
3824 if (end) ir_ref_inst_gen(end, ira->new_irb.current_basic_block);
3825 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
30373826
30383827 return &instruction->base;
30393828}
30403829
3041static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *container) {
3042 IrInstructionMemberCount *instruction = ir_build_instruction<IrInstructionMemberCount>(irb, scope, source_node);
3830static IrInstSrc *ir_build_member_count(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *container) {
3831 IrInstSrcMemberCount *instruction = ir_build_instruction<IrInstSrcMemberCount>(irb, scope, source_node);
30433832 instruction->container = container;
30443833
30453834 ir_ref_instruction(container, irb->current_basic_block);
......@@ -3047,10 +3836,10 @@ static IrInstruction *ir_build_member_count(IrBuilder *irb, Scope *scope, AstNod
30473836 return &instruction->base;
30483837}
30493838
3050static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3051 IrInstruction *container_type, IrInstruction *member_index)
3839static IrInstSrc *ir_build_member_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3840 IrInstSrc *container_type, IrInstSrc *member_index)
30523841{
3053 IrInstructionMemberType *instruction = ir_build_instruction<IrInstructionMemberType>(irb, scope, source_node);
3842 IrInstSrcMemberType *instruction = ir_build_instruction<IrInstSrcMemberType>(irb, scope, source_node);
30543843 instruction->container_type = container_type;
30553844 instruction->member_index = member_index;
30563845
......@@ -3060,10 +3849,10 @@ static IrInstruction *ir_build_member_type(IrBuilder *irb, Scope *scope, AstNode
30603849 return &instruction->base;
30613850}
30623851
3063static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3064 IrInstruction *container_type, IrInstruction *member_index)
3852static IrInstSrc *ir_build_member_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3853 IrInstSrc *container_type, IrInstSrc *member_index)
30653854{
3066 IrInstructionMemberName *instruction = ir_build_instruction<IrInstructionMemberName>(irb, scope, source_node);
3855 IrInstSrcMemberName *instruction = ir_build_instruction<IrInstSrcMemberName>(irb, scope, source_node);
30673856 instruction->container_type = container_type;
30683857 instruction->member_index = member_index;
30693858
......@@ -3073,65 +3862,88 @@ static IrInstruction *ir_build_member_name(IrBuilder *irb, Scope *scope, AstNode
30733862 return &instruction->base;
30743863}
30753864
3076static IrInstruction *ir_build_breakpoint(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3077 IrInstructionBreakpoint *instruction = ir_build_instruction<IrInstructionBreakpoint>(irb, scope, source_node);
3865static IrInstSrc *ir_build_breakpoint(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3866 IrInstSrcBreakpoint *instruction = ir_build_instruction<IrInstSrcBreakpoint>(irb, scope, source_node);
30783867 return &instruction->base;
30793868}
30803869
3081static IrInstruction *ir_build_return_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3082 IrInstructionReturnAddress *instruction = ir_build_instruction<IrInstructionReturnAddress>(irb, scope, source_node);
3870static IrInstGen *ir_build_breakpoint_gen(IrAnalyze *ira, IrInst *source_instr) {
3871 IrInstGenBreakpoint *instruction = ir_build_inst_void<IrInstGenBreakpoint>(&ira->new_irb,
3872 source_instr->scope, source_instr->source_node);
30833873 return &instruction->base;
30843874}
30853875
3086static IrInstruction *ir_build_frame_address(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3087 IrInstructionFrameAddress *instruction = ir_build_instruction<IrInstructionFrameAddress>(irb, scope, source_node);
3876static IrInstSrc *ir_build_return_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3877 IrInstSrcReturnAddress *instruction = ir_build_instruction<IrInstSrcReturnAddress>(irb, scope, source_node);
30883878 return &instruction->base;
30893879}
30903880
3091static IrInstruction *ir_build_handle(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3092 IrInstructionFrameHandle *instruction = ir_build_instruction<IrInstructionFrameHandle>(irb, scope, source_node);
3093 return &instruction->base;
3881static IrInstGen *ir_build_return_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3882 IrInstGenReturnAddress *inst = ir_build_inst_gen<IrInstGenReturnAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3883 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3884 return &inst->base;
3885}
3886
3887static IrInstSrc *ir_build_frame_address_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3888 IrInstSrcFrameAddress *inst = ir_build_instruction<IrInstSrcFrameAddress>(irb, scope, source_node);
3889 return &inst->base;
3890}
3891
3892static IrInstGen *ir_build_frame_address_gen(IrAnalyze *ira, IrInst *source_instr) {
3893 IrInstGenFrameAddress *inst = ir_build_inst_gen<IrInstGenFrameAddress>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3894 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3895 return &inst->base;
3896}
3897
3898static IrInstSrc *ir_build_handle_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
3899 IrInstSrcFrameHandle *inst = ir_build_instruction<IrInstSrcFrameHandle>(irb, scope, source_node);
3900 return &inst->base;
3901}
3902
3903static IrInstGen *ir_build_handle_gen(IrAnalyze *ira, IrInst *source_instr, ZigType *ty) {
3904 IrInstGenFrameHandle *inst = ir_build_inst_gen<IrInstGenFrameHandle>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3905 inst->base.value->type = ty;
3906 return &inst->base;
30943907}
30953908
3096static IrInstruction *ir_build_frame_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
3097 IrInstructionFrameType *instruction = ir_build_instruction<IrInstructionFrameType>(irb, scope, source_node);
3098 instruction->fn = fn;
3909static IrInstSrc *ir_build_frame_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3910 IrInstSrcFrameType *inst = ir_build_instruction<IrInstSrcFrameType>(irb, scope, source_node);
3911 inst->fn = fn;
30993912
31003913 ir_ref_instruction(fn, irb->current_basic_block);
31013914
3102 return &instruction->base;
3915 return &inst->base;
31033916}
31043917
3105static IrInstruction *ir_build_frame_size_src(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn) {
3106 IrInstructionFrameSizeSrc *instruction = ir_build_instruction<IrInstructionFrameSizeSrc>(irb, scope, source_node);
3107 instruction->fn = fn;
3918static IrInstSrc *ir_build_frame_size_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *fn) {
3919 IrInstSrcFrameSize *inst = ir_build_instruction<IrInstSrcFrameSize>(irb, scope, source_node);
3920 inst->fn = fn;
31083921
31093922 ir_ref_instruction(fn, irb->current_basic_block);
31103923
3111 return &instruction->base;
3924 return &inst->base;
31123925}
31133926
3114static IrInstruction *ir_build_frame_size_gen(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *fn)
3927static IrInstGen *ir_build_frame_size_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *fn)
31153928{
3116 IrInstructionFrameSizeGen *instruction = ir_build_instruction<IrInstructionFrameSizeGen>(irb, scope, source_node);
3117 instruction->fn = fn;
3929 IrInstGenFrameSize *inst = ir_build_inst_gen<IrInstGenFrameSize>(&ira->new_irb, source_instr->scope, source_instr->source_node);
3930 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
3931 inst->fn = fn;
31183932
3119 ir_ref_instruction(fn, irb->current_basic_block);
3933 ir_ref_inst_gen(fn, ira->new_irb.current_basic_block);
31203934
3121 return &instruction->base;
3935 return &inst->base;
31223936}
31233937
3124static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode *source_node,
3125 IrOverflowOp op, IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2,
3126 IrInstruction *result_ptr, ZigType *result_ptr_type)
3938static IrInstSrc *ir_build_overflow_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
3939 IrOverflowOp op, IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *result_ptr)
31273940{
3128 IrInstructionOverflowOp *instruction = ir_build_instruction<IrInstructionOverflowOp>(irb, scope, source_node);
3941 IrInstSrcOverflowOp *instruction = ir_build_instruction<IrInstSrcOverflowOp>(irb, scope, source_node);
31293942 instruction->op = op;
31303943 instruction->type_value = type_value;
31313944 instruction->op1 = op1;
31323945 instruction->op2 = op2;
31333946 instruction->result_ptr = result_ptr;
3134 instruction->result_ptr_type = result_ptr_type;
31353947
31363948 ir_ref_instruction(type_value, irb->current_basic_block);
31373949 ir_ref_instruction(op1, irb->current_basic_block);
......@@ -3141,60 +3953,56 @@ static IrInstruction *ir_build_overflow_op(IrBuilder *irb, Scope *scope, AstNode
31413953 return &instruction->base;
31423954}
31433955
3956static IrInstGen *ir_build_overflow_op_gen(IrAnalyze *ira, IrInst *source_instr,
3957 IrOverflowOp op, IrInstGen *op1, IrInstGen *op2, IrInstGen *result_ptr,
3958 ZigType *result_ptr_type)
3959{
3960 IrInstGenOverflowOp *instruction = ir_build_inst_gen<IrInstGenOverflowOp>(&ira->new_irb,
3961 source_instr->scope, source_instr->source_node);
3962 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
3963 instruction->op = op;
3964 instruction->op1 = op1;
3965 instruction->op2 = op2;
3966 instruction->result_ptr = result_ptr;
3967 instruction->result_ptr_type = result_ptr_type;
31443968
3145//TODO Powi, Pow, minnum, maxnum, maximum, minimum, copysign,
3146// lround, llround, lrint, llrint
3147// So far this is only non-complicated type functions.
3148const char *float_op_to_name(BuiltinFnId op) {
3149 switch (op) {
3150 case BuiltinFnIdSqrt:
3151 return "sqrt";
3152 case BuiltinFnIdSin:
3153 return "sin";
3154 case BuiltinFnIdCos:
3155 return "cos";
3156 case BuiltinFnIdExp:
3157 return "exp";
3158 case BuiltinFnIdExp2:
3159 return "exp2";
3160 case BuiltinFnIdLog:
3161 return "log";
3162 case BuiltinFnIdLog10:
3163 return "log10";
3164 case BuiltinFnIdLog2:
3165 return "log2";
3166 case BuiltinFnIdFabs:
3167 return "fabs";
3168 case BuiltinFnIdFloor:
3169 return "floor";
3170 case BuiltinFnIdCeil:
3171 return "ceil";
3172 case BuiltinFnIdTrunc:
3173 return "trunc";
3174 case BuiltinFnIdNearbyInt:
3175 return "nearbyint";
3176 case BuiltinFnIdRound:
3177 return "round";
3178 default:
3179 zig_unreachable();
3180 }
3969 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
3970 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
3971 ir_ref_inst_gen(result_ptr, ira->new_irb.current_basic_block);
3972
3973 return &instruction->base;
31813974}
31823975
3183static IrInstruction *ir_build_float_op(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *operand,
3976static IrInstSrc *ir_build_float_op_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *operand,
31843977 BuiltinFnId fn_id)
31853978{
3186 IrInstructionFloatOp *instruction = ir_build_instruction<IrInstructionFloatOp>(irb, scope, source_node);
3979 IrInstSrcFloatOp *instruction = ir_build_instruction<IrInstSrcFloatOp>(irb, scope, source_node);
3980 instruction->operand = operand;
3981 instruction->fn_id = fn_id;
3982
3983 ir_ref_instruction(operand, irb->current_basic_block);
3984
3985 return &instruction->base;
3986}
3987
3988static IrInstGen *ir_build_float_op_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
3989 BuiltinFnId fn_id, ZigType *operand_type)
3990{
3991 IrInstGenFloatOp *instruction = ir_build_inst_gen<IrInstGenFloatOp>(&ira->new_irb,
3992 source_instr->scope, source_instr->source_node);
3993 instruction->base.value->type = operand_type;
31873994 instruction->operand = operand;
31883995 instruction->fn_id = fn_id;
31893996
3190 ir_ref_instruction(operand, irb->current_basic_block);
3997 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
31913998
31923999 return &instruction->base;
31934000}
31944001
3195static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *source_node,
3196 IrInstruction *type_value, IrInstruction *op1, IrInstruction *op2, IrInstruction *op3) {
3197 IrInstructionMulAdd *instruction = ir_build_instruction<IrInstructionMulAdd>(irb, scope, source_node);
4002static IrInstSrc *ir_build_mul_add_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4003 IrInstSrc *type_value, IrInstSrc *op1, IrInstSrc *op2, IrInstSrc *op3)
4004{
4005 IrInstSrcMulAdd *instruction = ir_build_instruction<IrInstSrcMulAdd>(irb, scope, source_node);
31984006 instruction->type_value = type_value;
31994007 instruction->op1 = op1;
32004008 instruction->op2 = op2;
......@@ -3208,8 +4016,25 @@ static IrInstruction *ir_build_mul_add(IrBuilder *irb, Scope *scope, AstNode *so
32084016 return &instruction->base;
32094017}
32104018
3211static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_value) {
3212 IrInstructionAlignOf *instruction = ir_build_instruction<IrInstructionAlignOf>(irb, scope, source_node);
4019static IrInstGen *ir_build_mul_add_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *op1, IrInstGen *op2,
4020 IrInstGen *op3, ZigType *expr_type)
4021{
4022 IrInstGenMulAdd *instruction = ir_build_inst_gen<IrInstGenMulAdd>(&ira->new_irb,
4023 source_instr->scope, source_instr->source_node);
4024 instruction->base.value->type = expr_type;
4025 instruction->op1 = op1;
4026 instruction->op2 = op2;
4027 instruction->op3 = op3;
4028
4029 ir_ref_inst_gen(op1, ira->new_irb.current_basic_block);
4030 ir_ref_inst_gen(op2, ira->new_irb.current_basic_block);
4031 ir_ref_inst_gen(op3, ira->new_irb.current_basic_block);
4032
4033 return &instruction->base;
4034}
4035
4036static IrInstSrc *ir_build_align_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4037 IrInstSrcAlignOf *instruction = ir_build_instruction<IrInstSrcAlignOf>(irb, scope, source_node);
32134038 instruction->type_value = type_value;
32144039
32154040 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3217,10 +4042,10 @@ static IrInstruction *ir_build_align_of(IrBuilder *irb, Scope *scope, AstNode *s
32174042 return &instruction->base;
32184043}
32194044
3220static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3221 IrInstruction *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
4045static IrInstSrc *ir_build_test_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4046 IrInstSrc *base_ptr, bool resolve_err_set, bool base_ptr_is_payload)
32224047{
3223 IrInstructionTestErrSrc *instruction = ir_build_instruction<IrInstructionTestErrSrc>(irb, scope, source_node);
4048 IrInstSrcTestErr *instruction = ir_build_instruction<IrInstSrcTestErr>(irb, scope, source_node);
32244049 instruction->base_ptr = base_ptr;
32254050 instruction->resolve_err_set = resolve_err_set;
32264051 instruction->base_ptr_is_payload = base_ptr_is_payload;
......@@ -3230,48 +4055,72 @@ static IrInstruction *ir_build_test_err_src(IrBuilder *irb, Scope *scope, AstNod
32304055 return &instruction->base;
32314056}
32324057
3233static IrInstruction *ir_build_test_err_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3234 IrInstruction *err_union)
3235{
3236 IrInstructionTestErrGen *instruction = ir_build_instruction<IrInstructionTestErrGen>(
4058static IrInstGen *ir_build_test_err_gen(IrAnalyze *ira, IrInst *source_instruction, IrInstGen *err_union) {
4059 IrInstGenTestErr *instruction = ir_build_inst_gen<IrInstGenTestErr>(
32374060 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
32384061 instruction->base.value->type = ira->codegen->builtin_types.entry_bool;
32394062 instruction->err_union = err_union;
32404063
3241 ir_ref_instruction(err_union, ira->new_irb.current_basic_block);
4064 ir_ref_inst_gen(err_union, ira->new_irb.current_basic_block);
32424065
32434066 return &instruction->base;
32444067}
32454068
3246static IrInstruction *ir_build_unwrap_err_code(IrBuilder *irb, Scope *scope, AstNode *source_node,
3247 IrInstruction *err_union_ptr)
4069static IrInstSrc *ir_build_unwrap_err_code_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4070 IrInstSrc *err_union_ptr)
32484071{
3249 IrInstructionUnwrapErrCode *instruction = ir_build_instruction<IrInstructionUnwrapErrCode>(irb, scope, source_node);
3250 instruction->err_union_ptr = err_union_ptr;
4072 IrInstSrcUnwrapErrCode *inst = ir_build_instruction<IrInstSrcUnwrapErrCode>(irb, scope, source_node);
4073 inst->err_union_ptr = err_union_ptr;
32514074
32524075 ir_ref_instruction(err_union_ptr, irb->current_basic_block);
32534076
3254 return &instruction->base;
4077 return &inst->base;
32554078}
32564079
3257static IrInstruction *ir_build_unwrap_err_payload(IrBuilder *irb, Scope *scope, AstNode *source_node,
3258 IrInstruction *value, bool safety_check_on, bool initializing)
4080static IrInstGen *ir_build_unwrap_err_code_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4081 IrInstGen *err_union_ptr, ZigType *result_type)
32594082{
3260 IrInstructionUnwrapErrPayload *instruction = ir_build_instruction<IrInstructionUnwrapErrPayload>(irb, scope, source_node);
3261 instruction->value = value;
3262 instruction->safety_check_on = safety_check_on;
3263 instruction->initializing = initializing;
4083 IrInstGenUnwrapErrCode *inst = ir_build_inst_gen<IrInstGenUnwrapErrCode>(&ira->new_irb, scope, source_node);
4084 inst->base.value->type = result_type;
4085 inst->err_union_ptr = err_union_ptr;
4086
4087 ir_ref_inst_gen(err_union_ptr, ira->new_irb.current_basic_block);
4088
4089 return &inst->base;
4090}
4091
4092static IrInstSrc *ir_build_unwrap_err_payload_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4093 IrInstSrc *value, bool safety_check_on, bool initializing)
4094{
4095 IrInstSrcUnwrapErrPayload *inst = ir_build_instruction<IrInstSrcUnwrapErrPayload>(irb, scope, source_node);
4096 inst->value = value;
4097 inst->safety_check_on = safety_check_on;
4098 inst->initializing = initializing;
32644099
32654100 ir_ref_instruction(value, irb->current_basic_block);
32664101
3267 return &instruction->base;
4102 return &inst->base;
4103}
4104
4105static IrInstGen *ir_build_unwrap_err_payload_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4106 IrInstGen *value, bool safety_check_on, bool initializing, ZigType *result_type)
4107{
4108 IrInstGenUnwrapErrPayload *inst = ir_build_inst_gen<IrInstGenUnwrapErrPayload>(&ira->new_irb, scope, source_node);
4109 inst->base.value->type = result_type;
4110 inst->value = value;
4111 inst->safety_check_on = safety_check_on;
4112 inst->initializing = initializing;
4113
4114 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4115
4116 return &inst->base;
32684117}
32694118
3270static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *source_node,
3271 IrInstruction **param_types, IrInstruction *align_value, IrInstruction *callconv_value,
3272 IrInstruction *return_type, bool is_var_args)
4119static IrInstSrc *ir_build_fn_proto(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4120 IrInstSrc **param_types, IrInstSrc *align_value, IrInstSrc *callconv_value,
4121 IrInstSrc *return_type, bool is_var_args)
32734122{
3274 IrInstructionFnProto *instruction = ir_build_instruction<IrInstructionFnProto>(irb, scope, source_node);
4123 IrInstSrcFnProto *instruction = ir_build_instruction<IrInstSrcFnProto>(irb, scope, source_node);
32754124 instruction->param_types = param_types;
32764125 instruction->align_value = align_value;
32774126 instruction->callconv_value = callconv_value;
......@@ -3291,8 +4140,8 @@ static IrInstruction *ir_build_fn_proto(IrBuilder *irb, Scope *scope, AstNode *s
32914140 return &instruction->base;
32924141}
32934142
3294static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
3295 IrInstructionTestComptime *instruction = ir_build_instruction<IrInstructionTestComptime>(irb, scope, source_node);
4143static IrInstSrc *ir_build_test_comptime(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *value) {
4144 IrInstSrcTestComptime *instruction = ir_build_instruction<IrInstSrcTestComptime>(irb, scope, source_node);
32964145 instruction->value = value;
32974146
32984147 ir_ref_instruction(value, irb->current_basic_block);
......@@ -3300,10 +4149,10 @@ static IrInstruction *ir_build_test_comptime(IrBuilder *irb, Scope *scope, AstNo
33004149 return &instruction->base;
33014150}
33024151
3303static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3304 IrInstruction *dest_type, IrInstruction *ptr, bool safety_check_on)
4152static IrInstSrc *ir_build_ptr_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4153 IrInstSrc *dest_type, IrInstSrc *ptr, bool safety_check_on)
33054154{
3306 IrInstructionPtrCastSrc *instruction = ir_build_instruction<IrInstructionPtrCastSrc>(
4155 IrInstSrcPtrCast *instruction = ir_build_instruction<IrInstSrcPtrCast>(
33074156 irb, scope, source_node);
33084157 instruction->dest_type = dest_type;
33094158 instruction->ptr = ptr;
......@@ -3315,39 +4164,24 @@ static IrInstruction *ir_build_ptr_cast_src(IrBuilder *irb, Scope *scope, AstNod
33154164 return &instruction->base;
33164165}
33174166
3318static IrInstruction *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3319 ZigType *ptr_type, IrInstruction *ptr, bool safety_check_on)
4167static IrInstGen *ir_build_ptr_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
4168 ZigType *ptr_type, IrInstGen *ptr, bool safety_check_on)
33204169{
3321 IrInstructionPtrCastGen *instruction = ir_build_instruction<IrInstructionPtrCastGen>(
4170 IrInstGenPtrCast *instruction = ir_build_inst_gen<IrInstGenPtrCast>(
33224171 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
33234172 instruction->base.value->type = ptr_type;
33244173 instruction->ptr = ptr;
33254174 instruction->safety_check_on = safety_check_on;
33264175
3327 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3328
3329 return &instruction->base;
3330}
3331
3332static IrInstruction *ir_build_load_ptr_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3333 IrInstruction *ptr, ZigType *ty, IrInstruction *result_loc)
3334{
3335 IrInstructionLoadPtrGen *instruction = ir_build_instruction<IrInstructionLoadPtrGen>(
3336 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
3337 instruction->base.value->type = ty;
3338 instruction->ptr = ptr;
3339 instruction->result_loc = result_loc;
3340
3341 ir_ref_instruction(ptr, ira->new_irb.current_basic_block);
3342 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4176 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
33434177
33444178 return &instruction->base;
33454179}
33464180
3347static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
3348 IrInstruction *operand, ResultLocCast *result_loc_cast)
4181static IrInstSrc *ir_build_implicit_cast(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4182 IrInstSrc *operand, ResultLocCast *result_loc_cast)
33494183{
3350 IrInstructionImplicitCast *instruction = ir_build_instruction<IrInstructionImplicitCast>(irb, scope, source_node);
4184 IrInstSrcImplicitCast *instruction = ir_build_instruction<IrInstSrcImplicitCast>(irb, scope, source_node);
33514185 instruction->operand = operand;
33524186 instruction->result_loc_cast = result_loc_cast;
33534187
......@@ -3356,10 +4190,10 @@ static IrInstruction *ir_build_implicit_cast(IrBuilder *irb, Scope *scope, AstNo
33564190 return &instruction->base;
33574191}
33584192
3359static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3360 IrInstruction *operand, ResultLocBitCast *result_loc_bit_cast)
4193static IrInstSrc *ir_build_bit_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4194 IrInstSrc *operand, ResultLocBitCast *result_loc_bit_cast)
33614195{
3362 IrInstructionBitCastSrc *instruction = ir_build_instruction<IrInstructionBitCastSrc>(irb, scope, source_node);
4196 IrInstSrcBitCast *instruction = ir_build_instruction<IrInstSrcBitCast>(irb, scope, source_node);
33634197 instruction->operand = operand;
33644198 instruction->result_loc_bit_cast = result_loc_bit_cast;
33654199
......@@ -3368,62 +4202,81 @@ static IrInstruction *ir_build_bit_cast_src(IrBuilder *irb, Scope *scope, AstNod
33684202 return &instruction->base;
33694203}
33704204
3371static IrInstruction *ir_build_bit_cast_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3372 IrInstruction *operand, ZigType *ty)
4205static IrInstGen *ir_build_bit_cast_gen(IrAnalyze *ira, IrInst *source_instruction,
4206 IrInstGen *operand, ZigType *ty)
33734207{
3374 IrInstructionBitCastGen *instruction = ir_build_instruction<IrInstructionBitCastGen>(
4208 IrInstGenBitCast *instruction = ir_build_inst_gen<IrInstGenBitCast>(
33754209 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
33764210 instruction->base.value->type = ty;
33774211 instruction->operand = operand;
33784212
3379 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
4213 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
33804214
33814215 return &instruction->base;
33824216}
33834217
3384static IrInstruction *ir_build_widen_or_shorten(IrBuilder *irb, Scope *scope, AstNode *source_node,
3385 IrInstruction *target)
4218static IrInstGen *ir_build_widen_or_shorten(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4219 ZigType *result_type)
33864220{
3387 IrInstructionWidenOrShorten *instruction = ir_build_instruction<IrInstructionWidenOrShorten>(
3388 irb, scope, source_node);
3389 instruction->target = target;
4221 IrInstGenWidenOrShorten *inst = ir_build_inst_gen<IrInstGenWidenOrShorten>(&ira->new_irb, scope, source_node);
4222 inst->base.value->type = result_type;
4223 inst->target = target;
33904224
3391 ir_ref_instruction(target, irb->current_basic_block);
4225 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
33924226
3393 return &instruction->base;
4227 return &inst->base;
33944228}
33954229
3396static IrInstruction *ir_build_int_to_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3397 IrInstruction *dest_type, IrInstruction *target)
4230static IrInstSrc *ir_build_int_to_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4231 IrInstSrc *dest_type, IrInstSrc *target)
33984232{
3399 IrInstructionIntToPtr *instruction = ir_build_instruction<IrInstructionIntToPtr>(
3400 irb, scope, source_node);
4233 IrInstSrcIntToPtr *instruction = ir_build_instruction<IrInstSrcIntToPtr>(irb, scope, source_node);
34014234 instruction->dest_type = dest_type;
34024235 instruction->target = target;
34034236
3404 if (dest_type) ir_ref_instruction(dest_type, irb->current_basic_block);
4237 ir_ref_instruction(dest_type, irb->current_basic_block);
34054238 ir_ref_instruction(target, irb->current_basic_block);
34064239
34074240 return &instruction->base;
34084241}
34094242
3410static IrInstruction *ir_build_ptr_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3411 IrInstruction *target)
4243static IrInstGen *ir_build_int_to_ptr_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4244 IrInstGen *target, ZigType *ptr_type)
34124245{
3413 IrInstructionPtrToInt *instruction = ir_build_instruction<IrInstructionPtrToInt>(
3414 irb, scope, source_node);
4246 IrInstGenIntToPtr *instruction = ir_build_inst_gen<IrInstGenIntToPtr>(&ira->new_irb, scope, source_node);
4247 instruction->base.value->type = ptr_type;
34154248 instruction->target = target;
34164249
3417 ir_ref_instruction(target, irb->current_basic_block);
4250 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
34184251
34194252 return &instruction->base;
34204253}
34214254
3422static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode *source_node,
3423 IrInstruction *dest_type, IrInstruction *target)
4255static IrInstSrc *ir_build_ptr_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4256 IrInstSrc *target)
34244257{
3425 IrInstructionIntToEnum *instruction = ir_build_instruction<IrInstructionIntToEnum>(
3426 irb, scope, source_node);
4258 IrInstSrcPtrToInt *inst = ir_build_instruction<IrInstSrcPtrToInt>(irb, scope, source_node);
4259 inst->target = target;
4260
4261 ir_ref_instruction(target, irb->current_basic_block);
4262
4263 return &inst->base;
4264}
4265
4266static IrInstGen *ir_build_ptr_to_int_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
4267 IrInstGenPtrToInt *inst = ir_build_inst_gen<IrInstGenPtrToInt>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4268 inst->base.value->type = ira->codegen->builtin_types.entry_usize;
4269 inst->target = target;
4270
4271 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4272
4273 return &inst->base;
4274}
4275
4276static IrInstSrc *ir_build_int_to_enum_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4277 IrInstSrc *dest_type, IrInstSrc *target)
4278{
4279 IrInstSrcIntToEnum *instruction = ir_build_instruction<IrInstSrcIntToEnum>(irb, scope, source_node);
34274280 instruction->dest_type = dest_type;
34284281 instruction->target = target;
34294282
......@@ -3433,12 +4286,22 @@ static IrInstruction *ir_build_int_to_enum(IrBuilder *irb, Scope *scope, AstNode
34334286 return &instruction->base;
34344287}
34354288
4289static IrInstGen *ir_build_int_to_enum_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4290 ZigType *dest_type, IrInstGen *target)
4291{
4292 IrInstGenIntToEnum *instruction = ir_build_inst_gen<IrInstGenIntToEnum>(&ira->new_irb, scope, source_node);
4293 instruction->base.value->type = dest_type;
4294 instruction->target = target;
4295
4296 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
34364297
4298 return &instruction->base;
4299}
34374300
3438static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3439 IrInstruction *target)
4301static IrInstSrc *ir_build_enum_to_int(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4302 IrInstSrc *target)
34404303{
3441 IrInstructionEnumToInt *instruction = ir_build_instruction<IrInstructionEnumToInt>(
4304 IrInstSrcEnumToInt *instruction = ir_build_instruction<IrInstSrcEnumToInt>(
34424305 irb, scope, source_node);
34434306 instruction->target = target;
34444307
......@@ -3447,11 +4310,10 @@ static IrInstruction *ir_build_enum_to_int(IrBuilder *irb, Scope *scope, AstNode
34474310 return &instruction->base;
34484311}
34494312
3450static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode *source_node,
3451 IrInstruction *target)
4313static IrInstSrc *ir_build_int_to_err_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4314 IrInstSrc *target)
34524315{
3453 IrInstructionIntToErr *instruction = ir_build_instruction<IrInstructionIntToErr>(
3454 irb, scope, source_node);
4316 IrInstSrcIntToErr *instruction = ir_build_instruction<IrInstSrcIntToErr>(irb, scope, source_node);
34554317 instruction->target = target;
34564318
34574319 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3459,10 +4321,22 @@ static IrInstruction *ir_build_int_to_err(IrBuilder *irb, Scope *scope, AstNode
34594321 return &instruction->base;
34604322}
34614323
3462static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode *source_node,
3463 IrInstruction *target)
4324static IrInstGen *ir_build_int_to_err_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4325 ZigType *wanted_type)
4326{
4327 IrInstGenIntToErr *instruction = ir_build_inst_gen<IrInstGenIntToErr>(&ira->new_irb, scope, source_node);
4328 instruction->base.value->type = wanted_type;
4329 instruction->target = target;
4330
4331 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4332
4333 return &instruction->base;
4334}
4335
4336static IrInstSrc *ir_build_err_to_int_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4337 IrInstSrc *target)
34644338{
3465 IrInstructionErrToInt *instruction = ir_build_instruction<IrInstructionErrToInt>(
4339 IrInstSrcErrToInt *instruction = ir_build_instruction<IrInstSrcErrToInt>(
34664340 irb, scope, source_node);
34674341 instruction->target = target;
34684342
......@@ -3471,16 +4345,29 @@ static IrInstruction *ir_build_err_to_int(IrBuilder *irb, Scope *scope, AstNode
34714345 return &instruction->base;
34724346}
34734347
3474static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope, AstNode *source_node,
3475 IrInstruction *target_value, IrInstructionCheckSwitchProngsRange *ranges, size_t range_count,
3476 bool have_else_prong)
4348static IrInstGen *ir_build_err_to_int_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4349 ZigType *wanted_type)
4350{
4351 IrInstGenErrToInt *instruction = ir_build_inst_gen<IrInstGenErrToInt>(&ira->new_irb, scope, source_node);
4352 instruction->base.value->type = wanted_type;
4353 instruction->target = target;
4354
4355 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4356
4357 return &instruction->base;
4358}
4359
4360static IrInstSrc *ir_build_check_switch_prongs(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4361 IrInstSrc *target_value, IrInstSrcCheckSwitchProngsRange *ranges, size_t range_count,
4362 bool have_else_prong, bool have_underscore_prong)
34774363{
3478 IrInstructionCheckSwitchProngs *instruction = ir_build_instruction<IrInstructionCheckSwitchProngs>(
4364 IrInstSrcCheckSwitchProngs *instruction = ir_build_instruction<IrInstSrcCheckSwitchProngs>(
34794365 irb, scope, source_node);
34804366 instruction->target_value = target_value;
34814367 instruction->ranges = ranges;
34824368 instruction->range_count = range_count;
34834369 instruction->have_else_prong = have_else_prong;
4370 instruction->have_underscore_prong = have_underscore_prong;
34844371
34854372 ir_ref_instruction(target_value, irb->current_basic_block);
34864373 for (size_t i = 0; i < range_count; i += 1) {
......@@ -3491,10 +4378,10 @@ static IrInstruction *ir_build_check_switch_prongs(IrBuilder *irb, Scope *scope,
34914378 return &instruction->base;
34924379}
34934380
3494static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *scope, AstNode *source_node,
3495 IrInstruction* statement_value)
4381static IrInstSrc *ir_build_check_statement_is_void(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4382 IrInstSrc* statement_value)
34964383{
3497 IrInstructionCheckStatementIsVoid *instruction = ir_build_instruction<IrInstructionCheckStatementIsVoid>(
4384 IrInstSrcCheckStatementIsVoid *instruction = ir_build_instruction<IrInstSrcCheckStatementIsVoid>(
34984385 irb, scope, source_node);
34994386 instruction->statement_value = statement_value;
35004387
......@@ -3503,11 +4390,10 @@ static IrInstruction *ir_build_check_statement_is_void(IrBuilder *irb, Scope *sc
35034390 return &instruction->base;
35044391}
35054392
3506static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3507 IrInstruction *type_value)
4393static IrInstSrc *ir_build_type_name(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4394 IrInstSrc *type_value)
35084395{
3509 IrInstructionTypeName *instruction = ir_build_instruction<IrInstructionTypeName>(
3510 irb, scope, source_node);
4396 IrInstSrcTypeName *instruction = ir_build_instruction<IrInstSrcTypeName>(irb, scope, source_node);
35114397 instruction->type_value = type_value;
35124398
35134399 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3515,18 +4401,17 @@ static IrInstruction *ir_build_type_name(IrBuilder *irb, Scope *scope, AstNode *
35154401 return &instruction->base;
35164402}
35174403
3518static IrInstruction *ir_build_decl_ref(IrBuilder *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
3519 IrInstructionDeclRef *instruction = ir_build_instruction<IrInstructionDeclRef>(irb, scope, source_node);
4404static IrInstSrc *ir_build_decl_ref(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Tld *tld, LVal lval) {
4405 IrInstSrcDeclRef *instruction = ir_build_instruction<IrInstSrcDeclRef>(irb, scope, source_node);
35204406 instruction->tld = tld;
35214407 instruction->lval = lval;
35224408
35234409 return &instruction->base;
35244410}
35254411
3526static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *msg) {
3527 IrInstructionPanic *instruction = ir_build_instruction<IrInstructionPanic>(irb, scope, source_node);
3528 instruction->base.value->special = ConstValSpecialStatic;
3529 instruction->base.value->type = irb->codegen->builtin_types.entry_unreachable;
4412static IrInstSrc *ir_build_panic_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
4413 IrInstSrcPanic *instruction = ir_build_instruction<IrInstSrcPanic>(irb, scope, source_node);
4414 instruction->base.is_noreturn = true;
35304415 instruction->msg = msg;
35314416
35324417 ir_ref_instruction(msg, irb->current_basic_block);
......@@ -3534,10 +4419,18 @@ static IrInstruction *ir_build_panic(IrBuilder *irb, Scope *scope, AstNode *sour
35344419 return &instruction->base;
35354420}
35364421
3537static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *source_node,
3538 IrInstruction *target)
3539{
3540 IrInstructionTagName *instruction = ir_build_instruction<IrInstructionTagName>(irb, scope, source_node);
4422static IrInstGen *ir_build_panic_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *msg) {
4423 IrInstGenPanic *instruction = ir_build_inst_noreturn<IrInstGenPanic>(&ira->new_irb,
4424 source_instr->scope, source_instr->source_node);
4425 instruction->msg = msg;
4426
4427 ir_ref_inst_gen(msg, ira->new_irb.current_basic_block);
4428
4429 return &instruction->base;
4430}
4431
4432static IrInstSrc *ir_build_tag_name_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *target) {
4433 IrInstSrcTagName *instruction = ir_build_instruction<IrInstSrcTagName>(irb, scope, source_node);
35414434 instruction->target = target;
35424435
35434436 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3545,10 +4438,23 @@ static IrInstruction *ir_build_tag_name(IrBuilder *irb, Scope *scope, AstNode *s
35454438 return &instruction->base;
35464439}
35474440
3548static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3549 IrInstruction *target)
4441static IrInstGen *ir_build_tag_name_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target,
4442 ZigType *result_type)
4443{
4444 IrInstGenTagName *instruction = ir_build_inst_gen<IrInstGenTagName>(&ira->new_irb,
4445 source_instr->scope, source_instr->source_node);
4446 instruction->base.value->type = result_type;
4447 instruction->target = target;
4448
4449 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4450
4451 return &instruction->base;
4452}
4453
4454static IrInstSrc *ir_build_tag_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4455 IrInstSrc *target)
35504456{
3551 IrInstructionTagType *instruction = ir_build_instruction<IrInstructionTagType>(irb, scope, source_node);
4457 IrInstSrcTagType *instruction = ir_build_instruction<IrInstSrcTagType>(irb, scope, source_node);
35524458 instruction->target = target;
35534459
35544460 ir_ref_instruction(target, irb->current_basic_block);
......@@ -3556,27 +4462,40 @@ static IrInstruction *ir_build_tag_type(IrBuilder *irb, Scope *scope, AstNode *s
35564462 return &instruction->base;
35574463}
35584464
3559static IrInstruction *ir_build_field_parent_ptr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3560 IrInstruction *type_value, IrInstruction *field_name, IrInstruction *field_ptr, TypeStructField *field)
4465static IrInstSrc *ir_build_field_parent_ptr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4466 IrInstSrc *type_value, IrInstSrc *field_name, IrInstSrc *field_ptr)
35614467{
3562 IrInstructionFieldParentPtr *instruction = ir_build_instruction<IrInstructionFieldParentPtr>(
4468 IrInstSrcFieldParentPtr *inst = ir_build_instruction<IrInstSrcFieldParentPtr>(
35634469 irb, scope, source_node);
3564 instruction->type_value = type_value;
3565 instruction->field_name = field_name;
3566 instruction->field_ptr = field_ptr;
3567 instruction->field = field;
4470 inst->type_value = type_value;
4471 inst->field_name = field_name;
4472 inst->field_ptr = field_ptr;
35684473
35694474 ir_ref_instruction(type_value, irb->current_basic_block);
35704475 ir_ref_instruction(field_name, irb->current_basic_block);
35714476 ir_ref_instruction(field_ptr, irb->current_basic_block);
35724477
3573 return &instruction->base;
4478 return &inst->base;
4479}
4480
4481static IrInstGen *ir_build_field_parent_ptr_gen(IrAnalyze *ira, IrInst *source_instr,
4482 IrInstGen *field_ptr, TypeStructField *field, ZigType *result_type)
4483{
4484 IrInstGenFieldParentPtr *inst = ir_build_inst_gen<IrInstGenFieldParentPtr>(&ira->new_irb,
4485 source_instr->scope, source_instr->source_node);
4486 inst->base.value->type = result_type;
4487 inst->field_ptr = field_ptr;
4488 inst->field = field;
4489
4490 ir_ref_inst_gen(field_ptr, ira->new_irb.current_basic_block);
4491
4492 return &inst->base;
35744493}
35754494
3576static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
3577 IrInstruction *type_value, IrInstruction *field_name)
4495static IrInstSrc *ir_build_byte_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4496 IrInstSrc *type_value, IrInstSrc *field_name)
35784497{
3579 IrInstructionByteOffsetOf *instruction = ir_build_instruction<IrInstructionByteOffsetOf>(irb, scope, source_node);
4498 IrInstSrcByteOffsetOf *instruction = ir_build_instruction<IrInstSrcByteOffsetOf>(irb, scope, source_node);
35804499 instruction->type_value = type_value;
35814500 instruction->field_name = field_name;
35824501
......@@ -3586,10 +4505,10 @@ static IrInstruction *ir_build_byte_offset_of(IrBuilder *irb, Scope *scope, AstN
35864505 return &instruction->base;
35874506}
35884507
3589static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNode *source_node,
3590 IrInstruction *type_value, IrInstruction *field_name)
4508static IrInstSrc *ir_build_bit_offset_of(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4509 IrInstSrc *type_value, IrInstSrc *field_name)
35914510{
3592 IrInstructionBitOffsetOf *instruction = ir_build_instruction<IrInstructionBitOffsetOf>(irb, scope, source_node);
4511 IrInstSrcBitOffsetOf *instruction = ir_build_instruction<IrInstSrcBitOffsetOf>(irb, scope, source_node);
35934512 instruction->type_value = type_value;
35944513 instruction->field_name = field_name;
35954514
......@@ -3599,9 +4518,8 @@ static IrInstruction *ir_build_bit_offset_of(IrBuilder *irb, Scope *scope, AstNo
35994518 return &instruction->base;
36004519}
36014520
3602static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *source_node,
3603 IrInstruction *type_value) {
3604 IrInstructionTypeInfo *instruction = ir_build_instruction<IrInstructionTypeInfo>(irb, scope, source_node);
4521static IrInstSrc *ir_build_type_info(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4522 IrInstSrcTypeInfo *instruction = ir_build_instruction<IrInstSrcTypeInfo>(irb, scope, source_node);
36054523 instruction->type_value = type_value;
36064524
36074525 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3609,8 +4527,8 @@ static IrInstruction *ir_build_type_info(IrBuilder *irb, Scope *scope, AstNode *
36094527 return &instruction->base;
36104528}
36114529
3612static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *type_info) {
3613 IrInstructionType *instruction = ir_build_instruction<IrInstructionType>(irb, scope, source_node);
4530static IrInstSrc *ir_build_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_info) {
4531 IrInstSrcType *instruction = ir_build_instruction<IrInstSrcType>(irb, scope, source_node);
36144532 instruction->type_info = type_info;
36154533
36164534 ir_ref_instruction(type_info, irb->current_basic_block);
......@@ -3618,10 +4536,8 @@ static IrInstruction *ir_build_type(IrBuilder *irb, Scope *scope, AstNode *sourc
36184536 return &instruction->base;
36194537}
36204538
3621static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *source_node,
3622 IrInstruction *type_value)
3623{
3624 IrInstructionTypeId *instruction = ir_build_instruction<IrInstructionTypeId>(irb, scope, source_node);
4539static IrInstSrc *ir_build_type_id(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *type_value) {
4540 IrInstSrcTypeId *instruction = ir_build_instruction<IrInstSrcTypeId>(irb, scope, source_node);
36254541 instruction->type_value = type_value;
36264542
36274543 ir_ref_instruction(type_value, irb->current_basic_block);
......@@ -3629,10 +4545,10 @@ static IrInstruction *ir_build_type_id(IrBuilder *irb, Scope *scope, AstNode *so
36294545 return &instruction->base;
36304546}
36314547
3632static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scope, AstNode *source_node,
3633 IrInstruction *new_quota)
4548static IrInstSrc *ir_build_set_eval_branch_quota(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4549 IrInstSrc *new_quota)
36344550{
3635 IrInstructionSetEvalBranchQuota *instruction = ir_build_instruction<IrInstructionSetEvalBranchQuota>(irb, scope, source_node);
4551 IrInstSrcSetEvalBranchQuota *instruction = ir_build_instruction<IrInstSrcSetEvalBranchQuota>(irb, scope, source_node);
36364552 instruction->new_quota = new_quota;
36374553
36384554 ir_ref_instruction(new_quota, irb->current_basic_block);
......@@ -3640,23 +4556,35 @@ static IrInstruction *ir_build_set_eval_branch_quota(IrBuilder *irb, Scope *scop
36404556 return &instruction->base;
36414557}
36424558
3643static IrInstruction *ir_build_align_cast(IrBuilder *irb, Scope *scope, AstNode *source_node,
3644 IrInstruction *align_bytes, IrInstruction *target)
4559static IrInstSrc *ir_build_align_cast_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4560 IrInstSrc *align_bytes, IrInstSrc *target)
36454561{
3646 IrInstructionAlignCast *instruction = ir_build_instruction<IrInstructionAlignCast>(irb, scope, source_node);
4562 IrInstSrcAlignCast *instruction = ir_build_instruction<IrInstSrcAlignCast>(irb, scope, source_node);
36474563 instruction->align_bytes = align_bytes;
36484564 instruction->target = target;
36494565
3650 if (align_bytes) ir_ref_instruction(align_bytes, irb->current_basic_block);
4566 ir_ref_instruction(align_bytes, irb->current_basic_block);
36514567 ir_ref_instruction(target, irb->current_basic_block);
36524568
36534569 return &instruction->base;
36544570}
36554571
3656static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
3657 ResultLoc *result_loc, IrInstruction *ty)
4572static IrInstGen *ir_build_align_cast_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node, IrInstGen *target,
4573 ZigType *result_type)
4574{
4575 IrInstGenAlignCast *instruction = ir_build_inst_gen<IrInstGenAlignCast>(&ira->new_irb, scope, source_node);
4576 instruction->base.value->type = result_type;
4577 instruction->target = target;
4578
4579 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
4580
4581 return &instruction->base;
4582}
4583
4584static IrInstSrc *ir_build_resolve_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4585 ResultLoc *result_loc, IrInstSrc *ty)
36584586{
3659 IrInstructionResolveResult *instruction = ir_build_instruction<IrInstructionResolveResult>(irb, scope, source_node);
4587 IrInstSrcResolveResult *instruction = ir_build_instruction<IrInstSrcResolveResult>(irb, scope, source_node);
36604588 instruction->result_loc = result_loc;
36614589 instruction->ty = ty;
36624590
......@@ -3665,26 +4593,26 @@ static IrInstruction *ir_build_resolve_result(IrBuilder *irb, Scope *scope, AstN
36654593 return &instruction->base;
36664594}
36674595
3668static IrInstruction *ir_build_reset_result(IrBuilder *irb, Scope *scope, AstNode *source_node,
4596static IrInstSrc *ir_build_reset_result(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
36694597 ResultLoc *result_loc)
36704598{
3671 IrInstructionResetResult *instruction = ir_build_instruction<IrInstructionResetResult>(irb, scope, source_node);
4599 IrInstSrcResetResult *instruction = ir_build_instruction<IrInstSrcResetResult>(irb, scope, source_node);
36724600 instruction->result_loc = result_loc;
36734601 instruction->base.is_gen = true;
36744602
36754603 return &instruction->base;
36764604}
36774605
3678static IrInstruction *ir_build_opaque_type(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3679 IrInstructionOpaqueType *instruction = ir_build_instruction<IrInstructionOpaqueType>(irb, scope, source_node);
4606static IrInstSrc *ir_build_opaque_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4607 IrInstSrcOpaqueType *instruction = ir_build_instruction<IrInstSrcOpaqueType>(irb, scope, source_node);
36804608
36814609 return &instruction->base;
36824610}
36834611
3684static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, AstNode *source_node,
3685 IrInstruction *align_bytes)
4612static IrInstSrc *ir_build_set_align_stack(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4613 IrInstSrc *align_bytes)
36864614{
3687 IrInstructionSetAlignStack *instruction = ir_build_instruction<IrInstructionSetAlignStack>(irb, scope, source_node);
4615 IrInstSrcSetAlignStack *instruction = ir_build_instruction<IrInstSrcSetAlignStack>(irb, scope, source_node);
36884616 instruction->align_bytes = align_bytes;
36894617
36904618 ir_ref_instruction(align_bytes, irb->current_basic_block);
......@@ -3692,10 +4620,10 @@ static IrInstruction *ir_build_set_align_stack(IrBuilder *irb, Scope *scope, Ast
36924620 return &instruction->base;
36934621}
36944622
3695static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3696 IrInstruction *fn_type, IrInstruction *arg_index, bool allow_var)
4623static IrInstSrc *ir_build_arg_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4624 IrInstSrc *fn_type, IrInstSrc *arg_index, bool allow_var)
36974625{
3698 IrInstructionArgType *instruction = ir_build_instruction<IrInstructionArgType>(irb, scope, source_node);
4626 IrInstSrcArgType *instruction = ir_build_instruction<IrInstSrcArgType>(irb, scope, source_node);
36994627 instruction->fn_type = fn_type;
37004628 instruction->arg_index = arg_index;
37014629 instruction->allow_var = allow_var;
......@@ -3706,17 +4634,29 @@ static IrInstruction *ir_build_arg_type(IrBuilder *irb, Scope *scope, AstNode *s
37064634 return &instruction->base;
37074635}
37084636
3709static IrInstruction *ir_build_error_return_trace(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstructionErrorReturnTrace::Optional optional) {
3710 IrInstructionErrorReturnTrace *instruction = ir_build_instruction<IrInstructionErrorReturnTrace>(irb, scope, source_node);
3711 instruction->optional = optional;
4637static IrInstSrc *ir_build_error_return_trace_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4638 IrInstErrorReturnTraceOptional optional)
4639{
4640 IrInstSrcErrorReturnTrace *inst = ir_build_instruction<IrInstSrcErrorReturnTrace>(irb, scope, source_node);
4641 inst->optional = optional;
37124642
3713 return &instruction->base;
4643 return &inst->base;
4644}
4645
4646static IrInstGen *ir_build_error_return_trace_gen(IrAnalyze *ira, Scope *scope, AstNode *source_node,
4647 IrInstErrorReturnTraceOptional optional, ZigType *result_type)
4648{
4649 IrInstGenErrorReturnTrace *inst = ir_build_inst_gen<IrInstGenErrorReturnTrace>(&ira->new_irb, scope, source_node);
4650 inst->base.value->type = result_type;
4651 inst->optional = optional;
4652
4653 return &inst->base;
37144654}
37154655
3716static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode *source_node,
3717 IrInstruction *err_set, IrInstruction *payload)
4656static IrInstSrc *ir_build_error_union(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4657 IrInstSrc *err_set, IrInstSrc *payload)
37184658{
3719 IrInstructionErrorUnion *instruction = ir_build_instruction<IrInstructionErrorUnion>(irb, scope, source_node);
4659 IrInstSrcErrorUnion *instruction = ir_build_instruction<IrInstSrcErrorUnion>(irb, scope, source_node);
37204660 instruction->err_set = err_set;
37214661 instruction->payload = payload;
37224662
......@@ -3726,85 +4666,130 @@ static IrInstruction *ir_build_error_union(IrBuilder *irb, Scope *scope, AstNode
37264666 return &instruction->base;
37274667}
37284668
3729static IrInstruction *ir_build_atomic_rmw(IrBuilder *irb, Scope *scope, AstNode *source_node,
3730 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *op, IrInstruction *operand,
3731 IrInstruction *ordering, AtomicRmwOp resolved_op, AtomicOrder resolved_ordering)
4669static IrInstSrc *ir_build_atomic_rmw_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4670 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *op, IrInstSrc *operand,
4671 IrInstSrc *ordering)
37324672{
3733 IrInstructionAtomicRmw *instruction = ir_build_instruction<IrInstructionAtomicRmw>(irb, scope, source_node);
4673 IrInstSrcAtomicRmw *instruction = ir_build_instruction<IrInstSrcAtomicRmw>(irb, scope, source_node);
37344674 instruction->operand_type = operand_type;
37354675 instruction->ptr = ptr;
37364676 instruction->op = op;
37374677 instruction->operand = operand;
37384678 instruction->ordering = ordering;
3739 instruction->resolved_op = resolved_op;
3740 instruction->resolved_ordering = resolved_ordering;
37414679
3742 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4680 ir_ref_instruction(operand_type, irb->current_basic_block);
37434681 ir_ref_instruction(ptr, irb->current_basic_block);
3744 if (op != nullptr) ir_ref_instruction(op, irb->current_basic_block);
4682 ir_ref_instruction(op, irb->current_basic_block);
37454683 ir_ref_instruction(operand, irb->current_basic_block);
3746 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4684 ir_ref_instruction(ordering, irb->current_basic_block);
4685
4686 return &instruction->base;
4687}
4688
4689static IrInstGen *ir_build_atomic_rmw_gen(IrAnalyze *ira, IrInst *source_instr,
4690 IrInstGen *ptr, IrInstGen *operand, AtomicRmwOp op, AtomicOrder ordering, ZigType *operand_type)
4691{
4692 IrInstGenAtomicRmw *instruction = ir_build_inst_gen<IrInstGenAtomicRmw>(&ira->new_irb, source_instr->scope, source_instr->source_node);
4693 instruction->base.value->type = operand_type;
4694 instruction->ptr = ptr;
4695 instruction->op = op;
4696 instruction->operand = operand;
4697 instruction->ordering = ordering;
4698
4699 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4700 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
37474701
37484702 return &instruction->base;
37494703}
37504704
3751static IrInstruction *ir_build_atomic_load(IrBuilder *irb, Scope *scope, AstNode *source_node,
3752 IrInstruction *operand_type, IrInstruction *ptr,
3753 IrInstruction *ordering, AtomicOrder resolved_ordering)
4705static IrInstSrc *ir_build_atomic_load_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4706 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *ordering)
37544707{
3755 IrInstructionAtomicLoad *instruction = ir_build_instruction<IrInstructionAtomicLoad>(irb, scope, source_node);
4708 IrInstSrcAtomicLoad *instruction = ir_build_instruction<IrInstSrcAtomicLoad>(irb, scope, source_node);
37564709 instruction->operand_type = operand_type;
37574710 instruction->ptr = ptr;
37584711 instruction->ordering = ordering;
3759 instruction->resolved_ordering = resolved_ordering;
37604712
3761 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4713 ir_ref_instruction(operand_type, irb->current_basic_block);
37624714 ir_ref_instruction(ptr, irb->current_basic_block);
3763 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4715 ir_ref_instruction(ordering, irb->current_basic_block);
4716
4717 return &instruction->base;
4718}
4719
4720static IrInstGen *ir_build_atomic_load_gen(IrAnalyze *ira, IrInst *source_instr,
4721 IrInstGen *ptr, AtomicOrder ordering, ZigType *operand_type)
4722{
4723 IrInstGenAtomicLoad *instruction = ir_build_inst_gen<IrInstGenAtomicLoad>(&ira->new_irb,
4724 source_instr->scope, source_instr->source_node);
4725 instruction->base.value->type = operand_type;
4726 instruction->ptr = ptr;
4727 instruction->ordering = ordering;
4728
4729 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
37644730
37654731 return &instruction->base;
37664732}
37674733
3768static IrInstruction *ir_build_atomic_store(IrBuilder *irb, Scope *scope, AstNode *source_node,
3769 IrInstruction *operand_type, IrInstruction *ptr, IrInstruction *value,
3770 IrInstruction *ordering, AtomicOrder resolved_ordering)
4734static IrInstSrc *ir_build_atomic_store_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4735 IrInstSrc *operand_type, IrInstSrc *ptr, IrInstSrc *value, IrInstSrc *ordering)
37714736{
3772 IrInstructionAtomicStore *instruction = ir_build_instruction<IrInstructionAtomicStore>(irb, scope, source_node);
4737 IrInstSrcAtomicStore *instruction = ir_build_instruction<IrInstSrcAtomicStore>(irb, scope, source_node);
37734738 instruction->operand_type = operand_type;
37744739 instruction->ptr = ptr;
37754740 instruction->value = value;
37764741 instruction->ordering = ordering;
3777 instruction->resolved_ordering = resolved_ordering;
37784742
3779 if (operand_type != nullptr) ir_ref_instruction(operand_type, irb->current_basic_block);
4743 ir_ref_instruction(operand_type, irb->current_basic_block);
37804744 ir_ref_instruction(ptr, irb->current_basic_block);
37814745 ir_ref_instruction(value, irb->current_basic_block);
3782 if (ordering != nullptr) ir_ref_instruction(ordering, irb->current_basic_block);
4746 ir_ref_instruction(ordering, irb->current_basic_block);
37834747
37844748 return &instruction->base;
37854749}
37864750
3787static IrInstruction *ir_build_save_err_ret_addr(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3788 IrInstructionSaveErrRetAddr *instruction = ir_build_instruction<IrInstructionSaveErrRetAddr>(irb, scope, source_node);
4751static IrInstGen *ir_build_atomic_store_gen(IrAnalyze *ira, IrInst *source_instr,
4752 IrInstGen *ptr, IrInstGen *value, AtomicOrder ordering)
4753{
4754 IrInstGenAtomicStore *instruction = ir_build_inst_void<IrInstGenAtomicStore>(&ira->new_irb,
4755 source_instr->scope, source_instr->source_node);
4756 instruction->ptr = ptr;
4757 instruction->value = value;
4758 instruction->ordering = ordering;
4759
4760 ir_ref_inst_gen(ptr, ira->new_irb.current_basic_block);
4761 ir_ref_inst_gen(value, ira->new_irb.current_basic_block);
4762
37894763 return &instruction->base;
37904764}
37914765
3792static IrInstruction *ir_build_add_implicit_return_type(IrBuilder *irb, Scope *scope, AstNode *source_node,
3793 IrInstruction *value, ResultLocReturn *result_loc_ret)
4766static IrInstSrc *ir_build_save_err_ret_addr_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4767 IrInstSrcSaveErrRetAddr *inst = ir_build_instruction<IrInstSrcSaveErrRetAddr>(irb, scope, source_node);
4768 return &inst->base;
4769}
4770
4771static IrInstGen *ir_build_save_err_ret_addr_gen(IrAnalyze *ira, IrInst *source_instr) {
4772 IrInstGenSaveErrRetAddr *inst = ir_build_inst_void<IrInstGenSaveErrRetAddr>(&ira->new_irb,
4773 source_instr->scope, source_instr->source_node);
4774 return &inst->base;
4775}
4776
4777static IrInstSrc *ir_build_add_implicit_return_type(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4778 IrInstSrc *value, ResultLocReturn *result_loc_ret)
37944779{
3795 IrInstructionAddImplicitReturnType *instruction = ir_build_instruction<IrInstructionAddImplicitReturnType>(irb, scope, source_node);
3796 instruction->value = value;
3797 instruction->result_loc_ret = result_loc_ret;
4780 IrInstSrcAddImplicitReturnType *inst = ir_build_instruction<IrInstSrcAddImplicitReturnType>(irb, scope, source_node);
4781 inst->value = value;
4782 inst->result_loc_ret = result_loc_ret;
37984783
37994784 ir_ref_instruction(value, irb->current_basic_block);
38004785
3801 return &instruction->base;
4786 return &inst->base;
38024787}
38034788
3804static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *source_node,
3805 IrInstruction *container, IrInstruction *name)
4789static IrInstSrc *ir_build_has_decl(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4790 IrInstSrc *container, IrInstSrc *name)
38064791{
3807 IrInstructionHasDecl *instruction = ir_build_instruction<IrInstructionHasDecl>(irb, scope, source_node);
4792 IrInstSrcHasDecl *instruction = ir_build_instruction<IrInstSrcHasDecl>(irb, scope, source_node);
38084793 instruction->container = container;
38094794 instruction->name = name;
38104795
......@@ -3814,17 +4799,15 @@ static IrInstruction *ir_build_has_decl(IrBuilder *irb, Scope *scope, AstNode *s
38144799 return &instruction->base;
38154800}
38164801
3817static IrInstruction *ir_build_undeclared_identifier(IrBuilder *irb, Scope *scope, AstNode *source_node,
3818 Buf *name)
3819{
3820 IrInstructionUndeclaredIdent *instruction = ir_build_instruction<IrInstructionUndeclaredIdent>(irb, scope, source_node);
4802static IrInstSrc *ir_build_undeclared_identifier(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, Buf *name) {
4803 IrInstSrcUndeclaredIdent *instruction = ir_build_instruction<IrInstSrcUndeclaredIdent>(irb, scope, source_node);
38214804 instruction->name = name;
38224805
38234806 return &instruction->base;
38244807}
38254808
3826static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *scope_is_comptime, IrInstruction *is_comptime) {
3827 IrInstructionCheckRuntimeScope *instruction = ir_build_instruction<IrInstructionCheckRuntimeScope>(irb, scope, source_node);
4809static IrInstSrc *ir_build_check_runtime_scope(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *scope_is_comptime, IrInstSrc *is_comptime) {
4810 IrInstSrcCheckRuntimeScope *instruction = ir_build_instruction<IrInstSrcCheckRuntimeScope>(irb, scope, source_node);
38284811 instruction->scope_is_comptime = scope_is_comptime;
38294812 instruction->is_comptime = is_comptime;
38304813
......@@ -3834,10 +4817,10 @@ static IrInstruction *ir_build_check_runtime_scope(IrBuilder *irb, Scope *scope,
38344817 return &instruction->base;
38354818}
38364819
3837static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *scope, AstNode *source_node,
3838 IrInstruction *union_type, IrInstruction *field_name, IrInstruction *field_result_loc, IrInstruction *result_loc)
4820static IrInstSrc *ir_build_union_init_named_field(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4821 IrInstSrc *union_type, IrInstSrc *field_name, IrInstSrc *field_result_loc, IrInstSrc *result_loc)
38394822{
3840 IrInstructionUnionInitNamedField *instruction = ir_build_instruction<IrInstructionUnionInitNamedField>(irb, scope, source_node);
4823 IrInstSrcUnionInitNamedField *instruction = ir_build_instruction<IrInstSrcUnionInitNamedField>(irb, scope, source_node);
38414824 instruction->union_type = union_type;
38424825 instruction->field_name = field_name;
38434826 instruction->field_result_loc = field_result_loc;
......@@ -3852,79 +4835,79 @@ static IrInstruction *ir_build_union_init_named_field(IrBuilder *irb, Scope *sco
38524835}
38534836
38544837
3855static IrInstruction *ir_build_vector_to_array(IrAnalyze *ira, IrInstruction *source_instruction,
3856 ZigType *result_type, IrInstruction *vector, IrInstruction *result_loc)
4838static IrInstGen *ir_build_vector_to_array(IrAnalyze *ira, IrInst *source_instruction,
4839 ZigType *result_type, IrInstGen *vector, IrInstGen *result_loc)
38574840{
3858 IrInstructionVectorToArray *instruction = ir_build_instruction<IrInstructionVectorToArray>(&ira->new_irb,
4841 IrInstGenVectorToArray *instruction = ir_build_inst_gen<IrInstGenVectorToArray>(&ira->new_irb,
38594842 source_instruction->scope, source_instruction->source_node);
38604843 instruction->base.value->type = result_type;
38614844 instruction->vector = vector;
38624845 instruction->result_loc = result_loc;
38634846
3864 ir_ref_instruction(vector, ira->new_irb.current_basic_block);
3865 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4847 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
4848 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38664849
38674850 return &instruction->base;
38684851}
38694852
3870static IrInstruction *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instruction,
3871 ZigType *result_type, IrInstruction *operand, IrInstruction *result_loc)
4853static IrInstGen *ir_build_ptr_of_array_to_slice(IrAnalyze *ira, IrInst *source_instruction,
4854 ZigType *result_type, IrInstGen *operand, IrInstGen *result_loc)
38724855{
3873 IrInstructionPtrOfArrayToSlice *instruction = ir_build_instruction<IrInstructionPtrOfArrayToSlice>(&ira->new_irb,
4856 IrInstGenPtrOfArrayToSlice *instruction = ir_build_inst_gen<IrInstGenPtrOfArrayToSlice>(&ira->new_irb,
38744857 source_instruction->scope, source_instruction->source_node);
38754858 instruction->base.value->type = result_type;
38764859 instruction->operand = operand;
38774860 instruction->result_loc = result_loc;
38784861
3879 ir_ref_instruction(operand, ira->new_irb.current_basic_block);
3880 ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4862 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
4863 ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
38814864
38824865 return &instruction->base;
38834866}
38844867
3885static IrInstruction *ir_build_array_to_vector(IrAnalyze *ira, IrInstruction *source_instruction,
3886 IrInstruction *array, ZigType *result_type)
4868static IrInstGen *ir_build_array_to_vector(IrAnalyze *ira, IrInst *source_instruction,
4869 IrInstGen *array, ZigType *result_type)
38874870{
3888 IrInstructionArrayToVector *instruction = ir_build_instruction<IrInstructionArrayToVector>(&ira->new_irb,
4871 IrInstGenArrayToVector *instruction = ir_build_inst_gen<IrInstGenArrayToVector>(&ira->new_irb,
38894872 source_instruction->scope, source_instruction->source_node);
38904873 instruction->base.value->type = result_type;
38914874 instruction->array = array;
38924875
3893 ir_ref_instruction(array, ira->new_irb.current_basic_block);
4876 ir_ref_inst_gen(array, ira->new_irb.current_basic_block);
38944877
38954878 return &instruction->base;
38964879}
38974880
3898static IrInstruction *ir_build_assert_zero(IrAnalyze *ira, IrInstruction *source_instruction,
3899 IrInstruction *target)
4881static IrInstGen *ir_build_assert_zero(IrAnalyze *ira, IrInst *source_instruction,
4882 IrInstGen *target)
39004883{
3901 IrInstructionAssertZero *instruction = ir_build_instruction<IrInstructionAssertZero>(&ira->new_irb,
4884 IrInstGenAssertZero *instruction = ir_build_inst_gen<IrInstGenAssertZero>(&ira->new_irb,
39024885 source_instruction->scope, source_instruction->source_node);
39034886 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
39044887 instruction->target = target;
39054888
3906 ir_ref_instruction(target, ira->new_irb.current_basic_block);
4889 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
39074890
39084891 return &instruction->base;
39094892}
39104893
3911static IrInstruction *ir_build_assert_non_null(IrAnalyze *ira, IrInstruction *source_instruction,
3912 IrInstruction *target)
4894static IrInstGen *ir_build_assert_non_null(IrAnalyze *ira, IrInst *source_instruction,
4895 IrInstGen *target)
39134896{
3914 IrInstructionAssertNonNull *instruction = ir_build_instruction<IrInstructionAssertNonNull>(&ira->new_irb,
4897 IrInstGenAssertNonNull *instruction = ir_build_inst_gen<IrInstGenAssertNonNull>(&ira->new_irb,
39154898 source_instruction->scope, source_instruction->source_node);
39164899 instruction->base.value->type = ira->codegen->builtin_types.entry_void;
39174900 instruction->target = target;
39184901
3919 ir_ref_instruction(target, ira->new_irb.current_basic_block);
4902 ir_ref_inst_gen(target, ira->new_irb.current_basic_block);
39204903
39214904 return &instruction->base;
39224905}
39234906
3924static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3925 IrInstruction *align, const char *name_hint, IrInstruction *is_comptime)
4907static IrInstSrc *ir_build_alloca_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4908 IrInstSrc *align, const char *name_hint, IrInstSrc *is_comptime)
39264909{
3927 IrInstructionAllocaSrc *instruction = ir_build_instruction<IrInstructionAllocaSrc>(irb, scope, source_node);
4910 IrInstSrcAlloca *instruction = ir_build_instruction<IrInstSrcAlloca>(irb, scope, source_node);
39284911 instruction->base.is_gen = true;
39294912 instruction->align = align;
39304913 instruction->name_hint = name_hint;
......@@ -3936,10 +4919,10 @@ static IrInstruction *ir_build_alloca_src(IrBuilder *irb, Scope *scope, AstNode
39364919 return &instruction->base;
39374920}
39384921
3939static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction *source_instruction,
4922static IrInstGenAlloca *ir_build_alloca_gen(IrAnalyze *ira, IrInst *source_instruction,
39404923 uint32_t align, const char *name_hint)
39414924{
3942 IrInstructionAllocaGen *instruction = ir_create_instruction<IrInstructionAllocaGen>(&ira->new_irb,
4925 IrInstGenAlloca *instruction = ir_create_inst_gen<IrInstGenAlloca>(&ira->new_irb,
39434926 source_instruction->scope, source_instruction->source_node);
39444927 instruction->align = align;
39454928 instruction->name_hint = name_hint;
......@@ -3947,10 +4930,10 @@ static IrInstructionAllocaGen *ir_build_alloca_gen(IrAnalyze *ira, IrInstruction
39474930 return instruction;
39484931}
39494932
3950static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
3951 IrInstruction *value, ResultLoc *result_loc)
4933static IrInstSrc *ir_build_end_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4934 IrInstSrc *value, ResultLoc *result_loc)
39524935{
3953 IrInstructionEndExpr *instruction = ir_build_instruction<IrInstructionEndExpr>(irb, scope, source_node);
4936 IrInstSrcEndExpr *instruction = ir_build_instruction<IrInstSrcEndExpr>(irb, scope, source_node);
39544937 instruction->base.is_gen = true;
39554938 instruction->value = value;
39564939 instruction->result_loc = result_loc;
......@@ -3960,29 +4943,41 @@ static IrInstruction *ir_build_end_expr(IrBuilder *irb, Scope *scope, AstNode *s
39604943 return &instruction->base;
39614944}
39624945
3963static IrInstructionSuspendBegin *ir_build_suspend_begin(IrBuilder *irb, Scope *scope, AstNode *source_node) {
3964 IrInstructionSuspendBegin *instruction = ir_build_instruction<IrInstructionSuspendBegin>(irb, scope, source_node);
3965 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
4946static IrInstSrcSuspendBegin *ir_build_suspend_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node) {
4947 return ir_build_instruction<IrInstSrcSuspendBegin>(irb, scope, source_node);
4948}
39664949
3967 return instruction;
4950static IrInstGen *ir_build_suspend_begin_gen(IrAnalyze *ira, IrInst *source_instr) {
4951 IrInstGenSuspendBegin *inst = ir_build_inst_void<IrInstGenSuspendBegin>(&ira->new_irb,
4952 source_instr->scope, source_instr->source_node);
4953 return &inst->base;
39684954}
39694955
3970static IrInstruction *ir_build_suspend_finish(IrBuilder *irb, Scope *scope, AstNode *source_node,
3971 IrInstructionSuspendBegin *begin)
4956static IrInstSrc *ir_build_suspend_finish_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4957 IrInstSrcSuspendBegin *begin)
39724958{
3973 IrInstructionSuspendFinish *instruction = ir_build_instruction<IrInstructionSuspendFinish>(irb, scope, source_node);
3974 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
3975 instruction->begin = begin;
4959 IrInstSrcSuspendFinish *inst = ir_build_instruction<IrInstSrcSuspendFinish>(irb, scope, source_node);
4960 inst->begin = begin;
39764961
39774962 ir_ref_instruction(&begin->base, irb->current_basic_block);
39784963
3979 return &instruction->base;
4964 return &inst->base;
39804965}
39814966
3982static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
3983 IrInstruction *frame, ResultLoc *result_loc)
4967static IrInstGen *ir_build_suspend_finish_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSuspendBegin *begin) {
4968 IrInstGenSuspendFinish *inst = ir_build_inst_void<IrInstGenSuspendFinish>(&ira->new_irb,
4969 source_instr->scope, source_instr->source_node);
4970 inst->begin = begin;
4971
4972 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
4973
4974 return &inst->base;
4975}
4976
4977static IrInstSrc *ir_build_await_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
4978 IrInstSrc *frame, ResultLoc *result_loc)
39844979{
3985 IrInstructionAwaitSrc *instruction = ir_build_instruction<IrInstructionAwaitSrc>(irb, scope, source_node);
4980 IrInstSrcAwait *instruction = ir_build_instruction<IrInstSrcAwait>(irb, scope, source_node);
39864981 instruction->frame = frame;
39874982 instruction->result_loc = result_loc;
39884983
......@@ -3991,24 +4986,23 @@ static IrInstruction *ir_build_await_src(IrBuilder *irb, Scope *scope, AstNode *
39914986 return &instruction->base;
39924987}
39934988
3994static IrInstructionAwaitGen *ir_build_await_gen(IrAnalyze *ira, IrInstruction *source_instruction,
3995 IrInstruction *frame, ZigType *result_type, IrInstruction *result_loc)
4989static IrInstGenAwait *ir_build_await_gen(IrAnalyze *ira, IrInst *source_instruction,
4990 IrInstGen *frame, ZigType *result_type, IrInstGen *result_loc)
39964991{
3997 IrInstructionAwaitGen *instruction = ir_build_instruction<IrInstructionAwaitGen>(&ira->new_irb,
4992 IrInstGenAwait *instruction = ir_build_inst_gen<IrInstGenAwait>(&ira->new_irb,
39984993 source_instruction->scope, source_instruction->source_node);
39994994 instruction->base.value->type = result_type;
40004995 instruction->frame = frame;
40014996 instruction->result_loc = result_loc;
40024997
4003 ir_ref_instruction(frame, ira->new_irb.current_basic_block);
4004 if (result_loc != nullptr) ir_ref_instruction(result_loc, ira->new_irb.current_basic_block);
4998 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
4999 if (result_loc != nullptr) ir_ref_inst_gen(result_loc, ira->new_irb.current_basic_block);
40055000
40065001 return instruction;
40075002}
40085003
4009static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *frame) {
4010 IrInstructionResume *instruction = ir_build_instruction<IrInstructionResume>(irb, scope, source_node);
4011 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
5004static IrInstSrc *ir_build_resume_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, IrInstSrc *frame) {
5005 IrInstSrcResume *instruction = ir_build_instruction<IrInstSrcResume>(irb, scope, source_node);
40125006 instruction->frame = frame;
40135007
40145008 ir_ref_instruction(frame, irb->current_basic_block);
......@@ -4016,12 +5010,20 @@ static IrInstruction *ir_build_resume(IrBuilder *irb, Scope *scope, AstNode *sou
40165010 return &instruction->base;
40175011}
40185012
4019static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scope, AstNode *source_node,
4020 IrInstruction *operand, SpillId spill_id)
5013static IrInstGen *ir_build_resume_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *frame) {
5014 IrInstGenResume *instruction = ir_build_inst_void<IrInstGenResume>(&ira->new_irb,
5015 source_instr->scope, source_instr->source_node);
5016 instruction->frame = frame;
5017
5018 ir_ref_inst_gen(frame, ira->new_irb.current_basic_block);
5019
5020 return &instruction->base;
5021}
5022
5023static IrInstSrcSpillBegin *ir_build_spill_begin_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5024 IrInstSrc *operand, SpillId spill_id)
40215025{
4022 IrInstructionSpillBegin *instruction = ir_build_instruction<IrInstructionSpillBegin>(irb, scope, source_node);
4023 instruction->base.value->special = ConstValSpecialStatic;
4024 instruction->base.value->type = irb->codegen->builtin_types.entry_void;
5026 IrInstSrcSpillBegin *instruction = ir_build_instruction<IrInstSrcSpillBegin>(irb, scope, source_node);
40255027 instruction->operand = operand;
40265028 instruction->spill_id = spill_id;
40275029
......@@ -4030,10 +5032,23 @@ static IrInstructionSpillBegin *ir_build_spill_begin(IrBuilder *irb, Scope *scop
40305032 return instruction;
40315033}
40325034
4033static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *source_node,
4034 IrInstructionSpillBegin *begin)
5035static IrInstGen *ir_build_spill_begin_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGen *operand,
5036 SpillId spill_id)
5037{
5038 IrInstGenSpillBegin *instruction = ir_build_inst_void<IrInstGenSpillBegin>(&ira->new_irb,
5039 source_instr->scope, source_instr->source_node);
5040 instruction->operand = operand;
5041 instruction->spill_id = spill_id;
5042
5043 ir_ref_inst_gen(operand, ira->new_irb.current_basic_block);
5044
5045 return &instruction->base;
5046}
5047
5048static IrInstSrc *ir_build_spill_end_src(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
5049 IrInstSrcSpillBegin *begin)
40355050{
4036 IrInstructionSpillEnd *instruction = ir_build_instruction<IrInstructionSpillEnd>(irb, scope, source_node);
5051 IrInstSrcSpillEnd *instruction = ir_build_instruction<IrInstSrcSpillEnd>(irb, scope, source_node);
40375052 instruction->begin = begin;
40385053
40395054 ir_ref_instruction(&begin->base, irb->current_basic_block);
......@@ -4041,22 +5056,35 @@ static IrInstruction *ir_build_spill_end(IrBuilder *irb, Scope *scope, AstNode *
40415056 return &instruction->base;
40425057}
40435058
4044static IrInstruction *ir_build_vector_extract_elem(IrAnalyze *ira, IrInstruction *source_instruction,
4045 IrInstruction *vector, IrInstruction *index)
5059static IrInstGen *ir_build_spill_end_gen(IrAnalyze *ira, IrInst *source_instr, IrInstGenSpillBegin *begin,
5060 ZigType *result_type)
5061{
5062 IrInstGenSpillEnd *instruction = ir_build_inst_gen<IrInstGenSpillEnd>(&ira->new_irb,
5063 source_instr->scope, source_instr->source_node);
5064 instruction->base.value->type = result_type;
5065 instruction->begin = begin;
5066
5067 ir_ref_inst_gen(&begin->base, ira->new_irb.current_basic_block);
5068
5069 return &instruction->base;
5070}
5071
5072static IrInstGen *ir_build_vector_extract_elem(IrAnalyze *ira, IrInst *source_instruction,
5073 IrInstGen *vector, IrInstGen *index)
40465074{
4047 IrInstructionVectorExtractElem *instruction = ir_build_instruction<IrInstructionVectorExtractElem>(
5075 IrInstGenVectorExtractElem *instruction = ir_build_inst_gen<IrInstGenVectorExtractElem>(
40485076 &ira->new_irb, source_instruction->scope, source_instruction->source_node);
40495077 instruction->base.value->type = vector->value->type->data.vector.elem_type;
40505078 instruction->vector = vector;
40515079 instruction->index = index;
40525080
4053 ir_ref_instruction(vector, ira->new_irb.current_basic_block);
4054 ir_ref_instruction(index, ira->new_irb.current_basic_block);
5081 ir_ref_inst_gen(vector, ira->new_irb.current_basic_block);
5082 ir_ref_inst_gen(index, ira->new_irb.current_basic_block);
40555083
40565084 return &instruction->base;
40575085}
40585086
4059static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
5087static void ir_count_defers(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, size_t *results) {
40605088 results[ReturnKindUnconditional] = 0;
40615089 results[ReturnKindError] = 0;
40625090
......@@ -4093,12 +5121,12 @@ static void ir_count_defers(IrBuilder *irb, Scope *inner_scope, Scope *outer_sco
40935121 }
40945122}
40955123
4096static IrInstruction *ir_mark_gen(IrInstruction *instruction) {
5124static IrInstSrc *ir_mark_gen(IrInstSrc *instruction) {
40975125 instruction->is_gen = true;
40985126 return instruction;
40995127}
41005128
4101static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
5129static bool ir_gen_defers_for_block(IrBuilderSrc *irb, Scope *inner_scope, Scope *outer_scope, bool gen_error_defers) {
41025130 Scope *scope = inner_scope;
41035131 bool is_noreturn = false;
41045132 while (scope != outer_scope) {
......@@ -4115,11 +5143,9 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
41155143 {
41165144 AstNode *defer_expr_node = defer_node->data.defer.expr;
41175145 Scope *defer_expr_scope = defer_node->data.defer.expr_scope;
4118 IrInstruction *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
4119 if (defer_expr_value != irb->codegen->invalid_instruction) {
4120 if (defer_expr_value->value->type != nullptr &&
4121 defer_expr_value->value->type->id == ZigTypeIdUnreachable)
4122 {
5146 IrInstSrc *defer_expr_value = ir_gen_node(irb, defer_expr_node, defer_expr_scope);
5147 if (defer_expr_value != irb->codegen->invalid_inst_src) {
5148 if (defer_expr_value->is_noreturn) {
41235149 is_noreturn = true;
41245150 } else {
41255151 ir_mark_gen(ir_build_check_statement_is_void(irb, defer_expr_scope, defer_expr_node,
......@@ -4151,13 +5177,17 @@ static bool ir_gen_defers_for_block(IrBuilder *irb, Scope *inner_scope, Scope *o
41515177 return is_noreturn;
41525178}
41535179
4154static void ir_set_cursor_at_end(IrBuilder *irb, IrBasicBlock *basic_block) {
5180static void ir_set_cursor_at_end_gen(IrBuilderGen *irb, IrBasicBlockGen *basic_block) {
41555181 assert(basic_block);
5182 irb->current_basic_block = basic_block;
5183}
41565184
5185static void ir_set_cursor_at_end(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
5186 assert(basic_block);
41575187 irb->current_basic_block = basic_block;
41585188}
41595189
4160static void ir_set_cursor_at_end_and_append_block(IrBuilder *irb, IrBasicBlock *basic_block) {
5190static void ir_set_cursor_at_end_and_append_block(IrBuilderSrc *irb, IrBasicBlockSrc *basic_block) {
41615191 basic_block->index = irb->exec->basic_block_list.length;
41625192 irb->exec->basic_block_list.append(basic_block);
41635193 ir_set_cursor_at_end(irb, basic_block);
......@@ -4187,7 +5217,7 @@ static ScopeDeferExpr *get_scope_defer_expr(Scope *scope) {
41875217 return nullptr;
41885218}
41895219
4190static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5220static IrInstSrc *ir_gen_return(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
41915221 assert(node->type == NodeTypeReturnExpr);
41925222
41935223 ScopeDeferExpr *scope_defer_expr = get_scope_defer_expr(scope);
......@@ -4196,7 +5226,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
41965226 add_node_error(irb->codegen, node, buf_sprintf("cannot return from defer expression"));
41975227 scope_defer_expr->reported_err = true;
41985228 }
4199 return irb->codegen->invalid_instruction;
5229 return irb->codegen->invalid_inst_src;
42005230 }
42015231
42025232 Scope *outer_scope = irb->exec->begin_scope;
......@@ -4209,15 +5239,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42095239 result_loc_ret->base.id = ResultLocIdReturn;
42105240 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
42115241
4212 IrInstruction *return_value;
5242 IrInstSrc *return_value;
42135243 if (expr_node) {
42145244 // Temporarily set this so that if we return a type it gets the name of the function
42155245 ZigFn *prev_name_fn = irb->exec->name_fn;
42165246 irb->exec->name_fn = exec_fn_entry(irb->exec);
42175247 return_value = ir_gen_node_extra(irb, expr_node, scope, LValNone, &result_loc_ret->base);
42185248 irb->exec->name_fn = prev_name_fn;
4219 if (return_value == irb->codegen->invalid_instruction)
4220 return irb->codegen->invalid_instruction;
5249 if (return_value == irb->codegen->invalid_inst_src)
5250 return irb->codegen->invalid_inst_src;
42215251 } else {
42225252 return_value = ir_build_const_void(irb, scope, node);
42235253 }
......@@ -4230,22 +5260,22 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42305260 if (!have_err_defers && !irb->codegen->have_err_ret_tracing) {
42315261 // only generate unconditional defers
42325262 ir_gen_defers_for_block(irb, scope, outer_scope, false);
4233 IrInstruction *result = ir_build_return(irb, scope, node, return_value);
5263 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
42345264 result_loc_ret->base.source_instruction = result;
42355265 return result;
42365266 }
42375267 bool should_inline = ir_should_inline(irb->exec, scope);
42385268
4239 IrBasicBlock *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
4240 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
5269 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, scope, "ErrRetErr");
5270 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "ErrRetOk");
42415271
42425272 if (!have_err_defers) {
42435273 ir_gen_defers_for_block(irb, scope, outer_scope, false);
42445274 }
42455275
4246 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
5276 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, return_value, false, true);
42475277
4248 IrInstruction *is_comptime;
5278 IrInstSrc *is_comptime;
42495279 if (should_inline) {
42505280 is_comptime = ir_build_const_bool(irb, scope, node, should_inline);
42515281 } else {
......@@ -4253,14 +5283,14 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42535283 }
42545284
42555285 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err, err_block, ok_block, is_comptime));
4256 IrBasicBlock *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
5286 IrBasicBlockSrc *ret_stmt_block = ir_create_basic_block(irb, scope, "RetStmt");
42575287
42585288 ir_set_cursor_at_end_and_append_block(irb, err_block);
42595289 if (have_err_defers) {
42605290 ir_gen_defers_for_block(irb, scope, outer_scope, true);
42615291 }
42625292 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4263 ir_build_save_err_ret_addr(irb, scope, node);
5293 ir_build_save_err_ret_addr_src(irb, scope, node);
42645294 }
42655295 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42665296
......@@ -4271,21 +5301,21 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42715301 ir_build_br(irb, scope, node, ret_stmt_block, is_comptime);
42725302
42735303 ir_set_cursor_at_end_and_append_block(irb, ret_stmt_block);
4274 IrInstruction *result = ir_build_return(irb, scope, node, return_value);
5304 IrInstSrc *result = ir_build_return_src(irb, scope, node, return_value);
42755305 result_loc_ret->base.source_instruction = result;
42765306 return result;
42775307 }
42785308 case ReturnKindError:
42795309 {
42805310 assert(expr_node);
4281 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
4282 if (err_union_ptr == irb->codegen->invalid_instruction)
4283 return irb->codegen->invalid_instruction;
4284 IrInstruction *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
4285
4286 IrBasicBlock *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
4287 IrBasicBlock *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
4288 IrInstruction *is_comptime;
5311 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
5312 if (err_union_ptr == irb->codegen->invalid_inst_src)
5313 return irb->codegen->invalid_inst_src;
5314 IrInstSrc *is_err_val = ir_build_test_err_src(irb, scope, node, err_union_ptr, true, false);
5315
5316 IrBasicBlockSrc *return_block = ir_create_basic_block(irb, scope, "ErrRetReturn");
5317 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, scope, "ErrRetContinue");
5318 IrInstSrc *is_comptime;
42895319 bool should_inline = ir_should_inline(irb->exec, scope);
42905320 if (should_inline) {
42915321 is_comptime = ir_build_const_bool(irb, scope, node, true);
......@@ -4295,10 +5325,10 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
42955325 ir_mark_gen(ir_build_cond_br(irb, scope, node, is_err_val, return_block, continue_block, is_comptime));
42965326
42975327 ir_set_cursor_at_end_and_append_block(irb, return_block);
4298 IrInstruction *err_val_ptr = ir_build_unwrap_err_code(irb, scope, node, err_union_ptr);
4299 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
5328 IrInstSrc *err_val_ptr = ir_build_unwrap_err_code_src(irb, scope, node, err_union_ptr);
5329 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
43005330 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, node, err_val, nullptr));
4301 IrInstructionSpillBegin *spill_begin = ir_build_spill_begin(irb, scope, node, err_val,
5331 IrInstSrcSpillBegin *spill_begin = ir_build_spill_begin_src(irb, scope, node, err_val,
43025332 SpillIdRetErrCode);
43035333 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
43045334 result_loc_ret->base.id = ResultLocIdReturn;
......@@ -4306,15 +5336,15 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
43065336 ir_build_end_expr(irb, scope, node, err_val, &result_loc_ret->base);
43075337 if (!ir_gen_defers_for_block(irb, scope, outer_scope, true)) {
43085338 if (irb->codegen->have_err_ret_tracing && !should_inline) {
4309 ir_build_save_err_ret_addr(irb, scope, node);
5339 ir_build_save_err_ret_addr_src(irb, scope, node);
43105340 }
4311 err_val = ir_build_spill_end(irb, scope, node, spill_begin);
4312 IrInstruction *ret_inst = ir_build_return(irb, scope, node, err_val);
5341 err_val = ir_build_spill_end_src(irb, scope, node, spill_begin);
5342 IrInstSrc *ret_inst = ir_build_return_src(irb, scope, node, err_val);
43135343 result_loc_ret->base.source_instruction = ret_inst;
43145344 }
43155345
43165346 ir_set_cursor_at_end_and_append_block(irb, continue_block);
4317 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, scope, node, err_union_ptr, false, false);
5347 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, scope, node, err_union_ptr, false, false);
43185348 if (lval == LValPtr)
43195349 return unwrapped_ptr;
43205350 else
......@@ -4325,7 +5355,7 @@ static IrInstruction *ir_gen_return(IrBuilder *irb, Scope *scope, AstNode *node,
43255355}
43265356
43275357static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_scope,
4328 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime,
5358 Buf *name, bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime,
43295359 bool skip_name_check)
43305360{
43315361 ZigVar *variable_entry = allocate<ZigVar>(1, "ZigVar");
......@@ -4336,7 +5366,7 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
43365366 variable_entry->const_value = create_const_vals(1);
43375367
43385368 if (is_comptime != nullptr) {
4339 is_comptime->ref_count += 1;
5369 is_comptime->base.ref_count += 1;
43405370 }
43415371
43425372 if (name) {
......@@ -4386,8 +5416,8 @@ static ZigVar *create_local_var(CodeGen *codegen, AstNode *node, Scope *parent_s
43865416
43875417// Set name to nullptr to make the variable anonymous (not visible to programmer).
43885418// After you call this function var->child_scope has the variable in scope
4389static ZigVar *ir_create_var(IrBuilder *irb, AstNode *node, Scope *scope, Buf *name,
4390 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstruction *is_comptime)
5419static ZigVar *ir_create_var(IrBuilderSrc *irb, AstNode *node, Scope *scope, Buf *name,
5420 bool src_is_const, bool gen_is_const, bool is_shadowable, IrInstSrc *is_comptime)
43915421{
43925422 bool is_underscored = name ? buf_eql_str(name, "_") : false;
43935423 ZigVar *var = create_local_var(irb->codegen, node, scope,
......@@ -4409,13 +5439,13 @@ static ResultLocPeer *create_peer_result(ResultLocPeerParent *peer_parent) {
44095439 return result;
44105440}
44115441
4412static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
5442static IrInstSrc *ir_gen_block(IrBuilderSrc *irb, Scope *parent_scope, AstNode *block_node, LVal lval,
44135443 ResultLoc *result_loc)
44145444{
44155445 assert(block_node->type == NodeTypeBlock);
44165446
4417 ZigList<IrInstruction *> incoming_values = {0};
4418 ZigList<IrBasicBlock *> incoming_blocks = {0};
5447 ZigList<IrInstSrc *> incoming_values = {0};
5448 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
44195449
44205450 ScopeBlock *scope_block = create_block_scope(irb->codegen, block_node, parent_scope);
44215451
......@@ -4451,11 +5481,11 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44515481 }
44525482
44535483 bool is_continuation_unreachable = false;
4454 IrInstruction *noreturn_return_value = nullptr;
5484 IrInstSrc *noreturn_return_value = nullptr;
44555485 for (size_t i = 0; i < block_node->data.block.statements.length; i += 1) {
44565486 AstNode *statement_node = block_node->data.block.statements.at(i);
44575487
4458 IrInstruction *statement_value = ir_gen_node(irb, statement_node, child_scope);
5488 IrInstSrc *statement_value = ir_gen_node(irb, statement_node, child_scope);
44595489 is_continuation_unreachable = instr_is_unreachable(statement_value);
44605490 if (is_continuation_unreachable) {
44615491 // keep the last noreturn statement value around in case we need to return it
......@@ -4463,15 +5493,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44635493 }
44645494 // This logic must be kept in sync with
44655495 // [STMT_EXPR_TEST_THING] <--- (search this token)
4466 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_instruction) {
5496 if (statement_node->type == NodeTypeDefer && statement_value != irb->codegen->invalid_inst_src) {
44675497 // defer starts a new scope
44685498 child_scope = statement_node->data.defer.child_scope;
44695499 assert(child_scope);
4470 } else if (statement_value->id == IrInstructionIdDeclVarSrc) {
5500 } else if (statement_value->id == IrInstSrcIdDeclVar) {
44715501 // variable declarations start a new scope
4472 IrInstructionDeclVarSrc *decl_var_instruction = (IrInstructionDeclVarSrc *)statement_value;
5502 IrInstSrcDeclVar *decl_var_instruction = (IrInstSrcDeclVar *)statement_value;
44735503 child_scope = decl_var_instruction->var->child_scope;
4474 } else if (statement_value != irb->codegen->invalid_instruction && !is_continuation_unreachable) {
5504 } else if (statement_value != irb->codegen->invalid_inst_src && !is_continuation_unreachable) {
44755505 // this statement's value must be void
44765506 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, statement_node, statement_value));
44775507 }
......@@ -4487,12 +5517,12 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
44875517 scope_block->peer_parent->peers.last()->next_bb = scope_block->end_block;
44885518 }
44895519 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4490 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
5520 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
44915521 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
44925522 return ir_expr_wrap(irb, parent_scope, phi, result_loc);
44935523 } else {
44945524 incoming_blocks.append(irb->current_basic_block);
4495 IrInstruction *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
5525 IrInstSrc *else_expr_result = ir_mark_gen(ir_build_const_void(irb, parent_scope, block_node));
44965526
44975527 if (scope_block->peer_parent != nullptr) {
44985528 ResultLocPeer *peer_result = create_peer_result(scope_block->peer_parent);
......@@ -4512,15 +5542,15 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
45125542 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
45135543 }
45145544
4515 IrInstruction *result;
5545 IrInstSrc *result;
45165546 if (block_node->data.block.name != nullptr) {
45175547 ir_mark_gen(ir_build_br(irb, parent_scope, block_node, scope_block->end_block, scope_block->is_comptime));
45185548 ir_set_cursor_at_end_and_append_block(irb, scope_block->end_block);
4519 IrInstruction *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
5549 IrInstSrc *phi = ir_build_phi(irb, parent_scope, block_node, incoming_blocks.length,
45205550 incoming_blocks.items, incoming_values.items, scope_block->peer_parent);
45215551 result = ir_expr_wrap(irb, parent_scope, phi, result_loc);
45225552 } else {
4523 IrInstruction *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
5553 IrInstSrc *void_inst = ir_mark_gen(ir_build_const_void(irb, child_scope, block_node));
45245554 result = ir_lval_wrap(irb, parent_scope, void_inst, lval, result_loc);
45255555 }
45265556 if (!is_return_from_fn)
......@@ -4535,30 +5565,30 @@ static IrInstruction *ir_gen_block(IrBuilder *irb, Scope *parent_scope, AstNode
45355565 ir_build_reset_result(irb, parent_scope, block_node, &result_loc_ret->base);
45365566 ir_mark_gen(ir_build_end_expr(irb, parent_scope, block_node, result, &result_loc_ret->base));
45375567 ir_gen_defers_for_block(irb, child_scope, outer_block_scope, false);
4538 return ir_mark_gen(ir_build_return(irb, child_scope, result->source_node, result));
5568 return ir_mark_gen(ir_build_return_src(irb, child_scope, result->base.source_node, result));
45395569}
45405570
4541static IrInstruction *ir_gen_bin_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
5571static IrInstSrc *ir_gen_bin_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
45425572 Scope *inner_scope = scope;
45435573 if (op_id == IrBinOpArrayCat || op_id == IrBinOpArrayMult) {
45445574 inner_scope = create_comptime_scope(irb->codegen, node, scope);
45455575 }
45465576
4547 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
4548 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
5577 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, inner_scope);
5578 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, inner_scope);
45495579
4550 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
4551 return irb->codegen->invalid_instruction;
5580 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
5581 return irb->codegen->invalid_inst_src;
45525582
45535583 return ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
45545584}
45555585
4556static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
4557 IrInstruction *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4558 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5586static IrInstSrc *ir_gen_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5587 IrInstSrc *op1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5588 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
45595589
4560 if (op1 == irb->codegen->invalid_instruction || op2 == irb->codegen->invalid_instruction)
4561 return irb->codegen->invalid_instruction;
5590 if (op1 == irb->codegen->invalid_inst_src || op2 == irb->codegen->invalid_inst_src)
5591 return irb->codegen->invalid_inst_src;
45625592
45635593 // TODO only pass type_name when the || operator is the top level AST node in the var decl expr
45645594 Buf bare_name = BUF_INIT;
......@@ -4567,10 +5597,10 @@ static IrInstruction *ir_gen_merge_err_sets(IrBuilder *irb, Scope *scope, AstNod
45675597 return ir_build_merge_err_sets(irb, scope, node, op1, op2, type_name);
45685598}
45695599
4570static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node) {
4571 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4572 if (lvalue == irb->codegen->invalid_instruction)
4573 return irb->codegen->invalid_instruction;
5600static IrInstSrc *ir_gen_assign(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5601 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5602 if (lvalue == irb->codegen->invalid_inst_src)
5603 return irb->codegen->invalid_inst_src;
45745604
45755605 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1, "ResultLocInstruction");
45765606 result_loc_inst->base.id = ResultLocIdInstruction;
......@@ -4578,49 +5608,49 @@ static IrInstruction *ir_gen_assign(IrBuilder *irb, Scope *scope, AstNode *node)
45785608 ir_ref_instruction(lvalue, irb->current_basic_block);
45795609 ir_build_reset_result(irb, scope, node, &result_loc_inst->base);
45805610
4581 IrInstruction *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
5611 IrInstSrc *rvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op2, scope, LValNone,
45825612 &result_loc_inst->base);
4583 if (rvalue == irb->codegen->invalid_instruction)
4584 return irb->codegen->invalid_instruction;
5613 if (rvalue == irb->codegen->invalid_inst_src)
5614 return irb->codegen->invalid_inst_src;
45855615
45865616 return ir_build_const_void(irb, scope, node);
45875617}
45885618
4589static IrInstruction *ir_gen_assign_merge_err_sets(IrBuilder *irb, Scope *scope, AstNode *node) {
4590 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4591 if (lvalue == irb->codegen->invalid_instruction)
5619static IrInstSrc *ir_gen_assign_merge_err_sets(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
5620 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5621 if (lvalue == irb->codegen->invalid_inst_src)
45925622 return lvalue;
4593 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4594 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4595 if (op2 == irb->codegen->invalid_instruction)
5623 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
5624 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5625 if (op2 == irb->codegen->invalid_inst_src)
45965626 return op2;
4597 IrInstruction *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
5627 IrInstSrc *result = ir_build_merge_err_sets(irb, scope, node, op1, op2, nullptr);
45985628 ir_build_store_ptr(irb, scope, node, lvalue, result);
45995629 return ir_build_const_void(irb, scope, node);
46005630}
46015631
4602static IrInstruction *ir_gen_assign_op(IrBuilder *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
4603 IrInstruction *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
4604 if (lvalue == irb->codegen->invalid_instruction)
5632static IrInstSrc *ir_gen_assign_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrBinOp op_id) {
5633 IrInstSrc *lvalue = ir_gen_node_extra(irb, node->data.bin_op_expr.op1, scope, LValPtr, nullptr);
5634 if (lvalue == irb->codegen->invalid_inst_src)
46055635 return lvalue;
4606 IrInstruction *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
4607 IrInstruction *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4608 if (op2 == irb->codegen->invalid_instruction)
5636 IrInstSrc *op1 = ir_build_load_ptr(irb, scope, node->data.bin_op_expr.op1, lvalue);
5637 IrInstSrc *op2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5638 if (op2 == irb->codegen->invalid_inst_src)
46095639 return op2;
4610 IrInstruction *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
5640 IrInstSrc *result = ir_build_bin_op(irb, scope, node, op_id, op1, op2, true);
46115641 ir_build_store_ptr(irb, scope, node, lvalue, result);
46125642 return ir_build_const_void(irb, scope, node);
46135643}
46145644
4615static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node) {
5645static IrInstSrc *ir_gen_bool_or(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
46165646 assert(node->type == NodeTypeBinOpExpr);
46175647
4618 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4619 if (val1 == irb->codegen->invalid_instruction)
4620 return irb->codegen->invalid_instruction;
4621 IrBasicBlock *post_val1_block = irb->current_basic_block;
5648 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5649 if (val1 == irb->codegen->invalid_inst_src)
5650 return irb->codegen->invalid_inst_src;
5651 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46225652
4623 IrInstruction *is_comptime;
5653 IrInstSrc *is_comptime;
46245654 if (ir_should_inline(irb->exec, scope)) {
46255655 is_comptime = ir_build_const_bool(irb, scope, node, true);
46265656 } else {
......@@ -4628,41 +5658,41 @@ static IrInstruction *ir_gen_bool_or(IrBuilder *irb, Scope *scope, AstNode *node
46285658 }
46295659
46305660 // block for when val1 == false
4631 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
5661 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolOrFalse");
46325662 // block for when val1 == true (don't even evaluate the second part)
4633 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
5663 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolOrTrue");
46345664
46355665 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46365666
46375667 ir_set_cursor_at_end_and_append_block(irb, false_block);
4638 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4639 if (val2 == irb->codegen->invalid_instruction)
4640 return irb->codegen->invalid_instruction;
4641 IrBasicBlock *post_val2_block = irb->current_basic_block;
5668 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5669 if (val2 == irb->codegen->invalid_inst_src)
5670 return irb->codegen->invalid_inst_src;
5671 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46425672
46435673 ir_build_br(irb, scope, node, true_block, is_comptime);
46445674
46455675 ir_set_cursor_at_end_and_append_block(irb, true_block);
46465676
4647 IrInstruction **incoming_values = allocate<IrInstruction *>(2, "IrInstruction *");
5677 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2, "IrInstSrc *");
46485678 incoming_values[0] = val1;
46495679 incoming_values[1] = val2;
4650 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5680 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
46515681 incoming_blocks[0] = post_val1_block;
46525682 incoming_blocks[1] = post_val2_block;
46535683
46545684 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
46555685}
46565686
4657static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *node) {
5687static IrInstSrc *ir_gen_bool_and(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
46585688 assert(node->type == NodeTypeBinOpExpr);
46595689
4660 IrInstruction *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
4661 if (val1 == irb->codegen->invalid_instruction)
4662 return irb->codegen->invalid_instruction;
4663 IrBasicBlock *post_val1_block = irb->current_basic_block;
5690 IrInstSrc *val1 = ir_gen_node(irb, node->data.bin_op_expr.op1, scope);
5691 if (val1 == irb->codegen->invalid_inst_src)
5692 return irb->codegen->invalid_inst_src;
5693 IrBasicBlockSrc *post_val1_block = irb->current_basic_block;
46645694
4665 IrInstruction *is_comptime;
5695 IrInstSrc *is_comptime;
46665696 if (ir_should_inline(irb->exec, scope)) {
46675697 is_comptime = ir_build_const_bool(irb, scope, node, true);
46685698 } else {
......@@ -4670,34 +5700,34 @@ static IrInstruction *ir_gen_bool_and(IrBuilder *irb, Scope *scope, AstNode *nod
46705700 }
46715701
46725702 // block for when val1 == true
4673 IrBasicBlock *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
5703 IrBasicBlockSrc *true_block = ir_create_basic_block(irb, scope, "BoolAndTrue");
46745704 // block for when val1 == false (don't even evaluate the second part)
4675 IrBasicBlock *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
5705 IrBasicBlockSrc *false_block = ir_create_basic_block(irb, scope, "BoolAndFalse");
46765706
46775707 ir_build_cond_br(irb, scope, node, val1, true_block, false_block, is_comptime);
46785708
46795709 ir_set_cursor_at_end_and_append_block(irb, true_block);
4680 IrInstruction *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
4681 if (val2 == irb->codegen->invalid_instruction)
4682 return irb->codegen->invalid_instruction;
4683 IrBasicBlock *post_val2_block = irb->current_basic_block;
5710 IrInstSrc *val2 = ir_gen_node(irb, node->data.bin_op_expr.op2, scope);
5711 if (val2 == irb->codegen->invalid_inst_src)
5712 return irb->codegen->invalid_inst_src;
5713 IrBasicBlockSrc *post_val2_block = irb->current_basic_block;
46845714
46855715 ir_build_br(irb, scope, node, false_block, is_comptime);
46865716
46875717 ir_set_cursor_at_end_and_append_block(irb, false_block);
46885718
4689 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
5719 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
46905720 incoming_values[0] = val1;
46915721 incoming_values[1] = val2;
4692 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5722 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
46935723 incoming_blocks[0] = post_val1_block;
46945724 incoming_blocks[1] = post_val2_block;
46955725
46965726 return ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, nullptr);
46975727}
46985728
4699static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
4700 IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
5729static ResultLocPeerParent *ir_build_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
5730 IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
47015731{
47025732 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
47035733 peer_parent->base.id = ResultLocIdPeerParent;
......@@ -4707,17 +5737,17 @@ static ResultLocPeerParent *ir_build_result_peers(IrBuilder *irb, IrInstruction
47075737 peer_parent->is_comptime = is_comptime;
47085738 peer_parent->parent = parent;
47095739
4710 IrInstruction *popped_inst = irb->current_basic_block->instruction_list.pop();
4711 ir_assert(popped_inst == cond_br_inst, cond_br_inst);
5740 IrInstSrc *popped_inst = irb->current_basic_block->instruction_list.pop();
5741 ir_assert(popped_inst == cond_br_inst, &cond_br_inst->base);
47125742
4713 ir_build_reset_result(irb, cond_br_inst->scope, cond_br_inst->source_node, &peer_parent->base);
5743 ir_build_reset_result(irb, cond_br_inst->base.scope, cond_br_inst->base.source_node, &peer_parent->base);
47145744 irb->current_basic_block->instruction_list.append(popped_inst);
47155745
47165746 return peer_parent;
47175747}
47185748
4719static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstruction *cond_br_inst,
4720 IrBasicBlock *else_block, IrBasicBlock *end_block, ResultLoc *parent, IrInstruction *is_comptime)
5749static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilderSrc *irb, IrInstSrc *cond_br_inst,
5750 IrBasicBlockSrc *else_block, IrBasicBlockSrc *end_block, ResultLoc *parent, IrInstSrc *is_comptime)
47215751{
47225752 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, parent, is_comptime);
47235753
......@@ -4730,7 +5760,7 @@ static ResultLocPeerParent *ir_build_binary_result_peers(IrBuilder *irb, IrInstr
47305760 return peer_parent;
47315761}
47325762
4733static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
5763static IrInstSrc *ir_gen_orelse(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
47345764 ResultLoc *result_loc)
47355765{
47365766 assert(node->type == NodeTypeBinOpExpr);
......@@ -4738,73 +5768,73 @@ static IrInstruction *ir_gen_orelse(IrBuilder *irb, Scope *parent_scope, AstNode
47385768 AstNode *op1_node = node->data.bin_op_expr.op1;
47395769 AstNode *op2_node = node->data.bin_op_expr.op2;
47405770
4741 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
4742 if (maybe_ptr == irb->codegen->invalid_instruction)
4743 return irb->codegen->invalid_instruction;
5771 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
5772 if (maybe_ptr == irb->codegen->invalid_inst_src)
5773 return irb->codegen->invalid_inst_src;
47445774
4745 IrInstruction *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
4746 IrInstruction *is_non_null = ir_build_test_nonnull(irb, parent_scope, node, maybe_val);
5775 IrInstSrc *maybe_val = ir_build_load_ptr(irb, parent_scope, node, maybe_ptr);
5776 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, parent_scope, node, maybe_val);
47475777
4748 IrInstruction *is_comptime;
5778 IrInstSrc *is_comptime;
47495779 if (ir_should_inline(irb->exec, parent_scope)) {
47505780 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
47515781 } else {
47525782 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_non_null);
47535783 }
47545784
4755 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
4756 IrBasicBlock *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
4757 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
4758 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
5785 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "OptionalNonNull");
5786 IrBasicBlockSrc *null_block = ir_create_basic_block(irb, parent_scope, "OptionalNull");
5787 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "OptionalEnd");
5788 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_non_null, ok_block, null_block, is_comptime);
47595789
47605790 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block,
47615791 result_loc, is_comptime);
47625792
47635793 ir_set_cursor_at_end_and_append_block(irb, null_block);
4764 IrInstruction *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
5794 IrInstSrc *null_result = ir_gen_node_extra(irb, op2_node, parent_scope, LValNone,
47655795 &peer_parent->peers.at(0)->base);
4766 if (null_result == irb->codegen->invalid_instruction)
4767 return irb->codegen->invalid_instruction;
4768 IrBasicBlock *after_null_block = irb->current_basic_block;
5796 if (null_result == irb->codegen->invalid_inst_src)
5797 return irb->codegen->invalid_inst_src;
5798 IrBasicBlockSrc *after_null_block = irb->current_basic_block;
47695799 if (!instr_is_unreachable(null_result))
47705800 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
47715801
47725802 ir_set_cursor_at_end_and_append_block(irb, ok_block);
4773 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
4774 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
5803 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, parent_scope, node, maybe_ptr, false, false);
5804 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
47755805 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
4776 IrBasicBlock *after_ok_block = irb->current_basic_block;
5806 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
47775807 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
47785808
47795809 ir_set_cursor_at_end_and_append_block(irb, end_block);
4780 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
5810 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
47815811 incoming_values[0] = null_result;
47825812 incoming_values[1] = unwrapped_payload;
4783 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
5813 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
47845814 incoming_blocks[0] = after_null_block;
47855815 incoming_blocks[1] = after_ok_block;
4786 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
5816 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
47875817 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
47885818}
47895819
4790static IrInstruction *ir_gen_error_union(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
5820static IrInstSrc *ir_gen_error_union(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
47915821 assert(node->type == NodeTypeBinOpExpr);
47925822
47935823 AstNode *op1_node = node->data.bin_op_expr.op1;
47945824 AstNode *op2_node = node->data.bin_op_expr.op2;
47955825
4796 IrInstruction *err_set = ir_gen_node(irb, op1_node, parent_scope);
4797 if (err_set == irb->codegen->invalid_instruction)
4798 return irb->codegen->invalid_instruction;
5826 IrInstSrc *err_set = ir_gen_node(irb, op1_node, parent_scope);
5827 if (err_set == irb->codegen->invalid_inst_src)
5828 return irb->codegen->invalid_inst_src;
47995829
4800 IrInstruction *payload = ir_gen_node(irb, op2_node, parent_scope);
4801 if (payload == irb->codegen->invalid_instruction)
4802 return irb->codegen->invalid_instruction;
5830 IrInstSrc *payload = ir_gen_node(irb, op2_node, parent_scope);
5831 if (payload == irb->codegen->invalid_inst_src)
5832 return irb->codegen->invalid_inst_src;
48035833
48045834 return ir_build_error_union(irb, parent_scope, node, err_set, payload);
48055835}
48065836
4807static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5837static IrInstSrc *ir_gen_bin_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
48085838 assert(node->type == NodeTypeBinOpExpr);
48095839
48105840 BinOpType bin_op_type = node->data.bin_op_expr.bin_op;
......@@ -4897,30 +5927,30 @@ static IrInstruction *ir_gen_bin_op(IrBuilder *irb, Scope *scope, AstNode *node,
48975927 zig_unreachable();
48985928}
48995929
4900static IrInstruction *ir_gen_int_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5930static IrInstSrc *ir_gen_int_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49015931 assert(node->type == NodeTypeIntLiteral);
49025932
49035933 return ir_build_const_bigint(irb, scope, node, node->data.int_literal.bigint);
49045934}
49055935
4906static IrInstruction *ir_gen_float_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5936static IrInstSrc *ir_gen_float_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49075937 assert(node->type == NodeTypeFloatLiteral);
49085938
49095939 if (node->data.float_literal.overflow) {
49105940 add_node_error(irb->codegen, node, buf_sprintf("float literal out of range of any type"));
4911 return irb->codegen->invalid_instruction;
5941 return irb->codegen->invalid_inst_src;
49125942 }
49135943
49145944 return ir_build_const_bigfloat(irb, scope, node, node->data.float_literal.bigfloat);
49155945}
49165946
4917static IrInstruction *ir_gen_char_lit(IrBuilder *irb, Scope *scope, AstNode *node) {
5947static IrInstSrc *ir_gen_char_lit(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49185948 assert(node->type == NodeTypeCharLiteral);
49195949
49205950 return ir_build_const_uint(irb, scope, node, node->data.char_literal.value);
49215951}
49225952
4923static IrInstruction *ir_gen_null_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
5953static IrInstSrc *ir_gen_null_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
49245954 assert(node->type == NodeTypeNullLiteral);
49255955
49265956 return ir_build_const_null(irb, scope, node);
......@@ -4938,11 +5968,11 @@ static void populate_invalid_variable_in_scope(CodeGen *g, Scope *scope, AstNode
49385968 init_tld(&tld_var->base, TldIdVar, var_name, VisibModPub, node, &scope_decls->base);
49395969 tld_var->base.resolution = TldResolutionInvalid;
49405970 tld_var->var = add_variable(g, node, &scope_decls->base, var_name, false,
4941 g->invalid_instruction->value, &tld_var->base, g->builtin_types.entry_invalid);
5971 g->invalid_inst_gen->value, &tld_var->base, g->builtin_types.entry_invalid);
49425972 scope_decls->decl_table.put(var_name, &tld_var->base);
49435973}
49445974
4945static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
5975static IrInstSrc *ir_gen_symbol(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
49465976 Error err;
49475977 assert(node->type == NodeTypeSymbol);
49485978
......@@ -4950,15 +5980,16 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49505980
49515981 if (buf_eql_str(variable_name, "_")) {
49525982 if (lval == LValPtr) {
4953 IrInstructionConst *const_instruction = ir_build_instruction<IrInstructionConst>(irb, scope, node);
4954 const_instruction->base.value->type = get_pointer_to_type(irb->codegen,
5983 IrInstSrcConst *const_instruction = ir_build_instruction<IrInstSrcConst>(irb, scope, node);
5984 const_instruction->value = create_const_vals(1);
5985 const_instruction->value->type = get_pointer_to_type(irb->codegen,
49555986 irb->codegen->builtin_types.entry_void, false);
4956 const_instruction->base.value->special = ConstValSpecialStatic;
4957 const_instruction->base.value->data.x_ptr.special = ConstPtrSpecialDiscard;
5987 const_instruction->value->special = ConstValSpecialStatic;
5988 const_instruction->value->data.x_ptr.special = ConstPtrSpecialDiscard;
49585989 return &const_instruction->base;
49595990 } else {
49605991 add_node_error(irb->codegen, node, buf_sprintf("`_` may only be used to assign things to"));
4961 return irb->codegen->invalid_instruction;
5992 return irb->codegen->invalid_inst_src;
49625993 }
49635994 }
49645995
......@@ -4968,13 +5999,13 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49685999 add_node_error(irb->codegen, node,
49696000 buf_sprintf("primitive integer type '%s' exceeds maximum bit width of 65535",
49706001 buf_ptr(variable_name)));
4971 return irb->codegen->invalid_instruction;
6002 return irb->codegen->invalid_inst_src;
49726003 }
49736004 assert(err == ErrorPrimitiveTypeNotFound);
49746005 } else {
4975 IrInstruction *value = ir_build_const_type(irb, scope, node, primitive_type);
6006 IrInstSrc *value = ir_build_const_type(irb, scope, node, primitive_type);
49766007 if (lval == LValPtr) {
4977 return ir_build_ref(irb, scope, node, value, false, false);
6008 return ir_build_ref_src(irb, scope, node, value, false, false);
49786009 } else {
49796010 return ir_expr_wrap(irb, scope, value, result_loc);
49806011 }
......@@ -4983,7 +6014,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49836014 ScopeFnDef *crossed_fndef_scope;
49846015 ZigVar *var = find_variable(irb->codegen, scope, variable_name, &crossed_fndef_scope);
49856016 if (var) {
4986 IrInstruction *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
6017 IrInstSrc *var_ptr = ir_build_var_ptr_x(irb, scope, node, var, crossed_fndef_scope);
49876018 if (lval == LValPtr) {
49886019 return var_ptr;
49896020 } else {
......@@ -4993,7 +6024,7 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
49936024
49946025 Tld *tld = find_decl(irb->codegen, scope, variable_name);
49956026 if (tld) {
4996 IrInstruction *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
6027 IrInstSrc *decl_ref = ir_build_decl_ref(irb, scope, node, tld, lval);
49976028 if (lval == LValPtr) {
49986029 return decl_ref;
49996030 } else {
......@@ -5004,50 +6035,50 @@ static IrInstruction *ir_gen_symbol(IrBuilder *irb, Scope *scope, AstNode *node,
50046035 if (get_container_scope(node->owner)->any_imports_failed) {
50056036 // skip the error message since we had a failing import in this file
50066037 // if an import breaks we don't need redundant undeclared identifier errors
5007 return irb->codegen->invalid_instruction;
6038 return irb->codegen->invalid_inst_src;
50086039 }
50096040
50106041 return ir_build_undeclared_identifier(irb, scope, node, variable_name);
50116042}
50126043
5013static IrInstruction *ir_gen_array_access(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
6044static IrInstSrc *ir_gen_array_access(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
50146045 ResultLoc *result_loc)
50156046{
50166047 assert(node->type == NodeTypeArrayAccessExpr);
50176048
50186049 AstNode *array_ref_node = node->data.array_access_expr.array_ref_expr;
5019 IrInstruction *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
5020 if (array_ref_instruction == irb->codegen->invalid_instruction)
6050 IrInstSrc *array_ref_instruction = ir_gen_node_extra(irb, array_ref_node, scope, LValPtr, nullptr);
6051 if (array_ref_instruction == irb->codegen->invalid_inst_src)
50216052 return array_ref_instruction;
50226053
50236054 AstNode *subscript_node = node->data.array_access_expr.subscript;
5024 IrInstruction *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
5025 if (subscript_instruction == irb->codegen->invalid_instruction)
6055 IrInstSrc *subscript_instruction = ir_gen_node(irb, subscript_node, scope);
6056 if (subscript_instruction == irb->codegen->invalid_inst_src)
50266057 return subscript_instruction;
50276058
5028 IrInstruction *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
6059 IrInstSrc *ptr_instruction = ir_build_elem_ptr(irb, scope, node, array_ref_instruction,
50296060 subscript_instruction, true, PtrLenSingle, nullptr);
50306061 if (lval == LValPtr)
50316062 return ptr_instruction;
50326063
5033 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
6064 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
50346065 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
50356066}
50366067
5037static IrInstruction *ir_gen_field_access(IrBuilder *irb, Scope *scope, AstNode *node) {
6068static IrInstSrc *ir_gen_field_access(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
50386069 assert(node->type == NodeTypeFieldAccessExpr);
50396070
50406071 AstNode *container_ref_node = node->data.field_access_expr.struct_expr;
50416072 Buf *field_name = node->data.field_access_expr.field_name;
50426073
5043 IrInstruction *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
5044 if (container_ref_instruction == irb->codegen->invalid_instruction)
6074 IrInstSrc *container_ref_instruction = ir_gen_node_extra(irb, container_ref_node, scope, LValPtr, nullptr);
6075 if (container_ref_instruction == irb->codegen->invalid_inst_src)
50456076 return container_ref_instruction;
50466077
50476078 return ir_build_field_ptr(irb, scope, node, container_ref_instruction, field_name, false);
50486079}
50496080
5050static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
6081static IrInstSrc *ir_gen_overflow_op(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrOverflowOp op) {
50516082 assert(node->type == NodeTypeFnCallExpr);
50526083
50536084 AstNode *type_node = node->data.fn_call_expr.params.at(0);
......@@ -5056,26 +6087,26 @@ static IrInstruction *ir_gen_overflow_op(IrBuilder *irb, Scope *scope, AstNode *
50566087 AstNode *result_ptr_node = node->data.fn_call_expr.params.at(3);
50576088
50586089
5059 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
5060 if (type_value == irb->codegen->invalid_instruction)
5061 return irb->codegen->invalid_instruction;
6090 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
6091 if (type_value == irb->codegen->invalid_inst_src)
6092 return irb->codegen->invalid_inst_src;
50626093
5063 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
5064 if (op1 == irb->codegen->invalid_instruction)
5065 return irb->codegen->invalid_instruction;
6094 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
6095 if (op1 == irb->codegen->invalid_inst_src)
6096 return irb->codegen->invalid_inst_src;
50666097
5067 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
5068 if (op2 == irb->codegen->invalid_instruction)
5069 return irb->codegen->invalid_instruction;
6098 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
6099 if (op2 == irb->codegen->invalid_inst_src)
6100 return irb->codegen->invalid_inst_src;
50706101
5071 IrInstruction *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
5072 if (result_ptr == irb->codegen->invalid_instruction)
5073 return irb->codegen->invalid_instruction;
6102 IrInstSrc *result_ptr = ir_gen_node(irb, result_ptr_node, scope);
6103 if (result_ptr == irb->codegen->invalid_inst_src)
6104 return irb->codegen->invalid_inst_src;
50746105
5075 return ir_build_overflow_op(irb, scope, node, op, type_value, op1, op2, result_ptr, nullptr);
6106 return ir_build_overflow_op_src(irb, scope, node, op, type_value, op1, op2, result_ptr);
50766107}
50776108
5078static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node) {
6109static IrInstSrc *ir_gen_mul_add(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
50796110 assert(node->type == NodeTypeFnCallExpr);
50806111
50816112 AstNode *type_node = node->data.fn_call_expr.params.at(0);
......@@ -5083,26 +6114,26 @@ static IrInstruction *ir_gen_mul_add(IrBuilder *irb, Scope *scope, AstNode *node
50836114 AstNode *op2_node = node->data.fn_call_expr.params.at(2);
50846115 AstNode *op3_node = node->data.fn_call_expr.params.at(3);
50856116
5086 IrInstruction *type_value = ir_gen_node(irb, type_node, scope);
5087 if (type_value == irb->codegen->invalid_instruction)
5088 return irb->codegen->invalid_instruction;
6117 IrInstSrc *type_value = ir_gen_node(irb, type_node, scope);
6118 if (type_value == irb->codegen->invalid_inst_src)
6119 return irb->codegen->invalid_inst_src;
50896120
5090 IrInstruction *op1 = ir_gen_node(irb, op1_node, scope);
5091 if (op1 == irb->codegen->invalid_instruction)
5092 return irb->codegen->invalid_instruction;
6121 IrInstSrc *op1 = ir_gen_node(irb, op1_node, scope);
6122 if (op1 == irb->codegen->invalid_inst_src)
6123 return irb->codegen->invalid_inst_src;
50936124
5094 IrInstruction *op2 = ir_gen_node(irb, op2_node, scope);
5095 if (op2 == irb->codegen->invalid_instruction)
5096 return irb->codegen->invalid_instruction;
6125 IrInstSrc *op2 = ir_gen_node(irb, op2_node, scope);
6126 if (op2 == irb->codegen->invalid_inst_src)
6127 return irb->codegen->invalid_inst_src;
50976128
5098 IrInstruction *op3 = ir_gen_node(irb, op3_node, scope);
5099 if (op3 == irb->codegen->invalid_instruction)
5100 return irb->codegen->invalid_instruction;
6129 IrInstSrc *op3 = ir_gen_node(irb, op3_node, scope);
6130 if (op3 == irb->codegen->invalid_inst_src)
6131 return irb->codegen->invalid_inst_src;
51016132
5102 return ir_build_mul_add(irb, scope, node, type_value, op1, op2, op3);
6133 return ir_build_mul_add_src(irb, scope, node, type_value, op1, op2, op3);
51036134}
51046135
5105static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *node) {
6136static IrInstSrc *ir_gen_this(IrBuilderSrc *irb, Scope *orig_scope, AstNode *node) {
51066137 for (Scope *it_scope = orig_scope; it_scope != nullptr; it_scope = it_scope->parent) {
51076138 if (it_scope->id == ScopeIdDecls) {
51086139 ScopeDecls *decls_scope = (ScopeDecls *)it_scope;
......@@ -5117,7 +6148,7 @@ static IrInstruction *ir_gen_this(IrBuilder *irb, Scope *orig_scope, AstNode *no
51176148 zig_unreachable();
51186149}
51196150
5120static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
6151static IrInstSrc *ir_gen_async_call(IrBuilderSrc *irb, Scope *scope, AstNode *await_node, AstNode *call_node,
51216152 LVal lval, ResultLoc *result_loc)
51226153{
51236154 size_t arg_offset = 3;
......@@ -5125,71 +6156,71 @@ static IrInstruction *ir_gen_async_call(IrBuilder *irb, Scope *scope, AstNode *a
51256156 add_node_error(irb->codegen, call_node,
51266157 buf_sprintf("expected at least %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
51276158 arg_offset, call_node->data.fn_call_expr.params.length));
5128 return irb->codegen->invalid_instruction;
6159 return irb->codegen->invalid_inst_src;
51296160 }
51306161
51316162 AstNode *bytes_node = call_node->data.fn_call_expr.params.at(0);
5132 IrInstruction *bytes = ir_gen_node(irb, bytes_node, scope);
5133 if (bytes == irb->codegen->invalid_instruction)
6163 IrInstSrc *bytes = ir_gen_node(irb, bytes_node, scope);
6164 if (bytes == irb->codegen->invalid_inst_src)
51346165 return bytes;
51356166
51366167 AstNode *ret_ptr_node = call_node->data.fn_call_expr.params.at(1);
5137 IrInstruction *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
5138 if (ret_ptr == irb->codegen->invalid_instruction)
6168 IrInstSrc *ret_ptr = ir_gen_node(irb, ret_ptr_node, scope);
6169 if (ret_ptr == irb->codegen->invalid_inst_src)
51396170 return ret_ptr;
51406171
51416172 AstNode *fn_ref_node = call_node->data.fn_call_expr.params.at(2);
5142 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5143 if (fn_ref == irb->codegen->invalid_instruction)
6173 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6174 if (fn_ref == irb->codegen->invalid_inst_src)
51446175 return fn_ref;
51456176
51466177 size_t arg_count = call_node->data.fn_call_expr.params.length - arg_offset;
5147 IrInstruction **args = allocate<IrInstruction*>(arg_count);
6178 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
51486179 for (size_t i = 0; i < arg_count; i += 1) {
51496180 AstNode *arg_node = call_node->data.fn_call_expr.params.at(i + arg_offset);
5150 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
5151 if (arg == irb->codegen->invalid_instruction)
6181 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
6182 if (arg == irb->codegen->invalid_inst_src)
51526183 return arg;
51536184 args[i] = arg;
51546185 }
51556186
51566187 CallModifier modifier = (await_node == nullptr) ? CallModifierAsync : CallModifierNone;
51576188 bool is_async_call_builtin = true;
5158 IrInstruction *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
6189 IrInstSrc *call = ir_build_call_src(irb, scope, call_node, nullptr, fn_ref, arg_count, args,
51596190 ret_ptr, modifier, is_async_call_builtin, bytes, result_loc);
51606191 return ir_lval_wrap(irb, scope, call, lval, result_loc);
51616192}
51626193
5163static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, AstNode *source_node,
5164 AstNode *fn_ref_node, CallModifier modifier, IrInstruction *options,
6194static IrInstSrc *ir_gen_fn_call_with_args(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
6195 AstNode *fn_ref_node, CallModifier modifier, IrInstSrc *options,
51656196 AstNode **args_ptr, size_t args_len, LVal lval, ResultLoc *result_loc)
51666197{
5167 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
5168 if (fn_ref == irb->codegen->invalid_instruction)
6198 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6199 if (fn_ref == irb->codegen->invalid_inst_src)
51696200 return fn_ref;
51706201
5171 IrInstruction *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
6202 IrInstSrc *fn_type = ir_build_typeof(irb, scope, source_node, fn_ref);
51726203
5173 IrInstruction **args = allocate<IrInstruction*>(args_len);
6204 IrInstSrc **args = allocate<IrInstSrc*>(args_len);
51746205 for (size_t i = 0; i < args_len; i += 1) {
51756206 AstNode *arg_node = args_ptr[i];
51766207
5177 IrInstruction *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
5178 IrInstruction *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
6208 IrInstSrc *arg_index = ir_build_const_usize(irb, scope, arg_node, i);
6209 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, source_node, fn_type, arg_index, true);
51796210 ResultLoc *no_result = no_result_loc();
51806211 ir_build_reset_result(irb, scope, source_node, no_result);
51816212 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, arg_type, no_result);
51826213
5183 IrInstruction *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
5184 if (arg == irb->codegen->invalid_instruction)
6214 IrInstSrc *arg = ir_gen_node_extra(irb, arg_node, scope, LValNone, &result_loc_cast->base);
6215 if (arg == irb->codegen->invalid_inst_src)
51856216 return arg;
51866217
51876218 args[i] = ir_build_implicit_cast(irb, scope, arg_node, arg, result_loc_cast);
51886219 }
51896220
5190 IrInstruction *fn_call;
6221 IrInstSrc *fn_call;
51916222 if (options != nullptr) {
5192 fn_call = ir_build_call_src_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
6223 fn_call = ir_build_call_args(irb, scope, source_node, options, fn_ref, args, args_len, result_loc);
51936224 } else {
51946225 fn_call = ir_build_call_src(irb, scope, source_node, nullptr, fn_ref, args_len, args, nullptr,
51956226 modifier, false, nullptr, result_loc);
......@@ -5197,7 +6228,7 @@ static IrInstruction *ir_gen_fn_call_with_args(IrBuilder *irb, Scope *scope, Ast
51976228 return ir_lval_wrap(irb, scope, fn_call, lval, result_loc);
51986229}
51996230
5200static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
6231static IrInstSrc *ir_gen_builtin_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
52016232 ResultLoc *result_loc)
52026233{
52036234 assert(node->type == NodeTypeFnCallExpr);
......@@ -5209,7 +6240,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
52096240 if (!entry) {
52106241 add_node_error(irb->codegen, node,
52116242 buf_sprintf("invalid builtin function: '%s'", buf_ptr(name)));
5212 return irb->codegen->invalid_instruction;
6243 return irb->codegen->invalid_inst_src;
52136244 }
52146245
52156246 BuiltinFnEntry *builtin_fn = entry->value;
......@@ -5219,7 +6250,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
52196250 add_node_error(irb->codegen, node,
52206251 buf_sprintf("expected %" ZIG_PRI_usize " arguments, found %" ZIG_PRI_usize,
52216252 builtin_fn->param_count, actual_param_count));
5222 return irb->codegen->invalid_instruction;
6253 return irb->codegen->invalid_inst_src;
52236254 }
52246255
52256256 switch (builtin_fn->id) {
......@@ -5230,197 +6261,197 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
52306261 Scope *sub_scope = create_typeof_scope(irb->codegen, node, scope);
52316262
52326263 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5233 IrInstruction *arg = ir_gen_node(irb, arg_node, sub_scope);
5234 if (arg == irb->codegen->invalid_instruction)
6264 IrInstSrc *arg = ir_gen_node(irb, arg_node, sub_scope);
6265 if (arg == irb->codegen->invalid_inst_src)
52356266 return arg;
52366267
5237 IrInstruction *type_of = ir_build_typeof(irb, scope, node, arg);
6268 IrInstSrc *type_of = ir_build_typeof(irb, scope, node, arg);
52386269 return ir_lval_wrap(irb, scope, type_of, lval, result_loc);
52396270 }
52406271 case BuiltinFnIdSetCold:
52416272 {
52426273 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5243 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5244 if (arg0_value == irb->codegen->invalid_instruction)
6274 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6275 if (arg0_value == irb->codegen->invalid_inst_src)
52456276 return arg0_value;
52466277
5247 IrInstruction *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
6278 IrInstSrc *set_cold = ir_build_set_cold(irb, scope, node, arg0_value);
52486279 return ir_lval_wrap(irb, scope, set_cold, lval, result_loc);
52496280 }
52506281 case BuiltinFnIdSetRuntimeSafety:
52516282 {
52526283 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5253 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5254 if (arg0_value == irb->codegen->invalid_instruction)
6284 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6285 if (arg0_value == irb->codegen->invalid_inst_src)
52556286 return arg0_value;
52566287
5257 IrInstruction *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
6288 IrInstSrc *set_safety = ir_build_set_runtime_safety(irb, scope, node, arg0_value);
52586289 return ir_lval_wrap(irb, scope, set_safety, lval, result_loc);
52596290 }
52606291 case BuiltinFnIdSetFloatMode:
52616292 {
52626293 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5263 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5264 if (arg0_value == irb->codegen->invalid_instruction)
6294 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6295 if (arg0_value == irb->codegen->invalid_inst_src)
52656296 return arg0_value;
52666297
5267 IrInstruction *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
6298 IrInstSrc *set_float_mode = ir_build_set_float_mode(irb, scope, node, arg0_value);
52686299 return ir_lval_wrap(irb, scope, set_float_mode, lval, result_loc);
52696300 }
52706301 case BuiltinFnIdSizeof:
52716302 case BuiltinFnIdBitSizeof:
52726303 {
52736304 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5274 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5275 if (arg0_value == irb->codegen->invalid_instruction)
6305 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6306 if (arg0_value == irb->codegen->invalid_inst_src)
52766307 return arg0_value;
52776308
5278 IrInstruction *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
6309 IrInstSrc *size_of = ir_build_size_of(irb, scope, node, arg0_value, builtin_fn->id == BuiltinFnIdBitSizeof);
52796310 return ir_lval_wrap(irb, scope, size_of, lval, result_loc);
52806311 }
52816312 case BuiltinFnIdImport:
52826313 {
52836314 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5284 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5285 if (arg0_value == irb->codegen->invalid_instruction)
6315 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6316 if (arg0_value == irb->codegen->invalid_inst_src)
52866317 return arg0_value;
52876318
5288 IrInstruction *import = ir_build_import(irb, scope, node, arg0_value);
6319 IrInstSrc *import = ir_build_import(irb, scope, node, arg0_value);
52896320 return ir_lval_wrap(irb, scope, import, lval, result_loc);
52906321 }
52916322 case BuiltinFnIdCImport:
52926323 {
5293 IrInstruction *c_import = ir_build_c_import(irb, scope, node);
6324 IrInstSrc *c_import = ir_build_c_import(irb, scope, node);
52946325 return ir_lval_wrap(irb, scope, c_import, lval, result_loc);
52956326 }
52966327 case BuiltinFnIdCInclude:
52976328 {
52986329 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5299 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5300 if (arg0_value == irb->codegen->invalid_instruction)
6330 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6331 if (arg0_value == irb->codegen->invalid_inst_src)
53016332 return arg0_value;
53026333
53036334 if (!exec_c_import_buf(irb->exec)) {
53046335 add_node_error(irb->codegen, node, buf_sprintf("C include valid only inside C import block"));
5305 return irb->codegen->invalid_instruction;
6336 return irb->codegen->invalid_inst_src;
53066337 }
53076338
5308 IrInstruction *c_include = ir_build_c_include(irb, scope, node, arg0_value);
6339 IrInstSrc *c_include = ir_build_c_include(irb, scope, node, arg0_value);
53096340 return ir_lval_wrap(irb, scope, c_include, lval, result_loc);
53106341 }
53116342 case BuiltinFnIdCDefine:
53126343 {
53136344 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5314 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5315 if (arg0_value == irb->codegen->invalid_instruction)
6345 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6346 if (arg0_value == irb->codegen->invalid_inst_src)
53166347 return arg0_value;
53176348
53186349 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5319 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5320 if (arg1_value == irb->codegen->invalid_instruction)
6350 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6351 if (arg1_value == irb->codegen->invalid_inst_src)
53216352 return arg1_value;
53226353
53236354 if (!exec_c_import_buf(irb->exec)) {
53246355 add_node_error(irb->codegen, node, buf_sprintf("C define valid only inside C import block"));
5325 return irb->codegen->invalid_instruction;
6356 return irb->codegen->invalid_inst_src;
53266357 }
53276358
5328 IrInstruction *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
6359 IrInstSrc *c_define = ir_build_c_define(irb, scope, node, arg0_value, arg1_value);
53296360 return ir_lval_wrap(irb, scope, c_define, lval, result_loc);
53306361 }
53316362 case BuiltinFnIdCUndef:
53326363 {
53336364 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5334 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5335 if (arg0_value == irb->codegen->invalid_instruction)
6365 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6366 if (arg0_value == irb->codegen->invalid_inst_src)
53366367 return arg0_value;
53376368
53386369 if (!exec_c_import_buf(irb->exec)) {
53396370 add_node_error(irb->codegen, node, buf_sprintf("C undef valid only inside C import block"));
5340 return irb->codegen->invalid_instruction;
6371 return irb->codegen->invalid_inst_src;
53416372 }
53426373
5343 IrInstruction *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
6374 IrInstSrc *c_undef = ir_build_c_undef(irb, scope, node, arg0_value);
53446375 return ir_lval_wrap(irb, scope, c_undef, lval, result_loc);
53456376 }
53466377 case BuiltinFnIdCompileErr:
53476378 {
53486379 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5349 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5350 if (arg0_value == irb->codegen->invalid_instruction)
6380 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6381 if (arg0_value == irb->codegen->invalid_inst_src)
53516382 return arg0_value;
53526383
5353 IrInstruction *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
6384 IrInstSrc *compile_err = ir_build_compile_err(irb, scope, node, arg0_value);
53546385 return ir_lval_wrap(irb, scope, compile_err, lval, result_loc);
53556386 }
53566387 case BuiltinFnIdCompileLog:
53576388 {
5358 IrInstruction **args = allocate<IrInstruction*>(actual_param_count);
6389 IrInstSrc **args = allocate<IrInstSrc*>(actual_param_count);
53596390
53606391 for (size_t i = 0; i < actual_param_count; i += 1) {
53616392 AstNode *arg_node = node->data.fn_call_expr.params.at(i);
53626393 args[i] = ir_gen_node(irb, arg_node, scope);
5363 if (args[i] == irb->codegen->invalid_instruction)
5364 return irb->codegen->invalid_instruction;
6394 if (args[i] == irb->codegen->invalid_inst_src)
6395 return irb->codegen->invalid_inst_src;
53656396 }
53666397
5367 IrInstruction *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
6398 IrInstSrc *compile_log = ir_build_compile_log(irb, scope, node, actual_param_count, args);
53686399 return ir_lval_wrap(irb, scope, compile_log, lval, result_loc);
53696400 }
53706401 case BuiltinFnIdErrName:
53716402 {
53726403 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5373 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5374 if (arg0_value == irb->codegen->invalid_instruction)
6404 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6405 if (arg0_value == irb->codegen->invalid_inst_src)
53756406 return arg0_value;
53766407
5377 IrInstruction *err_name = ir_build_err_name(irb, scope, node, arg0_value);
6408 IrInstSrc *err_name = ir_build_err_name(irb, scope, node, arg0_value);
53786409 return ir_lval_wrap(irb, scope, err_name, lval, result_loc);
53796410 }
53806411 case BuiltinFnIdEmbedFile:
53816412 {
53826413 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5383 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5384 if (arg0_value == irb->codegen->invalid_instruction)
6414 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6415 if (arg0_value == irb->codegen->invalid_inst_src)
53856416 return arg0_value;
53866417
5387 IrInstruction *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
6418 IrInstSrc *embed_file = ir_build_embed_file(irb, scope, node, arg0_value);
53886419 return ir_lval_wrap(irb, scope, embed_file, lval, result_loc);
53896420 }
53906421 case BuiltinFnIdCmpxchgWeak:
53916422 case BuiltinFnIdCmpxchgStrong:
53926423 {
53936424 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5394 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5395 if (arg0_value == irb->codegen->invalid_instruction)
6425 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6426 if (arg0_value == irb->codegen->invalid_inst_src)
53966427 return arg0_value;
53976428
53986429 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5399 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5400 if (arg1_value == irb->codegen->invalid_instruction)
6430 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6431 if (arg1_value == irb->codegen->invalid_inst_src)
54016432 return arg1_value;
54026433
54036434 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5404 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5405 if (arg2_value == irb->codegen->invalid_instruction)
6435 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6436 if (arg2_value == irb->codegen->invalid_inst_src)
54066437 return arg2_value;
54076438
54086439 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5409 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
5410 if (arg3_value == irb->codegen->invalid_instruction)
6440 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6441 if (arg3_value == irb->codegen->invalid_inst_src)
54116442 return arg3_value;
54126443
54136444 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
5414 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
5415 if (arg4_value == irb->codegen->invalid_instruction)
6445 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
6446 if (arg4_value == irb->codegen->invalid_inst_src)
54166447 return arg4_value;
54176448
54186449 AstNode *arg5_node = node->data.fn_call_expr.params.at(5);
5419 IrInstruction *arg5_value = ir_gen_node(irb, arg5_node, scope);
5420 if (arg5_value == irb->codegen->invalid_instruction)
6450 IrInstSrc *arg5_value = ir_gen_node(irb, arg5_node, scope);
6451 if (arg5_value == irb->codegen->invalid_inst_src)
54216452 return arg5_value;
54226453
5423 IrInstruction *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
6454 IrInstSrc *cmpxchg = ir_build_cmpxchg_src(irb, scope, node, arg0_value, arg1_value,
54246455 arg2_value, arg3_value, arg4_value, arg5_value, (builtin_fn->id == BuiltinFnIdCmpxchgWeak),
54256456 result_loc);
54266457 return ir_lval_wrap(irb, scope, cmpxchg, lval, result_loc);
......@@ -5428,86 +6459,86 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
54286459 case BuiltinFnIdFence:
54296460 {
54306461 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5431 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5432 if (arg0_value == irb->codegen->invalid_instruction)
6462 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6463 if (arg0_value == irb->codegen->invalid_inst_src)
54336464 return arg0_value;
54346465
5435 IrInstruction *fence = ir_build_fence(irb, scope, node, arg0_value, AtomicOrderUnordered);
6466 IrInstSrc *fence = ir_build_fence(irb, scope, node, arg0_value);
54366467 return ir_lval_wrap(irb, scope, fence, lval, result_loc);
54376468 }
54386469 case BuiltinFnIdDivExact:
54396470 {
54406471 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5441 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5442 if (arg0_value == irb->codegen->invalid_instruction)
6472 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6473 if (arg0_value == irb->codegen->invalid_inst_src)
54436474 return arg0_value;
54446475
54456476 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5446 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5447 if (arg1_value == irb->codegen->invalid_instruction)
6477 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6478 if (arg1_value == irb->codegen->invalid_inst_src)
54486479 return arg1_value;
54496480
5450 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
6481 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivExact, arg0_value, arg1_value, true);
54516482 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54526483 }
54536484 case BuiltinFnIdDivTrunc:
54546485 {
54556486 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5456 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5457 if (arg0_value == irb->codegen->invalid_instruction)
6487 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6488 if (arg0_value == irb->codegen->invalid_inst_src)
54586489 return arg0_value;
54596490
54606491 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5461 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5462 if (arg1_value == irb->codegen->invalid_instruction)
6492 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6493 if (arg1_value == irb->codegen->invalid_inst_src)
54636494 return arg1_value;
54646495
5465 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
6496 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivTrunc, arg0_value, arg1_value, true);
54666497 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54676498 }
54686499 case BuiltinFnIdDivFloor:
54696500 {
54706501 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5471 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5472 if (arg0_value == irb->codegen->invalid_instruction)
6502 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6503 if (arg0_value == irb->codegen->invalid_inst_src)
54736504 return arg0_value;
54746505
54756506 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5476 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5477 if (arg1_value == irb->codegen->invalid_instruction)
6507 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6508 if (arg1_value == irb->codegen->invalid_inst_src)
54786509 return arg1_value;
54796510
5480 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
6511 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpDivFloor, arg0_value, arg1_value, true);
54816512 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54826513 }
54836514 case BuiltinFnIdRem:
54846515 {
54856516 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5486 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5487 if (arg0_value == irb->codegen->invalid_instruction)
6517 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6518 if (arg0_value == irb->codegen->invalid_inst_src)
54886519 return arg0_value;
54896520
54906521 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5491 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5492 if (arg1_value == irb->codegen->invalid_instruction)
6522 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6523 if (arg1_value == irb->codegen->invalid_inst_src)
54936524 return arg1_value;
54946525
5495 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
6526 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemRem, arg0_value, arg1_value, true);
54966527 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
54976528 }
54986529 case BuiltinFnIdMod:
54996530 {
55006531 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5501 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5502 if (arg0_value == irb->codegen->invalid_instruction)
6532 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6533 if (arg0_value == irb->codegen->invalid_inst_src)
55036534 return arg0_value;
55046535
55056536 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5506 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5507 if (arg1_value == irb->codegen->invalid_instruction)
6537 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6538 if (arg1_value == irb->codegen->invalid_inst_src)
55086539 return arg1_value;
55096540
5510 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
6541 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpRemMod, arg0_value, arg1_value, true);
55116542 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
55126543 }
55136544 case BuiltinFnIdSqrt:
......@@ -5526,406 +6557,406 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
55266557 case BuiltinFnIdRound:
55276558 {
55286559 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5529 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5530 if (arg0_value == irb->codegen->invalid_instruction)
6560 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6561 if (arg0_value == irb->codegen->invalid_inst_src)
55316562 return arg0_value;
55326563
5533 IrInstruction *inst = ir_build_float_op(irb, scope, node, arg0_value, builtin_fn->id);
6564 IrInstSrc *inst = ir_build_float_op_src(irb, scope, node, arg0_value, builtin_fn->id);
55346565 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
55356566 }
55366567 case BuiltinFnIdTruncate:
55376568 {
55386569 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5539 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5540 if (arg0_value == irb->codegen->invalid_instruction)
6570 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6571 if (arg0_value == irb->codegen->invalid_inst_src)
55416572 return arg0_value;
55426573
55436574 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5544 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5545 if (arg1_value == irb->codegen->invalid_instruction)
6575 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6576 if (arg1_value == irb->codegen->invalid_inst_src)
55466577 return arg1_value;
55476578
5548 IrInstruction *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
6579 IrInstSrc *truncate = ir_build_truncate(irb, scope, node, arg0_value, arg1_value);
55496580 return ir_lval_wrap(irb, scope, truncate, lval, result_loc);
55506581 }
55516582 case BuiltinFnIdIntCast:
55526583 {
55536584 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5554 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5555 if (arg0_value == irb->codegen->invalid_instruction)
6585 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6586 if (arg0_value == irb->codegen->invalid_inst_src)
55566587 return arg0_value;
55576588
55586589 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5559 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5560 if (arg1_value == irb->codegen->invalid_instruction)
6590 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6591 if (arg1_value == irb->codegen->invalid_inst_src)
55616592 return arg1_value;
55626593
5563 IrInstruction *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
6594 IrInstSrc *result = ir_build_int_cast(irb, scope, node, arg0_value, arg1_value);
55646595 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55656596 }
55666597 case BuiltinFnIdFloatCast:
55676598 {
55686599 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5569 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5570 if (arg0_value == irb->codegen->invalid_instruction)
6600 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6601 if (arg0_value == irb->codegen->invalid_inst_src)
55716602 return arg0_value;
55726603
55736604 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5574 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5575 if (arg1_value == irb->codegen->invalid_instruction)
6605 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6606 if (arg1_value == irb->codegen->invalid_inst_src)
55766607 return arg1_value;
55776608
5578 IrInstruction *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
6609 IrInstSrc *result = ir_build_float_cast(irb, scope, node, arg0_value, arg1_value);
55796610 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55806611 }
55816612 case BuiltinFnIdErrSetCast:
55826613 {
55836614 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5584 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5585 if (arg0_value == irb->codegen->invalid_instruction)
6615 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6616 if (arg0_value == irb->codegen->invalid_inst_src)
55866617 return arg0_value;
55876618
55886619 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5589 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5590 if (arg1_value == irb->codegen->invalid_instruction)
6620 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6621 if (arg1_value == irb->codegen->invalid_inst_src)
55916622 return arg1_value;
55926623
5593 IrInstruction *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
6624 IrInstSrc *result = ir_build_err_set_cast(irb, scope, node, arg0_value, arg1_value);
55946625 return ir_lval_wrap(irb, scope, result, lval, result_loc);
55956626 }
55966627 case BuiltinFnIdFromBytes:
55976628 {
55986629 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5599 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5600 if (arg0_value == irb->codegen->invalid_instruction)
6630 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6631 if (arg0_value == irb->codegen->invalid_inst_src)
56016632 return arg0_value;
56026633
56036634 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5604 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5605 if (arg1_value == irb->codegen->invalid_instruction)
6635 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6636 if (arg1_value == irb->codegen->invalid_inst_src)
56066637 return arg1_value;
56076638
5608 IrInstruction *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
6639 IrInstSrc *result = ir_build_from_bytes(irb, scope, node, arg0_value, arg1_value, result_loc);
56096640 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56106641 }
56116642 case BuiltinFnIdToBytes:
56126643 {
56136644 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5614 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5615 if (arg0_value == irb->codegen->invalid_instruction)
6645 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6646 if (arg0_value == irb->codegen->invalid_inst_src)
56166647 return arg0_value;
56176648
5618 IrInstruction *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
6649 IrInstSrc *result = ir_build_to_bytes(irb, scope, node, arg0_value, result_loc);
56196650 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56206651 }
56216652 case BuiltinFnIdIntToFloat:
56226653 {
56236654 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5624 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5625 if (arg0_value == irb->codegen->invalid_instruction)
6655 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6656 if (arg0_value == irb->codegen->invalid_inst_src)
56266657 return arg0_value;
56276658
56286659 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5629 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5630 if (arg1_value == irb->codegen->invalid_instruction)
6660 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6661 if (arg1_value == irb->codegen->invalid_inst_src)
56316662 return arg1_value;
56326663
5633 IrInstruction *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
6664 IrInstSrc *result = ir_build_int_to_float(irb, scope, node, arg0_value, arg1_value);
56346665 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56356666 }
56366667 case BuiltinFnIdFloatToInt:
56376668 {
56386669 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5639 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5640 if (arg0_value == irb->codegen->invalid_instruction)
6670 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6671 if (arg0_value == irb->codegen->invalid_inst_src)
56416672 return arg0_value;
56426673
56436674 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5644 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5645 if (arg1_value == irb->codegen->invalid_instruction)
6675 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6676 if (arg1_value == irb->codegen->invalid_inst_src)
56466677 return arg1_value;
56476678
5648 IrInstruction *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
6679 IrInstSrc *result = ir_build_float_to_int(irb, scope, node, arg0_value, arg1_value);
56496680 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56506681 }
56516682 case BuiltinFnIdErrToInt:
56526683 {
56536684 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5654 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5655 if (arg0_value == irb->codegen->invalid_instruction)
6685 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6686 if (arg0_value == irb->codegen->invalid_inst_src)
56566687 return arg0_value;
56576688
5658 IrInstruction *result = ir_build_err_to_int(irb, scope, node, arg0_value);
6689 IrInstSrc *result = ir_build_err_to_int_src(irb, scope, node, arg0_value);
56596690 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56606691 }
56616692 case BuiltinFnIdIntToErr:
56626693 {
56636694 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5664 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5665 if (arg0_value == irb->codegen->invalid_instruction)
6695 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6696 if (arg0_value == irb->codegen->invalid_inst_src)
56666697 return arg0_value;
56676698
5668 IrInstruction *result = ir_build_int_to_err(irb, scope, node, arg0_value);
6699 IrInstSrc *result = ir_build_int_to_err_src(irb, scope, node, arg0_value);
56696700 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56706701 }
56716702 case BuiltinFnIdBoolToInt:
56726703 {
56736704 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5674 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5675 if (arg0_value == irb->codegen->invalid_instruction)
6705 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6706 if (arg0_value == irb->codegen->invalid_inst_src)
56766707 return arg0_value;
56776708
5678 IrInstruction *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
6709 IrInstSrc *result = ir_build_bool_to_int(irb, scope, node, arg0_value);
56796710 return ir_lval_wrap(irb, scope, result, lval, result_loc);
56806711 }
56816712 case BuiltinFnIdIntType:
56826713 {
56836714 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5684 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5685 if (arg0_value == irb->codegen->invalid_instruction)
6715 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6716 if (arg0_value == irb->codegen->invalid_inst_src)
56866717 return arg0_value;
56876718
56886719 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5689 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5690 if (arg1_value == irb->codegen->invalid_instruction)
6720 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6721 if (arg1_value == irb->codegen->invalid_inst_src)
56916722 return arg1_value;
56926723
5693 IrInstruction *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
6724 IrInstSrc *int_type = ir_build_int_type(irb, scope, node, arg0_value, arg1_value);
56946725 return ir_lval_wrap(irb, scope, int_type, lval, result_loc);
56956726 }
56966727 case BuiltinFnIdVectorType:
56976728 {
56986729 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5699 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5700 if (arg0_value == irb->codegen->invalid_instruction)
6730 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6731 if (arg0_value == irb->codegen->invalid_inst_src)
57016732 return arg0_value;
57026733
57036734 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5704 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5705 if (arg1_value == irb->codegen->invalid_instruction)
6735 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6736 if (arg1_value == irb->codegen->invalid_inst_src)
57066737 return arg1_value;
57076738
5708 IrInstruction *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
6739 IrInstSrc *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
57096740 return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);
57106741 }
57116742 case BuiltinFnIdShuffle:
57126743 {
57136744 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5714 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5715 if (arg0_value == irb->codegen->invalid_instruction)
6745 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6746 if (arg0_value == irb->codegen->invalid_inst_src)
57166747 return arg0_value;
57176748
57186749 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5719 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5720 if (arg1_value == irb->codegen->invalid_instruction)
6750 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6751 if (arg1_value == irb->codegen->invalid_inst_src)
57216752 return arg1_value;
57226753
57236754 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5724 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5725 if (arg2_value == irb->codegen->invalid_instruction)
6755 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6756 if (arg2_value == irb->codegen->invalid_inst_src)
57266757 return arg2_value;
57276758
57286759 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
5729 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
5730 if (arg3_value == irb->codegen->invalid_instruction)
6760 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
6761 if (arg3_value == irb->codegen->invalid_inst_src)
57316762 return arg3_value;
57326763
5733 IrInstruction *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
6764 IrInstSrc *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
57346765 arg0_value, arg1_value, arg2_value, arg3_value);
57356766 return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);
57366767 }
57376768 case BuiltinFnIdSplat:
57386769 {
57396770 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5740 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5741 if (arg0_value == irb->codegen->invalid_instruction)
6771 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6772 if (arg0_value == irb->codegen->invalid_inst_src)
57426773 return arg0_value;
57436774
57446775 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5745 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5746 if (arg1_value == irb->codegen->invalid_instruction)
6776 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6777 if (arg1_value == irb->codegen->invalid_inst_src)
57476778 return arg1_value;
57486779
5749 IrInstruction *splat = ir_build_splat_src(irb, scope, node,
6780 IrInstSrc *splat = ir_build_splat_src(irb, scope, node,
57506781 arg0_value, arg1_value);
57516782 return ir_lval_wrap(irb, scope, splat, lval, result_loc);
57526783 }
57536784 case BuiltinFnIdMemcpy:
57546785 {
57556786 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5756 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5757 if (arg0_value == irb->codegen->invalid_instruction)
6787 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6788 if (arg0_value == irb->codegen->invalid_inst_src)
57586789 return arg0_value;
57596790
57606791 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5761 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5762 if (arg1_value == irb->codegen->invalid_instruction)
6792 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6793 if (arg1_value == irb->codegen->invalid_inst_src)
57636794 return arg1_value;
57646795
57656796 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5766 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5767 if (arg2_value == irb->codegen->invalid_instruction)
6797 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6798 if (arg2_value == irb->codegen->invalid_inst_src)
57686799 return arg2_value;
57696800
5770 IrInstruction *ir_memcpy = ir_build_memcpy(irb, scope, node, arg0_value, arg1_value, arg2_value);
6801 IrInstSrc *ir_memcpy = ir_build_memcpy_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
57716802 return ir_lval_wrap(irb, scope, ir_memcpy, lval, result_loc);
57726803 }
57736804 case BuiltinFnIdMemset:
57746805 {
57756806 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5776 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5777 if (arg0_value == irb->codegen->invalid_instruction)
6807 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6808 if (arg0_value == irb->codegen->invalid_inst_src)
57786809 return arg0_value;
57796810
57806811 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5781 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5782 if (arg1_value == irb->codegen->invalid_instruction)
6812 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6813 if (arg1_value == irb->codegen->invalid_inst_src)
57836814 return arg1_value;
57846815
57856816 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
5786 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
5787 if (arg2_value == irb->codegen->invalid_instruction)
6817 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
6818 if (arg2_value == irb->codegen->invalid_inst_src)
57886819 return arg2_value;
57896820
5790 IrInstruction *ir_memset = ir_build_memset(irb, scope, node, arg0_value, arg1_value, arg2_value);
6821 IrInstSrc *ir_memset = ir_build_memset_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
57916822 return ir_lval_wrap(irb, scope, ir_memset, lval, result_loc);
57926823 }
57936824 case BuiltinFnIdMemberCount:
57946825 {
57956826 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5796 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5797 if (arg0_value == irb->codegen->invalid_instruction)
6827 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6828 if (arg0_value == irb->codegen->invalid_inst_src)
57986829 return arg0_value;
57996830
5800 IrInstruction *member_count = ir_build_member_count(irb, scope, node, arg0_value);
6831 IrInstSrc *member_count = ir_build_member_count(irb, scope, node, arg0_value);
58016832 return ir_lval_wrap(irb, scope, member_count, lval, result_loc);
58026833 }
58036834 case BuiltinFnIdMemberType:
58046835 {
58056836 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5806 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5807 if (arg0_value == irb->codegen->invalid_instruction)
6837 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6838 if (arg0_value == irb->codegen->invalid_inst_src)
58086839 return arg0_value;
58096840
58106841 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5811 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5812 if (arg1_value == irb->codegen->invalid_instruction)
6842 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6843 if (arg1_value == irb->codegen->invalid_inst_src)
58136844 return arg1_value;
58146845
58156846
5816 IrInstruction *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
6847 IrInstSrc *member_type = ir_build_member_type(irb, scope, node, arg0_value, arg1_value);
58176848 return ir_lval_wrap(irb, scope, member_type, lval, result_loc);
58186849 }
58196850 case BuiltinFnIdMemberName:
58206851 {
58216852 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5822 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5823 if (arg0_value == irb->codegen->invalid_instruction)
6853 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6854 if (arg0_value == irb->codegen->invalid_inst_src)
58246855 return arg0_value;
58256856
58266857 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5827 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5828 if (arg1_value == irb->codegen->invalid_instruction)
6858 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6859 if (arg1_value == irb->codegen->invalid_inst_src)
58296860 return arg1_value;
58306861
58316862
5832 IrInstruction *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
6863 IrInstSrc *member_name = ir_build_member_name(irb, scope, node, arg0_value, arg1_value);
58336864 return ir_lval_wrap(irb, scope, member_name, lval, result_loc);
58346865 }
58356866 case BuiltinFnIdField:
58366867 {
58376868 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5838 IrInstruction *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
5839 if (arg0_value == irb->codegen->invalid_instruction)
6869 IrInstSrc *arg0_value = ir_gen_node_extra(irb, arg0_node, scope, LValPtr, nullptr);
6870 if (arg0_value == irb->codegen->invalid_inst_src)
58406871 return arg0_value;
58416872
58426873 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5843 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5844 if (arg1_value == irb->codegen->invalid_instruction)
6874 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6875 if (arg1_value == irb->codegen->invalid_inst_src)
58456876 return arg1_value;
58466877
5847 IrInstruction *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
6878 IrInstSrc *ptr_instruction = ir_build_field_ptr_instruction(irb, scope, node,
58486879 arg0_value, arg1_value, false);
58496880
58506881 if (lval == LValPtr)
58516882 return ptr_instruction;
58526883
5853 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
6884 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
58546885 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
58556886 }
58566887 case BuiltinFnIdHasField:
58576888 {
58586889 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5859 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5860 if (arg0_value == irb->codegen->invalid_instruction)
6890 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6891 if (arg0_value == irb->codegen->invalid_inst_src)
58616892 return arg0_value;
58626893
58636894 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5864 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5865 if (arg1_value == irb->codegen->invalid_instruction)
6895 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
6896 if (arg1_value == irb->codegen->invalid_inst_src)
58666897 return arg1_value;
58676898
5868 IrInstruction *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
6899 IrInstSrc *type_info = ir_build_has_field(irb, scope, node, arg0_value, arg1_value);
58696900 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
58706901 }
58716902 case BuiltinFnIdTypeInfo:
58726903 {
58736904 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5874 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5875 if (arg0_value == irb->codegen->invalid_instruction)
6905 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6906 if (arg0_value == irb->codegen->invalid_inst_src)
58766907 return arg0_value;
58776908
5878 IrInstruction *type_info = ir_build_type_info(irb, scope, node, arg0_value);
6909 IrInstSrc *type_info = ir_build_type_info(irb, scope, node, arg0_value);
58796910 return ir_lval_wrap(irb, scope, type_info, lval, result_loc);
58806911 }
58816912 case BuiltinFnIdType:
58826913 {
58836914 AstNode *arg_node = node->data.fn_call_expr.params.at(0);
5884 IrInstruction *arg = ir_gen_node(irb, arg_node, scope);
5885 if (arg == irb->codegen->invalid_instruction)
6915 IrInstSrc *arg = ir_gen_node(irb, arg_node, scope);
6916 if (arg == irb->codegen->invalid_inst_src)
58866917 return arg;
58876918
5888 IrInstruction *type = ir_build_type(irb, scope, node, arg);
6919 IrInstSrc *type = ir_build_type(irb, scope, node, arg);
58896920 return ir_lval_wrap(irb, scope, type, lval, result_loc);
58906921 }
58916922 case BuiltinFnIdBreakpoint:
58926923 return ir_lval_wrap(irb, scope, ir_build_breakpoint(irb, scope, node), lval, result_loc);
58936924 case BuiltinFnIdReturnAddress:
5894 return ir_lval_wrap(irb, scope, ir_build_return_address(irb, scope, node), lval, result_loc);
6925 return ir_lval_wrap(irb, scope, ir_build_return_address_src(irb, scope, node), lval, result_loc);
58956926 case BuiltinFnIdFrameAddress:
5896 return ir_lval_wrap(irb, scope, ir_build_frame_address(irb, scope, node), lval, result_loc);
6927 return ir_lval_wrap(irb, scope, ir_build_frame_address_src(irb, scope, node), lval, result_loc);
58976928 case BuiltinFnIdFrameHandle:
58986929 if (!irb->exec->fn_entry) {
58996930 add_node_error(irb->codegen, node, buf_sprintf("@frame() called outside of function definition"));
5900 return irb->codegen->invalid_instruction;
6931 return irb->codegen->invalid_inst_src;
59016932 }
5902 return ir_lval_wrap(irb, scope, ir_build_handle(irb, scope, node), lval, result_loc);
6933 return ir_lval_wrap(irb, scope, ir_build_handle_src(irb, scope, node), lval, result_loc);
59036934 case BuiltinFnIdFrameType: {
59046935 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5905 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5906 if (arg0_value == irb->codegen->invalid_instruction)
6936 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6937 if (arg0_value == irb->codegen->invalid_inst_src)
59076938 return arg0_value;
59086939
5909 IrInstruction *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
6940 IrInstSrc *frame_type = ir_build_frame_type(irb, scope, node, arg0_value);
59106941 return ir_lval_wrap(irb, scope, frame_type, lval, result_loc);
59116942 }
59126943 case BuiltinFnIdFrameSize: {
59136944 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5914 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5915 if (arg0_value == irb->codegen->invalid_instruction)
6945 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6946 if (arg0_value == irb->codegen->invalid_inst_src)
59166947 return arg0_value;
59176948
5918 IrInstruction *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
6949 IrInstSrc *frame_size = ir_build_frame_size_src(irb, scope, node, arg0_value);
59196950 return ir_lval_wrap(irb, scope, frame_size, lval, result_loc);
59206951 }
59216952 case BuiltinFnIdAlignOf:
59226953 {
59236954 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5924 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5925 if (arg0_value == irb->codegen->invalid_instruction)
6955 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6956 if (arg0_value == irb->codegen->invalid_inst_src)
59266957 return arg0_value;
59276958
5928 IrInstruction *align_of = ir_build_align_of(irb, scope, node, arg0_value);
6959 IrInstSrc *align_of = ir_build_align_of(irb, scope, node, arg0_value);
59296960 return ir_lval_wrap(irb, scope, align_of, lval, result_loc);
59306961 }
59316962 case BuiltinFnIdAddWithOverflow:
......@@ -5941,43 +6972,43 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
59416972 case BuiltinFnIdTypeName:
59426973 {
59436974 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5944 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5945 if (arg0_value == irb->codegen->invalid_instruction)
6975 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6976 if (arg0_value == irb->codegen->invalid_inst_src)
59466977 return arg0_value;
59476978
5948 IrInstruction *type_name = ir_build_type_name(irb, scope, node, arg0_value);
6979 IrInstSrc *type_name = ir_build_type_name(irb, scope, node, arg0_value);
59496980 return ir_lval_wrap(irb, scope, type_name, lval, result_loc);
59506981 }
59516982 case BuiltinFnIdPanic:
59526983 {
59536984 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5954 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5955 if (arg0_value == irb->codegen->invalid_instruction)
6985 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6986 if (arg0_value == irb->codegen->invalid_inst_src)
59566987 return arg0_value;
59576988
5958 IrInstruction *panic = ir_build_panic(irb, scope, node, arg0_value);
6989 IrInstSrc *panic = ir_build_panic_src(irb, scope, node, arg0_value);
59596990 return ir_lval_wrap(irb, scope, panic, lval, result_loc);
59606991 }
59616992 case BuiltinFnIdPtrCast:
59626993 {
59636994 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
5964 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
5965 if (arg0_value == irb->codegen->invalid_instruction)
6995 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
6996 if (arg0_value == irb->codegen->invalid_inst_src)
59666997 return arg0_value;
59676998
59686999 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5969 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
5970 if (arg1_value == irb->codegen->invalid_instruction)
7000 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7001 if (arg1_value == irb->codegen->invalid_inst_src)
59717002 return arg1_value;
59727003
5973 IrInstruction *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
7004 IrInstSrc *ptr_cast = ir_build_ptr_cast_src(irb, scope, node, arg0_value, arg1_value, true);
59747005 return ir_lval_wrap(irb, scope, ptr_cast, lval, result_loc);
59757006 }
59767007 case BuiltinFnIdBitCast:
59777008 {
59787009 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
5979 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
5980 if (dest_type == irb->codegen->invalid_instruction)
7010 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
7011 if (dest_type == irb->codegen->invalid_inst_src)
59817012 return dest_type;
59827013
59837014 ResultLocBitCast *result_loc_bit_cast = allocate<ResultLocBitCast>(1);
......@@ -5989,126 +7020,126 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
59897020 ir_build_reset_result(irb, scope, node, &result_loc_bit_cast->base);
59907021
59917022 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
5992 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
7023 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
59937024 &result_loc_bit_cast->base);
5994 if (arg1_value == irb->codegen->invalid_instruction)
7025 if (arg1_value == irb->codegen->invalid_inst_src)
59957026 return arg1_value;
59967027
5997 IrInstruction *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
7028 IrInstSrc *bitcast = ir_build_bit_cast_src(irb, scope, arg1_node, arg1_value, result_loc_bit_cast);
59987029 return ir_lval_wrap(irb, scope, bitcast, lval, result_loc);
59997030 }
60007031 case BuiltinFnIdAs:
60017032 {
60027033 AstNode *dest_type_node = node->data.fn_call_expr.params.at(0);
6003 IrInstruction *dest_type = ir_gen_node(irb, dest_type_node, scope);
6004 if (dest_type == irb->codegen->invalid_instruction)
7034 IrInstSrc *dest_type = ir_gen_node(irb, dest_type_node, scope);
7035 if (dest_type == irb->codegen->invalid_inst_src)
60057036 return dest_type;
60067037
60077038 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, dest_type, result_loc);
60087039
60097040 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6010 IrInstruction *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
7041 IrInstSrc *arg1_value = ir_gen_node_extra(irb, arg1_node, scope, LValNone,
60117042 &result_loc_cast->base);
6012 if (arg1_value == irb->codegen->invalid_instruction)
7043 if (arg1_value == irb->codegen->invalid_inst_src)
60137044 return arg1_value;
60147045
6015 IrInstruction *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
7046 IrInstSrc *result = ir_build_implicit_cast(irb, scope, node, arg1_value, result_loc_cast);
60167047 return ir_lval_wrap(irb, scope, result, lval, result_loc);
60177048 }
60187049 case BuiltinFnIdIntToPtr:
60197050 {
60207051 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6021 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6022 if (arg0_value == irb->codegen->invalid_instruction)
7052 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7053 if (arg0_value == irb->codegen->invalid_inst_src)
60237054 return arg0_value;
60247055
60257056 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6026 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6027 if (arg1_value == irb->codegen->invalid_instruction)
7057 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7058 if (arg1_value == irb->codegen->invalid_inst_src)
60287059 return arg1_value;
60297060
6030 IrInstruction *int_to_ptr = ir_build_int_to_ptr(irb, scope, node, arg0_value, arg1_value);
7061 IrInstSrc *int_to_ptr = ir_build_int_to_ptr_src(irb, scope, node, arg0_value, arg1_value);
60317062 return ir_lval_wrap(irb, scope, int_to_ptr, lval, result_loc);
60327063 }
60337064 case BuiltinFnIdPtrToInt:
60347065 {
60357066 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6036 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6037 if (arg0_value == irb->codegen->invalid_instruction)
7067 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7068 if (arg0_value == irb->codegen->invalid_inst_src)
60387069 return arg0_value;
60397070
6040 IrInstruction *ptr_to_int = ir_build_ptr_to_int(irb, scope, node, arg0_value);
7071 IrInstSrc *ptr_to_int = ir_build_ptr_to_int_src(irb, scope, node, arg0_value);
60417072 return ir_lval_wrap(irb, scope, ptr_to_int, lval, result_loc);
60427073 }
60437074 case BuiltinFnIdTagName:
60447075 {
60457076 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6046 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6047 if (arg0_value == irb->codegen->invalid_instruction)
7077 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7078 if (arg0_value == irb->codegen->invalid_inst_src)
60487079 return arg0_value;
60497080
6050 IrInstruction *actual_tag = ir_build_union_tag(irb, scope, node, arg0_value);
6051 IrInstruction *tag_name = ir_build_tag_name(irb, scope, node, actual_tag);
7081 IrInstSrc *tag_name = ir_build_tag_name_src(irb, scope, node, arg0_value);
60527082 return ir_lval_wrap(irb, scope, tag_name, lval, result_loc);
60537083 }
60547084 case BuiltinFnIdTagType:
60557085 {
60567086 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6057 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6058 if (arg0_value == irb->codegen->invalid_instruction)
7087 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7088 if (arg0_value == irb->codegen->invalid_inst_src)
60597089 return arg0_value;
60607090
6061 IrInstruction *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
7091 IrInstSrc *tag_type = ir_build_tag_type(irb, scope, node, arg0_value);
60627092 return ir_lval_wrap(irb, scope, tag_type, lval, result_loc);
60637093 }
60647094 case BuiltinFnIdFieldParentPtr:
60657095 {
60667096 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6067 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6068 if (arg0_value == irb->codegen->invalid_instruction)
7097 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7098 if (arg0_value == irb->codegen->invalid_inst_src)
60697099 return arg0_value;
60707100
60717101 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6072 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6073 if (arg1_value == irb->codegen->invalid_instruction)
7102 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7103 if (arg1_value == irb->codegen->invalid_inst_src)
60747104 return arg1_value;
60757105
60767106 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6077 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6078 if (arg2_value == irb->codegen->invalid_instruction)
7107 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7108 if (arg2_value == irb->codegen->invalid_inst_src)
60797109 return arg2_value;
60807110
6081 IrInstruction *field_parent_ptr = ir_build_field_parent_ptr(irb, scope, node, arg0_value, arg1_value, arg2_value, nullptr);
7111 IrInstSrc *field_parent_ptr = ir_build_field_parent_ptr_src(irb, scope, node,
7112 arg0_value, arg1_value, arg2_value);
60827113 return ir_lval_wrap(irb, scope, field_parent_ptr, lval, result_loc);
60837114 }
60847115 case BuiltinFnIdByteOffsetOf:
60857116 {
60867117 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6087 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6088 if (arg0_value == irb->codegen->invalid_instruction)
7118 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7119 if (arg0_value == irb->codegen->invalid_inst_src)
60897120 return arg0_value;
60907121
60917122 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6092 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6093 if (arg1_value == irb->codegen->invalid_instruction)
7123 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7124 if (arg1_value == irb->codegen->invalid_inst_src)
60947125 return arg1_value;
60957126
6096 IrInstruction *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
7127 IrInstSrc *offset_of = ir_build_byte_offset_of(irb, scope, node, arg0_value, arg1_value);
60977128 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
60987129 }
60997130 case BuiltinFnIdBitOffsetOf:
61007131 {
61017132 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6102 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6103 if (arg0_value == irb->codegen->invalid_instruction)
7133 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7134 if (arg0_value == irb->codegen->invalid_inst_src)
61047135 return arg0_value;
61057136
61067137 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6107 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6108 if (arg1_value == irb->codegen->invalid_instruction)
7138 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7139 if (arg1_value == irb->codegen->invalid_inst_src)
61097140 return arg1_value;
61107141
6111 IrInstruction *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
7142 IrInstSrc *offset_of = ir_build_bit_offset_of(irb, scope, node, arg0_value, arg1_value);
61127143 return ir_lval_wrap(irb, scope, offset_of, lval, result_loc);
61137144 }
61147145 case BuiltinFnIdNewStackCall:
......@@ -6117,45 +7148,45 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
61177148 add_node_error(irb->codegen, node,
61187149 buf_sprintf("expected at least 2 arguments, found %" ZIG_PRI_usize,
61197150 node->data.fn_call_expr.params.length));
6120 return irb->codegen->invalid_instruction;
7151 return irb->codegen->invalid_inst_src;
61217152 }
61227153
61237154 AstNode *new_stack_node = node->data.fn_call_expr.params.at(0);
6124 IrInstruction *new_stack = ir_gen_node(irb, new_stack_node, scope);
6125 if (new_stack == irb->codegen->invalid_instruction)
7155 IrInstSrc *new_stack = ir_gen_node(irb, new_stack_node, scope);
7156 if (new_stack == irb->codegen->invalid_inst_src)
61267157 return new_stack;
61277158
61287159 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
6129 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6130 if (fn_ref == irb->codegen->invalid_instruction)
7160 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
7161 if (fn_ref == irb->codegen->invalid_inst_src)
61317162 return fn_ref;
61327163
61337164 size_t arg_count = node->data.fn_call_expr.params.length - 2;
61347165
6135 IrInstruction **args = allocate<IrInstruction*>(arg_count);
7166 IrInstSrc **args = allocate<IrInstSrc*>(arg_count);
61367167 for (size_t i = 0; i < arg_count; i += 1) {
61377168 AstNode *arg_node = node->data.fn_call_expr.params.at(i + 2);
61387169 args[i] = ir_gen_node(irb, arg_node, scope);
6139 if (args[i] == irb->codegen->invalid_instruction)
7170 if (args[i] == irb->codegen->invalid_inst_src)
61407171 return args[i];
61417172 }
61427173
6143 IrInstruction *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
7174 IrInstSrc *call = ir_build_call_src(irb, scope, node, nullptr, fn_ref, arg_count, args,
61447175 nullptr, CallModifierNone, false, new_stack, result_loc);
61457176 return ir_lval_wrap(irb, scope, call, lval, result_loc);
61467177 }
61477178 case BuiltinFnIdCall: {
61487179 // Cast the options parameter to the options type
61497180 ZigType *options_type = get_builtin_type(irb->codegen, "CallOptions");
6150 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
7181 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
61517182 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
61527183
61537184 AstNode *options_node = node->data.fn_call_expr.params.at(0);
6154 IrInstruction *options_inner = ir_gen_node_extra(irb, options_node, scope,
7185 IrInstSrc *options_inner = ir_gen_node_extra(irb, options_node, scope,
61557186 LValNone, &result_loc_cast->base);
6156 if (options_inner == irb->codegen->invalid_instruction)
7187 if (options_inner == irb->codegen->invalid_inst_src)
61577188 return options_inner;
6158 IrInstruction *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
7189 IrInstSrc *options = ir_build_implicit_cast(irb, scope, options_node, options_inner, result_loc_cast);
61597190
61607191 AstNode *fn_ref_node = node->data.fn_call_expr.params.at(1);
61617192 AstNode *args_node = node->data.fn_call_expr.params.at(2);
......@@ -6171,18 +7202,18 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
61717202 } else {
61727203 exec_add_error_node(irb->codegen, irb->exec, args_node,
61737204 buf_sprintf("TODO: @call with anon struct literal"));
6174 return irb->codegen->invalid_instruction;
7205 return irb->codegen->invalid_inst_src;
61757206 }
61767207 } else {
6177 IrInstruction *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
6178 if (fn_ref == irb->codegen->invalid_instruction)
7208 IrInstSrc *fn_ref = ir_gen_node(irb, fn_ref_node, scope);
7209 if (fn_ref == irb->codegen->invalid_inst_src)
61797210 return fn_ref;
61807211
6181 IrInstruction *args = ir_gen_node(irb, args_node, scope);
6182 if (args == irb->codegen->invalid_instruction)
7212 IrInstSrc *args = ir_gen_node(irb, args_node, scope);
7213 if (args == irb->codegen->invalid_inst_src)
61837214 return args;
61847215
6185 IrInstruction *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
7216 IrInstSrc *call = ir_build_call_extra(irb, scope, node, options, fn_ref, args, result_loc);
61867217 return ir_lval_wrap(irb, scope, call, lval, result_loc);
61877218 }
61887219 }
......@@ -6191,237 +7222,233 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
61917222 case BuiltinFnIdTypeId:
61927223 {
61937224 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6194 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6195 if (arg0_value == irb->codegen->invalid_instruction)
7225 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7226 if (arg0_value == irb->codegen->invalid_inst_src)
61967227 return arg0_value;
61977228
6198 IrInstruction *type_id = ir_build_type_id(irb, scope, node, arg0_value);
7229 IrInstSrc *type_id = ir_build_type_id(irb, scope, node, arg0_value);
61997230 return ir_lval_wrap(irb, scope, type_id, lval, result_loc);
62007231 }
62017232 case BuiltinFnIdShlExact:
62027233 {
62037234 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6204 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6205 if (arg0_value == irb->codegen->invalid_instruction)
7235 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7236 if (arg0_value == irb->codegen->invalid_inst_src)
62067237 return arg0_value;
62077238
62087239 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6209 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6210 if (arg1_value == irb->codegen->invalid_instruction)
7240 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7241 if (arg1_value == irb->codegen->invalid_inst_src)
62117242 return arg1_value;
62127243
6213 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
7244 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftLeftExact, arg0_value, arg1_value, true);
62147245 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
62157246 }
62167247 case BuiltinFnIdShrExact:
62177248 {
62187249 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6219 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6220 if (arg0_value == irb->codegen->invalid_instruction)
7250 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7251 if (arg0_value == irb->codegen->invalid_inst_src)
62217252 return arg0_value;
62227253
62237254 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6224 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6225 if (arg1_value == irb->codegen->invalid_instruction)
7255 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7256 if (arg1_value == irb->codegen->invalid_inst_src)
62267257 return arg1_value;
62277258
6228 IrInstruction *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
7259 IrInstSrc *bin_op = ir_build_bin_op(irb, scope, node, IrBinOpBitShiftRightExact, arg0_value, arg1_value, true);
62297260 return ir_lval_wrap(irb, scope, bin_op, lval, result_loc);
62307261 }
62317262 case BuiltinFnIdSetEvalBranchQuota:
62327263 {
62337264 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6234 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6235 if (arg0_value == irb->codegen->invalid_instruction)
7265 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7266 if (arg0_value == irb->codegen->invalid_inst_src)
62367267 return arg0_value;
62377268
6238 IrInstruction *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
7269 IrInstSrc *set_eval_branch_quota = ir_build_set_eval_branch_quota(irb, scope, node, arg0_value);
62397270 return ir_lval_wrap(irb, scope, set_eval_branch_quota, lval, result_loc);
62407271 }
62417272 case BuiltinFnIdAlignCast:
62427273 {
62437274 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6244 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6245 if (arg0_value == irb->codegen->invalid_instruction)
7275 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7276 if (arg0_value == irb->codegen->invalid_inst_src)
62467277 return arg0_value;
62477278
62487279 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6249 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6250 if (arg1_value == irb->codegen->invalid_instruction)
7280 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7281 if (arg1_value == irb->codegen->invalid_inst_src)
62517282 return arg1_value;
62527283
6253 IrInstruction *align_cast = ir_build_align_cast(irb, scope, node, arg0_value, arg1_value);
7284 IrInstSrc *align_cast = ir_build_align_cast_src(irb, scope, node, arg0_value, arg1_value);
62547285 return ir_lval_wrap(irb, scope, align_cast, lval, result_loc);
62557286 }
62567287 case BuiltinFnIdOpaqueType:
62577288 {
6258 IrInstruction *opaque_type = ir_build_opaque_type(irb, scope, node);
7289 IrInstSrc *opaque_type = ir_build_opaque_type(irb, scope, node);
62597290 return ir_lval_wrap(irb, scope, opaque_type, lval, result_loc);
62607291 }
62617292 case BuiltinFnIdThis:
62627293 {
6263 IrInstruction *this_inst = ir_gen_this(irb, scope, node);
7294 IrInstSrc *this_inst = ir_gen_this(irb, scope, node);
62647295 return ir_lval_wrap(irb, scope, this_inst, lval, result_loc);
62657296 }
62667297 case BuiltinFnIdSetAlignStack:
62677298 {
62687299 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6269 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6270 if (arg0_value == irb->codegen->invalid_instruction)
7300 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7301 if (arg0_value == irb->codegen->invalid_inst_src)
62717302 return arg0_value;
62727303
6273 IrInstruction *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
7304 IrInstSrc *set_align_stack = ir_build_set_align_stack(irb, scope, node, arg0_value);
62747305 return ir_lval_wrap(irb, scope, set_align_stack, lval, result_loc);
62757306 }
62767307 case BuiltinFnIdArgType:
62777308 {
62787309 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6279 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6280 if (arg0_value == irb->codegen->invalid_instruction)
7310 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7311 if (arg0_value == irb->codegen->invalid_inst_src)
62817312 return arg0_value;
62827313
62837314 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6284 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6285 if (arg1_value == irb->codegen->invalid_instruction)
7315 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7316 if (arg1_value == irb->codegen->invalid_inst_src)
62867317 return arg1_value;
62877318
6288 IrInstruction *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
7319 IrInstSrc *arg_type = ir_build_arg_type(irb, scope, node, arg0_value, arg1_value, false);
62897320 return ir_lval_wrap(irb, scope, arg_type, lval, result_loc);
62907321 }
62917322 case BuiltinFnIdExport:
62927323 {
62937324 // Cast the options parameter to the options type
62947325 ZigType *options_type = get_builtin_type(irb->codegen, "ExportOptions");
6295 IrInstruction *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
7326 IrInstSrc *options_type_inst = ir_build_const_type(irb, scope, node, options_type);
62967327 ResultLocCast *result_loc_cast = ir_build_cast_result_loc(irb, options_type_inst, no_result_loc());
62977328
62987329 AstNode *target_node = node->data.fn_call_expr.params.at(0);
6299 IrInstruction *target_value = ir_gen_node(irb, target_node, scope);
6300 if (target_value == irb->codegen->invalid_instruction)
7330 IrInstSrc *target_value = ir_gen_node(irb, target_node, scope);
7331 if (target_value == irb->codegen->invalid_inst_src)
63017332 return target_value;
63027333
63037334 AstNode *options_node = node->data.fn_call_expr.params.at(1);
6304 IrInstruction *options_value = ir_gen_node_extra(irb, options_node,
7335 IrInstSrc *options_value = ir_gen_node_extra(irb, options_node,
63057336 scope, LValNone, &result_loc_cast->base);
6306 if (options_value == irb->codegen->invalid_instruction)
7337 if (options_value == irb->codegen->invalid_inst_src)
63077338 return options_value;
63087339
6309 IrInstruction *casted_options_value = ir_build_implicit_cast(
7340 IrInstSrc *casted_options_value = ir_build_implicit_cast(
63107341 irb, scope, options_node, options_value, result_loc_cast);
63117342
6312 IrInstruction *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
7343 IrInstSrc *ir_export = ir_build_export(irb, scope, node, target_value, casted_options_value);
63137344 return ir_lval_wrap(irb, scope, ir_export, lval, result_loc);
63147345 }
63157346 case BuiltinFnIdErrorReturnTrace:
63167347 {
6317 IrInstruction *error_return_trace = ir_build_error_return_trace(irb, scope, node, IrInstructionErrorReturnTrace::Null);
7348 IrInstSrc *error_return_trace = ir_build_error_return_trace_src(irb, scope, node,
7349 IrInstErrorReturnTraceNull);
63187350 return ir_lval_wrap(irb, scope, error_return_trace, lval, result_loc);
63197351 }
63207352 case BuiltinFnIdAtomicRmw:
63217353 {
63227354 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6323 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6324 if (arg0_value == irb->codegen->invalid_instruction)
7355 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7356 if (arg0_value == irb->codegen->invalid_inst_src)
63257357 return arg0_value;
63267358
63277359 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6328 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6329 if (arg1_value == irb->codegen->invalid_instruction)
7360 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7361 if (arg1_value == irb->codegen->invalid_inst_src)
63307362 return arg1_value;
63317363
63327364 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6333 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6334 if (arg2_value == irb->codegen->invalid_instruction)
7365 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7366 if (arg2_value == irb->codegen->invalid_inst_src)
63357367 return arg2_value;
63367368
63377369 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6338 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
6339 if (arg3_value == irb->codegen->invalid_instruction)
7370 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
7371 if (arg3_value == irb->codegen->invalid_inst_src)
63407372 return arg3_value;
63417373
63427374 AstNode *arg4_node = node->data.fn_call_expr.params.at(4);
6343 IrInstruction *arg4_value = ir_gen_node(irb, arg4_node, scope);
6344 if (arg4_value == irb->codegen->invalid_instruction)
7375 IrInstSrc *arg4_value = ir_gen_node(irb, arg4_node, scope);
7376 if (arg4_value == irb->codegen->invalid_inst_src)
63457377 return arg4_value;
63467378
6347 IrInstruction *inst = ir_build_atomic_rmw(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
6348 arg4_value,
6349 // these 2 values don't mean anything since we passed non-null values for other args
6350 AtomicRmwOp_xchg, AtomicOrderMonotonic);
7379 IrInstSrc *inst = ir_build_atomic_rmw_src(irb, scope, node,
7380 arg0_value, arg1_value, arg2_value, arg3_value, arg4_value);
63517381 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
63527382 }
63537383 case BuiltinFnIdAtomicLoad:
63547384 {
63557385 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6356 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6357 if (arg0_value == irb->codegen->invalid_instruction)
7386 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7387 if (arg0_value == irb->codegen->invalid_inst_src)
63587388 return arg0_value;
63597389
63607390 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6361 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6362 if (arg1_value == irb->codegen->invalid_instruction)
7391 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7392 if (arg1_value == irb->codegen->invalid_inst_src)
63637393 return arg1_value;
63647394
63657395 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6366 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6367 if (arg2_value == irb->codegen->invalid_instruction)
7396 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7397 if (arg2_value == irb->codegen->invalid_inst_src)
63687398 return arg2_value;
63697399
6370 IrInstruction *inst = ir_build_atomic_load(irb, scope, node, arg0_value, arg1_value, arg2_value,
6371 // this value does not mean anything since we passed non-null values for other arg
6372 AtomicOrderMonotonic);
7400 IrInstSrc *inst = ir_build_atomic_load_src(irb, scope, node, arg0_value, arg1_value, arg2_value);
63737401 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
63747402 }
63757403 case BuiltinFnIdAtomicStore:
63767404 {
63777405 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6378 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6379 if (arg0_value == irb->codegen->invalid_instruction)
7406 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7407 if (arg0_value == irb->codegen->invalid_inst_src)
63807408 return arg0_value;
63817409
63827410 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6383 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6384 if (arg1_value == irb->codegen->invalid_instruction)
7411 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7412 if (arg1_value == irb->codegen->invalid_inst_src)
63857413 return arg1_value;
63867414
63877415 AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
6388 IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
6389 if (arg2_value == irb->codegen->invalid_instruction)
7416 IrInstSrc *arg2_value = ir_gen_node(irb, arg2_node, scope);
7417 if (arg2_value == irb->codegen->invalid_inst_src)
63907418 return arg2_value;
63917419
63927420 AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
6393 IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
6394 if (arg3_value == irb->codegen->invalid_instruction)
7421 IrInstSrc *arg3_value = ir_gen_node(irb, arg3_node, scope);
7422 if (arg3_value == irb->codegen->invalid_inst_src)
63957423 return arg3_value;
63967424
6397 IrInstruction *inst = ir_build_atomic_store(irb, scope, node, arg0_value, arg1_value, arg2_value, arg3_value,
6398 // this value does not mean anything since we passed non-null values for other arg
6399 AtomicOrderMonotonic);
7425 IrInstSrc *inst = ir_build_atomic_store_src(irb, scope, node, arg0_value, arg1_value,
7426 arg2_value, arg3_value);
64007427 return ir_lval_wrap(irb, scope, inst, lval, result_loc);
64017428 }
64027429 case BuiltinFnIdIntToEnum:
64037430 {
64047431 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6405 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6406 if (arg0_value == irb->codegen->invalid_instruction)
7432 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7433 if (arg0_value == irb->codegen->invalid_inst_src)
64077434 return arg0_value;
64087435
64097436 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6410 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6411 if (arg1_value == irb->codegen->invalid_instruction)
7437 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7438 if (arg1_value == irb->codegen->invalid_inst_src)
64127439 return arg1_value;
64137440
6414 IrInstruction *result = ir_build_int_to_enum(irb, scope, node, arg0_value, arg1_value);
7441 IrInstSrc *result = ir_build_int_to_enum_src(irb, scope, node, arg0_value, arg1_value);
64157442 return ir_lval_wrap(irb, scope, result, lval, result_loc);
64167443 }
64177444 case BuiltinFnIdEnumToInt:
64187445 {
64197446 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6420 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6421 if (arg0_value == irb->codegen->invalid_instruction)
7447 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7448 if (arg0_value == irb->codegen->invalid_inst_src)
64227449 return arg0_value;
64237450
6424 IrInstruction *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
7451 IrInstSrc *result = ir_build_enum_to_int(irb, scope, node, arg0_value);
64257452 return ir_lval_wrap(irb, scope, result, lval, result_loc);
64267453 }
64277454 case BuiltinFnIdCtz:
......@@ -6431,16 +7458,16 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64317458 case BuiltinFnIdBitReverse:
64327459 {
64337460 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6434 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6435 if (arg0_value == irb->codegen->invalid_instruction)
7461 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7462 if (arg0_value == irb->codegen->invalid_inst_src)
64367463 return arg0_value;
64377464
64387465 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6439 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6440 if (arg1_value == irb->codegen->invalid_instruction)
7466 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7467 if (arg1_value == irb->codegen->invalid_inst_src)
64417468 return arg1_value;
64427469
6443 IrInstruction *result;
7470 IrInstSrc *result;
64447471 switch (builtin_fn->id) {
64457472 case BuiltinFnIdCtz:
64467473 result = ir_build_ctz(irb, scope, node, arg0_value, arg1_value);
......@@ -6465,28 +7492,28 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64657492 case BuiltinFnIdHasDecl:
64667493 {
64677494 AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
6468 IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
6469 if (arg0_value == irb->codegen->invalid_instruction)
7495 IrInstSrc *arg0_value = ir_gen_node(irb, arg0_node, scope);
7496 if (arg0_value == irb->codegen->invalid_inst_src)
64707497 return arg0_value;
64717498
64727499 AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
6473 IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
6474 if (arg1_value == irb->codegen->invalid_instruction)
7500 IrInstSrc *arg1_value = ir_gen_node(irb, arg1_node, scope);
7501 if (arg1_value == irb->codegen->invalid_inst_src)
64757502 return arg1_value;
64767503
6477 IrInstruction *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
7504 IrInstSrc *has_decl = ir_build_has_decl(irb, scope, node, arg0_value, arg1_value);
64787505 return ir_lval_wrap(irb, scope, has_decl, lval, result_loc);
64797506 }
64807507 case BuiltinFnIdUnionInit:
64817508 {
64827509 AstNode *union_type_node = node->data.fn_call_expr.params.at(0);
6483 IrInstruction *union_type_inst = ir_gen_node(irb, union_type_node, scope);
6484 if (union_type_inst == irb->codegen->invalid_instruction)
7510 IrInstSrc *union_type_inst = ir_gen_node(irb, union_type_node, scope);
7511 if (union_type_inst == irb->codegen->invalid_inst_src)
64857512 return union_type_inst;
64867513
64877514 AstNode *name_node = node->data.fn_call_expr.params.at(1);
6488 IrInstruction *name_inst = ir_gen_node(irb, name_node, scope);
6489 if (name_inst == irb->codegen->invalid_instruction)
7515 IrInstSrc *name_inst = ir_gen_node(irb, name_node, scope);
7516 if (name_inst == irb->codegen->invalid_inst_src)
64907517 return name_inst;
64917518
64927519 AstNode *init_node = node->data.fn_call_expr.params.at(2);
......@@ -6498,7 +7525,7 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
64987525 zig_unreachable();
64997526}
65007527
6501static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7528static IrInstSrc *ir_gen_fn_call(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
65027529 ResultLoc *result_loc)
65037530{
65047531 assert(node->type == NodeTypeFnCallExpr);
......@@ -6511,16 +7538,16 @@ static IrInstruction *ir_gen_fn_call(IrBuilder *irb, Scope *scope, AstNode *node
65117538 nullptr, node->data.fn_call_expr.params.items, node->data.fn_call_expr.params.length, lval, result_loc);
65127539}
65137540
6514static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7541static IrInstSrc *ir_gen_if_bool_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
65157542 ResultLoc *result_loc)
65167543{
65177544 assert(node->type == NodeTypeIfBoolExpr);
65187545
6519 IrInstruction *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
6520 if (condition == irb->codegen->invalid_instruction)
6521 return irb->codegen->invalid_instruction;
7546 IrInstSrc *condition = ir_gen_node(irb, node->data.if_bool_expr.condition, scope);
7547 if (condition == irb->codegen->invalid_inst_src)
7548 return irb->codegen->invalid_inst_src;
65227549
6523 IrInstruction *is_comptime;
7550 IrInstSrc *is_comptime;
65247551 if (ir_should_inline(irb->exec, scope)) {
65257552 is_comptime = ir_build_const_bool(irb, scope, node, true);
65267553 } else {
......@@ -6530,11 +7557,11 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
65307557 AstNode *then_node = node->data.if_bool_expr.then_block;
65317558 AstNode *else_node = node->data.if_bool_expr.else_node;
65327559
6533 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "Then");
6534 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "Else");
6535 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "EndIf");
7560 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "Then");
7561 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "Else");
7562 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "EndIf");
65367563
6537 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
7564 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, condition,
65387565 then_block, else_block, is_comptime);
65397566 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
65407567 result_loc, is_comptime);
......@@ -6542,70 +7569,70 @@ static IrInstruction *ir_gen_if_bool_expr(IrBuilder *irb, Scope *scope, AstNode
65427569 ir_set_cursor_at_end_and_append_block(irb, then_block);
65437570
65447571 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
6545 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
7572 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, subexpr_scope, lval,
65467573 &peer_parent->peers.at(0)->base);
6547 if (then_expr_result == irb->codegen->invalid_instruction)
6548 return irb->codegen->invalid_instruction;
6549 IrBasicBlock *after_then_block = irb->current_basic_block;
7574 if (then_expr_result == irb->codegen->invalid_inst_src)
7575 return irb->codegen->invalid_inst_src;
7576 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
65507577 if (!instr_is_unreachable(then_expr_result))
65517578 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65527579
65537580 ir_set_cursor_at_end_and_append_block(irb, else_block);
6554 IrInstruction *else_expr_result;
7581 IrInstSrc *else_expr_result;
65557582 if (else_node) {
65567583 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
6557 if (else_expr_result == irb->codegen->invalid_instruction)
6558 return irb->codegen->invalid_instruction;
7584 if (else_expr_result == irb->codegen->invalid_inst_src)
7585 return irb->codegen->invalid_inst_src;
65597586 } else {
65607587 else_expr_result = ir_build_const_void(irb, scope, node);
65617588 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
65627589 }
6563 IrBasicBlock *after_else_block = irb->current_basic_block;
7590 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
65647591 if (!instr_is_unreachable(else_expr_result))
65657592 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
65667593
65677594 ir_set_cursor_at_end_and_append_block(irb, endif_block);
6568 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
7595 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
65697596 incoming_values[0] = then_expr_result;
65707597 incoming_values[1] = else_expr_result;
6571 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
7598 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
65727599 incoming_blocks[0] = after_then_block;
65737600 incoming_blocks[1] = after_else_block;
65747601
6575 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
7602 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
65767603 return ir_expr_wrap(irb, scope, phi, result_loc);
65777604}
65787605
6579static IrInstruction *ir_gen_prefix_op_id_lval(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
7606static IrInstSrc *ir_gen_prefix_op_id_lval(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id, LVal lval) {
65807607 assert(node->type == NodeTypePrefixOpExpr);
65817608 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
65827609
6583 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
6584 if (value == irb->codegen->invalid_instruction)
7610 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
7611 if (value == irb->codegen->invalid_inst_src)
65857612 return value;
65867613
65877614 return ir_build_un_op(irb, scope, node, op_id, value);
65887615}
65897616
6590static IrInstruction *ir_gen_prefix_op_id(IrBuilder *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
7617static IrInstSrc *ir_gen_prefix_op_id(IrBuilderSrc *irb, Scope *scope, AstNode *node, IrUnOp op_id) {
65917618 return ir_gen_prefix_op_id_lval(irb, scope, node, op_id, LValNone);
65927619}
65937620
6594static IrInstruction *ir_expr_wrap(IrBuilder *irb, Scope *scope, IrInstruction *inst, ResultLoc *result_loc) {
6595 if (inst == irb->codegen->invalid_instruction) return inst;
6596 ir_build_end_expr(irb, scope, inst->source_node, inst, result_loc);
7621static IrInstSrc *ir_expr_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *inst, ResultLoc *result_loc) {
7622 if (inst == irb->codegen->invalid_inst_src) return inst;
7623 ir_build_end_expr(irb, scope, inst->base.source_node, inst, result_loc);
65977624 return inst;
65987625}
65997626
6600static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *value, LVal lval,
7627static IrInstSrc *ir_lval_wrap(IrBuilderSrc *irb, Scope *scope, IrInstSrc *value, LVal lval,
66017628 ResultLoc *result_loc)
66027629{
66037630 // This logic must be kept in sync with
66047631 // [STMT_EXPR_TEST_THING] <--- (search this token)
6605 if (value == irb->codegen->invalid_instruction ||
7632 if (value == irb->codegen->invalid_inst_src ||
66067633 instr_is_unreachable(value) ||
6607 value->source_node->type == NodeTypeDefer ||
6608 value->id == IrInstructionIdDeclVarSrc)
7634 value->base.source_node->type == NodeTypeDefer ||
7635 value->id == IrInstSrcIdDeclVar)
66097636 {
66107637 return value;
66117638 }
......@@ -6613,7 +7640,7 @@ static IrInstruction *ir_lval_wrap(IrBuilder *irb, Scope *scope, IrInstruction *
66137640 if (lval == LValPtr) {
66147641 // We needed a pointer to a value, but we got a value. So we create
66157642 // an instruction which just makes a pointer of it.
6616 return ir_build_ref(irb, scope, value->source_node, value, false, false);
7643 return ir_build_ref_src(irb, scope, value->base.source_node, value, false, false);
66177644 } else if (result_loc != nullptr) {
66187645 return ir_expr_wrap(irb, scope, value, result_loc);
66197646 } else {
......@@ -6636,7 +7663,7 @@ static PtrLen star_token_to_ptr_len(TokenId token_id) {
66367663 }
66377664}
66387665
6639static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode *node) {
7666static IrInstSrc *ir_gen_pointer_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
66407667 assert(node->type == NodeTypePointerType);
66417668
66427669 PtrLen ptr_len = star_token_to_ptr_len(node->data.pointer_type.star_token->id);
......@@ -6648,26 +7675,26 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66487675 AstNode *expr_node = node->data.pointer_type.op_expr;
66497676 AstNode *align_expr = node->data.pointer_type.align_expr;
66507677
6651 IrInstruction *sentinel;
7678 IrInstSrc *sentinel;
66527679 if (sentinel_expr != nullptr) {
66537680 sentinel = ir_gen_node(irb, sentinel_expr, scope);
6654 if (sentinel == irb->codegen->invalid_instruction)
7681 if (sentinel == irb->codegen->invalid_inst_src)
66557682 return sentinel;
66567683 } else {
66577684 sentinel = nullptr;
66587685 }
66597686
6660 IrInstruction *align_value;
7687 IrInstSrc *align_value;
66617688 if (align_expr != nullptr) {
66627689 align_value = ir_gen_node(irb, align_expr, scope);
6663 if (align_value == irb->codegen->invalid_instruction)
7690 if (align_value == irb->codegen->invalid_inst_src)
66647691 return align_value;
66657692 } else {
66667693 align_value = nullptr;
66677694 }
66687695
6669 IrInstruction *child_type = ir_gen_node(irb, expr_node, scope);
6670 if (child_type == irb->codegen->invalid_instruction)
7696 IrInstSrc *child_type = ir_gen_node(irb, expr_node, scope);
7697 if (child_type == irb->codegen->invalid_inst_src)
66717698 return child_type;
66727699
66737700 uint32_t bit_offset_start = 0;
......@@ -6677,7 +7704,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66777704 bigint_append_buf(val_buf, node->data.pointer_type.bit_offset_start, 10);
66787705 exec_add_error_node(irb->codegen, irb->exec, node,
66797706 buf_sprintf("value %s too large for u32 bit offset", buf_ptr(val_buf)));
6680 return irb->codegen->invalid_instruction;
7707 return irb->codegen->invalid_inst_src;
66817708 }
66827709 bit_offset_start = bigint_as_u32(node->data.pointer_type.bit_offset_start);
66837710 }
......@@ -6689,7 +7716,7 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66897716 bigint_append_buf(val_buf, node->data.pointer_type.host_int_bytes, 10);
66907717 exec_add_error_node(irb->codegen, irb->exec, node,
66917718 buf_sprintf("value %s too large for u32 byte count", buf_ptr(val_buf)));
6692 return irb->codegen->invalid_instruction;
7719 return irb->codegen->invalid_inst_src;
66937720 }
66947721 host_int_bytes = bigint_as_u32(node->data.pointer_type.host_int_bytes);
66957722 }
......@@ -6697,43 +7724,43 @@ static IrInstruction *ir_gen_pointer_type(IrBuilder *irb, Scope *scope, AstNode
66977724 if (host_int_bytes != 0 && bit_offset_start >= host_int_bytes * 8) {
66987725 exec_add_error_node(irb->codegen, irb->exec, node,
66997726 buf_sprintf("bit offset starts after end of host integer"));
6700 return irb->codegen->invalid_instruction;
7727 return irb->codegen->invalid_inst_src;
67017728 }
67027729
67037730 return ir_build_ptr_type(irb, scope, node, child_type, is_const, is_volatile,
67047731 ptr_len, sentinel, align_value, bit_offset_start, host_int_bytes, is_allow_zero);
67057732}
67067733
6707static IrInstruction *ir_gen_catch_unreachable(IrBuilder *irb, Scope *scope, AstNode *source_node,
7734static IrInstSrc *ir_gen_catch_unreachable(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
67087735 AstNode *expr_node, LVal lval, ResultLoc *result_loc)
67097736{
6710 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
6711 if (err_union_ptr == irb->codegen->invalid_instruction)
6712 return irb->codegen->invalid_instruction;
7737 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
7738 if (err_union_ptr == irb->codegen->invalid_inst_src)
7739 return irb->codegen->invalid_inst_src;
67137740
6714 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, scope, source_node, err_union_ptr, true, false);
6715 if (payload_ptr == irb->codegen->invalid_instruction)
6716 return irb->codegen->invalid_instruction;
7741 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, scope, source_node, err_union_ptr, true, false);
7742 if (payload_ptr == irb->codegen->invalid_inst_src)
7743 return irb->codegen->invalid_inst_src;
67177744
67187745 if (lval == LValPtr)
67197746 return payload_ptr;
67207747
6721 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
7748 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, source_node, payload_ptr);
67227749 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
67237750}
67247751
6725static IrInstruction *ir_gen_bool_not(IrBuilder *irb, Scope *scope, AstNode *node) {
7752static IrInstSrc *ir_gen_bool_not(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
67267753 assert(node->type == NodeTypePrefixOpExpr);
67277754 AstNode *expr_node = node->data.prefix_op_expr.primary_expr;
67287755
6729 IrInstruction *value = ir_gen_node(irb, expr_node, scope);
6730 if (value == irb->codegen->invalid_instruction)
6731 return irb->codegen->invalid_instruction;
7756 IrInstSrc *value = ir_gen_node(irb, expr_node, scope);
7757 if (value == irb->codegen->invalid_inst_src)
7758 return irb->codegen->invalid_inst_src;
67327759
67337760 return ir_build_bool_not(irb, scope, node, value);
67347761}
67357762
6736static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7763static IrInstSrc *ir_gen_prefix_op_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
67377764 ResultLoc *result_loc)
67387765{
67397766 assert(node->type == NodeTypePrefixOpExpr);
......@@ -6761,12 +7788,12 @@ static IrInstruction *ir_gen_prefix_op_expr(IrBuilder *irb, Scope *scope, AstNod
67617788 zig_unreachable();
67627789}
67637790
6764static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNode *source_node,
6765 IrInstruction *union_type, IrInstruction *field_name, AstNode *expr_node,
7791static IrInstSrc *ir_gen_union_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *source_node,
7792 IrInstSrc *union_type, IrInstSrc *field_name, AstNode *expr_node,
67667793 LVal lval, ResultLoc *parent_result_loc)
67677794{
6768 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
6769 IrInstruction *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
7795 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, source_node, parent_result_loc, union_type);
7796 IrInstSrc *field_ptr = ir_build_field_ptr_instruction(irb, scope, source_node, container_ptr,
67707797 field_name, true);
67717798
67727799 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
......@@ -6775,18 +7802,18 @@ static IrInstruction *ir_gen_union_init_expr(IrBuilder *irb, Scope *scope, AstNo
67757802 ir_ref_instruction(field_ptr, irb->current_basic_block);
67767803 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
67777804
6778 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7805 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
67797806 &result_loc_inst->base);
6780 if (expr_value == irb->codegen->invalid_instruction)
7807 if (expr_value == irb->codegen->invalid_inst_src)
67817808 return expr_value;
67827809
6783 IrInstruction *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
7810 IrInstSrc *init_union = ir_build_union_init_named_field(irb, scope, source_node, union_type,
67847811 field_name, field_ptr, container_ptr);
67857812
67867813 return ir_lval_wrap(irb, scope, init_union, lval, parent_result_loc);
67877814}
67887815
6789static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
7816static IrInstSrc *ir_gen_container_init_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
67907817 ResultLoc *parent_result_loc)
67917818{
67927819 assert(node->type == NodeTypeContainerInitExpr);
......@@ -6798,42 +7825,42 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
67987825 ResultLoc *child_result_loc;
67997826 AstNode *init_array_type_source_node;
68007827 if (container_init_expr->type != nullptr) {
6801 IrInstruction *container_type;
7828 IrInstSrc *container_type;
68027829 if (container_init_expr->type->type == NodeTypeInferredArrayType) {
68037830 if (kind == ContainerInitKindStruct) {
68047831 add_node_error(irb->codegen, container_init_expr->type,
68057832 buf_sprintf("initializing array with struct syntax"));
6806 return irb->codegen->invalid_instruction;
7833 return irb->codegen->invalid_inst_src;
68077834 }
6808 IrInstruction *sentinel;
7835 IrInstSrc *sentinel;
68097836 if (container_init_expr->type->data.inferred_array_type.sentinel != nullptr) {
68107837 sentinel = ir_gen_node(irb, container_init_expr->type->data.inferred_array_type.sentinel, scope);
6811 if (sentinel == irb->codegen->invalid_instruction)
7838 if (sentinel == irb->codegen->invalid_inst_src)
68127839 return sentinel;
68137840 } else {
68147841 sentinel = nullptr;
68157842 }
68167843
6817 IrInstruction *elem_type = ir_gen_node(irb,
7844 IrInstSrc *elem_type = ir_gen_node(irb,
68187845 container_init_expr->type->data.inferred_array_type.child_type, scope);
6819 if (elem_type == irb->codegen->invalid_instruction)
7846 if (elem_type == irb->codegen->invalid_inst_src)
68207847 return elem_type;
68217848 size_t item_count = container_init_expr->entries.length;
6822 IrInstruction *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
7849 IrInstSrc *item_count_inst = ir_build_const_usize(irb, scope, node, item_count);
68237850 container_type = ir_build_array_type(irb, scope, node, item_count_inst, sentinel, elem_type);
68247851 } else {
68257852 container_type = ir_gen_node(irb, container_init_expr->type, scope);
6826 if (container_type == irb->codegen->invalid_instruction)
7853 if (container_type == irb->codegen->invalid_inst_src)
68277854 return container_type;
68287855 }
68297856
68307857 result_loc_cast = ir_build_cast_result_loc(irb, container_type, parent_result_loc);
68317858 child_result_loc = &result_loc_cast->base;
6832 init_array_type_source_node = container_type->source_node;
7859 init_array_type_source_node = container_type->base.source_node;
68337860 } else {
68347861 child_result_loc = parent_result_loc;
68357862 if (parent_result_loc->source_instruction != nullptr) {
6836 init_array_type_source_node = parent_result_loc->source_instruction->source_node;
7863 init_array_type_source_node = parent_result_loc->source_instruction->base.source_node;
68377864 } else {
68387865 init_array_type_source_node = node;
68397866 }
......@@ -6841,11 +7868,11 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68417868
68427869 switch (kind) {
68437870 case ContainerInitKindStruct: {
6844 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
7871 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
68457872 nullptr);
68467873
68477874 size_t field_count = container_init_expr->entries.length;
6848 IrInstructionContainerInitFieldsField *fields = allocate<IrInstructionContainerInitFieldsField>(field_count);
7875 IrInstSrcContainerInitFieldsField *fields = allocate<IrInstSrcContainerInitFieldsField>(field_count);
68497876 for (size_t i = 0; i < field_count; i += 1) {
68507877 AstNode *entry_node = container_init_expr->entries.at(i);
68517878 assert(entry_node->type == NodeTypeStructValueField);
......@@ -6853,7 +7880,7 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68537880 Buf *name = entry_node->data.struct_val_field.name;
68547881 AstNode *expr_node = entry_node->data.struct_val_field.expr;
68557882
6856 IrInstruction *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
7883 IrInstSrc *field_ptr = ir_build_field_ptr(irb, scope, entry_node, container_ptr, name, true);
68577884 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
68587885 result_loc_inst->base.id = ResultLocIdInstruction;
68597886 result_loc_inst->base.source_instruction = field_ptr;
......@@ -6861,16 +7888,16 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68617888 ir_ref_instruction(field_ptr, irb->current_basic_block);
68627889 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
68637890
6864 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7891 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
68657892 &result_loc_inst->base);
6866 if (expr_value == irb->codegen->invalid_instruction)
7893 if (expr_value == irb->codegen->invalid_inst_src)
68677894 return expr_value;
68687895
68697896 fields[i].name = name;
68707897 fields[i].source_node = entry_node;
68717898 fields[i].result_loc = field_ptr;
68727899 }
6873 IrInstruction *result = ir_build_container_init_fields(irb, scope, node, field_count,
7900 IrInstSrc *result = ir_build_container_init_fields(irb, scope, node, field_count,
68747901 fields, container_ptr);
68757902
68767903 if (result_loc_cast != nullptr) {
......@@ -6881,15 +7908,15 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68817908 case ContainerInitKindArray: {
68827909 size_t item_count = container_init_expr->entries.length;
68837910
6884 IrInstruction *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
7911 IrInstSrc *container_ptr = ir_build_resolve_result(irb, scope, node, child_result_loc,
68857912 nullptr);
68867913
6887 IrInstruction **result_locs = allocate<IrInstruction *>(item_count);
7914 IrInstSrc **result_locs = allocate<IrInstSrc *>(item_count);
68887915 for (size_t i = 0; i < item_count; i += 1) {
68897916 AstNode *expr_node = container_init_expr->entries.at(i);
68907917
6891 IrInstruction *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
6892 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
7918 IrInstSrc *elem_index = ir_build_const_usize(irb, scope, expr_node, i);
7919 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, scope, expr_node, container_ptr,
68937920 elem_index, false, PtrLenSingle, init_array_type_source_node);
68947921 ResultLocInstruction *result_loc_inst = allocate<ResultLocInstruction>(1);
68957922 result_loc_inst->base.id = ResultLocIdInstruction;
......@@ -6898,14 +7925,14 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
68987925 ir_ref_instruction(elem_ptr, irb->current_basic_block);
68997926 ir_build_reset_result(irb, scope, expr_node, &result_loc_inst->base);
69007927
6901 IrInstruction *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
7928 IrInstSrc *expr_value = ir_gen_node_extra(irb, expr_node, scope, LValNone,
69027929 &result_loc_inst->base);
6903 if (expr_value == irb->codegen->invalid_instruction)
7930 if (expr_value == irb->codegen->invalid_inst_src)
69047931 return expr_value;
69057932
69067933 result_locs[i] = elem_ptr;
69077934 }
6908 IrInstruction *result = ir_build_container_init_list(irb, scope, node, item_count,
7935 IrInstSrc *result = ir_build_container_init_list(irb, scope, node, item_count,
69097936 result_locs, container_ptr, init_array_type_source_node);
69107937 if (result_loc_cast != nullptr) {
69117938 result = ir_build_implicit_cast(irb, scope, node, result, result_loc_cast);
......@@ -6916,19 +7943,19 @@ static IrInstruction *ir_gen_container_init_expr(IrBuilder *irb, Scope *scope, A
69167943 zig_unreachable();
69177944}
69187945
6919static ResultLocVar *ir_build_var_result_loc(IrBuilder *irb, IrInstruction *alloca, ZigVar *var) {
7946static ResultLocVar *ir_build_var_result_loc(IrBuilderSrc *irb, IrInstSrc *alloca, ZigVar *var) {
69207947 ResultLocVar *result_loc_var = allocate<ResultLocVar>(1);
69217948 result_loc_var->base.id = ResultLocIdVar;
69227949 result_loc_var->base.source_instruction = alloca;
69237950 result_loc_var->base.allow_write_through_const = true;
69247951 result_loc_var->var = var;
69257952
6926 ir_build_reset_result(irb, alloca->scope, alloca->source_node, &result_loc_var->base);
7953 ir_build_reset_result(irb, alloca->base.scope, alloca->base.source_node, &result_loc_var->base);
69277954
69287955 return result_loc_var;
69297956}
69307957
6931static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *dest_type,
7958static ResultLocCast *ir_build_cast_result_loc(IrBuilderSrc *irb, IrInstSrc *dest_type,
69327959 ResultLoc *parent_result_loc)
69337960{
69347961 ResultLocCast *result_loc_cast = allocate<ResultLocCast>(1);
......@@ -6938,37 +7965,37 @@ static ResultLocCast *ir_build_cast_result_loc(IrBuilder *irb, IrInstruction *de
69387965 ir_ref_instruction(dest_type, irb->current_basic_block);
69397966 result_loc_cast->parent = parent_result_loc;
69407967
6941 ir_build_reset_result(irb, dest_type->scope, dest_type->source_node, &result_loc_cast->base);
7968 ir_build_reset_result(irb, dest_type->base.scope, dest_type->base.source_node, &result_loc_cast->base);
69427969
69437970 return result_loc_cast;
69447971}
69457972
6946static void build_decl_var_and_init(IrBuilder *irb, Scope *scope, AstNode *source_node, ZigVar *var,
6947 IrInstruction *init, const char *name_hint, IrInstruction *is_comptime)
7973static void build_decl_var_and_init(IrBuilderSrc *irb, Scope *scope, AstNode *source_node, ZigVar *var,
7974 IrInstSrc *init, const char *name_hint, IrInstSrc *is_comptime)
69487975{
6949 IrInstruction *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
7976 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, source_node, nullptr, name_hint, is_comptime);
69507977 ResultLocVar *var_result_loc = ir_build_var_result_loc(irb, alloca, var);
69517978 ir_build_end_expr(irb, scope, source_node, init, &var_result_loc->base);
69527979 ir_build_var_decl_src(irb, scope, source_node, var, nullptr, alloca);
69537980}
69547981
6955static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *node) {
7982static IrInstSrc *ir_gen_var_decl(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
69567983 assert(node->type == NodeTypeVariableDeclaration);
69577984
69587985 AstNodeVariableDeclaration *variable_declaration = &node->data.variable_declaration;
69597986
69607987 if (buf_eql_str(variable_declaration->symbol, "_")) {
69617988 add_node_error(irb->codegen, node, buf_sprintf("`_` is not a declarable symbol"));
6962 return irb->codegen->invalid_instruction;
7989 return irb->codegen->invalid_inst_src;
69637990 }
69647991
69657992 // Used for the type expr and the align expr
69667993 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
69677994
6968 IrInstruction *type_instruction;
7995 IrInstSrc *type_instruction;
69697996 if (variable_declaration->type != nullptr) {
69707997 type_instruction = ir_gen_node(irb, variable_declaration->type, comptime_scope);
6971 if (type_instruction == irb->codegen->invalid_instruction)
7998 if (type_instruction == irb->codegen->invalid_inst_src)
69727999 return type_instruction;
69738000 } else {
69748001 type_instruction = nullptr;
......@@ -6979,22 +8006,22 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
69798006 bool is_extern = variable_declaration->is_extern;
69808007
69818008 bool is_comptime_scalar = ir_should_inline(irb->exec, scope) || variable_declaration->is_comptime;
6982 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
8009 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node, is_comptime_scalar);
69838010 ZigVar *var = ir_create_var(irb, node, scope, variable_declaration->symbol,
69848011 is_const, is_const, is_shadowable, is_comptime);
6985 // we detect IrInstructionIdDeclVarSrc in gen_block to make sure the next node
8012 // we detect IrInstSrcDeclVar in gen_block to make sure the next node
69868013 // is inside var->child_scope
69878014
69888015 if (!is_extern && !variable_declaration->expr) {
69898016 var->var_type = irb->codegen->builtin_types.entry_invalid;
69908017 add_node_error(irb->codegen, node, buf_sprintf("variables must be initialized"));
6991 return irb->codegen->invalid_instruction;
8018 return irb->codegen->invalid_inst_src;
69928019 }
69938020
6994 IrInstruction *align_value = nullptr;
8021 IrInstSrc *align_value = nullptr;
69958022 if (variable_declaration->align_expr != nullptr) {
69968023 align_value = ir_gen_node(irb, variable_declaration->align_expr, comptime_scope);
6997 if (align_value == irb->codegen->invalid_instruction)
8024 if (align_value == irb->codegen->invalid_inst_src)
69988025 return align_value;
69998026 }
70008027
......@@ -7006,7 +8033,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
70068033 // Parser should ensure that this never happens
70078034 assert(variable_declaration->threadlocal_tok == nullptr);
70088035
7009 IrInstruction *alloca = ir_build_alloca_src(irb, scope, node, align_value,
8036 IrInstSrc *alloca = ir_build_alloca_src(irb, scope, node, align_value,
70108037 buf_ptr(variable_declaration->symbol), is_comptime);
70118038
70128039 // Create a result location for the initialization expression.
......@@ -7024,19 +8051,19 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
70248051 Scope *init_scope = is_comptime_scalar ?
70258052 create_comptime_scope(irb->codegen, variable_declaration->expr, scope) : scope;
70268053
7027 // Temporarily set the name of the IrExecutable to the VariableDeclaration
8054 // Temporarily set the name of the IrExecutableSrc to the VariableDeclaration
70288055 // so that the struct or enum from the init expression inherits the name.
70298056 Buf *old_exec_name = irb->exec->name;
70308057 irb->exec->name = variable_declaration->symbol;
7031 IrInstruction *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
8058 IrInstSrc *init_value = ir_gen_node_extra(irb, variable_declaration->expr, init_scope,
70328059 LValNone, init_result_loc);
70338060 irb->exec->name = old_exec_name;
70348061
7035 if (init_value == irb->codegen->invalid_instruction)
7036 return irb->codegen->invalid_instruction;
8062 if (init_value == irb->codegen->invalid_inst_src)
8063 return irb->codegen->invalid_inst_src;
70378064
70388065 if (result_loc_cast != nullptr) {
7039 IrInstruction *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->source_node,
8066 IrInstSrc *implicit_cast = ir_build_implicit_cast(irb, scope, init_value->base.source_node,
70408067 init_value, result_loc_cast);
70418068 ir_build_end_expr(irb, scope, node, implicit_cast, &result_loc_var->base);
70428069 }
......@@ -7044,7 +8071,7 @@ static IrInstruction *ir_gen_var_decl(IrBuilder *irb, Scope *scope, AstNode *nod
70448071 return ir_build_var_decl_src(irb, scope, node, var, align_value, alloca);
70458072}
70468073
7047static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8074static IrInstSrc *ir_gen_while_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
70488075 ResultLoc *result_loc)
70498076{
70508077 assert(node->type == NodeTypeWhileExpr);
......@@ -7052,15 +8079,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
70528079 AstNode *continue_expr_node = node->data.while_expr.continue_expr;
70538080 AstNode *else_node = node->data.while_expr.else_node;
70548081
7055 IrBasicBlock *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
7056 IrBasicBlock *body_block = ir_create_basic_block(irb, scope, "WhileBody");
7057 IrBasicBlock *continue_block = continue_expr_node ?
8082 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, scope, "WhileCond");
8083 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, scope, "WhileBody");
8084 IrBasicBlockSrc *continue_block = continue_expr_node ?
70588085 ir_create_basic_block(irb, scope, "WhileContinue") : cond_block;
7059 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
7060 IrBasicBlock *else_block = else_node ?
8086 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "WhileEnd");
8087 IrBasicBlockSrc *else_block = else_node ?
70618088 ir_create_basic_block(irb, scope, "WhileElse") : end_block;
70628089
7063 IrInstruction *is_comptime = ir_build_const_bool(irb, scope, node,
8090 IrInstSrc *is_comptime = ir_build_const_bool(irb, scope, node,
70648091 ir_should_inline(irb->exec, scope) || node->data.while_expr.is_inline);
70658092 ir_build_br(irb, scope, node, cond_block, is_comptime);
70668093
......@@ -7081,15 +8108,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
70818108 } else {
70828109 payload_scope = subexpr_scope;
70838110 }
7084 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
8111 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
70858112 LValPtr, nullptr);
7086 if (err_val_ptr == irb->codegen->invalid_instruction)
8113 if (err_val_ptr == irb->codegen->invalid_inst_src)
70878114 return err_val_ptr;
7088 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
8115 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node->data.while_expr.condition, err_val_ptr,
70898116 true, false);
7090 IrBasicBlock *after_cond_block = irb->current_basic_block;
7091 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7092 IrInstruction *cond_br_inst;
8117 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8118 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8119 IrInstSrc *cond_br_inst;
70938120 if (!instr_is_unreachable(is_err)) {
70948121 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_err,
70958122 else_block, body_block, is_comptime);
......@@ -7104,15 +8131,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71048131
71058132 ir_set_cursor_at_end_and_append_block(irb, body_block);
71068133 if (var_symbol) {
7107 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, payload_scope, symbol_node,
8134 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, payload_scope, symbol_node,
71088135 err_val_ptr, false, false);
7109 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
7110 ir_build_ref(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
8136 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
8137 ir_build_ref_src(irb, payload_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
71118138 ir_build_var_decl_src(irb, payload_scope, symbol_node, payload_var, nullptr, var_ptr);
71128139 }
71138140
7114 ZigList<IrInstruction *> incoming_values = {0};
7115 ZigList<IrBasicBlock *> incoming_blocks = {0};
8141 ZigList<IrInstSrc *> incoming_values = {0};
8142 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
71168143
71178144 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, payload_scope);
71188145 loop_scope->break_block = end_block;
......@@ -7126,8 +8153,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71268153 // Note the body block of the loop is not the place that lval and result_loc are used -
71278154 // it's actually in break statements, handled similarly to return statements.
71288155 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7129 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7130 if (body_result == irb->codegen->invalid_instruction)
8156 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8157 if (body_result == irb->codegen->invalid_inst_src)
71318158 return body_result;
71328159
71338160 if (!instr_is_unreachable(body_result)) {
......@@ -7137,8 +8164,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71378164
71388165 if (continue_expr_node) {
71398166 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7140 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
7141 if (expr_result == irb->codegen->invalid_instruction)
8167 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, payload_scope);
8168 if (expr_result == irb->codegen->invalid_inst_src)
71428169 return expr_result;
71438170 if (!instr_is_unreachable(expr_result)) {
71448171 ir_mark_gen(ir_build_check_statement_is_void(irb, payload_scope, continue_expr_node, expr_result));
......@@ -7154,7 +8181,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71548181 ZigVar *err_var = ir_create_var(irb, err_symbol_node, scope, err_symbol,
71558182 true, false, false, is_comptime);
71568183 Scope *err_scope = err_var->child_scope;
7157 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, err_symbol_node, err_val_ptr);
8184 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, err_symbol_node, err_val_ptr);
71588185 ir_build_var_decl_src(irb, err_scope, symbol_node, err_var, nullptr, err_ptr);
71598186
71608187 if (peer_parent->peers.length != 0) {
......@@ -7162,12 +8189,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71628189 }
71638190 ResultLocPeer *peer_result = create_peer_result(peer_parent);
71648191 peer_parent->peers.append(peer_result);
7165 IrInstruction *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
7166 if (else_result == irb->codegen->invalid_instruction)
8192 IrInstSrc *else_result = ir_gen_node_extra(irb, else_node, err_scope, lval, &peer_result->base);
8193 if (else_result == irb->codegen->invalid_inst_src)
71678194 return else_result;
71688195 if (!instr_is_unreachable(else_result))
71698196 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
7170 IrBasicBlock *after_else_block = irb->current_basic_block;
8197 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
71718198 ir_set_cursor_at_end_and_append_block(irb, end_block);
71728199 if (else_result) {
71738200 incoming_blocks.append(after_else_block);
......@@ -7180,7 +8207,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71808207 peer_parent->peers.last()->next_bb = end_block;
71818208 }
71828209
7183 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8210 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
71848211 incoming_blocks.items, incoming_values.items, peer_parent);
71858212 return ir_expr_wrap(irb, scope, phi, result_loc);
71868213 } else if (var_symbol != nullptr) {
......@@ -7192,15 +8219,15 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
71928219 ZigVar *payload_var = ir_create_var(irb, symbol_node, subexpr_scope, var_symbol,
71938220 true, false, false, is_comptime);
71948221 Scope *child_scope = payload_var->child_scope;
7195 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
8222 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, node->data.while_expr.condition, subexpr_scope,
71968223 LValPtr, nullptr);
7197 if (maybe_val_ptr == irb->codegen->invalid_instruction)
8224 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
71988225 return maybe_val_ptr;
7199 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
7200 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node->data.while_expr.condition, maybe_val);
7201 IrBasicBlock *after_cond_block = irb->current_basic_block;
7202 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7203 IrInstruction *cond_br_inst;
8226 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node->data.while_expr.condition, maybe_val_ptr);
8227 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node->data.while_expr.condition, maybe_val);
8228 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8229 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8230 IrInstSrc *cond_br_inst;
72048231 if (!instr_is_unreachable(is_non_null)) {
72058232 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, is_non_null,
72068233 body_block, else_block, is_comptime);
......@@ -7214,13 +8241,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72148241 is_comptime);
72158242
72168243 ir_set_cursor_at_end_and_append_block(irb, body_block);
7217 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
7218 IrInstruction *var_ptr = node->data.while_expr.var_is_ptr ?
7219 ir_build_ref(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
8244 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, child_scope, symbol_node, maybe_val_ptr, false, false);
8245 IrInstSrc *var_ptr = node->data.while_expr.var_is_ptr ?
8246 ir_build_ref_src(irb, child_scope, symbol_node, payload_ptr, true, false) : payload_ptr;
72208247 ir_build_var_decl_src(irb, child_scope, symbol_node, payload_var, nullptr, var_ptr);
72218248
7222 ZigList<IrInstruction *> incoming_values = {0};
7223 ZigList<IrBasicBlock *> incoming_blocks = {0};
8249 ZigList<IrInstSrc *> incoming_values = {0};
8250 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
72248251
72258252 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
72268253 loop_scope->break_block = end_block;
......@@ -7234,8 +8261,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72348261 // Note the body block of the loop is not the place that lval and result_loc are used -
72358262 // it's actually in break statements, handled similarly to return statements.
72368263 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7237 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7238 if (body_result == irb->codegen->invalid_instruction)
8264 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8265 if (body_result == irb->codegen->invalid_inst_src)
72398266 return body_result;
72408267
72418268 if (!instr_is_unreachable(body_result)) {
......@@ -7245,8 +8272,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72458272
72468273 if (continue_expr_node) {
72478274 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7248 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
7249 if (expr_result == irb->codegen->invalid_instruction)
8275 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, child_scope);
8276 if (expr_result == irb->codegen->invalid_inst_src)
72508277 return expr_result;
72518278 if (!instr_is_unreachable(expr_result)) {
72528279 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, continue_expr_node, expr_result));
......@@ -7254,7 +8281,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72548281 }
72558282 }
72568283
7257 IrInstruction *else_result = nullptr;
8284 IrInstSrc *else_result = nullptr;
72588285 if (else_node) {
72598286 ir_set_cursor_at_end_and_append_block(irb, else_block);
72608287
......@@ -7264,12 +8291,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72648291 ResultLocPeer *peer_result = create_peer_result(peer_parent);
72658292 peer_parent->peers.append(peer_result);
72668293 else_result = ir_gen_node_extra(irb, else_node, scope, lval, &peer_result->base);
7267 if (else_result == irb->codegen->invalid_instruction)
8294 if (else_result == irb->codegen->invalid_inst_src)
72688295 return else_result;
72698296 if (!instr_is_unreachable(else_result))
72708297 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
72718298 }
7272 IrBasicBlock *after_else_block = irb->current_basic_block;
8299 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
72738300 ir_set_cursor_at_end_and_append_block(irb, end_block);
72748301 if (else_result) {
72758302 incoming_blocks.append(after_else_block);
......@@ -7282,17 +8309,17 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
72828309 peer_parent->peers.last()->next_bb = end_block;
72838310 }
72848311
7285 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8312 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
72868313 incoming_blocks.items, incoming_values.items, peer_parent);
72878314 return ir_expr_wrap(irb, scope, phi, result_loc);
72888315 } else {
72898316 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7290 IrInstruction *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
7291 if (cond_val == irb->codegen->invalid_instruction)
8317 IrInstSrc *cond_val = ir_gen_node(irb, node->data.while_expr.condition, scope);
8318 if (cond_val == irb->codegen->invalid_inst_src)
72928319 return cond_val;
7293 IrBasicBlock *after_cond_block = irb->current_basic_block;
7294 IrInstruction *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
7295 IrInstruction *cond_br_inst;
8320 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8321 IrInstSrc *void_else_result = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, scope, node));
8322 IrInstSrc *cond_br_inst;
72968323 if (!instr_is_unreachable(cond_val)) {
72978324 cond_br_inst = ir_build_cond_br(irb, scope, node->data.while_expr.condition, cond_val,
72988325 body_block, else_block, is_comptime);
......@@ -7306,8 +8333,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73068333 is_comptime);
73078334 ir_set_cursor_at_end_and_append_block(irb, body_block);
73088335
7309 ZigList<IrInstruction *> incoming_values = {0};
7310 ZigList<IrBasicBlock *> incoming_blocks = {0};
8336 ZigList<IrInstSrc *> incoming_values = {0};
8337 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
73118338
73128339 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
73138340
......@@ -7323,8 +8350,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73238350 // Note the body block of the loop is not the place that lval and result_loc are used -
73248351 // it's actually in break statements, handled similarly to return statements.
73258352 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7326 IrInstruction *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
7327 if (body_result == irb->codegen->invalid_instruction)
8353 IrInstSrc *body_result = ir_gen_node(irb, node->data.while_expr.body, &loop_scope->base);
8354 if (body_result == irb->codegen->invalid_inst_src)
73288355 return body_result;
73298356
73308357 if (!instr_is_unreachable(body_result)) {
......@@ -7334,8 +8361,8 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73348361
73358362 if (continue_expr_node) {
73368363 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7337 IrInstruction *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
7338 if (expr_result == irb->codegen->invalid_instruction)
8364 IrInstSrc *expr_result = ir_gen_node(irb, continue_expr_node, subexpr_scope);
8365 if (expr_result == irb->codegen->invalid_inst_src)
73398366 return expr_result;
73408367 if (!instr_is_unreachable(expr_result)) {
73418368 ir_mark_gen(ir_build_check_statement_is_void(irb, scope, continue_expr_node, expr_result));
......@@ -7343,7 +8370,7 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73438370 }
73448371 }
73458372
7346 IrInstruction *else_result = nullptr;
8373 IrInstSrc *else_result = nullptr;
73478374 if (else_node) {
73488375 ir_set_cursor_at_end_and_append_block(irb, else_block);
73498376
......@@ -7354,12 +8381,12 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73548381 peer_parent->peers.append(peer_result);
73558382
73568383 else_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_result->base);
7357 if (else_result == irb->codegen->invalid_instruction)
8384 if (else_result == irb->codegen->invalid_inst_src)
73588385 return else_result;
73598386 if (!instr_is_unreachable(else_result))
73608387 ir_mark_gen(ir_build_br(irb, scope, node, end_block, is_comptime));
73618388 }
7362 IrBasicBlock *after_else_block = irb->current_basic_block;
8389 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
73638390 ir_set_cursor_at_end_and_append_block(irb, end_block);
73648391 if (else_result) {
73658392 incoming_blocks.append(after_else_block);
......@@ -7372,13 +8399,13 @@ static IrInstruction *ir_gen_while_expr(IrBuilder *irb, Scope *scope, AstNode *n
73728399 peer_parent->peers.last()->next_bb = end_block;
73738400 }
73748401
7375 IrInstruction *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
8402 IrInstSrc *phi = ir_build_phi(irb, scope, node, incoming_blocks.length,
73768403 incoming_blocks.items, incoming_values.items, peer_parent);
73778404 return ir_expr_wrap(irb, scope, phi, result_loc);
73788405 }
73798406}
73808407
7381static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
8408static IrInstSrc *ir_gen_for_expr(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
73828409 ResultLoc *result_loc)
73838410{
73848411 assert(node->type == NodeTypeForExpr);
......@@ -7391,17 +8418,17 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
73918418
73928419 if (!elem_node) {
73938420 add_node_error(irb->codegen, node, buf_sprintf("for loop expression missing element parameter"));
7394 return irb->codegen->invalid_instruction;
8421 return irb->codegen->invalid_inst_src;
73958422 }
73968423 assert(elem_node->type == NodeTypeSymbol);
73978424
73988425 ScopeExpr *spill_scope = create_expr_scope(irb->codegen, node, parent_scope);
73998426
7400 IrInstruction *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
7401 if (array_val_ptr == irb->codegen->invalid_instruction)
8427 IrInstSrc *array_val_ptr = ir_gen_node_extra(irb, array_node, &spill_scope->base, LValPtr, nullptr);
8428 if (array_val_ptr == irb->codegen->invalid_inst_src)
74028429 return array_val_ptr;
74038430
7404 IrInstruction *is_comptime = ir_build_const_bool(irb, parent_scope, node,
8431 IrInstSrc *is_comptime = ir_build_const_bool(irb, parent_scope, node,
74058432 ir_should_inline(irb->exec, parent_scope) || node->data.for_expr.is_inline);
74068433
74078434 AstNode *index_var_source_node;
......@@ -7418,50 +8445,50 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74188445 index_var_name = "i";
74198446 }
74208447
7421 IrInstruction *zero = ir_build_const_usize(irb, parent_scope, node, 0);
8448 IrInstSrc *zero = ir_build_const_usize(irb, parent_scope, node, 0);
74228449 build_decl_var_and_init(irb, parent_scope, index_var_source_node, index_var, zero, index_var_name, is_comptime);
74238450 parent_scope = index_var->child_scope;
74248451
7425 IrInstruction *one = ir_build_const_usize(irb, parent_scope, node, 1);
7426 IrInstruction *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
8452 IrInstSrc *one = ir_build_const_usize(irb, parent_scope, node, 1);
8453 IrInstSrc *index_ptr = ir_build_var_ptr(irb, parent_scope, node, index_var);
74278454
74288455
7429 IrBasicBlock *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
7430 IrBasicBlock *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
7431 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
7432 IrBasicBlock *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
7433 IrBasicBlock *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
8456 IrBasicBlockSrc *cond_block = ir_create_basic_block(irb, parent_scope, "ForCond");
8457 IrBasicBlockSrc *body_block = ir_create_basic_block(irb, parent_scope, "ForBody");
8458 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "ForEnd");
8459 IrBasicBlockSrc *else_block = else_node ? ir_create_basic_block(irb, parent_scope, "ForElse") : end_block;
8460 IrBasicBlockSrc *continue_block = ir_create_basic_block(irb, parent_scope, "ForContinue");
74348461
74358462 Buf *len_field_name = buf_create_from_str("len");
7436 IrInstruction *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
7437 IrInstruction *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
8463 IrInstSrc *len_ref = ir_build_field_ptr(irb, parent_scope, node, array_val_ptr, len_field_name, false);
8464 IrInstSrc *len_val = ir_build_load_ptr(irb, &spill_scope->base, node, len_ref);
74388465 ir_build_br(irb, parent_scope, node, cond_block, is_comptime);
74398466
74408467 ir_set_cursor_at_end_and_append_block(irb, cond_block);
7441 IrInstruction *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
7442 IrInstruction *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
7443 IrBasicBlock *after_cond_block = irb->current_basic_block;
7444 IrInstruction *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
7445 IrInstruction *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
8468 IrInstSrc *index_val = ir_build_load_ptr(irb, &spill_scope->base, node, index_ptr);
8469 IrInstSrc *cond = ir_build_bin_op(irb, parent_scope, node, IrBinOpCmpLessThan, index_val, len_val, false);
8470 IrBasicBlockSrc *after_cond_block = irb->current_basic_block;
8471 IrInstSrc *void_else_value = else_node ? nullptr : ir_mark_gen(ir_build_const_void(irb, parent_scope, node));
8472 IrInstSrc *cond_br_inst = ir_mark_gen(ir_build_cond_br(irb, parent_scope, node, cond,
74468473 body_block, else_block, is_comptime));
74478474
74488475 ResultLocPeerParent *peer_parent = ir_build_result_peers(irb, cond_br_inst, end_block, result_loc, is_comptime);
74498476
74508477 ir_set_cursor_at_end_and_append_block(irb, body_block);
74518478 Scope *elem_ptr_scope = node->data.for_expr.elem_is_ptr ? parent_scope : &spill_scope->base;
7452 IrInstruction *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
8479 IrInstSrc *elem_ptr = ir_build_elem_ptr(irb, elem_ptr_scope, node, array_val_ptr, index_val, false,
74538480 PtrLenSingle, nullptr);
74548481 // TODO make it an error to write to element variable or i variable.
74558482 Buf *elem_var_name = elem_node->data.symbol_expr.symbol;
74568483 ZigVar *elem_var = ir_create_var(irb, elem_node, parent_scope, elem_var_name, true, false, false, is_comptime);
74578484 Scope *child_scope = elem_var->child_scope;
74588485
7459 IrInstruction *var_ptr = node->data.for_expr.elem_is_ptr ?
7460 ir_build_ref(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
8486 IrInstSrc *var_ptr = node->data.for_expr.elem_is_ptr ?
8487 ir_build_ref_src(irb, &spill_scope->base, elem_node, elem_ptr, true, false) : elem_ptr;
74618488 ir_build_var_decl_src(irb, parent_scope, elem_node, elem_var, nullptr, var_ptr);
74628489
7463 ZigList<IrInstruction *> incoming_values = {0};
7464 ZigList<IrBasicBlock *> incoming_blocks = {0};
8490 ZigList<IrInstSrc *> incoming_values = {0};
8491 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
74658492 ScopeLoop *loop_scope = create_loop_scope(irb->codegen, node, child_scope);
74668493 loop_scope->break_block = end_block;
74678494 loop_scope->continue_block = continue_block;
......@@ -7475,9 +8502,9 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74758502 // Note the body block of the loop is not the place that lval and result_loc are used -
74768503 // it's actually in break statements, handled similarly to return statements.
74778504 // That is why we set those values in loop_scope above and not in this ir_gen_node call.
7478 IrInstruction *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
7479 if (body_result == irb->codegen->invalid_instruction)
7480 return irb->codegen->invalid_instruction;
8505 IrInstSrc *body_result = ir_gen_node(irb, body_node, &loop_scope->base);
8506 if (body_result == irb->codegen->invalid_inst_src)
8507 return irb->codegen->invalid_inst_src;
74818508
74828509 if (!instr_is_unreachable(body_result)) {
74838510 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.for_expr.body, body_result));
......@@ -7485,11 +8512,11 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74858512 }
74868513
74878514 ir_set_cursor_at_end_and_append_block(irb, continue_block);
7488 IrInstruction *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
8515 IrInstSrc *new_index_val = ir_build_bin_op(irb, child_scope, node, IrBinOpAdd, index_val, one, false);
74898516 ir_build_store_ptr(irb, child_scope, node, index_ptr, new_index_val)->allow_write_through_const = true;
74908517 ir_build_br(irb, child_scope, node, cond_block, is_comptime);
74918518
7492 IrInstruction *else_result = nullptr;
8519 IrInstSrc *else_result = nullptr;
74938520 if (else_node) {
74948521 ir_set_cursor_at_end_and_append_block(irb, else_block);
74958522
......@@ -7499,12 +8526,12 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
74998526 ResultLocPeer *peer_result = create_peer_result(peer_parent);
75008527 peer_parent->peers.append(peer_result);
75018528 else_result = ir_gen_node_extra(irb, else_node, parent_scope, LValNone, &peer_result->base);
7502 if (else_result == irb->codegen->invalid_instruction)
8529 if (else_result == irb->codegen->invalid_inst_src)
75038530 return else_result;
75048531 if (!instr_is_unreachable(else_result))
75058532 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
75068533 }
7507 IrBasicBlock *after_else_block = irb->current_basic_block;
8534 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
75088535 ir_set_cursor_at_end_and_append_block(irb, end_block);
75098536
75108537 if (else_result) {
......@@ -7518,29 +8545,29 @@ static IrInstruction *ir_gen_for_expr(IrBuilder *irb, Scope *parent_scope, AstNo
75188545 peer_parent->peers.last()->next_bb = end_block;
75198546 }
75208547
7521 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
8548 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, incoming_blocks.length,
75228549 incoming_blocks.items, incoming_values.items, peer_parent);
75238550 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
75248551}
75258552
7526static IrInstruction *ir_gen_bool_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8553static IrInstSrc *ir_gen_bool_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75278554 assert(node->type == NodeTypeBoolLiteral);
75288555 return ir_build_const_bool(irb, scope, node, node->data.bool_literal.value);
75298556}
75308557
7531static IrInstruction *ir_gen_enum_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8558static IrInstSrc *ir_gen_enum_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75328559 assert(node->type == NodeTypeEnumLiteral);
75338560 Buf *name = &node->data.enum_literal.identifier->data.str_lit.str;
75348561 return ir_build_const_enum_literal(irb, scope, node, name);
75358562}
75368563
7537static IrInstruction *ir_gen_string_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8564static IrInstSrc *ir_gen_string_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75388565 assert(node->type == NodeTypeStringLiteral);
75398566
75408567 return ir_build_const_str_lit(irb, scope, node, node->data.string_literal.buf);
75418568}
75428569
7543static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *node) {
8570static IrInstSrc *ir_gen_array_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
75448571 assert(node->type == NodeTypeArrayType);
75458572
75468573 AstNode *size_node = node->data.array_type.size;
......@@ -7553,10 +8580,10 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75538580
75548581 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
75558582
7556 IrInstruction *sentinel;
8583 IrInstSrc *sentinel;
75578584 if (sentinel_expr != nullptr) {
75588585 sentinel = ir_gen_node(irb, sentinel_expr, comptime_scope);
7559 if (sentinel == irb->codegen->invalid_instruction)
8586 if (sentinel == irb->codegen->invalid_inst_src)
75608587 return sentinel;
75618588 } else {
75628589 sentinel = nullptr;
......@@ -7565,42 +8592,42 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
75658592 if (size_node) {
75668593 if (is_const) {
75678594 add_node_error(irb->codegen, node, buf_create_from_str("const qualifier invalid on array type"));
7568 return irb->codegen->invalid_instruction;
8595 return irb->codegen->invalid_inst_src;
75698596 }
75708597 if (is_volatile) {
75718598 add_node_error(irb->codegen, node, buf_create_from_str("volatile qualifier invalid on array type"));
7572 return irb->codegen->invalid_instruction;
8599 return irb->codegen->invalid_inst_src;
75738600 }
75748601 if (is_allow_zero) {
75758602 add_node_error(irb->codegen, node, buf_create_from_str("allowzero qualifier invalid on array type"));
7576 return irb->codegen->invalid_instruction;
8603 return irb->codegen->invalid_inst_src;
75778604 }
75788605 if (align_expr != nullptr) {
75798606 add_node_error(irb->codegen, node, buf_create_from_str("align qualifier invalid on array type"));
7580 return irb->codegen->invalid_instruction;
8607 return irb->codegen->invalid_inst_src;
75818608 }
75828609
7583 IrInstruction *size_value = ir_gen_node(irb, size_node, comptime_scope);
7584 if (size_value == irb->codegen->invalid_instruction)
8610 IrInstSrc *size_value = ir_gen_node(irb, size_node, comptime_scope);
8611 if (size_value == irb->codegen->invalid_inst_src)
75858612 return size_value;
75868613
7587 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7588 if (child_type == irb->codegen->invalid_instruction)
8614 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
8615 if (child_type == irb->codegen->invalid_inst_src)
75898616 return child_type;
75908617
75918618 return ir_build_array_type(irb, scope, node, size_value, sentinel, child_type);
75928619 } else {
7593 IrInstruction *align_value;
8620 IrInstSrc *align_value;
75948621 if (align_expr != nullptr) {
75958622 align_value = ir_gen_node(irb, align_expr, comptime_scope);
7596 if (align_value == irb->codegen->invalid_instruction)
8623 if (align_value == irb->codegen->invalid_inst_src)
75978624 return align_value;
75988625 } else {
75998626 align_value = nullptr;
76008627 }
76018628
7602 IrInstruction *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
7603 if (child_type == irb->codegen->invalid_instruction)
8629 IrInstSrc *child_type = ir_gen_node(irb, child_type_node, comptime_scope);
8630 if (child_type == irb->codegen->invalid_inst_src)
76048631 return child_type;
76058632
76068633 return ir_build_slice_type(irb, scope, node, child_type, is_const, is_volatile, sentinel,
......@@ -7608,15 +8635,15 @@ static IrInstruction *ir_gen_array_type(IrBuilder *irb, Scope *scope, AstNode *n
76088635 }
76098636}
76108637
7611static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode *node) {
8638static IrInstSrc *ir_gen_anyframe_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
76128639 assert(node->type == NodeTypeAnyFrameType);
76138640
76148641 AstNode *payload_type_node = node->data.anyframe_type.payload_type;
7615 IrInstruction *payload_type_value = nullptr;
8642 IrInstSrc *payload_type_value = nullptr;
76168643
76178644 if (payload_type_node != nullptr) {
76188645 payload_type_value = ir_gen_node(irb, payload_type_node, scope);
7619 if (payload_type_value == irb->codegen->invalid_instruction)
8646 if (payload_type_value == irb->codegen->invalid_inst_src)
76208647 return payload_type_value;
76218648
76228649 }
......@@ -7624,7 +8651,7 @@ static IrInstruction *ir_gen_anyframe_type(IrBuilder *irb, Scope *scope, AstNode
76248651 return ir_build_anyframe_type(irb, scope, node, payload_type_value);
76258652}
76268653
7627static IrInstruction *ir_gen_undefined_literal(IrBuilder *irb, Scope *scope, AstNode *node) {
8654static IrInstSrc *ir_gen_undefined_literal(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
76288655 assert(node->type == NodeTypeUndefinedLiteral);
76298656 return ir_build_const_undefined(irb, scope, node);
76308657}
......@@ -7741,13 +8768,13 @@ static size_t find_asm_index(CodeGen *g, AstNode *node, AsmToken *tok, Buf *src_
77418768 return SIZE_MAX;
77428769}
77438770
7744static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *node) {
8771static IrInstSrc *ir_gen_asm_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
77458772 assert(node->type == NodeTypeAsmExpr);
77468773 AstNodeAsmExpr *asm_expr = &node->data.asm_expr;
77478774
7748 IrInstruction *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
7749 if (asm_template == irb->codegen->invalid_instruction)
7750 return irb->codegen->invalid_instruction;
8775 IrInstSrc *asm_template = ir_gen_node(irb, asm_expr->asm_template, scope);
8776 if (asm_template == irb->codegen->invalid_inst_src)
8777 return irb->codegen->invalid_inst_src;
77518778
77528779 bool is_volatile = asm_expr->volatile_token != nullptr;
77538780 bool in_fn_scope = (scope_fn_entry(scope) != nullptr);
......@@ -7756,7 +8783,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77568783 if (is_volatile) {
77578784 add_token_error(irb->codegen, node->owner, asm_expr->volatile_token,
77588785 buf_sprintf("volatile is meaningless on global assembly"));
7759 return irb->codegen->invalid_instruction;
8786 return irb->codegen->invalid_inst_src;
77608787 }
77618788
77628789 if (asm_expr->output_list.length != 0 || asm_expr->input_list.length != 0 ||
......@@ -7764,34 +8791,34 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
77648791 {
77658792 add_node_error(irb->codegen, node,
77668793 buf_sprintf("global assembly cannot have inputs, outputs, or clobbers"));
7767 return irb->codegen->invalid_instruction;
8794 return irb->codegen->invalid_inst_src;
77688795 }
77698796
77708797 return ir_build_asm_src(irb, scope, node, asm_template, nullptr, nullptr,
77718798 nullptr, 0, is_volatile, true);
77728799 }
77738800
7774 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
7775 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
8801 IrInstSrc **input_list = allocate<IrInstSrc *>(asm_expr->input_list.length);
8802 IrInstSrc **output_types = allocate<IrInstSrc *>(asm_expr->output_list.length);
77768803 ZigVar **output_vars = allocate<ZigVar *>(asm_expr->output_list.length);
77778804 size_t return_count = 0;
77788805 if (!is_volatile && asm_expr->output_list.length == 0) {
77798806 add_node_error(irb->codegen, node,
77808807 buf_sprintf("assembly expression with no output must be marked volatile"));
7781 return irb->codegen->invalid_instruction;
8808 return irb->codegen->invalid_inst_src;
77828809 }
77838810 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
77848811 AsmOutput *asm_output = asm_expr->output_list.at(i);
77858812 if (asm_output->return_type) {
77868813 return_count += 1;
77878814
7788 IrInstruction *return_type = ir_gen_node(irb, asm_output->return_type, scope);
7789 if (return_type == irb->codegen->invalid_instruction)
7790 return irb->codegen->invalid_instruction;
8815 IrInstSrc *return_type = ir_gen_node(irb, asm_output->return_type, scope);
8816 if (return_type == irb->codegen->invalid_inst_src)
8817 return irb->codegen->invalid_inst_src;
77918818 if (return_count > 1) {
77928819 add_node_error(irb->codegen, node,
77938820 buf_sprintf("inline assembly allows up to one output value"));
7794 return irb->codegen->invalid_instruction;
8821 return irb->codegen->invalid_inst_src;
77958822 }
77968823 output_types[i] = return_type;
77978824 } else {
......@@ -7804,7 +8831,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
78048831 } else {
78058832 add_node_error(irb->codegen, node,
78068833 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(variable_name)));
7807 return irb->codegen->invalid_instruction;
8834 return irb->codegen->invalid_inst_src;
78088835 }
78098836 }
78108837
......@@ -7814,14 +8841,14 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
78148841 buf_sprintf("invalid modifier starting output constraint for '%s': '%c', only '=' is supported."
78158842 " Compiler TODO: see https://github.com/ziglang/zig/issues/215",
78168843 buf_ptr(asm_output->asm_symbolic_name), modifier));
7817 return irb->codegen->invalid_instruction;
8844 return irb->codegen->invalid_inst_src;
78188845 }
78198846 }
78208847 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
78218848 AsmInput *asm_input = asm_expr->input_list.at(i);
7822 IrInstruction *input_value = ir_gen_node(irb, asm_input->expr, scope);
7823 if (input_value == irb->codegen->invalid_instruction)
7824 return irb->codegen->invalid_instruction;
8849 IrInstSrc *input_value = ir_gen_node(irb, asm_input->expr, scope);
8850 if (input_value == irb->codegen->invalid_inst_src)
8851 return irb->codegen->invalid_inst_src;
78258852
78268853 input_list[i] = input_value;
78278854 }
......@@ -7830,7 +8857,7 @@ static IrInstruction *ir_gen_asm_expr(IrBuilder *irb, Scope *scope, AstNode *nod
78308857 output_vars, return_count, is_volatile, false);
78318858}
78328859
7833static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8860static IrInstSrc *ir_gen_if_optional_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
78348861 ResultLoc *result_loc)
78358862{
78368863 assert(node->type == NodeTypeIfOptional);
......@@ -7841,24 +8868,24 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
78418868 AstNode *else_node = node->data.test_expr.else_node;
78428869 bool var_is_ptr = node->data.test_expr.var_is_ptr;
78438870
7844 IrInstruction *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
7845 if (maybe_val_ptr == irb->codegen->invalid_instruction)
8871 IrInstSrc *maybe_val_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
8872 if (maybe_val_ptr == irb->codegen->invalid_inst_src)
78468873 return maybe_val_ptr;
78478874
7848 IrInstruction *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
7849 IrInstruction *is_non_null = ir_build_test_nonnull(irb, scope, node, maybe_val);
8875 IrInstSrc *maybe_val = ir_build_load_ptr(irb, scope, node, maybe_val_ptr);
8876 IrInstSrc *is_non_null = ir_build_test_non_null_src(irb, scope, node, maybe_val);
78508877
7851 IrBasicBlock *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
7852 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
7853 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
8878 IrBasicBlockSrc *then_block = ir_create_basic_block(irb, scope, "OptionalThen");
8879 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "OptionalElse");
8880 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "OptionalEndIf");
78548881
7855 IrInstruction *is_comptime;
8882 IrInstSrc *is_comptime;
78568883 if (ir_should_inline(irb->exec, scope)) {
78578884 is_comptime = ir_build_const_bool(irb, scope, node, true);
78588885 } else {
78598886 is_comptime = ir_build_test_comptime(irb, scope, node, is_non_null);
78608887 }
7861 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
8888 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_non_null,
78628889 then_block, else_block, is_comptime);
78638890
78648891 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
......@@ -7874,48 +8901,48 @@ static IrInstruction *ir_gen_if_optional_expr(IrBuilder *irb, Scope *scope, AstN
78748901 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
78758902 var_symbol, is_const, is_const, is_shadowable, is_comptime);
78768903
7877 IrInstruction *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
7878 IrInstruction *var_ptr = var_is_ptr ? ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
8904 IrInstSrc *payload_ptr = ir_build_optional_unwrap_ptr(irb, subexpr_scope, node, maybe_val_ptr, false, false);
8905 IrInstSrc *var_ptr = var_is_ptr ? ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
78798906 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
78808907 var_scope = var->child_scope;
78818908 } else {
78828909 var_scope = subexpr_scope;
78838910 }
7884 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
8911 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
78858912 &peer_parent->peers.at(0)->base);
7886 if (then_expr_result == irb->codegen->invalid_instruction)
8913 if (then_expr_result == irb->codegen->invalid_inst_src)
78878914 return then_expr_result;
7888 IrBasicBlock *after_then_block = irb->current_basic_block;
8915 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
78898916 if (!instr_is_unreachable(then_expr_result))
78908917 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
78918918
78928919 ir_set_cursor_at_end_and_append_block(irb, else_block);
7893 IrInstruction *else_expr_result;
8920 IrInstSrc *else_expr_result;
78948921 if (else_node) {
78958922 else_expr_result = ir_gen_node_extra(irb, else_node, subexpr_scope, lval, &peer_parent->peers.at(1)->base);
7896 if (else_expr_result == irb->codegen->invalid_instruction)
8923 if (else_expr_result == irb->codegen->invalid_inst_src)
78978924 return else_expr_result;
78988925 } else {
78998926 else_expr_result = ir_build_const_void(irb, scope, node);
79008927 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
79018928 }
7902 IrBasicBlock *after_else_block = irb->current_basic_block;
8929 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
79038930 if (!instr_is_unreachable(else_expr_result))
79048931 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79058932
79068933 ir_set_cursor_at_end_and_append_block(irb, endif_block);
7907 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
8934 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
79088935 incoming_values[0] = then_expr_result;
79098936 incoming_values[1] = else_expr_result;
7910 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
8937 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
79118938 incoming_blocks[0] = after_then_block;
79128939 incoming_blocks[1] = after_else_block;
79138940
7914 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
8941 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
79158942 return ir_expr_wrap(irb, scope, phi, result_loc);
79168943}
79178944
7918static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
8945static IrInstSrc *ir_gen_if_err_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
79198946 ResultLoc *result_loc)
79208947{
79218948 assert(node->type == NodeTypeIfErrorExpr);
......@@ -7928,20 +8955,20 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79288955 Buf *var_symbol = node->data.if_err_expr.var_symbol;
79298956 Buf *err_symbol = node->data.if_err_expr.err_symbol;
79308957
7931 IrInstruction *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
7932 if (err_val_ptr == irb->codegen->invalid_instruction)
8958 IrInstSrc *err_val_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
8959 if (err_val_ptr == irb->codegen->invalid_inst_src)
79338960 return err_val_ptr;
79348961
7935 IrInstruction *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
7936 IrInstruction *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
8962 IrInstSrc *err_val = ir_build_load_ptr(irb, scope, node, err_val_ptr);
8963 IrInstSrc *is_err = ir_build_test_err_src(irb, scope, node, err_val_ptr, true, false);
79378964
7938 IrBasicBlock *ok_block = ir_create_basic_block(irb, scope, "TryOk");
7939 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "TryElse");
7940 IrBasicBlock *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
8965 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, scope, "TryOk");
8966 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "TryElse");
8967 IrBasicBlockSrc *endif_block = ir_create_basic_block(irb, scope, "TryEnd");
79418968
79428969 bool force_comptime = ir_should_inline(irb->exec, scope);
7943 IrInstruction *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
7944 IrInstruction *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
8970 IrInstSrc *is_comptime = force_comptime ? ir_build_const_bool(irb, scope, node, true) : ir_build_test_comptime(irb, scope, node, is_err);
8971 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, scope, node, is_err, else_block, ok_block, is_comptime);
79458972
79468973 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, else_block, endif_block,
79478974 result_loc, is_comptime);
......@@ -7952,29 +8979,29 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79528979 Scope *var_scope;
79538980 if (var_symbol) {
79548981 bool is_shadowable = false;
7955 IrInstruction *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
8982 IrInstSrc *var_is_comptime = force_comptime ? ir_build_const_bool(irb, subexpr_scope, node, true) : ir_build_test_comptime(irb, subexpr_scope, node, err_val);
79568983 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
79578984 var_symbol, var_is_const, var_is_const, is_shadowable, var_is_comptime);
79588985
7959 IrInstruction *payload_ptr = ir_build_unwrap_err_payload(irb, subexpr_scope, node, err_val_ptr, false, false);
7960 IrInstruction *var_ptr = var_is_ptr ?
7961 ir_build_ref(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
8986 IrInstSrc *payload_ptr = ir_build_unwrap_err_payload_src(irb, subexpr_scope, node, err_val_ptr, false, false);
8987 IrInstSrc *var_ptr = var_is_ptr ?
8988 ir_build_ref_src(irb, subexpr_scope, node, payload_ptr, true, false) : payload_ptr;
79628989 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, var_ptr);
79638990 var_scope = var->child_scope;
79648991 } else {
79658992 var_scope = subexpr_scope;
79668993 }
7967 IrInstruction *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
8994 IrInstSrc *then_expr_result = ir_gen_node_extra(irb, then_node, var_scope, lval,
79688995 &peer_parent->peers.at(0)->base);
7969 if (then_expr_result == irb->codegen->invalid_instruction)
8996 if (then_expr_result == irb->codegen->invalid_inst_src)
79708997 return then_expr_result;
7971 IrBasicBlock *after_then_block = irb->current_basic_block;
8998 IrBasicBlockSrc *after_then_block = irb->current_basic_block;
79728999 if (!instr_is_unreachable(then_expr_result))
79739000 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
79749001
79759002 ir_set_cursor_at_end_and_append_block(irb, else_block);
79769003
7977 IrInstruction *else_expr_result;
9004 IrInstSrc *else_expr_result;
79789005 if (else_node) {
79799006 Scope *err_var_scope;
79809007 if (err_symbol) {
......@@ -7983,40 +9010,40 @@ static IrInstruction *ir_gen_if_err_expr(IrBuilder *irb, Scope *scope, AstNode *
79839010 ZigVar *var = ir_create_var(irb, node, subexpr_scope,
79849011 err_symbol, is_const, is_const, is_shadowable, is_comptime);
79859012
7986 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, subexpr_scope, node, err_val_ptr);
9013 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, subexpr_scope, node, err_val_ptr);
79879014 ir_build_var_decl_src(irb, subexpr_scope, node, var, nullptr, err_ptr);
79889015 err_var_scope = var->child_scope;
79899016 } else {
79909017 err_var_scope = subexpr_scope;
79919018 }
79929019 else_expr_result = ir_gen_node_extra(irb, else_node, err_var_scope, lval, &peer_parent->peers.at(1)->base);
7993 if (else_expr_result == irb->codegen->invalid_instruction)
9020 if (else_expr_result == irb->codegen->invalid_inst_src)
79949021 return else_expr_result;
79959022 } else {
79969023 else_expr_result = ir_build_const_void(irb, scope, node);
79979024 ir_build_end_expr(irb, scope, node, else_expr_result, &peer_parent->peers.at(1)->base);
79989025 }
7999 IrBasicBlock *after_else_block = irb->current_basic_block;
9026 IrBasicBlockSrc *after_else_block = irb->current_basic_block;
80009027 if (!instr_is_unreachable(else_expr_result))
80019028 ir_mark_gen(ir_build_br(irb, scope, node, endif_block, is_comptime));
80029029
80039030 ir_set_cursor_at_end_and_append_block(irb, endif_block);
8004 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
9031 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
80059032 incoming_values[0] = then_expr_result;
80069033 incoming_values[1] = else_expr_result;
8007 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
9034 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
80089035 incoming_blocks[0] = after_then_block;
80099036 incoming_blocks[1] = after_else_block;
80109037
8011 IrInstruction *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
9038 IrInstSrc *phi = ir_build_phi(irb, scope, node, 2, incoming_blocks, incoming_values, peer_parent);
80129039 return ir_expr_wrap(irb, scope, phi, result_loc);
80139040}
80149041
8015static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
8016 IrBasicBlock *end_block, IrInstruction *is_comptime, IrInstruction *var_is_comptime,
8017 IrInstruction *target_value_ptr, IrInstruction **prong_values, size_t prong_values_len,
8018 ZigList<IrBasicBlock *> *incoming_blocks, ZigList<IrInstruction *> *incoming_values,
8019 IrInstructionSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
9042static bool ir_gen_switch_prong_expr(IrBuilderSrc *irb, Scope *scope, AstNode *switch_node, AstNode *prong_node,
9043 IrBasicBlockSrc *end_block, IrInstSrc *is_comptime, IrInstSrc *var_is_comptime,
9044 IrInstSrc *target_value_ptr, IrInstSrc **prong_values, size_t prong_values_len,
9045 ZigList<IrBasicBlockSrc *> *incoming_blocks, ZigList<IrInstSrc *> *incoming_values,
9046 IrInstSrcSwitchElseVar **out_switch_else_var, LVal lval, ResultLoc *result_loc)
80209047{
80219048 assert(switch_node->type == NodeTypeSwitchExpr);
80229049 assert(prong_node->type == NodeTypeSwitchProng);
......@@ -8034,28 +9061,28 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
80349061 ZigVar *var = ir_create_var(irb, var_symbol_node, scope,
80359062 var_name, is_const, is_const, is_shadowable, var_is_comptime);
80369063 child_scope = var->child_scope;
8037 IrInstruction *var_ptr;
9064 IrInstSrc *var_ptr;
80389065 if (out_switch_else_var != nullptr) {
8039 IrInstructionSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
9066 IrInstSrcSwitchElseVar *switch_else_var = ir_build_switch_else_var(irb, scope, var_symbol_node,
80409067 target_value_ptr);
80419068 *out_switch_else_var = switch_else_var;
8042 IrInstruction *payload_ptr = &switch_else_var->base;
8043 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
9069 IrInstSrc *payload_ptr = &switch_else_var->base;
9070 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
80449071 } else if (prong_values != nullptr) {
8045 IrInstruction *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
9072 IrInstSrc *payload_ptr = ir_build_switch_var(irb, scope, var_symbol_node, target_value_ptr,
80469073 prong_values, prong_values_len);
8047 var_ptr = var_is_ptr ? ir_build_ref(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
9074 var_ptr = var_is_ptr ? ir_build_ref_src(irb, scope, var_symbol_node, payload_ptr, true, false) : payload_ptr;
80489075 } else {
80499076 var_ptr = var_is_ptr ?
8050 ir_build_ref(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
9077 ir_build_ref_src(irb, scope, var_symbol_node, target_value_ptr, true, false) : target_value_ptr;
80519078 }
80529079 ir_build_var_decl_src(irb, scope, var_symbol_node, var, nullptr, var_ptr);
80539080 } else {
80549081 child_scope = scope;
80559082 }
80569083
8057 IrInstruction *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
8058 if (expr_result == irb->codegen->invalid_instruction)
9084 IrInstSrc *expr_result = ir_gen_node_extra(irb, expr_node, child_scope, lval, result_loc);
9085 if (expr_result == irb->codegen->invalid_inst_src)
80599086 return false;
80609087 if (!instr_is_unreachable(expr_result))
80619088 ir_mark_gen(ir_build_br(irb, scope, switch_node, end_block, is_comptime));
......@@ -8064,25 +9091,25 @@ static bool ir_gen_switch_prong_expr(IrBuilder *irb, Scope *scope, AstNode *swit
80649091 return true;
80659092}
80669093
8067static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
9094static IrInstSrc *ir_gen_switch_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
80689095 ResultLoc *result_loc)
80699096{
80709097 assert(node->type == NodeTypeSwitchExpr);
80719098
80729099 AstNode *target_node = node->data.switch_expr.expr;
8073 IrInstruction *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
8074 if (target_value_ptr == irb->codegen->invalid_instruction)
9100 IrInstSrc *target_value_ptr = ir_gen_node_extra(irb, target_node, scope, LValPtr, nullptr);
9101 if (target_value_ptr == irb->codegen->invalid_inst_src)
80759102 return target_value_ptr;
8076 IrInstruction *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
9103 IrInstSrc *target_value = ir_build_switch_target(irb, scope, node, target_value_ptr);
80779104
8078 IrBasicBlock *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
8079 IrBasicBlock *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
9105 IrBasicBlockSrc *else_block = ir_create_basic_block(irb, scope, "SwitchElse");
9106 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, scope, "SwitchEnd");
80809107
80819108 size_t prong_count = node->data.switch_expr.prongs.length;
8082 ZigList<IrInstructionSwitchBrCase> cases = {0};
9109 ZigList<IrInstSrcSwitchBrCase> cases = {0};
80839110
8084 IrInstruction *is_comptime;
8085 IrInstruction *var_is_comptime;
9111 IrInstSrc *is_comptime;
9112 IrInstSrc *var_is_comptime;
80869113 if (ir_should_inline(irb->exec, scope)) {
80879114 is_comptime = ir_build_const_bool(irb, scope, node, true);
80889115 var_is_comptime = is_comptime;
......@@ -8091,11 +9118,11 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
80919118 var_is_comptime = ir_build_test_comptime(irb, scope, node, target_value_ptr);
80929119 }
80939120
8094 ZigList<IrInstruction *> incoming_values = {0};
8095 ZigList<IrBasicBlock *> incoming_blocks = {0};
8096 ZigList<IrInstructionCheckSwitchProngsRange> check_ranges = {0};
9121 ZigList<IrInstSrc *> incoming_values = {0};
9122 ZigList<IrBasicBlockSrc *> incoming_blocks = {0};
9123 ZigList<IrInstSrcCheckSwitchProngsRange> check_ranges = {0};
80979124
8098 IrInstructionSwitchElseVar *switch_else_var = nullptr;
9125 IrInstSrcSwitchElseVar *switch_else_var = nullptr;
80999126
81009127 ResultLocPeerParent *peer_parent = allocate<ResultLocPeerParent>(1);
81019128 peer_parent->base.id = ResultLocIdPeerParent;
......@@ -8110,37 +9137,14 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81109137 Scope *subexpr_scope = create_runtime_scope(irb->codegen, node, scope, is_comptime);
81119138 Scope *comptime_scope = create_comptime_scope(irb->codegen, node, scope);
81129139 AstNode *else_prong = nullptr;
9140 AstNode *underscore_prong = nullptr;
81139141 for (size_t prong_i = 0; prong_i < prong_count; prong_i += 1) {
81149142 AstNode *prong_node = node->data.switch_expr.prongs.at(prong_i);
81159143 size_t prong_item_count = prong_node->data.switch_prong.items.length;
8116 if (prong_item_count == 0) {
8117 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
8118 if (else_prong) {
8119 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
8120 buf_sprintf("multiple else prongs in switch expression"));
8121 add_error_note(irb->codegen, msg, else_prong,
8122 buf_sprintf("previous else prong is here"));
8123 return irb->codegen->invalid_instruction;
8124 }
8125 else_prong = prong_node;
8126
8127 IrBasicBlock *prev_block = irb->current_basic_block;
8128 if (peer_parent->peers.length > 0) {
8129 peer_parent->peers.last()->next_bb = else_block;
8130 }
8131 peer_parent->peers.append(this_peer_result_loc);
8132 ir_set_cursor_at_end_and_append_block(irb, else_block);
8133 if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
8134 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
8135 &switch_else_var, LValNone, &this_peer_result_loc->base))
8136 {
8137 return irb->codegen->invalid_instruction;
8138 }
8139 ir_set_cursor_at_end(irb, prev_block);
8140 } else if (prong_node->data.switch_prong.any_items_are_range) {
9144 if (prong_node->data.switch_prong.any_items_are_range) {
81419145 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
81429146
8143 IrInstruction *ok_bit = nullptr;
9147 IrInstSrc *ok_bit = nullptr;
81449148 AstNode *last_item_node = nullptr;
81459149 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
81469150 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
......@@ -8149,23 +9153,23 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81499153 AstNode *start_node = item_node->data.switch_range.start;
81509154 AstNode *end_node = item_node->data.switch_range.end;
81519155
8152 IrInstruction *start_value = ir_gen_node(irb, start_node, comptime_scope);
8153 if (start_value == irb->codegen->invalid_instruction)
8154 return irb->codegen->invalid_instruction;
9156 IrInstSrc *start_value = ir_gen_node(irb, start_node, comptime_scope);
9157 if (start_value == irb->codegen->invalid_inst_src)
9158 return irb->codegen->invalid_inst_src;
81559159
8156 IrInstruction *end_value = ir_gen_node(irb, end_node, comptime_scope);
8157 if (end_value == irb->codegen->invalid_instruction)
8158 return irb->codegen->invalid_instruction;
9160 IrInstSrc *end_value = ir_gen_node(irb, end_node, comptime_scope);
9161 if (end_value == irb->codegen->invalid_inst_src)
9162 return irb->codegen->invalid_inst_src;
81599163
8160 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9164 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
81619165 check_range->start = start_value;
81629166 check_range->end = end_value;
81639167
8164 IrInstruction *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
9168 IrInstSrc *lower_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpGreaterOrEq,
81659169 target_value, start_value, false);
8166 IrInstruction *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
9170 IrInstSrc *upper_range_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpLessOrEq,
81679171 target_value, end_value, false);
8168 IrInstruction *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
9172 IrInstSrc *both_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolAnd,
81699173 lower_range_ok, upper_range_ok, false);
81709174 if (ok_bit) {
81719175 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, both_ok, ok_bit, false);
......@@ -8173,15 +9177,15 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81739177 ok_bit = both_ok;
81749178 }
81759179 } else {
8176 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
8177 if (item_value == irb->codegen->invalid_instruction)
8178 return irb->codegen->invalid_instruction;
9180 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
9181 if (item_value == irb->codegen->invalid_inst_src)
9182 return irb->codegen->invalid_inst_src;
81799183
8180 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9184 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
81819185 check_range->start = item_value;
81829186 check_range->end = item_value;
81839187
8184 IrInstruction *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
9188 IrInstSrc *cmp_ok = ir_build_bin_op(irb, scope, item_node, IrBinOpCmpEq,
81859189 item_value, target_value, false);
81869190 if (ok_bit) {
81879191 ok_bit = ir_build_bin_op(irb, scope, item_node, IrBinOpBoolOr, cmp_ok, ok_bit, false);
......@@ -8191,12 +9195,12 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
81919195 }
81929196 }
81939197
8194 IrBasicBlock *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
8195 IrBasicBlock *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
9198 IrBasicBlockSrc *range_block_yes = ir_create_basic_block(irb, scope, "SwitchRangeYes");
9199 IrBasicBlockSrc *range_block_no = ir_create_basic_block(irb, scope, "SwitchRangeNo");
81969200
81979201 assert(ok_bit);
81989202 assert(last_item_node);
8199 IrInstruction *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
9203 IrInstSrc *br_inst = ir_mark_gen(ir_build_cond_br(irb, scope, last_item_node, ok_bit,
82009204 range_block_yes, range_block_no, is_comptime));
82019205 if (peer_parent->base.source_instruction == nullptr) {
82029206 peer_parent->base.source_instruction = br_inst;
......@@ -8211,10 +9215,60 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82119215 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0,
82129216 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
82139217 {
8214 return irb->codegen->invalid_instruction;
9218 return irb->codegen->invalid_inst_src;
9219 }
9220
9221 ir_set_cursor_at_end_and_append_block(irb, range_block_no);
9222 } else {
9223 if (prong_item_count == 0) {
9224 if (else_prong) {
9225 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9226 buf_sprintf("multiple else prongs in switch expression"));
9227 add_error_note(irb->codegen, msg, else_prong,
9228 buf_sprintf("previous else prong is here"));
9229 return irb->codegen->invalid_inst_src;
9230 }
9231 else_prong = prong_node;
9232 } else if (prong_item_count == 1 &&
9233 prong_node->data.switch_prong.items.at(0)->type == NodeTypeSymbol &&
9234 buf_eql_str(prong_node->data.switch_prong.items.at(0)->data.symbol_expr.symbol, "_")) {
9235 if (underscore_prong) {
9236 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9237 buf_sprintf("multiple '_' prongs in switch expression"));
9238 add_error_note(irb->codegen, msg, underscore_prong,
9239 buf_sprintf("previous '_' prong is here"));
9240 return irb->codegen->invalid_inst_src;
9241 }
9242 underscore_prong = prong_node;
9243 } else {
9244 continue;
9245 }
9246 if (underscore_prong && else_prong) {
9247 ErrorMsg *msg = add_node_error(irb->codegen, prong_node,
9248 buf_sprintf("else and '_' prong in switch expression"));
9249 if (underscore_prong == prong_node)
9250 add_error_note(irb->codegen, msg, else_prong,
9251 buf_sprintf("else prong is here"));
9252 else
9253 add_error_note(irb->codegen, msg, underscore_prong,
9254 buf_sprintf("'_' prong is here"));
9255 return irb->codegen->invalid_inst_src;
9256 }
9257 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
9258
9259 IrBasicBlockSrc *prev_block = irb->current_basic_block;
9260 if (peer_parent->peers.length > 0) {
9261 peer_parent->peers.last()->next_bb = else_block;
9262 }
9263 peer_parent->peers.append(this_peer_result_loc);
9264 ir_set_cursor_at_end_and_append_block(irb, else_block);
9265 if (!ir_gen_switch_prong_expr(irb, subexpr_scope, node, prong_node, end_block,
9266 is_comptime, var_is_comptime, target_value_ptr, nullptr, 0, &incoming_blocks, &incoming_values,
9267 &switch_else_var, LValNone, &this_peer_result_loc->base))
9268 {
9269 return irb->codegen->invalid_inst_src;
82159270 }
8216
8217 ir_set_cursor_at_end_and_append_block(irb, range_block_no);
9271 ir_set_cursor_at_end(irb, prev_block);
82189272 }
82199273 }
82209274
......@@ -8226,32 +9280,34 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82269280 continue;
82279281 if (prong_node->data.switch_prong.any_items_are_range)
82289282 continue;
9283 if (underscore_prong == prong_node)
9284 continue;
82299285
82309286 ResultLocPeer *this_peer_result_loc = create_peer_result(peer_parent);
82319287
8232 IrBasicBlock *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
8233 IrInstruction **items = allocate<IrInstruction *>(prong_item_count);
9288 IrBasicBlockSrc *prong_block = ir_create_basic_block(irb, scope, "SwitchProng");
9289 IrInstSrc **items = allocate<IrInstSrc *>(prong_item_count);
82349290
82359291 for (size_t item_i = 0; item_i < prong_item_count; item_i += 1) {
82369292 AstNode *item_node = prong_node->data.switch_prong.items.at(item_i);
82379293 assert(item_node->type != NodeTypeSwitchRange);
82389294
8239 IrInstruction *item_value = ir_gen_node(irb, item_node, comptime_scope);
8240 if (item_value == irb->codegen->invalid_instruction)
8241 return irb->codegen->invalid_instruction;
9295 IrInstSrc *item_value = ir_gen_node(irb, item_node, comptime_scope);
9296 if (item_value == irb->codegen->invalid_inst_src)
9297 return irb->codegen->invalid_inst_src;
82429298
8243 IrInstructionCheckSwitchProngsRange *check_range = check_ranges.add_one();
9299 IrInstSrcCheckSwitchProngsRange *check_range = check_ranges.add_one();
82449300 check_range->start = item_value;
82459301 check_range->end = item_value;
82469302
8247 IrInstructionSwitchBrCase *this_case = cases.add_one();
9303 IrInstSrcSwitchBrCase *this_case = cases.add_one();
82489304 this_case->value = item_value;
82499305 this_case->block = prong_block;
82509306
82519307 items[item_i] = item_value;
82529308 }
82539309
8254 IrBasicBlock *prev_block = irb->current_basic_block;
9310 IrBasicBlockSrc *prev_block = irb->current_basic_block;
82559311 if (peer_parent->peers.length > 0) {
82569312 peer_parent->peers.last()->next_bb = prong_block;
82579313 }
......@@ -8261,21 +9317,21 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82619317 is_comptime, var_is_comptime, target_value_ptr, items, prong_item_count,
82629318 &incoming_blocks, &incoming_values, nullptr, LValNone, &this_peer_result_loc->base))
82639319 {
8264 return irb->codegen->invalid_instruction;
9320 return irb->codegen->invalid_inst_src;
82659321 }
82669322
82679323 ir_set_cursor_at_end(irb, prev_block);
82689324
82699325 }
82709326
8271 IrInstruction *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
8272 check_ranges.items, check_ranges.length, else_prong != nullptr);
9327 IrInstSrc *switch_prongs_void = ir_build_check_switch_prongs(irb, scope, node, target_value,
9328 check_ranges.items, check_ranges.length, else_prong != nullptr, underscore_prong != nullptr);
82739329
8274 IrInstruction *br_instruction;
9330 IrInstSrc *br_instruction;
82759331 if (cases.length == 0) {
82769332 br_instruction = ir_build_br(irb, scope, node, else_block, is_comptime);
82779333 } else {
8278 IrInstructionSwitchBr *switch_br = ir_build_switch_br(irb, scope, node, target_value, else_block,
9334 IrInstSrcSwitchBr *switch_br = ir_build_switch_br_src(irb, scope, node, target_value, else_block,
82799335 cases.length, cases.items, is_comptime, switch_prongs_void);
82809336 if (switch_else_var != nullptr) {
82819337 switch_else_var->switch_br = switch_br;
......@@ -8289,7 +9345,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
82899345 peer_parent->peers.at(i)->base.source_instruction = peer_parent->base.source_instruction;
82909346 }
82919347
8292 if (!else_prong) {
9348 if (!else_prong && !underscore_prong) {
82939349 if (peer_parent->peers.length != 0) {
82949350 peer_parent->peers.last()->next_bb = else_block;
82959351 }
......@@ -8303,7 +9359,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
83039359
83049360 ir_set_cursor_at_end_and_append_block(irb, end_block);
83059361 assert(incoming_blocks.length == incoming_values.length);
8306 IrInstruction *result_instruction;
9362 IrInstSrc *result_instruction;
83079363 if (incoming_blocks.length == 0) {
83089364 result_instruction = ir_build_const_void(irb, scope, node);
83099365 } else {
......@@ -8313,7 +9369,7 @@ static IrInstruction *ir_gen_switch_expr(IrBuilder *irb, Scope *scope, AstNode *
83139369 return ir_lval_wrap(irb, scope, result_instruction, lval, result_loc);
83149370}
83159371
8316static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval) {
9372static IrInstSrc *ir_gen_comptime(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval) {
83179373 assert(node->type == NodeTypeCompTime);
83189374
83199375 Scope *child_scope = create_comptime_scope(irb->codegen, node, parent_scope);
......@@ -8321,28 +9377,28 @@ static IrInstruction *ir_gen_comptime(IrBuilder *irb, Scope *parent_scope, AstNo
83219377 return ir_gen_node_extra(irb, node->data.comptime_expr.expr, child_scope, lval, nullptr);
83229378}
83239379
8324static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
8325 IrInstruction *is_comptime;
9380static IrInstSrc *ir_gen_return_from_block(IrBuilderSrc *irb, Scope *break_scope, AstNode *node, ScopeBlock *block_scope) {
9381 IrInstSrc *is_comptime;
83269382 if (ir_should_inline(irb->exec, break_scope)) {
83279383 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
83289384 } else {
83299385 is_comptime = block_scope->is_comptime;
83309386 }
83319387
8332 IrInstruction *result_value;
9388 IrInstSrc *result_value;
83339389 if (node->data.break_expr.expr) {
83349390 ResultLocPeer *peer_result = create_peer_result(block_scope->peer_parent);
83359391 block_scope->peer_parent->peers.append(peer_result);
83369392
83379393 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope, block_scope->lval,
83389394 &peer_result->base);
8339 if (result_value == irb->codegen->invalid_instruction)
8340 return irb->codegen->invalid_instruction;
9395 if (result_value == irb->codegen->invalid_inst_src)
9396 return irb->codegen->invalid_inst_src;
83419397 } else {
83429398 result_value = ir_build_const_void(irb, break_scope, node);
83439399 }
83449400
8345 IrBasicBlock *dest_block = block_scope->end_block;
9401 IrBasicBlockSrc *dest_block = block_scope->end_block;
83469402 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
83479403
83489404 block_scope->incoming_blocks->append(irb->current_basic_block);
......@@ -8350,7 +9406,7 @@ static IrInstruction *ir_gen_return_from_block(IrBuilder *irb, Scope *break_scop
83509406 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
83519407}
83529408
8353static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *node) {
9409static IrInstSrc *ir_gen_break(IrBuilderSrc *irb, Scope *break_scope, AstNode *node) {
83549410 assert(node->type == NodeTypeBreak);
83559411
83569412 // Search up the scope. We'll find one of these things first:
......@@ -8365,14 +9421,14 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
83659421 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
83669422 if (node->data.break_expr.name != nullptr) {
83679423 add_node_error(irb->codegen, node, buf_sprintf("label not found: '%s'", buf_ptr(node->data.break_expr.name)));
8368 return irb->codegen->invalid_instruction;
9424 return irb->codegen->invalid_inst_src;
83699425 } else {
83709426 add_node_error(irb->codegen, node, buf_sprintf("break expression outside loop"));
8371 return irb->codegen->invalid_instruction;
9427 return irb->codegen->invalid_inst_src;
83729428 }
83739429 } else if (search_scope->id == ScopeIdDeferExpr) {
83749430 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of defer expression"));
8375 return irb->codegen->invalid_instruction;
9431 return irb->codegen->invalid_inst_src;
83769432 } else if (search_scope->id == ScopeIdLoop) {
83779433 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
83789434 if (node->data.break_expr.name == nullptr ||
......@@ -8391,32 +9447,32 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
83919447 }
83929448 } else if (search_scope->id == ScopeIdSuspend) {
83939449 add_node_error(irb->codegen, node, buf_sprintf("cannot break out of suspend block"));
8394 return irb->codegen->invalid_instruction;
9450 return irb->codegen->invalid_inst_src;
83959451 }
83969452 search_scope = search_scope->parent;
83979453 }
83989454
8399 IrInstruction *is_comptime;
9455 IrInstSrc *is_comptime;
84009456 if (ir_should_inline(irb->exec, break_scope)) {
84019457 is_comptime = ir_build_const_bool(irb, break_scope, node, true);
84029458 } else {
84039459 is_comptime = loop_scope->is_comptime;
84049460 }
84059461
8406 IrInstruction *result_value;
9462 IrInstSrc *result_value;
84079463 if (node->data.break_expr.expr) {
84089464 ResultLocPeer *peer_result = create_peer_result(loop_scope->peer_parent);
84099465 loop_scope->peer_parent->peers.append(peer_result);
84109466
84119467 result_value = ir_gen_node_extra(irb, node->data.break_expr.expr, break_scope,
84129468 loop_scope->lval, &peer_result->base);
8413 if (result_value == irb->codegen->invalid_instruction)
8414 return irb->codegen->invalid_instruction;
9469 if (result_value == irb->codegen->invalid_inst_src)
9470 return irb->codegen->invalid_inst_src;
84159471 } else {
84169472 result_value = ir_build_const_void(irb, break_scope, node);
84179473 }
84189474
8419 IrBasicBlock *dest_block = loop_scope->break_block;
9475 IrBasicBlockSrc *dest_block = loop_scope->break_block;
84209476 ir_gen_defers_for_block(irb, break_scope, dest_block->scope, false);
84219477
84229478 loop_scope->incoming_blocks->append(irb->current_basic_block);
......@@ -8424,7 +9480,7 @@ static IrInstruction *ir_gen_break(IrBuilder *irb, Scope *break_scope, AstNode *
84249480 return ir_build_br(irb, break_scope, node, dest_block, is_comptime);
84259481}
84269482
8427static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, AstNode *node) {
9483static IrInstSrc *ir_gen_continue(IrBuilderSrc *irb, Scope *continue_scope, AstNode *node) {
84289484 assert(node->type == NodeTypeContinue);
84299485
84309486 // Search up the scope. We'll find one of these things first:
......@@ -8440,14 +9496,14 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84409496 if (search_scope == nullptr || search_scope->id == ScopeIdFnDef) {
84419497 if (node->data.continue_expr.name != nullptr) {
84429498 add_node_error(irb->codegen, node, buf_sprintf("labeled loop not found: '%s'", buf_ptr(node->data.continue_expr.name)));
8443 return irb->codegen->invalid_instruction;
9499 return irb->codegen->invalid_inst_src;
84449500 } else {
84459501 add_node_error(irb->codegen, node, buf_sprintf("continue expression outside loop"));
8446 return irb->codegen->invalid_instruction;
9502 return irb->codegen->invalid_inst_src;
84479503 }
84489504 } else if (search_scope->id == ScopeIdDeferExpr) {
84499505 add_node_error(irb->codegen, node, buf_sprintf("cannot continue out of defer expression"));
8450 return irb->codegen->invalid_instruction;
9506 return irb->codegen->invalid_inst_src;
84519507 } else if (search_scope->id == ScopeIdLoop) {
84529508 ScopeLoop *this_loop_scope = (ScopeLoop *)search_scope;
84539509 if (node->data.continue_expr.name == nullptr ||
......@@ -8463,7 +9519,7 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84639519 search_scope = search_scope->parent;
84649520 }
84659521
8466 IrInstruction *is_comptime;
9522 IrInstSrc *is_comptime;
84679523 if (ir_should_inline(irb->exec, continue_scope)) {
84689524 is_comptime = ir_build_const_bool(irb, continue_scope, node, true);
84699525 } else {
......@@ -8475,17 +9531,17 @@ static IrInstruction *ir_gen_continue(IrBuilder *irb, Scope *continue_scope, Ast
84759531 ir_mark_gen(ir_build_check_runtime_scope(irb, continue_scope, node, scope_runtime->is_comptime, is_comptime));
84769532 }
84779533
8478 IrBasicBlock *dest_block = loop_scope->continue_block;
9534 IrBasicBlockSrc *dest_block = loop_scope->continue_block;
84799535 ir_gen_defers_for_block(irb, continue_scope, dest_block->scope, false);
84809536 return ir_mark_gen(ir_build_br(irb, continue_scope, node, dest_block, is_comptime));
84819537}
84829538
8483static IrInstruction *ir_gen_error_type(IrBuilder *irb, Scope *scope, AstNode *node) {
9539static IrInstSrc *ir_gen_error_type(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
84849540 assert(node->type == NodeTypeErrorType);
84859541 return ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_global_error_set);
84869542}
84879543
8488static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9544static IrInstSrc *ir_gen_defer(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
84899545 assert(node->type == NodeTypeDefer);
84909546
84919547 ScopeDefer *defer_child_scope = create_defer_scope(irb->codegen, node, parent_scope);
......@@ -8497,7 +9553,7 @@ static IrInstruction *ir_gen_defer(IrBuilder *irb, Scope *parent_scope, AstNode
84979553 return ir_build_const_void(irb, parent_scope, node);
84989554}
84999555
8500static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
9556static IrInstSrc *ir_gen_slice(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval, ResultLoc *result_loc) {
85019557 assert(node->type == NodeTypeSliceExpr);
85029558
85039559 AstNodeSliceExpr *slice_expr = &node->data.slice_expr;
......@@ -8506,38 +9562,38 @@ static IrInstruction *ir_gen_slice(IrBuilder *irb, Scope *scope, AstNode *node,
85069562 AstNode *end_node = slice_expr->end;
85079563 AstNode *sentinel_node = slice_expr->sentinel;
85089564
8509 IrInstruction *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
8510 if (ptr_value == irb->codegen->invalid_instruction)
8511 return irb->codegen->invalid_instruction;
9565 IrInstSrc *ptr_value = ir_gen_node_extra(irb, array_node, scope, LValPtr, nullptr);
9566 if (ptr_value == irb->codegen->invalid_inst_src)
9567 return irb->codegen->invalid_inst_src;
85129568
8513 IrInstruction *start_value = ir_gen_node(irb, start_node, scope);
8514 if (start_value == irb->codegen->invalid_instruction)
8515 return irb->codegen->invalid_instruction;
9569 IrInstSrc *start_value = ir_gen_node(irb, start_node, scope);
9570 if (start_value == irb->codegen->invalid_inst_src)
9571 return irb->codegen->invalid_inst_src;
85169572
8517 IrInstruction *end_value;
9573 IrInstSrc *end_value;
85189574 if (end_node) {
85199575 end_value = ir_gen_node(irb, end_node, scope);
8520 if (end_value == irb->codegen->invalid_instruction)
8521 return irb->codegen->invalid_instruction;
9576 if (end_value == irb->codegen->invalid_inst_src)
9577 return irb->codegen->invalid_inst_src;
85229578 } else {
85239579 end_value = nullptr;
85249580 }
85259581
8526 IrInstruction *sentinel_value;
9582 IrInstSrc *sentinel_value;
85279583 if (sentinel_node) {
85289584 sentinel_value = ir_gen_node(irb, sentinel_node, scope);
8529 if (sentinel_value == irb->codegen->invalid_instruction)
8530 return irb->codegen->invalid_instruction;
9585 if (sentinel_value == irb->codegen->invalid_inst_src)
9586 return irb->codegen->invalid_inst_src;
85319587 } else {
85329588 sentinel_value = nullptr;
85339589 }
85349590
8535 IrInstruction *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
9591 IrInstSrc *slice = ir_build_slice_src(irb, scope, node, ptr_value, start_value, end_value,
85369592 sentinel_value, true, result_loc);
85379593 return ir_lval_wrap(irb, scope, slice, lval, result_loc);
85389594}
85399595
8540static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode *node, LVal lval,
9596static IrInstSrc *ir_gen_catch(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node, LVal lval,
85419597 ResultLoc *result_loc)
85429598{
85439599 assert(node->type == NodeTypeCatchExpr);
......@@ -8551,29 +9607,29 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
85519607 assert(var_node->type == NodeTypeSymbol);
85529608 Buf *var_name = var_node->data.symbol_expr.symbol;
85539609 add_node_error(irb->codegen, var_node, buf_sprintf("unused variable: '%s'", buf_ptr(var_name)));
8554 return irb->codegen->invalid_instruction;
9610 return irb->codegen->invalid_inst_src;
85559611 }
85569612 return ir_gen_catch_unreachable(irb, parent_scope, node, op1_node, lval, result_loc);
85579613 }
85589614
85599615
8560 IrInstruction *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
8561 if (err_union_ptr == irb->codegen->invalid_instruction)
8562 return irb->codegen->invalid_instruction;
9616 IrInstSrc *err_union_ptr = ir_gen_node_extra(irb, op1_node, parent_scope, LValPtr, nullptr);
9617 if (err_union_ptr == irb->codegen->invalid_inst_src)
9618 return irb->codegen->invalid_inst_src;
85639619
8564 IrInstruction *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
9620 IrInstSrc *is_err = ir_build_test_err_src(irb, parent_scope, node, err_union_ptr, true, false);
85659621
8566 IrInstruction *is_comptime;
9622 IrInstSrc *is_comptime;
85679623 if (ir_should_inline(irb->exec, parent_scope)) {
85689624 is_comptime = ir_build_const_bool(irb, parent_scope, node, true);
85699625 } else {
85709626 is_comptime = ir_build_test_comptime(irb, parent_scope, node, is_err);
85719627 }
85729628
8573 IrBasicBlock *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
8574 IrBasicBlock *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
8575 IrBasicBlock *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
8576 IrInstruction *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
9629 IrBasicBlockSrc *ok_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrOk");
9630 IrBasicBlockSrc *err_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrError");
9631 IrBasicBlockSrc *end_block = ir_create_basic_block(irb, parent_scope, "UnwrapErrEnd");
9632 IrInstSrc *cond_br_inst = ir_build_cond_br(irb, parent_scope, node, is_err, err_block, ok_block, is_comptime);
85779633
85789634 ResultLocPeerParent *peer_parent = ir_build_binary_result_peers(irb, cond_br_inst, ok_block, end_block, result_loc,
85799635 is_comptime);
......@@ -8589,33 +9645,33 @@ static IrInstruction *ir_gen_catch(IrBuilder *irb, Scope *parent_scope, AstNode
85899645 ZigVar *var = ir_create_var(irb, node, subexpr_scope, var_name,
85909646 is_const, is_const, is_shadowable, is_comptime);
85919647 err_scope = var->child_scope;
8592 IrInstruction *err_ptr = ir_build_unwrap_err_code(irb, err_scope, node, err_union_ptr);
9648 IrInstSrc *err_ptr = ir_build_unwrap_err_code_src(irb, err_scope, node, err_union_ptr);
85939649 ir_build_var_decl_src(irb, err_scope, var_node, var, nullptr, err_ptr);
85949650 } else {
85959651 err_scope = subexpr_scope;
85969652 }
8597 IrInstruction *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
8598 if (err_result == irb->codegen->invalid_instruction)
8599 return irb->codegen->invalid_instruction;
8600 IrBasicBlock *after_err_block = irb->current_basic_block;
9653 IrInstSrc *err_result = ir_gen_node_extra(irb, op2_node, err_scope, LValNone, &peer_parent->peers.at(0)->base);
9654 if (err_result == irb->codegen->invalid_inst_src)
9655 return irb->codegen->invalid_inst_src;
9656 IrBasicBlockSrc *after_err_block = irb->current_basic_block;
86019657 if (!instr_is_unreachable(err_result))
86029658 ir_mark_gen(ir_build_br(irb, parent_scope, node, end_block, is_comptime));
86039659
86049660 ir_set_cursor_at_end_and_append_block(irb, ok_block);
8605 IrInstruction *unwrapped_ptr = ir_build_unwrap_err_payload(irb, parent_scope, node, err_union_ptr, false, false);
8606 IrInstruction *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
9661 IrInstSrc *unwrapped_ptr = ir_build_unwrap_err_payload_src(irb, parent_scope, node, err_union_ptr, false, false);
9662 IrInstSrc *unwrapped_payload = ir_build_load_ptr(irb, parent_scope, node, unwrapped_ptr);
86079663 ir_build_end_expr(irb, parent_scope, node, unwrapped_payload, &peer_parent->peers.at(1)->base);
8608 IrBasicBlock *after_ok_block = irb->current_basic_block;
9664 IrBasicBlockSrc *after_ok_block = irb->current_basic_block;
86099665 ir_build_br(irb, parent_scope, node, end_block, is_comptime);
86109666
86119667 ir_set_cursor_at_end_and_append_block(irb, end_block);
8612 IrInstruction **incoming_values = allocate<IrInstruction *>(2);
9668 IrInstSrc **incoming_values = allocate<IrInstSrc *>(2);
86139669 incoming_values[0] = err_result;
86149670 incoming_values[1] = unwrapped_payload;
8615 IrBasicBlock **incoming_blocks = allocate<IrBasicBlock *>(2, "IrBasicBlock *");
9671 IrBasicBlockSrc **incoming_blocks = allocate<IrBasicBlockSrc *>(2, "IrBasicBlockSrc *");
86169672 incoming_blocks[0] = after_err_block;
86179673 incoming_blocks[1] = after_ok_block;
8618 IrInstruction *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
9674 IrInstSrc *phi = ir_build_phi(irb, parent_scope, node, 2, incoming_blocks, incoming_values, peer_parent);
86199675 return ir_lval_wrap(irb, parent_scope, phi, lval, result_loc);
86209676}
86219677
......@@ -8633,7 +9689,7 @@ static bool render_instance_name_recursive(CodeGen *codegen, Buf *name, Scope *o
86339689 return true;
86349690}
86359691
8636static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char *kind_name,
9692static Buf *get_anon_type_name(CodeGen *codegen, IrExecutableSrc *exec, const char *kind_name,
86379693 Scope *scope, AstNode *source_node, Buf *out_bare_name)
86389694{
86399695 if (exec != nullptr && exec->name) {
......@@ -8662,7 +9718,7 @@ static Buf *get_anon_type_name(CodeGen *codegen, IrExecutable *exec, const char
86629718 }
86639719}
86649720
8665static IrInstruction *ir_gen_container_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9721static IrInstSrc *ir_gen_container_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
86669722 assert(node->type == NodeTypeContainerDecl);
86679723
86689724 ContainerKind kind = node->data.container_decl.kind;
......@@ -8787,7 +9843,7 @@ static AstNode *ast_field_to_symbol_node(AstNode *err_set_field_node) {
87879843 }
87889844}
87899845
8790static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9846static IrInstSrc *ir_gen_err_set_decl(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
87919847 assert(node->type == NodeTypeErrorSetDecl);
87929848
87939849 uint32_t err_count = node->data.err_set_decl.decls.length;
......@@ -8830,7 +9886,7 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
88309886 buf_sprintf("duplicate error: '%s'", buf_ptr(&err->name)));
88319887 add_error_note(irb->codegen, msg, ast_field_to_symbol_node(prev_err->decl_node),
88329888 buf_sprintf("other error here"));
8833 return irb->codegen->invalid_instruction;
9889 return irb->codegen->invalid_inst_src;
88349890 }
88359891 errors[err->value] = err;
88369892 }
......@@ -8838,11 +9894,11 @@ static IrInstruction *ir_gen_err_set_decl(IrBuilder *irb, Scope *parent_scope, A
88389894 return ir_build_const_type(irb, parent_scope, node, err_set_type);
88399895}
88409896
8841static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
9897static IrInstSrc *ir_gen_fn_proto(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
88429898 assert(node->type == NodeTypeFnProto);
88439899
88449900 size_t param_count = node->data.fn_proto.params.length;
8845 IrInstruction **param_types = allocate<IrInstruction*>(param_count);
9901 IrInstSrc **param_types = allocate<IrInstSrc*>(param_count);
88469902
88479903 bool is_var_args = false;
88489904 for (size_t i = 0; i < param_count; i += 1) {
......@@ -8853,59 +9909,59 @@ static IrInstruction *ir_gen_fn_proto(IrBuilder *irb, Scope *parent_scope, AstNo
88539909 }
88549910 if (param_node->data.param_decl.var_token == nullptr) {
88559911 AstNode *type_node = param_node->data.param_decl.type;
8856 IrInstruction *type_value = ir_gen_node(irb, type_node, parent_scope);
8857 if (type_value == irb->codegen->invalid_instruction)
8858 return irb->codegen->invalid_instruction;
9912 IrInstSrc *type_value = ir_gen_node(irb, type_node, parent_scope);
9913 if (type_value == irb->codegen->invalid_inst_src)
9914 return irb->codegen->invalid_inst_src;
88599915 param_types[i] = type_value;
88609916 } else {
88619917 param_types[i] = nullptr;
88629918 }
88639919 }
88649920
8865 IrInstruction *align_value = nullptr;
9921 IrInstSrc *align_value = nullptr;
88669922 if (node->data.fn_proto.align_expr != nullptr) {
88679923 align_value = ir_gen_node(irb, node->data.fn_proto.align_expr, parent_scope);
8868 if (align_value == irb->codegen->invalid_instruction)
8869 return irb->codegen->invalid_instruction;
9924 if (align_value == irb->codegen->invalid_inst_src)
9925 return irb->codegen->invalid_inst_src;
88709926 }
88719927
8872 IrInstruction *callconv_value = nullptr;
9928 IrInstSrc *callconv_value = nullptr;
88739929 if (node->data.fn_proto.callconv_expr != nullptr) {
88749930 callconv_value = ir_gen_node(irb, node->data.fn_proto.callconv_expr, parent_scope);
8875 if (callconv_value == irb->codegen->invalid_instruction)
8876 return irb->codegen->invalid_instruction;
9931 if (callconv_value == irb->codegen->invalid_inst_src)
9932 return irb->codegen->invalid_inst_src;
88779933 }
88789934
8879 IrInstruction *return_type;
9935 IrInstSrc *return_type;
88809936 if (node->data.fn_proto.return_var_token == nullptr) {
88819937 if (node->data.fn_proto.return_type == nullptr) {
88829938 return_type = ir_build_const_type(irb, parent_scope, node, irb->codegen->builtin_types.entry_void);
88839939 } else {
88849940 return_type = ir_gen_node(irb, node->data.fn_proto.return_type, parent_scope);
8885 if (return_type == irb->codegen->invalid_instruction)
8886 return irb->codegen->invalid_instruction;
9941 if (return_type == irb->codegen->invalid_inst_src)
9942 return irb->codegen->invalid_inst_src;
88879943 }
88889944 } else {
88899945 add_node_error(irb->codegen, node,
88909946 buf_sprintf("TODO implement inferred return types https://github.com/ziglang/zig/issues/447"));
8891 return irb->codegen->invalid_instruction;
9947 return irb->codegen->invalid_inst_src;
88929948 //return_type = nullptr;
88939949 }
88949950
88959951 return ir_build_fn_proto(irb, parent_scope, node, param_types, align_value, callconv_value, return_type, is_var_args);
88969952}
88979953
8898static IrInstruction *ir_gen_resume(IrBuilder *irb, Scope *scope, AstNode *node) {
9954static IrInstSrc *ir_gen_resume(IrBuilderSrc *irb, Scope *scope, AstNode *node) {
88999955 assert(node->type == NodeTypeResume);
89009956
8901 IrInstruction *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
8902 if (target_inst == irb->codegen->invalid_instruction)
8903 return irb->codegen->invalid_instruction;
9957 IrInstSrc *target_inst = ir_gen_node_extra(irb, node->data.resume_expr.expr, scope, LValPtr, nullptr);
9958 if (target_inst == irb->codegen->invalid_inst_src)
9959 return irb->codegen->invalid_inst_src;
89049960
8905 return ir_build_resume(irb, scope, node, target_inst);
9961 return ir_build_resume_src(irb, scope, node, target_inst);
89069962}
89079963
8908static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *node, LVal lval,
9964static IrInstSrc *ir_gen_await_expr(IrBuilderSrc *irb, Scope *scope, AstNode *node, LVal lval,
89099965 ResultLoc *result_loc)
89109966{
89119967 assert(node->type == NodeTypeAwaitExpr);
......@@ -8926,7 +9982,7 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
89269982 ZigFn *fn_entry = exec_fn_entry(irb->exec);
89279983 if (!fn_entry) {
89289984 add_node_error(irb->codegen, node, buf_sprintf("await outside function definition"));
8929 return irb->codegen->invalid_instruction;
9985 return irb->codegen->invalid_inst_src;
89309986 }
89319987 ScopeSuspend *existing_suspend_scope = get_scope_suspend(scope);
89329988 if (existing_suspend_scope) {
......@@ -8935,24 +9991,24 @@ static IrInstruction *ir_gen_await_expr(IrBuilder *irb, Scope *scope, AstNode *n
89359991 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("suspend block here"));
89369992 existing_suspend_scope->reported_err = true;
89379993 }
8938 return irb->codegen->invalid_instruction;
9994 return irb->codegen->invalid_inst_src;
89399995 }
89409996
8941 IrInstruction *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
8942 if (target_inst == irb->codegen->invalid_instruction)
8943 return irb->codegen->invalid_instruction;
9997 IrInstSrc *target_inst = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
9998 if (target_inst == irb->codegen->invalid_inst_src)
9999 return irb->codegen->invalid_inst_src;
894410000
8945 IrInstruction *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
10001 IrInstSrc *await_inst = ir_build_await_src(irb, scope, node, target_inst, result_loc);
894610002 return ir_lval_wrap(irb, scope, await_inst, lval, result_loc);
894710003}
894810004
8949static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNode *node) {
10005static IrInstSrc *ir_gen_suspend(IrBuilderSrc *irb, Scope *parent_scope, AstNode *node) {
895010006 assert(node->type == NodeTypeSuspend);
895110007
895210008 ZigFn *fn_entry = exec_fn_entry(irb->exec);
895310009 if (!fn_entry) {
895410010 add_node_error(irb->codegen, node, buf_sprintf("suspend outside function definition"));
8955 return irb->codegen->invalid_instruction;
10011 return irb->codegen->invalid_inst_src;
895610012 }
895710013 ScopeSuspend *existing_suspend_scope = get_scope_suspend(parent_scope);
895810014 if (existing_suspend_scope) {
......@@ -8961,21 +10017,21 @@ static IrInstruction *ir_gen_suspend(IrBuilder *irb, Scope *parent_scope, AstNod
896110017 add_error_note(irb->codegen, msg, existing_suspend_scope->base.source_node, buf_sprintf("other suspend block here"));
896210018 existing_suspend_scope->reported_err = true;
896310019 }
8964 return irb->codegen->invalid_instruction;
10020 return irb->codegen->invalid_inst_src;
896510021 }
896610022
8967 IrInstructionSuspendBegin *begin = ir_build_suspend_begin(irb, parent_scope, node);
10023 IrInstSrcSuspendBegin *begin = ir_build_suspend_begin_src(irb, parent_scope, node);
896810024 if (node->data.suspend.block != nullptr) {
896910025 ScopeSuspend *suspend_scope = create_suspend_scope(irb->codegen, node, parent_scope);
897010026 Scope *child_scope = &suspend_scope->base;
8971 IrInstruction *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
10027 IrInstSrc *susp_res = ir_gen_node(irb, node->data.suspend.block, child_scope);
897210028 ir_mark_gen(ir_build_check_statement_is_void(irb, child_scope, node->data.suspend.block, susp_res));
897310029 }
897410030
8975 return ir_mark_gen(ir_build_suspend_finish(irb, parent_scope, node, begin));
10031 return ir_mark_gen(ir_build_suspend_finish_src(irb, parent_scope, node, begin));
897610032}
897710033
8978static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scope,
10034static IrInstSrc *ir_gen_node_raw(IrBuilderSrc *irb, AstNode *node, Scope *scope,
897910035 LVal lval, ResultLoc *result_loc)
898010036{
898110037 assert(scope);
......@@ -9024,39 +10080,39 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
902410080 return ir_gen_return(irb, scope, node, lval, result_loc);
902510081 case NodeTypeFieldAccessExpr:
902610082 {
9027 IrInstruction *ptr_instruction = ir_gen_field_access(irb, scope, node);
9028 if (ptr_instruction == irb->codegen->invalid_instruction)
10083 IrInstSrc *ptr_instruction = ir_gen_field_access(irb, scope, node);
10084 if (ptr_instruction == irb->codegen->invalid_inst_src)
902910085 return ptr_instruction;
903010086 if (lval == LValPtr)
903110087 return ptr_instruction;
903210088
9033 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
10089 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, ptr_instruction);
903410090 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
903510091 }
903610092 case NodeTypePtrDeref: {
903710093 AstNode *expr_node = node->data.ptr_deref_expr.target;
9038 IrInstruction *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
9039 if (value == irb->codegen->invalid_instruction)
10094 IrInstSrc *value = ir_gen_node_extra(irb, expr_node, scope, lval, nullptr);
10095 if (value == irb->codegen->invalid_inst_src)
904010096 return value;
904110097
904210098 // We essentially just converted any lvalue from &(x.*) to (&x).*;
904310099 // this inhibits checking that x is a pointer later, so we directly
904410100 // record whether the pointer check is needed
9045 IrInstruction *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
10101 IrInstSrc *un_op = ir_build_un_op_lval(irb, scope, node, IrUnOpDereference, value, lval, result_loc);
904610102 return ir_expr_wrap(irb, scope, un_op, result_loc);
904710103 }
904810104 case NodeTypeUnwrapOptional: {
904910105 AstNode *expr_node = node->data.unwrap_optional.expr;
905010106
9051 IrInstruction *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
9052 if (maybe_ptr == irb->codegen->invalid_instruction)
9053 return irb->codegen->invalid_instruction;
10107 IrInstSrc *maybe_ptr = ir_gen_node_extra(irb, expr_node, scope, LValPtr, nullptr);
10108 if (maybe_ptr == irb->codegen->invalid_inst_src)
10109 return irb->codegen->invalid_inst_src;
905410110
9055 IrInstruction *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
10111 IrInstSrc *unwrapped_ptr = ir_build_optional_unwrap_ptr(irb, scope, node, maybe_ptr, true, false);
905610112 if (lval == LValPtr)
905710113 return unwrapped_ptr;
905810114
9059 IrInstruction *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
10115 IrInstSrc *load_ptr = ir_build_load_ptr(irb, scope, node, unwrapped_ptr);
906010116 return ir_expr_wrap(irb, scope, load_ptr, result_loc);
906110117 }
906210118 case NodeTypeBoolLiteral:
......@@ -9114,7 +10170,7 @@ static IrInstruction *ir_gen_node_raw(IrBuilder *irb, AstNode *node, Scope *scop
911410170 case NodeTypeInferredArrayType:
911510171 add_node_error(irb->codegen, node,
911610172 buf_sprintf("inferred array size invalid here"));
9117 return irb->codegen->invalid_instruction;
10173 return irb->codegen->invalid_inst_src;
911810174 case NodeTypeVarFieldType:
911910175 return ir_lval_wrap(irb, scope,
912010176 ir_build_const_type(irb, scope, node, irb->codegen->builtin_types.entry_var), lval, result_loc);
......@@ -9128,7 +10184,7 @@ static ResultLoc *no_result_loc(void) {
912810184 return &result_loc_none->base;
912910185}
913010186
9131static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *scope, LVal lval,
10187static IrInstSrc *ir_gen_node_extra(IrBuilderSrc *irb, AstNode *node, Scope *scope, LVal lval,
913210188 ResultLoc *result_loc)
913310189{
913410190 if (result_loc == nullptr) {
......@@ -9145,8 +10201,8 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
914510201 } else {
914610202 child_scope = &create_expr_scope(irb->codegen, node, scope)->base;
914710203 }
9148 IrInstruction *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
9149 if (result == irb->codegen->invalid_instruction) {
10204 IrInstSrc *result = ir_gen_node_raw(irb, node, child_scope, lval, result_loc);
10205 if (result == irb->codegen->invalid_inst_src) {
915010206 if (irb->exec->first_err_trace_msg == nullptr) {
915110207 irb->exec->first_err_trace_msg = irb->codegen->trace_err;
915210208 }
......@@ -9154,11 +10210,22 @@ static IrInstruction *ir_gen_node_extra(IrBuilder *irb, AstNode *node, Scope *sc
915410210 return result;
915510211}
915610212
9157static IrInstruction *ir_gen_node(IrBuilder *irb, AstNode *node, Scope *scope) {
10213static IrInstSrc *ir_gen_node(IrBuilderSrc *irb, AstNode *node, Scope *scope) {
915810214 return ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
915910215}
916010216
9161static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
10217static void invalidate_exec(IrExecutableSrc *exec, ErrorMsg *msg) {
10218 if (exec->first_err_trace_msg != nullptr)
10219 return;
10220
10221 exec->first_err_trace_msg = msg;
10222
10223 for (size_t i = 0; i < exec->tld_list.length; i += 1) {
10224 exec->tld_list.items[i]->resolution = TldResolutionInvalid;
10225 }
10226}
10227
10228static void invalidate_exec_gen(IrExecutableGen *exec, ErrorMsg *msg) {
916210229 if (exec->first_err_trace_msg != nullptr)
916310230 return;
916410231
......@@ -9172,24 +10239,25 @@ static void invalidate_exec(IrExecutable *exec, ErrorMsg *msg) {
917210239 invalidate_exec(exec->source_exec, msg);
917310240}
917410241
9175bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_executable) {
10242
10243bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable) {
917610244 assert(node->owner);
917710245
9178 IrBuilder ir_builder = {0};
9179 IrBuilder *irb = &ir_builder;
10246 IrBuilderSrc ir_builder = {0};
10247 IrBuilderSrc *irb = &ir_builder;
918010248
918110249 irb->codegen = codegen;
918210250 irb->exec = ir_executable;
918310251 irb->main_block_node = node;
918410252
9185 IrBasicBlock *entry_block = ir_create_basic_block(irb, scope, "Entry");
10253 IrBasicBlockSrc *entry_block = ir_create_basic_block(irb, scope, "Entry");
918610254 ir_set_cursor_at_end_and_append_block(irb, entry_block);
918710255 // Entry block gets a reference because we enter it to begin.
918810256 ir_ref_bb(irb->current_basic_block);
918910257
9190 IrInstruction *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
10258 IrInstSrc *result = ir_gen_node_extra(irb, node, scope, LValNone, nullptr);
919110259
9192 if (result == irb->codegen->invalid_instruction)
10260 if (result == irb->codegen->invalid_inst_src)
919310261 return false;
919410262
919510263 if (irb->exec->first_err_trace_msg != nullptr) {
......@@ -9198,13 +10266,13 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
919810266 }
919910267
920010268 if (!instr_is_unreachable(result)) {
9201 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->source_node, result, nullptr));
10269 ir_mark_gen(ir_build_add_implicit_return_type(irb, scope, result->base.source_node, result, nullptr));
920210270 // no need for save_err_ret_addr because this cannot return error
920310271 ResultLocReturn *result_loc_ret = allocate<ResultLocReturn>(1, "ResultLocReturn");
920410272 result_loc_ret->base.id = ResultLocIdReturn;
920510273 ir_build_reset_result(irb, scope, node, &result_loc_ret->base);
920610274 ir_mark_gen(ir_build_end_expr(irb, scope, node, result, &result_loc_ret->base));
9207 ir_mark_gen(ir_build_return(irb, scope, result->source_node, result));
10275 ir_mark_gen(ir_build_return_src(irb, scope, result->base.source_node, result));
920810276 }
920910277
921010278 return true;
......@@ -9213,7 +10281,7 @@ bool ir_gen(CodeGen *codegen, AstNode *node, Scope *scope, IrExecutable *ir_exec
921310281bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
921410282 assert(fn_entry);
921510283
9216 IrExecutable *ir_executable = fn_entry->ir_executable;
10284 IrExecutableSrc *ir_executable = fn_entry->ir_executable;
921710285 AstNode *body_node = fn_entry->body_node;
921810286
921910287 assert(fn_entry->child_scope);
......@@ -9221,14 +10289,21 @@ bool ir_gen_fn(CodeGen *codegen, ZigFn *fn_entry) {
922110289 return ir_gen(codegen, body_node, fn_entry->child_scope, ir_executable);
922210290}
922310291
9224static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutable *exec, ErrorMsg *err_msg, int limit) {
10292static void ir_add_call_stack_errors_gen(CodeGen *codegen, IrExecutableGen *exec, ErrorMsg *err_msg, int limit) {
922510293 if (!exec || !exec->source_node || limit < 0) return;
922610294 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
922710295
9228 ir_add_call_stack_errors(codegen, exec->parent_exec, err_msg, limit - 1);
10296 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
922910297}
923010298
9231static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNode *source_node, Buf *msg) {
10299static void ir_add_call_stack_errors(CodeGen *codegen, IrExecutableSrc *exec, ErrorMsg *err_msg, int limit) {
10300 if (!exec || !exec->source_node || limit < 0) return;
10301 add_error_note(codegen, err_msg, exec->source_node, buf_sprintf("called from here"));
10302
10303 ir_add_call_stack_errors_gen(codegen, exec->parent_exec, err_msg, limit - 1);
10304}
10305
10306static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutableSrc *exec, AstNode *source_node, Buf *msg) {
923210307 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
923310308 invalidate_exec(exec, err_msg);
923410309 if (exec->parent_exec) {
......@@ -9237,26 +10312,40 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, IrExecutable *exec, AstNo
923710312 return err_msg;
923810313}
923910314
10315static ErrorMsg *exec_add_error_node_gen(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node, Buf *msg) {
10316 ErrorMsg *err_msg = add_node_error(codegen, source_node, msg);
10317 invalidate_exec_gen(exec, err_msg);
10318 if (exec->parent_exec) {
10319 ir_add_call_stack_errors_gen(codegen, exec, err_msg, 10);
10320 }
10321 return err_msg;
10322}
10323
924010324static ErrorMsg *ir_add_error_node(IrAnalyze *ira, AstNode *source_node, Buf *msg) {
9241 return exec_add_error_node(ira->codegen, ira->new_irb.exec, source_node, msg);
10325 return exec_add_error_node_gen(ira->codegen, ira->new_irb.exec, source_node, msg);
924210326}
924310327
924410328static ErrorMsg *opt_ir_add_error_node(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node, Buf *msg) {
924510329 if (ira != nullptr)
9246 return exec_add_error_node(codegen, ira->new_irb.exec, source_node, msg);
10330 return exec_add_error_node_gen(codegen, ira->new_irb.exec, source_node, msg);
924710331 else
924810332 return add_node_error(codegen, source_node, msg);
924910333}
925010334
9251static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInstruction *source_instruction, Buf *msg) {
10335static ErrorMsg *ir_add_error(IrAnalyze *ira, IrInst *source_instruction, Buf *msg) {
925210336 return ir_add_error_node(ira, source_instruction->source_node, msg);
925310337}
925410338
9255static void ir_assert(bool ok, IrInstruction *source_instruction) {
10339static void ir_assert(bool ok, IrInst *source_instruction) {
925610340 if (ok) return;
925710341 src_assert(ok, source_instruction->source_node);
925810342}
925910343
10344static void ir_assert_gen(bool ok, IrInstGen *source_instruction) {
10345 if (ok) return;
10346 src_assert(ok, source_instruction->base.source_node);
10347}
10348
926010349// This function takes a comptime ptr and makes the child const value conform to the type
926110350// described by the pointer.
926210351static Error eval_comptime_ptr_reinterpret(IrAnalyze *ira, CodeGen *codegen, AstNode *source_node,
......@@ -9302,36 +10391,36 @@ ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_va
930210391 return val;
930310392}
930410393
9305static Error ir_exec_scan_for_side_effects(CodeGen *codegen, IrExecutable *exec) {
9306 IrBasicBlock *bb = exec->basic_block_list.at(0);
10394static Error ir_exec_scan_for_side_effects(CodeGen *codegen, IrExecutableGen *exec) {
10395 IrBasicBlockGen *bb = exec->basic_block_list.at(0);
930710396 for (size_t i = 0; i < bb->instruction_list.length; i += 1) {
9308 IrInstruction *instruction = bb->instruction_list.at(i);
9309 if (instruction->id == IrInstructionIdReturn) {
10397 IrInstGen *instruction = bb->instruction_list.at(i);
10398 if (instruction->id == IrInstGenIdReturn) {
931010399 return ErrorNone;
9311 } else if (ir_has_side_effects(instruction)) {
10400 } else if (ir_inst_gen_has_side_effects(instruction)) {
931210401 if (instr_is_comptime(instruction)) {
931310402 switch (instruction->id) {
9314 case IrInstructionIdUnwrapErrPayload:
9315 case IrInstructionIdUnionFieldPtr:
10403 case IrInstGenIdUnwrapErrPayload:
10404 case IrInstGenIdUnionFieldPtr:
931610405 continue;
931710406 default:
931810407 break;
931910408 }
932010409 }
9321 if (get_scope_typeof(instruction->scope) != nullptr) {
10410 if (get_scope_typeof(instruction->base.scope) != nullptr) {
932210411 // doesn't count, it's inside a @TypeOf()
932310412 continue;
932410413 }
9325 exec_add_error_node(codegen, exec, instruction->source_node,
9326 buf_sprintf("unable to evaluate constant expression"));
10414 exec_add_error_node_gen(codegen, exec, instruction->base.source_node,
10415 buf_sprintf("unable to evaluate constant expression"));
932710416 return ErrorSemanticAnalyzeFail;
932810417 }
932910418 }
933010419 zig_unreachable();
933110420}
933210421
9333static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInstruction *source_instruction) {
9334 if (ir_should_inline(ira->new_irb.exec, source_instruction->scope)) {
10422static bool ir_emit_global_runtime_side_effect(IrAnalyze *ira, IrInst* source_instruction) {
10423 if (ir_should_inline(ira->old_irb.exec, source_instruction->scope)) {
933510424 ir_add_error(ira, source_instruction, buf_sprintf("unable to evaluate constant expression"));
933610425 return false;
933710426 }
......@@ -10065,7 +11154,7 @@ void float_read_ieee597(ZigValue *val, uint8_t *buf, bool is_big_endian) {
1006511154 }
1006611155}
1006711156
10068static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruction, ZigType *other_type,
11157static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstGen *instruction, ZigType *other_type,
1006911158 bool explicit_cast)
1007011159{
1007111160 if (type_is_invalid(other_type)) {
......@@ -10159,7 +11248,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1015911248 }
1016011249 Buf *val_buf = buf_alloc();
1016111250 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10162 ir_add_error(ira, instruction,
11251 ir_add_error_node(ira, instruction->base.source_node,
1016311252 buf_sprintf("integer value %s has no representation in type '%s'",
1016411253 buf_ptr(val_buf),
1016511254 buf_ptr(&other_type->name)));
......@@ -10254,7 +11343,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1025411343 }
1025511344 Buf *val_buf = buf_alloc();
1025611345 float_append_buf(val_buf, const_val);
10257 ir_add_error(ira, instruction,
11346 ir_add_error_node(ira, instruction->base.source_node,
1025811347 buf_sprintf("cast of value %s to type '%s' loses information",
1025911348 buf_ptr(val_buf),
1026011349 buf_ptr(&other_type->name)));
......@@ -10263,7 +11352,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1026311352 if (!other_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
1026411353 Buf *val_buf = buf_alloc();
1026511354 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10266 ir_add_error(ira, instruction,
11355 ir_add_error_node(ira, instruction->base.source_node,
1026711356 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
1026811357 buf_ptr(val_buf),
1026911358 buf_ptr(&other_type->name)));
......@@ -10284,7 +11373,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1028411373 if (!child_type->data.integral.is_signed && const_val->data.x_bigint.is_negative) {
1028511374 Buf *val_buf = buf_alloc();
1028611375 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
10287 ir_add_error(ira, instruction,
11376 ir_add_error_node(ira, instruction->base.source_node,
1028811377 buf_sprintf("cannot cast negative value %s to unsigned integer type '%s'",
1028911378 buf_ptr(val_buf),
1029011379 buf_ptr(&child_type->name)));
......@@ -10307,7 +11396,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1030711396 Buf *val_buf = buf_alloc();
1030811397 float_append_buf(val_buf, const_val);
1030911398
10310 ir_add_error(ira, instruction,
11399 ir_add_error_node(ira, instruction->base.source_node,
1031111400 buf_sprintf("fractional component prevents float value %s from being casted to type '%s'",
1031211401 buf_ptr(val_buf),
1031311402 buf_ptr(&other_type->name)));
......@@ -10337,7 +11426,7 @@ static bool ir_num_lit_fits_in_other_type(IrAnalyze *ira, IrInstruction *instruc
1033711426 bigint_append_buf(val_buf, &const_val->data.x_bigint, 10);
1033811427 }
1033911428
10340 ir_add_error(ira, instruction,
11429 ir_add_error_node(ira, instruction->base.source_node,
1034111430 buf_sprintf("%s value %s cannot be coerced to type '%s'",
1034211431 num_lit_str,
1034311432 buf_ptr(val_buf),
......@@ -10791,11 +11880,11 @@ static void update_errors_helper(CodeGen *g, ErrorTableEntry ***errors, size_t *
1079111880}
1079211881
1079311882static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigType *expected_type,
10794 IrInstruction **instructions, size_t instruction_count)
11883 IrInstGen **instructions, size_t instruction_count)
1079511884{
1079611885 Error err;
1079711886 assert(instruction_count >= 1);
10798 IrInstruction *prev_inst;
11887 IrInstGen *prev_inst;
1079911888 size_t i = 0;
1080011889 for (;;) {
1080111890 prev_inst = instructions[i];
......@@ -10815,7 +11904,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1081511904 size_t errors_count = 0;
1081611905 ZigType *err_set_type = nullptr;
1081711906 if (prev_inst->value->type->id == ZigTypeIdErrorSet) {
10818 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->source_node)) {
11907 if (!resolve_inferred_error_set(ira->codegen, prev_inst->value->type, prev_inst->base.source_node)) {
1081911908 return ira->codegen->builtin_types.entry_invalid;
1082011909 }
1082111910 if (type_is_global_error_set(prev_inst->value->type)) {
......@@ -10835,7 +11924,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1083511924 bool any_are_null = (prev_inst->value->type->id == ZigTypeIdNull);
1083611925 bool convert_to_const_slice = false;
1083711926 for (; i < instruction_count; i += 1) {
10838 IrInstruction *cur_inst = instructions[i];
11927 IrInstGen *cur_inst = instructions[i];
1083911928 ZigType *cur_type = cur_inst->value->type;
1084011929 ZigType *prev_type = prev_inst->value->type;
1084111930
......@@ -10857,14 +11946,14 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1085711946 }
1085811947
1085911948 if (prev_type->id == ZigTypeIdErrorSet) {
10860 ir_assert(err_set_type != nullptr, prev_inst);
11949 ir_assert_gen(err_set_type != nullptr, prev_inst);
1086111950 if (cur_type->id == ZigTypeIdErrorSet) {
1086211951 if (type_is_global_error_set(err_set_type)) {
1086311952 continue;
1086411953 }
1086511954 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
1086611955 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10867 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
11956 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
1086811957 return ira->codegen->builtin_types.entry_invalid;
1086911958 }
1087011959 if (!allow_infer && type_is_global_error_set(cur_type)) {
......@@ -10932,7 +12021,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1093212021 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
1093312022 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1093412023 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10935 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12024 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1093612025 return ira->codegen->builtin_types.entry_invalid;
1093712026 }
1093812027 if (!allow_infer && type_is_global_error_set(cur_err_set_type)) {
......@@ -10987,7 +12076,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1098712076 if (cur_type->id == ZigTypeIdErrorSet) {
1098812077 bool allow_infer = cur_type->data.error_set.infer_fn != nullptr &&
1098912078 cur_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
10990 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->source_node)) {
12079 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_type, cur_inst->base.source_node)) {
1099112080 return ira->codegen->builtin_types.entry_invalid;
1099212081 }
1099312082 if (!allow_infer && type_is_global_error_set(cur_type)) {
......@@ -11010,7 +12099,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1101012099 err_set_type = cur_type;
1101112100 }
1101212101
11013 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->source_node)) {
12102 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, err_set_type, cur_inst->base.source_node)) {
1101412103 return ira->codegen->builtin_types.entry_invalid;
1101512104 }
1101612105
......@@ -11073,11 +12162,11 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1107312162 bool allow_infer_cur = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1107412163 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
1107512164
11076 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->source_node)) {
12165 if (!allow_infer_prev && !resolve_inferred_error_set(ira->codegen, prev_err_set_type, cur_inst->base.source_node)) {
1107712166 return ira->codegen->builtin_types.entry_invalid;
1107812167 }
1107912168
11080 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12169 if (!allow_infer_cur && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1108112170 return ira->codegen->builtin_types.entry_invalid;
1108212171 }
1108312172
......@@ -11254,7 +12343,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1125412343 ZigType *cur_err_set_type = cur_type->data.error_union.err_set_type;
1125512344 bool allow_infer = cur_err_set_type->data.error_set.infer_fn != nullptr &&
1125612345 cur_err_set_type->data.error_set.infer_fn == ira->new_irb.exec->fn_entry;
11257 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->source_node)) {
12346 if (!allow_infer && !resolve_inferred_error_set(ira->codegen, cur_err_set_type, cur_inst->base.source_node)) {
1125812347 return ira->codegen->builtin_types.entry_invalid;
1125912348 }
1126012349 if ((!allow_infer && type_is_global_error_set(cur_err_set_type)) ||
......@@ -11449,9 +12538,9 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1144912538 ErrorMsg *msg = ir_add_error_node(ira, source_node,
1145012539 buf_sprintf("incompatible types: '%s' and '%s'",
1145112540 buf_ptr(&prev_type->name), buf_ptr(&cur_type->name)));
11452 add_error_note(ira->codegen, msg, prev_inst->source_node,
12541 add_error_note(ira->codegen, msg, prev_inst->base.source_node,
1145312542 buf_sprintf("type '%s' here", buf_ptr(&prev_type->name)));
11454 add_error_note(ira->codegen, msg, cur_inst->source_node,
12543 add_error_note(ira->codegen, msg, cur_inst->base.source_node,
1145512544 buf_sprintf("type '%s' here", buf_ptr(&cur_type->name)));
1145612545
1145712546 return ira->codegen->builtin_types.entry_invalid;
......@@ -11521,7 +12610,7 @@ static ZigType *ir_resolve_peer_types(IrAnalyze *ira, AstNode *source_node, ZigT
1152112610 }
1152212611}
1152312612
11524static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_instr,
12613static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInst *source_instr,
1152512614 CastOp cast_op,
1152612615 ZigValue *other_val, ZigType *other_type,
1152712616 ZigValue *const_val, ZigType *new_type)
......@@ -11621,58 +12710,56 @@ static bool eval_const_expr_implicit_cast(IrAnalyze *ira, IrInstruction *source_
1162112710 return true;
1162212711}
1162312712
11624static IrInstruction *ir_const(IrAnalyze *ira, IrInstruction *old_instruction, ZigType *ty) {
11625 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
11626 old_instruction->scope, old_instruction->source_node);
11627 IrInstruction *new_instruction = &const_instruction->base;
12713static IrInstGen *ir_const(IrAnalyze *ira, IrInst *inst, ZigType *ty) {
12714 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
12715 inst->scope, inst->source_node);
12716 IrInstGen *new_instruction = &const_instruction->base;
1162812717 new_instruction->value->type = ty;
1162912718 new_instruction->value->special = ConstValSpecialStatic;
1163012719 return new_instruction;
1163112720}
1163212721
11633static IrInstruction *ir_const_noval(IrAnalyze *ira, IrInstruction *old_instruction) {
11634 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,
12722static IrInstGen *ir_const_noval(IrAnalyze *ira, IrInst *old_instruction) {
12723 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
1163512724 old_instruction->scope, old_instruction->source_node);
1163612725 return &const_instruction->base;
1163712726}
1163812727
11639// This function initializes the new IrInstruction with the provided ZigValue,
12728// This function initializes the new IrInstGen with the provided ZigValue,
1164012729// rather than creating a new one.
11641static IrInstruction *ir_const_move(IrAnalyze *ira, IrInstruction *old_instruction, ZigValue *val) {
11642 IrInstruction *result = ir_const_noval(ira, old_instruction);
12730static IrInstGen *ir_const_move(IrAnalyze *ira, IrInst *old_instruction, ZigValue *val) {
12731 IrInstGen *result = ir_const_noval(ira, old_instruction);
1164312732 result->value = val;
1164412733 return result;
1164512734}
1164612735
11647static IrInstruction *ir_resolve_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
12736static IrInstGen *ir_resolve_cast(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value,
1164812737 ZigType *wanted_type, CastOp cast_op)
1164912738{
1165012739 if (instr_is_comptime(value) || !type_has_bits(wanted_type)) {
11651 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12740 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1165212741 if (!eval_const_expr_implicit_cast(ira, source_instr, cast_op, value->value, value->value->type,
1165312742 result->value, wanted_type))
1165412743 {
11655 return ira->codegen->invalid_instruction;
12744 return ira->codegen->invalid_inst_gen;
1165612745 }
1165712746 return result;
1165812747 } else {
11659 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, cast_op);
11660 result->value->type = wanted_type;
11661 return result;
12748 return ir_build_cast(ira, source_instr, wanted_type, value, cast_op);
1166212749 }
1166312750}
1166412751
11665static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInstruction *source_instr,
11666 IrInstruction *value, ZigType *wanted_type)
12752static IrInstGen *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira, IrInst* source_instr,
12753 IrInstGen *value, ZigType *wanted_type)
1166712754{
11668 assert(value->value->type->id == ZigTypeIdPointer);
12755 ir_assert(value->value->type->id == ZigTypeIdPointer, source_instr);
1166912756
1167012757 Error err;
1167112758
1167212759 if ((err = type_resolve(ira->codegen, value->value->type->data.pointer.child_type,
1167312760 ResolveStatusAlignmentKnown)))
1167412761 {
11675 return ira->codegen->invalid_instruction;
12762 return ira->codegen->invalid_inst_gen;
1167612763 }
1167712764
1167812765 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, value->value->type));
......@@ -11680,9 +12767,9 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
1168012767 if (instr_is_comptime(value)) {
1168112768 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, value->value, source_instr->source_node);
1168212769 if (pointee == nullptr)
11683 return ira->codegen->invalid_instruction;
12770 return ira->codegen->invalid_inst_gen;
1168412771 if (pointee->special != ConstValSpecialRuntime) {
11685 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12772 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1168612773 result->value->data.x_ptr.special = ConstPtrSpecialBaseArray;
1168712774 result->value->data.x_ptr.mut = value->value->data.x_ptr.mut;
1168812775 result->value->data.x_ptr.data.base_array.array_val = pointee;
......@@ -11691,21 +12778,18 @@ static IrInstruction *ir_resolve_ptr_of_array_to_unknown_len_ptr(IrAnalyze *ira,
1169112778 }
1169212779 }
1169312780
11694 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
11695 wanted_type, value, CastOpBitCast);
11696 result->value->type = wanted_type;
11697 return result;
12781 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
1169812782}
1169912783
11700static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruction *source_instr,
11701 IrInstruction *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
12784static IrInstGen *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInst* source_instr,
12785 IrInstGen *array_ptr, ZigType *wanted_type, ResultLoc *result_loc)
1170212786{
1170312787 Error err;
1170412788
1170512789 if ((err = type_resolve(ira->codegen, array_ptr->value->type->data.pointer.child_type,
1170612790 ResolveStatusAlignmentKnown)))
1170712791 {
11708 return ira->codegen->invalid_instruction;
12792 return ira->codegen->invalid_inst_gen;
1170912793 }
1171012794
1171112795 wanted_type = adjust_slice_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, array_ptr->value->type));
......@@ -11713,17 +12797,17 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
1171312797 if (instr_is_comptime(array_ptr)) {
1171412798 ZigValue *array_ptr_val = ir_resolve_const(ira, array_ptr, UndefBad);
1171512799 if (array_ptr_val == nullptr)
11716 return ira->codegen->invalid_instruction;
12800 return ira->codegen->invalid_inst_gen;
1171712801 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, array_ptr_val, source_instr->source_node);
1171812802 if (pointee == nullptr)
11719 return ira->codegen->invalid_instruction;
12803 return ira->codegen->invalid_inst_gen;
1172012804 if (pointee->special != ConstValSpecialRuntime) {
1172112805 assert(array_ptr_val->type->id == ZigTypeIdPointer);
1172212806 ZigType *array_type = array_ptr_val->type->data.pointer.child_type;
1172312807 assert(is_slice(wanted_type));
1172412808 bool is_const = wanted_type->data.structure.fields[slice_ptr_index]->type_entry->data.pointer.is_const;
1172512809
11726 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
12810 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1172712811 init_const_slice(ira->codegen, result->value, pointee, 0, array_type->data.array.len, is_const);
1172812812 result->value->data.x_struct.fields[slice_ptr_index]->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
1172912813 result->value->type = wanted_type;
......@@ -11732,32 +12816,33 @@ static IrInstruction *ir_resolve_ptr_of_array_to_slice(IrAnalyze *ira, IrInstruc
1173212816 }
1173312817
1173412818 if (result_loc == nullptr) result_loc = no_result_loc();
11735 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type,
11736 nullptr, true, true);
11737 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
12819 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12820 if (type_is_invalid(result_loc_inst->value->type) ||
12821 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
12822 {
1173812823 return result_loc_inst;
1173912824 }
1174012825 return ir_build_ptr_of_array_to_slice(ira, source_instr, wanted_type, array_ptr, result_loc_inst);
1174112826}
1174212827
11743static IrBasicBlock *ir_get_new_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
12828static IrBasicBlockGen *ir_get_new_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
1174412829 assert(old_bb);
1174512830
11746 if (old_bb->other) {
11747 if (ref_old_instruction == nullptr || old_bb->other->ref_instruction != ref_old_instruction) {
11748 return old_bb->other;
12831 if (old_bb->child) {
12832 if (ref_old_instruction == nullptr || old_bb->child->ref_instruction != ref_old_instruction) {
12833 return old_bb->child;
1174912834 }
1175012835 }
1175112836
11752 IrBasicBlock *new_bb = ir_build_bb_from(&ira->new_irb, old_bb);
12837 IrBasicBlockGen *new_bb = ir_build_bb_from(ira, old_bb);
1175312838 new_bb->ref_instruction = ref_old_instruction;
1175412839
1175512840 return new_bb;
1175612841}
1175712842
11758static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb, IrInstruction *ref_old_instruction) {
12843static IrBasicBlockGen *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrInst *ref_old_instruction) {
1175912844 assert(ref_old_instruction != nullptr);
11760 IrBasicBlock *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
12845 IrBasicBlockGen *new_bb = ir_get_new_bb(ira, old_bb, ref_old_instruction);
1176112846 if (new_bb->must_be_comptime_source_instr) {
1176212847 ErrorMsg *msg = ir_add_error(ira, ref_old_instruction,
1176312848 buf_sprintf("control flow attempts to use compile-time variable at runtime"));
......@@ -11768,24 +12853,24 @@ static IrBasicBlock *ir_get_new_bb_runtime(IrAnalyze *ira, IrBasicBlock *old_bb,
1176812853 return new_bb;
1176912854}
1177012855
11771static void ir_start_bb(IrAnalyze *ira, IrBasicBlock *old_bb, IrBasicBlock *const_predecessor_bb) {
11772 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? old_bb->instruction_list.at(0) : nullptr);
12856static void ir_start_bb(IrAnalyze *ira, IrBasicBlockSrc *old_bb, IrBasicBlockSrc *const_predecessor_bb) {
12857 ir_assert(!old_bb->suspended, (old_bb->instruction_list.length != 0) ? &old_bb->instruction_list.at(0)->base : nullptr);
1177312858 ira->instruction_index = 0;
1177412859 ira->old_irb.current_basic_block = old_bb;
1177512860 ira->const_predecessor_bb = const_predecessor_bb;
1177612861 ira->old_bb_index = old_bb->index;
1177712862}
1177812863
11779static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction, IrBasicBlock *next_bb,
12864static IrInstGen *ira_suspend(IrAnalyze *ira, IrInst *old_instruction, IrBasicBlockSrc *next_bb,
1178012865 IrSuspendPosition *suspend_pos)
1178112866{
1178212867 if (ira->codegen->verbose_ir) {
11783 fprintf(stderr, "suspend %s_%zu %s_%zu #%" PRIu32 " (%zu,%zu)\n",
12868 fprintf(stderr, "suspend %s_%" PRIu32 " %s_%" PRIu32 " #%" PRIu32 " (%zu,%zu)\n",
1178412869 ira->old_irb.current_basic_block->name_hint,
1178512870 ira->old_irb.current_basic_block->debug_id,
1178612871 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->name_hint,
1178712872 ira->old_irb.exec->basic_block_list.at(ira->old_bb_index)->debug_id,
11788 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->debug_id,
12873 ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index)->base.debug_id,
1178912874 ira->old_bb_index, ira->instruction_index);
1179012875 }
1179112876 suspend_pos->basic_block_index = ira->old_bb_index;
......@@ -11800,13 +12885,13 @@ static IrInstruction *ira_suspend(IrAnalyze *ira, IrInstruction *old_instruction
1180012885 assert(ira->old_irb.current_basic_block == next_bb);
1180112886 ira->instruction_index = 0;
1180212887 ira->const_predecessor_bb = nullptr;
11803 next_bb->other = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
11804 ira->new_irb.current_basic_block = next_bb->other;
12888 next_bb->child = ir_get_new_bb_runtime(ira, next_bb, old_instruction);
12889 ira->new_irb.current_basic_block = next_bb->child;
1180512890 }
1180612891 return ira->codegen->unreach_instruction;
1180712892}
1180812893
11809static IrInstruction *ira_resume(IrAnalyze *ira) {
12894static IrInstGen *ira_resume(IrAnalyze *ira) {
1181012895 IrSuspendPosition pos = ira->resume_stack.pop();
1181112896 if (ira->codegen->verbose_ir) {
1181212897 fprintf(stderr, "resume (%zu,%zu) ", pos.basic_block_index, pos.instruction_index);
......@@ -11819,12 +12904,12 @@ static IrInstruction *ira_resume(IrAnalyze *ira) {
1181912904 ira->instruction_index = pos.instruction_index;
1182012905 assert(pos.instruction_index < ira->old_irb.current_basic_block->instruction_list.length);
1182112906 if (ira->codegen->verbose_ir) {
11822 fprintf(stderr, "%s_%zu #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
12907 fprintf(stderr, "%s_%" PRIu32 " #%" PRIu32 "\n", ira->old_irb.current_basic_block->name_hint,
1182312908 ira->old_irb.current_basic_block->debug_id,
11824 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->debug_id);
12909 ira->old_irb.current_basic_block->instruction_list.at(pos.instruction_index)->base.debug_id);
1182512910 }
1182612911 ira->const_predecessor_bb = nullptr;
11827 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->other;
12912 ira->new_irb.current_basic_block = ira->old_irb.current_basic_block->child;
1182812913 assert(ira->new_irb.current_basic_block != nullptr);
1182912914 return ira->codegen->unreach_instruction;
1183012915}
......@@ -11835,8 +12920,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1183512920 bool need_repeat = true;
1183612921 for (;;) {
1183712922 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
11838 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
11839 if (old_bb->other == nullptr && old_bb->suspend_instruction_ref == nullptr) {
12923 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(ira->old_bb_index);
12924 if (old_bb->child == nullptr && old_bb->suspend_instruction_ref == nullptr) {
1184012925 ira->old_bb_index += 1;
1184112926 continue;
1184212927 }
......@@ -11844,8 +12929,8 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1184412929 // if it's a suspended block,
1184512930 // then skip it
1184612931 if (old_bb->suspended ||
11847 (old_bb->other != nullptr && old_bb->other->instruction_list.length != 0) ||
11848 (old_bb->other != nullptr && old_bb->other->already_appended))
12932 (old_bb->child != nullptr && old_bb->child->instruction_list.length != 0) ||
12933 (old_bb->child != nullptr && old_bb->child->already_appended))
1184912934 {
1185012935 ira->old_bb_index += 1;
1185112936 continue;
......@@ -11859,10 +12944,10 @@ static void ir_start_next_bb(IrAnalyze *ira) {
1185912944 return;
1186012945 }
1186112946
11862 if (old_bb->other == nullptr) {
11863 old_bb->other = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
12947 if (old_bb->child == nullptr) {
12948 old_bb->child = ir_get_new_bb_runtime(ira, old_bb, old_bb->suspend_instruction_ref);
1186412949 }
11865 ira->new_irb.current_basic_block = old_bb->other;
12950 ira->new_irb.current_basic_block = old_bb->child;
1186612951 ir_start_bb(ira, old_bb, nullptr);
1186712952 return;
1186812953 }
......@@ -11882,16 +12967,16 @@ static void ir_finish_bb(IrAnalyze *ira) {
1188212967 if (!ira->new_irb.current_basic_block->already_appended) {
1188312968 ira->new_irb.current_basic_block->already_appended = true;
1188412969 if (ira->codegen->verbose_ir) {
11885 fprintf(stderr, "append new bb %s_%zu\n", ira->new_irb.current_basic_block->name_hint,
12970 fprintf(stderr, "append new bb %s_%" PRIu32 "\n", ira->new_irb.current_basic_block->name_hint,
1188612971 ira->new_irb.current_basic_block->debug_id);
1188712972 }
1188812973 ira->new_irb.exec->basic_block_list.append(ira->new_irb.current_basic_block);
1188912974 }
1189012975 ira->instruction_index += 1;
1189112976 while (ira->instruction_index < ira->old_irb.current_basic_block->instruction_list.length) {
11892 IrInstruction *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
12977 IrInstSrc *next_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
1189312978 if (!next_instruction->is_gen) {
11894 ir_add_error(ira, next_instruction, buf_sprintf("unreachable code"));
12979 ir_add_error(ira, &next_instruction->base, buf_sprintf("unreachable code"));
1189512980 break;
1189612981 }
1189712982 ira->instruction_index += 1;
......@@ -11900,7 +12985,7 @@ static void ir_finish_bb(IrAnalyze *ira) {
1190012985 ir_start_next_bb(ira);
1190112986}
1190212987
11903static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
12988static IrInstGen *ir_unreach_error(IrAnalyze *ira) {
1190412989 ira->old_bb_index = SIZE_MAX;
1190512990 if (ira->new_irb.exec->first_err_trace_msg == nullptr) {
1190612991 ira->new_irb.exec->first_err_trace_msg = ira->codegen->trace_err;
......@@ -11908,7 +12993,7 @@ static IrInstruction *ir_unreach_error(IrAnalyze *ira) {
1190812993 return ira->codegen->unreach_instruction;
1190912994}
1191012995
11911static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instruction) {
12996static bool ir_emit_backward_branch(IrAnalyze *ira, IrInst* source_instruction) {
1191212997 size_t *bbc = ira->new_irb.exec->backward_branch_count;
1191312998 size_t *quota = ira->new_irb.exec->backward_branch_quota;
1191412999
......@@ -11927,66 +13012,82 @@ static bool ir_emit_backward_branch(IrAnalyze *ira, IrInstruction *source_instru
1192713012 return true;
1192813013}
1192913014
11930static IrInstruction *ir_inline_bb(IrAnalyze *ira, IrInstruction *source_instruction, IrBasicBlock *old_bb) {
13015static IrInstGen *ir_inline_bb(IrAnalyze *ira, IrInst* source_instruction, IrBasicBlockSrc *old_bb) {
1193113016 if (old_bb->debug_id <= ira->old_irb.current_basic_block->debug_id) {
1193213017 if (!ir_emit_backward_branch(ira, source_instruction))
1193313018 return ir_unreach_error(ira);
1193413019 }
1193513020
11936 old_bb->other = ira->old_irb.current_basic_block->other;
13021 old_bb->child = ira->old_irb.current_basic_block->child;
1193713022 ir_start_bb(ira, old_bb, ira->old_irb.current_basic_block);
1193813023 return ira->codegen->unreach_instruction;
1193913024}
1194013025
11941static IrInstruction *ir_finish_anal(IrAnalyze *ira, IrInstruction *instruction) {
13026static IrInstGen *ir_finish_anal(IrAnalyze *ira, IrInstGen *instruction) {
1194213027 if (instruction->value->type->id == ZigTypeIdUnreachable)
1194313028 ir_finish_bb(ira);
1194413029 return instruction;
1194513030}
1194613031
11947static IrInstruction *ir_const_type(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
11948 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
13032static IrInstGen *ir_const_fn(IrAnalyze *ira, IrInst *source_instr, ZigFn *fn_entry) {
13033 IrInstGen *result = ir_const(ira, source_instr, fn_entry->type_entry);
13034 result->value->special = ConstValSpecialStatic;
13035 result->value->data.x_ptr.data.fn.fn_entry = fn_entry;
13036 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
13037 result->value->data.x_ptr.special = ConstPtrSpecialFunction;
13038 return result;
13039}
13040
13041static IrInstGen *ir_const_bound_fn(IrAnalyze *ira, IrInst *src_inst, ZigFn *fn_entry, IrInstGen *first_arg) {
13042 IrInstGen *result = ir_const(ira, src_inst, get_bound_fn_type(ira->codegen, fn_entry));
13043 result->value->data.x_bound_fn.fn = fn_entry;
13044 result->value->data.x_bound_fn.first_arg = first_arg;
13045 return result;
13046}
13047
13048static IrInstGen *ir_const_type(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
13049 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_type);
1194913050 result->value->data.x_type = ty;
1195013051 return result;
1195113052}
1195213053
11953static IrInstruction *ir_const_bool(IrAnalyze *ira, IrInstruction *source_instruction, bool value) {
11954 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
13054static IrInstGen *ir_const_bool(IrAnalyze *ira, IrInst *source_instruction, bool value) {
13055 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_bool);
1195513056 result->value->data.x_bool = value;
1195613057 return result;
1195713058}
1195813059
11959static IrInstruction *ir_const_undef(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *ty) {
11960 IrInstruction *result = ir_const(ira, source_instruction, ty);
13060static IrInstGen *ir_const_undef(IrAnalyze *ira, IrInst *source_instruction, ZigType *ty) {
13061 IrInstGen *result = ir_const(ira, source_instruction, ty);
1196113062 result->value->special = ConstValSpecialUndef;
1196213063 return result;
1196313064}
1196413065
11965static IrInstruction *ir_const_unreachable(IrAnalyze *ira, IrInstruction *source_instruction) {
11966 IrInstruction *result = ir_const_noval(ira, source_instruction);
13066static IrInstGen *ir_const_unreachable(IrAnalyze *ira, IrInst *source_instruction) {
13067 IrInstGen *result = ir_const_noval(ira, source_instruction);
1196713068 result->value = ira->codegen->intern.for_unreachable();
1196813069 return result;
1196913070}
1197013071
11971static IrInstruction *ir_const_void(IrAnalyze *ira, IrInstruction *source_instruction) {
11972 IrInstruction *result = ir_const_noval(ira, source_instruction);
13072static IrInstGen *ir_const_void(IrAnalyze *ira, IrInst *source_instruction) {
13073 IrInstGen *result = ir_const_noval(ira, source_instruction);
1197313074 result->value = ira->codegen->intern.for_void();
1197413075 return result;
1197513076}
1197613077
11977static IrInstruction *ir_const_unsigned(IrAnalyze *ira, IrInstruction *source_instruction, uint64_t value) {
11978 IrInstruction *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
13078static IrInstGen *ir_const_unsigned(IrAnalyze *ira, IrInst *source_instruction, uint64_t value) {
13079 IrInstGen *result = ir_const(ira, source_instruction, ira->codegen->builtin_types.entry_num_lit_int);
1197913080 bigint_init_unsigned(&result->value->data.x_bigint, value);
1198013081 return result;
1198113082}
1198213083
11983static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instruction,
13084static IrInstGen *ir_get_const_ptr(IrAnalyze *ira, IrInst *instruction,
1198413085 ZigValue *pointee, ZigType *pointee_type,
1198513086 ConstPtrMut ptr_mut, bool ptr_is_const, bool ptr_is_volatile, uint32_t ptr_align)
1198613087{
1198713088 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, pointee_type,
1198813089 ptr_is_const, ptr_is_volatile, PtrLenSingle, ptr_align, 0, 0, false);
11989 IrInstruction *const_instr = ir_const(ira, instruction, ptr_type);
13090 IrInstGen *const_instr = ir_const(ira, instruction, ptr_type);
1199013091 ZigValue *const_val = const_instr->value;
1199113092 const_val->data.x_ptr.special = ConstPtrSpecialRef;
1199213093 const_val->data.x_ptr.mut = ptr_mut;
......@@ -11994,7 +13095,7 @@ static IrInstruction *ir_get_const_ptr(IrAnalyze *ira, IrInstruction *instructio
1199413095 return const_instr;
1199513096}
1199613097
11997static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
13098static Error ir_resolve_const_val(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1199813099 ZigValue *val, UndefAllowed undef_allowed)
1199913100{
1200013101 Error err;
......@@ -12006,14 +13107,14 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
1200613107 if (!type_has_bits(val->type))
1200713108 return ErrorNone;
1200813109
12009 exec_add_error_node(codegen, exec, source_node,
13110 exec_add_error_node_gen(codegen, exec, source_node,
1201013111 buf_sprintf("unable to evaluate constant expression"));
1201113112 return ErrorSemanticAnalyzeFail;
1201213113 case ConstValSpecialUndef:
1201313114 if (undef_allowed == UndefOk || undef_allowed == LazyOk)
1201413115 return ErrorNone;
1201513116
12016 exec_add_error_node(codegen, exec, source_node,
13117 exec_add_error_node_gen(codegen, exec, source_node,
1201713118 buf_sprintf("use of undefined value here causes undefined behavior"));
1201813119 return ErrorSemanticAnalyzeFail;
1201913120 case ConstValSpecialLazy:
......@@ -12028,9 +13129,9 @@ static Error ir_resolve_const_val(CodeGen *codegen, IrExecutable *exec, AstNode
1202813129 }
1202913130}
1203013131
12031static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAllowed undef_allowed) {
13132static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstGen *value, UndefAllowed undef_allowed) {
1203213133 Error err;
12033 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->source_node,
13134 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, value->base.source_node,
1203413135 value->value, undef_allowed)))
1203513136 {
1203613137 return nullptr;
......@@ -12041,7 +13142,7 @@ static ZigValue *ir_resolve_const(IrAnalyze *ira, IrInstruction *value, UndefAll
1204113142Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1204213143 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
1204313144 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
12044 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
13145 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef_allowed)
1204513146{
1204613147 Error err;
1204713148
......@@ -12050,7 +13151,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1205013151 if (type_is_invalid(return_ptr->type))
1205113152 return ErrorSemanticAnalyzeFail;
1205213153
12053 IrExecutable *ir_executable = allocate<IrExecutable>(1, "IrExecutablePass1");
13154 IrExecutableSrc *ir_executable = allocate<IrExecutableSrc>(1, "IrExecutableSrc");
1205413155 ir_executable->source_node = source_node;
1205513156 ir_executable->parent_exec = parent_exec;
1205613157 ir_executable->name = exec_name;
......@@ -12071,10 +13172,10 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1207113172 fprintf(stderr, "\nSource: ");
1207213173 ast_render(stderr, node, 4);
1207313174 fprintf(stderr, "\n{ // (IR)\n");
12074 ir_print(codegen, stderr, ir_executable, 2, IrPassSrc);
13175 ir_print_src(codegen, stderr, ir_executable, 2);
1207513176 fprintf(stderr, "}\n");
1207613177 }
12077 IrExecutable *analyzed_executable = allocate<IrExecutable>(1, "IrExecutablePass2");
13178 IrExecutableGen *analyzed_executable = allocate<IrExecutableGen>(1, "IrExecutableGen");
1207813179 analyzed_executable->source_node = source_node;
1207913180 analyzed_executable->parent_exec = parent_exec;
1208013181 analyzed_executable->source_exec = ir_executable;
......@@ -12093,7 +13194,7 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1209313194
1209413195 if (codegen->verbose_ir) {
1209513196 fprintf(stderr, "{ // (analyzed)\n");
12096 ir_print(codegen, stderr, analyzed_executable, 2, IrPassGen);
13197 ir_print_gen(codegen, stderr, analyzed_executable, 2);
1209713198 fprintf(stderr, "}\n");
1209813199 }
1209913200
......@@ -12109,12 +13210,12 @@ Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
1210913210 return ErrorNone;
1211013211}
1211113212
12112static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_value) {
13213static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstGen *err_value) {
1211313214 if (type_is_invalid(err_value->value->type))
1211413215 return nullptr;
1211513216
1211613217 if (err_value->value->type->id != ZigTypeIdErrorSet) {
12117 ir_add_error(ira, err_value,
13218 ir_add_error_node(ira, err_value->base.source_node,
1211813219 buf_sprintf("expected error, found '%s'", buf_ptr(&err_value->value->type->name)));
1211913220 return nullptr;
1212013221 }
......@@ -12127,7 +13228,7 @@ static ErrorTableEntry *ir_resolve_error(IrAnalyze *ira, IrInstruction *err_valu
1212713228 return const_val->data.x_err_set;
1212813229}
1212913230
12130static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
13231static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1213113232 ZigValue *val)
1213213233{
1213313234 Error err;
......@@ -12138,18 +13239,18 @@ static ZigType *ir_resolve_const_type(CodeGen *codegen, IrExecutable *exec, AstN
1213813239 return val->data.x_type;
1213913240}
1214013241
12141static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value) {
13242static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstGen *type_value) {
1214213243 if (type_is_invalid(type_value->value->type))
1214313244 return nullptr;
1214413245
1214513246 if (type_value->value->type->id != ZigTypeIdMetaType) {
12146 ir_add_error(ira, type_value,
13247 ir_add_error_node(ira, type_value->base.source_node,
1214713248 buf_sprintf("expected type 'type', found '%s'", buf_ptr(&type_value->value->type->name)));
1214813249 return nullptr;
1214913250 }
1215013251
1215113252 Error err;
12152 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->source_node,
13253 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, type_value->base.source_node,
1215313254 type_value->value, LazyOk)))
1215413255 {
1215513256 return nullptr;
......@@ -12158,17 +13259,17 @@ static ZigValue *ir_resolve_type_lazy(IrAnalyze *ira, IrInstruction *type_value)
1215813259 return type_value->value;
1215913260}
1216013261
12161static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {
13262static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstGen *type_value) {
1216213263 ZigValue *val = ir_resolve_type_lazy(ira, type_value);
1216313264 if (val == nullptr)
1216413265 return ira->codegen->builtin_types.entry_invalid;
1216513266
12166 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);
13267 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->base.source_node, val);
1216713268}
1216813269
12169static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {
13270static Error ir_validate_vector_elem_type(IrAnalyze *ira, AstNode *source_node, ZigType *elem_type) {
1217013271 if (!is_valid_vector_elem_type(elem_type)) {
12171 ir_add_error(ira, source_instr,
13272 ir_add_error_node(ira, source_node,
1217213273 buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
1217313274 buf_ptr(&elem_type->name)));
1217413275 return ErrorSemanticAnalyzeFail;
......@@ -12176,28 +13277,28 @@ static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_
1217613277 return ErrorNone;
1217713278}
1217813279
12179static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {
13280static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstGen *elem_type_value) {
1218013281 Error err;
1218113282 ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
1218213283 if (type_is_invalid(elem_type))
1218313284 return ira->codegen->builtin_types.entry_invalid;
12184 if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))
13285 if ((err = ir_validate_vector_elem_type(ira, elem_type_value->base.source_node, elem_type)))
1218513286 return ira->codegen->builtin_types.entry_invalid;
1218613287 return elem_type;
1218713288}
1218813289
12189static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
13290static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstGen *type_value) {
1219013291 ZigType *ty = ir_resolve_type(ira, type_value);
1219113292 if (type_is_invalid(ty))
1219213293 return ira->codegen->builtin_types.entry_invalid;
1219313294
1219413295 if (ty->id != ZigTypeIdInt) {
12195 ErrorMsg *msg = ir_add_error(ira, type_value,
13296 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1219613297 buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));
1219713298 if (ty->id == ZigTypeIdVector &&
1219813299 ty->data.vector.elem_type->id == ZigTypeIdInt)
1219913300 {
12200 add_error_note(ira->codegen, msg, type_value->source_node,
13301 add_error_note(ira->codegen, msg, type_value->base.source_node,
1220113302 buf_sprintf("represent vectors with their element types, i.e. '%s'",
1220213303 buf_ptr(&ty->data.vector.elem_type->name)));
1220313304 }
......@@ -12207,12 +13308,12 @@ static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
1220713308 return ty;
1220813309}
1220913310
12210static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_source, IrInstruction *type_value) {
13311static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInst *op_source, IrInstGen *type_value) {
1221113312 if (type_is_invalid(type_value->value->type))
1221213313 return ira->codegen->builtin_types.entry_invalid;
1221313314
1221413315 if (type_value->value->type->id != ZigTypeIdMetaType) {
12215 ErrorMsg *msg = ir_add_error(ira, type_value,
13316 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1221613317 buf_sprintf("expected error set type, found '%s'", buf_ptr(&type_value->value->type->name)));
1221713318 add_error_note(ira->codegen, msg, op_source->source_node,
1221813319 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
......@@ -12226,7 +13327,7 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
1222613327 assert(const_val->data.x_type != nullptr);
1222713328 ZigType *result_type = const_val->data.x_type;
1222813329 if (result_type->id != ZigTypeIdErrorSet) {
12229 ErrorMsg *msg = ir_add_error(ira, type_value,
13330 ErrorMsg *msg = ir_add_error_node(ira, type_value->base.source_node,
1223013331 buf_sprintf("expected error set type, found type '%s'", buf_ptr(&result_type->name)));
1223113332 add_error_note(ira->codegen, msg, op_source->source_node,
1223213333 buf_sprintf("`||` merges error sets; `or` performs boolean OR"));
......@@ -12235,15 +13336,12 @@ static ZigType *ir_resolve_error_set_type(IrAnalyze *ira, IrInstruction *op_sour
1223513336 return result_type;
1223613337}
1223713338
12238static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
12239 if (fn_value == ira->codegen->invalid_instruction)
12240 return nullptr;
12241
13339static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstGen *fn_value) {
1224213340 if (type_is_invalid(fn_value->value->type))
1224313341 return nullptr;
1224413342
1224513343 if (fn_value->value->type->id != ZigTypeIdFn) {
12246 ir_add_error_node(ira, fn_value->source_node,
13344 ir_add_error_node(ira, fn_value->base.source_node,
1224713345 buf_sprintf("expected function type, found '%s'", buf_ptr(&fn_value->value->type->name)));
1224813346 return nullptr;
1224913347 }
......@@ -12259,22 +13357,22 @@ static ZigFn *ir_resolve_fn(IrAnalyze *ira, IrInstruction *fn_value) {
1225913357 return const_val->data.x_ptr.data.fn.fn_entry;
1226013358}
1226113359
12262static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
12263 ZigType *wanted_type, ResultLoc *result_loc)
13360static IrInstGen *ir_analyze_optional_wrap(IrAnalyze *ira, IrInst* source_instr,
13361 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
1226413362{
1226513363 assert(wanted_type->id == ZigTypeIdOptional);
1226613364
1226713365 if (instr_is_comptime(value)) {
1226813366 ZigType *payload_type = wanted_type->data.maybe.child_type;
12269 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
13367 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
1227013368 if (type_is_invalid(casted_payload->value->type))
12271 return ira->codegen->invalid_instruction;
13369 return ira->codegen->invalid_inst_gen;
1227213370
1227313371 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
1227413372 if (!val)
12275 return ira->codegen->invalid_instruction;
13373 return ira->codegen->invalid_inst_gen;
1227613374
12277 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13375 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1227813376 source_instr->scope, source_instr->source_node);
1227913377 const_instruction->base.value->special = ConstValSpecialStatic;
1228013378 if (types_have_same_zig_comptime_repr(ira->codegen, wanted_type, payload_type)) {
......@@ -12289,40 +13387,42 @@ static IrInstruction *ir_analyze_optional_wrap(IrAnalyze *ira, IrInstruction *so
1228913387 if (result_loc == nullptr && handle_is_ptr(wanted_type)) {
1229013388 result_loc = no_result_loc();
1229113389 }
12292 IrInstruction *result_loc_inst = nullptr;
13390 IrInstGen *result_loc_inst = nullptr;
1229313391 if (result_loc != nullptr) {
1229413392 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12295 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13393 if (type_is_invalid(result_loc_inst->value->type) ||
13394 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13395 {
1229613396 return result_loc_inst;
1229713397 }
1229813398 }
12299 IrInstruction *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
13399 IrInstGen *result = ir_build_optional_wrap(ira, source_instr, wanted_type, value, result_loc_inst);
1230013400 result->value->data.rh_maybe = RuntimeHintOptionalNonNull;
1230113401 return result;
1230213402}
1230313403
12304static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction *source_instr,
12305 IrInstruction *value, ZigType *wanted_type, ResultLoc *result_loc)
13404static IrInstGen *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInst* source_instr,
13405 IrInstGen *value, ZigType *wanted_type, ResultLoc *result_loc)
1230613406{
1230713407 assert(wanted_type->id == ZigTypeIdErrorUnion);
1230813408
1230913409 ZigType *payload_type = wanted_type->data.error_union.payload_type;
1231013410 ZigType *err_set_type = wanted_type->data.error_union.err_set_type;
1231113411 if (instr_is_comptime(value)) {
12312 IrInstruction *casted_payload = ir_implicit_cast(ira, value, payload_type);
13412 IrInstGen *casted_payload = ir_implicit_cast(ira, value, payload_type);
1231313413 if (type_is_invalid(casted_payload->value->type))
12314 return ira->codegen->invalid_instruction;
13414 return ira->codegen->invalid_inst_gen;
1231513415
1231613416 ZigValue *val = ir_resolve_const(ira, casted_payload, UndefOk);
1231713417 if (val == nullptr)
12318 return ira->codegen->invalid_instruction;
13418 return ira->codegen->invalid_inst_gen;
1231913419
1232013420 ZigValue *err_set_val = create_const_vals(1);
1232113421 err_set_val->type = err_set_type;
1232213422 err_set_val->special = ConstValSpecialStatic;
1232313423 err_set_val->data.x_err_set = nullptr;
1232413424
12325 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13425 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1232613426 source_instr->scope, source_instr->source_node);
1232713427 const_instruction->base.value->type = wanted_type;
1232813428 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12331,23 +13431,24 @@ static IrInstruction *ir_analyze_err_wrap_payload(IrAnalyze *ira, IrInstruction
1233113431 return &const_instruction->base;
1233213432 }
1233313433
12334 IrInstruction *result_loc_inst;
13434 IrInstGen *result_loc_inst;
1233513435 if (handle_is_ptr(wanted_type)) {
1233613436 if (result_loc == nullptr) result_loc = no_result_loc();
1233713437 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12338 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13438 if (type_is_invalid(result_loc_inst->value->type) ||
13439 result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1233913440 return result_loc_inst;
1234013441 }
1234113442 } else {
1234213443 result_loc_inst = nullptr;
1234313444 }
1234413445
12345 IrInstruction *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
13446 IrInstGen *result = ir_build_err_wrap_payload(ira, source_instr, wanted_type, value, result_loc_inst);
1234613447 result->value->data.rh_error_union = RuntimeHintErrorUnionNonError;
1234713448 return result;
1234813449}
1234913450
12350static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
13451static IrInstGen *ir_analyze_err_set_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1235113452 ZigType *wanted_type)
1235213453{
1235313454 assert(value->value->type->id == ZigTypeIdErrorSet);
......@@ -12356,10 +13457,10 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1235613457 if (instr_is_comptime(value)) {
1235713458 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1235813459 if (!val)
12359 return ira->codegen->invalid_instruction;
13460 return ira->codegen->invalid_inst_gen;
1236013461
1236113462 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12362 return ira->codegen->invalid_instruction;
13463 return ira->codegen->invalid_inst_gen;
1236313464 }
1236413465 if (!type_is_global_error_set(wanted_type)) {
1236513466 bool subset = false;
......@@ -12373,11 +13474,11 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1237313474 ir_add_error(ira, source_instr,
1237413475 buf_sprintf("error.%s not a member of error set '%s'",
1237513476 buf_ptr(&val->data.x_err_set->name), buf_ptr(&wanted_type->name)));
12376 return ira->codegen->invalid_instruction;
13477 return ira->codegen->invalid_inst_gen;
1237713478 }
1237813479 }
1237913480
12380 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13481 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1238113482 source_instr->scope, source_instr->source_node);
1238213483 const_instruction->base.value->type = wanted_type;
1238313484 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12385,18 +13486,16 @@ static IrInstruction *ir_analyze_err_set_cast(IrAnalyze *ira, IrInstruction *sou
1238513486 return &const_instruction->base;
1238613487 }
1238713488
12388 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node, wanted_type, value, CastOpErrSet);
12389 result->value->type = wanted_type;
12390 return result;
13489 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpErrSet);
1239113490}
1239213491
12393static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
12394 IrInstruction *frame_ptr, ZigType *wanted_type)
13492static IrInstGen *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
13493 IrInstGen *frame_ptr, ZigType *wanted_type)
1239513494{
1239613495 if (instr_is_comptime(frame_ptr)) {
1239713496 ZigValue *ptr_val = ir_resolve_const(ira, frame_ptr, UndefBad);
1239813497 if (ptr_val == nullptr)
12399 return ira->codegen->invalid_instruction;
13498 return ira->codegen->invalid_inst_gen;
1240013499
1240113500 ir_assert(ptr_val->type->id == ZigTypeIdPointer, source_instr);
1240213501 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
......@@ -12404,44 +13503,38 @@ static IrInstruction *ir_analyze_frame_ptr_to_anyframe(IrAnalyze *ira, IrInstruc
1240413503 }
1240513504 }
1240613505
12407 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
12408 wanted_type, frame_ptr, CastOpBitCast);
12409 result->value->type = wanted_type;
12410 return result;
13506 return ir_build_cast(ira, source_instr, wanted_type, frame_ptr, CastOpBitCast);
1241113507}
1241213508
12413static IrInstruction *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInstruction *source_instr,
12414 IrInstruction *value, ZigType *wanted_type)
13509static IrInstGen *ir_analyze_anyframe_to_anyframe(IrAnalyze *ira, IrInst* source_instr,
13510 IrInstGen *value, ZigType *wanted_type)
1241513511{
1241613512 if (instr_is_comptime(value)) {
1241713513 zig_panic("TODO comptime anyframe->T to anyframe");
1241813514 }
1241913515
12420 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope, source_instr->source_node,
12421 wanted_type, value, CastOpBitCast);
12422 result->value->type = wanted_type;
12423 return result;
13516 return ir_build_cast(ira, source_instr, wanted_type, value, CastOpBitCast);
1242413517}
1242513518
1242613519
12427static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
13520static IrInstGen *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1242813521 ZigType *wanted_type, ResultLoc *result_loc)
1242913522{
1243013523 assert(wanted_type->id == ZigTypeIdErrorUnion);
1243113524
12432 IrInstruction *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
13525 IrInstGen *casted_value = ir_implicit_cast(ira, value, wanted_type->data.error_union.err_set_type);
1243313526
1243413527 if (instr_is_comptime(casted_value)) {
1243513528 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
1243613529 if (!val)
12437 return ira->codegen->invalid_instruction;
13530 return ira->codegen->invalid_inst_gen;
1243813531
1243913532 ZigValue *err_set_val = create_const_vals(1);
1244013533 err_set_val->special = ConstValSpecialStatic;
1244113534 err_set_val->type = wanted_type->data.error_union.err_set_type;
1244213535 err_set_val->data.x_err_set = val->data.x_err_set;
1244313536
12444 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
13537 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1244513538 source_instr->scope, source_instr->source_node);
1244613539 const_instruction->base.value->type = wanted_type;
1244713540 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -12450,11 +13543,13 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
1245013543 return &const_instruction->base;
1245113544 }
1245213545
12453 IrInstruction *result_loc_inst;
13546 IrInstGen *result_loc_inst;
1245413547 if (handle_is_ptr(wanted_type)) {
1245513548 if (result_loc == nullptr) result_loc = no_result_loc();
1245613549 result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, wanted_type, nullptr, true, true);
12457 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
13550 if (type_is_invalid(result_loc_inst->value->type) ||
13551 result_loc_inst->value->type->id == ZigTypeIdUnreachable)
13552 {
1245813553 return result_loc_inst;
1245913554 }
1246013555 } else {
......@@ -12462,19 +13557,19 @@ static IrInstruction *ir_analyze_err_wrap_code(IrAnalyze *ira, IrInstruction *so
1246213557 }
1246313558
1246413559
12465 IrInstruction *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
13560 IrInstGen *result = ir_build_err_wrap_code(ira, source_instr, wanted_type, value, result_loc_inst);
1246613561 result->value->data.rh_error_union = RuntimeHintErrorUnionError;
1246713562 return result;
1246813563}
1246913564
12470static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value, ZigType *wanted_type) {
13565static IrInstGen *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInst *source_instr, IrInstGen *value, ZigType *wanted_type) {
1247113566 assert(wanted_type->id == ZigTypeIdOptional);
1247213567 assert(instr_is_comptime(value));
1247313568
1247413569 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1247513570 assert(val != nullptr);
1247613571
12477 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13572 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1247813573 result->value->special = ConstValSpecialStatic;
1247913574 if (get_codegen_ptr_type(wanted_type) != nullptr) {
1248013575 result->value->data.x_ptr.special = ConstPtrSpecialNull;
......@@ -12486,8 +13581,8 @@ static IrInstruction *ir_analyze_null_to_maybe(IrAnalyze *ira, IrInstruction *so
1248613581 return result;
1248713582}
1248813583
12489static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction *source_instr,
12490 IrInstruction *value, ZigType *wanted_type)
13584static IrInstGen *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInst *source_instr,
13585 IrInstGen *value, ZigType *wanted_type)
1249113586{
1249213587 assert(wanted_type->id == ZigTypeIdPointer);
1249313588 assert(wanted_type->data.pointer.ptr_len == PtrLenC);
......@@ -12496,24 +13591,24 @@ static IrInstruction *ir_analyze_null_to_c_pointer(IrAnalyze *ira, IrInstruction
1249613591 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
1249713592 assert(val != nullptr);
1249813593
12499 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13594 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1250013595 result->value->data.x_ptr.special = ConstPtrSpecialNull;
1250113596 result->value->data.x_ptr.mut = ConstPtrMutComptimeConst;
1250213597 return result;
1250313598}
1250413599
12505static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *value,
13600static IrInstGen *ir_get_ref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *value,
1250613601 bool is_const, bool is_volatile)
1250713602{
1250813603 Error err;
1250913604
1251013605 if (type_is_invalid(value->value->type))
12511 return ira->codegen->invalid_instruction;
13606 return ira->codegen->invalid_inst_gen;
1251213607
1251313608 if (instr_is_comptime(value)) {
1251413609 ZigValue *val = ir_resolve_const(ira, value, LazyOk);
1251513610 if (!val)
12516 return ira->codegen->invalid_instruction;
13611 return ira->codegen->invalid_inst_gen;
1251713612 return ir_get_const_ptr(ira, source_instruction, val, value->value->type,
1251813613 ConstPtrMutComptimeConst, is_const, is_volatile, 0);
1251913614 }
......@@ -12522,9 +13617,9 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
1252213617 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
1252313618
1252413619 if ((err = type_resolve(ira->codegen, ptr_type, ResolveStatusZeroBitsKnown)))
12525 return ira->codegen->invalid_instruction;
13620 return ira->codegen->invalid_inst_gen;
1252613621
12527 IrInstruction *result_loc;
13622 IrInstGen *result_loc;
1252813623 if (type_has_bits(ptr_type) && !handle_is_ptr(value->value->type)) {
1252913624 result_loc = ir_resolve_result(ira, source_instruction, no_result_loc(), value->value->type,
1253013625 nullptr, true, true);
......@@ -12532,12 +13627,12 @@ static IrInstruction *ir_get_ref(IrAnalyze *ira, IrInstruction *source_instructi
1253213627 result_loc = nullptr;
1253313628 }
1253413629
12535 IrInstruction *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
13630 IrInstGen *new_instruction = ir_build_ref_gen(ira, source_instruction, ptr_type, value, result_loc);
1253613631 new_instruction->value->data.rh_ptr = RuntimeHintPtrStack;
1253713632 return new_instruction;
1253813633}
1253913634
12540static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *union_type) {
13635static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, AstNode *source_node, ZigType *union_type) {
1254113636 assert(union_type->id == ZigTypeIdUnion);
1254213637
1254313638 Error err;
......@@ -12549,36 +13644,36 @@ static ZigType *ir_resolve_union_tag_type(IrAnalyze *ira, IrInstruction *source_
1254913644 assert(union_type->data.unionation.tag_type != nullptr);
1255013645 return union_type->data.unionation.tag_type;
1255113646 } else {
12552 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union '%s' has no tag",
13647 ErrorMsg *msg = ir_add_error_node(ira, source_node, buf_sprintf("union '%s' has no tag",
1255313648 buf_ptr(&union_type->name)));
1255413649 add_error_note(ira->codegen, msg, decl_node, buf_sprintf("consider 'union(enum)' here"));
1255513650 return ira->codegen->builtin_types.entry_invalid;
1255613651 }
1255713652}
1255813653
12559static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target) {
13654static IrInstGen *ir_analyze_enum_to_int(IrAnalyze *ira, IrInst *source_instr, IrInstGen *target) {
1256013655 Error err;
1256113656
12562 IrInstruction *enum_target;
13657 IrInstGen *enum_target;
1256313658 ZigType *enum_type;
1256413659 if (target->value->type->id == ZigTypeIdUnion) {
12565 enum_type = ir_resolve_union_tag_type(ira, target, target->value->type);
13660 enum_type = ir_resolve_union_tag_type(ira, target->base.source_node, target->value->type);
1256613661 if (type_is_invalid(enum_type))
12567 return ira->codegen->invalid_instruction;
13662 return ira->codegen->invalid_inst_gen;
1256813663 enum_target = ir_implicit_cast(ira, target, enum_type);
1256913664 if (type_is_invalid(enum_target->value->type))
12570 return ira->codegen->invalid_instruction;
13665 return ira->codegen->invalid_inst_gen;
1257113666 } else if (target->value->type->id == ZigTypeIdEnum) {
1257213667 enum_target = target;
1257313668 enum_type = target->value->type;
1257413669 } else {
12575 ir_add_error(ira, target,
13670 ir_add_error_node(ira, target->base.source_node,
1257613671 buf_sprintf("expected enum, found type '%s'", buf_ptr(&target->value->type->name)));
12577 return ira->codegen->invalid_instruction;
13672 return ira->codegen->invalid_inst_gen;
1257813673 }
1257913674
1258013675 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
12581 return ira->codegen->invalid_instruction;
13676 return ira->codegen->invalid_inst_gen;
1258213677
1258313678 ZigType *tag_type = enum_type->data.enumeration.tag_int_type;
1258413679 assert(tag_type->id == ZigTypeIdInt || tag_type->id == ZigTypeIdComptimeInt);
......@@ -12587,7 +13682,7 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
1258713682 if (enum_type->data.enumeration.layout == ContainerLayoutAuto &&
1258813683 enum_type->data.enumeration.src_field_count == 1)
1258913684 {
12590 IrInstruction *result = ir_const(ira, source_instr, tag_type);
13685 IrInstGen *result = ir_const(ira, source_instr, tag_type);
1259113686 init_const_bigint(result->value, tag_type,
1259213687 &enum_type->data.enumeration.fields[0].value);
1259313688 return result;
......@@ -12596,20 +13691,17 @@ static IrInstruction *ir_analyze_enum_to_int(IrAnalyze *ira, IrInstruction *sour
1259613691 if (instr_is_comptime(enum_target)) {
1259713692 ZigValue *val = ir_resolve_const(ira, enum_target, UndefBad);
1259813693 if (!val)
12599 return ira->codegen->invalid_instruction;
12600 IrInstruction *result = ir_const(ira, source_instr, tag_type);
13694 return ira->codegen->invalid_inst_gen;
13695 IrInstGen *result = ir_const(ira, source_instr, tag_type);
1260113696 init_const_bigint(result->value, tag_type, &val->data.x_enum_tag);
1260213697 return result;
1260313698 }
1260413699
12605 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
12606 source_instr->source_node, enum_target);
12607 result->value->type = tag_type;
12608 return result;
13700 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, enum_target, tag_type);
1260913701}
1261013702
12611static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *source_instr,
12612 IrInstruction *target, ZigType *wanted_type)
13703static IrInstGen *ir_analyze_union_to_tag(IrAnalyze *ira, IrInst* source_instr,
13704 IrInstGen *target, ZigType *wanted_type)
1261313705{
1261413706 assert(target->value->type->id == ZigTypeIdUnion);
1261513707 assert(wanted_type->id == ZigTypeIdEnum);
......@@ -12618,8 +13710,8 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1261813710 if (instr_is_comptime(target)) {
1261913711 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1262013712 if (!val)
12621 return ira->codegen->invalid_instruction;
12622 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13713 return ira->codegen->invalid_inst_gen;
13714 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1262313715 result->value->special = ConstValSpecialStatic;
1262413716 result->value->type = wanted_type;
1262513717 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_union.tag);
......@@ -12630,7 +13722,7 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1263013722 if (wanted_type->data.enumeration.layout == ContainerLayoutAuto &&
1263113723 wanted_type->data.enumeration.src_field_count == 1)
1263213724 {
12633 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13725 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1263413726 result->value->special = ConstValSpecialStatic;
1263513727 result->value->type = wanted_type;
1263613728 TypeEnumField *enum_field = target->value->type->data.unionation.fields[0].enum_field;
......@@ -12638,48 +13730,45 @@ static IrInstruction *ir_analyze_union_to_tag(IrAnalyze *ira, IrInstruction *sou
1263813730 return result;
1263913731 }
1264013732
12641 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope,
12642 source_instr->source_node, target);
12643 result->value->type = wanted_type;
12644 return result;
13733 return ir_build_union_tag(ira, source_instr, target, wanted_type);
1264513734}
1264613735
12647static IrInstruction *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInstruction *source_instr,
12648 IrInstruction *target, ZigType *wanted_type)
13736static IrInstGen *ir_analyze_undefined_to_anything(IrAnalyze *ira, IrInst* source_instr,
13737 IrInstGen *target, ZigType *wanted_type)
1264913738{
12650 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13739 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1265113740 result->value->special = ConstValSpecialUndef;
1265213741 return result;
1265313742}
1265413743
12655static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *source_instr,
12656 IrInstruction *uncasted_target, ZigType *wanted_type)
13744static IrInstGen *ir_analyze_enum_to_union(IrAnalyze *ira, IrInst* source_instr,
13745 IrInstGen *uncasted_target, ZigType *wanted_type)
1265713746{
1265813747 Error err;
1265913748 assert(wanted_type->id == ZigTypeIdUnion);
1266013749
1266113750 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusZeroBitsKnown)))
12662 return ira->codegen->invalid_instruction;
13751 return ira->codegen->invalid_inst_gen;
1266313752
12664 IrInstruction *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
13753 IrInstGen *target = ir_implicit_cast(ira, uncasted_target, wanted_type->data.unionation.tag_type);
1266513754 if (type_is_invalid(target->value->type))
12666 return ira->codegen->invalid_instruction;
13755 return ira->codegen->invalid_inst_gen;
1266713756
1266813757 if (instr_is_comptime(target)) {
1266913758 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1267013759 if (!val)
12671 return ira->codegen->invalid_instruction;
13760 return ira->codegen->invalid_inst_gen;
1267213761 TypeUnionField *union_field = find_union_field_by_tag(wanted_type, &val->data.x_enum_tag);
1267313762 assert(union_field != nullptr);
1267413763 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
1267513764 if (field_type == nullptr)
12676 return ira->codegen->invalid_instruction;
13765 return ira->codegen->invalid_inst_gen;
1267713766 if ((err = type_resolve(ira->codegen, field_type, ResolveStatusZeroBitsKnown)))
12678 return ira->codegen->invalid_instruction;
13767 return ira->codegen->invalid_inst_gen;
1267913768
1268013769 switch (type_has_one_possible_value(ira->codegen, field_type)) {
1268113770 case OnePossibleValueInvalid:
12682 return ira->codegen->invalid_instruction;
13771 return ira->codegen->invalid_inst_gen;
1268313772 case OnePossibleValueNo: {
1268413773 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(
1268513774 union_field->enum_field->decl_index);
......@@ -12690,13 +13779,13 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1269013779 buf_ptr(union_field->name)));
1269113780 add_error_note(ira->codegen, msg, field_node,
1269213781 buf_sprintf("field '%s' declared here", buf_ptr(union_field->name)));
12693 return ira->codegen->invalid_instruction;
13782 return ira->codegen->invalid_inst_gen;
1269413783 }
1269513784 case OnePossibleValueYes:
1269613785 break;
1269713786 }
1269813787
12699 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13788 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1270013789 result->value->special = ConstValSpecialStatic;
1270113790 result->value->type = wanted_type;
1270213791 bigint_init_bigint(&result->value->data.x_union.tag, &val->data.x_enum_tag);
......@@ -12709,9 +13798,7 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1270913798 // if the union has all fields 0 bits, we can do it
1271013799 // and in fact it's a noop cast because the union value is just the enum value
1271113800 if (wanted_type->data.unionation.gen_field_count == 0) {
12712 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, wanted_type, target, CastOpNoop);
12713 result->value->type = wanted_type;
12714 return result;
13801 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpNoop);
1271513802 }
1271613803
1271713804 ErrorMsg *msg = ir_add_error(ira, source_instr,
......@@ -12721,10 +13808,10 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1272113808 TypeUnionField *union_field = &wanted_type->data.unionation.fields[i];
1272213809 ZigType *field_type = resolve_union_field_type(ira->codegen, union_field);
1272313810 if (field_type == nullptr)
12724 return ira->codegen->invalid_instruction;
13811 return ira->codegen->invalid_inst_gen;
1272513812 bool has_bits;
1272613813 if ((err = type_has_bits2(ira->codegen, field_type, &has_bits)))
12727 return ira->codegen->invalid_instruction;
13814 return ira->codegen->invalid_inst_gen;
1272813815 if (has_bits) {
1272913816 AstNode *field_node = wanted_type->data.unionation.decl_node->data.container_decl.fields.at(i);
1273013817 add_error_note(ira->codegen, msg, field_node,
......@@ -12733,23 +13820,23 @@ static IrInstruction *ir_analyze_enum_to_union(IrAnalyze *ira, IrInstruction *so
1273313820 buf_ptr(&field_type->name)));
1273413821 }
1273513822 }
12736 return ira->codegen->invalid_instruction;
13823 return ira->codegen->invalid_inst_gen;
1273713824}
1273813825
12739static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction *source_instr,
12740 IrInstruction *target, ZigType *wanted_type)
13826static IrInstGen *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInst* source_instr,
13827 IrInstGen *target, ZigType *wanted_type)
1274113828{
1274213829 assert(wanted_type->id == ZigTypeIdInt || wanted_type->id == ZigTypeIdFloat);
1274313830
1274413831 if (instr_is_comptime(target)) {
1274513832 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1274613833 if (!val)
12747 return ira->codegen->invalid_instruction;
13834 return ira->codegen->invalid_inst_gen;
1274813835 if (wanted_type->id == ZigTypeIdInt) {
1274913836 if (bigint_cmp_zero(&val->data.x_bigint) == CmpLT && !wanted_type->data.integral.is_signed) {
1275013837 ir_add_error(ira, source_instr,
1275113838 buf_sprintf("attempt to cast negative value to unsigned integer"));
12752 return ira->codegen->invalid_instruction;
13839 return ira->codegen->invalid_inst_gen;
1275313840 }
1275413841 if (!bigint_fits_in_bits(&val->data.x_bigint, wanted_type->data.integral.bit_count,
1275513842 wanted_type->data.integral.is_signed))
......@@ -12757,10 +13844,10 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
1275713844 ir_add_error(ira, source_instr,
1275813845 buf_sprintf("cast from '%s' to '%s' truncates bits",
1275913846 buf_ptr(&target->value->type->name), buf_ptr(&wanted_type->name)));
12760 return ira->codegen->invalid_instruction;
13847 return ira->codegen->invalid_inst_gen;
1276113848 }
1276213849 }
12763 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13850 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1276413851 result->value->type = wanted_type;
1276513852 if (wanted_type->id == ZigTypeIdInt) {
1276613853 bigint_init_bigint(&result->value->data.x_bigint, &val->data.x_bigint);
......@@ -12777,19 +13864,16 @@ static IrInstruction *ir_analyze_widen_or_shorten(IrAnalyze *ira, IrInstruction
1277713864 assert(wanted_type->id == ZigTypeIdInt);
1277813865 assert(type_has_bits(target->value->type));
1277913866 ir_build_assert_zero(ira, source_instr, target);
12780 IrInstruction *result = ir_const_unsigned(ira, source_instr, 0);
13867 IrInstGen *result = ir_const_unsigned(ira, source_instr, 0);
1278113868 result->value->type = wanted_type;
1278213869 return result;
1278313870 }
1278413871
12785 IrInstruction *result = ir_build_widen_or_shorten(&ira->new_irb, source_instr->scope,
12786 source_instr->source_node, target);
12787 result->value->type = wanted_type;
12788 return result;
13872 return ir_build_widen_or_shorten(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1278913873}
1279013874
12791static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *source_instr,
12792 IrInstruction *target, ZigType *wanted_type)
13875static IrInstGen *ir_analyze_int_to_enum(IrAnalyze *ira, IrInst* source_instr,
13876 IrInstGen *target, ZigType *wanted_type)
1279313877{
1279413878 Error err;
1279513879 assert(wanted_type->id == ZigTypeIdEnum);
......@@ -12797,14 +13881,14 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1279713881 ZigType *actual_type = target->value->type;
1279813882
1279913883 if ((err = type_resolve(ira->codegen, wanted_type, ResolveStatusSizeKnown)))
12800 return ira->codegen->invalid_instruction;
13884 return ira->codegen->invalid_inst_gen;
1280113885
1280213886 if (actual_type != wanted_type->data.enumeration.tag_int_type) {
1280313887 ir_add_error(ira, source_instr,
1280413888 buf_sprintf("integer to enum cast from '%s' instead of its tag type, '%s'",
1280513889 buf_ptr(&actual_type->name),
1280613890 buf_ptr(&wanted_type->data.enumeration.tag_int_type->name)));
12807 return ira->codegen->invalid_instruction;
13891 return ira->codegen->invalid_inst_gen;
1280813892 }
1280913893
1281013894 assert(actual_type->id == ZigTypeIdInt || actual_type->id == ZigTypeIdComptimeInt);
......@@ -12812,10 +13896,10 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1281213896 if (instr_is_comptime(target)) {
1281313897 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1281413898 if (!val)
12815 return ira->codegen->invalid_instruction;
13899 return ira->codegen->invalid_inst_gen;
1281613900
1281713901 TypeEnumField *field = find_enum_field_by_tag(wanted_type, &val->data.x_bigint);
12818 if (field == nullptr && wanted_type->data.enumeration.layout != ContainerLayoutExtern) {
13902 if (field == nullptr && !wanted_type->data.enumeration.non_exhaustive) {
1281913903 Buf *val_buf = buf_alloc();
1282013904 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
1282113905 ErrorMsg *msg = ir_add_error(ira, source_instr,
......@@ -12823,28 +13907,25 @@ static IrInstruction *ir_analyze_int_to_enum(IrAnalyze *ira, IrInstruction *sour
1282313907 buf_ptr(&wanted_type->name), buf_ptr(val_buf)));
1282413908 add_error_note(ira->codegen, msg, wanted_type->data.enumeration.decl_node,
1282513909 buf_sprintf("'%s' declared here", buf_ptr(&wanted_type->name)));
12826 return ira->codegen->invalid_instruction;
13910 return ira->codegen->invalid_inst_gen;
1282713911 }
1282813912
12829 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13913 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1283013914 bigint_init_bigint(&result->value->data.x_enum_tag, &val->data.x_bigint);
1283113915 return result;
1283213916 }
1283313917
12834 IrInstruction *result = ir_build_int_to_enum(&ira->new_irb, source_instr->scope,
12835 source_instr->source_node, nullptr, target);
12836 result->value->type = wanted_type;
12837 return result;
13918 return ir_build_int_to_enum_gen(ira, source_instr->scope, source_instr->source_node, wanted_type, target);
1283813919}
1283913920
12840static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction *source_instr,
12841 IrInstruction *target, ZigType *wanted_type)
13921static IrInstGen *ir_analyze_number_to_literal(IrAnalyze *ira, IrInst* source_instr,
13922 IrInstGen *target, ZigType *wanted_type)
1284213923{
1284313924 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1284413925 if (!val)
12845 return ira->codegen->invalid_instruction;
13926 return ira->codegen->invalid_inst_gen;
1284613927
12847 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13928 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1284813929 if (wanted_type->id == ZigTypeIdComptimeFloat) {
1284913930 float_init_float(result->value, val);
1285013931 } else if (wanted_type->id == ZigTypeIdComptimeInt) {
......@@ -12855,7 +13936,7 @@ static IrInstruction *ir_analyze_number_to_literal(IrAnalyze *ira, IrInstruction
1285513936 return result;
1285613937}
1285713938
12858static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
13939static IrInstGen *ir_analyze_int_to_err(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1285913940 ZigType *wanted_type)
1286013941{
1286113942 assert(target->value->type->id == ZigTypeIdInt);
......@@ -12865,12 +13946,12 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1286513946 if (instr_is_comptime(target)) {
1286613947 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1286713948 if (!val)
12868 return ira->codegen->invalid_instruction;
13949 return ira->codegen->invalid_inst_gen;
1286913950
12870 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
13951 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1287113952
1287213953 if (!resolve_inferred_error_set(ira->codegen, wanted_type, source_instr->source_node)) {
12873 return ira->codegen->invalid_instruction;
13954 return ira->codegen->invalid_inst_gen;
1287413955 }
1287513956
1287613957 if (type_is_global_error_set(wanted_type)) {
......@@ -12882,7 +13963,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1288213963 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
1288313964 ir_add_error(ira, source_instr,
1288413965 buf_sprintf("integer value %s represents no error", buf_ptr(val_buf)));
12885 return ira->codegen->invalid_instruction;
13966 return ira->codegen->invalid_inst_gen;
1288613967 }
1288713968
1288813969 size_t index = bigint_as_usize(&val->data.x_bigint);
......@@ -12906,7 +13987,7 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1290613987 bigint_append_buf(val_buf, &val->data.x_bigint, 10);
1290713988 ir_add_error(ira, source_instr,
1290813989 buf_sprintf("integer value %s represents no error in '%s'", buf_ptr(val_buf), buf_ptr(&wanted_type->name)));
12909 return ira->codegen->invalid_instruction;
13990 return ira->codegen->invalid_inst_gen;
1291013991 }
1291113992
1291213993 result->value->data.x_err_set = err;
......@@ -12914,12 +13995,10 @@ static IrInstruction *ir_analyze_int_to_err(IrAnalyze *ira, IrInstruction *sourc
1291413995 }
1291513996 }
1291613997
12917 IrInstruction *result = ir_build_int_to_err(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
12918 result->value->type = wanted_type;
12919 return result;
13998 return ir_build_int_to_err_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1292013999}
1292114000
12922static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
14001static IrInstGen *ir_analyze_err_to_int(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1292314002 ZigType *wanted_type)
1292414003{
1292514004 assert(wanted_type->id == ZigTypeIdInt);
......@@ -12929,9 +14008,9 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1292914008 if (instr_is_comptime(target)) {
1293014009 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1293114010 if (!val)
12932 return ira->codegen->invalid_instruction;
14011 return ira->codegen->invalid_inst_gen;
1293314012
12934 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14013 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1293514014
1293614015 ErrorTableEntry *err;
1293714016 if (err_type->id == ZigTypeIdErrorUnion) {
......@@ -12951,7 +14030,7 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1295114030 ir_add_error_node(ira, source_instr->source_node,
1295214031 buf_sprintf("error code '%s' does not fit in '%s'",
1295314032 buf_ptr(&err->name), buf_ptr(&wanted_type->name)));
12954 return ira->codegen->invalid_instruction;
14033 return ira->codegen->invalid_inst_gen;
1295514034 }
1295614035
1295714036 return result;
......@@ -12967,14 +14046,14 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1296714046 }
1296814047 if (!type_is_global_error_set(err_set_type)) {
1296914048 if (!resolve_inferred_error_set(ira->codegen, err_set_type, source_instr->source_node)) {
12970 return ira->codegen->invalid_instruction;
14049 return ira->codegen->invalid_inst_gen;
1297114050 }
1297214051 if (err_set_type->data.error_set.err_count == 0) {
12973 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14052 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1297414053 bigint_init_unsigned(&result->value->data.x_bigint, 0);
1297514054 return result;
1297614055 } else if (err_set_type->data.error_set.err_count == 1) {
12977 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14056 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1297814057 ErrorTableEntry *err = err_set_type->data.error_set.errors[0];
1297914058 bigint_init_unsigned(&result->value->data.x_bigint, err->value);
1298014059 return result;
......@@ -12986,21 +14065,19 @@ static IrInstruction *ir_analyze_err_to_int(IrAnalyze *ira, IrInstruction *sourc
1298614065 if (!bigint_fits_in_bits(&bn, wanted_type->data.integral.bit_count, wanted_type->data.integral.is_signed)) {
1298714066 ir_add_error_node(ira, source_instr->source_node,
1298814067 buf_sprintf("too many error values to fit in '%s'", buf_ptr(&wanted_type->name)));
12989 return ira->codegen->invalid_instruction;
14068 return ira->codegen->invalid_inst_gen;
1299014069 }
1299114070
12992 IrInstruction *result = ir_build_err_to_int(&ira->new_irb, source_instr->scope, source_instr->source_node, target);
12993 result->value->type = wanted_type;
12994 return result;
14071 return ir_build_err_to_int_gen(ira, source_instr->scope, source_instr->source_node, target, wanted_type);
1299514072}
1299614073
12997static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
14074static IrInstGen *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
1299814075 ZigType *wanted_type)
1299914076{
1300014077 assert(wanted_type->id == ZigTypeIdPointer);
1300114078 Error err;
1300214079 if ((err = type_resolve(ira->codegen, target->value->type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13003 return ira->codegen->invalid_instruction;
14080 return ira->codegen->invalid_inst_gen;
1300414081 assert((wanted_type->data.pointer.is_const && target->value->type->data.pointer.is_const) || !target->value->type->data.pointer.is_const);
1300514082 wanted_type = adjust_ptr_align(ira->codegen, wanted_type, get_ptr_align(ira->codegen, target->value->type));
1300614083 ZigType *array_type = wanted_type->data.pointer.child_type;
......@@ -13010,12 +14087,12 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1301014087 if (instr_is_comptime(target)) {
1301114088 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
1301214089 if (!val)
13013 return ira->codegen->invalid_instruction;
14090 return ira->codegen->invalid_inst_gen;
1301414091
1301514092 assert(val->type->id == ZigTypeIdPointer);
1301614093 ZigValue *pointee = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
1301714094 if (pointee == nullptr)
13018 return ira->codegen->invalid_instruction;
14095 return ira->codegen->invalid_inst_gen;
1301914096 if (pointee->special != ConstValSpecialRuntime) {
1302014097 ZigValue *array_val = create_const_vals(1);
1302114098 array_val->special = ConstValSpecialStatic;
......@@ -13025,7 +14102,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1302514102 array_val->parent.id = ConstParentIdScalar;
1302614103 array_val->parent.data.p_scalar.scalar_val = pointee;
1302714104
13028 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
14105 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
1302914106 source_instr->scope, source_instr->source_node);
1303014107 const_instruction->base.value->type = wanted_type;
1303114108 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -13037,10 +14114,7 @@ static IrInstruction *ir_analyze_ptr_to_array(IrAnalyze *ira, IrInstruction *sou
1303714114 }
1303814115
1303914116 // pointer to array and pointer to single item are represented the same way at runtime
13040 IrInstruction *result = ir_build_cast(&ira->new_irb, target->scope, target->source_node,
13041 wanted_type, target, CastOpBitCast);
13042 result->value->type = wanted_type;
13043 return result;
14117 return ir_build_cast(ira, &target->base, wanted_type, target, CastOpBitCast);
1304414118}
1304514119
1304614120static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCastOnly *cast_result,
......@@ -13228,12 +14302,12 @@ static void report_recursive_error(IrAnalyze *ira, AstNode *source_node, ConstCa
1322814302 }
1322914303}
1323014304
13231static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *source_instr,
13232 IrInstruction *array, ZigType *vector_type)
14305static IrInstGen *ir_analyze_array_to_vector(IrAnalyze *ira, IrInst* source_instr,
14306 IrInstGen *array, ZigType *vector_type)
1323314307{
1323414308 if (instr_is_comptime(array)) {
1323514309 // arrays and vectors have the same ZigValue representation
13236 IrInstruction *result = ir_const(ira, source_instr, vector_type);
14310 IrInstGen *result = ir_const(ira, source_instr, vector_type);
1323714311 copy_const_val(result->value, array->value);
1323814312 result->value->type = vector_type;
1323914313 return result;
......@@ -13241,12 +14315,12 @@ static IrInstruction *ir_analyze_array_to_vector(IrAnalyze *ira, IrInstruction *
1324114315 return ir_build_array_to_vector(ira, source_instr, array, vector_type);
1324214316}
1324314317
13244static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *source_instr,
13245 IrInstruction *vector, ZigType *array_type, ResultLoc *result_loc)
14318static IrInstGen *ir_analyze_vector_to_array(IrAnalyze *ira, IrInst* source_instr,
14319 IrInstGen *vector, ZigType *array_type, ResultLoc *result_loc)
1324614320{
1324714321 if (instr_is_comptime(vector)) {
1324814322 // arrays and vectors have the same ZigValue representation
13249 IrInstruction *result = ir_const(ira, source_instr, array_type);
14323 IrInstGen *result = ir_const(ira, source_instr, array_type);
1325014324 copy_const_val(result->value, vector->value);
1325114325 result->value->type = array_type;
1325214326 return result;
......@@ -13254,18 +14328,17 @@ static IrInstruction *ir_analyze_vector_to_array(IrAnalyze *ira, IrInstruction *
1325414328 if (result_loc == nullptr) {
1325514329 result_loc = no_result_loc();
1325614330 }
13257 IrInstruction *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr,
13258 true, true);
13259 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
14331 IrInstGen *result_loc_inst = ir_resolve_result(ira, source_instr, result_loc, array_type, nullptr, true, true);
14332 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1326014333 return result_loc_inst;
1326114334 }
1326214335 return ir_build_vector_to_array(ira, source_instr, array_type, vector, result_loc_inst);
1326314336}
1326414337
13265static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *source_instr,
13266 IrInstruction *integer, ZigType *dest_type)
14338static IrInstGen *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInst* source_instr,
14339 IrInstGen *integer, ZigType *dest_type)
1326714340{
13268 IrInstruction *unsigned_integer;
14341 IrInstGen *unsigned_integer;
1326914342 if (instr_is_comptime(integer)) {
1327014343 unsigned_integer = integer;
1327114344 } else {
......@@ -13278,7 +14351,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
1327814351 buf_sprintf("integer type '%s' too big for implicit @intToPtr to type '%s'",
1327914352 buf_ptr(&integer->value->type->name),
1328014353 buf_ptr(&dest_type->name)));
13281 return ira->codegen->invalid_instruction;
14354 return ira->codegen->invalid_inst_gen;
1328214355 }
1328314356
1328414357 if (integer->value->type->data.integral.is_signed) {
......@@ -13286,7 +14359,7 @@ static IrInstruction *ir_analyze_int_to_c_ptr(IrAnalyze *ira, IrInstruction *sou
1328614359 integer->value->type->data.integral.bit_count);
1328714360 unsigned_integer = ir_analyze_bit_cast(ira, source_instr, integer, unsigned_int_type);
1328814361 if (type_is_invalid(unsigned_integer->value->type))
13289 return ira->codegen->invalid_instruction;
14362 return ira->codegen->invalid_inst_gen;
1329014363 } else {
1329114364 unsigned_integer = integer;
1329214365 }
......@@ -13306,14 +14379,14 @@ static bool is_pointery_and_elem_is_not_pointery(ZigType *ty) {
1330614379 return false;
1330714380}
1330814381
13309static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
14382static IrInstGen *ir_analyze_enum_literal(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
1331014383 ZigType *enum_type)
1331114384{
1331214385 assert(enum_type->id == ZigTypeIdEnum);
1331314386
1331414387 Error err;
1331514388 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusZeroBitsKnown)))
13316 return ira->codegen->invalid_instruction;
14389 return ira->codegen->invalid_inst_gen;
1331714390
1331814391 TypeEnumField *field = find_enum_type_field(enum_type, value->value->data.x_enum_literal);
1331914392 if (field == nullptr) {
......@@ -13321,40 +14394,40 @@ static IrInstruction *ir_analyze_enum_literal(IrAnalyze *ira, IrInstruction *sou
1332114394 buf_ptr(&enum_type->name), buf_ptr(value->value->data.x_enum_literal)));
1332214395 add_error_note(ira->codegen, msg, enum_type->data.enumeration.decl_node,
1332314396 buf_sprintf("'%s' declared here", buf_ptr(&enum_type->name)));
13324 return ira->codegen->invalid_instruction;
14397 return ira->codegen->invalid_inst_gen;
1332514398 }
13326 IrInstruction *result = ir_const(ira, source_instr, enum_type);
14399 IrInstGen *result = ir_const(ira, source_instr, enum_type);
1332714400 bigint_init_bigint(&result->value->data.x_enum_tag, &field->value);
1332814401
1332914402 return result;
1333014403}
1333114404
13332static IrInstruction *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInstruction *source_instr,
13333 IrInstruction *value, ZigType *wanted_type)
14405static IrInstGen *ir_analyze_struct_literal_to_array(IrAnalyze *ira, IrInst* source_instr,
14406 IrInstGen *value, ZigType *wanted_type)
1333414407{
1333514408 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon list literal to array"));
13336 return ira->codegen->invalid_instruction;
14409 return ira->codegen->invalid_inst_gen;
1333714410}
1333814411
13339static IrInstruction *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInstruction *source_instr,
13340 IrInstruction *value, ZigType *wanted_type)
14412static IrInstGen *ir_analyze_struct_literal_to_struct(IrAnalyze *ira, IrInst* source_instr,
14413 IrInstGen *value, ZigType *wanted_type)
1334114414{
1334214415 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to struct"));
13343 return ira->codegen->invalid_instruction;
14416 return ira->codegen->invalid_inst_gen;
1334414417}
1334514418
13346static IrInstruction *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInstruction *source_instr,
13347 IrInstruction *value, ZigType *wanted_type)
14419static IrInstGen *ir_analyze_struct_literal_to_union(IrAnalyze *ira, IrInst* source_instr,
14420 IrInstGen *value, ZigType *wanted_type)
1334814421{
1334914422 ir_add_error(ira, source_instr, buf_sprintf("TODO: type coercion of anon struct literal to union"));
13350 return ira->codegen->invalid_instruction;
14423 return ira->codegen->invalid_inst_gen;
1335114424}
1335214425
1335314426// Add a compile error and return ErrorSemanticAnalyzeFail if the pointer alignment does not work,
1335414427// otherwise return ErrorNone. Does not emit any instructions.
1335514428// Assumes that the pointer types have element types with the same ABI alignment. Avoids resolving the
1335614429// pointer types' alignments if both of the pointer types are ABI aligned.
13357static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigType *dest_ptr_type,
14430static Error ir_cast_ptr_align(IrAnalyze *ira, IrInst* source_instr, ZigType *dest_ptr_type,
1335814431 ZigType *src_ptr_type, AstNode *src_source_node)
1335914432{
1336014433 Error err;
......@@ -13388,37 +14461,37 @@ static Error ir_cast_ptr_align(IrAnalyze *ira, IrInstruction *source_instr, ZigT
1338814461 return ErrorNone;
1338914462}
1339014463
13391static IrInstruction *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInstruction *source_instr,
13392 IrInstruction *struct_operand, TypeStructField *field)
14464static IrInstGen *ir_analyze_struct_value_field_value(IrAnalyze *ira, IrInst* source_instr,
14465 IrInstGen *struct_operand, TypeStructField *field)
1339314466{
13394 IrInstruction *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
14467 IrInstGen *struct_ptr = ir_get_ref(ira, source_instr, struct_operand, true, false);
1339514468 if (type_is_invalid(struct_ptr->value->type))
13396 return ira->codegen->invalid_instruction;
13397 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
14469 return ira->codegen->invalid_inst_gen;
14470 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, struct_ptr,
1339814471 struct_operand->value->type, false);
1339914472 if (type_is_invalid(field_ptr->value->type))
13400 return ira->codegen->invalid_instruction;
14473 return ira->codegen->invalid_inst_gen;
1340114474 return ir_get_deref(ira, source_instr, field_ptr, nullptr);
1340214475}
1340314476
13404static IrInstruction *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInstruction *source_instr,
13405 IrInstruction *optional_operand, bool safety_check_on)
14477static IrInstGen *ir_analyze_optional_value_payload_value(IrAnalyze *ira, IrInst* source_instr,
14478 IrInstGen *optional_operand, bool safety_check_on)
1340614479{
13407 IrInstruction *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
13408 IrInstruction *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
14480 IrInstGen *opt_ptr = ir_get_ref(ira, source_instr, optional_operand, true, false);
14481 IrInstGen *payload_ptr = ir_analyze_unwrap_optional_payload(ira, source_instr, opt_ptr,
1340914482 safety_check_on, false);
1341014483 return ir_get_deref(ira, source_instr, payload_ptr, nullptr);
1341114484}
1341214485
13413static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_instr,
13414 ZigType *wanted_type, IrInstruction *value)
14486static IrInstGen *ir_analyze_cast(IrAnalyze *ira, IrInst *source_instr,
14487 ZigType *wanted_type, IrInstGen *value)
1341514488{
1341614489 Error err;
1341714490 ZigType *actual_type = value->value->type;
1341814491 AstNode *source_node = source_instr->source_node;
1341914492
1342014493 if (type_is_invalid(wanted_type) || type_is_invalid(actual_type)) {
13421 return ira->codegen->invalid_instruction;
14494 return ira->codegen->invalid_inst_gen;
1342214495 }
1342314496
1342414497 // This means the wanted type is anything.
......@@ -13430,7 +14503,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1343014503 ConstCastOnly const_cast_result = types_match_const_cast_only(ira, wanted_type, actual_type,
1343114504 source_node, false);
1343214505 if (const_cast_result.id == ConstCastResultIdInvalid)
13433 return ira->codegen->invalid_instruction;
14506 return ira->codegen->invalid_inst_gen;
1343414507 if (const_cast_result.id == ConstCastResultIdOk) {
1343514508 return ir_resolve_cast(ira, source_instr, value, wanted_type, CastOpNoop);
1343614509 }
......@@ -13464,7 +14537,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1346414537 if (ir_num_lit_fits_in_other_type(ira, value, wanted_child_type, true)) {
1346514538 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
1346614539 } else {
13467 return ira->codegen->invalid_instruction;
14540 return ira->codegen->invalid_inst_gen;
1346814541 }
1346914542 } else if (
1347014543 wanted_child_type->id == ZigTypeIdPointer &&
......@@ -13474,18 +14547,18 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1347414547 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
1347514548 {
1347614549 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13477 return ira->codegen->invalid_instruction;
14550 return ira->codegen->invalid_inst_gen;
1347814551 if ((err = type_resolve(ira->codegen, wanted_child_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13479 return ira->codegen->invalid_instruction;
14552 return ira->codegen->invalid_inst_gen;
1348014553 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_child_type) &&
1348114554 types_match_const_cast_only(ira, wanted_child_type->data.pointer.child_type,
1348214555 actual_type->data.pointer.child_type->data.array.child_type, source_node,
1348314556 !wanted_child_type->data.pointer.is_const).id == ConstCastResultIdOk)
1348414557 {
13485 IrInstruction *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
14558 IrInstGen *cast1 = ir_resolve_ptr_of_array_to_unknown_len_ptr(ira, source_instr, value,
1348614559 wanted_child_type);
1348714560 if (type_is_invalid(cast1->value->type))
13488 return ira->codegen->invalid_instruction;
14561 return ira->codegen->invalid_inst_gen;
1348914562 return ir_analyze_optional_wrap(ira, source_instr, cast1, wanted_type, nullptr);
1349014563 }
1349114564 }
......@@ -13503,7 +14576,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1350314576 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type->data.error_union.payload_type, true)) {
1350414577 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
1350514578 } else {
13506 return ira->codegen->invalid_instruction;
14579 return ira->codegen->invalid_inst_gen;
1350714580 }
1350814581 }
1350914582 }
......@@ -13519,13 +14592,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1351914592 actual_type->id == ZigTypeIdComptimeInt ||
1352014593 actual_type->id == ZigTypeIdComptimeFloat)
1352114594 {
13522 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
14595 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.error_union.payload_type, value);
1352314596 if (type_is_invalid(cast1->value->type))
13524 return ira->codegen->invalid_instruction;
14597 return ira->codegen->invalid_inst_gen;
1352514598
13526 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14599 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1352714600 if (type_is_invalid(cast2->value->type))
13528 return ira->codegen->invalid_instruction;
14601 return ira->codegen->invalid_inst_gen;
1352914602
1353014603 return cast2;
1353114604 }
......@@ -13540,13 +14613,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1354014613 wanted_type->id == ZigTypeIdFloat || wanted_type->id == ZigTypeIdComptimeFloat))
1354114614 {
1354214615 if (value->value->special == ConstValSpecialUndef) {
13543 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14616 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1354414617 result->value->special = ConstValSpecialUndef;
1354514618 return result;
1354614619 }
1354714620 if (ir_num_lit_fits_in_other_type(ira, value, wanted_type, true)) {
1354814621 if (wanted_type->id == ZigTypeIdComptimeInt || wanted_type->id == ZigTypeIdInt) {
13549 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14622 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1355014623 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
1355114624 copy_const_val(result->value, value->value);
1355214625 result->value->type = wanted_type;
......@@ -13555,7 +14628,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1355514628 }
1355614629 return result;
1355714630 } else if (wanted_type->id == ZigTypeIdComptimeFloat || wanted_type->id == ZigTypeIdFloat) {
13558 IrInstruction *result = ir_const(ira, source_instr, wanted_type);
14631 IrInstGen *result = ir_const(ira, source_instr, wanted_type);
1355914632 if (actual_type->id == ZigTypeIdComptimeInt || actual_type->id == ZigTypeIdInt) {
1356014633 BigFloat bf;
1356114634 bigfloat_init_bigint(&bf, &value->value->data.x_bigint);
......@@ -13567,7 +14640,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1356714640 }
1356814641 zig_unreachable();
1356914642 } else {
13570 return ira->codegen->invalid_instruction;
14643 return ira->codegen->invalid_inst_gen;
1357114644 }
1357214645 }
1357314646
......@@ -13603,13 +14676,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1360314676 actual_type->data.pointer.ptr_len == PtrLenSingle &&
1360414677 actual_type->data.pointer.child_type->id == ZigTypeIdArray)
1360514678 {
13606 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
14679 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, wanted_type->data.maybe.child_type, value);
1360714680 if (type_is_invalid(cast1->value->type))
13608 return ira->codegen->invalid_instruction;
14681 return ira->codegen->invalid_inst_gen;
1360914682
13610 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14683 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1361114684 if (type_is_invalid(cast2->value->type))
13612 return ira->codegen->invalid_instruction;
14685 return ira->codegen->invalid_inst_gen;
1361314686
1361414687 return cast2;
1361514688 }
......@@ -13630,9 +14703,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1363014703 actual_array_type->data.array.sentinel)))
1363114704 {
1363214705 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13633 return ira->codegen->invalid_instruction;
14706 return ira->codegen->invalid_inst_gen;
1363414707 if ((err = type_resolve(ira->codegen, wanted_type->data.pointer.child_type, ResolveStatusAlignmentKnown)))
13635 return ira->codegen->invalid_instruction;
14708 return ira->codegen->invalid_inst_gen;
1363614709 if (get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, wanted_type) &&
1363714710 types_match_const_cast_only(ira, wanted_type->data.pointer.child_type,
1363814711 actual_type->data.pointer.child_type->data.array.child_type, source_node,
......@@ -13673,24 +14746,24 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1367314746 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
1367414747 ResolveStatusAlignmentKnown)))
1367514748 {
13676 return ira->codegen->invalid_instruction;
14749 return ira->codegen->invalid_inst_gen;
1367714750 }
1367814751 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
1367914752 ResolveStatusAlignmentKnown)))
1368014753 {
13681 return ira->codegen->invalid_instruction;
14754 return ira->codegen->invalid_inst_gen;
1368214755 }
1368314756 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
1368414757 }
1368514758 if (ok_align) {
1368614759 if (wanted_type->id == ZigTypeIdErrorUnion) {
13687 IrInstruction *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
14760 IrInstGen *cast1 = ir_analyze_cast(ira, source_instr, slice_type, value);
1368814761 if (type_is_invalid(cast1->value->type))
13689 return ira->codegen->invalid_instruction;
14762 return ira->codegen->invalid_inst_gen;
1369014763
13691 IrInstruction *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
14764 IrInstGen *cast2 = ir_analyze_cast(ira, source_instr, wanted_type, cast1);
1369214765 if (type_is_invalid(cast2->value->type))
13693 return ira->codegen->invalid_instruction;
14766 return ira->codegen->invalid_inst_gen;
1369414767
1369514768 return cast2;
1369614769 } else {
......@@ -13725,12 +14798,12 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1372514798 if ((err = type_resolve(ira->codegen, actual_type->data.pointer.child_type,
1372614799 ResolveStatusAlignmentKnown)))
1372714800 {
13728 return ira->codegen->invalid_instruction;
14801 return ira->codegen->invalid_inst_gen;
1372914802 }
1373014803 if ((err = type_resolve(ira->codegen, slice_ptr_type->data.pointer.child_type,
1373114804 ResolveStatusAlignmentKnown)))
1373214805 {
13733 return ira->codegen->invalid_instruction;
14806 return ira->codegen->invalid_inst_gen;
1373414807 }
1373514808 ok_align = get_ptr_align(ira->codegen, actual_type) >= get_ptr_align(ira->codegen, slice_ptr_type);
1373614809 }
......@@ -13771,7 +14844,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1377114844 }
1377214845 }
1377314846 if (ok) {
13774 IrInstruction *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
14847 IrInstGen *cast1 = ir_analyze_frame_ptr_to_anyframe(ira, source_instr, value, anyframe_type);
1377514848 if (anyframe_type == wanted_type)
1377614849 return cast1;
1377714850 return ir_analyze_cast(ira, source_instr, wanted_type, cast1);
......@@ -13826,28 +14899,28 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1382614899 if (actual_type->id == ZigTypeIdEnumLiteral &&
1382714900 (wanted_type->id == ZigTypeIdOptional && wanted_type->data.maybe.child_type->id == ZigTypeIdEnum))
1382814901 {
13829 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
13830 if (result == ira->codegen->invalid_instruction)
14902 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.maybe.child_type);
14903 if (type_is_invalid(result->value->type))
1383114904 return result;
1383214905
13833 return ir_analyze_optional_wrap(ira, result, value, wanted_type, nullptr);
14906 return ir_analyze_optional_wrap(ira, source_instr, value, wanted_type, nullptr);
1383414907 }
1383514908
1383614909 // cast from enum literal to error union when payload is an enum
1383714910 if (actual_type->id == ZigTypeIdEnumLiteral &&
1383814911 (wanted_type->id == ZigTypeIdErrorUnion && wanted_type->data.error_union.payload_type->id == ZigTypeIdEnum))
1383914912 {
13840 IrInstruction *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
13841 if (result == ira->codegen->invalid_instruction)
14913 IrInstGen *result = ir_analyze_enum_literal(ira, source_instr, value, wanted_type->data.error_union.payload_type);
14914 if (type_is_invalid(result->value->type))
1384214915 return result;
1384314916
13844 return ir_analyze_err_wrap_payload(ira, result, value, wanted_type, nullptr);
14917 return ir_analyze_err_wrap_payload(ira, source_instr, value, wanted_type, nullptr);
1384514918 }
1384614919
1384714920 // cast from union to the enum type of the union
1384814921 if (actual_type->id == ZigTypeIdUnion && wanted_type->id == ZigTypeIdEnum) {
1384914922 if ((err = type_resolve(ira->codegen, actual_type, ResolveStatusZeroBitsKnown)))
13850 return ira->codegen->invalid_instruction;
14923 return ira->codegen->invalid_inst_gen;
1385114924
1385214925 if (actual_type->data.unionation.tag_type == wanted_type) {
1385314926 return ir_analyze_union_to_tag(ira, source_instr, value, wanted_type);
......@@ -13875,8 +14948,8 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1387514948 (!actual_type->data.pointer.is_const || wanted_type->data.pointer.is_const) &&
1387614949 (!actual_type->data.pointer.is_volatile || wanted_type->data.pointer.is_volatile))
1387714950 {
13878 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->source_node)))
13879 return ira->codegen->invalid_instruction;
14951 if ((err = ir_cast_ptr_align(ira, source_instr, wanted_type, actual_type, value->base.source_node)))
14952 return ira->codegen->invalid_inst_gen;
1388014953
1388114954 return ir_analyze_ptr_to_array(ira, source_instr, value, wanted_type);
1388214955 }
......@@ -13899,7 +14972,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1389914972 slice_ptr_type->data.pointer.sentinel))))
1390014973 {
1390114974 TypeStructField *ptr_field = actual_type->data.structure.fields[slice_ptr_index];
13902 IrInstruction *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
14975 IrInstGen *slice_ptr = ir_analyze_struct_value_field_value(ira, source_instr, value, ptr_field);
1390314976 return ir_implicit_cast2(ira, source_instr, slice_ptr, wanted_type);
1390414977 }
1390514978 }
......@@ -13930,7 +15003,7 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1393015003 {
1393115004 bool has_bits;
1393215005 if ((err = type_has_bits2(ira->codegen, actual_type, &has_bits)))
13933 return ira->codegen->invalid_instruction;
15006 return ira->codegen->invalid_inst_gen;
1393415007 if (!has_bits) {
1393515008 return ir_get_ref(ira, source_instr, value, false, false);
1393615009 }
......@@ -13997,9 +15070,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1399715070
1399815071 // T to ?U, where T implicitly casts to U
1399915072 if (wanted_type->id == ZigTypeIdOptional && actual_type->id != ZigTypeIdOptional) {
14000 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
15073 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.maybe.child_type);
1400115074 if (type_is_invalid(cast1->value->type))
14002 return ira->codegen->invalid_instruction;
15075 return ira->codegen->invalid_inst_gen;
1400315076 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
1400415077 }
1400515078
......@@ -14007,9 +15080,9 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1400715080 if (wanted_type->id == ZigTypeIdErrorUnion && actual_type->id != ZigTypeIdErrorUnion &&
1400815081 actual_type->id != ZigTypeIdErrorSet)
1400915082 {
14010 IrInstruction *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
15083 IrInstGen *cast1 = ir_implicit_cast2(ira, source_instr, value, wanted_type->data.error_union.payload_type);
1401115084 if (type_is_invalid(cast1->value->type))
14012 return ira->codegen->invalid_instruction;
15085 return ira->codegen->invalid_inst_gen;
1401315086 return ir_implicit_cast2(ira, source_instr, cast1, wanted_type);
1401415087 }
1401515088
......@@ -14018,14 +15091,13 @@ static IrInstruction *ir_analyze_cast(IrAnalyze *ira, IrInstruction *source_inst
1401815091 buf_ptr(&wanted_type->name),
1401915092 buf_ptr(&actual_type->name)));
1402015093 report_recursive_error(ira, source_instr->source_node, &const_cast_result, parent_msg);
14021 return ira->codegen->invalid_instruction;
15094 return ira->codegen->invalid_inst_gen;
1402215095}
1402315096
14024static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_source_instr,
14025 IrInstruction *value, ZigType *expected_type)
15097static IrInstGen *ir_implicit_cast2(IrAnalyze *ira, IrInst *value_source_instr,
15098 IrInstGen *value, ZigType *expected_type)
1402615099{
1402715100 assert(value);
14028 assert(value != ira->codegen->invalid_instruction);
1402915101 assert(!expected_type || !type_is_invalid(expected_type));
1403015102 assert(value->value->type);
1403115103 assert(!type_is_invalid(value->value->type));
......@@ -14039,17 +15111,17 @@ static IrInstruction *ir_implicit_cast2(IrAnalyze *ira, IrInstruction *value_sou
1403915111 return ir_analyze_cast(ira, value_source_instr, expected_type, value);
1404015112}
1404115113
14042static IrInstruction *ir_implicit_cast(IrAnalyze *ira, IrInstruction *value, ZigType *expected_type) {
14043 return ir_implicit_cast2(ira, value, value, expected_type);
15114static IrInstGen *ir_implicit_cast(IrAnalyze *ira, IrInstGen *value, ZigType *expected_type) {
15115 return ir_implicit_cast2(ira, &value->base, value, expected_type);
1404415116}
1404515117
14046static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
14047 ir_assert(ptr->value->type->id == ZigTypeIdPointer, ptr);
15118static ZigType *get_ptr_elem_type(CodeGen *g, IrInstGen *ptr) {
15119 ir_assert_gen(ptr->value->type->id == ZigTypeIdPointer, ptr);
1404815120 ZigType *elem_type = ptr->value->type->data.pointer.child_type;
1404915121 if (elem_type != g->builtin_types.entry_var)
1405015122 return elem_type;
1405115123
14052 if (ir_resolve_lazy(g, ptr->source_node, ptr->value))
15124 if (ir_resolve_lazy(g, ptr->base.source_node, ptr->value))
1405315125 return g->builtin_types.entry_invalid;
1405415126
1405515127 assert(value_is_comptime(ptr->value));
......@@ -14057,28 +15129,28 @@ static ZigType *get_ptr_elem_type(CodeGen *g, IrInstruction *ptr) {
1405715129 return pointee->type;
1405815130}
1405915131
14060static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruction, IrInstruction *ptr,
15132static IrInstGen *ir_get_deref(IrAnalyze *ira, IrInst* source_instruction, IrInstGen *ptr,
1406115133 ResultLoc *result_loc)
1406215134{
1406315135 Error err;
1406415136 ZigType *ptr_type = ptr->value->type;
1406515137 if (type_is_invalid(ptr_type))
14066 return ira->codegen->invalid_instruction;
15138 return ira->codegen->invalid_inst_gen;
1406715139
1406815140 if (ptr_type->id != ZigTypeIdPointer) {
1406915141 ir_add_error_node(ira, source_instruction->source_node,
1407015142 buf_sprintf("attempt to dereference non-pointer type '%s'",
1407115143 buf_ptr(&ptr_type->name)));
14072 return ira->codegen->invalid_instruction;
15144 return ira->codegen->invalid_inst_gen;
1407315145 }
1407415146
1407515147 ZigType *child_type = ptr_type->data.pointer.child_type;
1407615148 if (type_is_invalid(child_type))
14077 return ira->codegen->invalid_instruction;
15149 return ira->codegen->invalid_inst_gen;
1407815150 // if the child type has one possible value, the deref is comptime
1407915151 switch (type_has_one_possible_value(ira->codegen, child_type)) {
1408015152 case OnePossibleValueInvalid:
14081 return ira->codegen->invalid_instruction;
15153 return ira->codegen->invalid_inst_gen;
1408215154 case OnePossibleValueYes:
1408315155 return ir_const_move(ira, source_instruction,
1408415156 get_the_one_possible_value(ira->codegen, child_type));
......@@ -14087,8 +15159,8 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1408715159 }
1408815160 if (instr_is_comptime(ptr)) {
1408915161 if (ptr->value->special == ConstValSpecialUndef) {
14090 ir_add_error(ira, ptr, buf_sprintf("attempt to dereference undefined value"));
14091 return ira->codegen->invalid_instruction;
15162 ir_add_error(ira, &ptr->base, buf_sprintf("attempt to dereference undefined value"));
15163 return ira->codegen->invalid_inst_gen;
1409215164 }
1409315165 if (ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
1409415166 ZigValue *pointee = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
......@@ -14096,12 +15168,12 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1409615168 child_type = pointee->type;
1409715169 }
1409815170 if (pointee->special != ConstValSpecialRuntime) {
14099 IrInstruction *result = ir_const(ira, source_instruction, child_type);
15171 IrInstGen *result = ir_const(ira, source_instruction, child_type);
1410015172
1410115173 if ((err = ir_read_const_ptr(ira, ira->codegen, source_instruction->source_node, result->value,
1410215174 ptr->value)))
1410315175 {
14104 return ira->codegen->invalid_instruction;
15176 return ira->codegen->invalid_inst_gen;
1410515177 }
1410615178 result->value->type = child_type;
1410715179 return result;
......@@ -14110,38 +15182,37 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1411015182 }
1411115183
1411215184 // if the instruction is a const ref instruction we can skip it
14113 if (ptr->id == IrInstructionIdRef) {
14114 IrInstructionRef *ref_inst = reinterpret_cast<IrInstructionRef *>(ptr);
14115 return ref_inst->value;
15185 if (ptr->id == IrInstGenIdRef) {
15186 IrInstGenRef *ref_inst = reinterpret_cast<IrInstGenRef *>(ptr);
15187 return ref_inst->operand;
1411615188 }
1411715189
1411815190 // If the instruction is a element pointer instruction to a vector, we emit
1411915191 // vector element extract instruction rather than load pointer. If the
1412015192 // pointer type has non-VECTOR_INDEX_RUNTIME value, it would have been
14121 // possible to implement this in the codegen for IrInstructionLoadPtrGen.
15193 // possible to implement this in the codegen for IrInstGenLoadPtr.
1412215194 // However if it has VECTOR_INDEX_RUNTIME then we must emit a compile error
1412315195 // if the vector index cannot be determined right here, right now, because
1412415196 // the type information does not contain enough information to actually
1412515197 // perform a dereference.
1412615198 if (ptr_type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
14127 if (ptr->id == IrInstructionIdElemPtr) {
14128 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
14129 IrInstruction *vector_loaded = ir_get_deref(ira, elem_ptr->array_ptr,
15199 if (ptr->id == IrInstGenIdElemPtr) {
15200 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
15201 IrInstGen *vector_loaded = ir_get_deref(ira, &elem_ptr->array_ptr->base,
1413015202 elem_ptr->array_ptr, nullptr);
14131 IrInstruction *elem_index = elem_ptr->elem_index;
15203 IrInstGen *elem_index = elem_ptr->elem_index;
1413215204 return ir_build_vector_extract_elem(ira, source_instruction, vector_loaded, elem_index);
1413315205 }
14134 ir_add_error(ira, ptr,
15206 ir_add_error(ira, &ptr->base,
1413515207 buf_sprintf("unable to determine vector element index of type '%s'", buf_ptr(&ptr_type->name)));
14136 return ira->codegen->invalid_instruction;
15208 return ira->codegen->invalid_inst_gen;
1413715209 }
1413815210
14139 IrInstruction *result_loc_inst;
15211 IrInstGen *result_loc_inst;
1414015212 if (ptr_type->data.pointer.host_int_bytes != 0 && handle_is_ptr(child_type)) {
1414115213 if (result_loc == nullptr) result_loc = no_result_loc();
14142 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr,
14143 true, true);
14144 if (type_is_invalid(result_loc_inst->value->type) || instr_is_unreachable(result_loc_inst)) {
15214 result_loc_inst = ir_resolve_result(ira, source_instruction, result_loc, child_type, nullptr, true, true);
15215 if (type_is_invalid(result_loc_inst->value->type) || result_loc_inst->value->type->id == ZigTypeIdUnreachable) {
1414515216 return result_loc_inst;
1414615217 }
1414715218 } else {
......@@ -14151,7 +15222,7 @@ static IrInstruction *ir_get_deref(IrAnalyze *ira, IrInstruction *source_instruc
1415115222 return ir_build_load_ptr_gen(ira, source_instruction, ptr, child_type, result_loc_inst);
1415215223}
1415315224
14154static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode *source_node,
15225static bool ir_resolve_const_align(CodeGen *codegen, IrExecutableGen *exec, AstNode *source_node,
1415515226 ZigValue *const_val, uint32_t *out)
1415615227{
1415715228 Error err;
......@@ -14160,12 +15231,12 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
1416015231
1416115232 uint32_t align_bytes = bigint_as_u32(&const_val->data.x_bigint);
1416215233 if (align_bytes == 0) {
14163 exec_add_error_node(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
15234 exec_add_error_node_gen(codegen, exec, source_node, buf_sprintf("alignment must be >= 1"));
1416415235 return false;
1416515236 }
1416615237
1416715238 if (!is_power_of_2(align_bytes)) {
14168 exec_add_error_node(codegen, exec, source_node,
15239 exec_add_error_node_gen(codegen, exec, source_node,
1416915240 buf_sprintf("alignment value %" PRIu32 " is not a power of 2", align_bytes));
1417015241 return false;
1417115242 }
......@@ -14174,7 +15245,7 @@ static bool ir_resolve_const_align(CodeGen *codegen, IrExecutable *exec, AstNode
1417415245 return true;
1417515246}
1417615247
14177static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem_type, uint32_t *out) {
15248static bool ir_resolve_align(IrAnalyze *ira, IrInstGen *value, ZigType *elem_type, uint32_t *out) {
1417815249 if (type_is_invalid(value->value->type))
1417915250 return false;
1418015251
......@@ -14195,19 +15266,19 @@ static bool ir_resolve_align(IrAnalyze *ira, IrInstruction *value, ZigType *elem
1419515266 }
1419615267 }
1419715268
14198 IrInstruction *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
15269 IrInstGen *casted_value = ir_implicit_cast(ira, value, get_align_amt_type(ira->codegen));
1419915270 if (type_is_invalid(casted_value->value->type))
1420015271 return false;
1420115272
14202 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->source_node,
15273 return ir_resolve_const_align(ira->codegen, ira->new_irb.exec, value->base.source_node,
1420315274 casted_value->value, out);
1420415275}
1420515276
14206static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *int_type, uint64_t *out) {
15277static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstGen *value, ZigType *int_type, uint64_t *out) {
1420715278 if (type_is_invalid(value->value->type))
1420815279 return false;
1420915280
14210 IrInstruction *casted_value = ir_implicit_cast(ira, value, int_type);
15281 IrInstGen *casted_value = ir_implicit_cast(ira, value, int_type);
1421115282 if (type_is_invalid(casted_value->value->type))
1421215283 return false;
1421315284
......@@ -14219,15 +15290,15 @@ static bool ir_resolve_unsigned(IrAnalyze *ira, IrInstruction *value, ZigType *i
1421915290 return true;
1422015291}
1422115292
14222static bool ir_resolve_usize(IrAnalyze *ira, IrInstruction *value, uint64_t *out) {
15293static bool ir_resolve_usize(IrAnalyze *ira, IrInstGen *value, uint64_t *out) {
1422315294 return ir_resolve_unsigned(ira, value, ira->codegen->builtin_types.entry_usize, out);
1422415295}
1422515296
14226static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
15297static bool ir_resolve_bool(IrAnalyze *ira, IrInstGen *value, bool *out) {
1422715298 if (type_is_invalid(value->value->type))
1422815299 return false;
1422915300
14230 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
15301 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_bool);
1423115302 if (type_is_invalid(casted_value->value->type))
1423215303 return false;
1423315304
......@@ -14239,7 +15310,7 @@ static bool ir_resolve_bool(IrAnalyze *ira, IrInstruction *value, bool *out) {
1423915310 return true;
1424015311}
1424115312
14242static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out) {
15313static bool ir_resolve_comptime(IrAnalyze *ira, IrInstGen *value, bool *out) {
1424315314 if (!value) {
1424415315 *out = false;
1424515316 return true;
......@@ -14247,13 +15318,13 @@ static bool ir_resolve_comptime(IrAnalyze *ira, IrInstruction *value, bool *out)
1424715318 return ir_resolve_bool(ira, value, out);
1424815319}
1424915320
14250static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, AtomicOrder *out) {
15321static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstGen *value, AtomicOrder *out) {
1425115322 if (type_is_invalid(value->value->type))
1425215323 return false;
1425315324
1425415325 ZigType *atomic_order_type = get_builtin_type(ira->codegen, "AtomicOrder");
1425515326
14256 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
15327 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_order_type);
1425715328 if (type_is_invalid(casted_value->value->type))
1425815329 return false;
1425915330
......@@ -14265,13 +15336,13 @@ static bool ir_resolve_atomic_order(IrAnalyze *ira, IrInstruction *value, Atomic
1426515336 return true;
1426615337}
1426715338
14268static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, AtomicRmwOp *out) {
15339static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstGen *value, AtomicRmwOp *out) {
1426915340 if (type_is_invalid(value->value->type))
1427015341 return false;
1427115342
1427215343 ZigType *atomic_rmw_op_type = get_builtin_type(ira->codegen, "AtomicRmwOp");
1427315344
14274 IrInstruction *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
15345 IrInstGen *casted_value = ir_implicit_cast(ira, value, atomic_rmw_op_type);
1427515346 if (type_is_invalid(casted_value->value->type))
1427615347 return false;
1427715348
......@@ -14283,13 +15354,13 @@ static bool ir_resolve_atomic_rmw_op(IrAnalyze *ira, IrInstruction *value, Atomi
1428315354 return true;
1428415355}
1428515356
14286static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, GlobalLinkageId *out) {
15357static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstGen *value, GlobalLinkageId *out) {
1428715358 if (type_is_invalid(value->value->type))
1428815359 return false;
1428915360
1429015361 ZigType *global_linkage_type = get_builtin_type(ira->codegen, "GlobalLinkage");
1429115362
14292 IrInstruction *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
15363 IrInstGen *casted_value = ir_implicit_cast(ira, value, global_linkage_type);
1429315364 if (type_is_invalid(casted_value->value->type))
1429415365 return false;
1429515366
......@@ -14301,13 +15372,13 @@ static bool ir_resolve_global_linkage(IrAnalyze *ira, IrInstruction *value, Glob
1430115372 return true;
1430215373}
1430315374
14304static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMode *out) {
15375static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstGen *value, FloatMode *out) {
1430515376 if (type_is_invalid(value->value->type))
1430615377 return false;
1430715378
1430815379 ZigType *float_mode_type = get_builtin_type(ira->codegen, "FloatMode");
1430915380
14310 IrInstruction *casted_value = ir_implicit_cast(ira, value, float_mode_type);
15381 IrInstGen *casted_value = ir_implicit_cast(ira, value, float_mode_type);
1431115382 if (type_is_invalid(casted_value->value->type))
1431215383 return false;
1431315384
......@@ -14319,14 +15390,14 @@ static bool ir_resolve_float_mode(IrAnalyze *ira, IrInstruction *value, FloatMod
1431915390 return true;
1432015391}
1432115392
14322static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
15393static Buf *ir_resolve_str(IrAnalyze *ira, IrInstGen *value) {
1432315394 if (type_is_invalid(value->value->type))
1432415395 return nullptr;
1432515396
1432615397 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
1432715398 true, false, PtrLenUnknown, 0, 0, 0, false);
1432815399 ZigType *str_type = get_slice_type(ira->codegen, ptr_type);
14329 IrInstruction *casted_value = ir_implicit_cast(ira, value, str_type);
15400 IrInstGen *casted_value = ir_implicit_cast(ira, value, str_type);
1433015401 if (type_is_invalid(casted_value->value->type))
1433115402 return nullptr;
1433215403
......@@ -14350,7 +15421,7 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
1435015421 size_t new_index = ptr_field->data.x_ptr.data.base_array.elem_index + i;
1435115422 ZigValue *char_val = &array_val->data.x_array.data.s_none.elements[new_index];
1435215423 if (char_val->special == ConstValSpecialUndef) {
14353 ir_add_error(ira, casted_value, buf_sprintf("use of undefined value"));
15424 ir_add_error(ira, &casted_value->base, buf_sprintf("use of undefined value"));
1435415425 return nullptr;
1435515426 }
1435615427 uint64_t big_c = bigint_as_u64(&char_val->data.x_bigint);
......@@ -14361,10 +15432,10 @@ static Buf *ir_resolve_str(IrAnalyze *ira, IrInstruction *value) {
1436115432 return result;
1436215433}
1436315434
14364static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
14365 IrInstructionAddImplicitReturnType *instruction)
15435static IrInstGen *ir_analyze_instruction_add_implicit_return_type(IrAnalyze *ira,
15436 IrInstSrcAddImplicitReturnType *instruction)
1436615437{
14367 IrInstruction *value = instruction->value->child;
15438 IrInstGen *value = instruction->value->child;
1436815439 if (type_is_invalid(value->value->type))
1436915440 return ir_unreach_error(ira);
1437015441
......@@ -14372,15 +15443,15 @@ static IrInstruction *ir_analyze_instruction_add_implicit_return_type(IrAnalyze
1437215443 ira->src_implicit_return_type_list.append(value);
1437315444 }
1437415445
14375 return ir_const_void(ira, &instruction->base);
15446 return ir_const_void(ira, &instruction->base.base);
1437615447}
1437715448
14378static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructionReturn *instruction) {
14379 IrInstruction *operand = instruction->operand->child;
15449static IrInstGen *ir_analyze_instruction_return(IrAnalyze *ira, IrInstSrcReturn *instruction) {
15450 IrInstGen *operand = instruction->operand->child;
1438015451 if (type_is_invalid(operand->value->type))
1438115452 return ir_unreach_error(ira);
1438215453
14383 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
15454 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, ira->explicit_return_type);
1438415455 if (type_is_invalid(casted_operand->value->type)) {
1438515456 AstNode *source_node = ira->explicit_return_type_source_node;
1438615457 if (source_node != nullptr) {
......@@ -14395,9 +15466,7 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
1439515466 handle_is_ptr(ira->explicit_return_type))
1439615467 {
1439715468 // result location mechanism took care of it.
14398 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
14399 instruction->base.source_node, nullptr);
14400 result->value->type = ira->codegen->builtin_types.entry_unreachable;
15469 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, nullptr);
1440115470 return ir_finish_anal(ira, result);
1440215471 }
1440315472
......@@ -14405,47 +15474,45 @@ static IrInstruction *ir_analyze_instruction_return(IrAnalyze *ira, IrInstructio
1440515474 casted_operand->value->type->id == ZigTypeIdPointer &&
1440615475 casted_operand->value->data.rh_ptr == RuntimeHintPtrStack)
1440715476 {
14408 ir_add_error(ira, casted_operand, buf_sprintf("function returns address of local variable"));
15477 ir_add_error(ira, &casted_operand->base, buf_sprintf("function returns address of local variable"));
1440915478 return ir_unreach_error(ira);
1441015479 }
1441115480
14412 IrInstruction *result = ir_build_return(&ira->new_irb, instruction->base.scope,
14413 instruction->base.source_node, casted_operand);
14414 result->value->type = ira->codegen->builtin_types.entry_unreachable;
15481 IrInstGen *result = ir_build_return_gen(ira, &instruction->base.base, casted_operand);
1441515482 return ir_finish_anal(ira, result);
1441615483}
1441715484
14418static IrInstruction *ir_analyze_instruction_const(IrAnalyze *ira, IrInstructionConst *instruction) {
14419 return ir_const_move(ira, &instruction->base, instruction->base.value);
15485static IrInstGen *ir_analyze_instruction_const(IrAnalyze *ira, IrInstSrcConst *instruction) {
15486 return ir_const_move(ira, &instruction->base.base, instruction->value);
1442015487}
1442115488
14422static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
14423 IrInstruction *op1 = bin_op_instruction->op1->child;
15489static IrInstGen *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
15490 IrInstGen *op1 = bin_op_instruction->op1->child;
1442415491 if (type_is_invalid(op1->value->type))
14425 return ira->codegen->invalid_instruction;
15492 return ira->codegen->invalid_inst_gen;
1442615493
14427 IrInstruction *op2 = bin_op_instruction->op2->child;
15494 IrInstGen *op2 = bin_op_instruction->op2->child;
1442815495 if (type_is_invalid(op2->value->type))
14429 return ira->codegen->invalid_instruction;
15496 return ira->codegen->invalid_inst_gen;
1443015497
1443115498 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
1443215499
14433 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
14434 if (casted_op1 == ira->codegen->invalid_instruction)
14435 return ira->codegen->invalid_instruction;
15500 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, bool_type);
15501 if (type_is_invalid(casted_op1->value->type))
15502 return ira->codegen->invalid_inst_gen;
1443615503
14437 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
14438 if (casted_op2 == ira->codegen->invalid_instruction)
14439 return ira->codegen->invalid_instruction;
15504 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, bool_type);
15505 if (type_is_invalid(casted_op2->value->type))
15506 return ira->codegen->invalid_inst_gen;
1444015507
1444115508 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
1444215509 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
1444315510 if (op1_val == nullptr)
14444 return ira->codegen->invalid_instruction;
15511 return ira->codegen->invalid_inst_gen;
1444515512
1444615513 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1444715514 if (op2_val == nullptr)
14448 return ira->codegen->invalid_instruction;
15515 return ira->codegen->invalid_inst_gen;
1444915516
1445015517 assert(casted_op1->value->type->id == ZigTypeIdBool);
1445115518 assert(casted_op2->value->type->id == ZigTypeIdBool);
......@@ -14457,14 +15524,11 @@ static IrInstruction *ir_analyze_bin_op_bool(IrAnalyze *ira, IrInstructionBinOp
1445715524 } else {
1445815525 zig_unreachable();
1445915526 }
14460 return ir_const_bool(ira, &bin_op_instruction->base, result_bool);
15527 return ir_const_bool(ira, &bin_op_instruction->base.base, result_bool);
1446115528 }
1446215529
14463 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
14464 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
15530 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, bool_type,
1446515531 bin_op_instruction->op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
14466 result->value->type = bool_type;
14467 return result;
1446815532}
1446915533
1447015534static bool resolve_cmp_op_id(IrBinOp op_id, Cmp cmp) {
......@@ -14529,12 +15593,13 @@ static void set_optional_payload(ZigValue *opt_val, ZigValue *payload) {
1452915593 }
1453015594}
1453115595
14532static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
14533 ZigValue *op1_val, ZigValue *op2_val, IrInstructionBinOp *bin_op_instruction, IrBinOp op_id,
14534 bool one_possible_value) {
15596static IrInstGen *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
15597 ZigValue *op1_val, ZigValue *op2_val, IrInstSrcBinOp *bin_op_instruction, IrBinOp op_id,
15598 bool one_possible_value)
15599{
1453515600 if (op1_val->special == ConstValSpecialUndef ||
1453615601 op2_val->special == ConstValSpecialUndef)
14537 return ir_const_undef(ira, &bin_op_instruction->base, resolved_type);
15602 return ir_const_undef(ira, &bin_op_instruction->base.base, resolved_type);
1453815603 if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
1453915604 if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
1454015605 op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
......@@ -14554,7 +15619,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
1455415619 cmp_result = CmpEQ;
1455515620 }
1455615621 bool answer = resolve_cmp_op_id(op_id, cmp_result);
14557 return ir_const_bool(ira, &bin_op_instruction->base, answer);
15622 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1455815623 }
1455915624 } else {
1456015625 bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
......@@ -14566,7 +15631,7 @@ static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_t
1456615631 } else {
1456715632 zig_unreachable();
1456815633 }
14569 return ir_const_bool(ira, &bin_op_instruction->base, answer);
15634 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1457015635 }
1457115636 zig_unreachable();
1457215637}
......@@ -14620,7 +15685,7 @@ static Error lazy_cmp_zero(AstNode *source_node, ZigValue *val, Cmp *result) {
1462015685 zig_unreachable();
1462115686}
1462215687
14623static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInstruction *source_instr,
15688static ErrorMsg *ir_eval_bin_op_cmp_scalar(IrAnalyze *ira, IrInst* source_instr,
1462415689 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
1462515690{
1462615691 Error err;
......@@ -14698,14 +15763,14 @@ never_mind_just_calculate_it_normally:
1469815763 return nullptr;
1469915764 }
1470015765 if (op1_val->type->id == ZigTypeIdComptimeFloat) {
14701 IrInstruction *tmp = ir_const_noval(ira, source_instr);
15766 IrInstGen *tmp = ir_const_noval(ira, source_instr);
1470215767 tmp->value = op1_val;
14703 IrInstruction *casted = ir_implicit_cast(ira, tmp, op2_val->type);
15768 IrInstGen *casted = ir_implicit_cast(ira, tmp, op2_val->type);
1470415769 op1_val = casted->value;
1470515770 } else if (op2_val->type->id == ZigTypeIdComptimeFloat) {
14706 IrInstruction *tmp = ir_const_noval(ira, source_instr);
15771 IrInstGen *tmp = ir_const_noval(ira, source_instr);
1470715772 tmp->value = op2_val;
14708 IrInstruction *casted = ir_implicit_cast(ira, tmp, op1_val->type);
15773 IrInstGen *casted = ir_implicit_cast(ira, tmp, op1_val->type);
1470915774 op2_val = casted->value;
1471015775 }
1471115776 Cmp cmp_result = float_cmp(op1_val, op2_val);
......@@ -14747,8 +15812,8 @@ never_mind_just_calculate_it_normally:
1474715812 return nullptr;
1474815813}
1474915814
14750static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstruction *source_instr,
14751 IrInstruction *op1, IrInstruction *op2, IrBinOp op_id)
15815static IrInstGen *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInst *source_instr,
15816 IrInstGen *op1, IrInstGen *op2, IrBinOp op_id)
1475215817{
1475315818 Error err;
1475415819
......@@ -14761,7 +15826,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1476115826 ir_add_error(ira, source_instr,
1476215827 buf_sprintf("vector length mismatch: %" PRIu32 " and %" PRIu32,
1476315828 op1->value->type->data.vector.len, op2->value->type->data.vector.len));
14764 return ira->codegen->invalid_instruction;
15829 return ira->codegen->invalid_inst_gen;
1476515830 }
1476615831 result_type = get_vector_type(ira->codegen, op1->value->type->data.vector.len, scalar_result_type);
1476715832 op1_scalar_type = op1->value->type->data.vector.elem_type;
......@@ -14770,13 +15835,13 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1477015835 ir_add_error(ira, source_instr,
1477115836 buf_sprintf("mixed scalar and vector operands to comparison operator: '%s' and '%s'",
1477215837 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
14773 return ira->codegen->invalid_instruction;
15838 return ira->codegen->invalid_inst_gen;
1477415839 }
1477515840
1477615841 bool opv_op1;
1477715842 switch (type_has_one_possible_value(ira->codegen, op1->value->type)) {
1477815843 case OnePossibleValueInvalid:
14779 return ira->codegen->invalid_instruction;
15844 return ira->codegen->invalid_inst_gen;
1478015845 case OnePossibleValueYes:
1478115846 opv_op1 = true;
1478215847 break;
......@@ -14787,7 +15852,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1478715852 bool opv_op2;
1478815853 switch (type_has_one_possible_value(ira->codegen, op2->value->type)) {
1478915854 case OnePossibleValueInvalid:
14790 return ira->codegen->invalid_instruction;
15855 return ira->codegen->invalid_inst_gen;
1479115856 case OnePossibleValueYes:
1479215857 opv_op2 = true;
1479315858 break;
......@@ -14798,21 +15863,21 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1479815863 Cmp op1_cmp_zero;
1479915864 bool have_op1_cmp_zero = false;
1480015865 if ((err = lazy_cmp_zero(source_instr->source_node, op1->value, &op1_cmp_zero))) {
14801 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
15866 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
1480215867 } else {
1480315868 have_op1_cmp_zero = true;
1480415869 }
1480515870 Cmp op2_cmp_zero;
1480615871 bool have_op2_cmp_zero = false;
1480715872 if ((err = lazy_cmp_zero(source_instr->source_node, op2->value, &op2_cmp_zero))) {
14808 if (err != ErrorNotLazy) return ira->codegen->invalid_instruction;
15873 if (err != ErrorNotLazy) return ira->codegen->invalid_inst_gen;
1480915874 } else {
1481015875 have_op2_cmp_zero = true;
1481115876 }
1481215877 if (((opv_op1 || instr_is_comptime(op1)) && (opv_op2 || instr_is_comptime(op2))) ||
1481315878 (have_op1_cmp_zero && have_op2_cmp_zero))
1481415879 {
14815 IrInstruction *result_instruction = ir_const(ira, source_instr, result_type);
15880 IrInstGen *result_instruction = ir_const(ira, source_instr, result_type);
1481615881 ZigValue *out_val = result_instruction->value;
1481715882 if (result_type->id == ZigTypeIdVector) {
1481815883 size_t len = result_type->data.vector.len;
......@@ -14830,7 +15895,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1483015895 if (msg != nullptr) {
1483115896 add_error_note(ira->codegen, msg, source_instr->source_node,
1483215897 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
14833 return ira->codegen->invalid_instruction;
15898 return ira->codegen->invalid_inst_gen;
1483415899 }
1483515900 }
1483615901 out_val->type = result_type;
......@@ -14839,7 +15904,7 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1483915904 if (ir_eval_bin_op_cmp_scalar(ira, source_instr, op1->value, op_id,
1484015905 op2->value, out_val) != nullptr)
1484115906 {
14842 return ira->codegen->invalid_instruction;
15907 return ira->codegen->invalid_inst_gen;
1484315908 }
1484415909 }
1484515910 return result_instruction;
......@@ -14933,10 +15998,10 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1493315998 }
1493415999 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
1493516000 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
14936 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
14937 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
16001 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
16002 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
1493816003 if (type_is_invalid(casted_op1->value->type) || type_is_invalid(casted_op2->value->type))
14939 return ira->codegen->invalid_instruction;
16004 return ira->codegen->invalid_inst_gen;
1494016005 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
1494116006 }
1494216007
......@@ -14966,12 +16031,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1496616031 if (instr_is_comptime(op1)) {
1496716032 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefOk);
1496816033 if (op1_val == nullptr)
14969 return ira->codegen->invalid_instruction;
16034 return ira->codegen->invalid_inst_gen;
1497016035 if (op1_val->special == ConstValSpecialUndef)
1497116036 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
1497216037 if (result_type->id == ZigTypeIdVector) {
14973 ir_add_error(ira, op1, buf_sprintf("compiler bug: TODO: support comptime vector here"));
14974 return ira->codegen->invalid_instruction;
16038 ir_add_error(ira, &op1->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
16039 return ira->codegen->invalid_inst_gen;
1497516040 }
1497616041 bool is_unsigned;
1497716042 if (op1_is_float) {
......@@ -15010,12 +16075,12 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1501016075 if (instr_is_comptime(op2)) {
1501116076 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefOk);
1501216077 if (op2_val == nullptr)
15013 return ira->codegen->invalid_instruction;
16078 return ira->codegen->invalid_inst_gen;
1501416079 if (op2_val->special == ConstValSpecialUndef)
1501516080 return ir_const_undef(ira, source_instr, ira->codegen->builtin_types.entry_bool);
1501616081 if (result_type->id == ZigTypeIdVector) {
15017 ir_add_error(ira, op2, buf_sprintf("compiler bug: TODO: support comptime vector here"));
15018 return ira->codegen->invalid_instruction;
16082 ir_add_error(ira, &op2->base, buf_sprintf("compiler bug: TODO: support comptime vector here"));
16083 return ira->codegen->invalid_inst_gen;
1501916084 }
1502016085 bool is_unsigned;
1502116086 if (op2_is_float) {
......@@ -15056,35 +16121,35 @@ static IrInstruction *ir_analyze_bin_op_cmp_numeric(IrAnalyze *ira, IrInstructio
1505616121 ZigType *dest_type = (result_type->id == ZigTypeIdVector) ?
1505716122 get_vector_type(ira->codegen, result_type->data.vector.len, dest_scalar_type) : dest_scalar_type;
1505816123
15059 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
16124 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
1506016125 if (type_is_invalid(casted_op1->value->type))
15061 return ira->codegen->invalid_instruction;
15062 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
16126 return ira->codegen->invalid_inst_gen;
16127 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, dest_type);
1506316128 if (type_is_invalid(casted_op2->value->type))
15064 return ira->codegen->invalid_instruction;
16129 return ira->codegen->invalid_inst_gen;
1506516130 return ir_build_bin_op_gen(ira, source_instr, result_type, op_id, casted_op1, casted_op2, true);
1506616131}
1506716132
15068static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
15069 IrInstruction *op1 = bin_op_instruction->op1->child;
16133static IrInstGen *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
16134 IrInstGen *op1 = bin_op_instruction->op1->child;
1507016135 if (type_is_invalid(op1->value->type))
15071 return ira->codegen->invalid_instruction;
16136 return ira->codegen->invalid_inst_gen;
1507216137
15073 IrInstruction *op2 = bin_op_instruction->op2->child;
16138 IrInstGen *op2 = bin_op_instruction->op2->child;
1507416139 if (type_is_invalid(op2->value->type))
15075 return ira->codegen->invalid_instruction;
16140 return ira->codegen->invalid_inst_gen;
1507616141
15077 AstNode *source_node = bin_op_instruction->base.source_node;
16142 AstNode *source_node = bin_op_instruction->base.base.source_node;
1507816143
1507916144 IrBinOp op_id = bin_op_instruction->op_id;
1508016145 bool is_equality_cmp = (op_id == IrBinOpCmpEq || op_id == IrBinOpCmpNotEq);
1508116146 if (is_equality_cmp && op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdNull) {
15082 return ir_const_bool(ira, &bin_op_instruction->base, (op_id == IrBinOpCmpEq));
16147 return ir_const_bool(ira, &bin_op_instruction->base.base, (op_id == IrBinOpCmpEq));
1508316148 } else if (is_equality_cmp &&
1508416149 ((op1->value->type->id == ZigTypeIdNull && op2->value->type->id == ZigTypeIdOptional) ||
1508516150 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdOptional)))
1508616151 {
15087 IrInstruction *maybe_op;
16152 IrInstGen *maybe_op;
1508816153 if (op1->value->type->id == ZigTypeIdNull) {
1508916154 maybe_op = op2;
1509016155 } else if (op2->value->type->id == ZigTypeIdNull) {
......@@ -15095,21 +16160,16 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1509516160 if (instr_is_comptime(maybe_op)) {
1509616161 ZigValue *maybe_val = ir_resolve_const(ira, maybe_op, UndefBad);
1509716162 if (!maybe_val)
15098 return ira->codegen->invalid_instruction;
16163 return ira->codegen->invalid_inst_gen;
1509916164 bool is_null = optional_value_is_null(maybe_val);
1510016165 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15101 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16166 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1510216167 }
1510316168
15104 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
15105 source_node, maybe_op);
15106 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
16169 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, maybe_op);
1510716170
1510816171 if (op_id == IrBinOpCmpEq) {
15109 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
15110 bin_op_instruction->base.source_node, is_non_null);
15111 result->value->type = ira->codegen->builtin_types.entry_bool;
15112 return result;
16172 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
1511316173 } else {
1511416174 return is_non_null;
1511516175 }
......@@ -15119,7 +16179,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1511916179 (op2->value->type->id == ZigTypeIdNull && op1->value->type->id == ZigTypeIdPointer &&
1512016180 op1->value->type->data.pointer.ptr_len == PtrLenC)))
1512116181 {
15122 IrInstruction *c_ptr_op;
16182 IrInstGen *c_ptr_op;
1512316183 if (op1->value->type->id == ZigTypeIdNull) {
1512416184 c_ptr_op = op2;
1512516185 } else if (op2->value->type->id == ZigTypeIdNull) {
......@@ -15130,24 +16190,19 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1513016190 if (instr_is_comptime(c_ptr_op)) {
1513116191 ZigValue *c_ptr_val = ir_resolve_const(ira, c_ptr_op, UndefOk);
1513216192 if (!c_ptr_val)
15133 return ira->codegen->invalid_instruction;
16193 return ira->codegen->invalid_inst_gen;
1513416194 if (c_ptr_val->special == ConstValSpecialUndef)
15135 return ir_const_undef(ira, &bin_op_instruction->base, ira->codegen->builtin_types.entry_bool);
16195 return ir_const_undef(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool);
1513616196 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
1513716197 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
1513816198 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
1513916199 bool bool_result = (op_id == IrBinOpCmpEq) ? is_null : !is_null;
15140 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16200 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1514116201 }
15142 IrInstruction *is_non_null = ir_build_test_nonnull(&ira->new_irb, bin_op_instruction->base.scope,
15143 source_node, c_ptr_op);
15144 is_non_null->value->type = ira->codegen->builtin_types.entry_bool;
16202 IrInstGen *is_non_null = ir_build_test_non_null_gen(ira, &bin_op_instruction->base.base, c_ptr_op);
1514516203
1514616204 if (op_id == IrBinOpCmpEq) {
15147 IrInstruction *result = ir_build_bool_not(&ira->new_irb, bin_op_instruction->base.scope,
15148 bin_op_instruction->base.source_node, is_non_null);
15149 result->value->type = ira->codegen->builtin_types.entry_bool;
15150 return result;
16205 return ir_build_bool_not_gen(ira, &bin_op_instruction->base.base, is_non_null);
1515116206 } else {
1515216207 return is_non_null;
1515316208 }
......@@ -15155,61 +16210,57 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1515516210 ZigType *non_null_type = (op1->value->type->id == ZigTypeIdNull) ? op2->value->type : op1->value->type;
1515616211 ir_add_error_node(ira, source_node, buf_sprintf("comparison of '%s' with null",
1515716212 buf_ptr(&non_null_type->name)));
15158 return ira->codegen->invalid_instruction;
16213 return ira->codegen->invalid_inst_gen;
1515916214 } else if (is_equality_cmp && (
1516016215 (op1->value->type->id == ZigTypeIdEnumLiteral && op2->value->type->id == ZigTypeIdUnion) ||
1516116216 (op2->value->type->id == ZigTypeIdEnumLiteral && op1->value->type->id == ZigTypeIdUnion)))
1516216217 {
1516316218 // Support equality comparison between a union's tag value and a enum literal
15164 IrInstruction *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
15165 IrInstruction *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
16219 IrInstGen *union_val = op1->value->type->id == ZigTypeIdUnion ? op1 : op2;
16220 IrInstGen *enum_val = op1->value->type->id == ZigTypeIdUnion ? op2 : op1;
1516616221
1516716222 ZigType *tag_type = union_val->value->type->data.unionation.tag_type;
1516816223 assert(tag_type != nullptr);
1516916224
15170 IrInstruction *casted_union = ir_implicit_cast(ira, union_val, tag_type);
16225 IrInstGen *casted_union = ir_implicit_cast(ira, union_val, tag_type);
1517116226 if (type_is_invalid(casted_union->value->type))
15172 return ira->codegen->invalid_instruction;
16227 return ira->codegen->invalid_inst_gen;
1517316228
15174 IrInstruction *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
16229 IrInstGen *casted_val = ir_implicit_cast(ira, enum_val, tag_type);
1517516230 if (type_is_invalid(casted_val->value->type))
15176 return ira->codegen->invalid_instruction;
16231 return ira->codegen->invalid_inst_gen;
1517716232
1517816233 if (instr_is_comptime(casted_union)) {
1517916234 ZigValue *const_union_val = ir_resolve_const(ira, casted_union, UndefBad);
1518016235 if (!const_union_val)
15181 return ira->codegen->invalid_instruction;
16236 return ira->codegen->invalid_inst_gen;
1518216237
1518316238 ZigValue *const_enum_val = ir_resolve_const(ira, casted_val, UndefBad);
1518416239 if (!const_enum_val)
15185 return ira->codegen->invalid_instruction;
16240 return ira->codegen->invalid_inst_gen;
1518616241
1518716242 Cmp cmp_result = bigint_cmp(&const_union_val->data.x_union.tag, &const_enum_val->data.x_enum_tag);
1518816243 bool bool_result = (op_id == IrBinOpCmpEq) ? cmp_result == CmpEQ : cmp_result != CmpEQ;
1518916244
15190 return ir_const_bool(ira, &bin_op_instruction->base, bool_result);
16245 return ir_const_bool(ira, &bin_op_instruction->base.base, bool_result);
1519116246 }
1519216247
15193 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15194 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16248 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
1519516249 op_id, casted_union, casted_val, bin_op_instruction->safety_check_on);
15196 result->value->type = ira->codegen->builtin_types.entry_bool;
15197
15198 return result;
1519916250 }
1520016251
1520116252 if (op1->value->type->id == ZigTypeIdErrorSet && op2->value->type->id == ZigTypeIdErrorSet) {
1520216253 if (!is_equality_cmp) {
1520316254 ir_add_error_node(ira, source_node, buf_sprintf("operator not allowed for errors"));
15204 return ira->codegen->invalid_instruction;
16255 return ira->codegen->invalid_inst_gen;
1520516256 }
1520616257 ZigType *intersect_type = get_error_set_intersection(ira, op1->value->type, op2->value->type, source_node);
1520716258 if (type_is_invalid(intersect_type)) {
15208 return ira->codegen->invalid_instruction;
16259 return ira->codegen->invalid_inst_gen;
1520916260 }
1521016261
1521116262 if (!resolve_inferred_error_set(ira->codegen, intersect_type, source_node)) {
15212 return ira->codegen->invalid_instruction;
16263 return ira->codegen->invalid_inst_gen;
1521316264 }
1521416265
1521516266 // exception if one of the operators has the type of the empty error set, we allow the comparison
......@@ -15226,7 +16277,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1522616277 } else {
1522716278 zig_unreachable();
1522816279 }
15229 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16280 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1523016281 }
1523116282
1523216283 if (!type_is_global_error_set(intersect_type)) {
......@@ -15234,7 +16285,7 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1523416285 ir_add_error_node(ira, source_node,
1523516286 buf_sprintf("error sets '%s' and '%s' have no common errors",
1523616287 buf_ptr(&op1->value->type->name), buf_ptr(&op2->value->type->name)));
15237 return ira->codegen->invalid_instruction;
16288 return ira->codegen->invalid_inst_gen;
1523816289 }
1523916290 if (op1->value->type->data.error_set.err_count == 1 && op2->value->type->data.error_set.err_count == 1) {
1524016291 bool are_equal = true;
......@@ -15246,17 +16297,17 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1524616297 } else {
1524716298 zig_unreachable();
1524816299 }
15249 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16300 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1525016301 }
1525116302 }
1525216303
1525316304 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1525416305 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1525516306 if (op1_val == nullptr)
15256 return ira->codegen->invalid_instruction;
16307 return ira->codegen->invalid_inst_gen;
1525716308 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1525816309 if (op2_val == nullptr)
15259 return ira->codegen->invalid_instruction;
16310 return ira->codegen->invalid_inst_gen;
1526016311
1526116312 bool answer;
1526216313 bool are_equal = op1_val->data.x_err_set->value == op2_val->data.x_err_set->value;
......@@ -15268,27 +16319,24 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1526816319 zig_unreachable();
1526916320 }
1527016321
15271 return ir_const_bool(ira, &bin_op_instruction->base, answer);
16322 return ir_const_bool(ira, &bin_op_instruction->base.base, answer);
1527216323 }
1527316324
15274 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15275 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16325 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, ira->codegen->builtin_types.entry_bool,
1527616326 op_id, op1, op2, bin_op_instruction->safety_check_on);
15277 result->value->type = ira->codegen->builtin_types.entry_bool;
15278 return result;
1527916327 }
1528016328
1528116329 if (type_is_numeric(op1->value->type) && type_is_numeric(op2->value->type)) {
1528216330 // This operation allows any combination of integer and float types, regardless of the
1528316331 // signed-ness, comptime-ness, and bit-width. So peer type resolution is incorrect for
1528416332 // numeric types.
15285 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base, op1, op2, op_id);
16333 return ir_analyze_bin_op_cmp_numeric(ira, &bin_op_instruction->base.base, op1, op2, op_id);
1528616334 }
1528716335
15288 IrInstruction *instructions[] = {op1, op2};
16336 IrInstGen *instructions[] = {op1, op2};
1528916337 ZigType *resolved_type = ir_resolve_peer_types(ira, source_node, nullptr, instructions, 2);
1529016338 if (type_is_invalid(resolved_type))
15291 return ira->codegen->invalid_instruction;
16339 return ira->codegen->invalid_inst_gen;
1529216340
1529316341 bool operator_allowed;
1529416342 switch (resolved_type->id) {
......@@ -15336,21 +16384,21 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1533616384 if (!operator_allowed) {
1533716385 ir_add_error_node(ira, source_node,
1533816386 buf_sprintf("operator not allowed for type '%s'", buf_ptr(&resolved_type->name)));
15339 return ira->codegen->invalid_instruction;
16387 return ira->codegen->invalid_inst_gen;
1534016388 }
1534116389
15342 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
15343 if (casted_op1 == ira->codegen->invalid_instruction)
15344 return ira->codegen->invalid_instruction;
16390 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
16391 if (type_is_invalid(casted_op1->value->type))
16392 return ira->codegen->invalid_inst_gen;
1534516393
15346 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15347 if (casted_op2 == ira->codegen->invalid_instruction)
15348 return ira->codegen->invalid_instruction;
16394 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16395 if (type_is_invalid(casted_op2->value->type))
16396 return ira->codegen->invalid_inst_gen;
1534916397
1535016398 bool one_possible_value;
1535116399 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
1535216400 case OnePossibleValueInvalid:
15353 return ira->codegen->invalid_instruction;
16401 return ira->codegen->invalid_inst_gen;
1535416402 case OnePossibleValueYes:
1535516403 one_possible_value = true;
1535616404 break;
......@@ -15362,20 +16410,20 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1536216410 if (one_possible_value || (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2))) {
1536316411 ZigValue *op1_val = one_possible_value ? casted_op1->value : ir_resolve_const(ira, casted_op1, UndefBad);
1536416412 if (op1_val == nullptr)
15365 return ira->codegen->invalid_instruction;
16413 return ira->codegen->invalid_inst_gen;
1536616414 ZigValue *op2_val = one_possible_value ? casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);
1536716415 if (op2_val == nullptr)
15368 return ira->codegen->invalid_instruction;
16416 return ira->codegen->invalid_inst_gen;
1536916417 if (resolved_type->id != ZigTypeIdVector)
1537016418 return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);
15371 IrInstruction *result = ir_const(ira, &bin_op_instruction->base,
16419 IrInstGen *result = ir_const(ira, &bin_op_instruction->base.base,
1537216420 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));
1537316421 result->value->data.x_array.data.s_none.elements =
1537416422 create_const_vals(resolved_type->data.vector.len);
1537516423
1537616424 expand_undef_array(ira->codegen, result->value);
1537716425 for (size_t i = 0;i < resolved_type->data.vector.len;i++) {
15378 IrInstruction *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
16426 IrInstGen *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
1537916427 &op1_val->data.x_array.data.s_none.elements[i],
1538016428 &op2_val->data.x_array.data.s_none.elements[i],
1538116429 bin_op_instruction, op_id, one_possible_value);
......@@ -15384,19 +16432,14 @@ static IrInstruction *ir_analyze_bin_op_cmp(IrAnalyze *ira, IrInstructionBinOp *
1538416432 return result;
1538516433 }
1538616434
15387 IrInstruction *result = ir_build_bin_op(&ira->new_irb,
15388 bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
16435 ZigType *res_type = (resolved_type->id == ZigTypeIdVector) ?
16436 get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool) :
16437 ira->codegen->builtin_types.entry_bool;
16438 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, res_type,
1538916439 op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
15390 if (resolved_type->id == ZigTypeIdVector) {
15391 result->value->type = get_vector_type(ira->codegen, resolved_type->data.vector.len,
15392 ira->codegen->builtin_types.entry_bool);
15393 } else {
15394 result->value->type = ira->codegen->builtin_types.entry_bool;
15395 }
15396 return result;
1539716440}
1539816441
15399static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
16442static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
1540016443 ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val, ZigValue *out_val)
1540116444{
1540216445 bool is_int;
......@@ -15576,10 +16619,10 @@ static ErrorMsg *ir_eval_math_op_scalar(IrAnalyze *ira, IrInstruction *source_in
1557616619}
1557716620
1557816621// This works on operands that have already been checked to be comptime known.
15579static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_instr,
16622static IrInstGen *ir_analyze_math_op(IrAnalyze *ira, IrInst* source_instr,
1558016623 ZigType *type_entry, ZigValue *op1_val, IrBinOp op_id, ZigValue *op2_val)
1558116624{
15582 IrInstruction *result_instruction = ir_const(ira, source_instr, type_entry);
16625 IrInstGen *result_instruction = ir_const(ira, source_instr, type_entry);
1558316626 ZigValue *out_val = result_instruction->value;
1558416627 if (type_entry->id == ZigTypeIdVector) {
1558516628 expand_undef_array(ira->codegen, op1_val);
......@@ -15600,43 +16643,43 @@ static IrInstruction *ir_analyze_math_op(IrAnalyze *ira, IrInstruction *source_i
1560016643 if (msg != nullptr) {
1560116644 add_error_note(ira->codegen, msg, source_instr->source_node,
1560216645 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
15603 return ira->codegen->invalid_instruction;
16646 return ira->codegen->invalid_inst_gen;
1560416647 }
1560516648 }
1560616649 out_val->type = type_entry;
1560716650 out_val->special = ConstValSpecialStatic;
1560816651 } else {
1560916652 if (ir_eval_math_op_scalar(ira, source_instr, type_entry, op1_val, op_id, op2_val, out_val) != nullptr) {
15610 return ira->codegen->invalid_instruction;
16653 return ira->codegen->invalid_inst_gen;
1561116654 }
1561216655 }
1561316656 return ir_implicit_cast(ira, result_instruction, type_entry);
1561416657}
1561516658
15616static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
15617 IrInstruction *op1 = bin_op_instruction->op1->child;
16659static IrInstGen *ir_analyze_bit_shift(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
16660 IrInstGen *op1 = bin_op_instruction->op1->child;
1561816661 if (type_is_invalid(op1->value->type))
15619 return ira->codegen->invalid_instruction;
16662 return ira->codegen->invalid_inst_gen;
1562016663
1562116664 if (op1->value->type->id != ZigTypeIdInt && op1->value->type->id != ZigTypeIdComptimeInt) {
15622 ir_add_error(ira, bin_op_instruction->op1,
16665 ir_add_error(ira, &bin_op_instruction->op1->base,
1562316666 buf_sprintf("bit shifting operation expected integer type, found '%s'",
1562416667 buf_ptr(&op1->value->type->name)));
15625 return ira->codegen->invalid_instruction;
16668 return ira->codegen->invalid_inst_gen;
1562616669 }
1562716670
15628 IrInstruction *op2 = bin_op_instruction->op2->child;
16671 IrInstGen *op2 = bin_op_instruction->op2->child;
1562916672 if (type_is_invalid(op2->value->type))
15630 return ira->codegen->invalid_instruction;
16673 return ira->codegen->invalid_inst_gen;
1563116674
1563216675 if (op2->value->type->id != ZigTypeIdInt && op2->value->type->id != ZigTypeIdComptimeInt) {
15633 ir_add_error(ira, bin_op_instruction->op2,
16676 ir_add_error(ira, &bin_op_instruction->op2->base,
1563416677 buf_sprintf("shift amount has to be an integer type, but found '%s'",
1563516678 buf_ptr(&op2->value->type->name)));
15636 return ira->codegen->invalid_instruction;
16679 return ira->codegen->invalid_inst_gen;
1563716680 }
1563816681
15639 IrInstruction *casted_op2;
16682 IrInstGen *casted_op2;
1564016683 IrBinOp op_id = bin_op_instruction->op_id;
1564116684 if (op1->value->type->id == ZigTypeIdComptimeInt) {
1564216685 casted_op2 = op2;
......@@ -15648,8 +16691,8 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
1564816691 if (casted_op2->value->data.x_bigint.is_negative) {
1564916692 Buf *val_buf = buf_alloc();
1565016693 bigint_append_buf(val_buf, &casted_op2->value->data.x_bigint, 10);
15651 ir_add_error(ira, casted_op2, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
15652 return ira->codegen->invalid_instruction;
16694 ir_add_error(ira, &casted_op2->base, buf_sprintf("shift by negative value %s", buf_ptr(val_buf)));
16695 return ira->codegen->invalid_inst_gen;
1565316696 }
1565416697 } else {
1565516698 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
......@@ -15659,57 +16702,51 @@ static IrInstruction *ir_analyze_bit_shift(IrAnalyze *ira, IrInstructionBinOp *b
1565916702
1566016703 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1566116704 if (op2_val == nullptr)
15662 return ira->codegen->invalid_instruction;
16705 return ira->codegen->invalid_inst_gen;
1566316706 if (!bigint_fits_in_bits(&op2_val->data.x_bigint,
1566416707 shift_amt_type->data.integral.bit_count,
1566516708 op2_val->data.x_bigint.is_negative)) {
1566616709 Buf *val_buf = buf_alloc();
1566716710 bigint_append_buf(val_buf, &op2_val->data.x_bigint, 10);
1566816711 ErrorMsg* msg = ir_add_error(ira,
15669 &bin_op_instruction->base,
16712 &bin_op_instruction->base.base,
1567016713 buf_sprintf("RHS of shift is too large for LHS type"));
1567116714 add_error_note(
1567216715 ira->codegen,
1567316716 msg,
15674 op2->source_node,
16717 op2->base.source_node,
1567516718 buf_sprintf("value %s cannot fit into type %s",
1567616719 buf_ptr(val_buf),
1567716720 buf_ptr(&shift_amt_type->name)));
15678 return ira->codegen->invalid_instruction;
16721 return ira->codegen->invalid_inst_gen;
1567916722 }
1568016723 }
1568116724
1568216725 casted_op2 = ir_implicit_cast(ira, op2, shift_amt_type);
15683 if (casted_op2 == ira->codegen->invalid_instruction)
15684 return ira->codegen->invalid_instruction;
16726 if (type_is_invalid(casted_op2->value->type))
16727 return ira->codegen->invalid_inst_gen;
1568516728 }
1568616729
1568716730 if (instr_is_comptime(op1) && instr_is_comptime(casted_op2)) {
1568816731 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1568916732 if (op1_val == nullptr)
15690 return ira->codegen->invalid_instruction;
16733 return ira->codegen->invalid_inst_gen;
1569116734
1569216735 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1569316736 if (op2_val == nullptr)
15694 return ira->codegen->invalid_instruction;
16737 return ira->codegen->invalid_inst_gen;
1569516738
15696 return ir_analyze_math_op(ira, &bin_op_instruction->base, op1->value->type, op1_val, op_id, op2_val);
16739 return ir_analyze_math_op(ira, &bin_op_instruction->base.base, op1->value->type, op1_val, op_id, op2_val);
1569716740 } else if (op1->value->type->id == ZigTypeIdComptimeInt) {
15698 ir_add_error(ira, &bin_op_instruction->base,
16741 ir_add_error(ira, &bin_op_instruction->base.base,
1569916742 buf_sprintf("LHS of shift must be an integer type, or RHS must be compile-time known"));
15700 return ira->codegen->invalid_instruction;
16743 return ira->codegen->invalid_inst_gen;
1570116744 } else if (instr_is_comptime(casted_op2) && bigint_cmp_zero(&casted_op2->value->data.x_bigint) == CmpEQ) {
15702 IrInstruction *result = ir_build_cast(&ira->new_irb, bin_op_instruction->base.scope,
15703 bin_op_instruction->base.source_node, op1->value->type, op1, CastOpNoop);
15704 result->value->type = op1->value->type;
15705 return result;
16745 return ir_build_cast(ira, &bin_op_instruction->base.base, op1->value->type, op1, CastOpNoop);
1570616746 }
1570716747
15708 IrInstruction *result = ir_build_bin_op(&ira->new_irb, bin_op_instruction->base.scope,
15709 bin_op_instruction->base.source_node, op_id,
15710 op1, casted_op2, bin_op_instruction->safety_check_on);
15711 result->value->type = op1->value->type;
15712 return result;
16748 return ir_build_bin_op_gen(ira, &bin_op_instruction->base.base, op1->value->type,
16749 op_id, op1, casted_op2, bin_op_instruction->safety_check_on);
1571316750}
1571416751
1571516752static bool ok_float_op(IrBinOp op) {
......@@ -15773,24 +16810,24 @@ static bool is_pointer_arithmetic_allowed(ZigType *lhs_type, IrBinOp op) {
1577316810 zig_unreachable();
1577416811}
1577516812
15776static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16813static IrInstGen *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
1577716814 Error err;
1577816815
15779 IrInstruction *op1 = instruction->op1->child;
16816 IrInstGen *op1 = instruction->op1->child;
1578016817 if (type_is_invalid(op1->value->type))
15781 return ira->codegen->invalid_instruction;
16818 return ira->codegen->invalid_inst_gen;
1578216819
15783 IrInstruction *op2 = instruction->op2->child;
16820 IrInstGen *op2 = instruction->op2->child;
1578416821 if (type_is_invalid(op2->value->type))
15785 return ira->codegen->invalid_instruction;
16822 return ira->codegen->invalid_inst_gen;
1578616823
1578716824 IrBinOp op_id = instruction->op_id;
1578816825
1578916826 // look for pointer math
1579016827 if (is_pointer_arithmetic_allowed(op1->value->type, op_id)) {
15791 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
16828 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, ira->codegen->builtin_types.entry_usize);
1579216829 if (type_is_invalid(casted_op2->value->type))
15793 return ira->codegen->invalid_instruction;
16830 return ira->codegen->invalid_inst_gen;
1579416831
1579516832 // If either operand is undef, result is undef.
1579616833 ZigValue *op1_val = nullptr;
......@@ -15798,28 +16835,28 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1579816835 if (instr_is_comptime(op1)) {
1579916836 op1_val = ir_resolve_const(ira, op1, UndefOk);
1580016837 if (op1_val == nullptr)
15801 return ira->codegen->invalid_instruction;
16838 return ira->codegen->invalid_inst_gen;
1580216839 if (op1_val->special == ConstValSpecialUndef)
15803 return ir_const_undef(ira, &instruction->base, op1->value->type);
16840 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
1580416841 }
1580516842 if (instr_is_comptime(casted_op2)) {
1580616843 op2_val = ir_resolve_const(ira, casted_op2, UndefOk);
1580716844 if (op2_val == nullptr)
15808 return ira->codegen->invalid_instruction;
16845 return ira->codegen->invalid_inst_gen;
1580916846 if (op2_val->special == ConstValSpecialUndef)
15810 return ir_const_undef(ira, &instruction->base, op1->value->type);
16847 return ir_const_undef(ira, &instruction->base.base, op1->value->type);
1581116848 }
1581216849
1581316850 ZigType *elem_type = op1->value->type->data.pointer.child_type;
1581416851 if ((err = type_resolve(ira->codegen, elem_type, ResolveStatusSizeKnown)))
15815 return ira->codegen->invalid_instruction;
16852 return ira->codegen->invalid_inst_gen;
1581616853
1581716854 // NOTE: this variable is meaningful iff op2_val is not null!
1581816855 uint64_t byte_offset;
1581916856 if (op2_val != nullptr) {
1582016857 uint64_t elem_offset;
1582116858 if (!ir_resolve_usize(ira, casted_op2, &elem_offset))
15822 return ira->codegen->invalid_instruction;
16859 return ira->codegen->invalid_inst_gen;
1582316860
1582416861 byte_offset = type_size(ira->codegen, elem_type) * elem_offset;
1582516862 }
......@@ -15834,7 +16871,7 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1583416871 {
1583516872 uint32_t align_bytes;
1583616873 if ((err = resolve_ptr_align(ira, op1->value->type, &align_bytes)))
15837 return ira->codegen->invalid_instruction;
16874 return ira->codegen->invalid_inst_gen;
1583816875
1583916876 // If the addend is not a comptime-known value we can still count on
1584016877 // it being a multiple of the type size
......@@ -15863,23 +16900,20 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1586316900 } else {
1586416901 zig_unreachable();
1586516902 }
15866 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
16903 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
1586716904 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
1586816905 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
1586916906 result->value->data.x_ptr.data.hard_coded_addr.addr = new_addr;
1587016907 return result;
1587116908 }
1587216909
15873 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
15874 instruction->base.source_node, op_id, op1, casted_op2, true);
15875 result->value->type = result_type;
15876 return result;
16910 return ir_build_bin_op_gen(ira, &instruction->base.base, result_type, op_id, op1, casted_op2, true);
1587716911 }
1587816912
15879 IrInstruction *instructions[] = {op1, op2};
15880 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.source_node, nullptr, instructions, 2);
16913 IrInstGen *instructions[] = {op1, op2};
16914 ZigType *resolved_type = ir_resolve_peer_types(ira, instruction->base.base.source_node, nullptr, instructions, 2);
1588116915 if (type_is_invalid(resolved_type))
15882 return ira->codegen->invalid_instruction;
16916 return ira->codegen->invalid_inst_gen;
1588316917
1588416918 bool is_int = resolved_type->id == ZigTypeIdInt || resolved_type->id == ZigTypeIdComptimeInt;
1588516919 bool is_float = resolved_type->id == ZigTypeIdFloat || resolved_type->id == ZigTypeIdComptimeFloat;
......@@ -15899,11 +16933,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1589916933 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1590016934 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1590116935 if (op1_val == nullptr)
15902 return ira->codegen->invalid_instruction;
16936 return ira->codegen->invalid_inst_gen;
1590316937
1590416938 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1590516939 if (op2_val == nullptr)
15906 return ira->codegen->invalid_instruction;
16940 return ira->codegen->invalid_inst_gen;
1590716941
1590816942 if (bigint_cmp_zero(&op2_val->data.x_bigint) == CmpEQ) {
1590916943 // the division by zero error will be caught later, but we don't have a
......@@ -15922,11 +16956,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1592216956 }
1592316957 }
1592416958 if (!ok) {
15925 ir_add_error(ira, &instruction->base,
16959 ir_add_error(ira, &instruction->base.base,
1592616960 buf_sprintf("division with '%s' and '%s': signed integers must use @divTrunc, @divFloor, or @divExact",
1592716961 buf_ptr(&op1->value->type->name),
1592816962 buf_ptr(&op2->value->type->name)));
15929 return ira->codegen->invalid_instruction;
16963 return ira->codegen->invalid_inst_gen;
1593016964 }
1593116965 } else {
1593216966 op_id = IrBinOpDivTrunc;
......@@ -15937,12 +16971,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1593716971 if (instr_is_comptime(op1) && instr_is_comptime(op2)) {
1593816972 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1593916973 if (op1_val == nullptr)
15940 return ira->codegen->invalid_instruction;
16974 return ira->codegen->invalid_inst_gen;
1594116975
1594216976 if (is_int) {
1594316977 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1594416978 if (op2_val == nullptr)
15945 return ira->codegen->invalid_instruction;
16979 return ira->codegen->invalid_inst_gen;
1594616980
1594716981 if (bigint_cmp_zero(&op2->value->data.x_bigint) == CmpEQ) {
1594816982 // the division by zero error will be caught later, but we don't
......@@ -15956,13 +16990,13 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1595616990 ok = bigint_cmp(&rem_result, &mod_result) == CmpEQ;
1595716991 }
1595816992 } else {
15959 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
15960 if (casted_op2 == ira->codegen->invalid_instruction)
15961 return ira->codegen->invalid_instruction;
16993 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16994 if (type_is_invalid(casted_op2->value->type))
16995 return ira->codegen->invalid_inst_gen;
1596216996
1596316997 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1596416998 if (op2_val == nullptr)
15965 return ira->codegen->invalid_instruction;
16999 return ira->codegen->invalid_inst_gen;
1596617000
1596717001 if (float_cmp_zero(casted_op2->value) == CmpEQ) {
1596817002 // the division by zero error will be caught later, but we don't
......@@ -15978,11 +17012,11 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1597817012 }
1597917013 }
1598017014 if (!ok) {
15981 ir_add_error(ira, &instruction->base,
17015 ir_add_error(ira, &instruction->base.base,
1598217016 buf_sprintf("remainder division with '%s' and '%s': signed integers and floats must use @rem or @mod",
1598317017 buf_ptr(&op1->value->type->name),
1598417018 buf_ptr(&op2->value->type->name)));
15985 return ira->codegen->invalid_instruction;
17019 return ira->codegen->invalid_inst_gen;
1598617020 }
1598717021 }
1598817022 op_id = IrBinOpRemRem;
......@@ -16002,12 +17036,12 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1600217036 }
1600317037 }
1600417038 if (!ok) {
16005 AstNode *source_node = instruction->base.source_node;
17039 AstNode *source_node = instruction->base.base.source_node;
1600617040 ir_add_error_node(ira, source_node,
1600717041 buf_sprintf("invalid operands to binary expression: '%s' and '%s'",
1600817042 buf_ptr(&op1->value->type->name),
1600917043 buf_ptr(&op2->value->type->name)));
16010 return ira->codegen->invalid_instruction;
17044 return ira->codegen->invalid_inst_gen;
1601117045 }
1601217046
1601317047 if (resolved_type->id == ZigTypeIdComptimeInt) {
......@@ -16020,33 +17054,31 @@ static IrInstruction *ir_analyze_bin_op_math(IrAnalyze *ira, IrInstructionBinOp
1602017054 }
1602117055 }
1602217056
16023 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
16024 if (casted_op1 == ira->codegen->invalid_instruction)
16025 return ira->codegen->invalid_instruction;
17057 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, resolved_type);
17058 if (type_is_invalid(casted_op1->value->type))
17059 return ira->codegen->invalid_inst_gen;
1602617060
16027 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
16028 if (casted_op2 == ira->codegen->invalid_instruction)
16029 return ira->codegen->invalid_instruction;
17061 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, resolved_type);
17062 if (type_is_invalid(casted_op2->value->type))
17063 return ira->codegen->invalid_inst_gen;
1603017064
1603117065 if (instr_is_comptime(casted_op1) && instr_is_comptime(casted_op2)) {
1603217066 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
1603317067 if (op1_val == nullptr)
16034 return ira->codegen->invalid_instruction;
17068 return ira->codegen->invalid_inst_gen;
1603517069 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
1603617070 if (op2_val == nullptr)
16037 return ira->codegen->invalid_instruction;
17071 return ira->codegen->invalid_inst_gen;
1603817072
16039 return ir_analyze_math_op(ira, &instruction->base, resolved_type, op1_val, op_id, op2_val);
17073 return ir_analyze_math_op(ira, &instruction->base.base, resolved_type, op1_val, op_id, op2_val);
1604017074 }
1604117075
16042 IrInstruction *result = ir_build_bin_op(&ira->new_irb, instruction->base.scope,
16043 instruction->base.source_node, op_id, casted_op1, casted_op2, instruction->safety_check_on);
16044 result->value->type = resolved_type;
16045 return result;
17076 return ir_build_bin_op_gen(ira, &instruction->base.base, resolved_type,
17077 op_id, casted_op1, casted_op2, instruction->safety_check_on);
1604617078}
1604717079
16048static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source_instr,
16049 IrInstruction *op1, IrInstruction *op2)
17080static IrInstGen *ir_analyze_tuple_cat(IrAnalyze *ira, IrInst* source_instr,
17081 IrInstGen *op1, IrInstGen *op2)
1605017082{
1605117083 Error err;
1605217084 ZigType *op1_type = op1->value->type;
......@@ -16063,9 +17095,9 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1606317095 new_type->data.structure.special = StructSpecialInferredTuple;
1606417096 new_type->data.structure.resolve_status = ResolveStatusBeingInferred;
1606517097
16066 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instr->scope);
17098 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope);
1606717099
16068 IrInstruction *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
17100 IrInstGen *new_struct_ptr = ir_resolve_result(ira, source_instr, no_result_loc(),
1606917101 new_type, nullptr, false, true);
1607017102 uint32_t new_field_count = op1_field_count + op2_field_count;
1607117103
......@@ -16089,13 +17121,13 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1608917121 new_field->is_comptime = src_field->is_comptime;
1609017122 }
1609117123 if ((err = type_resolve(ira->codegen, new_type, ResolveStatusZeroBitsKnown)))
16092 return ira->codegen->invalid_instruction;
17124 return ira->codegen->invalid_inst_gen;
1609317125
16094 ZigList<IrInstruction *> const_ptrs = {};
16095 IrInstruction *first_non_const_instruction = nullptr;
17126 ZigList<IrInstGen *> const_ptrs = {};
17127 IrInstGen *first_non_const_instruction = nullptr;
1609617128 for (uint32_t i = 0; i < new_field_count; i += 1) {
1609717129 TypeStructField *dst_field = new_type->data.structure.fields[i];
16098 IrInstruction *src_struct_op;
17130 IrInstGen *src_struct_op;
1609917131 TypeStructField *src_field;
1610017132 if (i < op1_field_count) {
1610117133 src_field = op1_type->data.structure.fields[i];
......@@ -16104,73 +17136,73 @@ static IrInstruction *ir_analyze_tuple_cat(IrAnalyze *ira, IrInstruction *source
1610417136 src_field = op2_type->data.structure.fields[i - op1_field_count];
1610517137 src_struct_op = op2;
1610617138 }
16107 IrInstruction *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
17139 IrInstGen *field_value = ir_analyze_struct_value_field_value(ira, source_instr,
1610817140 src_struct_op, src_field);
1610917141 if (type_is_invalid(field_value->value->type))
16110 return ira->codegen->invalid_instruction;
16111 IrInstruction *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
17142 return ira->codegen->invalid_inst_gen;
17143 IrInstGen *dest_ptr = ir_analyze_struct_field_ptr(ira, source_instr, dst_field,
1611217144 new_struct_ptr, new_type, true);
1611317145 if (type_is_invalid(dest_ptr->value->type))
16114 return ira->codegen->invalid_instruction;
17146 return ira->codegen->invalid_inst_gen;
1611517147 if (instr_is_comptime(field_value)) {
1611617148 const_ptrs.append(dest_ptr);
1611717149 } else {
1611817150 first_non_const_instruction = field_value;
1611917151 }
16120 IrInstruction *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
17152 IrInstGen *store_ptr_inst = ir_analyze_store_ptr(ira, source_instr, dest_ptr, field_value,
1612117153 true);
1612217154 if (type_is_invalid(store_ptr_inst->value->type))
16123 return ira->codegen->invalid_instruction;
17155 return ira->codegen->invalid_inst_gen;
1612417156 }
1612517157 if (const_ptrs.length != new_field_count) {
1612617158 new_struct_ptr->value->special = ConstValSpecialRuntime;
1612717159 for (size_t i = 0; i < const_ptrs.length; i += 1) {
16128 IrInstruction *elem_result_loc = const_ptrs.at(i);
17160 IrInstGen *elem_result_loc = const_ptrs.at(i);
1612917161 assert(elem_result_loc->value->special == ConstValSpecialStatic);
1613017162 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
1613117163 // This field will be generated comptime; no need to do this.
1613217164 continue;
1613317165 }
16134 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
17166 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
1613517167 elem_result_loc->value->special = ConstValSpecialRuntime;
16136 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
17168 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
1613717169 }
1613817170 }
16139 IrInstruction *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
17171 IrInstGen *result = ir_get_deref(ira, source_instr, new_struct_ptr, nullptr);
1614017172 if (instr_is_comptime(result))
1614117173 return result;
1614217174
1614317175 if (is_comptime) {
16144 ir_add_error_node(ira, first_non_const_instruction->source_node,
17176 ir_add_error(ira, &first_non_const_instruction->base,
1614517177 buf_sprintf("unable to evaluate constant expression"));
16146 return ira->codegen->invalid_instruction;
17178 return ira->codegen->invalid_inst_gen;
1614717179 }
1614817180
1614917181 return result;
1615017182}
1615117183
16152static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16153 IrInstruction *op1 = instruction->op1->child;
17184static IrInstGen *ir_analyze_array_cat(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
17185 IrInstGen *op1 = instruction->op1->child;
1615417186 ZigType *op1_type = op1->value->type;
1615517187 if (type_is_invalid(op1_type))
16156 return ira->codegen->invalid_instruction;
17188 return ira->codegen->invalid_inst_gen;
1615717189
16158 IrInstruction *op2 = instruction->op2->child;
17190 IrInstGen *op2 = instruction->op2->child;
1615917191 ZigType *op2_type = op2->value->type;
1616017192 if (type_is_invalid(op2_type))
16161 return ira->codegen->invalid_instruction;
17193 return ira->codegen->invalid_inst_gen;
1616217194
1616317195 if (is_tuple(op1_type) && is_tuple(op2_type)) {
16164 return ir_analyze_tuple_cat(ira, &instruction->base, op1, op2);
17196 return ir_analyze_tuple_cat(ira, &instruction->base.base, op1, op2);
1616517197 }
1616617198
1616717199 ZigValue *op1_val = ir_resolve_const(ira, op1, UndefBad);
1616817200 if (!op1_val)
16169 return ira->codegen->invalid_instruction;
17201 return ira->codegen->invalid_inst_gen;
1617017202
1617117203 ZigValue *op2_val = ir_resolve_const(ira, op2, UndefBad);
1617217204 if (!op2_val)
16173 return ira->codegen->invalid_instruction;
17205 return ira->codegen->invalid_inst_gen;
1617417206
1617517207 ZigValue *sentinel1 = nullptr;
1617617208 ZigValue *op1_array_val;
......@@ -16208,15 +17240,15 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1620817240 {
1620917241 ZigType *array_type = op1_type->data.pointer.child_type;
1621017242 child_type = array_type->data.array.child_type;
16211 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->source_node);
17243 op1_array_val = const_ptr_pointee(ira, ira->codegen, op1_val, op1->base.source_node);
1621217244 if (op1_array_val == nullptr)
16213 return ira->codegen->invalid_instruction;
17245 return ira->codegen->invalid_inst_gen;
1621417246 op1_array_index = 0;
1621517247 op1_array_end = array_type->data.array.len;
1621617248 sentinel1 = array_type->data.array.sentinel;
1621717249 } else {
16218 ir_add_error(ira, op1, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
16219 return ira->codegen->invalid_instruction;
17250 ir_add_error(ira, &op1->base, buf_sprintf("expected array, found '%s'", buf_ptr(&op1->value->type->name)));
17251 return ira->codegen->invalid_inst_gen;
1622017252 }
1622117253
1622217254 ZigValue *sentinel2 = nullptr;
......@@ -16256,23 +17288,23 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1625617288 {
1625717289 ZigType *array_type = op2_type->data.pointer.child_type;
1625817290 op2_type_valid = array_type->data.array.child_type == child_type;
16259 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->source_node);
17291 op2_array_val = const_ptr_pointee(ira, ira->codegen, op2_val, op2->base.source_node);
1626017292 if (op2_array_val == nullptr)
16261 return ira->codegen->invalid_instruction;
17293 return ira->codegen->invalid_inst_gen;
1626217294 op2_array_index = 0;
1626317295 op2_array_end = array_type->data.array.len;
1626417296
1626517297 sentinel2 = array_type->data.array.sentinel;
1626617298 } else {
16267 ir_add_error(ira, op2,
17299 ir_add_error(ira, &op2->base,
1626817300 buf_sprintf("expected array or C string literal, found '%s'", buf_ptr(&op2->value->type->name)));
16269 return ira->codegen->invalid_instruction;
17301 return ira->codegen->invalid_inst_gen;
1627017302 }
1627117303 if (!op2_type_valid) {
16272 ir_add_error(ira, op2, buf_sprintf("expected array of type '%s', found '%s'",
17304 ir_add_error(ira, &op2->base, buf_sprintf("expected array of type '%s', found '%s'",
1627317305 buf_ptr(&child_type->name),
1627417306 buf_ptr(&op2->value->type->name)));
16275 return ira->codegen->invalid_instruction;
17307 return ira->codegen->invalid_inst_gen;
1627617308 }
1627717309
1627817310 ZigValue *sentinel;
......@@ -16289,7 +17321,7 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1628917321 }
1629017322
1629117323 // The type of result is populated in the following if blocks
16292 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
17324 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
1629317325 ZigValue *out_val = result->value;
1629417326
1629517327 ZigValue *out_array_val;
......@@ -16377,14 +17409,14 @@ static IrInstruction *ir_analyze_array_cat(IrAnalyze *ira, IrInstructionBinOp *i
1637717409 return result;
1637817410}
1637917411
16380static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *instruction) {
16381 IrInstruction *op1 = instruction->op1->child;
17412static IrInstGen *ir_analyze_array_mult(IrAnalyze *ira, IrInstSrcBinOp *instruction) {
17413 IrInstGen *op1 = instruction->op1->child;
1638217414 if (type_is_invalid(op1->value->type))
16383 return ira->codegen->invalid_instruction;
17415 return ira->codegen->invalid_inst_gen;
1638417416
16385 IrInstruction *op2 = instruction->op2->child;
17417 IrInstGen *op2 = instruction->op2->child;
1638617418 if (type_is_invalid(op2->value->type))
16387 return ira->codegen->invalid_instruction;
17419 return ira->codegen->invalid_inst_gen;
1638817420
1638917421 bool want_ptr_to_array = false;
1639017422 ZigType *array_type;
......@@ -16393,49 +17425,49 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
1639317425 array_type = op1->value->type;
1639417426 array_val = ir_resolve_const(ira, op1, UndefOk);
1639517427 if (array_val == nullptr)
16396 return ira->codegen->invalid_instruction;
17428 return ira->codegen->invalid_inst_gen;
1639717429 } else if (op1->value->type->id == ZigTypeIdPointer && op1->value->type->data.pointer.ptr_len == PtrLenSingle &&
1639817430 op1->value->type->data.pointer.child_type->id == ZigTypeIdArray)
1639917431 {
1640017432 array_type = op1->value->type->data.pointer.child_type;
16401 IrInstruction *array_inst = ir_get_deref(ira, op1, op1, nullptr);
17433 IrInstGen *array_inst = ir_get_deref(ira, &op1->base, op1, nullptr);
1640217434 if (type_is_invalid(array_inst->value->type))
16403 return ira->codegen->invalid_instruction;
17435 return ira->codegen->invalid_inst_gen;
1640417436 array_val = ir_resolve_const(ira, array_inst, UndefOk);
1640517437 if (array_val == nullptr)
16406 return ira->codegen->invalid_instruction;
17438 return ira->codegen->invalid_inst_gen;
1640717439 want_ptr_to_array = true;
1640817440 } else {
16409 ir_add_error(ira, op1, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
16410 return ira->codegen->invalid_instruction;
17441 ir_add_error(ira, &op1->base, buf_sprintf("expected array type, found '%s'", buf_ptr(&op1->value->type->name)));
17442 return ira->codegen->invalid_inst_gen;
1641117443 }
1641217444
1641317445 uint64_t mult_amt;
1641417446 if (!ir_resolve_usize(ira, op2, &mult_amt))
16415 return ira->codegen->invalid_instruction;
17447 return ira->codegen->invalid_inst_gen;
1641617448
1641717449 uint64_t old_array_len = array_type->data.array.len;
1641817450 uint64_t new_array_len;
1641917451
1642017452 if (mul_u64_overflow(old_array_len, mult_amt, &new_array_len)) {
16421 ir_add_error(ira, &instruction->base, buf_sprintf("operation results in overflow"));
16422 return ira->codegen->invalid_instruction;
17453 ir_add_error(ira, &instruction->base.base, buf_sprintf("operation results in overflow"));
17454 return ira->codegen->invalid_inst_gen;
1642317455 }
1642417456
1642517457 ZigType *child_type = array_type->data.array.child_type;
1642617458 ZigType *result_array_type = get_array_type(ira->codegen, child_type, new_array_len,
1642717459 array_type->data.array.sentinel);
1642817460
16429 IrInstruction *array_result;
17461 IrInstGen *array_result;
1643017462 if (array_val->special == ConstValSpecialUndef || array_val->data.x_array.special == ConstArraySpecialUndef) {
16431 array_result = ir_const_undef(ira, &instruction->base, result_array_type);
17463 array_result = ir_const_undef(ira, &instruction->base.base, result_array_type);
1643217464 } else {
16433 array_result = ir_const(ira, &instruction->base, result_array_type);
17465 array_result = ir_const(ira, &instruction->base.base, result_array_type);
1643417466 ZigValue *out_val = array_result->value;
1643517467
1643617468 switch (type_has_one_possible_value(ira->codegen, result_array_type)) {
1643717469 case OnePossibleValueInvalid:
16438 return ira->codegen->invalid_instruction;
17470 return ira->codegen->invalid_inst_gen;
1643917471 case OnePossibleValueYes:
1644017472 goto skip_computation;
1644117473 case OnePossibleValueNo:
......@@ -16471,35 +17503,35 @@ static IrInstruction *ir_analyze_array_mult(IrAnalyze *ira, IrInstructionBinOp *
1647117503 }
1647217504skip_computation:
1647317505 if (want_ptr_to_array) {
16474 return ir_get_ref(ira, &instruction->base, array_result, true, false);
17506 return ir_get_ref(ira, &instruction->base.base, array_result, true, false);
1647517507 } else {
1647617508 return array_result;
1647717509 }
1647817510}
1647917511
16480static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
16481 IrInstructionMergeErrSets *instruction)
17512static IrInstGen *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
17513 IrInstSrcMergeErrSets *instruction)
1648217514{
16483 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op1->child);
17515 ZigType *op1_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op1->child);
1648417516 if (type_is_invalid(op1_type))
16485 return ira->codegen->invalid_instruction;
17517 return ira->codegen->invalid_inst_gen;
1648617518
16487 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base, instruction->op2->child);
17519 ZigType *op2_type = ir_resolve_error_set_type(ira, &instruction->base.base, instruction->op2->child);
1648817520 if (type_is_invalid(op2_type))
16489 return ira->codegen->invalid_instruction;
17521 return ira->codegen->invalid_inst_gen;
1649017522
1649117523 if (type_is_global_error_set(op1_type) ||
1649217524 type_is_global_error_set(op2_type))
1649317525 {
16494 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_global_error_set);
17526 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_global_error_set);
1649517527 }
1649617528
16497 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->source_node)) {
16498 return ira->codegen->invalid_instruction;
17529 if (!resolve_inferred_error_set(ira->codegen, op1_type, instruction->op1->child->base.source_node)) {
17530 return ira->codegen->invalid_inst_gen;
1649917531 }
1650017532
16501 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->source_node)) {
16502 return ira->codegen->invalid_instruction;
17533 if (!resolve_inferred_error_set(ira->codegen, op2_type, instruction->op2->child->base.source_node)) {
17534 return ira->codegen->invalid_inst_gen;
1650317535 }
1650417536
1650517537 size_t errors_count = ira->codegen->errors_by_index.length;
......@@ -16512,11 +17544,11 @@ static IrInstruction *ir_analyze_instruction_merge_err_sets(IrAnalyze *ira,
1651217544 ZigType *result_type = get_error_set_union(ira->codegen, errors, op1_type, op2_type, instruction->type_name);
1651317545 deallocate(errors, errors_count, "ErrorTableEntry *");
1651417546
16515 return ir_const_type(ira, &instruction->base, result_type);
17547 return ir_const_type(ira, &instruction->base.base, result_type);
1651617548}
1651717549
1651817550
16519static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructionBinOp *bin_op_instruction) {
17551static IrInstGen *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstSrcBinOp *bin_op_instruction) {
1652017552 IrBinOp op_id = bin_op_instruction->op_id;
1652117553 switch (op_id) {
1652217554 case IrBinOpInvalid:
......@@ -16561,41 +17593,39 @@ static IrInstruction *ir_analyze_instruction_bin_op(IrAnalyze *ira, IrInstructio
1656117593 zig_unreachable();
1656217594}
1656317595
16564static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
16565 IrInstructionDeclVarSrc *decl_var_instruction)
16566{
17596static IrInstGen *ir_analyze_instruction_decl_var(IrAnalyze *ira, IrInstSrcDeclVar *decl_var_instruction) {
1656717597 Error err;
1656817598 ZigVar *var = decl_var_instruction->var;
1656917599
1657017600 ZigType *explicit_type = nullptr;
16571 IrInstruction *var_type = nullptr;
17601 IrInstGen *var_type = nullptr;
1657217602 if (decl_var_instruction->var_type != nullptr) {
1657317603 var_type = decl_var_instruction->var_type->child;
1657417604 ZigType *proposed_type = ir_resolve_type(ira, var_type);
16575 explicit_type = validate_var_type(ira->codegen, var_type->source_node, proposed_type);
17605 explicit_type = validate_var_type(ira->codegen, var_type->base.source_node, proposed_type);
1657617606 if (type_is_invalid(explicit_type)) {
1657717607 var->var_type = ira->codegen->builtin_types.entry_invalid;
16578 return ira->codegen->invalid_instruction;
17608 return ira->codegen->invalid_inst_gen;
1657917609 }
1658017610 }
1658117611
16582 AstNode *source_node = decl_var_instruction->base.source_node;
17612 AstNode *source_node = decl_var_instruction->base.base.source_node;
1658317613
1658417614 bool is_comptime_var = ir_get_var_is_comptime(var);
1658517615
1658617616 bool var_class_requires_const = false;
1658717617
16588 IrInstruction *var_ptr = decl_var_instruction->ptr->child;
17618 IrInstGen *var_ptr = decl_var_instruction->ptr->child;
1658917619 // if this is null, a compiler error happened and did not initialize the variable.
1659017620 // if there are no compile errors there may be a missing ir_expr_wrap in pass1 IR generation.
1659117621 if (var_ptr == nullptr || type_is_invalid(var_ptr->value->type)) {
16592 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base);
17622 ir_assert(var_ptr != nullptr || ira->codegen->errors.length != 0, &decl_var_instruction->base.base);
1659317623 var->var_type = ira->codegen->builtin_types.entry_invalid;
16594 return ira->codegen->invalid_instruction;
17624 return ira->codegen->invalid_inst_gen;
1659517625 }
1659617626
1659717627 // The ir_build_var_decl_src call is supposed to pass a pointer to the allocation, not an initialization value.
16598 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base);
17628 ir_assert(var_ptr->value->type->id == ZigTypeIdPointer, &decl_var_instruction->base.base);
1659917629
1660017630 ZigType *result_type = var_ptr->value->type->data.pointer.child_type;
1660117631 if (type_is_invalid(result_type)) {
......@@ -16606,7 +17636,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1660617636
1660717637 ZigValue *init_val = nullptr;
1660817638 if (instr_is_comptime(var_ptr) && var_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
16609 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.source_node);
17639 init_val = const_ptr_pointee(ira, ira->codegen, var_ptr->value, decl_var_instruction->base.base.source_node);
1661017640 if (is_comptime_var) {
1661117641 if (var->gen_is_const) {
1661217642 var->const_value = init_val;
......@@ -16633,7 +17663,7 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1663317663 case ReqCompTimeNo:
1663417664 if (init_val != nullptr && value_is_comptime(init_val)) {
1663517665 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
16636 decl_var_instruction->base.source_node, init_val, UndefOk)))
17666 decl_var_instruction->base.base.source_node, init_val, UndefOk)))
1663717667 {
1663817668 result_type = ira->codegen->builtin_types.entry_invalid;
1663917669 } else if (init_val->type->id == ZigTypeIdFn &&
......@@ -16666,13 +17696,13 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1666617696 assert(var->var_type);
1666717697
1666817698 if (type_is_invalid(result_type)) {
16669 return ir_const_void(ira, &decl_var_instruction->base);
17699 return ir_const_void(ira, &decl_var_instruction->base.base);
1667017700 }
1667117701
1667217702 if (decl_var_instruction->align_value == nullptr) {
1667317703 if ((err = type_resolve(ira->codegen, result_type, ResolveStatusAlignmentKnown))) {
1667417704 var->var_type = ira->codegen->builtin_types.entry_invalid;
16675 return ir_const_void(ira, &decl_var_instruction->base);
17705 return ir_const_void(ira, &decl_var_instruction->base.base);
1667617706 }
1667717707 var->align_bytes = get_abi_alignment(ira->codegen, result_type);
1667817708 } else {
......@@ -16691,98 +17721,96 @@ static IrInstruction *ir_analyze_instruction_decl_var(IrAnalyze *ira,
1669117721 // we need a runtime ptr but we have a comptime val.
1669217722 // since it's a comptime val there are no instructions for it.
1669317723 // we memcpy the init value here
16694 IrInstruction *deref = ir_get_deref(ira, var_ptr, var_ptr, nullptr);
17724 IrInstGen *deref = ir_get_deref(ira, &var_ptr->base, var_ptr, nullptr);
1669517725 if (type_is_invalid(deref->value->type)) {
1669617726 var->var_type = ira->codegen->builtin_types.entry_invalid;
16697 return ira->codegen->invalid_instruction;
17727 return ira->codegen->invalid_inst_gen;
1669817728 }
1669917729 // If this assertion trips, something is wrong with the IR instructions, because
1670017730 // we expected the above deref to return a constant value, but it created a runtime
1670117731 // instruction.
1670217732 assert(deref->value->special != ConstValSpecialRuntime);
1670317733 var_ptr->value->special = ConstValSpecialRuntime;
16704 ir_analyze_store_ptr(ira, var_ptr, var_ptr, deref, false);
17734 ir_analyze_store_ptr(ira, &var_ptr->base, var_ptr, deref, false);
1670517735 }
16706 if (instr_is_comptime(var_ptr) &&
16707 (is_comptime_var || (var_class_requires_const && var->gen_is_const)))
16708 {
16709 return ir_const_void(ira, &decl_var_instruction->base);
17736 if (instr_is_comptime(var_ptr) && (is_comptime_var || (var_class_requires_const && var->gen_is_const))) {
17737 return ir_const_void(ira, &decl_var_instruction->base.base);
1671017738 }
1671117739 } else if (is_comptime_var) {
16712 ir_add_error(ira, &decl_var_instruction->base,
17740 ir_add_error(ira, &decl_var_instruction->base.base,
1671317741 buf_sprintf("cannot store runtime value in compile time variable"));
1671417742 var->var_type = ira->codegen->builtin_types.entry_invalid;
16715 return ira->codegen->invalid_instruction;
17743 return ira->codegen->invalid_inst_gen;
1671617744 }
1671717745
16718 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
17746 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
1671917747 if (fn_entry)
1672017748 fn_entry->variable_list.append(var);
1672117749
16722 return ir_build_var_decl_gen(ira, &decl_var_instruction->base, var, var_ptr);
17750 return ir_build_var_decl_gen(ira, &decl_var_instruction->base.base, var, var_ptr);
1672317751}
1672417752
16725static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructionExport *instruction) {
16726 IrInstruction *target = instruction->target->child;
17753static IrInstGen *ir_analyze_instruction_export(IrAnalyze *ira, IrInstSrcExport *instruction) {
17754 IrInstGen *target = instruction->target->child;
1672717755 if (type_is_invalid(target->value->type))
16728 return ira->codegen->invalid_instruction;
17756 return ira->codegen->invalid_inst_gen;
1672917757
16730 IrInstruction *options = instruction->options->child;
17758 IrInstGen *options = instruction->options->child;
1673117759 if (type_is_invalid(options->value->type))
16732 return ira->codegen->invalid_instruction;
17760 return ira->codegen->invalid_inst_gen;
1673317761
1673417762 ZigType *options_type = options->value->type;
1673517763 assert(options_type->id == ZigTypeIdStruct);
1673617764
1673717765 TypeStructField *name_field = find_struct_type_field(options_type, buf_create_from_str("name"));
16738 ir_assert(name_field != nullptr, &instruction->base);
16739 IrInstruction *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, name_field);
17766 ir_assert(name_field != nullptr, &instruction->base.base);
17767 IrInstGen *name_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, name_field);
1674017768 if (type_is_invalid(name_inst->value->type))
16741 return ira->codegen->invalid_instruction;
17769 return ira->codegen->invalid_inst_gen;
1674217770
1674317771 TypeStructField *linkage_field = find_struct_type_field(options_type, buf_create_from_str("linkage"));
16744 ir_assert(linkage_field != nullptr, &instruction->base);
16745 IrInstruction *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, linkage_field);
17772 ir_assert(linkage_field != nullptr, &instruction->base.base);
17773 IrInstGen *linkage_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, linkage_field);
1674617774 if (type_is_invalid(linkage_inst->value->type))
16747 return ira->codegen->invalid_instruction;
17775 return ira->codegen->invalid_inst_gen;
1674817776
1674917777 TypeStructField *section_field = find_struct_type_field(options_type, buf_create_from_str("section"));
16750 ir_assert(section_field != nullptr, &instruction->base);
16751 IrInstruction *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base, options, section_field);
17778 ir_assert(section_field != nullptr, &instruction->base.base);
17779 IrInstGen *section_inst = ir_analyze_struct_value_field_value(ira, &instruction->base.base, options, section_field);
1675217780 if (type_is_invalid(section_inst->value->type))
16753 return ira->codegen->invalid_instruction;
17781 return ira->codegen->invalid_inst_gen;
1675417782
1675517783 // The `section` field is optional, we have to unwrap it first
16756 IrInstruction *non_null_check = ir_analyze_test_non_null(ira, &instruction->base, section_inst);
17784 IrInstGen *non_null_check = ir_analyze_test_non_null(ira, &instruction->base.base, section_inst);
1675717785 bool is_non_null;
1675817786 if (!ir_resolve_bool(ira, non_null_check, &is_non_null))
16759 return ira->codegen->invalid_instruction;
17787 return ira->codegen->invalid_inst_gen;
1676017788
16761 IrInstruction *section_str_inst = nullptr;
17789 IrInstGen *section_str_inst = nullptr;
1676217790 if (is_non_null) {
16763 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base, section_inst, false);
17791 section_str_inst = ir_analyze_optional_value_payload_value(ira, &instruction->base.base, section_inst, false);
1676417792 if (type_is_invalid(section_str_inst->value->type))
16765 return ira->codegen->invalid_instruction;
17793 return ira->codegen->invalid_inst_gen;
1676617794 }
1676717795
1676817796 // Resolve all the comptime values
1676917797 Buf *symbol_name = ir_resolve_str(ira, name_inst);
1677017798 if (!symbol_name)
16771 return ira->codegen->invalid_instruction;
17799 return ira->codegen->invalid_inst_gen;
1677217800
1677317801 if (buf_len(symbol_name) < 1) {
16774 ir_add_error(ira, name_inst,
17802 ir_add_error(ira, &name_inst->base,
1677517803 buf_sprintf("exported symbol name cannot be empty"));
16776 return ira->codegen->invalid_instruction;
17804 return ira->codegen->invalid_inst_gen;
1677717805 }
1677817806
1677917807 GlobalLinkageId global_linkage_id;
1678017808 if (!ir_resolve_global_linkage(ira, linkage_inst, &global_linkage_id))
16781 return ira->codegen->invalid_instruction;
17809 return ira->codegen->invalid_inst_gen;
1678217810
1678317811 Buf *section_name = nullptr;
1678417812 if (section_str_inst != nullptr && !(section_name = ir_resolve_str(ira, section_str_inst)))
16785 return ira->codegen->invalid_instruction;
17813 return ira->codegen->invalid_inst_gen;
1678617814
1678717815 // TODO: This function needs to be audited.
1678817816 // It's not clear how all the different types are supposed to be handled.
......@@ -16790,15 +17818,15 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1679017818 // in another file.
1679117819 TldFn *tld_fn = allocate<TldFn>(1);
1679217820 tld_fn->base.id = TldIdFn;
16793 tld_fn->base.source_node = instruction->base.source_node;
17821 tld_fn->base.source_node = instruction->base.base.source_node;
1679417822
1679517823 auto entry = ira->codegen->exported_symbol_names.put_unique(symbol_name, &tld_fn->base);
1679617824 if (entry) {
1679717825 AstNode *other_export_node = entry->value->source_node;
16798 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
17826 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
1679917827 buf_sprintf("exported symbol collision: '%s'", buf_ptr(symbol_name)));
1680017828 add_error_note(ira->codegen, msg, other_export_node, buf_sprintf("other symbol is here"));
16801 return ira->codegen->invalid_instruction;
17829 return ira->codegen->invalid_inst_gen;
1680217830 }
1680317831
1680417832 Error err;
......@@ -16814,12 +17842,12 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1681417842 CallingConvention cc = fn_entry->type_entry->data.fn.fn_type_id.cc;
1681517843 switch (cc) {
1681617844 case CallingConventionUnspecified: {
16817 ErrorMsg *msg = ir_add_error(ira, target,
17845 ErrorMsg *msg = ir_add_error(ira, &target->base,
1681817846 buf_sprintf("exported function must specify calling convention"));
1681917847 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
1682017848 } break;
1682117849 case CallingConventionAsync: {
16822 ErrorMsg *msg = ir_add_error(ira, target,
17850 ErrorMsg *msg = ir_add_error(ira, &target->base,
1682317851 buf_sprintf("exported function cannot be async"));
1682417852 add_error_note(ira->codegen, msg, fn_entry->proto_node, buf_sprintf("declared here"));
1682517853 } break;
......@@ -16842,10 +17870,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1684217870 } break;
1684317871 case ZigTypeIdStruct:
1684417872 if (is_slice(target->value->type)) {
16845 ir_add_error(ira, target,
17873 ir_add_error(ira, &target->base,
1684617874 buf_sprintf("unable to export value of type '%s'", buf_ptr(&target->value->type->name)));
1684717875 } else if (target->value->type->data.structure.layout != ContainerLayoutExtern) {
16848 ErrorMsg *msg = ir_add_error(ira, target,
17876 ErrorMsg *msg = ir_add_error(ira, &target->base,
1684917877 buf_sprintf("exported struct value must be declared extern"));
1685017878 add_error_note(ira->codegen, msg, target->value->type->data.structure.decl_node, buf_sprintf("declared here"));
1685117879 } else {
......@@ -16854,7 +17882,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1685417882 break;
1685517883 case ZigTypeIdUnion:
1685617884 if (target->value->type->data.unionation.layout != ContainerLayoutExtern) {
16857 ErrorMsg *msg = ir_add_error(ira, target,
17885 ErrorMsg *msg = ir_add_error(ira, &target->base,
1685817886 buf_sprintf("exported union value must be declared extern"));
1685917887 add_error_note(ira->codegen, msg, target->value->type->data.unionation.decl_node, buf_sprintf("declared here"));
1686017888 } else {
......@@ -16863,7 +17891,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1686317891 break;
1686417892 case ZigTypeIdEnum:
1686517893 if (target->value->type->data.enumeration.layout != ContainerLayoutExtern) {
16866 ErrorMsg *msg = ir_add_error(ira, target,
17894 ErrorMsg *msg = ir_add_error(ira, &target->base,
1686717895 buf_sprintf("exported enum value must be declared extern"));
1686817896 add_error_note(ira->codegen, msg, target->value->type->data.enumeration.decl_node, buf_sprintf("declared here"));
1686917897 } else {
......@@ -16873,10 +17901,10 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1687317901 case ZigTypeIdArray: {
1687417902 bool ok_type;
1687517903 if ((err = type_allowed_in_extern(ira->codegen, target->value->type->data.array.child_type, &ok_type)))
16876 return ira->codegen->invalid_instruction;
17904 return ira->codegen->invalid_inst_gen;
1687717905
1687817906 if (!ok_type) {
16879 ir_add_error(ira, target,
17907 ir_add_error(ira, &target->base,
1688017908 buf_sprintf("array element type '%s' not extern-compatible",
1688117909 buf_ptr(&target->value->type->data.array.child_type->name)));
1688217910 } else {
......@@ -16891,31 +17919,31 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1689117919 zig_unreachable();
1689217920 case ZigTypeIdStruct:
1689317921 if (is_slice(type_value)) {
16894 ir_add_error(ira, target,
17922 ir_add_error(ira, &target->base,
1689517923 buf_sprintf("unable to export type '%s'", buf_ptr(&type_value->name)));
1689617924 } else if (type_value->data.structure.layout != ContainerLayoutExtern) {
16897 ErrorMsg *msg = ir_add_error(ira, target,
17925 ErrorMsg *msg = ir_add_error(ira, &target->base,
1689817926 buf_sprintf("exported struct must be declared extern"));
1689917927 add_error_note(ira->codegen, msg, type_value->data.structure.decl_node, buf_sprintf("declared here"));
1690017928 }
1690117929 break;
1690217930 case ZigTypeIdUnion:
1690317931 if (type_value->data.unionation.layout != ContainerLayoutExtern) {
16904 ErrorMsg *msg = ir_add_error(ira, target,
17932 ErrorMsg *msg = ir_add_error(ira, &target->base,
1690517933 buf_sprintf("exported union must be declared extern"));
1690617934 add_error_note(ira->codegen, msg, type_value->data.unionation.decl_node, buf_sprintf("declared here"));
1690717935 }
1690817936 break;
1690917937 case ZigTypeIdEnum:
1691017938 if (type_value->data.enumeration.layout != ContainerLayoutExtern) {
16911 ErrorMsg *msg = ir_add_error(ira, target,
17939 ErrorMsg *msg = ir_add_error(ira, &target->base,
1691217940 buf_sprintf("exported enum must be declared extern"));
1691317941 add_error_note(ira->codegen, msg, type_value->data.enumeration.decl_node, buf_sprintf("declared here"));
1691417942 }
1691517943 break;
1691617944 case ZigTypeIdFn: {
1691717945 if (type_value->data.fn.fn_type_id.cc == CallingConventionUnspecified) {
16918 ir_add_error(ira, target,
17946 ir_add_error(ira, &target->base,
1691917947 buf_sprintf("exported function type must specify calling convention"));
1692017948 }
1692117949 } break;
......@@ -16941,7 +17969,7 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1694117969 case ZigTypeIdOpaque:
1694217970 case ZigTypeIdFnFrame:
1694317971 case ZigTypeIdAnyFrame:
16944 ir_add_error(ira, target,
17972 ir_add_error(ira, &target->base,
1694517973 buf_sprintf("invalid export target '%s'", buf_ptr(&type_value->name)));
1694617974 break;
1694717975 }
......@@ -16966,61 +17994,55 @@ static IrInstruction *ir_analyze_instruction_export(IrAnalyze *ira, IrInstructio
1696617994 case ZigTypeIdEnumLiteral:
1696717995 case ZigTypeIdFnFrame:
1696817996 case ZigTypeIdAnyFrame:
16969 ir_add_error(ira, target,
17997 ir_add_error(ira, &target->base,
1697017998 buf_sprintf("invalid export target type '%s'", buf_ptr(&target->value->type->name)));
1697117999 break;
1697218000 }
1697318001
1697418002 // TODO audit the various ways to use @export
16975 if (want_var_export && target->id == IrInstructionIdLoadPtrGen) {
16976 IrInstructionLoadPtrGen *load_ptr = reinterpret_cast<IrInstructionLoadPtrGen *>(target);
16977 if (load_ptr->ptr->id == IrInstructionIdVarPtr) {
16978 IrInstructionVarPtr *var_ptr = reinterpret_cast<IrInstructionVarPtr *>(load_ptr->ptr);
18003 if (want_var_export && target->id == IrInstGenIdLoadPtr) {
18004 IrInstGenLoadPtr *load_ptr = reinterpret_cast<IrInstGenLoadPtr *>(target);
18005 if (load_ptr->ptr->id == IrInstGenIdVarPtr) {
18006 IrInstGenVarPtr *var_ptr = reinterpret_cast<IrInstGenVarPtr *>(load_ptr->ptr);
1697918007 ZigVar *var = var_ptr->var;
1698018008 add_var_export(ira->codegen, var, buf_ptr(symbol_name), global_linkage_id);
1698118009 var->section_name = section_name;
1698218010 }
1698318011 }
1698418012
16985 return ir_const_void(ira, &instruction->base);
18013 return ir_const_void(ira, &instruction->base.base);
1698618014}
1698718015
16988static bool exec_has_err_ret_trace(CodeGen *g, IrExecutable *exec) {
18016static bool exec_has_err_ret_trace(CodeGen *g, IrExecutableSrc *exec) {
1698918017 ZigFn *fn_entry = exec_fn_entry(exec);
1699018018 return fn_entry != nullptr && fn_entry->calls_or_awaits_errorable_fn && g->have_err_ret_tracing;
1699118019}
1699218020
16993static IrInstruction *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
16994 IrInstructionErrorReturnTrace *instruction)
18021static IrInstGen *ir_analyze_instruction_error_return_trace(IrAnalyze *ira,
18022 IrInstSrcErrorReturnTrace *instruction)
1699518023{
1699618024 ZigType *ptr_to_stack_trace_type = get_pointer_to_type(ira->codegen, get_stack_trace_type(ira->codegen), false);
16997 if (instruction->optional == IrInstructionErrorReturnTrace::Null) {
18025 if (instruction->optional == IrInstErrorReturnTraceNull) {
1699818026 ZigType *optional_type = get_optional_type(ira->codegen, ptr_to_stack_trace_type);
16999 if (!exec_has_err_ret_trace(ira->codegen, ira->new_irb.exec)) {
17000 IrInstruction *result = ir_const(ira, &instruction->base, optional_type);
18027 if (!exec_has_err_ret_trace(ira->codegen, ira->old_irb.exec)) {
18028 IrInstGen *result = ir_const(ira, &instruction->base.base, optional_type);
1700118029 ZigValue *out_val = result->value;
1700218030 assert(get_codegen_ptr_type(optional_type) != nullptr);
1700318031 out_val->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
1700418032 out_val->data.x_ptr.data.hard_coded_addr.addr = 0;
1700518033 return result;
1700618034 }
17007 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
17008 instruction->base.source_node, instruction->optional);
17009 new_instruction->value->type = optional_type;
17010 return new_instruction;
18035 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
18036 instruction->base.base.source_node, instruction->optional, optional_type);
1701118037 } else {
1701218038 assert(ira->codegen->have_err_ret_tracing);
17013 IrInstruction *new_instruction = ir_build_error_return_trace(&ira->new_irb, instruction->base.scope,
17014 instruction->base.source_node, instruction->optional);
17015 new_instruction->value->type = ptr_to_stack_trace_type;
17016 return new_instruction;
18039 return ir_build_error_return_trace_gen(ira, instruction->base.base.scope,
18040 instruction->base.base.source_node, instruction->optional, ptr_to_stack_trace_type);
1701718041 }
1701818042}
1701918043
17020static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
17021 IrInstructionErrorUnion *instruction)
17022{
17023 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
18044static IrInstGen *ir_analyze_instruction_error_union(IrAnalyze *ira, IrInstSrcErrorUnion *instruction) {
18045 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
1702418046 result->value->special = ConstValSpecialLazy;
1702518047
1702618048 LazyValueErrUnionType *lazy_err_union_type = allocate<LazyValueErrUnionType>(1, "LazyValueErrUnionType");
......@@ -17030,16 +18052,16 @@ static IrInstruction *ir_analyze_instruction_error_union(IrAnalyze *ira,
1703018052
1703118053 lazy_err_union_type->err_set_type = instruction->err_set->child;
1703218054 if (ir_resolve_type_lazy(ira, lazy_err_union_type->err_set_type) == nullptr)
17033 return ira->codegen->invalid_instruction;
18055 return ira->codegen->invalid_inst_gen;
1703418056
1703518057 lazy_err_union_type->payload_type = instruction->payload->child;
1703618058 if (ir_resolve_type_lazy(ira, lazy_err_union_type->payload_type) == nullptr)
17037 return ira->codegen->invalid_instruction;
18059 return ira->codegen->invalid_inst_gen;
1703818060
1703918061 return result;
1704018062}
1704118063
17042static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_inst, ZigType *var_type,
18064static IrInstGen *ir_analyze_alloca(IrAnalyze *ira, IrInst *source_inst, ZigType *var_type,
1704318065 uint32_t align, const char *name_hint, bool force_comptime)
1704418066{
1704518067 Error err;
......@@ -17048,7 +18070,7 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1704818070 pointee->special = ConstValSpecialUndef;
1704918071 pointee->llvm_align = align;
1705018072
17051 IrInstructionAllocaGen *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
18073 IrInstGenAlloca *result = ir_build_alloca_gen(ira, source_inst, align, name_hint);
1705218074 result->base.value->special = ConstValSpecialStatic;
1705318075 result->base.value->data.x_ptr.special = ConstPtrSpecialRef;
1705418076 result->base.value->data.x_ptr.mut = force_comptime ? ConstPtrMutComptimeVar : ConstPtrMutInfer;
......@@ -17056,15 +18078,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1705618078
1705718079 bool var_type_has_bits;
1705818080 if ((err = type_has_bits2(ira->codegen, var_type, &var_type_has_bits)))
17059 return ira->codegen->invalid_instruction;
18081 return ira->codegen->invalid_inst_gen;
1706018082 if (align != 0) {
1706118083 if ((err = type_resolve(ira->codegen, var_type, ResolveStatusAlignmentKnown)))
17062 return ira->codegen->invalid_instruction;
18084 return ira->codegen->invalid_inst_gen;
1706318085 if (!var_type_has_bits) {
1706418086 ir_add_error(ira, source_inst,
1706518087 buf_sprintf("variable '%s' of zero-bit type '%s' has no in-memory representation, it cannot be aligned",
1706618088 name_hint, buf_ptr(&var_type->name)));
17067 return ira->codegen->invalid_instruction;
18089 return ira->codegen->invalid_inst_gen;
1706818090 }
1706918091 }
1707018092 assert(result->base.value->data.x_ptr.special != ConstPtrSpecialInvalid);
......@@ -17074,16 +18096,15 @@ static IrInstruction *ir_analyze_alloca(IrAnalyze *ira, IrInstruction *source_in
1707418096 PtrLenSingle, align, 0, 0, false);
1707518097
1707618098 if (!force_comptime) {
17077 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
18099 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
1707818100 if (fn_entry != nullptr) {
1707918101 fn_entry->alloca_gen_list.append(result);
1708018102 }
1708118103 }
17082 result->base.is_gen = true;
1708318104 return &result->base;
1708418105}
1708518106
17086static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInstruction *suspend_source_instr,
18107static ZigType *ir_result_loc_expected_type(IrAnalyze *ira, IrInst *suspend_source_instr,
1708718108 ResultLoc *result_loc)
1708818109{
1708918110 switch (result_loc->id) {
......@@ -17126,7 +18147,7 @@ static bool type_can_bit_cast(ZigType *t) {
1712618147 }
1712718148}
1712818149
17129static void set_up_result_loc_for_inferred_comptime(IrInstruction *ptr) {
18150static void set_up_result_loc_for_inferred_comptime(IrInstGen *ptr) {
1713018151 ZigValue *undef_child = create_const_vals(1);
1713118152 undef_child->type = ptr->value->type->data.pointer.child_type;
1713218153 undef_child->special = ConstValSpecialUndef;
......@@ -17165,16 +18186,16 @@ static Error ir_result_has_type(IrAnalyze *ira, ResultLoc *result_loc, bool *out
1716518186 zig_unreachable();
1716618187}
1716718188
17168static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *suspend_source_instr,
18189static IrInstGen *ir_resolve_no_result_loc(IrAnalyze *ira, IrInst *suspend_source_instr,
1716918190 ResultLoc *result_loc, ZigType *value_type)
1717018191{
1717118192 if (type_is_invalid(value_type))
17172 return ira->codegen->invalid_instruction;
17173 IrInstructionAllocaGen *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
18193 return ira->codegen->invalid_inst_gen;
18194 IrInstGenAlloca *alloca_gen = ir_build_alloca_gen(ira, suspend_source_instr, 0, "");
1717418195 alloca_gen->base.value->type = get_pointer_to_type_extra(ira->codegen, value_type, false, false,
1717518196 PtrLenSingle, 0, 0, 0, false);
1717618197 set_up_result_loc_for_inferred_comptime(&alloca_gen->base);
17177 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
18198 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
1717818199 if (fn_entry != nullptr && get_scope_typeof(suspend_source_instr->scope) == nullptr) {
1717918200 fn_entry->alloca_gen_list.append(alloca_gen);
1718018201 }
......@@ -17184,8 +18205,8 @@ static IrInstruction *ir_resolve_no_result_loc(IrAnalyze *ira, IrInstruction *su
1718418205}
1718518206
1718618207// when calling this function, at the callsite must check for result type noreturn and propagate it up
17187static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspend_source_instr,
17188 ResultLoc *result_loc, ZigType *value_type, IrInstruction *value, bool force_runtime,
18208static IrInstGen *ir_resolve_result_raw(IrAnalyze *ira, IrInst *suspend_source_instr,
18209 ResultLoc *result_loc, ZigType *value_type, IrInstGen *value, bool force_runtime,
1718918210 bool allow_discard)
1719018211{
1719118212 Error err;
......@@ -17210,10 +18231,8 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1721018231 }
1721118232 case ResultLocIdVar: {
1721218233 ResultLocVar *result_loc_var = reinterpret_cast<ResultLocVar *>(result_loc);
17213 assert(result_loc->source_instruction->id == IrInstructionIdAllocaSrc);
17214
17215 IrInstructionAllocaSrc *alloca_src =
17216 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
18234 assert(result_loc->source_instruction->id == IrInstSrcIdAlloca);
18235 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
1721718236
1721818237 ZigVar *var = result_loc_var->var;
1721918238 if (var->var_type != nullptr && !ir_get_var_is_comptime(var)) {
......@@ -17231,26 +18250,26 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1723118250 var = new_var;
1723218251 }
1723318252 if (value_type->id == ZigTypeIdUnreachable || value_type->id == ZigTypeIdOpaque) {
17234 ir_add_error(ira, result_loc->source_instruction,
18253 ir_add_error(ira, &result_loc->source_instruction->base,
1723518254 buf_sprintf("variable of type '%s' not allowed", buf_ptr(&value_type->name)));
17236 return ira->codegen->invalid_instruction;
18255 return ira->codegen->invalid_inst_gen;
1723718256 }
1723818257 if (alloca_src->base.child == nullptr || var->ptr_instruction == nullptr) {
1723918258 bool force_comptime;
1724018259 if (!ir_resolve_comptime(ira, alloca_src->is_comptime->child, &force_comptime))
17241 return ira->codegen->invalid_instruction;
18260 return ira->codegen->invalid_inst_gen;
1724218261 uint32_t align = 0;
1724318262 if (alloca_src->align != nullptr && !ir_resolve_align(ira, alloca_src->align->child, nullptr, &align)) {
17244 return ira->codegen->invalid_instruction;
18263 return ira->codegen->invalid_inst_gen;
1724518264 }
17246 IrInstruction *alloca_gen = ir_analyze_alloca(ira, result_loc->source_instruction,
17247 value_type, align, alloca_src->name_hint, force_comptime);
18265 IrInstGen *alloca_gen = ir_analyze_alloca(ira, &result_loc->source_instruction->base, value_type,
18266 align, alloca_src->name_hint, force_comptime);
1724818267 if (force_runtime) {
1724918268 alloca_gen->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
1725018269 alloca_gen->value->special = ConstValSpecialRuntime;
1725118270 }
1725218271 if (alloca_src->base.child != nullptr && !result_loc->written) {
17253 alloca_src->base.child->ref_count = 0;
18272 alloca_src->base.child->base.ref_count = 0;
1725418273 }
1725518274 alloca_src->base.child = alloca_gen;
1725618275 var->ptr_instruction = alloca_gen;
......@@ -17278,7 +18297,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1727818297 ResultLocPeerParent *peer_parent = result_peer->parent;
1727918298
1728018299 if (peer_parent->peers.length == 1) {
17281 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18300 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
1728218301 value_type, value, force_runtime, true);
1728318302 result_peer->suspend_pos.basic_block_index = SIZE_MAX;
1728418303 result_peer->suspend_pos.instruction_index = SIZE_MAX;
......@@ -17294,7 +18313,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1729418313
1729518314 bool is_condition_comptime;
1729618315 if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_condition_comptime))
17297 return ira->codegen->invalid_instruction;
18316 return ira->codegen->invalid_inst_gen;
1729818317 if (is_condition_comptime) {
1729918318 peer_parent->skipped = true;
1730018319 return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
......@@ -17302,10 +18321,10 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1730218321 }
1730318322 bool peer_parent_has_type;
1730418323 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
17305 return ira->codegen->invalid_instruction;
18324 return ira->codegen->invalid_inst_gen;
1730618325 if (peer_parent_has_type) {
1730718326 peer_parent->skipped = true;
17308 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18327 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
1730918328 value_type, value, force_runtime || !is_condition_comptime, true);
1731018329 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1731118330 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
......@@ -17322,7 +18341,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1732218341 if (peer_parent->end_bb->suspend_instruction_ref == nullptr) {
1732318342 peer_parent->end_bb->suspend_instruction_ref = suspend_source_instr;
1732418343 }
17325 IrInstruction *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
18344 IrInstGen *unreach_inst = ira_suspend(ira, suspend_source_instr, result_peer->next_bb,
1732618345 &result_peer->suspend_pos);
1732718346 if (result_peer->next_bb == nullptr) {
1732818347 ir_start_next_bb(ira);
......@@ -17330,7 +18349,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1733018349 return unreach_inst;
1733118350 }
1733218351
17333 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
18352 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
1733418353 peer_parent->resolved_type, nullptr, force_runtime, true);
1733518354 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1733618355 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
......@@ -17347,23 +18366,23 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1734718366 ResultLocCast *result_cast = reinterpret_cast<ResultLocCast *>(result_loc);
1734818367 ZigType *dest_type = ir_resolve_type(ira, result_cast->base.source_instruction->child);
1734918368 if (type_is_invalid(dest_type))
17350 return ira->codegen->invalid_instruction;
18369 return ira->codegen->invalid_inst_gen;
1735118370
1735218371 if (dest_type == ira->codegen->builtin_types.entry_var) {
1735318372 return ir_resolve_no_result_loc(ira, suspend_source_instr, result_loc, value_type);
1735418373 }
1735518374
17356 IrInstruction *casted_value;
18375 IrInstGen *casted_value;
1735718376 if (value != nullptr) {
1735818377 casted_value = ir_implicit_cast(ira, value, dest_type);
1735918378 if (type_is_invalid(casted_value->value->type))
17360 return ira->codegen->invalid_instruction;
18379 return ira->codegen->invalid_inst_gen;
1736118380 dest_type = casted_value->value->type;
1736218381 } else {
1736318382 casted_value = nullptr;
1736418383 }
1736518384
17366 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
18385 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_cast->parent,
1736718386 dest_type, casted_value, force_runtime, true);
1736818387 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1736918388 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
......@@ -17377,11 +18396,11 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1737718396 if ((err = type_resolve(ira->codegen, parent_ptr_type->data.pointer.child_type,
1737818397 ResolveStatusAlignmentKnown)))
1737918398 {
17380 return ira->codegen->invalid_instruction;
18399 return ira->codegen->invalid_inst_gen;
1738118400 }
1738218401 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
1738318402 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17384 return ira->codegen->invalid_instruction;
18403 return ira->codegen->invalid_inst_gen;
1738518404 }
1738618405 if (!type_has_bits(value_type)) {
1738718406 parent_ptr_align = 0;
......@@ -17404,9 +18423,9 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1740418423
1740518424 ConstCastOnly const_cast_result = types_match_const_cast_only(ira,
1740618425 parent_result_loc->value->type, ptr_type,
17407 result_cast->base.source_instruction->source_node, false);
18426 result_cast->base.source_instruction->base.source_node, false);
1740818427 if (const_cast_result.id == ConstCastResultIdInvalid)
17409 return ira->codegen->invalid_instruction;
18428 return ira->codegen->invalid_inst_gen;
1741018429 if (const_cast_result.id != ConstCastResultIdOk) {
1741118430 if (allow_discard) {
1741218431 return parent_result_loc;
......@@ -17419,42 +18438,42 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1741918438
1742018439 result_loc->written = true;
1742118440 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17422 ptr_type, result_cast->base.source_instruction, false);
18441 ptr_type, &result_cast->base.source_instruction->base, false);
1742318442 return result_loc->resolved_loc;
1742418443 }
1742518444 case ResultLocIdBitCast: {
1742618445 ResultLocBitCast *result_bit_cast = reinterpret_cast<ResultLocBitCast *>(result_loc);
1742718446 ZigType *dest_type = ir_resolve_type(ira, result_bit_cast->base.source_instruction->child);
1742818447 if (type_is_invalid(dest_type))
17429 return ira->codegen->invalid_instruction;
18448 return ira->codegen->invalid_inst_gen;
1743018449
1743118450 if (get_codegen_ptr_type(dest_type) != nullptr) {
17432 ir_add_error(ira, result_loc->source_instruction,
18451 ir_add_error(ira, &result_loc->source_instruction->base,
1743318452 buf_sprintf("unable to @bitCast to pointer type '%s'", buf_ptr(&dest_type->name)));
17434 return ira->codegen->invalid_instruction;
18453 return ira->codegen->invalid_inst_gen;
1743518454 }
1743618455
1743718456 if (!type_can_bit_cast(dest_type)) {
17438 ir_add_error(ira, result_loc->source_instruction,
18457 ir_add_error(ira, &result_loc->source_instruction->base,
1743918458 buf_sprintf("unable to @bitCast to type '%s'", buf_ptr(&dest_type->name)));
17440 return ira->codegen->invalid_instruction;
18459 return ira->codegen->invalid_inst_gen;
1744118460 }
1744218461
1744318462 if (get_codegen_ptr_type(value_type) != nullptr) {
1744418463 ir_add_error(ira, suspend_source_instr,
1744518464 buf_sprintf("unable to @bitCast from pointer type '%s'", buf_ptr(&value_type->name)));
17446 return ira->codegen->invalid_instruction;
18465 return ira->codegen->invalid_inst_gen;
1744718466 }
1744818467
1744918468 if (!type_can_bit_cast(value_type)) {
1745018469 ir_add_error(ira, suspend_source_instr,
1745118470 buf_sprintf("unable to @bitCast from type '%s'", buf_ptr(&value_type->name)));
17452 return ira->codegen->invalid_instruction;
18471 return ira->codegen->invalid_inst_gen;
1745318472 }
1745418473
17455 IrInstruction *bitcasted_value;
18474 IrInstGen *bitcasted_value;
1745618475 if (value != nullptr) {
17457 bitcasted_value = ir_analyze_bit_cast(ira, result_loc->source_instruction, value, dest_type);
18476 bitcasted_value = ir_analyze_bit_cast(ira, &result_loc->source_instruction->base, value, dest_type);
1745818477 dest_type = bitcasted_value->value->type;
1745918478 } else {
1746018479 bitcasted_value = nullptr;
......@@ -17464,7 +18483,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1746418483 return bitcasted_value;
1746518484 }
1746618485
17467 IrInstruction *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
18486 IrInstGen *parent_result_loc = ir_resolve_result(ira, suspend_source_instr, result_bit_cast->parent,
1746818487 dest_type, bitcasted_value, force_runtime, true);
1746918488 if (parent_result_loc == nullptr || type_is_invalid(parent_result_loc->value->type) ||
1747018489 parent_result_loc->value->type->id == ZigTypeIdUnreachable)
......@@ -17477,7 +18496,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1747718496
1747818497 bool has_bits;
1747918498 if ((err = type_has_bits2(ira->codegen, child_type, &has_bits))) {
17480 return ira->codegen->invalid_instruction;
18499 return ira->codegen->invalid_inst_gen;
1748118500 }
1748218501
1748318502 // This happens when the bitCast result is assigned to _
......@@ -17487,12 +18506,12 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1748718506 }
1748818507
1748918508 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusAlignmentKnown))) {
17490 return ira->codegen->invalid_instruction;
18509 return ira->codegen->invalid_inst_gen;
1749118510 }
1749218511
1749318512 uint64_t parent_ptr_align = get_ptr_align(ira->codegen, parent_ptr_type);
1749418513 if ((err = type_resolve(ira->codegen, value_type, ResolveStatusAlignmentKnown))) {
17495 return ira->codegen->invalid_instruction;
18514 return ira->codegen->invalid_inst_gen;
1749618515 }
1749718516 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, value_type,
1749818517 parent_ptr_type->data.pointer.is_const, parent_ptr_type->data.pointer.is_volatile, PtrLenSingle,
......@@ -17500,30 +18519,37 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
1750018519
1750118520 result_loc->written = true;
1750218521 result_loc->resolved_loc = ir_analyze_ptr_cast(ira, suspend_source_instr, parent_result_loc,
17503 ptr_type, result_bit_cast->base.source_instruction, false);
18522 ptr_type, &result_bit_cast->base.source_instruction->base, false);
1750418523 return result_loc->resolved_loc;
1750518524 }
1750618525 }
1750718526 zig_unreachable();
1750818527}
1750918528
17510static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_source_instr,
17511 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstruction *value, bool force_runtime,
18529static IrInstGen *ir_resolve_result(IrAnalyze *ira, IrInst *suspend_source_instr,
18530 ResultLoc *result_loc_pass1, ZigType *value_type, IrInstGen *value, bool force_runtime,
1751218531 bool allow_discard)
1751318532{
1751418533 Error err;
1751518534 if (!allow_discard && result_loc_pass1->id == ResultLocIdInstruction &&
17516 instr_is_comptime(result_loc_pass1->source_instruction) &&
17517 result_loc_pass1->source_instruction->value->type->id == ZigTypeIdPointer &&
17518 result_loc_pass1->source_instruction->value->data.x_ptr.special == ConstPtrSpecialDiscard)
18535 result_loc_pass1->source_instruction->id == IrInstSrcIdConst)
1751918536 {
17520 result_loc_pass1 = no_result_loc();
18537 IrInstSrcConst *const_inst = reinterpret_cast<IrInstSrcConst *>(result_loc_pass1->source_instruction);
18538 if (value_is_comptime(const_inst->value) &&
18539 const_inst->value->type->id == ZigTypeIdPointer &&
18540 const_inst->value->data.x_ptr.special == ConstPtrSpecialDiscard)
18541 {
18542 result_loc_pass1 = no_result_loc();
18543 }
1752118544 }
1752218545 bool was_written = result_loc_pass1->written;
17523 IrInstruction *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
18546 IrInstGen *result_loc = ir_resolve_result_raw(ira, suspend_source_instr, result_loc_pass1, value_type,
1752418547 value, force_runtime, allow_discard);
17525 if (result_loc == nullptr || (instr_is_unreachable(result_loc) || type_is_invalid(result_loc->value->type)))
18548 if (result_loc == nullptr || result_loc->value->type->id == ZigTypeIdUnreachable ||
18549 type_is_invalid(result_loc->value->type))
18550 {
1752618551 return result_loc;
18552 }
1752718553
1752818554 if ((force_runtime || (value != nullptr && !instr_is_comptime(value))) &&
1752918555 result_loc_pass1->written && result_loc->value->data.x_ptr.mut == ConstPtrMutInfer)
......@@ -17534,7 +18560,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1753418560 InferredStructField *isf = result_loc->value->type->data.pointer.inferred_struct_field;
1753518561 if (isf != nullptr) {
1753618562 TypeStructField *field;
17537 IrInstruction *casted_ptr;
18563 IrInstGen *casted_ptr;
1753818564 if (isf->already_resolved) {
1753918565 field = find_struct_type_field(isf->inferred_struct_type, isf->field_name);
1754018566 casted_ptr = result_loc;
......@@ -17552,11 +18578,11 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1755218578 field->type_entry = value_type;
1755318579 field->type_val = create_const_type(ira->codegen, field->type_entry);
1755418580 field->src_index = old_field_count;
17555 field->decl_node = value ? value->source_node : suspend_source_instr->source_node;
18581 field->decl_node = value ? value->base.source_node : suspend_source_instr->source_node;
1755618582 if (value && instr_is_comptime(value)) {
1755718583 ZigValue *val = ir_resolve_const(ira, value, UndefOk);
1755818584 if (!val)
17559 return ira->codegen->invalid_instruction;
18585 return ira->codegen->invalid_inst_gen;
1756018586 field->is_comptime = true;
1756118587 field->init_val = create_const_vals(1);
1756218588 copy_const_val(field->init_val, val);
......@@ -17574,7 +18600,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1757418600 if (instr_is_comptime(casted_ptr)) {
1757518601 ZigValue *ptr_val = ir_resolve_const(ira, casted_ptr, UndefBad);
1757618602 if (!ptr_val)
17577 return ira->codegen->invalid_instruction;
18603 return ira->codegen->invalid_inst_gen;
1757818604 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
1757918605 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val,
1758018606 suspend_source_instr->source_node);
......@@ -17610,7 +18636,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1761018636 if (!same_comptime_repr) {
1761118637 bool has_bits;
1761218638 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17613 return ira->codegen->invalid_instruction;
18639 return ira->codegen->invalid_inst_gen;
1761418640 if (has_bits) {
1761518641 result_loc_pass1->written = false;
1761618642 return ir_analyze_unwrap_optional_payload(ira, suspend_source_instr, result_loc, false, true);
......@@ -17619,12 +18645,12 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1761918645 } else if (actual_elem_type->id == ZigTypeIdErrorUnion && value_type->id != ZigTypeIdErrorUnion) {
1762018646 bool has_bits;
1762118647 if ((err = type_has_bits2(ira->codegen, value_type, &has_bits)))
17622 return ira->codegen->invalid_instruction;
18648 return ira->codegen->invalid_inst_gen;
1762318649 if (has_bits) {
1762418650 if (value_type->id == ZigTypeIdErrorSet) {
1762518651 return ir_analyze_unwrap_err_code(ira, suspend_source_instr, result_loc, true);
1762618652 } else {
17627 IrInstruction *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
18653 IrInstGen *unwrapped_err_ptr = ir_analyze_unwrap_error_payload(ira, suspend_source_instr,
1762818654 result_loc, false, true);
1762918655 ZigType *actual_payload_type = actual_elem_type->data.error_union.payload_type;
1763018656 if (actual_payload_type->id == ZigTypeIdOptional && value_type->id != ZigTypeIdOptional &&
......@@ -17640,37 +18666,35 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
1764018666 return result_loc;
1764118667}
1764218668
17643static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
17644 IrInstructionResolveResult *instruction)
17645{
18669static IrInstGen *ir_analyze_instruction_resolve_result(IrAnalyze *ira, IrInstSrcResolveResult *instruction) {
1764618670 ZigType *implicit_elem_type;
1764718671 if (instruction->ty == nullptr) {
1764818672 if (instruction->result_loc->id == ResultLocIdCast) {
1764918673 implicit_elem_type = ir_resolve_type(ira,
1765018674 instruction->result_loc->source_instruction->child);
1765118675 if (type_is_invalid(implicit_elem_type))
17652 return ira->codegen->invalid_instruction;
18676 return ira->codegen->invalid_inst_gen;
1765318677 } else if (instruction->result_loc->id == ResultLocIdReturn) {
1765418678 implicit_elem_type = ira->explicit_return_type;
1765518679 if (type_is_invalid(implicit_elem_type))
17656 return ira->codegen->invalid_instruction;
18680 return ira->codegen->invalid_inst_gen;
1765718681 } else {
1765818682 implicit_elem_type = ira->codegen->builtin_types.entry_var;
1765918683 }
1766018684 if (implicit_elem_type == ira->codegen->builtin_types.entry_var) {
1766118685 Buf *bare_name = buf_alloc();
1766218686 Buf *name = get_anon_type_name(ira->codegen, nullptr, container_string(ContainerKindStruct),
17663 instruction->base.scope, instruction->base.source_node, bare_name);
18687 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
1766418688
1766518689 StructSpecial struct_special = StructSpecialInferredStruct;
17666 if (instruction->base.source_node->type == NodeTypeContainerInitExpr &&
17667 instruction->base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
18690 if (instruction->base.base.source_node->type == NodeTypeContainerInitExpr &&
18691 instruction->base.base.source_node->data.container_init_expr.kind == ContainerInitKindArray)
1766818692 {
1766918693 struct_special = StructSpecialInferredTuple;
1767018694 }
1767118695
1767218696 ZigType *inferred_struct_type = get_partial_container_type(ira->codegen,
17673 instruction->base.scope, ContainerKindStruct, instruction->base.source_node,
18697 instruction->base.base.scope, ContainerKindStruct, instruction->base.base.source_node,
1767418698 buf_ptr(name), bare_name, ContainerLayoutAuto);
1767518699 inferred_struct_type->data.structure.special = struct_special;
1767618700 inferred_struct_type->data.structure.resolve_status = ResolveStatusBeingInferred;
......@@ -17679,21 +18703,21 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
1767918703 } else {
1768018704 implicit_elem_type = ir_resolve_type(ira, instruction->ty->child);
1768118705 if (type_is_invalid(implicit_elem_type))
17682 return ira->codegen->invalid_instruction;
18706 return ira->codegen->invalid_inst_gen;
1768318707 }
17684 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
18708 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
1768518709 implicit_elem_type, nullptr, false, true);
1768618710 if (result_loc != nullptr)
1768718711 return result_loc;
1768818712
17689 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
18713 ZigFn *fn = ira->new_irb.exec->fn_entry;
1769018714 if (fn != nullptr && fn->type_entry->data.fn.fn_type_id.cc == CallingConventionAsync &&
1769118715 instruction->result_loc->id == ResultLocIdReturn)
1769218716 {
17693 result_loc = ir_resolve_result(ira, &instruction->base, no_result_loc(),
18717 result_loc = ir_resolve_result(ira, &instruction->base.base, no_result_loc(),
1769418718 implicit_elem_type, nullptr, false, true);
1769518719 if (result_loc != nullptr &&
17696 (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
18720 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
1769718721 {
1769818722 return result_loc;
1769918723 }
......@@ -17701,9 +18725,9 @@ static IrInstruction *ir_analyze_instruction_resolve_result(IrAnalyze *ira,
1770118725 return result_loc;
1770218726 }
1770318727
17704 IrInstruction *result = ir_const(ira, &instruction->base, implicit_elem_type);
18728 IrInstGen *result = ir_const(ira, &instruction->base.base, implicit_elem_type);
1770518729 result->value->special = ConstValSpecialUndef;
17706 IrInstruction *ptr = ir_get_ref(ira, &instruction->base, result, false, false);
18730 IrInstGen *ptr = ir_get_ref(ira, &instruction->base.base, result, false, false);
1770718731 ptr->value->data.x_ptr.mut = ConstPtrMutComptimeVar;
1770818732 return ptr;
1770918733}
......@@ -17727,8 +18751,7 @@ static void ir_reset_result(ResultLoc *result_loc) {
1772718751 break;
1772818752 }
1772918753 case ResultLocIdVar: {
17730 IrInstructionAllocaSrc *alloca_src =
17731 reinterpret_cast<IrInstructionAllocaSrc *>(result_loc->source_instruction);
18754 IrInstSrcAlloca *alloca_src = reinterpret_cast<IrInstSrcAlloca *>(result_loc->source_instruction);
1773218755 alloca_src->base.child = nullptr;
1773318756 break;
1773418757 }
......@@ -17744,18 +18767,18 @@ static void ir_reset_result(ResultLoc *result_loc) {
1774418767 }
1774518768}
1774618769
17747static IrInstruction *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstructionResetResult *instruction) {
18770static IrInstGen *ir_analyze_instruction_reset_result(IrAnalyze *ira, IrInstSrcResetResult *instruction) {
1774818771 ir_reset_result(instruction->result_loc);
17749 return ir_const_void(ira, &instruction->base);
18772 return ir_const_void(ira, &instruction->base.base);
1775018773}
1775118774
17752static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *source_instr,
17753 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstruction **args_ptr, size_t args_len,
17754 IrInstruction *ret_ptr_uncasted)
18775static IrInstGen *get_async_call_result_loc(IrAnalyze *ira, IrInst* source_instr,
18776 ZigType *fn_ret_type, bool is_async_call_builtin, IrInstGen **args_ptr, size_t args_len,
18777 IrInstGen *ret_ptr_uncasted)
1775518778{
1775618779 ir_assert(is_async_call_builtin, source_instr);
1775718780 if (type_is_invalid(ret_ptr_uncasted->value->type))
17758 return ira->codegen->invalid_instruction;
18781 return ira->codegen->invalid_inst_gen;
1775918782 if (ret_ptr_uncasted->value->type->id == ZigTypeIdVoid) {
1776018783 // Result location will be inside the async frame.
1776118784 return nullptr;
......@@ -17763,57 +18786,57 @@ static IrInstruction *get_async_call_result_loc(IrAnalyze *ira, IrInstruction *s
1776318786 return ir_implicit_cast(ira, ret_ptr_uncasted, get_pointer_to_type(ira->codegen, fn_ret_type, false));
1776418787}
1776518788
17766static IrInstruction *ir_analyze_async_call(IrAnalyze *ira, IrInstruction *source_instr, ZigFn *fn_entry,
17767 ZigType *fn_type, IrInstruction *fn_ref, IrInstruction **casted_args, size_t arg_count,
17768 IrInstruction *casted_new_stack, bool is_async_call_builtin, IrInstruction *ret_ptr_uncasted,
18789static IrInstGen *ir_analyze_async_call(IrAnalyze *ira, IrInst* source_instr, ZigFn *fn_entry,
18790 ZigType *fn_type, IrInstGen *fn_ref, IrInstGen **casted_args, size_t arg_count,
18791 IrInstGen *casted_new_stack, bool is_async_call_builtin, IrInstGen *ret_ptr_uncasted,
1776918792 ResultLoc *call_result_loc)
1777018793{
1777118794 if (fn_entry == nullptr) {
1777218795 if (fn_type->data.fn.fn_type_id.cc != CallingConventionAsync) {
17773 ir_add_error(ira, fn_ref,
18796 ir_add_error(ira, &fn_ref->base,
1777418797 buf_sprintf("expected async function, found '%s'", buf_ptr(&fn_type->name)));
17775 return ira->codegen->invalid_instruction;
18798 return ira->codegen->invalid_inst_gen;
1777618799 }
1777718800 if (casted_new_stack == nullptr) {
17778 ir_add_error(ira, fn_ref, buf_sprintf("function is not comptime-known; @asyncCall required"));
17779 return ira->codegen->invalid_instruction;
18801 ir_add_error(ira, &fn_ref->base, buf_sprintf("function is not comptime-known; @asyncCall required"));
18802 return ira->codegen->invalid_inst_gen;
1778018803 }
1778118804 }
1778218805 if (casted_new_stack != nullptr) {
1778318806 ZigType *fn_ret_type = fn_type->data.fn.fn_type_id.return_type;
17784 IrInstruction *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
18807 IrInstGen *ret_ptr = get_async_call_result_loc(ira, source_instr, fn_ret_type, is_async_call_builtin,
1778518808 casted_args, arg_count, ret_ptr_uncasted);
1778618809 if (ret_ptr != nullptr && type_is_invalid(ret_ptr->value->type))
17787 return ira->codegen->invalid_instruction;
18810 return ira->codegen->invalid_inst_gen;
1778818811
1778918812 ZigType *anyframe_type = get_any_frame_type(ira->codegen, fn_ret_type);
1779018813
17791 IrInstructionCallGen *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
18814 IrInstGenCall *call_gen = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
1779218815 arg_count, casted_args, CallModifierAsync, casted_new_stack,
1779318816 is_async_call_builtin, ret_ptr, anyframe_type);
1779418817 return &call_gen->base;
1779518818 } else {
1779618819 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn_entry);
17797 IrInstruction *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
18820 IrInstGen *result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
1779818821 frame_type, nullptr, true, false);
17799 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
18822 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1780018823 return result_loc;
1780118824 }
1780218825 result_loc = ir_implicit_cast(ira, result_loc, get_pointer_to_type(ira->codegen, frame_type, false));
1780318826 if (type_is_invalid(result_loc->value->type))
17804 return ira->codegen->invalid_instruction;
18827 return ira->codegen->invalid_inst_gen;
1780518828 return &ir_build_call_gen(ira, source_instr, fn_entry, fn_ref, arg_count,
1780618829 casted_args, CallModifierAsync, casted_new_stack,
1780718830 is_async_call_builtin, result_loc, frame_type)->base;
1780818831 }
1780918832}
1781018833static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17811 IrInstruction *arg, Scope **exec_scope, size_t *next_proto_i)
18834 IrInstGen *arg, Scope **exec_scope, size_t *next_proto_i)
1781218835{
1781318836 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
1781418837 assert(param_decl_node->type == NodeTypeParamDecl);
1781518838
17816 IrInstruction *casted_arg;
18839 IrInstGen *casted_arg;
1781718840 if (param_decl_node->data.param_decl.var_token == nullptr) {
1781818841 AstNode *param_type_node = param_decl_node->data.param_decl.type;
1781918842 ZigType *param_type = ir_analyze_type_expr(ira, *exec_scope, param_type_node);
......@@ -17841,15 +18864,15 @@ static bool ir_analyze_fn_call_inline_arg(IrAnalyze *ira, AstNode *fn_proto_node
1784118864}
1784218865
1784318866static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_node,
17844 IrInstruction *arg, Scope **child_scope, size_t *next_proto_i,
17845 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstruction **casted_args,
18867 IrInstGen *arg, Scope **child_scope, size_t *next_proto_i,
18868 GenericFnTypeId *generic_id, FnTypeId *fn_type_id, IrInstGen **casted_args,
1784618869 ZigFn *impl_fn)
1784718870{
1784818871 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(*next_proto_i);
1784918872 assert(param_decl_node->type == NodeTypeParamDecl);
1785018873 bool is_var_args = param_decl_node->data.param_decl.is_var_args;
1785118874 bool arg_part_of_generic_id = false;
17852 IrInstruction *casted_arg;
18875 IrInstGen *casted_arg;
1785318876 if (is_var_args) {
1785418877 arg_part_of_generic_id = true;
1785518878 casted_arg = arg;
......@@ -17909,7 +18932,7 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
1790918932 } else if (casted_arg->value->type->id == ZigTypeIdComptimeInt ||
1791018933 casted_arg->value->type->id == ZigTypeIdComptimeFloat)
1791118934 {
17912 ir_add_error(ira, casted_arg,
18935 ir_add_error(ira, &casted_arg->base,
1791318936 buf_sprintf("compiler bug: integer and float literals in var args function must be casted. https://github.com/ziglang/zig/issues/557"));
1791418937 return false;
1791518938 }
......@@ -17926,13 +18949,13 @@ static bool ir_analyze_fn_call_generic_arg(IrAnalyze *ira, AstNode *fn_proto_nod
1792618949 return true;
1792718950}
1792818951
17929static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction, ZigVar *var) {
18952static IrInstGen *ir_get_var_ptr(IrAnalyze *ira, IrInst *source_instr, ZigVar *var) {
1793018953 while (var->next_var != nullptr) {
1793118954 var = var->next_var;
1793218955 }
1793318956
1793418957 if (var->var_type == nullptr || type_is_invalid(var->var_type))
17935 return ira->codegen->invalid_instruction;
18958 return ira->codegen->invalid_inst_gen;
1793618959
1793718960 bool is_volatile = false;
1793818961 ZigType *var_ptr_type = get_pointer_to_type_extra(ira->codegen, var->var_type,
......@@ -17945,8 +18968,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
1794518968 bool comptime_var_mem = ir_get_var_is_comptime(var);
1794618969 bool linkage_makes_it_runtime = var->decl_node->data.variable_declaration.is_extern;
1794718970
17948 IrInstruction *result = ir_build_var_ptr(&ira->new_irb,
17949 instruction->scope, instruction->source_node, var);
18971 IrInstGen *result = ir_build_var_ptr_gen(ira, source_instr, var);
1795018972 result->value->type = var_ptr_type;
1795118973
1795218974 if (!linkage_makes_it_runtime && !var->is_thread_local && value_is_comptime(var->const_value)) {
......@@ -17982,7 +19004,7 @@ static IrInstruction *ir_get_var_ptr(IrAnalyze *ira, IrInstruction *instruction,
1798219004}
1798319005
1798419006// This function is called when a comptime value becomes accessible at runtime.
17985static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *val) {
19007static void mark_comptime_value_escape(IrAnalyze *ira, IrInst* source_instr, ZigValue *val) {
1798619008 ir_assert(value_is_comptime(val), source_instr);
1798719009 if (val->special == ConstValSpecialUndef)
1798819010 return;
......@@ -17995,8 +19017,8 @@ static void mark_comptime_value_escape(IrAnalyze *ira, IrInstruction *source_ins
1799519017 }
1799619018}
1799719019
17998static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source_instr,
17999 IrInstruction *ptr, IrInstruction *uncasted_value, bool allow_write_through_const)
19020static IrInstGen *ir_analyze_store_ptr(IrAnalyze *ira, IrInst* source_instr,
19021 IrInstGen *ptr, IrInstGen *uncasted_value, bool allow_write_through_const)
1800019022{
1800119023 assert(ptr->value->type->id == ZigTypeIdPointer);
1800219024
......@@ -18005,24 +19027,24 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1800519027 uncasted_value->value->type->id == ZigTypeIdErrorSet)
1800619028 {
1800719029 ir_add_error(ira, source_instr, buf_sprintf("error is discarded"));
18008 return ira->codegen->invalid_instruction;
19030 return ira->codegen->invalid_inst_gen;
1800919031 }
1801019032 return ir_const_void(ira, source_instr);
1801119033 }
1801219034
1801319035 if (ptr->value->type->data.pointer.is_const && !allow_write_through_const) {
1801419036 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18015 return ira->codegen->invalid_instruction;
19037 return ira->codegen->invalid_inst_gen;
1801619038 }
1801719039
1801819040 ZigType *child_type = ptr->value->type->data.pointer.child_type;
18019 IrInstruction *value = ir_implicit_cast(ira, uncasted_value, child_type);
18020 if (value == ira->codegen->invalid_instruction)
18021 return ira->codegen->invalid_instruction;
19041 IrInstGen *value = ir_implicit_cast(ira, uncasted_value, child_type);
19042 if (type_is_invalid(value->value->type))
19043 return ira->codegen->invalid_inst_gen;
1802219044
1802319045 switch (type_has_one_possible_value(ira->codegen, child_type)) {
1802419046 case OnePossibleValueInvalid:
18025 return ira->codegen->invalid_instruction;
19047 return ira->codegen->invalid_inst_gen;
1802619048 case OnePossibleValueYes:
1802719049 return ir_const_void(ira, source_instr);
1802819050 case OnePossibleValueNo:
......@@ -18032,7 +19054,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1803219054 if (instr_is_comptime(ptr) && ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
1803319055 if (!allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) {
1803419056 ir_add_error(ira, source_instr, buf_sprintf("cannot assign to constant"));
18035 return ira->codegen->invalid_instruction;
19057 return ira->codegen->invalid_inst_gen;
1803619058 }
1803719059 if ((allow_write_through_const && ptr->value->data.x_ptr.mut == ConstPtrMutComptimeConst) ||
1803819060 ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar ||
......@@ -18041,7 +19063,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1804119063 if (instr_is_comptime(value)) {
1804219064 ZigValue *dest_val = const_ptr_pointee(ira, ira->codegen, ptr->value, source_instr->source_node);
1804319065 if (dest_val == nullptr)
18044 return ira->codegen->invalid_instruction;
19066 return ira->codegen->invalid_inst_gen;
1804519067 if (dest_val->special != ConstValSpecialRuntime) {
1804619068 copy_const_val(dest_val, value->value);
1804719069
......@@ -18061,7 +19083,7 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1806119083 ZigValue *dest_val = const_ptr_pointee_unchecked(ira->codegen, ptr->value);
1806219084 dest_val->type = ira->codegen->builtin_types.entry_invalid;
1806319085
18064 return ira->codegen->invalid_instruction;
19086 return ira->codegen->invalid_inst_gen;
1806519087 }
1806619088 }
1806719089 }
......@@ -18074,15 +19096,15 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1807419096
1807519097 switch (type_requires_comptime(ira->codegen, child_type)) {
1807619098 case ReqCompTimeInvalid:
18077 return ira->codegen->invalid_instruction;
19099 return ira->codegen->invalid_inst_gen;
1807819100 case ReqCompTimeYes:
1807919101 switch (type_has_one_possible_value(ira->codegen, ptr->value->type)) {
1808019102 case OnePossibleValueInvalid:
18081 return ira->codegen->invalid_instruction;
19103 return ira->codegen->invalid_inst_gen;
1808219104 case OnePossibleValueNo:
1808319105 ir_add_error(ira, source_instr,
1808419106 buf_sprintf("cannot store runtime value in type '%s'", buf_ptr(&child_type->name)));
18085 return ira->codegen->invalid_instruction;
19107 return ira->codegen->invalid_inst_gen;
1808619108 case OnePossibleValueYes:
1808719109 return ir_const_void(ira, source_instr);
1808819110 }
......@@ -18096,30 +19118,28 @@ static IrInstruction *ir_analyze_store_ptr(IrAnalyze *ira, IrInstruction *source
1809619118 }
1809719119
1809819120 // If this is a store to a pointer with a runtime-known vector index,
18099 // we have to figure out the IrInstruction which represents the index and
18100 // emit a IrInstructionVectorStoreElem, or emit a compile error
19121 // we have to figure out the IrInstGen which represents the index and
19122 // emit a IrInstGenVectorStoreElem, or emit a compile error
1810119123 // explaining why it is impossible for this store to work. Which is that
1810219124 // the pointer address is of the vector; without the element index being known
1810319125 // we cannot properly perform the insertion.
1810419126 if (ptr->value->type->data.pointer.vector_index == VECTOR_INDEX_RUNTIME) {
18105 if (ptr->id == IrInstructionIdElemPtr) {
18106 IrInstructionElemPtr *elem_ptr = (IrInstructionElemPtr *)ptr;
19127 if (ptr->id == IrInstGenIdElemPtr) {
19128 IrInstGenElemPtr *elem_ptr = (IrInstGenElemPtr *)ptr;
1810719129 return ir_build_vector_store_elem(ira, source_instr, elem_ptr->array_ptr,
1810819130 elem_ptr->elem_index, value);
1810919131 }
18110 ir_add_error(ira, ptr,
19132 ir_add_error(ira, &ptr->base,
1811119133 buf_sprintf("unable to determine vector element index of type '%s'",
1811219134 buf_ptr(&ptr->value->type->name)));
18113 return ira->codegen->invalid_instruction;
19135 return ira->codegen->invalid_inst_gen;
1811419136 }
1811519137
18116 IrInstructionStorePtr *store_ptr = ir_build_store_ptr(&ira->new_irb, source_instr->scope,
18117 source_instr->source_node, ptr, value);
18118 return &store_ptr->base;
19138 return ir_build_store_ptr_gen(ira, source_instr, ptr, value);
1811919139}
1812019140
18121static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *source_instr,
18122 IrInstruction *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
19141static IrInstGen *analyze_casted_new_stack(IrAnalyze *ira, IrInst* source_instr,
19142 IrInstGen *new_stack, bool is_async_call_builtin, ZigFn *fn_entry)
1812319143{
1812419144 if (new_stack == nullptr)
1812519145 return nullptr;
......@@ -18148,11 +19168,11 @@ static IrInstruction *analyze_casted_new_stack(IrAnalyze *ira, IrInstruction *so
1814819168 }
1814919169}
1815019170
18151static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_instr,
18152 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
18153 IrInstruction *first_arg_ptr, CallModifier modifier,
18154 IrInstruction *new_stack, bool is_async_call_builtin,
18155 IrInstruction **args_ptr, size_t args_len, IrInstruction *ret_ptr, ResultLoc *call_result_loc)
19171static IrInstGen *ir_analyze_fn_call(IrAnalyze *ira, IrInst* source_instr,
19172 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
19173 IrInstGen *first_arg_ptr, CallModifier modifier,
19174 IrInstGen *new_stack, bool is_async_call_builtin,
19175 IrInstGen **args_ptr, size_t args_len, IrInstGen *ret_ptr, ResultLoc *call_result_loc)
1815619176{
1815719177 Error err;
1815819178 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
......@@ -18173,11 +19193,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1817319193 AstNode *fn_proto_node = fn_entry ? fn_entry->proto_node : nullptr;;
1817419194
1817519195 if (fn_type_id->cc == CallingConventionNaked) {
18176 ErrorMsg *msg = ir_add_error(ira, fn_ref, buf_sprintf("unable to call function with naked calling convention"));
19196 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to call function with naked calling convention"));
1817719197 if (fn_proto_node) {
1817819198 add_error_note(ira->codegen, msg, fn_proto_node, buf_sprintf("declared here"));
1817919199 }
18180 return ira->codegen->invalid_instruction;
19200 return ira->codegen->invalid_inst_gen;
1818119201 }
1818219202
1818319203 if (fn_type_id->is_var_args) {
......@@ -18188,7 +19208,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1818819208 add_error_note(ira->codegen, msg, fn_proto_node,
1818919209 buf_sprintf("declared here"));
1819019210 }
18191 return ira->codegen->invalid_instruction;
19211 return ira->codegen->invalid_inst_gen;
1819219212 }
1819319213 } else if (src_param_count != call_param_count) {
1819419214 ErrorMsg *msg = ir_add_error_node(ira, source_node,
......@@ -18197,18 +19217,18 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1819719217 add_error_note(ira->codegen, msg, fn_proto_node,
1819819218 buf_sprintf("declared here"));
1819919219 }
18200 return ira->codegen->invalid_instruction;
19220 return ira->codegen->invalid_inst_gen;
1820119221 }
1820219222
1820319223 if (modifier == CallModifierCompileTime) {
1820419224 // No special handling is needed for compile time evaluation of generic functions.
1820519225 if (!fn_entry || fn_entry->body_node == nullptr) {
18206 ir_add_error(ira, fn_ref, buf_sprintf("unable to evaluate constant expression"));
18207 return ira->codegen->invalid_instruction;
19226 ir_add_error(ira, &fn_ref->base, buf_sprintf("unable to evaluate constant expression"));
19227 return ira->codegen->invalid_inst_gen;
1820819228 }
1820919229
1821019230 if (!ir_emit_backward_branch(ira, source_instr))
18211 return ira->codegen->invalid_instruction;
19231 return ira->codegen->invalid_inst_gen;
1821219232
1821319233 // Fork a scope of the function with known values for the parameters.
1821419234 Scope *exec_scope = &fn_entry->fndef_scope->base;
......@@ -18221,40 +19241,40 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1822119241 if (fn_type_id->next_param_index >= 1) {
1822219242 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
1822319243 if (type_is_invalid(param_type))
18224 return ira->codegen->invalid_instruction;
19244 return ira->codegen->invalid_inst_gen;
1822519245 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
1822619246 }
1822719247
18228 IrInstruction *first_arg;
19248 IrInstGen *first_arg;
1822919249 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
1823019250 first_arg = first_arg_ptr;
1823119251 } else {
18232 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19252 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1823319253 if (type_is_invalid(first_arg->value->type))
18234 return ira->codegen->invalid_instruction;
19254 return ira->codegen->invalid_inst_gen;
1823519255 }
1823619256
1823719257 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, first_arg, &exec_scope, &next_proto_i))
18238 return ira->codegen->invalid_instruction;
19258 return ira->codegen->invalid_inst_gen;
1823919259 }
1824019260
1824119261 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18242 IrInstruction *old_arg = args_ptr[call_i];
19262 IrInstGen *old_arg = args_ptr[call_i];
1824319263
1824419264 if (!ir_analyze_fn_call_inline_arg(ira, fn_proto_node, old_arg, &exec_scope, &next_proto_i))
18245 return ira->codegen->invalid_instruction;
19265 return ira->codegen->invalid_inst_gen;
1824619266 }
1824719267
1824819268 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
1824919269 ZigType *specified_return_type = ir_analyze_type_expr(ira, exec_scope, return_type_node);
1825019270 if (type_is_invalid(specified_return_type))
18251 return ira->codegen->invalid_instruction;
19271 return ira->codegen->invalid_inst_gen;
1825219272 ZigType *return_type;
1825319273 ZigType *inferred_err_set_type = nullptr;
1825419274 if (fn_proto_node->data.fn_proto.auto_err_set) {
1825519275 inferred_err_set_type = get_auto_err_set_type(ira->codegen, fn_entry);
1825619276 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18257 return ira->codegen->invalid_instruction;
19277 return ira->codegen->invalid_inst_gen;
1825819278 return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
1825919279 } else {
1826019280 return_type = specified_return_type;
......@@ -18278,7 +19298,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1827819298 fn_entry, nullptr, source_instr->source_node, nullptr, ira->new_irb.exec, return_type_node,
1827919299 UndefOk)))
1828019300 {
18281 return ira->codegen->invalid_instruction;
19301 return ira->codegen->invalid_inst_gen;
1828219302 }
1828319303 destroy(result_ptr, "ZigValue");
1828419304 result_ptr = nullptr;
......@@ -18306,24 +19326,24 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1830619326 }
1830719327
1830819328 if (type_is_invalid(result->type)) {
18309 return ira->codegen->invalid_instruction;
19329 return ira->codegen->invalid_inst_gen;
1831019330 }
1831119331 }
1831219332
18313 IrInstruction *new_instruction = ir_const_move(ira, source_instr, result);
19333 IrInstGen *new_instruction = ir_const_move(ira, source_instr, result);
1831419334 return ir_finish_anal(ira, new_instruction);
1831519335 }
1831619336
1831719337 if (fn_type->data.fn.is_generic) {
1831819338 if (!fn_entry) {
18319 ir_add_error(ira, fn_ref,
19339 ir_add_error(ira, &fn_ref->base,
1832019340 buf_sprintf("calling a generic function requires compile-time known function value"));
18321 return ira->codegen->invalid_instruction;
19341 return ira->codegen->invalid_inst_gen;
1832219342 }
1832319343
1832419344 size_t new_fn_arg_count = first_arg_1_or_0 + args_len;
1832519345
18326 IrInstruction **casted_args = allocate<IrInstruction *>(new_fn_arg_count);
19346 IrInstGen **casted_args = allocate<IrInstGen *>(new_fn_arg_count);
1832719347
1832819348 // Fork a scope of the function with known values for the parameters.
1832919349 Scope *parent_scope = fn_entry->fndef_scope->base.parent;
......@@ -18352,30 +19372,30 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1835219372 if (fn_type_id->next_param_index >= 1) {
1835319373 ZigType *param_type = fn_type_id->param_info[next_proto_i].type;
1835419374 if (type_is_invalid(param_type))
18355 return ira->codegen->invalid_instruction;
19375 return ira->codegen->invalid_inst_gen;
1835619376 first_arg_known_bare = param_type->id != ZigTypeIdPointer;
1835719377 }
1835819378
18359 IrInstruction *first_arg;
19379 IrInstGen *first_arg;
1836019380 if (!first_arg_known_bare && handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type)) {
1836119381 first_arg = first_arg_ptr;
1836219382 } else {
18363 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19383 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1836419384 if (type_is_invalid(first_arg->value->type))
18365 return ira->codegen->invalid_instruction;
19385 return ira->codegen->invalid_inst_gen;
1836619386 }
1836719387
1836819388 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, first_arg, &impl_fn->child_scope,
1836919389 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
1837019390 {
18371 return ira->codegen->invalid_instruction;
19391 return ira->codegen->invalid_inst_gen;
1837219392 }
1837319393 }
1837419394
18375 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
19395 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
1837619396 assert(parent_fn_entry);
1837719397 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18378 IrInstruction *arg = args_ptr[call_i];
19398 IrInstGen *arg = args_ptr[call_i];
1837919399
1838019400 AstNode *param_decl_node = fn_proto_node->data.fn_proto.params.at(next_proto_i);
1838119401 assert(param_decl_node->type == NodeTypeParamDecl);
......@@ -18383,7 +19403,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1838319403 if (!ir_analyze_fn_call_generic_arg(ira, fn_proto_node, arg, &impl_fn->child_scope,
1838419404 &next_proto_i, generic_id, &inst_fn_type_id, casted_args, impl_fn))
1838519405 {
18386 return ira->codegen->invalid_instruction;
19406 return ira->codegen->invalid_inst_gen;
1838719407 }
1838819408 }
1838919409
......@@ -18397,9 +19417,9 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1839719417 nullptr, nullptr, fn_proto_node->data.fn_proto.align_expr, nullptr, ira->new_irb.exec,
1839819418 nullptr, UndefBad)))
1839919419 {
18400 return ira->codegen->invalid_instruction;
19420 return ira->codegen->invalid_inst_gen;
1840119421 }
18402 IrInstructionConst *const_instruction = ir_create_instruction_noval<IrInstructionConst>(&ira->new_irb,
19422 IrInstGenConst *const_instruction = ir_create_inst_noval<IrInstGenConst>(&ira->new_irb,
1840319423 impl_fn->child_scope, fn_proto_node->data.fn_proto.align_expr);
1840419424 const_instruction->base.value = align_result;
1840519425 destroy(result_ptr, "ZigValue");
......@@ -18414,11 +19434,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1841419434 AstNode *return_type_node = fn_proto_node->data.fn_proto.return_type;
1841519435 ZigType *specified_return_type = ir_analyze_type_expr(ira, impl_fn->child_scope, return_type_node);
1841619436 if (type_is_invalid(specified_return_type))
18417 return ira->codegen->invalid_instruction;
19437 return ira->codegen->invalid_inst_gen;
1841819438 if (fn_proto_node->data.fn_proto.auto_err_set) {
1841919439 ZigType *inferred_err_set_type = get_auto_err_set_type(ira->codegen, impl_fn);
1842019440 if ((err = type_resolve(ira->codegen, specified_return_type, ResolveStatusSizeKnown)))
18421 return ira->codegen->invalid_instruction;
19441 return ira->codegen->invalid_inst_gen;
1842219442 inst_fn_type_id.return_type = get_error_union_type(ira->codegen, inferred_err_set_type, specified_return_type);
1842319443 } else {
1842419444 inst_fn_type_id.return_type = specified_return_type;
......@@ -18431,7 +19451,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1843119451 CallModifierCompileTime, new_stack, is_async_call_builtin, args_ptr, args_len,
1843219452 ret_ptr, call_result_loc);
1843319453 case ReqCompTimeInvalid:
18434 return ira->codegen->invalid_instruction;
19454 return ira->codegen->invalid_inst_gen;
1843519455 case ReqCompTimeNo:
1843619456 break;
1843719457 }
......@@ -18445,7 +19465,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1844519465 // finish instantiating the function
1844619466 impl_fn->type_entry = get_fn_type(ira->codegen, &inst_fn_type_id);
1844719467 if (type_is_invalid(impl_fn->type_entry))
18448 return ira->codegen->invalid_instruction;
19468 return ira->codegen->invalid_inst_gen;
1844919469
1845019470 impl_fn->ir_executable->source_node = source_instr->source_node;
1845119471 impl_fn->ir_executable->parent_exec = ira->new_irb.exec;
......@@ -18463,25 +19483,25 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1846319483 parent_fn_entry->calls_or_awaits_errorable_fn = true;
1846419484 }
1846519485
18466 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
19486 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
1846719487 is_async_call_builtin, impl_fn);
1846819488 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18469 return ira->codegen->invalid_instruction;
19489 return ira->codegen->invalid_inst_gen;
1847019490
1847119491 size_t impl_param_count = impl_fn_type_id->param_count;
1847219492 if (modifier == CallModifierAsync) {
18473 IrInstruction *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
19493 IrInstGen *result = ir_analyze_async_call(ira, source_instr, impl_fn, impl_fn->type_entry,
1847419494 nullptr, casted_args, impl_param_count, casted_new_stack, is_async_call_builtin, ret_ptr,
1847519495 call_result_loc);
1847619496 return ir_finish_anal(ira, result);
1847719497 }
1847819498
18479 IrInstruction *result_loc;
19499 IrInstGen *result_loc;
1848019500 if (handle_is_ptr(impl_fn_type_id->return_type)) {
1848119501 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
1848219502 impl_fn_type_id->return_type, nullptr, true, false);
1848319503 if (result_loc != nullptr) {
18484 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
19504 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1848519505 return result_loc;
1848619506 }
1848719507 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
......@@ -18497,7 +19517,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1849719517 result_loc = get_async_call_result_loc(ira, source_instr, impl_fn_type_id->return_type,
1849819518 is_async_call_builtin, args_ptr, args_len, ret_ptr);
1849919519 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18500 return ira->codegen->invalid_instruction;
19520 return ira->codegen->invalid_inst_gen;
1850119521 } else {
1850219522 result_loc = nullptr;
1850319523 }
......@@ -18506,11 +19526,11 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1850619526 parent_fn_entry->inferred_async_node == nullptr &&
1850719527 modifier != CallModifierNoAsync)
1850819528 {
18509 parent_fn_entry->inferred_async_node = fn_ref->source_node;
19529 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
1851019530 parent_fn_entry->inferred_async_fn = impl_fn;
1851119531 }
1851219532
18513 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr,
19533 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr,
1851419534 impl_fn, nullptr, impl_param_count, casted_args, modifier, casted_new_stack,
1851519535 is_async_call_builtin, result_loc, impl_fn_type_id->return_type);
1851619536
......@@ -18521,7 +19541,7 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1852119541 return ir_finish_anal(ira, &new_call_instruction->base);
1852219542 }
1852319543
18524 ZigFn *parent_fn_entry = exec_fn_entry(ira->new_irb.exec);
19544 ZigFn *parent_fn_entry = ira->new_irb.exec->fn_entry;
1852519545 assert(fn_type_id->return_type != nullptr);
1852619546 assert(parent_fn_entry != nullptr);
1852719547 if (fn_type_can_fail(fn_type_id)) {
......@@ -18529,46 +19549,46 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1852919549 }
1853019550
1853119551
18532 IrInstruction **casted_args = allocate<IrInstruction *>(call_param_count);
19552 IrInstGen **casted_args = allocate<IrInstGen *>(call_param_count);
1853319553 size_t next_arg_index = 0;
1853419554 if (first_arg_ptr) {
1853519555 assert(first_arg_ptr->value->type->id == ZigTypeIdPointer);
1853619556
1853719557 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
1853819558 if (type_is_invalid(param_type))
18539 return ira->codegen->invalid_instruction;
19559 return ira->codegen->invalid_inst_gen;
1854019560
18541 IrInstruction *first_arg;
19561 IrInstGen *first_arg;
1854219562 if (param_type->id == ZigTypeIdPointer &&
1854319563 handle_is_ptr(first_arg_ptr->value->type->data.pointer.child_type))
1854419564 {
1854519565 first_arg = first_arg_ptr;
1854619566 } else {
18547 first_arg = ir_get_deref(ira, first_arg_ptr, first_arg_ptr, nullptr);
19567 first_arg = ir_get_deref(ira, &first_arg_ptr->base, first_arg_ptr, nullptr);
1854819568 if (type_is_invalid(first_arg->value->type))
18549 return ira->codegen->invalid_instruction;
19569 return ira->codegen->invalid_inst_gen;
1855019570 }
1855119571
18552 IrInstruction *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
19572 IrInstGen *casted_arg = ir_implicit_cast(ira, first_arg, param_type);
1855319573 if (type_is_invalid(casted_arg->value->type))
18554 return ira->codegen->invalid_instruction;
19574 return ira->codegen->invalid_inst_gen;
1855519575
1855619576 casted_args[next_arg_index] = casted_arg;
1855719577 next_arg_index += 1;
1855819578 }
1855919579 for (size_t call_i = 0; call_i < args_len; call_i += 1) {
18560 IrInstruction *old_arg = args_ptr[call_i];
19580 IrInstGen *old_arg = args_ptr[call_i];
1856119581 if (type_is_invalid(old_arg->value->type))
18562 return ira->codegen->invalid_instruction;
19582 return ira->codegen->invalid_inst_gen;
1856319583
18564 IrInstruction *casted_arg;
19584 IrInstGen *casted_arg;
1856519585 if (next_arg_index < src_param_count) {
1856619586 ZigType *param_type = fn_type_id->param_info[next_arg_index].type;
1856719587 if (type_is_invalid(param_type))
18568 return ira->codegen->invalid_instruction;
19588 return ira->codegen->invalid_inst_gen;
1856919589 casted_arg = ir_implicit_cast(ira, old_arg, param_type);
1857019590 if (type_is_invalid(casted_arg->value->type))
18571 return ira->codegen->invalid_instruction;
19591 return ira->codegen->invalid_inst_gen;
1857219592 } else {
1857319593 casted_arg = old_arg;
1857419594 }
......@@ -18581,21 +19601,21 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1858119601
1858219602 ZigType *return_type = fn_type_id->return_type;
1858319603 if (type_is_invalid(return_type))
18584 return ira->codegen->invalid_instruction;
19604 return ira->codegen->invalid_inst_gen;
1858519605
1858619606 if (fn_entry != nullptr && fn_entry->fn_inline == FnInlineAlways && modifier == CallModifierNeverInline) {
1858719607 ir_add_error(ira, source_instr,
1858819608 buf_sprintf("no-inline call of inline function"));
18589 return ira->codegen->invalid_instruction;
19609 return ira->codegen->invalid_inst_gen;
1859019610 }
1859119611
18592 IrInstruction *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
19612 IrInstGen *casted_new_stack = analyze_casted_new_stack(ira, source_instr, new_stack,
1859319613 is_async_call_builtin, fn_entry);
1859419614 if (casted_new_stack != nullptr && type_is_invalid(casted_new_stack->value->type))
18595 return ira->codegen->invalid_instruction;
19615 return ira->codegen->invalid_inst_gen;
1859619616
1859719617 if (modifier == CallModifierAsync) {
18598 IrInstruction *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
19618 IrInstGen *result = ir_analyze_async_call(ira, source_instr, fn_entry, fn_type, fn_ref,
1859919619 casted_args, call_param_count, casted_new_stack, is_async_call_builtin, ret_ptr, call_result_loc);
1860019620 return ir_finish_anal(ira, result);
1860119621 }
......@@ -18604,16 +19624,16 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1860419624 parent_fn_entry->inferred_async_node == nullptr &&
1860519625 modifier != CallModifierNoAsync)
1860619626 {
18607 parent_fn_entry->inferred_async_node = fn_ref->source_node;
19627 parent_fn_entry->inferred_async_node = fn_ref->base.source_node;
1860819628 parent_fn_entry->inferred_async_fn = fn_entry;
1860919629 }
1861019630
18611 IrInstruction *result_loc;
19631 IrInstGen *result_loc;
1861219632 if (handle_is_ptr(return_type)) {
1861319633 result_loc = ir_resolve_result(ira, source_instr, call_result_loc,
1861419634 return_type, nullptr, true, false);
1861519635 if (result_loc != nullptr) {
18616 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
19636 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
1861719637 return result_loc;
1861819638 }
1861919639 ZigType *res_child_type = result_loc->value->type->data.pointer.child_type;
......@@ -18629,12 +19649,12 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1862919649 result_loc = get_async_call_result_loc(ira, source_instr, return_type, is_async_call_builtin,
1863019650 args_ptr, args_len, ret_ptr);
1863119651 if (result_loc != nullptr && type_is_invalid(result_loc->value->type))
18632 return ira->codegen->invalid_instruction;
19652 return ira->codegen->invalid_inst_gen;
1863319653 } else {
1863419654 result_loc = nullptr;
1863519655 }
1863619656
18637 IrInstructionCallGen *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
19657 IrInstGenCall *new_call_instruction = ir_build_call_gen(ira, source_instr, fn_entry, fn_ref,
1863819658 call_param_count, casted_args, modifier, casted_new_stack,
1863919659 is_async_call_builtin, result_loc, return_type);
1864019660 if (get_scope_typeof(source_instr->scope) == nullptr) {
......@@ -18643,62 +19663,62 @@ static IrInstruction *ir_analyze_fn_call(IrAnalyze *ira, IrInstruction *source_i
1864319663 return ir_finish_anal(ira, &new_call_instruction->base);
1864419664}
1864519665
18646static IrInstruction *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstructionCallSrc *call_instruction,
18647 ZigFn *fn_entry, ZigType *fn_type, IrInstruction *fn_ref,
18648 IrInstruction *first_arg_ptr, CallModifier modifier)
19666static IrInstGen *ir_analyze_fn_call_src(IrAnalyze *ira, IrInstSrcCall *call_instruction,
19667 ZigFn *fn_entry, ZigType *fn_type, IrInstGen *fn_ref,
19668 IrInstGen *first_arg_ptr, CallModifier modifier)
1864919669{
18650 IrInstruction *new_stack = nullptr;
19670 IrInstGen *new_stack = nullptr;
1865119671 if (call_instruction->new_stack) {
1865219672 new_stack = call_instruction->new_stack->child;
1865319673 if (type_is_invalid(new_stack->value->type))
18654 return ira->codegen->invalid_instruction;
19674 return ira->codegen->invalid_inst_gen;
1865519675 }
18656 IrInstruction **args_ptr = allocate<IrInstruction *>(call_instruction->arg_count, "IrInstruction *");
19676 IrInstGen **args_ptr = allocate<IrInstGen *>(call_instruction->arg_count, "IrInstGen *");
1865719677 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
1865819678 args_ptr[i] = call_instruction->args[i]->child;
1865919679 if (type_is_invalid(args_ptr[i]->value->type))
18660 return ira->codegen->invalid_instruction;
19680 return ira->codegen->invalid_inst_gen;
1866119681 }
18662 IrInstruction *ret_ptr = nullptr;
19682 IrInstGen *ret_ptr = nullptr;
1866319683 if (call_instruction->ret_ptr != nullptr) {
1866419684 ret_ptr = call_instruction->ret_ptr->child;
1866519685 if (type_is_invalid(ret_ptr->value->type))
18666 return ira->codegen->invalid_instruction;
19686 return ira->codegen->invalid_inst_gen;
1866719687 }
18668 IrInstruction *result = ir_analyze_fn_call(ira, &call_instruction->base, fn_entry, fn_type, fn_ref,
19688 IrInstGen *result = ir_analyze_fn_call(ira, &call_instruction->base.base, fn_entry, fn_type, fn_ref,
1866919689 first_arg_ptr, modifier, new_stack, call_instruction->is_async_call_builtin,
1867019690 args_ptr, call_instruction->arg_count, ret_ptr, call_instruction->result_loc);
18671 deallocate(args_ptr, call_instruction->arg_count, "IrInstruction *");
19691 deallocate(args_ptr, call_instruction->arg_count, "IrInstGen *");
1867219692 return result;
1867319693}
1867419694
18675static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *source_instr,
18676 IrInstruction *pass1_options, IrInstruction *pass1_fn_ref, IrInstruction **args_ptr, size_t args_len,
19695static IrInstGen *ir_analyze_call_extra(IrAnalyze *ira, IrInst* source_instr,
19696 IrInstSrc *pass1_options, IrInstSrc *pass1_fn_ref, IrInstGen **args_ptr, size_t args_len,
1867719697 ResultLoc *result_loc)
1867819698{
18679 IrInstruction *options = pass1_options->child;
19699 IrInstGen *options = pass1_options->child;
1868019700 if (type_is_invalid(options->value->type))
18681 return ira->codegen->invalid_instruction;
19701 return ira->codegen->invalid_inst_gen;
1868219702
18683 IrInstruction *fn_ref = pass1_fn_ref->child;
19703 IrInstGen *fn_ref = pass1_fn_ref->child;
1868419704 if (type_is_invalid(fn_ref->value->type))
18685 return ira->codegen->invalid_instruction;
19705 return ira->codegen->invalid_inst_gen;
1868619706
1868719707 TypeStructField *modifier_field = find_struct_type_field(options->value->type, buf_create_from_str("modifier"));
1868819708 ir_assert(modifier_field != nullptr, source_instr);
18689 IrInstruction *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
19709 IrInstGen *modifier_inst = ir_analyze_struct_value_field_value(ira, source_instr, options, modifier_field);
1869019710 ZigValue *modifier_val = ir_resolve_const(ira, modifier_inst, UndefBad);
1869119711 if (modifier_val == nullptr)
18692 return ira->codegen->invalid_instruction;
19712 return ira->codegen->invalid_inst_gen;
1869319713 CallModifier modifier = (CallModifier)bigint_as_u32(&modifier_val->data.x_enum_tag);
1869419714
18695 if (ir_should_inline(ira->new_irb.exec, source_instr->scope)) {
19715 if (ir_should_inline(ira->old_irb.exec, source_instr->scope)) {
1869619716 switch (modifier) {
1869719717 case CallModifierBuiltin:
1869819718 zig_unreachable();
1869919719 case CallModifierAsync:
1870019720 ir_add_error(ira, source_instr, buf_sprintf("TODO: comptime @call with async modifier"));
18701 return ira->codegen->invalid_instruction;
19721 return ira->codegen->invalid_inst_gen;
1870219722 case CallModifierCompileTime:
1870319723 case CallModifierNone:
1870419724 case CallModifierAlwaysInline:
......@@ -18709,15 +19729,15 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1870919729 case CallModifierNeverInline:
1871019730 ir_add_error(ira, source_instr,
1871119731 buf_sprintf("unable to perform 'never_inline' call at compile-time"));
18712 return ira->codegen->invalid_instruction;
19732 return ira->codegen->invalid_inst_gen;
1871319733 case CallModifierNeverTail:
1871419734 ir_add_error(ira, source_instr,
1871519735 buf_sprintf("unable to perform 'never_tail' call at compile-time"));
18716 return ira->codegen->invalid_instruction;
19736 return ira->codegen->invalid_inst_gen;
1871719737 }
1871819738 }
1871919739
18720 IrInstruction *first_arg_ptr = nullptr;
19740 IrInstGen *first_arg_ptr = nullptr;
1872119741 ZigFn *fn = nullptr;
1872219742 if (instr_is_comptime(fn_ref)) {
1872319743 if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
......@@ -18725,7 +19745,7 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1872519745 fn = fn_ref->value->data.x_bound_fn.fn;
1872619746 first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
1872719747 if (type_is_invalid(first_arg_ptr->value->type))
18728 return ira->codegen->invalid_instruction;
19748 return ira->codegen->invalid_inst_gen;
1872919749 } else {
1873019750 fn = ir_resolve_fn(ira, fn_ref);
1873119751 }
......@@ -18737,9 +19757,9 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1873719757 case CallModifierAlwaysInline:
1873819758 case CallModifierAsync:
1873919759 if (fn == nullptr) {
18740 ir_add_error(ira, modifier_inst,
19760 ir_add_error(ira, &modifier_inst->base,
1874119761 buf_sprintf("the specified modifier requires a comptime-known function"));
18742 return ira->codegen->invalid_instruction;
19762 return ira->codegen->invalid_inst_gen;
1874319763 }
1874419764 default:
1874519765 break;
......@@ -18749,93 +19769,93 @@ static IrInstruction *ir_analyze_call_extra(IrAnalyze *ira, IrInstruction *sourc
1874919769
1875019770 TypeStructField *stack_field = find_struct_type_field(options->value->type, buf_create_from_str("stack"));
1875119771 ir_assert(stack_field != nullptr, source_instr);
18752 IrInstruction *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
19772 IrInstGen *opt_stack = ir_analyze_struct_value_field_value(ira, source_instr, options, stack_field);
1875319773 if (type_is_invalid(opt_stack->value->type))
18754 return ira->codegen->invalid_instruction;
19774 return ira->codegen->invalid_inst_gen;
1875519775
18756 IrInstruction *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
19776 IrInstGen *stack_is_non_null_inst = ir_analyze_test_non_null(ira, source_instr, opt_stack);
1875719777 bool stack_is_non_null;
1875819778 if (!ir_resolve_bool(ira, stack_is_non_null_inst, &stack_is_non_null))
18759 return ira->codegen->invalid_instruction;
19779 return ira->codegen->invalid_inst_gen;
1876019780
18761 IrInstruction *stack = nullptr;
19781 IrInstGen *stack = nullptr;
1876219782 if (stack_is_non_null) {
1876319783 stack = ir_analyze_optional_value_payload_value(ira, source_instr, opt_stack, false);
1876419784 if (type_is_invalid(stack->value->type))
18765 return ira->codegen->invalid_instruction;
19785 return ira->codegen->invalid_inst_gen;
1876619786 }
1876719787
1876819788 return ir_analyze_fn_call(ira, source_instr, fn, fn_type, fn_ref, first_arg_ptr,
1876919789 modifier, stack, false, args_ptr, args_len, nullptr, result_loc);
1877019790}
1877119791
18772static IrInstruction *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstructionCallExtra *instruction) {
18773 IrInstruction *args = instruction->args->child;
19792static IrInstGen *ir_analyze_instruction_call_extra(IrAnalyze *ira, IrInstSrcCallExtra *instruction) {
19793 IrInstGen *args = instruction->args->child;
1877419794 ZigType *args_type = args->value->type;
1877519795 if (type_is_invalid(args_type))
18776 return ira->codegen->invalid_instruction;
19796 return ira->codegen->invalid_inst_gen;
1877719797
1877819798 if (args_type->id != ZigTypeIdStruct) {
18779 ir_add_error(ira, args,
19799 ir_add_error(ira, &args->base,
1878019800 buf_sprintf("expected tuple or struct, found '%s'", buf_ptr(&args_type->name)));
18781 return ira->codegen->invalid_instruction;
19801 return ira->codegen->invalid_inst_gen;
1878219802 }
1878319803
18784 IrInstruction **args_ptr = nullptr;
19804 IrInstGen **args_ptr = nullptr;
1878519805 size_t args_len = 0;
1878619806
1878719807 if (is_tuple(args_type)) {
1878819808 args_len = args_type->data.structure.src_field_count;
18789 args_ptr = allocate<IrInstruction *>(args_len, "IrInstruction *");
19809 args_ptr = allocate<IrInstGen *>(args_len, "IrInstGen *");
1879019810 for (size_t i = 0; i < args_len; i += 1) {
1879119811 TypeStructField *arg_field = args_type->data.structure.fields[i];
18792 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base, args, arg_field);
19812 args_ptr[i] = ir_analyze_struct_value_field_value(ira, &instruction->base.base, args, arg_field);
1879319813 if (type_is_invalid(args_ptr[i]->value->type))
18794 return ira->codegen->invalid_instruction;
19814 return ira->codegen->invalid_inst_gen;
1879519815 }
1879619816 } else {
18797 ir_add_error(ira, args, buf_sprintf("TODO: struct args"));
18798 return ira->codegen->invalid_instruction;
19817 ir_add_error(ira, &args->base, buf_sprintf("TODO: struct args"));
19818 return ira->codegen->invalid_inst_gen;
1879919819 }
18800 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
19820 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
1880119821 instruction->fn_ref, args_ptr, args_len, instruction->result_loc);
18802 deallocate(args_ptr, args_len, "IrInstruction *");
19822 deallocate(args_ptr, args_len, "IrInstGen *");
1880319823 return result;
1880419824}
1880519825
18806static IrInstruction *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstructionCallSrcArgs *instruction) {
18807 IrInstruction **args_ptr = allocate<IrInstruction *>(instruction->args_len, "IrInstruction *");
19826static IrInstGen *ir_analyze_instruction_call_args(IrAnalyze *ira, IrInstSrcCallArgs *instruction) {
19827 IrInstGen **args_ptr = allocate<IrInstGen *>(instruction->args_len, "IrInstGen *");
1880819828 for (size_t i = 0; i < instruction->args_len; i += 1) {
1880919829 args_ptr[i] = instruction->args_ptr[i]->child;
1881019830 if (type_is_invalid(args_ptr[i]->value->type))
18811 return ira->codegen->invalid_instruction;
19831 return ira->codegen->invalid_inst_gen;
1881219832 }
1881319833
18814 IrInstruction *result = ir_analyze_call_extra(ira, &instruction->base, instruction->options,
19834 IrInstGen *result = ir_analyze_call_extra(ira, &instruction->base.base, instruction->options,
1881519835 instruction->fn_ref, args_ptr, instruction->args_len, instruction->result_loc);
18816 deallocate(args_ptr, instruction->args_len, "IrInstruction *");
19836 deallocate(args_ptr, instruction->args_len, "IrInstGen *");
1881719837 return result;
1881819838}
1881919839
18820static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionCallSrc *call_instruction) {
18821 IrInstruction *fn_ref = call_instruction->fn_ref->child;
19840static IrInstGen *ir_analyze_instruction_call(IrAnalyze *ira, IrInstSrcCall *call_instruction) {
19841 IrInstGen *fn_ref = call_instruction->fn_ref->child;
1882219842 if (type_is_invalid(fn_ref->value->type))
18823 return ira->codegen->invalid_instruction;
19843 return ira->codegen->invalid_inst_gen;
1882419844
1882519845 bool is_comptime = (call_instruction->modifier == CallModifierCompileTime) ||
18826 ir_should_inline(ira->new_irb.exec, call_instruction->base.scope);
19846 ir_should_inline(ira->old_irb.exec, call_instruction->base.base.scope);
1882719847 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1882819848
1882919849 if (is_comptime || instr_is_comptime(fn_ref)) {
1883019850 if (fn_ref->value->type->id == ZigTypeIdMetaType) {
1883119851 ZigType *ty = ir_resolve_type(ira, fn_ref);
1883219852 if (ty == nullptr)
18833 return ira->codegen->invalid_instruction;
18834 ErrorMsg *msg = ir_add_error_node(ira, fn_ref->source_node,
19853 return ira->codegen->invalid_inst_gen;
19854 ErrorMsg *msg = ir_add_error(ira, &fn_ref->base,
1883519855 buf_sprintf("type '%s' not a function", buf_ptr(&ty->name)));
18836 add_error_note(ira->codegen, msg, call_instruction->base.source_node,
19856 add_error_note(ira->codegen, msg, call_instruction->base.base.source_node,
1883719857 buf_sprintf("use @as builtin for type coercion"));
18838 return ira->codegen->invalid_instruction;
19858 return ira->codegen->invalid_inst_gen;
1883919859 } else if (fn_ref->value->type->id == ZigTypeIdFn) {
1884019860 ZigFn *fn_table_entry = ir_resolve_fn(ira, fn_ref);
1884119861 ZigType *fn_type = fn_table_entry ? fn_table_entry->type_entry : fn_ref->value->type;
......@@ -18845,14 +19865,14 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
1884519865 } else if (fn_ref->value->type->id == ZigTypeIdBoundFn) {
1884619866 assert(fn_ref->value->special == ConstValSpecialStatic);
1884719867 ZigFn *fn_table_entry = fn_ref->value->data.x_bound_fn.fn;
18848 IrInstruction *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
19868 IrInstGen *first_arg_ptr = fn_ref->value->data.x_bound_fn.first_arg;
1884919869 CallModifier modifier = is_comptime ? CallModifierCompileTime : call_instruction->modifier;
1885019870 return ir_analyze_fn_call_src(ira, call_instruction, fn_table_entry, fn_table_entry->type_entry,
1885119871 fn_ref, first_arg_ptr, modifier);
1885219872 } else {
18853 ir_add_error_node(ira, fn_ref->source_node,
19873 ir_add_error(ira, &fn_ref->base,
1885419874 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18855 return ira->codegen->invalid_instruction;
19875 return ira->codegen->invalid_inst_gen;
1885619876 }
1885719877 }
1885819878
......@@ -18860,9 +19880,9 @@ static IrInstruction *ir_analyze_instruction_call(IrAnalyze *ira, IrInstructionC
1886019880 return ir_analyze_fn_call_src(ira, call_instruction, nullptr, fn_ref->value->type,
1886119881 fn_ref, nullptr, modifier);
1886219882 } else {
18863 ir_add_error_node(ira, fn_ref->source_node,
19883 ir_add_error(ira, &fn_ref->base,
1886419884 buf_sprintf("type '%s' not a function", buf_ptr(&fn_ref->value->type->name)));
18865 return ira->codegen->invalid_instruction;
19885 return ira->codegen->invalid_inst_gen;
1886619886 }
1886719887}
1886819888
......@@ -18951,8 +19971,8 @@ static Error ir_read_const_ptr(IrAnalyze *ira, CodeGen *codegen, AstNode *source
1895119971 zig_unreachable();
1895219972}
1895319973
18954static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp *instruction) {
18955 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
19974static IrInstGen *ir_analyze_optional_type(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
19975 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
1895619976 result->value->special = ConstValSpecialLazy;
1895719977
1895819978 LazyValueOptType *lazy_opt_type = allocate<LazyValueOptType>(1, "LazyValueOptType");
......@@ -18962,12 +19982,12 @@ static IrInstruction *ir_analyze_optional_type(IrAnalyze *ira, IrInstructionUnOp
1896219982
1896319983 lazy_opt_type->payload_type = instruction->value->child;
1896419984 if (ir_resolve_type_lazy(ira, lazy_opt_type->payload_type) == nullptr)
18965 return ira->codegen->invalid_instruction;
19985 return ira->codegen->invalid_inst_gen;
1896619986
1896719987 return result;
1896819988}
1896919989
18970static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_instr, ZigType *scalar_type,
19990static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInst* source_instr, ZigType *scalar_type,
1897119991 ZigValue *operand_val, ZigValue *scalar_out_val, bool is_wrap_op)
1897219992{
1897319993 bool is_float = (scalar_type->id == ZigTypeIdFloat || scalar_type->id == ZigTypeIdComptimeFloat);
......@@ -19002,19 +20022,19 @@ static ErrorMsg *ir_eval_negation_scalar(IrAnalyze *ira, IrInstruction *source_i
1900220022 return nullptr;
1900320023}
1900420024
19005static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *instruction) {
19006 IrInstruction *value = instruction->value->child;
20025static IrInstGen *ir_analyze_negation(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
20026 IrInstGen *value = instruction->value->child;
1900720027 ZigType *expr_type = value->value->type;
1900820028 if (type_is_invalid(expr_type))
19009 return ira->codegen->invalid_instruction;
20029 return ira->codegen->invalid_inst_gen;
1901020030
1901120031 if (!(expr_type->id == ZigTypeIdInt || expr_type->id == ZigTypeIdComptimeInt ||
1901220032 expr_type->id == ZigTypeIdFloat || expr_type->id == ZigTypeIdComptimeFloat ||
1901320033 expr_type->id == ZigTypeIdVector))
1901420034 {
19015 ir_add_error(ira, &instruction->base,
20035 ir_add_error(ira, &instruction->base.base,
1901620036 buf_sprintf("negation of type '%s'", buf_ptr(&expr_type->name)));
19017 return ira->codegen->invalid_instruction;
20037 return ira->codegen->invalid_inst_gen;
1901820038 }
1901920039
1902020040 bool is_wrap_op = (instruction->op_id == IrUnOpNegationWrap);
......@@ -19024,9 +20044,9 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
1902420044 if (instr_is_comptime(value)) {
1902520045 ZigValue *operand_val = ir_resolve_const(ira, value, UndefBad);
1902620046 if (!operand_val)
19027 return ira->codegen->invalid_instruction;
20047 return ira->codegen->invalid_inst_gen;
1902820048
19029 IrInstruction *result_instruction = ir_const(ira, &instruction->base, expr_type);
20049 IrInstGen *result_instruction = ir_const(ira, &instruction->base.base, expr_type);
1903020050 ZigValue *out_val = result_instruction->value;
1903120051 if (expr_type->id == ZigTypeIdVector) {
1903220052 expand_undef_array(ira->codegen, operand_val);
......@@ -19038,63 +20058,60 @@ static IrInstruction *ir_analyze_negation(IrAnalyze *ira, IrInstructionUnOp *ins
1903820058 ZigValue *scalar_out_val = &out_val->data.x_array.data.s_none.elements[i];
1903920059 assert(scalar_operand_val->type == scalar_type);
1904020060 assert(scalar_out_val->type == scalar_type);
19041 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base, scalar_type,
20061 ErrorMsg *msg = ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type,
1904220062 scalar_operand_val, scalar_out_val, is_wrap_op);
1904320063 if (msg != nullptr) {
19044 add_error_note(ira->codegen, msg, instruction->base.source_node,
20064 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
1904520065 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
19046 return ira->codegen->invalid_instruction;
20066 return ira->codegen->invalid_inst_gen;
1904720067 }
1904820068 }
1904920069 out_val->type = expr_type;
1905020070 out_val->special = ConstValSpecialStatic;
1905120071 } else {
19052 if (ir_eval_negation_scalar(ira, &instruction->base, scalar_type, operand_val, out_val,
20072 if (ir_eval_negation_scalar(ira, &instruction->base.base, scalar_type, operand_val, out_val,
1905320073 is_wrap_op) != nullptr)
1905420074 {
19055 return ira->codegen->invalid_instruction;
20075 return ira->codegen->invalid_inst_gen;
1905620076 }
1905720077 }
1905820078 return result_instruction;
1905920079 }
1906020080
19061 IrInstruction *result = ir_build_un_op(&ira->new_irb,
19062 instruction->base.scope, instruction->base.source_node,
19063 instruction->op_id, value);
19064 result->value->type = expr_type;
19065 return result;
20081 if (is_wrap_op) {
20082 return ir_build_negation_wrapping(ira, &instruction->base.base, value, expr_type);
20083 } else {
20084 return ir_build_negation(ira, &instruction->base.base, value, expr_type);
20085 }
1906620086}
1906720087
19068static IrInstruction *ir_analyze_bin_not(IrAnalyze *ira, IrInstructionUnOp *instruction) {
19069 IrInstruction *value = instruction->value->child;
20088static IrInstGen *ir_analyze_bin_not(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
20089 IrInstGen *value = instruction->value->child;
1907020090 ZigType *expr_type = value->value->type;
1907120091 if (type_is_invalid(expr_type))
19072 return ira->codegen->invalid_instruction;
20092 return ira->codegen->invalid_inst_gen;
1907320093
1907420094 if (expr_type->id == ZigTypeIdInt) {
1907520095 if (instr_is_comptime(value)) {
1907620096 ZigValue *target_const_val = ir_resolve_const(ira, value, UndefBad);
1907720097 if (target_const_val == nullptr)
19078 return ira->codegen->invalid_instruction;
20098 return ira->codegen->invalid_inst_gen;
1907920099
19080 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
20100 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
1908120101 bigint_not(&result->value->data.x_bigint, &target_const_val->data.x_bigint,
1908220102 expr_type->data.integral.bit_count, expr_type->data.integral.is_signed);
1908320103 return result;
1908420104 }
1908520105
19086 IrInstruction *result = ir_build_un_op(&ira->new_irb, instruction->base.scope,
19087 instruction->base.source_node, IrUnOpBinNot, value);
19088 result->value->type = expr_type;
19089 return result;
20106 return ir_build_binary_not(ira, &instruction->base.base, value, expr_type);
1909020107 }
1909120108
19092 ir_add_error(ira, &instruction->base,
20109 ir_add_error(ira, &instruction->base.base,
1909320110 buf_sprintf("unable to perform binary not operation on type '%s'", buf_ptr(&expr_type->name)));
19094 return ira->codegen->invalid_instruction;
20111 return ira->codegen->invalid_inst_gen;
1909520112}
1909620113
19097static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstructionUnOp *instruction) {
20114static IrInstGen *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstSrcUnOp *instruction) {
1909820115 IrUnOp op_id = instruction->op_id;
1909920116 switch (op_id) {
1910020117 case IrUnOpInvalid:
......@@ -19105,26 +20122,26 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
1910520122 case IrUnOpNegationWrap:
1910620123 return ir_analyze_negation(ira, instruction);
1910720124 case IrUnOpDereference: {
19108 IrInstruction *ptr = instruction->value->child;
20125 IrInstGen *ptr = instruction->value->child;
1910920126 if (type_is_invalid(ptr->value->type))
19110 return ira->codegen->invalid_instruction;
20127 return ira->codegen->invalid_inst_gen;
1911120128 ZigType *ptr_type = ptr->value->type;
1911220129 if (ptr_type->id == ZigTypeIdPointer && ptr_type->data.pointer.ptr_len == PtrLenUnknown) {
19113 ir_add_error_node(ira, instruction->base.source_node,
20130 ir_add_error_node(ira, instruction->base.base.source_node,
1911420131 buf_sprintf("index syntax required for unknown-length pointer type '%s'",
1911520132 buf_ptr(&ptr_type->name)));
19116 return ira->codegen->invalid_instruction;
20133 return ira->codegen->invalid_inst_gen;
1911720134 }
1911820135
19119 IrInstruction *result = ir_get_deref(ira, &instruction->base, ptr, instruction->result_loc);
19120 if (result == ira->codegen->invalid_instruction)
19121 return ira->codegen->invalid_instruction;
20136 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, ptr, instruction->result_loc);
20137 if (type_is_invalid(result->value->type))
20138 return ira->codegen->invalid_inst_gen;
1912220139
1912320140 // If the result needs to be an lvalue, type check it
1912420141 if (instruction->lval == LValPtr && result->value->type->id != ZigTypeIdPointer) {
19125 ir_add_error(ira, &instruction->base,
20142 ir_add_error(ira, &instruction->base.base,
1912620143 buf_sprintf("attempt to dereference non-pointer type '%s'", buf_ptr(&result->value->type->name)));
19127 return ira->codegen->invalid_instruction;
20144 return ira->codegen->invalid_inst_gen;
1912820145 }
1912920146
1913020147 return result;
......@@ -19136,42 +20153,40 @@ static IrInstruction *ir_analyze_instruction_un_op(IrAnalyze *ira, IrInstruction
1913620153}
1913720154
1913820155static void ir_push_resume(IrAnalyze *ira, IrSuspendPosition pos) {
19139 IrBasicBlock *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
20156 IrBasicBlockSrc *old_bb = ira->old_irb.exec->basic_block_list.at(pos.basic_block_index);
1914020157 if (old_bb->in_resume_stack) return;
1914120158 ira->resume_stack.append(pos);
1914220159 old_bb->in_resume_stack = true;
1914320160}
1914420161
19145static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlock *old_bb) {
20162static void ir_push_resume_block(IrAnalyze *ira, IrBasicBlockSrc *old_bb) {
1914620163 if (ira->resume_stack.length != 0) {
1914720164 ir_push_resume(ira, {old_bb->index, 0});
1914820165 }
1914920166}
1915020167
19151static IrInstruction *ir_analyze_instruction_br(IrAnalyze *ira, IrInstructionBr *br_instruction) {
19152 IrBasicBlock *old_dest_block = br_instruction->dest_block;
20168static IrInstGen *ir_analyze_instruction_br(IrAnalyze *ira, IrInstSrcBr *br_instruction) {
20169 IrBasicBlockSrc *old_dest_block = br_instruction->dest_block;
1915320170
1915420171 bool is_comptime;
1915520172 if (!ir_resolve_comptime(ira, br_instruction->is_comptime->child, &is_comptime))
1915620173 return ir_unreach_error(ira);
1915720174
1915820175 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19159 return ir_inline_bb(ira, &br_instruction->base, old_dest_block);
20176 return ir_inline_bb(ira, &br_instruction->base.base, old_dest_block);
1916020177
19161 IrBasicBlock *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base);
20178 IrBasicBlockGen *new_bb = ir_get_new_bb_runtime(ira, old_dest_block, &br_instruction->base.base);
1916220179 if (new_bb == nullptr)
1916320180 return ir_unreach_error(ira);
1916420181
1916520182 ir_push_resume_block(ira, old_dest_block);
1916620183
19167 IrInstruction *result = ir_build_br(&ira->new_irb,
19168 br_instruction->base.scope, br_instruction->base.source_node, new_bb, nullptr);
19169 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20184 IrInstGen *result = ir_build_br_gen(ira, &br_instruction->base.base, new_bb);
1917020185 return ir_finish_anal(ira, result);
1917120186}
1917220187
19173static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructionCondBr *cond_br_instruction) {
19174 IrInstruction *condition = cond_br_instruction->condition->child;
20188static IrInstGen *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstSrcCondBr *cond_br_instruction) {
20189 IrInstGen *condition = cond_br_instruction->condition->child;
1917520190 if (type_is_invalid(condition->value->type))
1917620191 return ir_unreach_error(ira);
1917720192
......@@ -19180,7 +20195,7 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
1918020195 return ir_unreach_error(ira);
1918120196
1918220197 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
19183 IrInstruction *casted_condition = ir_implicit_cast(ira, condition, bool_type);
20198 IrInstGen *casted_condition = ir_implicit_cast(ira, condition, bool_type);
1918420199 if (type_is_invalid(casted_condition->value->type))
1918520200 return ir_unreach_error(ira);
1918620201
......@@ -19189,67 +20204,61 @@ static IrInstruction *ir_analyze_instruction_cond_br(IrAnalyze *ira, IrInstructi
1918920204 if (!ir_resolve_bool(ira, casted_condition, &cond_is_true))
1919020205 return ir_unreach_error(ira);
1919120206
19192 IrBasicBlock *old_dest_block = cond_is_true ?
20207 IrBasicBlockSrc *old_dest_block = cond_is_true ?
1919320208 cond_br_instruction->then_block : cond_br_instruction->else_block;
1919420209
1919520210 if (is_comptime || (old_dest_block->ref_count == 1 && old_dest_block->suspend_instruction_ref == nullptr))
19196 return ir_inline_bb(ira, &cond_br_instruction->base, old_dest_block);
20211 return ir_inline_bb(ira, &cond_br_instruction->base.base, old_dest_block);
1919720212
19198 IrBasicBlock *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base);
20213 IrBasicBlockGen *new_dest_block = ir_get_new_bb_runtime(ira, old_dest_block, &cond_br_instruction->base.base);
1919920214 if (new_dest_block == nullptr)
1920020215 return ir_unreach_error(ira);
1920120216
1920220217 ir_push_resume_block(ira, old_dest_block);
1920320218
19204 IrInstruction *result = ir_build_br(&ira->new_irb,
19205 cond_br_instruction->base.scope, cond_br_instruction->base.source_node, new_dest_block, nullptr);
19206 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20219 IrInstGen *result = ir_build_br_gen(ira, &cond_br_instruction->base.base, new_dest_block);
1920720220 return ir_finish_anal(ira, result);
1920820221 }
1920920222
1921020223 assert(cond_br_instruction->then_block != cond_br_instruction->else_block);
19211 IrBasicBlock *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base);
20224 IrBasicBlockGen *new_then_block = ir_get_new_bb_runtime(ira, cond_br_instruction->then_block, &cond_br_instruction->base.base);
1921220225 if (new_then_block == nullptr)
1921320226 return ir_unreach_error(ira);
1921420227
19215 IrBasicBlock *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base);
20228 IrBasicBlockGen *new_else_block = ir_get_new_bb_runtime(ira, cond_br_instruction->else_block, &cond_br_instruction->base.base);
1921620229 if (new_else_block == nullptr)
1921720230 return ir_unreach_error(ira);
1921820231
1921920232 ir_push_resume_block(ira, cond_br_instruction->else_block);
1922020233 ir_push_resume_block(ira, cond_br_instruction->then_block);
1922120234
19222 IrInstruction *result = ir_build_cond_br(&ira->new_irb,
19223 cond_br_instruction->base.scope, cond_br_instruction->base.source_node,
19224 casted_condition, new_then_block, new_else_block, nullptr);
19225 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20235 IrInstGen *result = ir_build_cond_br_gen(ira, &cond_br_instruction->base.base,
20236 casted_condition, new_then_block, new_else_block);
1922620237 return ir_finish_anal(ira, result);
1922720238}
1922820239
19229static IrInstruction *ir_analyze_instruction_unreachable(IrAnalyze *ira,
19230 IrInstructionUnreachable *unreachable_instruction)
20240static IrInstGen *ir_analyze_instruction_unreachable(IrAnalyze *ira,
20241 IrInstSrcUnreachable *unreachable_instruction)
1923120242{
19232 IrInstruction *result = ir_build_unreachable(&ira->new_irb,
19233 unreachable_instruction->base.scope, unreachable_instruction->base.source_node);
19234 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20243 IrInstGen *result = ir_build_unreachable_gen(ira, &unreachable_instruction->base.base);
1923520244 return ir_finish_anal(ira, result);
1923620245}
1923720246
19238static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPhi *phi_instruction) {
20247static IrInstGen *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstSrcPhi *phi_instruction) {
1923920248 Error err;
1924020249
1924120250 if (ira->const_predecessor_bb) {
1924220251 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19243 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
20252 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
1924420253 if (predecessor != ira->const_predecessor_bb)
1924520254 continue;
19246 IrInstruction *value = phi_instruction->incoming_values[i]->child;
20255 IrInstGen *value = phi_instruction->incoming_values[i]->child;
1924720256 assert(value->value->type);
1924820257 if (type_is_invalid(value->value->type))
19249 return ira->codegen->invalid_instruction;
20258 return ira->codegen->invalid_inst_gen;
1925020259
1925120260 if (value->value->special != ConstValSpecialRuntime) {
19252 IrInstruction *result = ir_const(ira, &phi_instruction->base, nullptr);
20261 IrInstGen *result = ir_const(ira, &phi_instruction->base.base, nullptr);
1925320262 copy_const_val(result->value, value->value);
1925420263 return result;
1925520264 } else {
......@@ -19264,17 +20273,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1926420273 peer_parent->peers.length >= 2)
1926520274 {
1926620275 if (peer_parent->resolved_type == nullptr) {
19267 IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peers.length);
20276 IrInstGen **instructions = allocate<IrInstGen *>(peer_parent->peers.length);
1926820277 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
1926920278 ResultLocPeer *this_peer = peer_parent->peers.at(i);
1927020279
19271 IrInstruction *gen_instruction = this_peer->base.gen_instruction;
20280 IrInstGen *gen_instruction = this_peer->base.gen_instruction;
1927220281 if (gen_instruction == nullptr) {
1927320282 // unreachable instructions will cause implicit_elem_type to be null
1927420283 if (this_peer->base.implicit_elem_type == nullptr) {
19275 instructions[i] = ir_const_unreachable(ira, this_peer->base.source_instruction);
20284 instructions[i] = ir_const_unreachable(ira, &this_peer->base.source_instruction->base);
1927620285 } else {
19277 instructions[i] = ir_const(ira, this_peer->base.source_instruction,
20286 instructions[i] = ir_const(ira, &this_peer->base.source_instruction->base,
1927820287 this_peer->base.implicit_elem_type);
1927920288 instructions[i]->value->special = ConstValSpecialRuntime;
1928020289 }
......@@ -19283,34 +20292,34 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1928320292 }
1928420293
1928520294 }
19286 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base, peer_parent->parent);
20295 ZigType *expected_type = ir_result_loc_expected_type(ira, &phi_instruction->base.base, peer_parent->parent);
1928720296 peer_parent->resolved_type = ir_resolve_peer_types(ira,
19288 peer_parent->base.source_instruction->source_node, expected_type, instructions,
20297 peer_parent->base.source_instruction->base.source_node, expected_type, instructions,
1928920298 peer_parent->peers.length);
1929020299 if (type_is_invalid(peer_parent->resolved_type))
19291 return ira->codegen->invalid_instruction;
20300 return ira->codegen->invalid_inst_gen;
1929220301
1929320302 // the logic below assumes there are no instructions in the new current basic block yet
19294 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base);
20303 ir_assert(ira->new_irb.current_basic_block->instruction_list.length == 0, &phi_instruction->base.base);
1929520304
1929620305 // In case resolving the parent activates a suspend, do it now
19297 IrInstruction *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base, peer_parent->parent,
20306 IrInstGen *parent_result_loc = ir_resolve_result(ira, &phi_instruction->base.base, peer_parent->parent,
1929820307 peer_parent->resolved_type, nullptr, false, true);
1929920308 if (parent_result_loc != nullptr &&
19300 (type_is_invalid(parent_result_loc->value->type) || instr_is_unreachable(parent_result_loc)))
20309 (type_is_invalid(parent_result_loc->value->type) || parent_result_loc->value->type->id == ZigTypeIdUnreachable))
1930120310 {
1930220311 return parent_result_loc;
1930320312 }
1930420313 // If the above code generated any instructions in the current basic block, we need
1930520314 // to move them to the peer parent predecessor.
19306 ZigList<IrInstruction *> instrs_to_move = {};
20315 ZigList<IrInstGen *> instrs_to_move = {};
1930720316 while (ira->new_irb.current_basic_block->instruction_list.length != 0) {
1930820317 instrs_to_move.append(ira->new_irb.current_basic_block->instruction_list.pop());
1930920318 }
1931020319 if (instrs_to_move.length != 0) {
19311 IrBasicBlock *predecessor = peer_parent->base.source_instruction->child->owner_bb;
19312 IrInstruction *branch_instruction = predecessor->instruction_list.pop();
19313 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base);
20320 IrBasicBlockGen *predecessor = peer_parent->base.source_instruction->child->owner_bb;
20321 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
20322 ir_assert(branch_instruction->value->type->id == ZigTypeIdUnreachable, &phi_instruction->base.base);
1931420323 while (instrs_to_move.length != 0) {
1931520324 predecessor->instruction_list.append(instrs_to_move.pop());
1931620325 }
......@@ -19319,7 +20328,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1931920328 }
1932020329
1932120330 IrSuspendPosition suspend_pos;
19322 ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);
20331 ira_suspend(ira, &phi_instruction->base.base, nullptr, &suspend_pos);
1932320332 ir_push_resume(ira, suspend_pos);
1932420333
1932520334 for (size_t i = 0; i < peer_parent->peers.length; i += 1) {
......@@ -19335,34 +20344,32 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1933520344 return ira_resume(ira);
1933620345 }
1933720346
19338 ZigList<IrBasicBlock*> new_incoming_blocks = {0};
19339 ZigList<IrInstruction*> new_incoming_values = {0};
20347 ZigList<IrBasicBlockGen*> new_incoming_blocks = {0};
20348 ZigList<IrInstGen*> new_incoming_values = {0};
1934020349
1934120350 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
19342 IrBasicBlock *predecessor = phi_instruction->incoming_blocks[i];
20351 IrBasicBlockSrc *predecessor = phi_instruction->incoming_blocks[i];
1934320352 if (predecessor->ref_count == 0)
1934420353 continue;
1934520354
1934620355
19347 IrInstruction *old_value = phi_instruction->incoming_values[i];
20356 IrInstSrc *old_value = phi_instruction->incoming_values[i];
1934820357 assert(old_value);
19349 IrInstruction *new_value = old_value->child;
19350 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->other == nullptr)
20358 IrInstGen *new_value = old_value->child;
20359 if (!new_value || new_value->value->type->id == ZigTypeIdUnreachable || predecessor->child == nullptr)
1935120360 continue;
1935220361
1935320362 if (type_is_invalid(new_value->value->type))
19354 return ira->codegen->invalid_instruction;
20363 return ira->codegen->invalid_inst_gen;
1935520364
1935620365
19357 assert(predecessor->other);
19358 new_incoming_blocks.append(predecessor->other);
20366 assert(predecessor->child);
20367 new_incoming_blocks.append(predecessor->child);
1935920368 new_incoming_values.append(new_value);
1936020369 }
1936120370
1936220371 if (new_incoming_blocks.length == 0) {
19363 IrInstruction *result = ir_build_unreachable(&ira->new_irb,
19364 phi_instruction->base.scope, phi_instruction->base.source_node);
19365 result->value->type = ira->codegen->builtin_types.entry_unreachable;
20372 IrInstGen *result = ir_build_unreachable_gen(ira, &phi_instruction->base.base);
1936620373 return ir_finish_anal(ira, result);
1936720374 }
1936820375
......@@ -19374,7 +20381,7 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1937420381 if (peer_parent != nullptr) {
1937520382 bool peer_parent_has_type;
1937620383 if ((err = ir_result_has_type(ira, peer_parent->parent, &peer_parent_has_type)))
19377 return ira->codegen->invalid_instruction;
20384 return ira->codegen->invalid_inst_gen;
1937820385 if (peer_parent_has_type) {
1937920386 if (peer_parent->parent->id == ResultLocIdReturn) {
1938020387 resolved_type = ira->explicit_return_type;
......@@ -19382,27 +20389,27 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1938220389 resolved_type = ir_resolve_type(ira, peer_parent->parent->source_instruction->child);
1938320390 } else if (peer_parent->parent->resolved_loc) {
1938420391 ZigType *resolved_loc_ptr_type = peer_parent->parent->resolved_loc->value->type;
19385 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base);
20392 ir_assert(resolved_loc_ptr_type->id == ZigTypeIdPointer, &phi_instruction->base.base);
1938620393 resolved_type = resolved_loc_ptr_type->data.pointer.child_type;
1938720394 }
1938820395
1938920396 if (resolved_type != nullptr && type_is_invalid(resolved_type))
19390 return ira->codegen->invalid_instruction;
20397 return ira->codegen->invalid_inst_gen;
1939120398 }
1939220399 }
1939320400
1939420401 if (resolved_type == nullptr) {
19395 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.source_node, nullptr,
20402 resolved_type = ir_resolve_peer_types(ira, phi_instruction->base.base.source_node, nullptr,
1939620403 new_incoming_values.items, new_incoming_values.length);
1939720404 if (type_is_invalid(resolved_type))
19398 return ira->codegen->invalid_instruction;
20405 return ira->codegen->invalid_inst_gen;
1939920406 }
1940020407
1940120408 switch (type_has_one_possible_value(ira->codegen, resolved_type)) {
1940220409 case OnePossibleValueInvalid:
19403 return ira->codegen->invalid_instruction;
20410 return ira->codegen->invalid_inst_gen;
1940420411 case OnePossibleValueYes:
19405 return ir_const_move(ira, &phi_instruction->base,
20412 return ir_const_move(ira, &phi_instruction->base.base,
1940620413 get_the_one_possible_value(ira->codegen, resolved_type));
1940720414 case OnePossibleValueNo:
1940820415 break;
......@@ -19410,11 +20417,11 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1941020417
1941120418 switch (type_requires_comptime(ira->codegen, resolved_type)) {
1941220419 case ReqCompTimeInvalid:
19413 return ira->codegen->invalid_instruction;
20420 return ira->codegen->invalid_inst_gen;
1941420421 case ReqCompTimeYes:
19415 ir_add_error_node(ira, phi_instruction->base.source_node,
20422 ir_add_error(ira, &phi_instruction->base.base,
1941620423 buf_sprintf("values of type '%s' must be comptime known", buf_ptr(&resolved_type->name)));
19417 return ira->codegen->invalid_instruction;
20424 return ira->codegen->invalid_inst_gen;
1941820425 case ReqCompTimeNo:
1941920426 break;
1942020427 }
......@@ -19424,16 +20431,16 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1942420431 // cast all values to the resolved type. however we can't put cast instructions in front of the phi instruction.
1942520432 // so we go back and insert the casts as the last instruction in the corresponding predecessor blocks, and
1942620433 // then make sure the branch instruction is preserved.
19427 IrBasicBlock *cur_bb = ira->new_irb.current_basic_block;
20434 IrBasicBlockGen *cur_bb = ira->new_irb.current_basic_block;
1942820435 for (size_t i = 0; i < new_incoming_values.length; i += 1) {
19429 IrInstruction *new_value = new_incoming_values.at(i);
19430 IrBasicBlock *predecessor = new_incoming_blocks.at(i);
19431 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base);
19432 IrInstruction *branch_instruction = predecessor->instruction_list.pop();
19433 ir_set_cursor_at_end(&ira->new_irb, predecessor);
19434 IrInstruction *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
20436 IrInstGen *new_value = new_incoming_values.at(i);
20437 IrBasicBlockGen *predecessor = new_incoming_blocks.at(i);
20438 ir_assert(predecessor->instruction_list.length != 0, &phi_instruction->base.base);
20439 IrInstGen *branch_instruction = predecessor->instruction_list.pop();
20440 ir_set_cursor_at_end_gen(&ira->new_irb, predecessor);
20441 IrInstGen *casted_value = ir_implicit_cast(ira, new_value, resolved_type);
1943520442 if (type_is_invalid(casted_value->value->type)) {
19436 return ira->codegen->invalid_instruction;
20443 return ira->codegen->invalid_inst_gen;
1943720444 }
1943820445 new_incoming_values.items[i] = casted_value;
1943920446 predecessor->instruction_list.append(branch_instruction);
......@@ -19444,12 +20451,10 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1944420451 all_stack_ptrs = false;
1944520452 }
1944620453 }
19447 ir_set_cursor_at_end(&ira->new_irb, cur_bb);
20454 ir_set_cursor_at_end_gen(&ira->new_irb, cur_bb);
1944820455
19449 IrInstruction *result = ir_build_phi(&ira->new_irb,
19450 phi_instruction->base.scope, phi_instruction->base.source_node,
19451 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, nullptr);
19452 result->value->type = resolved_type;
20456 IrInstGen *result = ir_build_phi_gen(ira, &phi_instruction->base.base,
20457 new_incoming_blocks.length, new_incoming_blocks.items, new_incoming_values.items, resolved_type);
1945320458
1945420459 if (all_stack_ptrs) {
1945520460 assert(result->value->special == ConstValSpecialRuntime);
......@@ -19459,17 +20464,17 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
1945920464 return result;
1946020465}
1946120466
19462static IrInstruction *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstructionVarPtr *instruction) {
20467static IrInstGen *ir_analyze_instruction_var_ptr(IrAnalyze *ira, IrInstSrcVarPtr *instruction) {
1946320468 ZigVar *var = instruction->var;
19464 IrInstruction *result = ir_get_var_ptr(ira, &instruction->base, var);
20469 IrInstGen *result = ir_get_var_ptr(ira, &instruction->base.base, var);
1946520470 if (instruction->crossed_fndef_scope != nullptr && !instr_is_comptime(result)) {
19466 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
20471 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
1946720472 buf_sprintf("'%s' not accessible from inner function", var->name));
1946820473 add_error_note(ira->codegen, msg, instruction->crossed_fndef_scope->base.source_node,
1946920474 buf_sprintf("crossed function definition here"));
1947020475 add_error_note(ira->codegen, msg, var->decl_node,
1947120476 buf_sprintf("declared here"));
19472 return ira->codegen->invalid_instruction;
20477 return ira->codegen->invalid_inst_gen;
1947320478 }
1947420479 return result;
1947520480}
......@@ -19520,17 +20525,17 @@ static ZigType *adjust_ptr_len(CodeGen *g, ZigType *ptr_type, PtrLen ptr_len) {
1952020525 ptr_type->data.pointer.allow_zero);
1952120526}
1952220527
19523static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstructionElemPtr *elem_ptr_instruction) {
20528static IrInstGen *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstSrcElemPtr *elem_ptr_instruction) {
1952420529 Error err;
19525 IrInstruction *array_ptr = elem_ptr_instruction->array_ptr->child;
20530 IrInstGen *array_ptr = elem_ptr_instruction->array_ptr->child;
1952620531 if (type_is_invalid(array_ptr->value->type))
19527 return ira->codegen->invalid_instruction;
20532 return ira->codegen->invalid_inst_gen;
1952820533
1952920534 ZigValue *orig_array_ptr_val = array_ptr->value;
1953020535
19531 IrInstruction *elem_index = elem_ptr_instruction->elem_index->child;
20536 IrInstGen *elem_index = elem_ptr_instruction->elem_index->child;
1953220537 if (type_is_invalid(elem_index->value->type))
19533 return ira->codegen->invalid_instruction;
20538 return ira->codegen->invalid_inst_gen;
1953420539
1953520540 ZigType *ptr_type = orig_array_ptr_val->type;
1953620541 assert(ptr_type->id == ZigTypeIdPointer);
......@@ -19542,7 +20547,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1954220547 ZigType *return_type;
1954320548
1954420549 if (type_is_invalid(array_type)) {
19545 return ira->codegen->invalid_instruction;
20550 return ira->codegen->invalid_inst_gen;
1954620551 } else if (array_type->id == ZigTypeIdArray ||
1954720552 (array_type->id == ZigTypeIdPointer &&
1954820553 array_type->data.pointer.ptr_len == PtrLenSingle &&
......@@ -19553,15 +20558,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1955320558 ptr_type = ptr_type->data.pointer.child_type;
1955420559 if (orig_array_ptr_val->special != ConstValSpecialRuntime) {
1955520560 orig_array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19556 elem_ptr_instruction->base.source_node);
20561 elem_ptr_instruction->base.base.source_node);
1955720562 if (orig_array_ptr_val == nullptr)
19558 return ira->codegen->invalid_instruction;
20563 return ira->codegen->invalid_inst_gen;
1955920564 }
1956020565 }
1956120566 if (array_type->data.array.len == 0) {
19562 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20567 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1956320568 buf_sprintf("index 0 outside array of size 0"));
19564 return ira->codegen->invalid_instruction;
20569 return ira->codegen->invalid_inst_gen;
1956520570 }
1956620571 ZigType *child_type = array_type->data.array.child_type;
1956720572 if (ptr_type->data.pointer.host_int_bytes == 0) {
......@@ -19572,7 +20577,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1957220577 } else {
1957320578 uint64_t elem_val_scalar;
1957420579 if (!ir_resolve_usize(ira, elem_index, &elem_val_scalar))
19575 return ira->codegen->invalid_instruction;
20580 return ira->codegen->invalid_inst_gen;
1957620581
1957720582 size_t bit_width = type_size_bits(ira->codegen, child_type);
1957820583 size_t bit_offset = bit_width * elem_val_scalar;
......@@ -19584,9 +20589,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1958420589 }
1958520590 } else if (array_type->id == ZigTypeIdPointer) {
1958620591 if (array_type->data.pointer.ptr_len == PtrLenSingle) {
19587 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20592 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1958820593 buf_sprintf("index of single-item pointer"));
19589 return ira->codegen->invalid_instruction;
20594 return ira->codegen->invalid_inst_gen;
1959020595 }
1959120596 return_type = adjust_ptr_len(ira->codegen, array_type, elem_ptr_instruction->ptr_len);
1959220597 } else if (is_slice(array_type)) {
......@@ -19600,38 +20605,38 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1960020605 array_type->data.structure.resolve_status == ResolveStatusBeingInferred)
1960120606 {
1960220607 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19603 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
20608 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
1960420609 if (type_is_invalid(casted_elem_index->value->type))
19605 return ira->codegen->invalid_instruction;
19606 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base);
20610 return ira->codegen->invalid_inst_gen;
20611 ir_assert(instr_is_comptime(casted_elem_index), &elem_ptr_instruction->base.base);
1960720612 Buf *field_name = buf_alloc();
1960820613 bigint_append_buf(field_name, &casted_elem_index->value->data.x_bigint, 10);
19609 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base,
20614 return ir_analyze_inferred_field_ptr(ira, field_name, &elem_ptr_instruction->base.base,
1961020615 array_ptr, array_type);
1961120616 } else if (is_tuple(array_type)) {
1961220617 uint64_t elem_index_scalar;
1961320618 if (!ir_resolve_usize(ira, elem_index, &elem_index_scalar))
19614 return ira->codegen->invalid_instruction;
20619 return ira->codegen->invalid_inst_gen;
1961520620 if (elem_index_scalar >= array_type->data.structure.src_field_count) {
19616 ir_add_error(ira, &elem_ptr_instruction->base, buf_sprintf(
20621 ir_add_error(ira, &elem_ptr_instruction->base.base, buf_sprintf(
1961720622 "field index %" ZIG_PRI_u64 " outside tuple '%s' which has %" PRIu32 " fields",
1961820623 elem_index_scalar, buf_ptr(&array_type->name),
1961920624 array_type->data.structure.src_field_count));
19620 return ira->codegen->invalid_instruction;
20625 return ira->codegen->invalid_inst_gen;
1962120626 }
1962220627 TypeStructField *field = array_type->data.structure.fields[elem_index_scalar];
19623 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base, field, array_ptr,
20628 return ir_analyze_struct_field_ptr(ira, &elem_ptr_instruction->base.base, field, array_ptr,
1962420629 array_type, false);
1962520630 } else {
19626 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20631 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1962720632 buf_sprintf("array access of non-array type '%s'", buf_ptr(&array_type->name)));
19628 return ira->codegen->invalid_instruction;
20633 return ira->codegen->invalid_inst_gen;
1962920634 }
1963020635
1963120636 ZigType *usize = ira->codegen->builtin_types.entry_usize;
19632 IrInstruction *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
19633 if (casted_elem_index == ira->codegen->invalid_instruction)
19634 return ira->codegen->invalid_instruction;
20637 IrInstGen *casted_elem_index = ir_implicit_cast(ira, elem_index, usize);
20638 if (type_is_invalid(casted_elem_index->value->type))
20639 return ira->codegen->invalid_inst_gen;
1963520640
1963620641 bool safety_check_on = elem_ptr_instruction->safety_check_on;
1963720642 if (instr_is_comptime(casted_elem_index)) {
......@@ -19640,15 +20645,15 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1964020645 uint64_t array_len = array_type->data.array.len;
1964120646 if (index == array_len && array_type->data.array.sentinel != nullptr) {
1964220647 ZigType *elem_type = array_type->data.array.child_type;
19643 IrInstruction *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base, elem_type);
20648 IrInstGen *sentinel_elem = ir_const(ira, &elem_ptr_instruction->base.base, elem_type);
1964420649 copy_const_val(sentinel_elem->value, array_type->data.array.sentinel);
19645 return ir_get_ref(ira, &elem_ptr_instruction->base, sentinel_elem, true, false);
20650 return ir_get_ref(ira, &elem_ptr_instruction->base.base, sentinel_elem, true, false);
1964620651 }
1964720652 if (index >= array_len) {
19648 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20653 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1964920654 buf_sprintf("index %" ZIG_PRI_u64 " outside array of size %" ZIG_PRI_u64,
1965020655 index, array_len));
19651 return ira->codegen->invalid_instruction;
20656 return ira->codegen->invalid_inst_gen;
1965220657 }
1965320658 safety_check_on = false;
1965420659 }
......@@ -19664,7 +20669,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1966420669 // figure out the largest alignment possible
1966520670
1966620671 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19667 return ira->codegen->invalid_instruction;
20672 return ira->codegen->invalid_inst_gen;
1966820673
1966920674 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
1967020675 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
......@@ -19696,9 +20701,9 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1969620701 (orig_array_ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar || array_type->id == ZigTypeIdArray))
1969720702 {
1969820703 ZigValue *array_ptr_val = const_ptr_pointee(ira, ira->codegen, orig_array_ptr_val,
19699 elem_ptr_instruction->base.source_node);
20704 elem_ptr_instruction->base.base.source_node);
1970020705 if (array_ptr_val == nullptr)
19701 return ira->codegen->invalid_instruction;
20706 return ira->codegen->invalid_inst_gen;
1970220707
1970320708 if (array_ptr_val->special == ConstValSpecialUndef &&
1970420709 elem_ptr_instruction->init_array_type_source_node != nullptr)
......@@ -19716,16 +20721,16 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1971620721 elem_val->parent.data.p_array.elem_index = i;
1971720722 }
1971820723 } else if (is_slice(array_type)) {
19719 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base);
20724 ir_assert(array_ptr->value->type->id == ZigTypeIdPointer, &elem_ptr_instruction->base.base);
1972020725 ZigType *actual_array_type = array_ptr->value->type->data.pointer.child_type;
1972120726
1972220727 if (type_is_invalid(actual_array_type))
19723 return ira->codegen->invalid_instruction;
20728 return ira->codegen->invalid_inst_gen;
1972420729 if (actual_array_type->id != ZigTypeIdArray) {
1972520730 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
1972620731 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
1972720732 buf_ptr(&actual_array_type->name)));
19728 return ira->codegen->invalid_instruction;
20733 return ira->codegen->invalid_inst_gen;
1972920734 }
1973020735
1973120736 ZigValue *array_init_val = create_const_vals(1);
......@@ -19750,7 +20755,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1975020755 ir_add_error_node(ira, elem_ptr_instruction->init_array_type_source_node,
1975120756 buf_sprintf("expected array type or [_], found '%s'",
1975220757 buf_ptr(&array_type->name)));
19753 return ira->codegen->invalid_instruction;
20758 return ira->codegen->invalid_inst_gen;
1975420759 }
1975520760 }
1975620761
......@@ -19759,12 +20764,12 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1975920764 array_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr))
1976020765 {
1976120766 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
19762 elem_ptr_instruction->base.source_node, array_ptr_val, UndefOk)))
20767 elem_ptr_instruction->base.base.source_node, array_ptr_val, UndefOk)))
1976320768 {
19764 return ira->codegen->invalid_instruction;
20769 return ira->codegen->invalid_inst_gen;
1976520770 }
1976620771 if (array_type->id == ZigTypeIdPointer) {
19767 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
20772 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1976820773 ZigValue *out_val = result->value;
1976920774 out_val->data.x_ptr.mut = array_ptr_val->data.x_ptr.mut;
1977020775 size_t new_index;
......@@ -19833,33 +20838,31 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1983320838 zig_panic("TODO elem ptr on a null pointer");
1983420839 }
1983520840 if (new_index >= mem_size) {
19836 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20841 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1983720842 buf_sprintf("index %" ZIG_PRI_u64 " outside pointer of size %" ZIG_PRI_usize "", index, old_size));
19838 return ira->codegen->invalid_instruction;
20843 return ira->codegen->invalid_inst_gen;
1983920844 }
1984020845 return result;
1984120846 } else if (is_slice(array_type)) {
1984220847 ZigValue *ptr_field = array_ptr_val->data.x_struct.fields[slice_ptr_index];
19843 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base);
20848 ir_assert(ptr_field != nullptr, &elem_ptr_instruction->base.base);
1984420849 if (ptr_field->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
19845 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
19846 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, false,
19847 elem_ptr_instruction->ptr_len, nullptr);
19848 result->value->type = return_type;
19849 return result;
20850 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
20851 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, false,
20852 return_type);
1985020853 }
1985120854 ZigValue *len_field = array_ptr_val->data.x_struct.fields[slice_len_index];
19852 IrInstruction *result = ir_const(ira, &elem_ptr_instruction->base, return_type);
20855 IrInstGen *result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1985320856 ZigValue *out_val = result->value;
1985420857 ZigType *slice_ptr_type = array_type->data.structure.fields[slice_ptr_index]->type_entry;
1985520858 uint64_t slice_len = bigint_as_u64(&len_field->data.x_bigint);
1985620859 uint64_t full_slice_len = slice_len +
1985720860 ((slice_ptr_type->data.pointer.sentinel != nullptr) ? 1 : 0);
1985820861 if (index >= full_slice_len) {
19859 ir_add_error_node(ira, elem_ptr_instruction->base.source_node,
20862 ir_add_error_node(ira, elem_ptr_instruction->base.base.source_node,
1986020863 buf_sprintf("index %" ZIG_PRI_u64 " outside slice of size %" ZIG_PRI_u64,
1986120864 index, slice_len));
19862 return ira->codegen->invalid_instruction;
20865 return ira->codegen->invalid_inst_gen;
1986320866 }
1986420867 out_val->data.x_ptr.mut = ptr_field->data.x_ptr.mut;
1986520868 switch (ptr_field->data.x_ptr.special) {
......@@ -19879,7 +20882,7 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1987920882 {
1988020883 ir_assert(new_index <
1988120884 ptr_field->data.x_ptr.data.base_array.array_val->type->data.array.len,
19882 &elem_ptr_instruction->base);
20885 &elem_ptr_instruction->base.base);
1988320886 }
1988420887 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
1988520888 out_val->data.x_ptr.data.base_array.array_val =
......@@ -19904,15 +20907,14 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1990420907 }
1990520908 return result;
1990620909 } else if (array_type->id == ZigTypeIdArray || array_type->id == ZigTypeIdVector) {
19907 IrInstruction *result;
20910 IrInstGen *result;
1990820911 if (orig_array_ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
19909 result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
19910 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index,
19911 false, elem_ptr_instruction->ptr_len, nullptr);
19912 result->value->type = return_type;
20912 result = ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
20913 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index,
20914 false, return_type);
1991320915 result->value->special = ConstValSpecialStatic;
1991420916 } else {
19915 result = ir_const(ira, &elem_ptr_instruction->base, return_type);
20917 result = ir_const(ira, &elem_ptr_instruction->base.base, return_type);
1991620918 }
1991720919 ZigValue *out_val = result->value;
1991820920 out_val->data.x_ptr.special = ConstPtrSpecialBaseArray;
......@@ -19938,19 +20940,19 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1993820940 // runtime known element index
1993920941 switch (type_requires_comptime(ira->codegen, return_type)) {
1994020942 case ReqCompTimeYes:
19941 ir_add_error(ira, elem_index,
20943 ir_add_error(ira, &elem_index->base,
1994220944 buf_sprintf("values of type '%s' must be comptime known, but index value is runtime known",
1994320945 buf_ptr(&return_type->data.pointer.child_type->name)));
19944 return ira->codegen->invalid_instruction;
20946 return ira->codegen->invalid_inst_gen;
1994520947 case ReqCompTimeInvalid:
19946 return ira->codegen->invalid_instruction;
20948 return ira->codegen->invalid_inst_gen;
1994720949 case ReqCompTimeNo:
1994820950 break;
1994920951 }
1995020952
1995120953 if (return_type->data.pointer.explicit_alignment != 0) {
1995220954 if ((err = type_resolve(ira->codegen, return_type->data.pointer.child_type, ResolveStatusSizeKnown)))
19953 return ira->codegen->invalid_instruction;
20955 return ira->codegen->invalid_inst_gen;
1995420956
1995520957 uint64_t elem_size = type_size(ira->codegen, return_type->data.pointer.child_type);
1995620958 uint64_t abi_align = get_abi_alignment(ira->codegen, return_type->data.pointer.child_type);
......@@ -19968,16 +20970,13 @@ static IrInstruction *ir_analyze_instruction_elem_ptr(IrAnalyze *ira, IrInstruct
1996820970 }
1996920971 }
1997020972
19971 IrInstruction *result = ir_build_elem_ptr(&ira->new_irb, elem_ptr_instruction->base.scope,
19972 elem_ptr_instruction->base.source_node, array_ptr, casted_elem_index, safety_check_on,
19973 elem_ptr_instruction->ptr_len, nullptr);
19974 result->value->type = return_type;
19975 return result;
20973 return ir_build_elem_ptr_gen(ira, elem_ptr_instruction->base.base.scope,
20974 elem_ptr_instruction->base.base.source_node, array_ptr, casted_elem_index, safety_check_on, return_type);
1997620975}
1997720976
19978static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
19979 ZigType *bare_struct_type, Buf *field_name, IrInstruction *source_instr,
19980 IrInstruction *container_ptr, ZigType *container_type)
20977static IrInstGen *ir_analyze_container_member_access_inner(IrAnalyze *ira,
20978 ZigType *bare_struct_type, Buf *field_name, IrInst* source_instr,
20979 IrInstGen *container_ptr, ZigType *container_type)
1998120980{
1998220981 if (!is_slice(bare_struct_type)) {
1998320982 ScopeDecls *container_scope = get_container_scope(bare_struct_type);
......@@ -19987,29 +20986,37 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
1998720986 if (tld->id == TldIdFn) {
1998820987 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
1998920988 if (tld->resolution == TldResolutionInvalid)
19990 return ira->codegen->invalid_instruction;
20989 return ira->codegen->invalid_inst_gen;
20990 if (tld->resolution == TldResolutionResolving)
20991 return ir_error_dependency_loop(ira, source_instr);
20992
1999120993 TldFn *tld_fn = (TldFn *)tld;
1999220994 ZigFn *fn_entry = tld_fn->fn_entry;
20995 assert(fn_entry != nullptr);
20996
1999320997 if (type_is_invalid(fn_entry->type_entry))
19994 return ira->codegen->invalid_instruction;
20998 return ira->codegen->invalid_inst_gen;
1999520999
19996 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
19997 source_instr->source_node, fn_entry, container_ptr);
21000 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn_entry, container_ptr);
1999821001 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
1999921002 } else if (tld->id == TldIdVar) {
2000021003 resolve_top_level_decl(ira->codegen, tld, source_instr->source_node, false);
2000121004 if (tld->resolution == TldResolutionInvalid)
20002 return ira->codegen->invalid_instruction;
21005 return ira->codegen->invalid_inst_gen;
21006 if (tld->resolution == TldResolutionResolving)
21007 return ir_error_dependency_loop(ira, source_instr);
21008
2000321009 TldVar *tld_var = (TldVar *)tld;
2000421010 ZigVar *var = tld_var->var;
21011 assert(var != nullptr);
21012
2000521013 if (type_is_invalid(var->var_type))
20006 return ira->codegen->invalid_instruction;
21014 return ira->codegen->invalid_inst_gen;
2000721015
2000821016 if (var->const_value->type->id == ZigTypeIdFn) {
2000921017 ir_assert(var->const_value->data.x_ptr.special == ConstPtrSpecialFunction, source_instr);
2001021018 ZigFn *fn = var->const_value->data.x_ptr.data.fn.fn_entry;
20011 IrInstruction *bound_fn_value = ir_build_const_bound_fn(&ira->new_irb, source_instr->scope,
20012 source_instr->source_node, fn, container_ptr);
21019 IrInstGen *bound_fn_value = ir_const_bound_fn(ira, source_instr, fn, container_ptr);
2001321020 return ir_get_ref(ira, source_instr, bound_fn_value, true, false);
2001421021 }
2001521022 }
......@@ -20029,7 +21036,7 @@ static IrInstruction *ir_analyze_container_member_access_inner(IrAnalyze *ira,
2002921036 }
2003021037 ir_add_error_node(ira, source_instr->source_node,
2003121038 buf_sprintf("no member named '%s' in %s'%s'", buf_ptr(field_name), prefix_name, buf_ptr(&bare_struct_type->name)));
20032 return ira->codegen->invalid_instruction;
21039 return ira->codegen->invalid_inst_gen;
2003321040}
2003421041
2003521042static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, TypeStructField *field) {
......@@ -20044,24 +21051,24 @@ static void memoize_field_init_val(CodeGen *codegen, ZigType *container_type, Ty
2004421051 field->type_entry, nullptr, UndefOk);
2004521052}
2004621053
20047static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction *source_instr,
20048 TypeStructField *field, IrInstruction *struct_ptr, ZigType *struct_type, bool initializing)
21054static IrInstGen *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInst* source_instr,
21055 TypeStructField *field, IrInstGen *struct_ptr, ZigType *struct_type, bool initializing)
2004921056{
2005021057 Error err;
2005121058 ZigType *field_type = resolve_struct_field_type(ira->codegen, field);
2005221059 if (field_type == nullptr)
20053 return ira->codegen->invalid_instruction;
21060 return ira->codegen->invalid_inst_gen;
2005421061 if (field->is_comptime) {
20055 IrInstruction *elem = ir_const(ira, source_instr, field_type);
21062 IrInstGen *elem = ir_const(ira, source_instr, field_type);
2005621063 memoize_field_init_val(ira->codegen, struct_type, field);
2005721064 copy_const_val(elem->value, field->init_val);
2005821065 return ir_get_ref(ira, source_instr, elem, true, false);
2005921066 }
2006021067 switch (type_has_one_possible_value(ira->codegen, field_type)) {
2006121068 case OnePossibleValueInvalid:
20062 return ira->codegen->invalid_instruction;
21069 return ira->codegen->invalid_inst_gen;
2006321070 case OnePossibleValueYes: {
20064 IrInstruction *elem = ir_const_move(ira, source_instr,
21071 IrInstGen *elem = ir_const_move(ira, source_instr,
2006521072 get_the_one_possible_value(ira->codegen, field_type));
2006621073 return ir_get_ref(ira, source_instr, elem, false, false);
2006721074 }
......@@ -20079,7 +21086,7 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2007921086 (struct_type->data.structure.layout == ContainerLayoutAuto) ?
2008021087 ResolveStatusZeroBitsKnown : ResolveStatusSizeKnown;
2008121088 if ((err = type_resolve(ira->codegen, struct_type, needed_resolve_status)))
20082 return ira->codegen->invalid_instruction;
21089 return ira->codegen->invalid_inst_gen;
2008321090 assert(struct_ptr->value->type->id == ZigTypeIdPointer);
2008421091 uint32_t ptr_bit_offset = struct_ptr->value->type->data.pointer.bit_offset_in_host;
2008521092 uint32_t ptr_host_int_bytes = struct_ptr->value->type->data.pointer.host_int_bytes;
......@@ -20093,14 +21100,14 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2009321100 if (instr_is_comptime(struct_ptr)) {
2009421101 ZigValue *ptr_val = ir_resolve_const(ira, struct_ptr, UndefBad);
2009521102 if (!ptr_val)
20096 return ira->codegen->invalid_instruction;
21103 return ira->codegen->invalid_inst_gen;
2009721104
2009821105 if (ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2009921106 ZigValue *struct_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2010021107 if (struct_val == nullptr)
20101 return ira->codegen->invalid_instruction;
21108 return ira->codegen->invalid_inst_gen;
2010221109 if (type_is_invalid(struct_val->type))
20103 return ira->codegen->invalid_instruction;
21110 return ira->codegen->invalid_inst_gen;
2010421111 if (initializing && struct_val->special == ConstValSpecialUndef) {
2010521112 struct_val->data.x_struct.fields = alloc_const_vals_ptrs(struct_type->data.structure.src_field_count);
2010621113 struct_val->special = ConstValSpecialStatic;
......@@ -20114,11 +21121,9 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2011421121 field_val->parent.data.p_struct.field_index = i;
2011521122 }
2011621123 }
20117 IrInstruction *result;
21124 IrInstGen *result;
2011821125 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20119 result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope,
20120 source_instr->source_node, struct_ptr, field);
20121 result->value->type = ptr_type;
21126 result = ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
2012221127 result->value->special = ConstValSpecialStatic;
2012321128 } else {
2012421129 result = ir_const(ira, source_instr, ptr_type);
......@@ -20131,14 +21136,11 @@ static IrInstruction *ir_analyze_struct_field_ptr(IrAnalyze *ira, IrInstruction
2013121136 return result;
2013221137 }
2013321138 }
20134 IrInstruction *result = ir_build_struct_field_ptr(&ira->new_irb, source_instr->scope, source_instr->source_node,
20135 struct_ptr, field);
20136 result->value->type = ptr_type;
20137 return result;
21139 return ir_build_struct_field_ptr(ira, source_instr, struct_ptr, field, ptr_type);
2013821140}
2013921141
20140static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
20141 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type)
21142static IrInstGen *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_name,
21143 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type)
2014221144{
2014321145 // The type of the field is not available until a store using this pointer happens.
2014421146 // So, here we create a special pointer type which has the inferred struct type and
......@@ -20161,12 +21163,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
2016121163 if (instr_is_comptime(container_ptr)) {
2016221164 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2016321165 if (ptr_val == nullptr)
20164 return ira->codegen->invalid_instruction;
21166 return ira->codegen->invalid_inst_gen;
2016521167
20166 IrInstruction *result;
21168 IrInstGen *result;
2016721169 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20168 result = ir_build_cast(&ira->new_irb, source_instr->scope,
20169 source_instr->source_node, container_ptr_type, container_ptr, CastOpNoop);
21170 result = ir_build_cast(ira, source_instr, container_ptr_type, container_ptr, CastOpNoop);
2017021171 } else {
2017121172 result = ir_const(ira, source_instr, field_ptr_type);
2017221173 }
......@@ -20175,14 +21176,11 @@ static IrInstruction *ir_analyze_inferred_field_ptr(IrAnalyze *ira, Buf *field_n
2017521176 return result;
2017621177 }
2017721178
20178 IrInstruction *result = ir_build_cast(&ira->new_irb, source_instr->scope,
20179 source_instr->source_node, field_ptr_type, container_ptr, CastOpNoop);
20180 result->value->type = field_ptr_type;
20181 return result;
21179 return ir_build_cast(ira, source_instr, field_ptr_type, container_ptr, CastOpNoop);
2018221180}
2018321181
20184static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
20185 IrInstruction *source_instr, IrInstruction *container_ptr, ZigType *container_type, bool initializing)
21182static IrInstGen *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_name,
21183 IrInst* source_instr, IrInstGen *container_ptr, ZigType *container_type, bool initializing)
2018621184{
2018721185 Error err;
2018821186
......@@ -20195,7 +21193,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2019521193 }
2019621194
2019721195 if ((err = type_resolve(ira->codegen, bare_type, ResolveStatusZeroBitsKnown)))
20198 return ira->codegen->invalid_instruction;
21196 return ira->codegen->invalid_inst_gen;
2019921197
2020021198 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2020121199 if (bare_type->id == ZigTypeIdStruct) {
......@@ -20225,22 +21223,22 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2022521223
2022621224 ZigType *field_type = resolve_union_field_type(ira->codegen, field);
2022721225 if (field_type == nullptr)
20228 return ira->codegen->invalid_instruction;
21226 return ira->codegen->invalid_inst_gen;
2022921227
2023021228 ZigType *ptr_type = get_pointer_to_type_extra(ira->codegen, field_type,
2023121229 is_const, is_volatile, PtrLenSingle, 0, 0, 0, false);
2023221230 if (instr_is_comptime(container_ptr)) {
2023321231 ZigValue *ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2023421232 if (!ptr_val)
20235 return ira->codegen->invalid_instruction;
21233 return ira->codegen->invalid_inst_gen;
2023621234
2023721235 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
2023821236 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2023921237 ZigValue *union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2024021238 if (union_val == nullptr)
20241 return ira->codegen->invalid_instruction;
21239 return ira->codegen->invalid_inst_gen;
2024221240 if (type_is_invalid(union_val->type))
20243 return ira->codegen->invalid_instruction;
21241 return ira->codegen->invalid_inst_gen;
2024421242
2024521243 if (initializing) {
2024621244 ZigValue *payload_val = create_const_vals(1);
......@@ -20261,17 +21259,16 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2026121259 ir_add_error_node(ira, source_instr->source_node,
2026221260 buf_sprintf("accessing union field '%s' while field '%s' is set", buf_ptr(field_name),
2026321261 buf_ptr(actual_field->name)));
20264 return ira->codegen->invalid_instruction;
21262 return ira->codegen->invalid_inst_gen;
2026521263 }
2026621264 }
2026721265
2026821266 ZigValue *payload_val = union_val->data.x_union.payload;
2026921267
20270 IrInstruction *result;
21268 IrInstGen *result;
2027121269 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
20272 result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
20273 source_instr->source_node, container_ptr, field, true, initializing);
20274 result->value->type = ptr_type;
21270 result = ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true,
21271 initializing, ptr_type);
2027521272 result->value->special = ConstValSpecialStatic;
2027621273 } else {
2027721274 result = ir_const(ira, source_instr, ptr_type);
......@@ -20284,10 +21281,7 @@ static IrInstruction *ir_analyze_container_field_ptr(IrAnalyze *ira, Buf *field_
2028421281 }
2028521282 }
2028621283
20287 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb, source_instr->scope,
20288 source_instr->source_node, container_ptr, field, true, initializing);
20289 result->value->type = ptr_type;
20290 return result;
21284 return ir_build_union_field_ptr(ira, source_instr, container_ptr, field, true, initializing, ptr_type);
2029121285 }
2029221286
2029321287 zig_unreachable();
......@@ -20328,16 +21322,18 @@ static void add_link_lib_symbol(IrAnalyze *ira, Buf *lib_name, Buf *symbol_name,
2032821322 link_lib->symbols.append(symbol_name);
2032921323}
2033021324
20331static IrInstruction *ir_error_dependency_loop(IrAnalyze *ira, IrInstruction *source_instr) {
21325static IrInstGen *ir_error_dependency_loop(IrAnalyze *ira, IrInst* source_instr) {
2033221326 ir_add_error(ira, source_instr, buf_sprintf("dependency loop detected"));
20333 return ira->codegen->invalid_instruction;
21327 return ira->codegen->invalid_inst_gen;
2033421328}
2033521329
20336static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_instruction, Tld *tld) {
21330static IrInstGen *ir_analyze_decl_ref(IrAnalyze *ira, IrInst* source_instruction, Tld *tld) {
2033721331 resolve_top_level_decl(ira->codegen, tld, source_instruction->source_node, true);
2033821332 if (tld->resolution == TldResolutionInvalid) {
20339 return ira->codegen->invalid_instruction;
21333 return ira->codegen->invalid_inst_gen;
2034021334 }
21335 if (tld->resolution == TldResolutionResolving)
21336 return ir_error_dependency_loop(ira, source_instruction);
2034121337
2034221338 switch (tld->id) {
2034321339 case TldIdContainer:
......@@ -20347,9 +21343,8 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
2034721343 case TldIdVar: {
2034821344 TldVar *tld_var = (TldVar *)tld;
2034921345 ZigVar *var = tld_var->var;
20350 if (var == nullptr) {
20351 return ir_error_dependency_loop(ira, source_instruction);
20352 }
21346 assert(var != nullptr);
21347
2035321348 if (tld_var->extern_lib_name != nullptr) {
2035421349 add_link_lib_symbol(ira, tld_var->extern_lib_name, buf_create_from_str(var->name),
2035521350 source_instruction->source_node);
......@@ -20360,17 +21355,16 @@ static IrInstruction *ir_analyze_decl_ref(IrAnalyze *ira, IrInstruction *source_
2036021355 case TldIdFn: {
2036121356 TldFn *tld_fn = (TldFn *)tld;
2036221357 ZigFn *fn_entry = tld_fn->fn_entry;
20363 assert(fn_entry->type_entry);
21358 assert(fn_entry->type_entry != nullptr);
2036421359
2036521360 if (type_is_invalid(fn_entry->type_entry))
20366 return ira->codegen->invalid_instruction;
21361 return ira->codegen->invalid_inst_gen;
2036721362
2036821363 if (tld_fn->extern_lib_name != nullptr) {
2036921364 add_link_lib_symbol(ira, tld_fn->extern_lib_name, &fn_entry->symbol_name, source_instruction->source_node);
2037021365 }
2037121366
20372 IrInstruction *fn_inst = ir_create_const_fn(&ira->new_irb, source_instruction->scope,
20373 source_instruction->source_node, fn_entry);
21367 IrInstGen *fn_inst = ir_const_fn(ira, source_instruction, fn_entry);
2037421368 return ir_get_ref(ira, source_instruction, fn_inst, true, false);
2037521369 }
2037621370 }
......@@ -20388,40 +21382,40 @@ static ErrorTableEntry *find_err_table_entry(ZigType *err_set_type, Buf *field_n
2038821382 return nullptr;
2038921383}
2039021384
20391static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstructionFieldPtr *field_ptr_instruction) {
21385static IrInstGen *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstSrcFieldPtr *field_ptr_instruction) {
2039221386 Error err;
20393 IrInstruction *container_ptr = field_ptr_instruction->container_ptr->child;
21387 IrInstGen *container_ptr = field_ptr_instruction->container_ptr->child;
2039421388 if (type_is_invalid(container_ptr->value->type))
20395 return ira->codegen->invalid_instruction;
21389 return ira->codegen->invalid_inst_gen;
2039621390
2039721391 ZigType *container_type = container_ptr->value->type->data.pointer.child_type;
2039821392
2039921393 Buf *field_name = field_ptr_instruction->field_name_buffer;
2040021394 if (!field_name) {
20401 IrInstruction *field_name_expr = field_ptr_instruction->field_name_expr->child;
21395 IrInstGen *field_name_expr = field_ptr_instruction->field_name_expr->child;
2040221396 field_name = ir_resolve_str(ira, field_name_expr);
2040321397 if (!field_name)
20404 return ira->codegen->invalid_instruction;
21398 return ira->codegen->invalid_inst_gen;
2040521399 }
2040621400
2040721401
20408 AstNode *source_node = field_ptr_instruction->base.source_node;
21402 AstNode *source_node = field_ptr_instruction->base.base.source_node;
2040921403
2041021404 if (type_is_invalid(container_type)) {
20411 return ira->codegen->invalid_instruction;
21405 return ira->codegen->invalid_inst_gen;
2041221406 } else if (is_tuple(container_type) && !field_ptr_instruction->initializing && buf_eql_str(field_name, "len")) {
20413 IrInstruction *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base,
21407 IrInstGen *len_inst = ir_const_unsigned(ira, &field_ptr_instruction->base.base,
2041421408 container_type->data.structure.src_field_count);
20415 return ir_get_ref(ira, &field_ptr_instruction->base, len_inst, true, false);
21409 return ir_get_ref(ira, &field_ptr_instruction->base.base, len_inst, true, false);
2041621410 } else if (is_slice(container_type) || is_container_ref(container_type)) {
2041721411 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2041821412 if (container_type->id == ZigTypeIdPointer) {
2041921413 ZigType *bare_type = container_ref_type(container_type);
20420 IrInstruction *container_child = ir_get_deref(ira, &field_ptr_instruction->base, container_ptr, nullptr);
20421 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_child, bare_type, field_ptr_instruction->initializing);
21414 IrInstGen *container_child = ir_get_deref(ira, &field_ptr_instruction->base.base, container_ptr, nullptr);
21415 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_child, bare_type, field_ptr_instruction->initializing);
2042221416 return result;
2042321417 } else {
20424 IrInstruction *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base, container_ptr, container_type, field_ptr_instruction->initializing);
21418 IrInstGen *result = ir_analyze_container_field_ptr(ira, field_name, &field_ptr_instruction->base.base, container_ptr, container_type, field_ptr_instruction->initializing);
2042521419 return result;
2042621420 }
2042721421 } else if (is_array_ref(container_type) && !field_ptr_instruction->initializing) {
......@@ -20436,42 +21430,42 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2043621430 ZigType *usize = ira->codegen->builtin_types.entry_usize;
2043721431 bool ptr_is_const = true;
2043821432 bool ptr_is_volatile = false;
20439 return ir_get_const_ptr(ira, &field_ptr_instruction->base, len_val,
21433 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, len_val,
2044021434 usize, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2044121435 } else {
2044221436 ir_add_error_node(ira, source_node,
2044321437 buf_sprintf("no member named '%s' in '%s'", buf_ptr(field_name),
2044421438 buf_ptr(&container_type->name)));
20445 return ira->codegen->invalid_instruction;
21439 return ira->codegen->invalid_inst_gen;
2044621440 }
2044721441 } else if (container_type->id == ZigTypeIdMetaType) {
2044821442 ZigValue *container_ptr_val = ir_resolve_const(ira, container_ptr, UndefBad);
2044921443 if (!container_ptr_val)
20450 return ira->codegen->invalid_instruction;
21444 return ira->codegen->invalid_inst_gen;
2045121445
2045221446 assert(container_ptr->value->type->id == ZigTypeIdPointer);
2045321447 ZigValue *child_val = const_ptr_pointee(ira, ira->codegen, container_ptr_val, source_node);
2045421448 if (child_val == nullptr)
20455 return ira->codegen->invalid_instruction;
21449 return ira->codegen->invalid_inst_gen;
2045621450 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
20457 field_ptr_instruction->base.source_node, child_val, UndefBad)))
21451 field_ptr_instruction->base.base.source_node, child_val, UndefBad)))
2045821452 {
20459 return ira->codegen->invalid_instruction;
21453 return ira->codegen->invalid_inst_gen;
2046021454 }
2046121455 ZigType *child_type = child_val->data.x_type;
2046221456
2046321457 if (type_is_invalid(child_type)) {
20464 return ira->codegen->invalid_instruction;
21458 return ira->codegen->invalid_inst_gen;
2046521459 } else if (is_container(child_type)) {
2046621460 if (child_type->id == ZigTypeIdEnum) {
2046721461 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20468 return ira->codegen->invalid_instruction;
21462 return ira->codegen->invalid_inst_gen;
2046921463
2047021464 TypeEnumField *field = find_enum_type_field(child_type, field_name);
2047121465 if (field) {
2047221466 bool ptr_is_const = true;
2047321467 bool ptr_is_volatile = false;
20474 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21468 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2047521469 create_const_enum(child_type, &field->value), child_type,
2047621470 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2047721471 }
......@@ -20480,37 +21474,37 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2048021474 Tld *tld = find_container_decl(ira->codegen, container_scope, field_name);
2048121475 if (tld) {
2048221476 if (tld->visib_mod == VisibModPrivate &&
20483 tld->import != get_scope_import(field_ptr_instruction->base.scope))
21477 tld->import != get_scope_import(field_ptr_instruction->base.base.scope))
2048421478 {
20485 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base,
21479 ErrorMsg *msg = ir_add_error(ira, &field_ptr_instruction->base.base,
2048621480 buf_sprintf("'%s' is private", buf_ptr(field_name)));
2048721481 add_error_note(ira->codegen, msg, tld->source_node, buf_sprintf("declared here"));
20488 return ira->codegen->invalid_instruction;
21482 return ira->codegen->invalid_inst_gen;
2048921483 }
20490 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base, tld);
21484 return ir_analyze_decl_ref(ira, &field_ptr_instruction->base.base, tld);
2049121485 }
2049221486 if (child_type->id == ZigTypeIdUnion &&
2049321487 (child_type->data.unionation.decl_node->data.container_decl.init_arg_expr != nullptr ||
2049421488 child_type->data.unionation.decl_node->data.container_decl.auto_enum))
2049521489 {
2049621490 if ((err = type_resolve(ira->codegen, child_type, ResolveStatusSizeKnown)))
20497 return ira->codegen->invalid_instruction;
21491 return ira->codegen->invalid_inst_gen;
2049821492 TypeUnionField *field = find_union_type_field(child_type, field_name);
2049921493 if (field) {
2050021494 ZigType *enum_type = child_type->data.unionation.tag_type;
2050121495 bool ptr_is_const = true;
2050221496 bool ptr_is_volatile = false;
20503 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21497 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2050421498 create_const_enum(enum_type, &field->enum_field->value), enum_type,
2050521499 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2050621500 }
2050721501 }
2050821502 const char *container_name = (child_type == ira->codegen->root_import) ?
2050921503 "root source file" : buf_ptr(buf_sprintf("container '%s'", buf_ptr(&child_type->name)));
20510 ir_add_error(ira, &field_ptr_instruction->base,
21504 ir_add_error(ira, &field_ptr_instruction->base.base,
2051121505 buf_sprintf("%s has no member called '%s'",
2051221506 container_name, buf_ptr(field_name)));
20513 return ira->codegen->invalid_instruction;
21507 return ira->codegen->invalid_inst_gen;
2051421508 } else if (child_type->id == ZigTypeIdErrorSet) {
2051521509 ErrorTableEntry *err_entry;
2051621510 ZigType *err_set_type;
......@@ -20520,7 +21514,7 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2052021514 err_entry = existing_entry->value;
2052121515 } else {
2052221516 err_entry = allocate<ErrorTableEntry>(1);
20523 err_entry->decl_node = field_ptr_instruction->base.source_node;
21517 err_entry->decl_node = field_ptr_instruction->base.base.source_node;
2052421518 buf_init_from_buf(&err_entry->name, field_name);
2052521519 size_t error_value_count = ira->codegen->errors_by_index.length;
2052621520 assert((uint32_t)error_value_count < (((uint32_t)1) << (uint32_t)ira->codegen->err_tag_type->data.integral.bit_count));
......@@ -20530,19 +21524,19 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2053021524 }
2053121525 if (err_entry->set_with_only_this_in_it == nullptr) {
2053221526 err_entry->set_with_only_this_in_it = make_err_set_with_one_item(ira->codegen,
20533 field_ptr_instruction->base.scope, field_ptr_instruction->base.source_node,
21527 field_ptr_instruction->base.base.scope, field_ptr_instruction->base.base.source_node,
2053421528 err_entry);
2053521529 }
2053621530 err_set_type = err_entry->set_with_only_this_in_it;
2053721531 } else {
20538 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.source_node)) {
20539 return ira->codegen->invalid_instruction;
21532 if (!resolve_inferred_error_set(ira->codegen, child_type, field_ptr_instruction->base.base.source_node)) {
21533 return ira->codegen->invalid_inst_gen;
2054021534 }
2054121535 err_entry = find_err_table_entry(child_type, field_name);
2054221536 if (err_entry == nullptr) {
20543 ir_add_error(ira, &field_ptr_instruction->base,
21537 ir_add_error(ira, &field_ptr_instruction->base.base,
2054421538 buf_sprintf("no error named '%s' in '%s'", buf_ptr(field_name), buf_ptr(&child_type->name)));
20545 return ira->codegen->invalid_instruction;
21539 return ira->codegen->invalid_inst_gen;
2054621540 }
2054721541 err_set_type = child_type;
2054821542 }
......@@ -20553,13 +21547,13 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2055321547
2055421548 bool ptr_is_const = true;
2055521549 bool ptr_is_volatile = false;
20556 return ir_get_const_ptr(ira, &field_ptr_instruction->base, const_val,
21550 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base, const_val,
2055721551 err_set_type, ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2055821552 } else if (child_type->id == ZigTypeIdInt) {
2055921553 if (buf_eql_str(field_name, "bit_count")) {
2056021554 bool ptr_is_const = true;
2056121555 bool ptr_is_volatile = false;
20562 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21556 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2056321557 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2056421558 child_type->data.integral.bit_count, false),
2056521559 ira->codegen->builtin_types.entry_num_lit_int,
......@@ -20567,36 +21561,36 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2056721561 } else if (buf_eql_str(field_name, "is_signed")) {
2056821562 bool ptr_is_const = true;
2056921563 bool ptr_is_volatile = false;
20570 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21564 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2057121565 create_const_bool(ira->codegen, child_type->data.integral.is_signed),
2057221566 ira->codegen->builtin_types.entry_bool,
2057321567 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2057421568 } else {
20575 ir_add_error(ira, &field_ptr_instruction->base,
21569 ir_add_error(ira, &field_ptr_instruction->base.base,
2057621570 buf_sprintf("type '%s' has no member called '%s'",
2057721571 buf_ptr(&child_type->name), buf_ptr(field_name)));
20578 return ira->codegen->invalid_instruction;
21572 return ira->codegen->invalid_inst_gen;
2057921573 }
2058021574 } else if (child_type->id == ZigTypeIdFloat) {
2058121575 if (buf_eql_str(field_name, "bit_count")) {
2058221576 bool ptr_is_const = true;
2058321577 bool ptr_is_volatile = false;
20584 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21578 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2058521579 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2058621580 child_type->data.floating.bit_count, false),
2058721581 ira->codegen->builtin_types.entry_num_lit_int,
2058821582 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2058921583 } else {
20590 ir_add_error(ira, &field_ptr_instruction->base,
21584 ir_add_error(ira, &field_ptr_instruction->base.base,
2059121585 buf_sprintf("type '%s' has no member called '%s'",
2059221586 buf_ptr(&child_type->name), buf_ptr(field_name)));
20593 return ira->codegen->invalid_instruction;
21587 return ira->codegen->invalid_inst_gen;
2059421588 }
2059521589 } else if (child_type->id == ZigTypeIdPointer) {
2059621590 if (buf_eql_str(field_name, "Child")) {
2059721591 bool ptr_is_const = true;
2059821592 bool ptr_is_volatile = false;
20599 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21593 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2060021594 create_const_type(ira->codegen, child_type->data.pointer.child_type),
2060121595 ira->codegen->builtin_types.entry_type,
2060221596 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
......@@ -20606,75 +21600,75 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2060621600 if ((err = type_resolve(ira->codegen, child_type->data.pointer.child_type,
2060721601 ResolveStatusAlignmentKnown)))
2060821602 {
20609 return ira->codegen->invalid_instruction;
21603 return ira->codegen->invalid_inst_gen;
2061021604 }
20611 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21605 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2061221606 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2061321607 get_ptr_align(ira->codegen, child_type), false),
2061421608 ira->codegen->builtin_types.entry_num_lit_int,
2061521609 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2061621610 } else {
20617 ir_add_error(ira, &field_ptr_instruction->base,
21611 ir_add_error(ira, &field_ptr_instruction->base.base,
2061821612 buf_sprintf("type '%s' has no member called '%s'",
2061921613 buf_ptr(&child_type->name), buf_ptr(field_name)));
20620 return ira->codegen->invalid_instruction;
21614 return ira->codegen->invalid_inst_gen;
2062121615 }
2062221616 } else if (child_type->id == ZigTypeIdArray) {
2062321617 if (buf_eql_str(field_name, "Child")) {
2062421618 bool ptr_is_const = true;
2062521619 bool ptr_is_volatile = false;
20626 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21620 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2062721621 create_const_type(ira->codegen, child_type->data.array.child_type),
2062821622 ira->codegen->builtin_types.entry_type,
2062921623 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2063021624 } else if (buf_eql_str(field_name, "len")) {
2063121625 bool ptr_is_const = true;
2063221626 bool ptr_is_volatile = false;
20633 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21627 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2063421628 create_const_unsigned_negative(ira->codegen->builtin_types.entry_num_lit_int,
2063521629 child_type->data.array.len, false),
2063621630 ira->codegen->builtin_types.entry_num_lit_int,
2063721631 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2063821632 } else {
20639 ir_add_error(ira, &field_ptr_instruction->base,
21633 ir_add_error(ira, &field_ptr_instruction->base.base,
2064021634 buf_sprintf("type '%s' has no member called '%s'",
2064121635 buf_ptr(&child_type->name), buf_ptr(field_name)));
20642 return ira->codegen->invalid_instruction;
21636 return ira->codegen->invalid_inst_gen;
2064321637 }
2064421638 } else if (child_type->id == ZigTypeIdErrorUnion) {
2064521639 if (buf_eql_str(field_name, "Payload")) {
2064621640 bool ptr_is_const = true;
2064721641 bool ptr_is_volatile = false;
20648 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21642 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2064921643 create_const_type(ira->codegen, child_type->data.error_union.payload_type),
2065021644 ira->codegen->builtin_types.entry_type,
2065121645 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2065221646 } else if (buf_eql_str(field_name, "ErrorSet")) {
2065321647 bool ptr_is_const = true;
2065421648 bool ptr_is_volatile = false;
20655 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21649 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2065621650 create_const_type(ira->codegen, child_type->data.error_union.err_set_type),
2065721651 ira->codegen->builtin_types.entry_type,
2065821652 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2065921653 } else {
20660 ir_add_error(ira, &field_ptr_instruction->base,
21654 ir_add_error(ira, &field_ptr_instruction->base.base,
2066121655 buf_sprintf("type '%s' has no member called '%s'",
2066221656 buf_ptr(&child_type->name), buf_ptr(field_name)));
20663 return ira->codegen->invalid_instruction;
21657 return ira->codegen->invalid_inst_gen;
2066421658 }
2066521659 } else if (child_type->id == ZigTypeIdOptional) {
2066621660 if (buf_eql_str(field_name, "Child")) {
2066721661 bool ptr_is_const = true;
2066821662 bool ptr_is_volatile = false;
20669 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21663 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2067021664 create_const_type(ira->codegen, child_type->data.maybe.child_type),
2067121665 ira->codegen->builtin_types.entry_type,
2067221666 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2067321667 } else {
20674 ir_add_error(ira, &field_ptr_instruction->base,
21668 ir_add_error(ira, &field_ptr_instruction->base.base,
2067521669 buf_sprintf("type '%s' has no member called '%s'",
2067621670 buf_ptr(&child_type->name), buf_ptr(field_name)));
20677 return ira->codegen->invalid_instruction;
21671 return ira->codegen->invalid_inst_gen;
2067821672 }
2067921673 } else if (child_type->id == ZigTypeIdFn) {
2068021674 if (buf_eql_str(field_name, "ReturnType")) {
......@@ -20682,121 +21676,121 @@ static IrInstruction *ir_analyze_instruction_field_ptr(IrAnalyze *ira, IrInstruc
2068221676 // Return type can only ever be null, if the function is generic
2068321677 assert(child_type->data.fn.is_generic);
2068421678
20685 ir_add_error(ira, &field_ptr_instruction->base,
21679 ir_add_error(ira, &field_ptr_instruction->base.base,
2068621680 buf_sprintf("ReturnType has not been resolved because '%s' is generic", buf_ptr(&child_type->name)));
20687 return ira->codegen->invalid_instruction;
21681 return ira->codegen->invalid_inst_gen;
2068821682 }
2068921683
2069021684 bool ptr_is_const = true;
2069121685 bool ptr_is_volatile = false;
20692 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21686 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2069321687 create_const_type(ira->codegen, child_type->data.fn.fn_type_id.return_type),
2069421688 ira->codegen->builtin_types.entry_type,
2069521689 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2069621690 } else if (buf_eql_str(field_name, "is_var_args")) {
2069721691 bool ptr_is_const = true;
2069821692 bool ptr_is_volatile = false;
20699 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21693 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2070021694 create_const_bool(ira->codegen, child_type->data.fn.fn_type_id.is_var_args),
2070121695 ira->codegen->builtin_types.entry_bool,
2070221696 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2070321697 } else if (buf_eql_str(field_name, "arg_count")) {
2070421698 bool ptr_is_const = true;
2070521699 bool ptr_is_volatile = false;
20706 return ir_get_const_ptr(ira, &field_ptr_instruction->base,
21700 return ir_get_const_ptr(ira, &field_ptr_instruction->base.base,
2070721701 create_const_usize(ira->codegen, child_type->data.fn.fn_type_id.param_count),
2070821702 ira->codegen->builtin_types.entry_usize,
2070921703 ConstPtrMutComptimeConst, ptr_is_const, ptr_is_volatile, 0);
2071021704 } else {
20711 ir_add_error(ira, &field_ptr_instruction->base,
21705 ir_add_error(ira, &field_ptr_instruction->base.base,
2071221706 buf_sprintf("type '%s' has no member called '%s'",
2071321707 buf_ptr(&child_type->name), buf_ptr(field_name)));
20714 return ira->codegen->invalid_instruction;
21708 return ira->codegen->invalid_inst_gen;
2071521709 }
2071621710 } else {
20717 ir_add_error(ira, &field_ptr_instruction->base,
21711 ir_add_error(ira, &field_ptr_instruction->base.base,
2071821712 buf_sprintf("type '%s' does not support field access", buf_ptr(&child_type->name)));
20719 return ira->codegen->invalid_instruction;
21713 return ira->codegen->invalid_inst_gen;
2072021714 }
2072121715 } else if (field_ptr_instruction->initializing) {
20722 ir_add_error(ira, &field_ptr_instruction->base,
21716 ir_add_error(ira, &field_ptr_instruction->base.base,
2072321717 buf_sprintf("type '%s' does not support struct initialization syntax", buf_ptr(&container_type->name)));
20724 return ira->codegen->invalid_instruction;
21718 return ira->codegen->invalid_inst_gen;
2072521719 } else {
20726 ir_add_error_node(ira, field_ptr_instruction->base.source_node,
21720 ir_add_error_node(ira, field_ptr_instruction->base.base.source_node,
2072721721 buf_sprintf("type '%s' does not support field access", buf_ptr(&container_type->name)));
20728 return ira->codegen->invalid_instruction;
21722 return ira->codegen->invalid_inst_gen;
2072921723 }
2073021724}
2073121725
20732static IrInstruction *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstructionStorePtr *instruction) {
20733 IrInstruction *ptr = instruction->ptr->child;
21726static IrInstGen *ir_analyze_instruction_store_ptr(IrAnalyze *ira, IrInstSrcStorePtr *instruction) {
21727 IrInstGen *ptr = instruction->ptr->child;
2073421728 if (type_is_invalid(ptr->value->type))
20735 return ira->codegen->invalid_instruction;
21729 return ira->codegen->invalid_inst_gen;
2073621730
20737 IrInstruction *value = instruction->value->child;
21731 IrInstGen *value = instruction->value->child;
2073821732 if (type_is_invalid(value->value->type))
20739 return ira->codegen->invalid_instruction;
21733 return ira->codegen->invalid_inst_gen;
2074021734
20741 return ir_analyze_store_ptr(ira, &instruction->base, ptr, value, instruction->allow_write_through_const);
21735 return ir_analyze_store_ptr(ira, &instruction->base.base, ptr, value, instruction->allow_write_through_const);
2074221736}
2074321737
20744static IrInstruction *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstructionLoadPtr *instruction) {
20745 IrInstruction *ptr = instruction->ptr->child;
21738static IrInstGen *ir_analyze_instruction_load_ptr(IrAnalyze *ira, IrInstSrcLoadPtr *instruction) {
21739 IrInstGen *ptr = instruction->ptr->child;
2074621740 if (type_is_invalid(ptr->value->type))
20747 return ira->codegen->invalid_instruction;
20748 return ir_get_deref(ira, &instruction->base, ptr, nullptr);
21741 return ira->codegen->invalid_inst_gen;
21742 return ir_get_deref(ira, &instruction->base.base, ptr, nullptr);
2074921743}
2075021744
20751static IrInstruction *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstructionTypeOf *typeof_instruction) {
20752 IrInstruction *expr_value = typeof_instruction->value->child;
21745static IrInstGen *ir_analyze_instruction_typeof(IrAnalyze *ira, IrInstSrcTypeOf *typeof_instruction) {
21746 IrInstGen *expr_value = typeof_instruction->value->child;
2075321747 ZigType *type_entry = expr_value->value->type;
2075421748 if (type_is_invalid(type_entry))
20755 return ira->codegen->invalid_instruction;
20756 return ir_const_type(ira, &typeof_instruction->base, type_entry);
21749 return ira->codegen->invalid_inst_gen;
21750 return ir_const_type(ira, &typeof_instruction->base.base, type_entry);
2075721751}
2075821752
20759static IrInstruction *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstructionSetCold *instruction) {
21753static IrInstGen *ir_analyze_instruction_set_cold(IrAnalyze *ira, IrInstSrcSetCold *instruction) {
2076021754 if (ira->new_irb.exec->is_inline) {
2076121755 // ignore setCold when running functions at compile time
20762 return ir_const_void(ira, &instruction->base);
21756 return ir_const_void(ira, &instruction->base.base);
2076321757 }
2076421758
20765 IrInstruction *is_cold_value = instruction->is_cold->child;
21759 IrInstGen *is_cold_value = instruction->is_cold->child;
2076621760 bool want_cold;
2076721761 if (!ir_resolve_bool(ira, is_cold_value, &want_cold))
20768 return ira->codegen->invalid_instruction;
21762 return ira->codegen->invalid_inst_gen;
2076921763
20770 ZigFn *fn_entry = scope_fn_entry(instruction->base.scope);
21764 ZigFn *fn_entry = scope_fn_entry(instruction->base.base.scope);
2077121765 if (fn_entry == nullptr) {
20772 ir_add_error(ira, &instruction->base, buf_sprintf("@setCold outside function"));
20773 return ira->codegen->invalid_instruction;
21766 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setCold outside function"));
21767 return ira->codegen->invalid_inst_gen;
2077421768 }
2077521769
2077621770 if (fn_entry->set_cold_node != nullptr) {
20777 ErrorMsg *msg = ir_add_error(ira, &instruction->base, buf_sprintf("cold set twice in same function"));
21771 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base, buf_sprintf("cold set twice in same function"));
2077821772 add_error_note(ira->codegen, msg, fn_entry->set_cold_node, buf_sprintf("first set here"));
20779 return ira->codegen->invalid_instruction;
21773 return ira->codegen->invalid_inst_gen;
2078021774 }
2078121775
20782 fn_entry->set_cold_node = instruction->base.source_node;
21776 fn_entry->set_cold_node = instruction->base.base.source_node;
2078321777 fn_entry->is_cold = want_cold;
2078421778
20785 return ir_const_void(ira, &instruction->base);
21779 return ir_const_void(ira, &instruction->base.base);
2078621780}
2078721781
20788static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
20789 IrInstructionSetRuntimeSafety *set_runtime_safety_instruction)
21782static IrInstGen *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
21783 IrInstSrcSetRuntimeSafety *set_runtime_safety_instruction)
2079021784{
2079121785 if (ira->new_irb.exec->is_inline) {
2079221786 // ignore setRuntimeSafety when running functions at compile time
20793 return ir_const_void(ira, &set_runtime_safety_instruction->base);
21787 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
2079421788 }
2079521789
2079621790 bool *safety_off_ptr;
2079721791 AstNode **safety_set_node_ptr;
2079821792
20799 Scope *scope = set_runtime_safety_instruction->base.scope;
21793 Scope *scope = set_runtime_safety_instruction->base.base.scope;
2080021794 while (scope != nullptr) {
2080121795 if (scope->id == ScopeIdBlock) {
2080221796 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -20822,36 +21816,36 @@ static IrInstruction *ir_analyze_instruction_set_runtime_safety(IrAnalyze *ira,
2082221816 }
2082321817 assert(scope != nullptr);
2082421818
20825 IrInstruction *safety_on_value = set_runtime_safety_instruction->safety_on->child;
21819 IrInstGen *safety_on_value = set_runtime_safety_instruction->safety_on->child;
2082621820 bool want_runtime_safety;
2082721821 if (!ir_resolve_bool(ira, safety_on_value, &want_runtime_safety))
20828 return ira->codegen->invalid_instruction;
21822 return ira->codegen->invalid_inst_gen;
2082921823
20830 AstNode *source_node = set_runtime_safety_instruction->base.source_node;
21824 AstNode *source_node = set_runtime_safety_instruction->base.base.source_node;
2083121825 if (*safety_set_node_ptr) {
2083221826 ErrorMsg *msg = ir_add_error_node(ira, source_node,
2083321827 buf_sprintf("runtime safety set twice for same scope"));
2083421828 add_error_note(ira->codegen, msg, *safety_set_node_ptr, buf_sprintf("first set here"));
20835 return ira->codegen->invalid_instruction;
21829 return ira->codegen->invalid_inst_gen;
2083621830 }
2083721831 *safety_set_node_ptr = source_node;
2083821832 *safety_off_ptr = !want_runtime_safety;
2083921833
20840 return ir_const_void(ira, &set_runtime_safety_instruction->base);
21834 return ir_const_void(ira, &set_runtime_safety_instruction->base.base);
2084121835}
2084221836
20843static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
20844 IrInstructionSetFloatMode *instruction)
21837static IrInstGen *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
21838 IrInstSrcSetFloatMode *instruction)
2084521839{
2084621840 if (ira->new_irb.exec->is_inline) {
2084721841 // ignore setFloatMode when running functions at compile time
20848 return ir_const_void(ira, &instruction->base);
21842 return ir_const_void(ira, &instruction->base.base);
2084921843 }
2085021844
2085121845 bool *fast_math_on_ptr;
2085221846 AstNode **fast_math_set_node_ptr;
2085321847
20854 Scope *scope = instruction->base.scope;
21848 Scope *scope = instruction->base.base.scope;
2085521849 while (scope != nullptr) {
2085621850 if (scope->id == ScopeIdBlock) {
2085721851 ScopeBlock *block_scope = (ScopeBlock *)scope;
......@@ -20877,42 +21871,38 @@ static IrInstruction *ir_analyze_instruction_set_float_mode(IrAnalyze *ira,
2087721871 }
2087821872 assert(scope != nullptr);
2087921873
20880 IrInstruction *float_mode_value = instruction->mode_value->child;
21874 IrInstGen *float_mode_value = instruction->mode_value->child;
2088121875 FloatMode float_mode_scalar;
2088221876 if (!ir_resolve_float_mode(ira, float_mode_value, &float_mode_scalar))
20883 return ira->codegen->invalid_instruction;
21877 return ira->codegen->invalid_inst_gen;
2088421878
20885 AstNode *source_node = instruction->base.source_node;
21879 AstNode *source_node = instruction->base.base.source_node;
2088621880 if (*fast_math_set_node_ptr) {
2088721881 ErrorMsg *msg = ir_add_error_node(ira, source_node,
2088821882 buf_sprintf("float mode set twice for same scope"));
2088921883 add_error_note(ira->codegen, msg, *fast_math_set_node_ptr, buf_sprintf("first set here"));
20890 return ira->codegen->invalid_instruction;
21884 return ira->codegen->invalid_inst_gen;
2089121885 }
2089221886 *fast_math_set_node_ptr = source_node;
2089321887 *fast_math_on_ptr = (float_mode_scalar == FloatModeOptimized);
2089421888
20895 return ir_const_void(ira, &instruction->base);
21889 return ir_const_void(ira, &instruction->base.base);
2089621890}
2089721891
20898static IrInstruction *ir_analyze_instruction_any_frame_type(IrAnalyze *ira,
20899 IrInstructionAnyFrameType *instruction)
20900{
21892static IrInstGen *ir_analyze_instruction_any_frame_type(IrAnalyze *ira, IrInstSrcAnyFrameType *instruction) {
2090121893 ZigType *payload_type = nullptr;
2090221894 if (instruction->payload_type != nullptr) {
2090321895 payload_type = ir_resolve_type(ira, instruction->payload_type->child);
2090421896 if (type_is_invalid(payload_type))
20905 return ira->codegen->invalid_instruction;
21897 return ira->codegen->invalid_inst_gen;
2090621898 }
2090721899
2090821900 ZigType *any_frame_type = get_any_frame_type(ira->codegen, payload_type);
20909 return ir_const_type(ira, &instruction->base, any_frame_type);
21901 return ir_const_type(ira, &instruction->base.base, any_frame_type);
2091021902}
2091121903
20912static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
20913 IrInstructionSliceType *slice_type_instruction)
20914{
20915 IrInstruction *result = ir_const(ira, &slice_type_instruction->base, ira->codegen->builtin_types.entry_type);
21904static IrInstGen *ir_analyze_instruction_slice_type(IrAnalyze *ira, IrInstSrcSliceType *slice_type_instruction) {
21905 IrInstGen *result = ir_const(ira, &slice_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
2091621906 result->value->special = ConstValSpecialLazy;
2091721907
2091821908 LazyValueSliceType *lazy_slice_type = allocate<LazyValueSliceType>(1, "LazyValueSliceType");
......@@ -20923,18 +21913,18 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
2092321913 if (slice_type_instruction->align_value != nullptr) {
2092421914 lazy_slice_type->align_inst = slice_type_instruction->align_value->child;
2092521915 if (ir_resolve_const(ira, lazy_slice_type->align_inst, LazyOk) == nullptr)
20926 return ira->codegen->invalid_instruction;
21916 return ira->codegen->invalid_inst_gen;
2092721917 }
2092821918
2092921919 if (slice_type_instruction->sentinel != nullptr) {
2093021920 lazy_slice_type->sentinel = slice_type_instruction->sentinel->child;
2093121921 if (ir_resolve_const(ira, lazy_slice_type->sentinel, LazyOk) == nullptr)
20932 return ira->codegen->invalid_instruction;
21922 return ira->codegen->invalid_inst_gen;
2093321923 }
2093421924
2093521925 lazy_slice_type->elem_type = slice_type_instruction->child_type->child;
2093621926 if (ir_resolve_type_lazy(ira, lazy_slice_type->elem_type) == nullptr)
20937 return ira->codegen->invalid_instruction;
21927 return ira->codegen->invalid_inst_gen;
2093821928
2093921929 lazy_slice_type->is_const = slice_type_instruction->is_const;
2094021930 lazy_slice_type->is_volatile = slice_type_instruction->is_volatile;
......@@ -20943,31 +21933,31 @@ static IrInstruction *ir_analyze_instruction_slice_type(IrAnalyze *ira,
2094321933 return result;
2094421934}
2094521935
20946static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAsmSrc *asm_instruction) {
21936static IrInstGen *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstSrcAsm *asm_instruction) {
2094721937 Error err;
2094821938
20949 assert(asm_instruction->base.source_node->type == NodeTypeAsmExpr);
21939 assert(asm_instruction->base.base.source_node->type == NodeTypeAsmExpr);
2095021940
20951 AstNode *node = asm_instruction->base.source_node;
20952 AstNodeAsmExpr *asm_expr = &asm_instruction->base.source_node->data.asm_expr;
21941 AstNode *node = asm_instruction->base.base.source_node;
21942 AstNodeAsmExpr *asm_expr = &asm_instruction->base.base.source_node->data.asm_expr;
2095321943
2095421944 Buf *template_buf = ir_resolve_str(ira, asm_instruction->asm_template->child);
2095521945 if (template_buf == nullptr)
20956 return ira->codegen->invalid_instruction;
21946 return ira->codegen->invalid_inst_gen;
2095721947
2095821948 if (asm_instruction->is_global) {
2095921949 buf_append_char(&ira->codegen->global_asm, '\n');
2096021950 buf_append_buf(&ira->codegen->global_asm, template_buf);
2096121951
20962 return ir_const_void(ira, &asm_instruction->base);
21952 return ir_const_void(ira, &asm_instruction->base.base);
2096321953 }
2096421954
20965 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base))
20966 return ira->codegen->invalid_instruction;
21955 if (!ir_emit_global_runtime_side_effect(ira, &asm_instruction->base.base))
21956 return ira->codegen->invalid_inst_gen;
2096721957
2096821958 ZigList<AsmToken> tok_list = {};
2096921959 if ((err = parse_asm_template(ira, node, template_buf, &tok_list))) {
20970 return ira->codegen->invalid_instruction;
21960 return ira->codegen->invalid_inst_gen;
2097121961 }
2097221962
2097321963 for (size_t token_i = 0; token_i < tok_list.length; token_i += 1) {
......@@ -20981,15 +21971,15 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
2098121971 add_node_error(ira->codegen, node,
2098221972 buf_sprintf("could not find '%.*s' in the inputs or outputs",
2098321973 len, ptr));
20984 return ira->codegen->invalid_instruction;
21974 return ira->codegen->invalid_inst_gen;
2098521975 }
2098621976 }
2098721977 }
2098821978
2098921979 // TODO validate the output types and variable types
2099021980
20991 IrInstruction **input_list = allocate<IrInstruction *>(asm_expr->input_list.length);
20992 IrInstruction **output_types = allocate<IrInstruction *>(asm_expr->output_list.length);
21981 IrInstGen **input_list = allocate<IrInstGen *>(asm_expr->input_list.length);
21982 IrInstGen **output_types = allocate<IrInstGen *>(asm_expr->output_list.length);
2099321983
2099421984 ZigType *return_type = ira->codegen->builtin_types.entry_void;
2099521985 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
......@@ -20998,39 +21988,34 @@ static IrInstruction *ir_analyze_instruction_asm(IrAnalyze *ira, IrInstructionAs
2099821988 output_types[i] = asm_instruction->output_types[i]->child;
2099921989 return_type = ir_resolve_type(ira, output_types[i]);
2100021990 if (type_is_invalid(return_type))
21001 return ira->codegen->invalid_instruction;
21991 return ira->codegen->invalid_inst_gen;
2100221992 }
2100321993 }
2100421994
2100521995 for (size_t i = 0; i < asm_expr->input_list.length; i += 1) {
21006 IrInstruction *const input_value = asm_instruction->input_list[i]->child;
21996 IrInstGen *const input_value = asm_instruction->input_list[i]->child;
2100721997 if (type_is_invalid(input_value->value->type))
21008 return ira->codegen->invalid_instruction;
21998 return ira->codegen->invalid_inst_gen;
2100921999
2101022000 if (instr_is_comptime(input_value) &&
2101122001 (input_value->value->type->id == ZigTypeIdComptimeInt ||
2101222002 input_value->value->type->id == ZigTypeIdComptimeFloat)) {
21013 ir_add_error_node(ira, input_value->source_node,
22003 ir_add_error(ira, &input_value->base,
2101422004 buf_sprintf("expected sized integer or sized float, found %s", buf_ptr(&input_value->value->type->name)));
21015 return ira->codegen->invalid_instruction;
22005 return ira->codegen->invalid_inst_gen;
2101622006 }
2101722007
2101822008 input_list[i] = input_value;
2101922009 }
2102022010
21021 IrInstruction *result = ir_build_asm_gen(ira,
21022 asm_instruction->base.scope, asm_instruction->base.source_node,
22011 return ir_build_asm_gen(ira, &asm_instruction->base.base,
2102322012 template_buf, tok_list.items, tok_list.length,
2102422013 input_list, output_types, asm_instruction->output_vars, asm_instruction->return_count,
21025 asm_instruction->has_side_effects);
21026 result->value->type = return_type;
21027 return result;
22014 asm_instruction->has_side_effects, return_type);
2102822015}
2102922016
21030static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
21031 IrInstructionArrayType *array_type_instruction)
21032{
21033 IrInstruction *result = ir_const(ira, &array_type_instruction->base, ira->codegen->builtin_types.entry_type);
22017static IrInstGen *ir_analyze_instruction_array_type(IrAnalyze *ira, IrInstSrcArrayType *array_type_instruction) {
22018 IrInstGen *result = ir_const(ira, &array_type_instruction->base.base, ira->codegen->builtin_types.entry_type);
2103422019 result->value->special = ConstValSpecialLazy;
2103522020
2103622021 LazyValueArrayType *lazy_array_type = allocate<LazyValueArrayType>(1, "LazyValueArrayType");
......@@ -21040,22 +22025,22 @@ static IrInstruction *ir_analyze_instruction_array_type(IrAnalyze *ira,
2104022025
2104122026 lazy_array_type->elem_type = array_type_instruction->child_type->child;
2104222027 if (ir_resolve_type_lazy(ira, lazy_array_type->elem_type) == nullptr)
21043 return ira->codegen->invalid_instruction;
22028 return ira->codegen->invalid_inst_gen;
2104422029
2104522030 if (!ir_resolve_usize(ira, array_type_instruction->size->child, &lazy_array_type->length))
21046 return ira->codegen->invalid_instruction;
22031 return ira->codegen->invalid_inst_gen;
2104722032
2104822033 if (array_type_instruction->sentinel != nullptr) {
2104922034 lazy_array_type->sentinel = array_type_instruction->sentinel->child;
2105022035 if (ir_resolve_const(ira, lazy_array_type->sentinel, LazyOk) == nullptr)
21051 return ira->codegen->invalid_instruction;
22036 return ira->codegen->invalid_inst_gen;
2105222037 }
2105322038
2105422039 return result;
2105522040}
2105622041
21057static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructionSizeOf *instruction) {
21058 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22042static IrInstGen *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstSrcSizeOf *instruction) {
22043 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2105922044 result->value->special = ConstValSpecialLazy;
2106022045
2106122046 LazyValueSizeOf *lazy_size_of = allocate<LazyValueSizeOf>(1, "LazyValueSizeOf");
......@@ -21066,19 +22051,19 @@ static IrInstruction *ir_analyze_instruction_size_of(IrAnalyze *ira, IrInstructi
2106622051
2106722052 lazy_size_of->target_type = instruction->type_value->child;
2106822053 if (ir_resolve_type_lazy(ira, lazy_size_of->target_type) == nullptr)
21069 return ira->codegen->invalid_instruction;
22054 return ira->codegen->invalid_inst_gen;
2107022055
2107122056 return result;
2107222057}
2107322058
21074static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *source_inst, IrInstruction *value) {
22059static IrInstGen *ir_analyze_test_non_null(IrAnalyze *ira, IrInst *source_inst, IrInstGen *value) {
2107522060 ZigType *type_entry = value->value->type;
2107622061
2107722062 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.allow_zero) {
2107822063 if (instr_is_comptime(value)) {
2107922064 ZigValue *c_ptr_val = ir_resolve_const(ira, value, UndefOk);
2108022065 if (c_ptr_val == nullptr)
21081 return ira->codegen->invalid_instruction;
22066 return ira->codegen->invalid_inst_gen;
2108222067 if (c_ptr_val->special == ConstValSpecialUndef)
2108322068 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
2108422069 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
......@@ -21087,25 +22072,19 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
2108722072 return ir_const_bool(ira, source_inst, !is_null);
2108822073 }
2108922074
21090 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
21091 source_inst->scope, source_inst->source_node, value);
21092 result->value->type = ira->codegen->builtin_types.entry_bool;
21093 return result;
22075 return ir_build_test_non_null_gen(ira, source_inst, value);
2109422076 } else if (type_entry->id == ZigTypeIdOptional) {
2109522077 if (instr_is_comptime(value)) {
2109622078 ZigValue *maybe_val = ir_resolve_const(ira, value, UndefOk);
2109722079 if (maybe_val == nullptr)
21098 return ira->codegen->invalid_instruction;
22080 return ira->codegen->invalid_inst_gen;
2109922081 if (maybe_val->special == ConstValSpecialUndef)
2110022082 return ir_const_undef(ira, source_inst, ira->codegen->builtin_types.entry_bool);
2110122083
2110222084 return ir_const_bool(ira, source_inst, !optional_value_is_null(maybe_val));
2110322085 }
2110422086
21105 IrInstruction *result = ir_build_test_nonnull(&ira->new_irb,
21106 source_inst->scope, source_inst->source_node, value);
21107 result->value->type = ira->codegen->builtin_types.entry_bool;
21108 return result;
22087 return ir_build_test_non_null_gen(ira, source_inst, value);
2110922088 } else if (type_entry->id == ZigTypeIdNull) {
2111022089 return ir_const_bool(ira, source_inst, false);
2111122090 } else {
......@@ -21113,53 +22092,53 @@ static IrInstruction *ir_analyze_test_non_null(IrAnalyze *ira, IrInstruction *so
2111322092 }
2111422093}
2111522094
21116static IrInstruction *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstructionTestNonNull *instruction) {
21117 IrInstruction *value = instruction->value->child;
22095static IrInstGen *ir_analyze_instruction_test_non_null(IrAnalyze *ira, IrInstSrcTestNonNull *instruction) {
22096 IrInstGen *value = instruction->value->child;
2111822097 if (type_is_invalid(value->value->type))
21119 return ira->codegen->invalid_instruction;
22098 return ira->codegen->invalid_inst_gen;
2112022099
21121 return ir_analyze_test_non_null(ira, &instruction->base, value);
22100 return ir_analyze_test_non_null(ira, &instruction->base.base, value);
2112222101}
2112322102
21124static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstruction *source_instr,
21125 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
22103static IrInstGen *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInst* source_instr,
22104 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
2112622105{
2112722106 Error err;
2112822107
2112922108 ZigType *type_entry = get_ptr_elem_type(ira->codegen, base_ptr);
2113022109 if (type_is_invalid(type_entry))
21131 return ira->codegen->invalid_instruction;
22110 return ira->codegen->invalid_inst_gen;
2113222111
2113322112 if (type_entry->id == ZigTypeIdPointer && type_entry->data.pointer.ptr_len == PtrLenC) {
2113422113 if (instr_is_comptime(base_ptr)) {
2113522114 ZigValue *val = ir_resolve_const(ira, base_ptr, UndefBad);
2113622115 if (!val)
21137 return ira->codegen->invalid_instruction;
22116 return ira->codegen->invalid_inst_gen;
2113822117 if (val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2113922118 ZigValue *c_ptr_val = const_ptr_pointee(ira, ira->codegen, val, source_instr->source_node);
2114022119 if (c_ptr_val == nullptr)
21141 return ira->codegen->invalid_instruction;
22120 return ira->codegen->invalid_inst_gen;
2114222121 bool is_null = c_ptr_val->data.x_ptr.special == ConstPtrSpecialNull ||
2114322122 (c_ptr_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
2114422123 c_ptr_val->data.x_ptr.data.hard_coded_addr.addr == 0);
2114522124 if (is_null) {
2114622125 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21147 return ira->codegen->invalid_instruction;
22126 return ira->codegen->invalid_inst_gen;
2114822127 }
2114922128 return base_ptr;
2115022129 }
2115122130 }
2115222131 if (!safety_check_on)
2115322132 return base_ptr;
21154 IrInstruction *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
22133 IrInstGen *c_ptr_val = ir_get_deref(ira, source_instr, base_ptr, nullptr);
2115522134 ir_build_assert_non_null(ira, source_instr, c_ptr_val);
2115622135 return base_ptr;
2115722136 }
2115822137
2115922138 if (type_entry->id != ZigTypeIdOptional) {
21160 ir_add_error_node(ira, base_ptr->source_node,
22139 ir_add_error(ira, &base_ptr->base,
2116122140 buf_sprintf("expected optional type, found '%s'", buf_ptr(&type_entry->name)));
21162 return ira->codegen->invalid_instruction;
22141 return ira->codegen->invalid_inst_gen;
2116322142 }
2116422143
2116522144 ZigType *child_type = type_entry->data.maybe.child_type;
......@@ -21172,16 +22151,16 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2117222151 if (instr_is_comptime(base_ptr)) {
2117322152 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
2117422153 if (ptr_val == nullptr)
21175 return ira->codegen->invalid_instruction;
22154 return ira->codegen->invalid_inst_gen;
2117622155 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2117722156 ZigValue *optional_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2117822157 if (optional_val == nullptr)
21179 return ira->codegen->invalid_instruction;
22158 return ira->codegen->invalid_inst_gen;
2118022159
2118122160 if (initializing) {
2118222161 switch (type_has_one_possible_value(ira->codegen, child_type)) {
2118322162 case OnePossibleValueInvalid:
21184 return ira->codegen->invalid_instruction;
22163 return ira->codegen->invalid_inst_gen;
2118522164 case OnePossibleValueNo:
2118622165 if (!same_comptime_repr) {
2118722166 ZigValue *payload_val = create_const_vals(1);
......@@ -21209,18 +22188,17 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2120922188 } else {
2121022189 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec,
2121122190 source_instr->source_node, optional_val, UndefBad)))
21212 return ira->codegen->invalid_instruction;
22191 return ira->codegen->invalid_inst_gen;
2121322192 if (optional_value_is_null(optional_val)) {
2121422193 ir_add_error(ira, source_instr, buf_sprintf("unable to unwrap null"));
21215 return ira->codegen->invalid_instruction;
22194 return ira->codegen->invalid_inst_gen;
2121622195 }
2121722196 }
2121822197
21219 IrInstruction *result;
22198 IrInstGen *result;
2122022199 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
21221 result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
21222 source_instr->source_node, base_ptr, false, initializing);
21223 result->value->type = result_type;
22200 result = ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, false,
22201 initializing, result_type);
2122422202 result->value->special = ConstValSpecialStatic;
2122522203 } else {
2122622204 result = ir_const(ira, source_instr, result_type);
......@@ -21230,7 +22208,7 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2123022208 result_val->data.x_ptr.mut = ptr_val->data.x_ptr.mut;
2123122209 switch (type_has_one_possible_value(ira->codegen, child_type)) {
2123222210 case OnePossibleValueInvalid:
21233 return ira->codegen->invalid_instruction;
22211 return ira->codegen->invalid_inst_gen;
2123422212 case OnePossibleValueNo:
2123522213 if (same_comptime_repr) {
2123622214 result_val->data.x_ptr.data.ref.pointee = optional_val;
......@@ -21248,135 +22226,120 @@ static IrInstruction *ir_analyze_unwrap_optional_payload(IrAnalyze *ira, IrInstr
2124822226 }
2124922227 }
2125022228
21251 IrInstruction *result = ir_build_optional_unwrap_ptr(&ira->new_irb, source_instr->scope,
21252 source_instr->source_node, base_ptr, safety_check_on, initializing);
21253 result->value->type = result_type;
21254 return result;
22229 return ir_build_optional_unwrap_ptr_gen(ira, source_instr, base_ptr, safety_check_on,
22230 initializing, result_type);
2125522231}
2125622232
21257static IrInstruction *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
21258 IrInstructionOptionalUnwrapPtr *instruction)
22233static IrInstGen *ir_analyze_instruction_optional_unwrap_ptr(IrAnalyze *ira,
22234 IrInstSrcOptionalUnwrapPtr *instruction)
2125922235{
21260 IrInstruction *base_ptr = instruction->base_ptr->child;
22236 IrInstGen *base_ptr = instruction->base_ptr->child;
2126122237 if (type_is_invalid(base_ptr->value->type))
21262 return ira->codegen->invalid_instruction;
22238 return ira->codegen->invalid_inst_gen;
2126322239
21264 return ir_analyze_unwrap_optional_payload(ira, &instruction->base, base_ptr,
22240 return ir_analyze_unwrap_optional_payload(ira, &instruction->base.base, base_ptr,
2126522241 instruction->safety_check_on, false);
2126622242}
2126722243
21268static IrInstruction *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstructionCtz *instruction) {
22244static IrInstGen *ir_analyze_instruction_ctz(IrAnalyze *ira, IrInstSrcCtz *instruction) {
2126922245 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2127022246 if (type_is_invalid(int_type))
21271 return ira->codegen->invalid_instruction;
22247 return ira->codegen->invalid_inst_gen;
2127222248
21273 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22249 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2127422250 if (type_is_invalid(op->value->type))
21275 return ira->codegen->invalid_instruction;
22251 return ira->codegen->invalid_inst_gen;
2127622252
2127722253 if (int_type->data.integral.bit_count == 0)
21278 return ir_const_unsigned(ira, &instruction->base, 0);
22254 return ir_const_unsigned(ira, &instruction->base.base, 0);
2127922255
2128022256 if (instr_is_comptime(op)) {
2128122257 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2128222258 if (val == nullptr)
21283 return ira->codegen->invalid_instruction;
22259 return ira->codegen->invalid_inst_gen;
2128422260 if (val->special == ConstValSpecialUndef)
21285 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22261 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2128622262 size_t result_usize = bigint_ctz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21287 return ir_const_unsigned(ira, &instruction->base, result_usize);
22263 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
2128822264 }
2128922265
2129022266 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21291 IrInstruction *result = ir_build_ctz(&ira->new_irb, instruction->base.scope,
21292 instruction->base.source_node, nullptr, op);
21293 result->value->type = return_type;
21294 return result;
22267 return ir_build_ctz_gen(ira, &instruction->base.base, return_type, op);
2129522268}
2129622269
21297static IrInstruction *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstructionClz *instruction) {
22270static IrInstGen *ir_analyze_instruction_clz(IrAnalyze *ira, IrInstSrcClz *instruction) {
2129822271 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2129922272 if (type_is_invalid(int_type))
21300 return ira->codegen->invalid_instruction;
22273 return ira->codegen->invalid_inst_gen;
2130122274
21302 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22275 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2130322276 if (type_is_invalid(op->value->type))
21304 return ira->codegen->invalid_instruction;
22277 return ira->codegen->invalid_inst_gen;
2130522278
2130622279 if (int_type->data.integral.bit_count == 0)
21307 return ir_const_unsigned(ira, &instruction->base, 0);
22280 return ir_const_unsigned(ira, &instruction->base.base, 0);
2130822281
2130922282 if (instr_is_comptime(op)) {
2131022283 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2131122284 if (val == nullptr)
21312 return ira->codegen->invalid_instruction;
22285 return ira->codegen->invalid_inst_gen;
2131322286 if (val->special == ConstValSpecialUndef)
21314 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22287 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2131522288 size_t result_usize = bigint_clz(&op->value->data.x_bigint, int_type->data.integral.bit_count);
21316 return ir_const_unsigned(ira, &instruction->base, result_usize);
22289 return ir_const_unsigned(ira, &instruction->base.base, result_usize);
2131722290 }
2131822291
2131922292 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21320 IrInstruction *result = ir_build_clz(&ira->new_irb, instruction->base.scope,
21321 instruction->base.source_node, nullptr, op);
21322 result->value->type = return_type;
21323 return result;
22293 return ir_build_clz_gen(ira, &instruction->base.base, return_type, op);
2132422294}
2132522295
21326static IrInstruction *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstructionPopCount *instruction) {
22296static IrInstGen *ir_analyze_instruction_pop_count(IrAnalyze *ira, IrInstSrcPopCount *instruction) {
2132722297 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2132822298 if (type_is_invalid(int_type))
21329 return ira->codegen->invalid_instruction;
22299 return ira->codegen->invalid_inst_gen;
2133022300
21331 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
22301 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2133222302 if (type_is_invalid(op->value->type))
21333 return ira->codegen->invalid_instruction;
22303 return ira->codegen->invalid_inst_gen;
2133422304
2133522305 if (int_type->data.integral.bit_count == 0)
21336 return ir_const_unsigned(ira, &instruction->base, 0);
22306 return ir_const_unsigned(ira, &instruction->base.base, 0);
2133722307
2133822308 if (instr_is_comptime(op)) {
2133922309 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2134022310 if (val == nullptr)
21341 return ira->codegen->invalid_instruction;
22311 return ira->codegen->invalid_inst_gen;
2134222312 if (val->special == ConstValSpecialUndef)
21343 return ir_const_undef(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
22313 return ir_const_undef(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2134422314
2134522315 if (bigint_cmp_zero(&val->data.x_bigint) != CmpLT) {
2134622316 size_t result = bigint_popcount_unsigned(&val->data.x_bigint);
21347 return ir_const_unsigned(ira, &instruction->base, result);
22317 return ir_const_unsigned(ira, &instruction->base.base, result);
2134822318 }
2134922319 size_t result = bigint_popcount_signed(&val->data.x_bigint, int_type->data.integral.bit_count);
21350 return ir_const_unsigned(ira, &instruction->base, result);
22320 return ir_const_unsigned(ira, &instruction->base.base, result);
2135122321 }
2135222322
2135322323 ZigType *return_type = get_smallest_unsigned_int_type(ira->codegen, int_type->data.integral.bit_count);
21354 IrInstruction *result = ir_build_pop_count(&ira->new_irb, instruction->base.scope,
21355 instruction->base.source_node, nullptr, op);
21356 result->value->type = return_type;
21357 return result;
22324 return ir_build_pop_count_gen(ira, &instruction->base.base, return_type, op);
2135822325}
2135922326
21360static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value) {
22327static IrInstGen *ir_analyze_union_tag(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value, bool is_gen) {
2136122328 if (type_is_invalid(value->value->type))
21362 return ira->codegen->invalid_instruction;
21363
21364 if (value->value->type->id == ZigTypeIdEnum) {
21365 return value;
21366 }
22329 return ira->codegen->invalid_inst_gen;
2136722330
2136822331 if (value->value->type->id != ZigTypeIdUnion) {
21369 ir_add_error(ira, value,
22332 ir_add_error(ira, &value->base,
2137022333 buf_sprintf("expected enum or union type, found '%s'", buf_ptr(&value->value->type->name)));
21371 return ira->codegen->invalid_instruction;
22334 return ira->codegen->invalid_inst_gen;
2137222335 }
21373 if (!value->value->type->data.unionation.have_explicit_tag_type && !source_instr->is_gen) {
22336 if (!value->value->type->data.unionation.have_explicit_tag_type && !is_gen) {
2137422337 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("union has no associated enum"));
2137522338 if (value->value->type->data.unionation.decl_node != nullptr) {
2137622339 add_error_note(ira->codegen, msg, value->value->type->data.unionation.decl_node,
2137722340 buf_sprintf("declared here"));
2137822341 }
21379 return ira->codegen->invalid_instruction;
22342 return ira->codegen->invalid_inst_gen;
2138022343 }
2138122344
2138222345 ZigType *tag_type = value->value->type->data.unionation.tag_type;
......@@ -21385,9 +22348,9 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
2138522348 if (instr_is_comptime(value)) {
2138622349 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
2138722350 if (!val)
21388 return ira->codegen->invalid_instruction;
22351 return ira->codegen->invalid_inst_gen;
2138922352
21390 IrInstructionConst *const_instruction = ir_create_instruction<IrInstructionConst>(&ira->new_irb,
22353 IrInstGenConst *const_instruction = ir_create_inst_gen<IrInstGenConst>(&ira->new_irb,
2139122354 source_instr->scope, source_instr->source_node);
2139222355 const_instruction->base.value->type = tag_type;
2139322356 const_instruction->base.value->special = ConstValSpecialStatic;
......@@ -21395,15 +22358,13 @@ static IrInstruction *ir_analyze_union_tag(IrAnalyze *ira, IrInstruction *source
2139522358 return &const_instruction->base;
2139622359 }
2139722360
21398 IrInstruction *result = ir_build_union_tag(&ira->new_irb, source_instr->scope, source_instr->source_node, value);
21399 result->value->type = tag_type;
21400 return result;
22361 return ir_build_union_tag(ira, source_instr, value, tag_type);
2140122362}
2140222363
21403static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
21404 IrInstructionSwitchBr *switch_br_instruction)
22364static IrInstGen *ir_analyze_instruction_switch_br(IrAnalyze *ira,
22365 IrInstSrcSwitchBr *switch_br_instruction)
2140522366{
21406 IrInstruction *target_value = switch_br_instruction->target_value->child;
22367 IrInstGen *target_value = switch_br_instruction->target_value->child;
2140722368 if (type_is_invalid(target_value->value->type))
2140822369 return ir_unreach_error(ira);
2140922370
......@@ -21418,27 +22379,21 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2141822379
2141922380 bool is_comptime;
2142022381 if (!ir_resolve_comptime(ira, switch_br_instruction->is_comptime->child, &is_comptime))
21421 return ira->codegen->invalid_instruction;
22382 return ira->codegen->invalid_inst_gen;
2142222383
2142322384 if (is_comptime || instr_is_comptime(target_value)) {
2142422385 ZigValue *target_val = ir_resolve_const(ira, target_value, UndefBad);
2142522386 if (!target_val)
2142622387 return ir_unreach_error(ira);
2142722388
21428 IrBasicBlock *old_dest_block = switch_br_instruction->else_block;
22389 IrBasicBlockSrc *old_dest_block = switch_br_instruction->else_block;
2142922390 for (size_t i = 0; i < case_count; i += 1) {
21430 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21431 IrInstruction *case_value = old_case->value->child;
22391 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
22392 IrInstGen *case_value = old_case->value->child;
2143222393 if (type_is_invalid(case_value->value->type))
2143322394 return ir_unreach_error(ira);
2143422395
21435 if (case_value->value->type->id == ZigTypeIdEnum) {
21436 case_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, case_value);
21437 if (type_is_invalid(case_value->value->type))
21438 return ir_unreach_error(ira);
21439 }
21440
21441 IrInstruction *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
22396 IrInstGen *casted_case_value = ir_implicit_cast(ira, case_value, target_value->value->type);
2144222397 if (type_is_invalid(casted_case_value->value->type))
2144322398 return ir_unreach_error(ira);
2144422399
......@@ -21453,23 +22408,20 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2145322408 }
2145422409
2145522410 if (is_comptime || old_dest_block->ref_count == 1) {
21456 return ir_inline_bb(ira, &switch_br_instruction->base, old_dest_block);
22411 return ir_inline_bb(ira, &switch_br_instruction->base.base, old_dest_block);
2145722412 } else {
21458 IrBasicBlock *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base);
21459 IrInstruction *result = ir_build_br(&ira->new_irb,
21460 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
21461 new_dest_block, nullptr);
21462 result->value->type = ira->codegen->builtin_types.entry_unreachable;
22413 IrBasicBlockGen *new_dest_block = ir_get_new_bb(ira, old_dest_block, &switch_br_instruction->base.base);
22414 IrInstGen *result = ir_build_br_gen(ira, &switch_br_instruction->base.base, new_dest_block);
2146322415 return ir_finish_anal(ira, result);
2146422416 }
2146522417 }
2146622418
21467 IrInstructionSwitchBrCase *cases = allocate<IrInstructionSwitchBrCase>(case_count);
22419 IrInstGenSwitchBrCase *cases = allocate<IrInstGenSwitchBrCase>(case_count);
2146822420 for (size_t i = 0; i < case_count; i += 1) {
21469 IrInstructionSwitchBrCase *old_case = &switch_br_instruction->cases[i];
21470 IrInstructionSwitchBrCase *new_case = &cases[i];
21471 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base);
21472 new_case->value = ira->codegen->invalid_instruction;
22421 IrInstSrcSwitchBrCase *old_case = &switch_br_instruction->cases[i];
22422 IrInstGenSwitchBrCase *new_case = &cases[i];
22423 new_case->block = ir_get_new_bb(ira, old_case->block, &switch_br_instruction->base.base);
22424 new_case->value = ira->codegen->invalid_inst_gen;
2147322425
2147422426 // Calling ir_get_new_bb set the ref_instruction on the new basic block.
2147522427 // However a switch br may branch to the same basic block which would trigger an
......@@ -21477,18 +22429,12 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2147722429 // it back after the loop.
2147822430 new_case->block->ref_instruction = nullptr;
2147922431
21480 IrInstruction *old_value = old_case->value;
21481 IrInstruction *new_value = old_value->child;
22432 IrInstSrc *old_value = old_case->value;
22433 IrInstGen *new_value = old_value->child;
2148222434 if (type_is_invalid(new_value->value->type))
2148322435 continue;
2148422436
21485 if (new_value->value->type->id == ZigTypeIdEnum) {
21486 new_value = ir_analyze_union_tag(ira, &switch_br_instruction->base, new_value);
21487 if (type_is_invalid(new_value->value->type))
21488 continue;
21489 }
21490
21491 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
22437 IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, target_value->value->type);
2149222438 if (type_is_invalid(casted_new_value->value->type))
2149322439 continue;
2149422440
......@@ -21499,47 +22445,45 @@ static IrInstruction *ir_analyze_instruction_switch_br(IrAnalyze *ira,
2149922445 }
2150022446
2150122447 for (size_t i = 0; i < case_count; i += 1) {
21502 IrInstructionSwitchBrCase *new_case = &cases[i];
21503 if (new_case->value == ira->codegen->invalid_instruction)
22448 IrInstGenSwitchBrCase *new_case = &cases[i];
22449 if (type_is_invalid(new_case->value->value->type))
2150422450 return ir_unreach_error(ira);
21505 new_case->block->ref_instruction = &switch_br_instruction->base;
22451 new_case->block->ref_instruction = &switch_br_instruction->base.base;
2150622452 }
2150722453
21508 IrBasicBlock *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base);
21509 IrInstructionSwitchBr *switch_br = ir_build_switch_br(&ira->new_irb,
21510 switch_br_instruction->base.scope, switch_br_instruction->base.source_node,
21511 target_value, new_else_block, case_count, cases, nullptr, nullptr);
21512 switch_br->base.value->type = ira->codegen->builtin_types.entry_unreachable;
22454 IrBasicBlockGen *new_else_block = ir_get_new_bb(ira, switch_br_instruction->else_block, &switch_br_instruction->base.base);
22455 IrInstGenSwitchBr *switch_br = ir_build_switch_br_gen(ira, &switch_br_instruction->base.base,
22456 target_value, new_else_block, case_count, cases);
2151322457 return ir_finish_anal(ira, &switch_br->base);
2151422458}
2151522459
21516static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
21517 IrInstructionSwitchTarget *switch_target_instruction)
22460static IrInstGen *ir_analyze_instruction_switch_target(IrAnalyze *ira,
22461 IrInstSrcSwitchTarget *switch_target_instruction)
2151822462{
2151922463 Error err;
21520 IrInstruction *target_value_ptr = switch_target_instruction->target_value_ptr->child;
22464 IrInstGen *target_value_ptr = switch_target_instruction->target_value_ptr->child;
2152122465 if (type_is_invalid(target_value_ptr->value->type))
21522 return ira->codegen->invalid_instruction;
22466 return ira->codegen->invalid_inst_gen;
2152322467
2152422468 if (target_value_ptr->value->type->id == ZigTypeIdMetaType) {
2152522469 assert(instr_is_comptime(target_value_ptr));
2152622470 ZigType *ptr_type = target_value_ptr->value->data.x_type;
2152722471 assert(ptr_type->id == ZigTypeIdPointer);
21528 return ir_const_type(ira, &switch_target_instruction->base, ptr_type->data.pointer.child_type);
22472 return ir_const_type(ira, &switch_target_instruction->base.base, ptr_type->data.pointer.child_type);
2152922473 }
2153022474
2153122475 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
2153222476 ZigValue *pointee_val = nullptr;
2153322477 if (instr_is_comptime(target_value_ptr) && target_value_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
21534 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->source_node);
22478 pointee_val = const_ptr_pointee(ira, ira->codegen, target_value_ptr->value, target_value_ptr->base.source_node);
2153522479 if (pointee_val == nullptr)
21536 return ira->codegen->invalid_instruction;
22480 return ira->codegen->invalid_inst_gen;
2153722481
2153822482 if (pointee_val->special == ConstValSpecialRuntime)
2153922483 pointee_val = nullptr;
2154022484 }
2154122485 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusSizeKnown)))
21542 return ira->codegen->invalid_instruction;
22486 return ira->codegen->invalid_inst_gen;
2154322487
2154422488 switch (target_type->id) {
2154522489 case ZigTypeIdInvalid:
......@@ -21556,13 +22500,13 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2155622500 case ZigTypeIdFn:
2155722501 case ZigTypeIdErrorSet: {
2155822502 if (pointee_val) {
21559 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, nullptr);
22503 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, nullptr);
2156022504 copy_const_val(result->value, pointee_val);
2156122505 result->value->type = target_type;
2156222506 return result;
2156322507 }
2156422508
21565 IrInstruction *result = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22509 IrInstGen *result = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2156622510 result->value->type = target_type;
2156722511 return result;
2156822512 }
......@@ -21571,52 +22515,49 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2157122515 if (!decl_node->data.container_decl.auto_enum &&
2157222516 decl_node->data.container_decl.init_arg_expr == nullptr)
2157322517 {
21574 ErrorMsg *msg = ir_add_error(ira, target_value_ptr,
22518 ErrorMsg *msg = ir_add_error(ira, &target_value_ptr->base,
2157522519 buf_sprintf("switch on union which has no attached enum"));
2157622520 add_error_note(ira->codegen, msg, decl_node,
2157722521 buf_sprintf("consider 'union(enum)' here"));
21578 return ira->codegen->invalid_instruction;
22522 return ira->codegen->invalid_inst_gen;
2157922523 }
2158022524 ZigType *tag_type = target_type->data.unionation.tag_type;
2158122525 assert(tag_type != nullptr);
2158222526 assert(tag_type->id == ZigTypeIdEnum);
2158322527 if (pointee_val) {
21584 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
22528 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
2158522529 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_union.tag);
2158622530 return result;
2158722531 }
2158822532 if (tag_type->data.enumeration.src_field_count == 1) {
21589 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, tag_type);
22533 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, tag_type);
2159022534 TypeEnumField *only_field = &tag_type->data.enumeration.fields[0];
2159122535 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
2159222536 return result;
2159322537 }
2159422538
21595 IrInstruction *union_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22539 IrInstGen *union_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2159622540 union_value->value->type = target_type;
2159722541
21598 IrInstruction *union_tag_inst = ir_build_union_tag(&ira->new_irb, switch_target_instruction->base.scope,
21599 switch_target_instruction->base.source_node, union_value);
21600 union_tag_inst->value->type = tag_type;
21601 return union_tag_inst;
22542 return ir_build_union_tag(ira, &switch_target_instruction->base.base, union_value, tag_type);
2160222543 }
2160322544 case ZigTypeIdEnum: {
2160422545 if ((err = type_resolve(ira->codegen, target_type, ResolveStatusZeroBitsKnown)))
21605 return ira->codegen->invalid_instruction;
21606 if (target_type->data.enumeration.src_field_count < 2) {
22546 return ira->codegen->invalid_inst_gen;
22547 if (target_type->data.enumeration.src_field_count == 1) {
2160722548 TypeEnumField *only_field = &target_type->data.enumeration.fields[0];
21608 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
22549 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
2160922550 bigint_init_bigint(&result->value->data.x_enum_tag, &only_field->value);
2161022551 return result;
2161122552 }
2161222553
2161322554 if (pointee_val) {
21614 IrInstruction *result = ir_const(ira, &switch_target_instruction->base, target_type);
22555 IrInstGen *result = ir_const(ira, &switch_target_instruction->base.base, target_type);
2161522556 bigint_init_bigint(&result->value->data.x_enum_tag, &pointee_val->data.x_enum_tag);
2161622557 return result;
2161722558 }
2161822559
21619 IrInstruction *enum_value = ir_get_deref(ira, &switch_target_instruction->base, target_value_ptr, nullptr);
22560 IrInstGen *enum_value = ir_get_deref(ira, &switch_target_instruction->base.base, target_value_ptr, nullptr);
2162022561 enum_value->value->type = target_type;
2162122562 return enum_value;
2162222563 }
......@@ -21632,17 +22573,17 @@ static IrInstruction *ir_analyze_instruction_switch_target(IrAnalyze *ira,
2163222573 case ZigTypeIdVector:
2163322574 case ZigTypeIdFnFrame:
2163422575 case ZigTypeIdAnyFrame:
21635 ir_add_error(ira, &switch_target_instruction->base,
22576 ir_add_error(ira, &switch_target_instruction->base.base,
2163622577 buf_sprintf("invalid switch target type '%s'", buf_ptr(&target_type->name)));
21637 return ira->codegen->invalid_instruction;
22578 return ira->codegen->invalid_inst_gen;
2163822579 }
2163922580 zig_unreachable();
2164022581}
2164122582
21642static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstructionSwitchVar *instruction) {
21643 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
22583static IrInstGen *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstSrcSwitchVar *instruction) {
22584 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
2164422585 if (type_is_invalid(target_value_ptr->value->type))
21645 return ira->codegen->invalid_instruction;
22586 return ira->codegen->invalid_inst_gen;
2164622587
2164722588 ZigType *ref_type = target_value_ptr->value->type;
2164822589 assert(ref_type->id == ZigTypeIdPointer);
......@@ -21653,62 +22594,62 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2165322594 assert(enum_type->id == ZigTypeIdEnum);
2165422595 assert(instruction->prongs_len > 0);
2165522596
21656 IrInstruction *first_prong_value = instruction->prongs_ptr[0]->child;
22597 IrInstGen *first_prong_value = instruction->prongs_ptr[0]->child;
2165722598 if (type_is_invalid(first_prong_value->value->type))
21658 return ira->codegen->invalid_instruction;
22599 return ira->codegen->invalid_inst_gen;
2165922600
21660 IrInstruction *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
22601 IrInstGen *first_casted_prong_value = ir_implicit_cast(ira, first_prong_value, enum_type);
2166122602 if (type_is_invalid(first_casted_prong_value->value->type))
21662 return ira->codegen->invalid_instruction;
22603 return ira->codegen->invalid_inst_gen;
2166322604
2166422605 ZigValue *first_prong_val = ir_resolve_const(ira, first_casted_prong_value, UndefBad);
2166522606 if (first_prong_val == nullptr)
21666 return ira->codegen->invalid_instruction;
22607 return ira->codegen->invalid_inst_gen;
2166722608
2166822609 TypeUnionField *first_field = find_union_field_by_tag(target_type, &first_prong_val->data.x_enum_tag);
2166922610
2167022611 ErrorMsg *invalid_payload_msg = nullptr;
2167122612 for (size_t prong_i = 1; prong_i < instruction->prongs_len; prong_i += 1) {
21672 IrInstruction *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
22613 IrInstGen *this_prong_inst = instruction->prongs_ptr[prong_i]->child;
2167322614 if (type_is_invalid(this_prong_inst->value->type))
21674 return ira->codegen->invalid_instruction;
22615 return ira->codegen->invalid_inst_gen;
2167522616
21676 IrInstruction *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
22617 IrInstGen *this_casted_prong_value = ir_implicit_cast(ira, this_prong_inst, enum_type);
2167722618 if (type_is_invalid(this_casted_prong_value->value->type))
21678 return ira->codegen->invalid_instruction;
22619 return ira->codegen->invalid_inst_gen;
2167922620
2168022621 ZigValue *this_prong = ir_resolve_const(ira, this_casted_prong_value, UndefBad);
2168122622 if (this_prong == nullptr)
21682 return ira->codegen->invalid_instruction;
22623 return ira->codegen->invalid_inst_gen;
2168322624
2168422625 TypeUnionField *payload_field = find_union_field_by_tag(target_type, &this_prong->data.x_enum_tag);
2168522626 ZigType *payload_type = payload_field->type_entry;
2168622627 if (first_field->type_entry != payload_type) {
2168722628 if (invalid_payload_msg == nullptr) {
21688 invalid_payload_msg = ir_add_error(ira, &instruction->base,
22629 invalid_payload_msg = ir_add_error(ira, &instruction->base.base,
2168922630 buf_sprintf("capture group with incompatible types"));
21690 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->source_node,
22631 add_error_note(ira->codegen, invalid_payload_msg, first_prong_value->base.source_node,
2169122632 buf_sprintf("type '%s' here", buf_ptr(&first_field->type_entry->name)));
2169222633 }
21693 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->source_node,
22634 add_error_note(ira->codegen, invalid_payload_msg, this_prong_inst->base.source_node,
2169422635 buf_sprintf("type '%s' here", buf_ptr(&payload_field->type_entry->name)));
2169522636 }
2169622637 }
2169722638
2169822639 if (invalid_payload_msg != nullptr) {
21699 return ira->codegen->invalid_instruction;
22640 return ira->codegen->invalid_inst_gen;
2170022641 }
2170122642
2170222643 if (instr_is_comptime(target_value_ptr)) {
2170322644 ZigValue *target_val_ptr = ir_resolve_const(ira, target_value_ptr, UndefBad);
2170422645 if (!target_value_ptr)
21705 return ira->codegen->invalid_instruction;
22646 return ira->codegen->invalid_inst_gen;
2170622647
21707 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.source_node);
22648 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, target_val_ptr, instruction->base.base.source_node);
2170822649 if (pointee_val == nullptr)
21709 return ira->codegen->invalid_instruction;
22650 return ira->codegen->invalid_inst_gen;
2171022651
21711 IrInstruction *result = ir_const(ira, &instruction->base,
22652 IrInstGen *result = ir_const(ira, &instruction->base.base,
2171222653 get_pointer_to_type(ira->codegen, first_field->type_entry,
2171322654 target_val_ptr->type->data.pointer.is_const));
2171422655 ZigValue *out_val = result->value;
......@@ -21718,11 +22659,10 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2171822659 return result;
2171922660 }
2172022661
21721 IrInstruction *result = ir_build_union_field_ptr(&ira->new_irb,
21722 instruction->base.scope, instruction->base.source_node, target_value_ptr, first_field, false, false);
21723 result->value->type = get_pointer_to_type(ira->codegen, first_field->type_entry,
22662 ZigType *result_type = get_pointer_to_type(ira->codegen, first_field->type_entry,
2172422663 target_value_ptr->value->type->data.pointer.is_const);
21725 return result;
22664 return ir_build_union_field_ptr(ira, &instruction->base.base, target_value_ptr, first_field,
22665 false, false, result_type);
2172622666 } else if (target_type->id == ZigTypeIdErrorSet) {
2172722667 // construct an error set from the prong values
2172822668 ZigType *err_set_type = new_type_table_entry(ZigTypeIdErrorSet);
......@@ -21735,7 +22675,7 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2173522675 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
2173622676 ErrorTableEntry *err = ir_resolve_error(ira, instruction->prongs_ptr[i]->child);
2173722677 if (err == nullptr)
21738 return ira->codegen->invalid_instruction;
22678 return ira->codegen->invalid_inst_gen;
2173922679 error_list.append(err);
2174022680 buf_appendf(&err_set_type->name, "%s,", buf_ptr(&err->name));
2174122681 }
......@@ -21751,29 +22691,29 @@ static IrInstruction *ir_analyze_instruction_switch_var(IrAnalyze *ira, IrInstru
2175122691 ref_type->data.pointer.explicit_alignment,
2175222692 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
2175322693 ref_type->data.pointer.allow_zero);
21754 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
21755 &instruction->base, false);
22694 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
22695 &instruction->base.base, false);
2175622696 } else {
21757 ir_add_error(ira, &instruction->base,
22697 ir_add_error(ira, &instruction->base.base,
2175822698 buf_sprintf("switch on type '%s' provides no expression parameter", buf_ptr(&target_type->name)));
21759 return ira->codegen->invalid_instruction;
22699 return ira->codegen->invalid_inst_gen;
2176022700 }
2176122701}
2176222702
21763static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
21764 IrInstructionSwitchElseVar *instruction)
22703static IrInstGen *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
22704 IrInstSrcSwitchElseVar *instruction)
2176522705{
21766 IrInstruction *target_value_ptr = instruction->target_value_ptr->child;
22706 IrInstGen *target_value_ptr = instruction->target_value_ptr->child;
2176722707 if (type_is_invalid(target_value_ptr->value->type))
21768 return ira->codegen->invalid_instruction;
22708 return ira->codegen->invalid_inst_gen;
2176922709
2177022710 ZigType *ref_type = target_value_ptr->value->type;
2177122711 assert(ref_type->id == ZigTypeIdPointer);
2177222712 ZigType *target_type = target_value_ptr->value->type->data.pointer.child_type;
2177322713 if (target_type->id == ZigTypeIdErrorSet) {
2177422714 // make a new set that has the other cases removed
21775 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.source_node)) {
21776 return ira->codegen->invalid_instruction;
22715 if (!resolve_inferred_error_set(ira->codegen, target_type, instruction->base.base.source_node)) {
22716 return ira->codegen->invalid_inst_gen;
2177722717 }
2177822718 if (type_is_global_error_set(target_type)) {
2177922719 // the type of the else capture variable still has to be the global error set.
......@@ -21783,17 +22723,17 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
2178322723 // Make note of the errors handled by other cases
2178422724 ErrorTableEntry **errors = allocate<ErrorTableEntry *>(ira->codegen->errors_by_index.length);
2178522725 for (size_t case_i = 0; case_i < instruction->switch_br->case_count; case_i += 1) {
21786 IrInstructionSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
21787 IrInstruction *case_expr = br_case->value->child;
22726 IrInstSrcSwitchBrCase *br_case = &instruction->switch_br->cases[case_i];
22727 IrInstGen *case_expr = br_case->value->child;
2178822728 if (case_expr->value->type->id == ZigTypeIdErrorSet) {
2178922729 ErrorTableEntry *err = ir_resolve_error(ira, case_expr);
2179022730 if (err == nullptr)
21791 return ira->codegen->invalid_instruction;
22731 return ira->codegen->invalid_inst_gen;
2179222732 errors[err->value] = err;
2179322733 } else if (case_expr->value->type->id == ZigTypeIdMetaType) {
2179422734 ZigType *err_set_type = ir_resolve_type(ira, case_expr);
2179522735 if (type_is_invalid(err_set_type))
21796 return ira->codegen->invalid_instruction;
22736 return ira->codegen->invalid_inst_gen;
2179722737 populate_error_set_table(errors, err_set_type);
2179822738 } else {
2179922739 zig_unreachable();
......@@ -21832,27 +22772,22 @@ static IrInstruction *ir_analyze_instruction_switch_else_var(IrAnalyze *ira,
2183222772 ref_type->data.pointer.explicit_alignment,
2183322773 ref_type->data.pointer.bit_offset_in_host, ref_type->data.pointer.host_int_bytes,
2183422774 ref_type->data.pointer.allow_zero);
21835 return ir_analyze_ptr_cast(ira, &instruction->base, target_value_ptr, new_target_value_ptr_type,
21836 &instruction->base, false);
22775 return ir_analyze_ptr_cast(ira, &instruction->base.base, target_value_ptr, new_target_value_ptr_type,
22776 &instruction->base.base, false);
2183722777 }
2183822778
2183922779 return target_value_ptr;
2184022780}
2184122781
21842static IrInstruction *ir_analyze_instruction_union_tag(IrAnalyze *ira, IrInstructionUnionTag *instruction) {
21843 IrInstruction *value = instruction->value->child;
21844 return ir_analyze_union_tag(ira, &instruction->base, value);
21845}
21846
21847static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructionImport *import_instruction) {
22782static IrInstGen *ir_analyze_instruction_import(IrAnalyze *ira, IrInstSrcImport *import_instruction) {
2184822783 Error err;
2184922784
21850 IrInstruction *name_value = import_instruction->name->child;
22785 IrInstGen *name_value = import_instruction->name->child;
2185122786 Buf *import_target_str = ir_resolve_str(ira, name_value);
2185222787 if (!import_target_str)
21853 return ira->codegen->invalid_instruction;
22788 return ira->codegen->invalid_inst_gen;
2185422789
21855 AstNode *source_node = import_instruction->base.source_node;
22790 AstNode *source_node = import_instruction->base.base.source_node;
2185622791 ZigType *import = source_node->owner;
2185722792
2185822793 ZigType *target_import;
......@@ -21865,48 +22800,48 @@ static IrInstruction *ir_analyze_instruction_import(IrAnalyze *ira, IrInstructio
2186522800 ir_add_error_node(ira, source_node,
2186622801 buf_sprintf("import of file outside package path: '%s'",
2186722802 buf_ptr(import_target_path)));
21868 return ira->codegen->invalid_instruction;
22803 return ira->codegen->invalid_inst_gen;
2186922804 } else if (err == ErrorFileNotFound) {
2187022805 ir_add_error_node(ira, source_node,
2187122806 buf_sprintf("unable to find '%s'", buf_ptr(import_target_path)));
21872 return ira->codegen->invalid_instruction;
22807 return ira->codegen->invalid_inst_gen;
2187322808 } else {
2187422809 ir_add_error_node(ira, source_node,
2187522810 buf_sprintf("unable to open '%s': %s", buf_ptr(&full_path), err_str(err)));
21876 return ira->codegen->invalid_instruction;
22811 return ira->codegen->invalid_inst_gen;
2187722812 }
2187822813 }
2187922814
21880 return ir_const_type(ira, &import_instruction->base, target_import);
22815 return ir_const_type(ira, &import_instruction->base.base, target_import);
2188122816}
2188222817
21883static IrInstruction *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstructionRef *ref_instruction) {
21884 IrInstruction *value = ref_instruction->value->child;
22818static IrInstGen *ir_analyze_instruction_ref(IrAnalyze *ira, IrInstSrcRef *ref_instruction) {
22819 IrInstGen *value = ref_instruction->value->child;
2188522820 if (type_is_invalid(value->value->type))
21886 return ira->codegen->invalid_instruction;
21887 return ir_get_ref(ira, &ref_instruction->base, value, ref_instruction->is_const, ref_instruction->is_volatile);
22821 return ira->codegen->invalid_inst_gen;
22822 return ir_get_ref(ira, &ref_instruction->base.base, value, ref_instruction->is_const, ref_instruction->is_volatile);
2188822823}
2188922824
21890static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *source_instruction,
21891 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstruction *field_result_loc,
21892 IrInstruction *result_loc)
22825static IrInstGen *ir_analyze_union_init(IrAnalyze *ira, IrInst* source_instruction,
22826 AstNode *field_source_node, ZigType *union_type, Buf *field_name, IrInstGen *field_result_loc,
22827 IrInstGen *result_loc)
2189322828{
2189422829 Error err;
2189522830 assert(union_type->id == ZigTypeIdUnion);
2189622831
2189722832 if ((err = type_resolve(ira->codegen, union_type, ResolveStatusSizeKnown)))
21898 return ira->codegen->invalid_instruction;
22833 return ira->codegen->invalid_inst_gen;
2189922834
2190022835 TypeUnionField *type_field = find_union_type_field(union_type, field_name);
2190122836 if (type_field == nullptr) {
2190222837 ir_add_error_node(ira, field_source_node,
2190322838 buf_sprintf("no member named '%s' in union '%s'",
2190422839 buf_ptr(field_name), buf_ptr(&union_type->name)));
21905 return ira->codegen->invalid_instruction;
22840 return ira->codegen->invalid_inst_gen;
2190622841 }
2190722842
2190822843 if (type_is_invalid(type_field->type_entry))
21909 return ira->codegen->invalid_instruction;
22844 return ira->codegen->invalid_inst_gen;
2191022845
2191122846 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
2191222847 if (instr_is_comptime(field_result_loc) &&
......@@ -21918,42 +22853,42 @@ static IrInstruction *ir_analyze_union_init(IrAnalyze *ira, IrInstruction *sourc
2191822853 }
2191922854 }
2192022855
21921 bool is_comptime = ir_should_inline(ira->new_irb.exec, source_instruction->scope)
22856 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instruction->scope)
2192222857 || type_requires_comptime(ira->codegen, union_type) == ReqCompTimeYes;
2192322858
21924 IrInstruction *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
22859 IrInstGen *result = ir_get_deref(ira, source_instruction, result_loc, nullptr);
2192522860 if (is_comptime && !instr_is_comptime(result)) {
21926 ir_add_error(ira, field_result_loc,
22861 ir_add_error(ira, &field_result_loc->base,
2192722862 buf_sprintf("unable to evaluate constant expression"));
21928 return ira->codegen->invalid_instruction;
22863 return ira->codegen->invalid_inst_gen;
2192922864 }
2193022865 return result;
2193122866}
2193222867
21933static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruction *instruction,
21934 ZigType *container_type, size_t instr_field_count, IrInstructionContainerInitFieldsField *fields,
21935 IrInstruction *result_loc)
22868static IrInstGen *ir_analyze_container_init_fields(IrAnalyze *ira, IrInst *source_instr,
22869 ZigType *container_type, size_t instr_field_count, IrInstSrcContainerInitFieldsField *fields,
22870 IrInstGen *result_loc)
2193622871{
2193722872 Error err;
2193822873 if (container_type->id == ZigTypeIdUnion) {
2193922874 if (instr_field_count != 1) {
21940 ir_add_error(ira, instruction,
22875 ir_add_error(ira, source_instr,
2194122876 buf_sprintf("union initialization expects exactly one field"));
21942 return ira->codegen->invalid_instruction;
22877 return ira->codegen->invalid_inst_gen;
2194322878 }
21944 IrInstructionContainerInitFieldsField *field = &fields[0];
21945 IrInstruction *field_result_loc = field->result_loc->child;
22879 IrInstSrcContainerInitFieldsField *field = &fields[0];
22880 IrInstGen *field_result_loc = field->result_loc->child;
2194622881 if (type_is_invalid(field_result_loc->value->type))
21947 return ira->codegen->invalid_instruction;
22882 return ira->codegen->invalid_inst_gen;
2194822883
21949 return ir_analyze_union_init(ira, instruction, field->source_node, container_type, field->name,
22884 return ir_analyze_union_init(ira, source_instr, field->source_node, container_type, field->name,
2195022885 field_result_loc, result_loc);
2195122886 }
2195222887 if (container_type->id != ZigTypeIdStruct || is_slice(container_type)) {
21953 ir_add_error(ira, instruction,
22888 ir_add_error(ira, source_instr,
2195422889 buf_sprintf("type '%s' does not support struct initialization syntax",
2195522890 buf_ptr(&container_type->name)));
21956 return ira->codegen->invalid_instruction;
22891 return ira->codegen->invalid_inst_gen;
2195722892 }
2195822893
2195922894 if (container_type->data.structure.resolve_status == ResolveStatusBeingInferred) {
......@@ -21962,16 +22897,16 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2196222897 }
2196322898
2196422899 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
21965 return ira->codegen->invalid_instruction;
22900 return ira->codegen->invalid_inst_gen;
2196622901
2196722902 size_t actual_field_count = container_type->data.structure.src_field_count;
2196822903
21969 IrInstruction *first_non_const_instruction = nullptr;
22904 IrInstGen *first_non_const_instruction = nullptr;
2197022905
2197122906 AstNode **field_assign_nodes = allocate<AstNode *>(actual_field_count);
21972 ZigList<IrInstruction *> const_ptrs = {};
22907 ZigList<IrInstGen *> const_ptrs = {};
2197322908
21974 bool is_comptime = ir_should_inline(ira->new_irb.exec, instruction->scope)
22909 bool is_comptime = ir_should_inline(ira->old_irb.exec, source_instr->scope)
2197522910 || type_requires_comptime(ira->codegen, container_type) == ReqCompTimeYes;
2197622911
2197722912
......@@ -21987,29 +22922,29 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2198722922 // comptime-known values.
2198822923
2198922924 for (size_t i = 0; i < instr_field_count; i += 1) {
21990 IrInstructionContainerInitFieldsField *field = &fields[i];
22925 IrInstSrcContainerInitFieldsField *field = &fields[i];
2199122926
21992 IrInstruction *field_result_loc = field->result_loc->child;
22927 IrInstGen *field_result_loc = field->result_loc->child;
2199322928 if (type_is_invalid(field_result_loc->value->type))
21994 return ira->codegen->invalid_instruction;
22929 return ira->codegen->invalid_inst_gen;
2199522930
2199622931 TypeStructField *type_field = find_struct_type_field(container_type, field->name);
2199722932 if (!type_field) {
2199822933 ir_add_error_node(ira, field->source_node,
2199922934 buf_sprintf("no member named '%s' in struct '%s'",
2200022935 buf_ptr(field->name), buf_ptr(&container_type->name)));
22001 return ira->codegen->invalid_instruction;
22936 return ira->codegen->invalid_inst_gen;
2200222937 }
2200322938
2200422939 if (type_is_invalid(type_field->type_entry))
22005 return ira->codegen->invalid_instruction;
22940 return ira->codegen->invalid_inst_gen;
2200622941
2200722942 size_t field_index = type_field->src_index;
2200822943 AstNode *existing_assign_node = field_assign_nodes[field_index];
2200922944 if (existing_assign_node) {
2201022945 ErrorMsg *msg = ir_add_error_node(ira, field->source_node, buf_sprintf("duplicate field"));
2201122946 add_error_note(ira->codegen, msg, existing_assign_node, buf_sprintf("other field here"));
22012 return ira->codegen->invalid_instruction;
22947 return ira->codegen->invalid_inst_gen;
2201322948 }
2201422949 field_assign_nodes[field_index] = field->source_node;
2201522950
......@@ -22030,20 +22965,20 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2203022965 TypeStructField *field = container_type->data.structure.fields[i];
2203122966 memoize_field_init_val(ira->codegen, container_type, field);
2203222967 if (field->init_val == nullptr) {
22033 ir_add_error_node(ira, instruction->source_node,
22968 ir_add_error(ira, source_instr,
2203422969 buf_sprintf("missing field: '%s'", buf_ptr(container_type->data.structure.fields[i]->name)));
2203522970 any_missing = true;
2203622971 continue;
2203722972 }
2203822973 if (type_is_invalid(field->init_val->type))
22039 return ira->codegen->invalid_instruction;
22974 return ira->codegen->invalid_inst_gen;
2204022975
22041 IrInstruction *runtime_inst = ir_const(ira, instruction, field->init_val->type);
22976 IrInstGen *runtime_inst = ir_const(ira, source_instr, field->init_val->type);
2204222977 copy_const_val(runtime_inst->value, field->init_val);
2204322978
22044 IrInstruction *field_ptr = ir_analyze_struct_field_ptr(ira, instruction, field, result_loc,
22979 IrInstGen *field_ptr = ir_analyze_struct_field_ptr(ira, source_instr, field, result_loc,
2204522980 container_type, true);
22046 ir_analyze_store_ptr(ira, instruction, field_ptr, runtime_inst, false);
22981 ir_analyze_store_ptr(ira, source_instr, field_ptr, runtime_inst, false);
2204722982 if (instr_is_comptime(field_ptr) && field_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2204822983 const_ptrs.append(field_ptr);
2204922984 } else {
......@@ -22051,39 +22986,39 @@ static IrInstruction *ir_analyze_container_init_fields(IrAnalyze *ira, IrInstruc
2205122986 }
2205222987 }
2205322988 if (any_missing)
22054 return ira->codegen->invalid_instruction;
22989 return ira->codegen->invalid_inst_gen;
2205522990
2205622991 if (result_loc->value->data.x_ptr.mut == ConstPtrMutInfer) {
2205722992 if (const_ptrs.length != actual_field_count) {
2205822993 result_loc->value->special = ConstValSpecialRuntime;
2205922994 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22060 IrInstruction *field_result_loc = const_ptrs.at(i);
22061 IrInstruction *deref = ir_get_deref(ira, field_result_loc, field_result_loc, nullptr);
22995 IrInstGen *field_result_loc = const_ptrs.at(i);
22996 IrInstGen *deref = ir_get_deref(ira, &field_result_loc->base, field_result_loc, nullptr);
2206222997 field_result_loc->value->special = ConstValSpecialRuntime;
22063 ir_analyze_store_ptr(ira, field_result_loc, field_result_loc, deref, false);
22998 ir_analyze_store_ptr(ira, &field_result_loc->base, field_result_loc, deref, false);
2206422999 }
2206523000 }
2206623001 }
2206723002
22068 IrInstruction *result = ir_get_deref(ira, instruction, result_loc, nullptr);
23003 IrInstGen *result = ir_get_deref(ira, source_instr, result_loc, nullptr);
2206923004
2207023005 if (is_comptime && !instr_is_comptime(result)) {
22071 ir_add_error_node(ira, first_non_const_instruction->source_node,
23006 ir_add_error_node(ira, first_non_const_instruction->base.source_node,
2207223007 buf_sprintf("unable to evaluate constant expression"));
22073 return ira->codegen->invalid_instruction;
23008 return ira->codegen->invalid_inst_gen;
2207423009 }
2207523010
2207623011 return result;
2207723012}
2207823013
22079static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
22080 IrInstructionContainerInitList *instruction)
23014static IrInstGen *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
23015 IrInstSrcContainerInitList *instruction)
2208123016{
22082 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22083 IrInstruction *result_loc = instruction->result_loc->child;
23017 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23018 IrInstGen *result_loc = instruction->result_loc->child;
2208423019 if (type_is_invalid(result_loc->value->type))
2208523020 return result_loc;
22086 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
23021 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
2208723022
2208823023 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2208923024
......@@ -22093,24 +23028,24 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2209323028 ir_add_error_node(ira, instruction->init_array_type_source_node,
2209423029 buf_sprintf("array literal requires address-of operator to coerce to slice type '%s'",
2209523030 buf_ptr(&container_type->name)));
22096 return ira->codegen->invalid_instruction;
23031 return ira->codegen->invalid_inst_gen;
2209723032 }
2209823033
2209923034 if (container_type->id == ZigTypeIdVoid) {
2210023035 if (elem_count != 0) {
22101 ir_add_error_node(ira, instruction->base.source_node,
23036 ir_add_error_node(ira, instruction->base.base.source_node,
2210223037 buf_sprintf("void expression expects no arguments"));
22103 return ira->codegen->invalid_instruction;
23038 return ira->codegen->invalid_inst_gen;
2210423039 }
22105 return ir_const_void(ira, &instruction->base);
23040 return ir_const_void(ira, &instruction->base.base);
2210623041 }
2210723042
2210823043 if (container_type->id == ZigTypeIdStruct && elem_count == 0) {
22109 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22110 IrInstruction *result_loc = instruction->result_loc->child;
23044 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23045 IrInstGen *result_loc = instruction->result_loc->child;
2211123046 if (type_is_invalid(result_loc->value->type))
2211223047 return result_loc;
22113 return ir_analyze_container_init_fields(ira, &instruction->base, container_type, 0, nullptr, result_loc);
23048 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type, 0, nullptr, result_loc);
2211423049 }
2211523050
2211623051 if (container_type->id == ZigTypeIdArray) {
......@@ -22118,10 +23053,10 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2211823053 if (container_type->data.array.len != elem_count) {
2211923054 ZigType *literal_type = get_array_type(ira->codegen, child_type, elem_count, nullptr);
2212023055
22121 ir_add_error(ira, &instruction->base,
23056 ir_add_error(ira, &instruction->base.base,
2212223057 buf_sprintf("expected %s literal, found %s literal",
2212323058 buf_ptr(&container_type->name), buf_ptr(&literal_type->name)));
22124 return ira->codegen->invalid_instruction;
23059 return ira->codegen->invalid_inst_gen;
2212523060 }
2212623061 } else if (container_type->id == ZigTypeIdStruct &&
2212723062 container_type->data.structure.resolve_status == ResolveStatusBeingInferred)
......@@ -22131,17 +23066,17 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2213123066 } else if (container_type->id == ZigTypeIdVector) {
2213223067 // OK
2213323068 } else {
22134 ir_add_error_node(ira, instruction->base.source_node,
23069 ir_add_error(ira, &instruction->base.base,
2213523070 buf_sprintf("type '%s' does not support array initialization",
2213623071 buf_ptr(&container_type->name)));
22137 return ira->codegen->invalid_instruction;
23072 return ira->codegen->invalid_inst_gen;
2213823073 }
2213923074
2214023075 switch (type_has_one_possible_value(ira->codegen, container_type)) {
2214123076 case OnePossibleValueInvalid:
22142 return ira->codegen->invalid_instruction;
23077 return ira->codegen->invalid_inst_gen;
2214323078 case OnePossibleValueYes:
22144 return ir_const_move(ira, &instruction->base,
23079 return ir_const_move(ira, &instruction->base.base,
2214523080 get_the_one_possible_value(ira->codegen, container_type));
2214623081 case OnePossibleValueNo:
2214723082 break;
......@@ -22150,16 +23085,16 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2215023085 bool is_comptime;
2215123086 switch (type_requires_comptime(ira->codegen, container_type)) {
2215223087 case ReqCompTimeInvalid:
22153 return ira->codegen->invalid_instruction;
23088 return ira->codegen->invalid_inst_gen;
2215423089 case ReqCompTimeNo:
22155 is_comptime = ir_should_inline(ira->new_irb.exec, instruction->base.scope);
23090 is_comptime = ir_should_inline(ira->old_irb.exec, instruction->base.base.scope);
2215623091 break;
2215723092 case ReqCompTimeYes:
2215823093 is_comptime = true;
2215923094 break;
2216023095 }
2216123096
22162 IrInstruction *first_non_const_instruction = nullptr;
23097 IrInstGen *first_non_const_instruction = nullptr;
2216323098
2216423099 // The Result Location Mechanism has already emitted runtime instructions to
2216523100 // initialize runtime elements and has omitted instructions for the comptime
......@@ -22168,12 +23103,12 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2216823103 // array initialization can be a comptime value, overwrite ConstPtrMutInfer with
2216923104 // ConstPtrMutComptimeConst. Otherwise, emit instructions to runtime-initialize the
2217023105 // elements that have comptime-known values.
22171 ZigList<IrInstruction *> const_ptrs = {};
23106 ZigList<IrInstGen *> const_ptrs = {};
2217223107
2217323108 for (size_t i = 0; i < elem_count; i += 1) {
22174 IrInstruction *elem_result_loc = instruction->elem_result_loc_list[i]->child;
23109 IrInstGen *elem_result_loc = instruction->elem_result_loc_list[i]->child;
2217523110 if (type_is_invalid(elem_result_loc->value->type))
22176 return ira->codegen->invalid_instruction;
23111 return ira->codegen->invalid_inst_gen;
2217723112
2217823113 assert(elem_result_loc->value->type->id == ZigTypeIdPointer);
2217923114
......@@ -22190,81 +23125,79 @@ static IrInstruction *ir_analyze_instruction_container_init_list(IrAnalyze *ira,
2219023125 if (const_ptrs.length != elem_count) {
2219123126 result_loc->value->special = ConstValSpecialRuntime;
2219223127 for (size_t i = 0; i < const_ptrs.length; i += 1) {
22193 IrInstruction *elem_result_loc = const_ptrs.at(i);
23128 IrInstGen *elem_result_loc = const_ptrs.at(i);
2219423129 assert(elem_result_loc->value->special == ConstValSpecialStatic);
2219523130 if (elem_result_loc->value->type->data.pointer.inferred_struct_field != nullptr) {
2219623131 // This field will be generated comptime; no need to do this.
2219723132 continue;
2219823133 }
22199 IrInstruction *deref = ir_get_deref(ira, elem_result_loc, elem_result_loc, nullptr);
23134 IrInstGen *deref = ir_get_deref(ira, &elem_result_loc->base, elem_result_loc, nullptr);
2220023135 elem_result_loc->value->special = ConstValSpecialRuntime;
22201 ir_analyze_store_ptr(ira, elem_result_loc, elem_result_loc, deref, false);
23136 ir_analyze_store_ptr(ira, &elem_result_loc->base, elem_result_loc, deref, false);
2220223137 }
2220323138 }
2220423139 }
2220523140
22206 IrInstruction *result = ir_get_deref(ira, &instruction->base, result_loc, nullptr);
23141 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, result_loc, nullptr);
2220723142 if (instr_is_comptime(result))
2220823143 return result;
2220923144
2221023145 if (is_comptime) {
22211 ir_add_error_node(ira, first_non_const_instruction->source_node,
23146 ir_add_error(ira, &first_non_const_instruction->base,
2221223147 buf_sprintf("unable to evaluate constant expression"));
22213 return ira->codegen->invalid_instruction;
23148 return ira->codegen->invalid_inst_gen;
2221423149 }
2221523150
2221623151 ZigType *result_elem_type = result_loc->value->type->data.pointer.child_type;
2221723152 if (is_slice(result_elem_type)) {
22218 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
23153 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2221923154 buf_sprintf("runtime-initialized array cannot be casted to slice type '%s'",
2222023155 buf_ptr(&result_elem_type->name)));
22221 add_error_note(ira->codegen, msg, first_non_const_instruction->source_node,
23156 add_error_note(ira->codegen, msg, first_non_const_instruction->base.source_node,
2222223157 buf_sprintf("this value is not comptime-known"));
22223 return ira->codegen->invalid_instruction;
23158 return ira->codegen->invalid_inst_gen;
2222423159 }
2222523160 return result;
2222623161}
2222723162
22228static IrInstruction *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
22229 IrInstructionContainerInitFields *instruction)
23163static IrInstGen *ir_analyze_instruction_container_init_fields(IrAnalyze *ira,
23164 IrInstSrcContainerInitFields *instruction)
2223023165{
22231 ir_assert(instruction->result_loc != nullptr, &instruction->base);
22232 IrInstruction *result_loc = instruction->result_loc->child;
23166 ir_assert(instruction->result_loc != nullptr, &instruction->base.base);
23167 IrInstGen *result_loc = instruction->result_loc->child;
2223323168 if (type_is_invalid(result_loc->value->type))
2223423169 return result_loc;
2223523170
22236 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base);
23171 ir_assert(result_loc->value->type->id == ZigTypeIdPointer, &instruction->base.base);
2223723172 ZigType *container_type = result_loc->value->type->data.pointer.child_type;
2223823173
22239 return ir_analyze_container_init_fields(ira, &instruction->base, container_type,
23174 return ir_analyze_container_init_fields(ira, &instruction->base.base, container_type,
2224023175 instruction->field_count, instruction->fields, result_loc);
2224123176}
2224223177
22243static IrInstruction *ir_analyze_instruction_compile_err(IrAnalyze *ira,
22244 IrInstructionCompileErr *instruction)
22245{
22246 IrInstruction *msg_value = instruction->msg->child;
23178static IrInstGen *ir_analyze_instruction_compile_err(IrAnalyze *ira, IrInstSrcCompileErr *instruction) {
23179 IrInstGen *msg_value = instruction->msg->child;
2224723180 Buf *msg_buf = ir_resolve_str(ira, msg_value);
2224823181 if (!msg_buf)
22249 return ira->codegen->invalid_instruction;
23182 return ira->codegen->invalid_inst_gen;
2225023183
22251 ir_add_error(ira, &instruction->base, msg_buf);
23184 ir_add_error(ira, &instruction->base.base, msg_buf);
2225223185
22253 return ira->codegen->invalid_instruction;
23186 return ira->codegen->invalid_inst_gen;
2225423187}
2225523188
22256static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstructionCompileLog *instruction) {
23189static IrInstGen *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstSrcCompileLog *instruction) {
2225723190 Buf buf = BUF_INIT;
2225823191 fprintf(stderr, "| ");
2225923192 for (size_t i = 0; i < instruction->msg_count; i += 1) {
22260 IrInstruction *msg = instruction->msg_list[i]->child;
23193 IrInstGen *msg = instruction->msg_list[i]->child;
2226123194 if (type_is_invalid(msg->value->type))
22262 return ira->codegen->invalid_instruction;
23195 return ira->codegen->invalid_inst_gen;
2226323196 buf_resize(&buf, 0);
2226423197 if (msg->value->special == ConstValSpecialLazy) {
2226523198 // Resolve any lazy value that's passed, we need its value
22266 if (ir_resolve_lazy(ira->codegen, msg->source_node, msg->value))
22267 return ira->codegen->invalid_instruction;
23199 if (ir_resolve_lazy(ira->codegen, msg->base.source_node, msg->value))
23200 return ira->codegen->invalid_inst_gen;
2226823201 }
2226923202 render_const_value(ira->codegen, &buf, msg->value);
2227023203 const char *comma_str = (i != 0) ? ", " : "";
......@@ -22272,25 +23205,25 @@ static IrInstruction *ir_analyze_instruction_compile_log(IrAnalyze *ira, IrInstr
2227223205 }
2227323206 fprintf(stderr, "\n");
2227423207
22275 auto *expr = &instruction->base.source_node->data.fn_call_expr;
23208 auto *expr = &instruction->base.base.source_node->data.fn_call_expr;
2227623209 if (!expr->seen) {
2227723210 // Here we bypass higher level functions such as ir_add_error because we do not want
2227823211 // invalidate_exec to be called.
22279 add_node_error(ira->codegen, instruction->base.source_node, buf_sprintf("found compile log statement"));
23212 add_node_error(ira->codegen, instruction->base.base.source_node, buf_sprintf("found compile log statement"));
2228023213 }
2228123214 expr->seen = true;
2228223215
22283 return ir_const_void(ira, &instruction->base);
23216 return ir_const_void(ira, &instruction->base.base);
2228423217}
2228523218
22286static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstructionErrName *instruction) {
22287 IrInstruction *value = instruction->value->child;
23219static IrInstGen *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstSrcErrName *instruction) {
23220 IrInstGen *value = instruction->value->child;
2228823221 if (type_is_invalid(value->value->type))
22289 return ira->codegen->invalid_instruction;
23222 return ira->codegen->invalid_inst_gen;
2229023223
22291 IrInstruction *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
23224 IrInstGen *casted_value = ir_implicit_cast(ira, value, ira->codegen->builtin_types.entry_global_error_set);
2229223225 if (type_is_invalid(casted_value->value->type))
22293 return ira->codegen->invalid_instruction;
23226 return ira->codegen->invalid_inst_gen;
2229423227
2229523228 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2229623229 true, false, PtrLenUnknown, 0, 0, 0, false);
......@@ -22298,13 +23231,13 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
2229823231 if (instr_is_comptime(casted_value)) {
2229923232 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
2230023233 if (val == nullptr)
22301 return ira->codegen->invalid_instruction;
23234 return ira->codegen->invalid_inst_gen;
2230223235 ErrorTableEntry *err = casted_value->value->data.x_err_set;
2230323236 if (!err->cached_error_name_val) {
2230423237 ZigValue *array_val = create_const_str_lit(ira->codegen, &err->name)->data.x_ptr.data.ref.pointee;
2230523238 err->cached_error_name_val = create_const_slice(ira->codegen, array_val, 0, buf_len(&err->name), true);
2230623239 }
22307 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23240 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2230823241 copy_const_val(result->value, err->cached_error_name_val);
2230923242 result->value->type = str_type;
2231023243 return result;
......@@ -22312,79 +23245,106 @@ static IrInstruction *ir_analyze_instruction_err_name(IrAnalyze *ira, IrInstruct
2231223245
2231323246 ira->codegen->generate_error_name_table = true;
2231423247
22315 IrInstruction *result = ir_build_err_name(&ira->new_irb,
22316 instruction->base.scope, instruction->base.source_node, value);
22317 result->value->type = str_type;
22318 return result;
23248 return ir_build_err_name_gen(ira, &instruction->base.base, value, str_type);
2231923249}
2232023250
22321static IrInstruction *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstructionTagName *instruction) {
23251static IrInstGen *ir_analyze_instruction_enum_tag_name(IrAnalyze *ira, IrInstSrcTagName *instruction) {
2232223252 Error err;
22323 IrInstruction *target = instruction->target->child;
23253 IrInstGen *target = instruction->target->child;
2232423254 if (type_is_invalid(target->value->type))
22325 return ira->codegen->invalid_instruction;
23255 return ira->codegen->invalid_inst_gen;
23256
23257 if (target->value->type->id == ZigTypeIdEnumLiteral) {
23258 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
23259 Buf *field_name = target->value->data.x_enum_literal;
23260 ZigValue *array_val = create_const_str_lit(ira->codegen, field_name)->data.x_ptr.data.ref.pointee;
23261 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field_name), true);
23262 return result;
23263 }
23264
23265 if (target->value->type->id == ZigTypeIdUnion) {
23266 target = ir_analyze_union_tag(ira, &instruction->base.base, target, instruction->base.is_gen);
23267 if (type_is_invalid(target->value->type))
23268 return ira->codegen->invalid_inst_gen;
23269 }
23270
23271 if (target->value->type->id != ZigTypeIdEnum) {
23272 ir_add_error(ira, &target->base,
23273 buf_sprintf("expected enum tag, found '%s'", buf_ptr(&target->value->type->name)));
23274 return ira->codegen->invalid_inst_gen;
23275 }
2232623276
22327 assert(target->value->type->id == ZigTypeIdEnum);
23277 if (target->value->type->data.enumeration.src_field_count == 1 &&
23278 !target->value->type->data.enumeration.non_exhaustive) {
23279 TypeEnumField *only_field = &target->value->type->data.enumeration.fields[0];
23280 ZigValue *array_val = create_const_str_lit(ira->codegen, only_field->name)->data.x_ptr.data.ref.pointee;
23281 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
23282 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(only_field->name), true);
23283 return result;
23284 }
2232823285
2232923286 if (instr_is_comptime(target)) {
2233023287 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusZeroBitsKnown)))
22331 return ira->codegen->invalid_instruction;
23288 return ira->codegen->invalid_inst_gen;
23289 if (target->value->type->data.enumeration.non_exhaustive) {
23290 ir_add_error(ira, &instruction->base.base,
23291 buf_sprintf("TODO @tagName on non-exhaustive enum https://github.com/ziglang/zig/issues/3991"));
23292 return ira->codegen->invalid_inst_gen;
23293 }
2233223294 TypeEnumField *field = find_enum_field_by_tag(target->value->type, &target->value->data.x_bigint);
2233323295 ZigValue *array_val = create_const_str_lit(ira->codegen, field->name)->data.x_ptr.data.ref.pointee;
22334 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
23296 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2233523297 init_const_slice(ira->codegen, result->value, array_val, 0, buf_len(field->name), true);
2233623298 return result;
2233723299 }
2233823300
22339 IrInstruction *result = ir_build_tag_name(&ira->new_irb, instruction->base.scope,
22340 instruction->base.source_node, target);
2234123301 ZigType *u8_ptr_type = get_pointer_to_type_extra(
2234223302 ira->codegen, ira->codegen->builtin_types.entry_u8,
2234323303 true, false, PtrLenUnknown,
2234423304 0, 0, 0, false);
22345 result->value->type = get_slice_type(ira->codegen, u8_ptr_type);
22346 return result;
23305 ZigType *result_type = get_slice_type(ira->codegen, u8_ptr_type);
23306 return ir_build_tag_name_gen(ira, &instruction->base.base, target, result_type);
2234723307}
2234823308
22349static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
22350 IrInstructionFieldParentPtr *instruction)
23309static IrInstGen *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
23310 IrInstSrcFieldParentPtr *instruction)
2235123311{
2235223312 Error err;
22353 IrInstruction *type_value = instruction->type_value->child;
23313 IrInstGen *type_value = instruction->type_value->child;
2235423314 ZigType *container_type = ir_resolve_type(ira, type_value);
2235523315 if (type_is_invalid(container_type))
22356 return ira->codegen->invalid_instruction;
23316 return ira->codegen->invalid_inst_gen;
2235723317
22358 IrInstruction *field_name_value = instruction->field_name->child;
23318 IrInstGen *field_name_value = instruction->field_name->child;
2235923319 Buf *field_name = ir_resolve_str(ira, field_name_value);
2236023320 if (!field_name)
22361 return ira->codegen->invalid_instruction;
23321 return ira->codegen->invalid_inst_gen;
2236223322
22363 IrInstruction *field_ptr = instruction->field_ptr->child;
23323 IrInstGen *field_ptr = instruction->field_ptr->child;
2236423324 if (type_is_invalid(field_ptr->value->type))
22365 return ira->codegen->invalid_instruction;
23325 return ira->codegen->invalid_inst_gen;
2236623326
2236723327 if (container_type->id != ZigTypeIdStruct) {
22368 ir_add_error(ira, type_value,
23328 ir_add_error(ira, &type_value->base,
2236923329 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
22370 return ira->codegen->invalid_instruction;
23330 return ira->codegen->invalid_inst_gen;
2237123331 }
2237223332
2237323333 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
22374 return ira->codegen->invalid_instruction;
23334 return ira->codegen->invalid_inst_gen;
2237523335
2237623336 TypeStructField *field = find_struct_type_field(container_type, field_name);
2237723337 if (field == nullptr) {
22378 ir_add_error(ira, field_name_value,
23338 ir_add_error(ira, &field_name_value->base,
2237923339 buf_sprintf("struct '%s' has no field '%s'",
2238023340 buf_ptr(&container_type->name), buf_ptr(field_name)));
22381 return ira->codegen->invalid_instruction;
23341 return ira->codegen->invalid_inst_gen;
2238223342 }
2238323343
2238423344 if (field_ptr->value->type->id != ZigTypeIdPointer) {
22385 ir_add_error(ira, field_ptr,
23345 ir_add_error(ira, &field_ptr->base,
2238623346 buf_sprintf("expected pointer, found '%s'", buf_ptr(&field_ptr->value->type->name)));
22387 return ira->codegen->invalid_instruction;
23347 return ira->codegen->invalid_inst_gen;
2238823348 }
2238923349
2239023350 bool is_packed = (container_type->data.structure.layout == ContainerLayoutPacked);
......@@ -22396,9 +23356,9 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2239623356 field_ptr->value->type->data.pointer.is_volatile,
2239723357 PtrLenSingle,
2239823358 field_ptr_align, 0, 0, false);
22399 IrInstruction *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
23359 IrInstGen *casted_field_ptr = ir_implicit_cast(ira, field_ptr, field_ptr_type);
2240023360 if (type_is_invalid(casted_field_ptr->value->type))
22401 return ira->codegen->invalid_instruction;
23361 return ira->codegen->invalid_inst_gen;
2240223362
2240323363 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, container_type,
2240423364 casted_field_ptr->value->type->data.pointer.is_const,
......@@ -22409,23 +23369,23 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2240923369 if (instr_is_comptime(casted_field_ptr)) {
2241023370 ZigValue *field_ptr_val = ir_resolve_const(ira, casted_field_ptr, UndefBad);
2241123371 if (!field_ptr_val)
22412 return ira->codegen->invalid_instruction;
23372 return ira->codegen->invalid_inst_gen;
2241323373
2241423374 if (field_ptr_val->data.x_ptr.special != ConstPtrSpecialBaseStruct) {
22415 ir_add_error(ira, field_ptr, buf_sprintf("pointer value not based on parent struct"));
22416 return ira->codegen->invalid_instruction;
23375 ir_add_error(ira, &field_ptr->base, buf_sprintf("pointer value not based on parent struct"));
23376 return ira->codegen->invalid_inst_gen;
2241723377 }
2241823378
2241923379 size_t ptr_field_index = field_ptr_val->data.x_ptr.data.base_struct.field_index;
2242023380 if (ptr_field_index != field->src_index) {
22421 ir_add_error(ira, &instruction->base,
23381 ir_add_error(ira, &instruction->base.base,
2242223382 buf_sprintf("field '%s' has index %" ZIG_PRI_usize " but pointer value is index %" ZIG_PRI_usize " of struct '%s'",
2242323383 buf_ptr(field->name), field->src_index,
2242423384 ptr_field_index, buf_ptr(&container_type->name)));
22425 return ira->codegen->invalid_instruction;
23385 return ira->codegen->invalid_inst_gen;
2242623386 }
2242723387
22428 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
23388 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2242923389 ZigValue *out_val = result->value;
2243023390 out_val->data.x_ptr.special = ConstPtrSpecialRef;
2243123391 out_val->data.x_ptr.data.ref.pointee = field_ptr_val->data.x_ptr.data.base_struct.struct_val;
......@@ -22433,15 +23393,12 @@ static IrInstruction *ir_analyze_instruction_field_parent_ptr(IrAnalyze *ira,
2243323393 return result;
2243423394 }
2243523395
22436 IrInstruction *result = ir_build_field_parent_ptr(&ira->new_irb, instruction->base.scope,
22437 instruction->base.source_node, type_value, field_name_value, casted_field_ptr, field);
22438 result->value->type = result_type;
22439 return result;
23396 return ir_build_field_parent_ptr_gen(ira, &instruction->base.base, casted_field_ptr, field, result_type);
2244023397}
2244123398
2244223399static TypeStructField *validate_byte_offset(IrAnalyze *ira,
22443 IrInstruction *type_value,
22444 IrInstruction *field_name_value,
23400 IrInstGen *type_value,
23401 IrInstGen *field_name_value,
2244523402 size_t *byte_offset)
2244623403{
2244723404 ZigType *container_type = ir_resolve_type(ira, type_value);
......@@ -22457,21 +23414,21 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
2245723414 return nullptr;
2245823415
2245923416 if (container_type->id != ZigTypeIdStruct) {
22460 ir_add_error(ira, type_value,
23417 ir_add_error(ira, &type_value->base,
2246123418 buf_sprintf("expected struct type, found '%s'", buf_ptr(&container_type->name)));
2246223419 return nullptr;
2246323420 }
2246423421
2246523422 TypeStructField *field = find_struct_type_field(container_type, field_name);
2246623423 if (field == nullptr) {
22467 ir_add_error(ira, field_name_value,
23424 ir_add_error(ira, &field_name_value->base,
2246823425 buf_sprintf("struct '%s' has no field '%s'",
2246923426 buf_ptr(&container_type->name), buf_ptr(field_name)));
2247023427 return nullptr;
2247123428 }
2247223429
2247323430 if (!type_has_bits(field->type_entry)) {
22474 ir_add_error(ira, field_name_value,
23431 ir_add_error(ira, &field_name_value->base,
2247523432 buf_sprintf("zero-bit field '%s' in struct '%s' has no offset",
2247623433 buf_ptr(field_name), buf_ptr(&container_type->name)));
2247723434 return nullptr;
......@@ -22481,36 +23438,32 @@ static TypeStructField *validate_byte_offset(IrAnalyze *ira,
2248123438 return field;
2248223439}
2248323440
22484static IrInstruction *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira,
22485 IrInstructionByteOffsetOf *instruction)
22486{
22487 IrInstruction *type_value = instruction->type_value->child;
23441static IrInstGen *ir_analyze_instruction_byte_offset_of(IrAnalyze *ira, IrInstSrcByteOffsetOf *instruction) {
23442 IrInstGen *type_value = instruction->type_value->child;
2248823443 if (type_is_invalid(type_value->value->type))
22489 return ira->codegen->invalid_instruction;
23444 return ira->codegen->invalid_inst_gen;
2249023445
22491 IrInstruction *field_name_value = instruction->field_name->child;
23446 IrInstGen *field_name_value = instruction->field_name->child;
2249223447 size_t byte_offset = 0;
2249323448 if (!validate_byte_offset(ira, type_value, field_name_value, &byte_offset))
22494 return ira->codegen->invalid_instruction;
23449 return ira->codegen->invalid_inst_gen;
2249523450
2249623451
22497 return ir_const_unsigned(ira, &instruction->base, byte_offset);
23452 return ir_const_unsigned(ira, &instruction->base.base, byte_offset);
2249823453}
2249923454
22500static IrInstruction *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira,
22501 IrInstructionBitOffsetOf *instruction)
22502{
22503 IrInstruction *type_value = instruction->type_value->child;
23455static IrInstGen *ir_analyze_instruction_bit_offset_of(IrAnalyze *ira, IrInstSrcBitOffsetOf *instruction) {
23456 IrInstGen *type_value = instruction->type_value->child;
2250423457 if (type_is_invalid(type_value->value->type))
22505 return ira->codegen->invalid_instruction;
22506 IrInstruction *field_name_value = instruction->field_name->child;
23458 return ira->codegen->invalid_inst_gen;
23459 IrInstGen *field_name_value = instruction->field_name->child;
2250723460 size_t byte_offset = 0;
2250823461 TypeStructField *field = nullptr;
2250923462 if (!(field = validate_byte_offset(ira, type_value, field_name_value, &byte_offset)))
22510 return ira->codegen->invalid_instruction;
23463 return ira->codegen->invalid_inst_gen;
2251123464
2251223465 size_t bit_offset = byte_offset * 8 + field->bit_offset_in_host;
22513 return ir_const_unsigned(ira, &instruction->base, bit_offset);
23466 return ir_const_unsigned(ira, &instruction->base.base, bit_offset);
2251423467}
2251523468
2251623469static void ensure_field_index(ZigType *type, const char *field_name, size_t index) {
......@@ -22558,7 +23511,7 @@ static ZigType *ir_type_info_get_type(IrAnalyze *ira, const char *type_name, Zig
2255823511 return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, nullptr, var->const_value);
2255923512}
2256023513
22561static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *out_val,
23514static Error ir_make_type_info_decls(IrAnalyze *ira, IrInst* source_instr, ZigValue *out_val,
2256223515 ScopeDecls *decls_scope)
2256323516{
2256423517 Error err;
......@@ -22589,11 +23542,14 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2258923542
2259023543 while ((curr_entry = decl_it.next()) != nullptr) {
2259123544 // If the declaration is unresolved, force it to be resolved again.
22592 if (curr_entry->value->resolution == TldResolutionUnresolved) {
22593 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
22594 if (curr_entry->value->resolution != TldResolutionOk) {
22595 return ErrorSemanticAnalyzeFail;
22596 }
23545 resolve_top_level_decl(ira->codegen, curr_entry->value, curr_entry->value->source_node, false);
23546 if (curr_entry->value->resolution == TldResolutionInvalid) {
23547 return ErrorSemanticAnalyzeFail;
23548 }
23549
23550 if (curr_entry->value->resolution == TldResolutionResolving) {
23551 ir_error_dependency_loop(ira, source_instr);
23552 return ErrorSemanticAnalyzeFail;
2259723553 }
2259823554
2259923555 // Skip comptime blocks and test functions.
......@@ -22650,6 +23606,8 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2265023606 case TldIdVar:
2265123607 {
2265223608 ZigVar *var = ((TldVar *)curr_entry->value)->var;
23609 assert(var != nullptr);
23610
2265323611 if ((err = type_resolve(ira->codegen, var->const_value->type, ResolveStatusSizeKnown)))
2265423612 return ErrorSemanticAnalyzeFail;
2265523613
......@@ -22680,11 +23638,7 @@ static Error ir_make_type_info_decls(IrAnalyze *ira, IrInstruction *source_instr
2268023638
2268123639 ZigFn *fn_entry = ((TldFn *)curr_entry->value)->fn_entry;
2268223640 assert(!fn_entry->is_test);
22683
22684 if (fn_entry->type_entry == nullptr) {
22685 ir_error_dependency_loop(ira, source_instr);
22686 return ErrorSemanticAnalyzeFail;
22687 }
23641 assert(fn_entry->type_entry != nullptr);
2268823642
2268923643 AstNodeFnProto *fn_node = &fn_entry->proto_node->data.fn_proto;
2269023644
......@@ -22916,7 +23870,7 @@ static void make_enum_field_val(IrAnalyze *ira, ZigValue *enum_field_val, TypeEn
2291623870 enum_field_val->data.x_struct.fields = inner_fields;
2291723871}
2291823872
22919static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr, ZigType *type_entry,
23873static Error ir_make_type_info_value(IrAnalyze *ira, IrInst* source_instr, ZigType *type_entry,
2292023874 ZigValue **out)
2292123875{
2292223876 Error err;
......@@ -23079,7 +24033,7 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
2307924033 result->special = ConstValSpecialStatic;
2308024034 result->type = ir_type_info_get_type(ira, "Enum", nullptr);
2308124035
23082 ZigValue **fields = alloc_const_vals_ptrs(4);
24036 ZigValue **fields = alloc_const_vals_ptrs(5);
2308324037 result->data.x_struct.fields = fields;
2308424038
2308524039 // layout: ContainerLayout
......@@ -23125,6 +24079,11 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
2312524079 {
2312624080 return err;
2312724081 }
24082 // is_exhaustive: bool
24083 ensure_field_index(result->type, "is_exhaustive", 4);
24084 fields[4]->special = ConstValSpecialStatic;
24085 fields[4]->type = ira->codegen->builtin_types.entry_bool;
24086 fields[4]->data.x_bool = !type_entry->data.enumeration.non_exhaustive;
2312824087
2312924088 break;
2313024089 }
......@@ -23499,22 +24458,20 @@ static Error ir_make_type_info_value(IrAnalyze *ira, IrInstruction *source_instr
2349924458 return ErrorNone;
2350024459}
2350124460
23502static IrInstruction *ir_analyze_instruction_type_info(IrAnalyze *ira,
23503 IrInstructionTypeInfo *instruction)
23504{
24461static IrInstGen *ir_analyze_instruction_type_info(IrAnalyze *ira, IrInstSrcTypeInfo *instruction) {
2350524462 Error err;
23506 IrInstruction *type_value = instruction->type_value->child;
24463 IrInstGen *type_value = instruction->type_value->child;
2350724464 ZigType *type_entry = ir_resolve_type(ira, type_value);
2350824465 if (type_is_invalid(type_entry))
23509 return ira->codegen->invalid_instruction;
24466 return ira->codegen->invalid_inst_gen;
2351024467
2351124468 ZigType *result_type = ir_type_info_get_type(ira, nullptr, nullptr);
2351224469
2351324470 ZigValue *payload;
23514 if ((err = ir_make_type_info_value(ira, &instruction->base, type_entry, &payload)))
23515 return ira->codegen->invalid_instruction;
24471 if ((err = ir_make_type_info_value(ira, &instruction->base.base, type_entry, &payload)))
24472 return ira->codegen->invalid_inst_gen;
2351624473
23517 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
24474 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2351824475 ZigValue *out_val = result->value;
2351924476 bigint_init_unsigned(&out_val->data.x_union.tag, type_id_index(type_entry));
2352024477 out_val->data.x_union.payload = payload;
......@@ -23538,15 +24495,15 @@ static ZigValue *get_const_field(IrAnalyze *ira, AstNode *source_node, ZigValue
2353824495 return val;
2353924496}
2354024497
23541static Error get_const_field_sentinel(IrAnalyze *ira, IrInstruction *source_instr, ZigValue *struct_value,
24498static Error get_const_field_sentinel(IrAnalyze *ira, IrInst* source_instr, ZigValue *struct_value,
2354224499 const char *name, size_t field_index, ZigType *elem_type, ZigValue **result)
2354324500{
2354424501 ZigValue *field_val = get_const_field(ira, source_instr->source_node, struct_value, name, field_index);
2354524502 if (field_val == nullptr)
2354624503 return ErrorSemanticAnalyzeFail;
2354724504
23548 IrInstruction *field_inst = ir_const_move(ira, source_instr, field_val);
23549 IrInstruction *casted_field_inst = ir_implicit_cast(ira, field_inst,
24505 IrInstGen *field_inst = ir_const_move(ira, source_instr, field_val);
24506 IrInstGen *casted_field_inst = ir_implicit_cast(ira, field_inst,
2355024507 get_optional_type(ira->codegen, elem_type));
2355124508 if (type_is_invalid(casted_field_inst->value->type))
2355224509 return ErrorSemanticAnalyzeFail;
......@@ -23585,12 +24542,12 @@ static ZigType *get_const_field_meta_type(IrAnalyze *ira, AstNode *source_node,
2358524542{
2358624543 ZigValue *value = get_const_field(ira, source_node, struct_value, name, field_index);
2358724544 if (value == nullptr)
23588 return ira->codegen->invalid_instruction->value->type;
24545 return ira->codegen->invalid_inst_gen->value->type;
2358924546 assert(value->type == ira->codegen->builtin_types.entry_type);
2359024547 return value->data.x_type;
2359124548}
2359224549
23593static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, ZigTypeId tagTypeId, ZigValue *payload) {
24550static ZigType *type_info_to_type(IrAnalyze *ira, IrInst *source_instr, ZigTypeId tagTypeId, ZigValue *payload) {
2359424551 Error err;
2359524552 switch (tagTypeId) {
2359624553 case ZigTypeIdInvalid:
......@@ -23606,21 +24563,21 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2360624563 case ZigTypeIdInt: {
2360724564 assert(payload->special == ConstValSpecialStatic);
2360824565 assert(payload->type == ir_type_info_get_type(ira, "Int", nullptr));
23609 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 1);
24566 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 1);
2361024567 if (bi == nullptr)
23611 return ira->codegen->invalid_instruction->value->type;
24568 return ira->codegen->invalid_inst_gen->value->type;
2361224569 bool is_signed;
23613 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_signed", 0, &is_signed)))
23614 return ira->codegen->invalid_instruction->value->type;
24570 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_signed", 0, &is_signed)))
24571 return ira->codegen->invalid_inst_gen->value->type;
2361524572 return get_int_type(ira->codegen, is_signed, bigint_as_u32(bi));
2361624573 }
2361724574 case ZigTypeIdFloat:
2361824575 {
2361924576 assert(payload->special == ConstValSpecialStatic);
2362024577 assert(payload->type == ir_type_info_get_type(ira, "Float", nullptr));
23621 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "bits", 0);
24578 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "bits", 0);
2362224579 if (bi == nullptr)
23623 return ira->codegen->invalid_instruction->value->type;
24580 return ira->codegen->invalid_inst_gen->value->type;
2362424581 uint32_t bits = bigint_as_u32(bi);
2362524582 switch (bits) {
2362624583 case 16: return ira->codegen->builtin_types.entry_f16;
......@@ -23628,48 +24585,47 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2362824585 case 64: return ira->codegen->builtin_types.entry_f64;
2362924586 case 128: return ira->codegen->builtin_types.entry_f128;
2363024587 }
23631 ir_add_error(ira, instruction,
23632 buf_sprintf("%d-bit float unsupported", bits));
23633 return ira->codegen->invalid_instruction->value->type;
24588 ir_add_error(ira, source_instr, buf_sprintf("%d-bit float unsupported", bits));
24589 return ira->codegen->invalid_inst_gen->value->type;
2363424590 }
2363524591 case ZigTypeIdPointer:
2363624592 {
2363724593 ZigType *type_info_pointer_type = ir_type_info_get_type(ira, "Pointer", nullptr);
2363824594 assert(payload->special == ConstValSpecialStatic);
2363924595 assert(payload->type == type_info_pointer_type);
23640 ZigValue *size_value = get_const_field(ira, instruction->source_node, payload, "size", 0);
24596 ZigValue *size_value = get_const_field(ira, source_instr->source_node, payload, "size", 0);
2364124597 assert(size_value->type == ir_type_info_get_type(ira, "Size", type_info_pointer_type));
2364224598 BuiltinPtrSize size_enum_index = (BuiltinPtrSize)bigint_as_u32(&size_value->data.x_enum_tag);
2364324599 PtrLen ptr_len = size_enum_index_to_ptr_len(size_enum_index);
23644 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 4);
24600 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 4);
2364524601 if (type_is_invalid(elem_type))
23646 return ira->codegen->invalid_instruction->value->type;
24602 return ira->codegen->invalid_inst_gen->value->type;
2364724603 ZigValue *sentinel;
23648 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 6,
24604 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 6,
2364924605 elem_type, &sentinel)))
2365024606 {
23651 return ira->codegen->invalid_instruction->value->type;
24607 return ira->codegen->invalid_inst_gen->value->type;
2365224608 }
23653 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "alignment", 3);
24609 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "alignment", 3);
2365424610 if (bi == nullptr)
23655 return ira->codegen->invalid_instruction->value->type;
24611 return ira->codegen->invalid_inst_gen->value->type;
2365624612
2365724613 bool is_const;
23658 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_const", 1, &is_const)))
23659 return ira->codegen->invalid_instruction->value->type;
24614 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_const", 1, &is_const)))
24615 return ira->codegen->invalid_inst_gen->value->type;
2366024616
2366124617 bool is_volatile;
23662 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_volatile", 2,
24618 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_volatile", 2,
2366324619 &is_volatile)))
2366424620 {
23665 return ira->codegen->invalid_instruction->value->type;
24621 return ira->codegen->invalid_inst_gen->value->type;
2366624622 }
2366724623
2366824624 bool is_allowzero;
23669 if ((err = get_const_field_bool(ira, instruction->source_node, payload, "is_allowzero", 5,
24625 if ((err = get_const_field_bool(ira, source_instr->source_node, payload, "is_allowzero", 5,
2367024626 &is_allowzero)))
2367124627 {
23672 return ira->codegen->invalid_instruction->value->type;
24628 return ira->codegen->invalid_inst_gen->value->type;
2367324629 }
2367424630
2367524631
......@@ -23690,18 +24646,18 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2369024646 case ZigTypeIdArray: {
2369124647 assert(payload->special == ConstValSpecialStatic);
2369224648 assert(payload->type == ir_type_info_get_type(ira, "Array", nullptr));
23693 ZigType *elem_type = get_const_field_meta_type(ira, instruction->source_node, payload, "child", 1);
24649 ZigType *elem_type = get_const_field_meta_type(ira, source_instr->source_node, payload, "child", 1);
2369424650 if (type_is_invalid(elem_type))
23695 return ira->codegen->invalid_instruction->value->type;
24651 return ira->codegen->invalid_inst_gen->value->type;
2369624652 ZigValue *sentinel;
23697 if ((err = get_const_field_sentinel(ira, instruction, payload, "sentinel", 2,
24653 if ((err = get_const_field_sentinel(ira, source_instr, payload, "sentinel", 2,
2369824654 elem_type, &sentinel)))
2369924655 {
23700 return ira->codegen->invalid_instruction->value->type;
24656 return ira->codegen->invalid_inst_gen->value->type;
2370124657 }
23702 BigInt *bi = get_const_field_lit_int(ira, instruction->source_node, payload, "len", 0);
24658 BigInt *bi = get_const_field_lit_int(ira, source_instr->source_node, payload, "len", 0);
2370324659 if (bi == nullptr)
23704 return ira->codegen->invalid_instruction->value->type;
24660 return ira->codegen->invalid_inst_gen->value->type;
2370524661 return get_array_type(ira->codegen, elem_type, bigint_as_u64(bi), sentinel);
2370624662 }
2370724663 case ZigTypeIdComptimeFloat:
......@@ -23721,78 +24677,77 @@ static ZigType *type_info_to_type(IrAnalyze *ira, IrInstruction *instruction, Zi
2372124677 case ZigTypeIdAnyFrame:
2372224678 case ZigTypeIdVector:
2372324679 case ZigTypeIdEnumLiteral:
23724 ir_add_error(ira, instruction, buf_sprintf(
24680 ir_add_error(ira, source_instr, buf_sprintf(
2372524681 "TODO implement @Type for 'TypeInfo.%s': see https://github.com/ziglang/zig/issues/2907", type_id_name(tagTypeId)));
23726 return ira->codegen->invalid_instruction->value->type;
24682 return ira->codegen->invalid_inst_gen->value->type;
2372724683 case ZigTypeIdUnion:
2372824684 case ZigTypeIdFn:
2372924685 case ZigTypeIdBoundFn:
2373024686 case ZigTypeIdStruct:
23731 ir_add_error(ira, instruction, buf_sprintf(
24687 ir_add_error(ira, source_instr, buf_sprintf(
2373224688 "@Type not availble for 'TypeInfo.%s'", type_id_name(tagTypeId)));
23733 return ira->codegen->invalid_instruction->value->type;
24689 return ira->codegen->invalid_inst_gen->value->type;
2373424690 }
2373524691 zig_unreachable();
2373624692}
2373724693
23738static IrInstruction *ir_analyze_instruction_type(IrAnalyze *ira, IrInstructionType *instruction) {
23739 IrInstruction *type_info_ir = instruction->type_info->child;
23740 if (type_is_invalid(type_info_ir->value->type))
23741 return ira->codegen->invalid_instruction;
24694static IrInstGen *ir_analyze_instruction_type(IrAnalyze *ira, IrInstSrcType *instruction) {
24695 IrInstGen *uncasted_type_info = instruction->type_info->child;
24696 if (type_is_invalid(uncasted_type_info->value->type))
24697 return ira->codegen->invalid_inst_gen;
2374224698
23743 IrInstruction *casted_ir = ir_implicit_cast(ira, type_info_ir, ir_type_info_get_type(ira, nullptr, nullptr));
23744 if (type_is_invalid(casted_ir->value->type))
23745 return ira->codegen->invalid_instruction;
24699 IrInstGen *type_info = ir_implicit_cast(ira, uncasted_type_info, ir_type_info_get_type(ira, nullptr, nullptr));
24700 if (type_is_invalid(type_info->value->type))
24701 return ira->codegen->invalid_inst_gen;
2374624702
23747 ZigValue *type_info_value = ir_resolve_const(ira, casted_ir, UndefBad);
23748 if (!type_info_value)
23749 return ira->codegen->invalid_instruction;
23750 ZigTypeId typeId = type_id_at_index(bigint_as_usize(&type_info_value->data.x_union.tag));
23751 ZigType *type = type_info_to_type(ira, type_info_ir, typeId, type_info_value->data.x_union.payload);
24703 ZigValue *type_info_val = ir_resolve_const(ira, type_info, UndefBad);
24704 if (type_info_val == nullptr)
24705 return ira->codegen->invalid_inst_gen;
24706 ZigTypeId type_id_tag = type_id_at_index(bigint_as_usize(&type_info_val->data.x_union.tag));
24707 ZigType *type = type_info_to_type(ira, &uncasted_type_info->base, type_id_tag,
24708 type_info_val->data.x_union.payload);
2375224709 if (type_is_invalid(type))
23753 return ira->codegen->invalid_instruction;
23754 return ir_const_type(ira, &instruction->base, type);
24710 return ira->codegen->invalid_inst_gen;
24711 return ir_const_type(ira, &instruction->base.base, type);
2375524712}
2375624713
23757static IrInstruction *ir_analyze_instruction_type_id(IrAnalyze *ira,
23758 IrInstructionTypeId *instruction)
23759{
23760 IrInstruction *type_value = instruction->type_value->child;
24714static IrInstGen *ir_analyze_instruction_type_id(IrAnalyze *ira, IrInstSrcTypeId *instruction) {
24715 IrInstGen *type_value = instruction->type_value->child;
2376124716 ZigType *type_entry = ir_resolve_type(ira, type_value);
2376224717 if (type_is_invalid(type_entry))
23763 return ira->codegen->invalid_instruction;
24718 return ira->codegen->invalid_inst_gen;
2376424719
2376524720 ZigType *result_type = get_builtin_type(ira->codegen, "TypeId");
2376624721
23767 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
24722 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2376824723 bigint_init_unsigned(&result->value->data.x_enum_tag, type_id_index(type_entry));
2376924724 return result;
2377024725}
2377124726
23772static IrInstruction *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
23773 IrInstructionSetEvalBranchQuota *instruction)
24727static IrInstGen *ir_analyze_instruction_set_eval_branch_quota(IrAnalyze *ira,
24728 IrInstSrcSetEvalBranchQuota *instruction)
2377424729{
2377524730 uint64_t new_quota;
2377624731 if (!ir_resolve_usize(ira, instruction->new_quota->child, &new_quota))
23777 return ira->codegen->invalid_instruction;
24732 return ira->codegen->invalid_inst_gen;
2377824733
2377924734 if (new_quota > *ira->new_irb.exec->backward_branch_quota) {
2378024735 *ira->new_irb.exec->backward_branch_quota = new_quota;
2378124736 }
2378224737
23783 return ir_const_void(ira, &instruction->base);
24738 return ir_const_void(ira, &instruction->base.base);
2378424739}
2378524740
23786static IrInstruction *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstructionTypeName *instruction) {
23787 IrInstruction *type_value = instruction->type_value->child;
24741static IrInstGen *ir_analyze_instruction_type_name(IrAnalyze *ira, IrInstSrcTypeName *instruction) {
24742 IrInstGen *type_value = instruction->type_value->child;
2378824743 ZigType *type_entry = ir_resolve_type(ira, type_value);
2378924744 if (type_is_invalid(type_entry))
23790 return ira->codegen->invalid_instruction;
24745 return ira->codegen->invalid_inst_gen;
2379124746
2379224747 if (!type_entry->cached_const_name_val) {
2379324748 type_entry->cached_const_name_val = create_const_str_lit(ira->codegen, type_bare_name(type_entry));
2379424749 }
23795 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
24750 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2379624751 copy_const_val(result->value, type_entry->cached_const_name_val);
2379724752 return result;
2379824753}
......@@ -23804,13 +24759,13 @@ static void ir_cimport_cache_paths(Buf *cache_dir, Buf *tmp_c_file_digest, Buf *
2380424759 buf_ptr(cache_dir), buf_ptr(tmp_c_file_digest));
2380524760 buf_appendf(out_zig_path, "%s" OS_SEP "cimport.zig", buf_ptr(out_zig_dir));
2380624761}
23807static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstructionCImport *instruction) {
24762static IrInstGen *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstSrcCImport *instruction) {
2380824763 Error err;
23809 AstNode *node = instruction->base.source_node;
24764 AstNode *node = instruction->base.base.source_node;
2381024765 assert(node->type == NodeTypeFnCallExpr);
2381124766 AstNode *block_node = node->data.fn_call_expr.params.at(0);
2381224767
23813 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.scope);
24768 ScopeCImport *cimport_scope = create_cimport_scope(ira->codegen, node, instruction->base.base.scope);
2381424769
2381524770 // Execute the C import block like an inline function
2381624771 ZigType *void_type = ira->codegen->builtin_types.entry_void;
......@@ -23821,13 +24776,13 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2382124776 ira->new_irb.exec->backward_branch_count, ira->new_irb.exec->backward_branch_quota, nullptr,
2382224777 &cimport_scope->buf, block_node, nullptr, nullptr, nullptr, UndefBad)))
2382324778 {
23824 return ira->codegen->invalid_instruction;
24779 return ira->codegen->invalid_inst_gen;
2382524780 }
2382624781 if (type_is_invalid(cimport_result->type))
23827 return ira->codegen->invalid_instruction;
24782 return ira->codegen->invalid_inst_gen;
2382824783 destroy(result_ptr, "ZigValue");
2382924784
23830 ZigPackage *cur_scope_pkg = scope_package(instruction->base.scope);
24785 ZigPackage *cur_scope_pkg = scope_package(instruction->base.base.scope);
2383124786 Buf *namespace_name = buf_sprintf("%s.cimport:%" ZIG_PRI_usize ":%" ZIG_PRI_usize,
2383224787 buf_ptr(&cur_scope_pkg->pkg_path), node->line + 1, node->column + 1);
2383324788
......@@ -23839,7 +24794,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2383924794 CacheHash *cache_hash;
2384024795 if ((err = create_c_object_cache(ira->codegen, &cache_hash, false))) {
2384124796 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to create cache: %s", err_str(err)));
23842 return ira->codegen->invalid_instruction;
24797 return ira->codegen->invalid_inst_gen;
2384324798 }
2384424799 cache_buf(cache_hash, &cimport_scope->buf);
2384524800
......@@ -23851,7 +24806,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2385124806 if ((err = cache_hit(cache_hash, &tmp_c_file_digest))) {
2385224807 if (err != ErrorInvalidFormat) {
2385324808 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to check cache: %s", err_str(err)));
23854 return ira->codegen->invalid_instruction;
24809 return ira->codegen->invalid_inst_gen;
2385524810 }
2385624811 }
2385724812 ira->codegen->caches_to_release.append(cache_hash);
......@@ -23870,12 +24825,12 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2387024825
2387124826 if ((err = os_make_path(tmp_c_file_dir))) {
2387224827 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make dir: %s", err_str(err)));
23873 return ira->codegen->invalid_instruction;
24828 return ira->codegen->invalid_inst_gen;
2387424829 }
2387524830
2387624831 if ((err = os_write_file(&tmp_c_file_path, &cimport_scope->buf))) {
2387724832 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to write .h file: %s", err_str(err)));
23878 return ira->codegen->invalid_instruction;
24833 return ira->codegen->invalid_inst_gen;
2387924834 }
2388024835 if (ira->codegen->verbose_cimport) {
2388124836 fprintf(stderr, "@cImport source: %s\n", buf_ptr(&tmp_c_file_path));
......@@ -23910,7 +24865,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2391024865 {
2391124866 if (err != ErrorCCompileErrors) {
2391224867 ir_add_error_node(ira, node, buf_sprintf("C import failed: %s", err_str(err)));
23913 return ira->codegen->invalid_instruction;
24868 return ira->codegen->invalid_inst_gen;
2391424869 }
2391524870
2391624871 ErrorMsg *parent_err_msg = ir_add_error_node(ira, node, buf_sprintf("C import failed"));
......@@ -23931,7 +24886,7 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2393124886 }
2393224887 }
2393324888
23934 return ira->codegen->invalid_instruction;
24889 return ira->codegen->invalid_inst_gen;
2393524890 }
2393624891 if (ira->codegen->verbose_cimport) {
2393724892 fprintf(stderr, "@cImport .d file: %s\n", buf_ptr(tmp_dep_file));
......@@ -23939,29 +24894,29 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2393924894
2394024895 if ((err = cache_add_dep_file(cache_hash, tmp_dep_file, false))) {
2394124896 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to parse .d file: %s", err_str(err)));
23942 return ira->codegen->invalid_instruction;
24897 return ira->codegen->invalid_inst_gen;
2394324898 }
2394424899 if ((err = cache_final(cache_hash, &tmp_c_file_digest))) {
2394524900 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to finalize cache: %s", err_str(err)));
23946 return ira->codegen->invalid_instruction;
24901 return ira->codegen->invalid_inst_gen;
2394724902 }
2394824903
2394924904 ir_cimport_cache_paths(ira->codegen->cache_dir, &tmp_c_file_digest, out_zig_dir, out_zig_path);
2395024905 if ((err = os_make_path(out_zig_dir))) {
2395124906 ir_add_error_node(ira, node, buf_sprintf("C import failed: unable to make output dir: %s", err_str(err)));
23952 return ira->codegen->invalid_instruction;
24907 return ira->codegen->invalid_inst_gen;
2395324908 }
2395424909 FILE *out_file = fopen(buf_ptr(out_zig_path), "wb");
2395524910 if (out_file == nullptr) {
2395624911 ir_add_error_node(ira, node,
2395724912 buf_sprintf("C import failed: unable to open output file: %s", strerror(errno)));
23958 return ira->codegen->invalid_instruction;
24913 return ira->codegen->invalid_inst_gen;
2395924914 }
2396024915 stage2_render_ast(ast, out_file);
2396124916 if (fclose(out_file) != 0) {
2396224917 ir_add_error_node(ira, node,
2396324918 buf_sprintf("C import failed: unable to write to output file: %s", strerror(errno)));
23964 return ira->codegen->invalid_instruction;
24919 return ira->codegen->invalid_inst_gen;
2396524920 }
2396624921
2396724922 if (ira->codegen->verbose_cimport) {
......@@ -23980,90 +24935,90 @@ static IrInstruction *ir_analyze_instruction_c_import(IrAnalyze *ira, IrInstruct
2398024935 if ((err = file_fetch(ira->codegen, out_zig_path, import_code))) {
2398124936 ir_add_error_node(ira, node,
2398224937 buf_sprintf("unable to open '%s': %s", buf_ptr(out_zig_path), err_str(err)));
23983 return ira->codegen->invalid_instruction;
24938 return ira->codegen->invalid_inst_gen;
2398424939 }
2398524940 ZigType *child_import = add_source_file(ira->codegen, cimport_pkg, out_zig_path,
2398624941 import_code, SourceKindCImport);
23987 return ir_const_type(ira, &instruction->base, child_import);
24942 return ir_const_type(ira, &instruction->base.base, child_import);
2398824943}
2398924944
23990static IrInstruction *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstructionCInclude *instruction) {
23991 IrInstruction *name_value = instruction->name->child;
24945static IrInstGen *ir_analyze_instruction_c_include(IrAnalyze *ira, IrInstSrcCInclude *instruction) {
24946 IrInstGen *name_value = instruction->name->child;
2399224947 if (type_is_invalid(name_value->value->type))
23993 return ira->codegen->invalid_instruction;
24948 return ira->codegen->invalid_inst_gen;
2399424949
2399524950 Buf *include_name = ir_resolve_str(ira, name_value);
2399624951 if (!include_name)
23997 return ira->codegen->invalid_instruction;
24952 return ira->codegen->invalid_inst_gen;
2399824953
23999 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
24954 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2400024955 // We check for this error in pass1
2400124956 assert(c_import_buf);
2400224957
2400324958 buf_appendf(c_import_buf, "#include <%s>\n", buf_ptr(include_name));
2400424959
24005 return ir_const_void(ira, &instruction->base);
24960 return ir_const_void(ira, &instruction->base.base);
2400624961}
2400724962
24008static IrInstruction *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstructionCDefine *instruction) {
24009 IrInstruction *name = instruction->name->child;
24963static IrInstGen *ir_analyze_instruction_c_define(IrAnalyze *ira, IrInstSrcCDefine *instruction) {
24964 IrInstGen *name = instruction->name->child;
2401024965 if (type_is_invalid(name->value->type))
24011 return ira->codegen->invalid_instruction;
24966 return ira->codegen->invalid_inst_gen;
2401224967
2401324968 Buf *define_name = ir_resolve_str(ira, name);
2401424969 if (!define_name)
24015 return ira->codegen->invalid_instruction;
24970 return ira->codegen->invalid_inst_gen;
2401624971
24017 IrInstruction *value = instruction->value->child;
24972 IrInstGen *value = instruction->value->child;
2401824973 if (type_is_invalid(value->value->type))
24019 return ira->codegen->invalid_instruction;
24974 return ira->codegen->invalid_inst_gen;
2402024975
2402124976 Buf *define_value = nullptr;
2402224977 // The second parameter is either a string or void (equivalent to "")
2402324978 if (value->value->type->id != ZigTypeIdVoid) {
2402424979 define_value = ir_resolve_str(ira, value);
2402524980 if (!define_value)
24026 return ira->codegen->invalid_instruction;
24981 return ira->codegen->invalid_inst_gen;
2402724982 }
2402824983
24029 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
24984 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2403024985 // We check for this error in pass1
2403124986 assert(c_import_buf);
2403224987
2403324988 buf_appendf(c_import_buf, "#define %s %s\n", buf_ptr(define_name),
2403424989 define_value ? buf_ptr(define_value) : "");
2403524990
24036 return ir_const_void(ira, &instruction->base);
24991 return ir_const_void(ira, &instruction->base.base);
2403724992}
2403824993
24039static IrInstruction *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstructionCUndef *instruction) {
24040 IrInstruction *name = instruction->name->child;
24994static IrInstGen *ir_analyze_instruction_c_undef(IrAnalyze *ira, IrInstSrcCUndef *instruction) {
24995 IrInstGen *name = instruction->name->child;
2404124996 if (type_is_invalid(name->value->type))
24042 return ira->codegen->invalid_instruction;
24997 return ira->codegen->invalid_inst_gen;
2404324998
2404424999 Buf *undef_name = ir_resolve_str(ira, name);
2404525000 if (!undef_name)
24046 return ira->codegen->invalid_instruction;
25001 return ira->codegen->invalid_inst_gen;
2404725002
24048 Buf *c_import_buf = exec_c_import_buf(ira->new_irb.exec);
25003 Buf *c_import_buf = ira->new_irb.exec->c_import_buf;
2404925004 // We check for this error in pass1
2405025005 assert(c_import_buf);
2405125006
2405225007 buf_appendf(c_import_buf, "#undef %s\n", buf_ptr(undef_name));
2405325008
24054 return ir_const_void(ira, &instruction->base);
25009 return ir_const_void(ira, &instruction->base.base);
2405525010}
2405625011
24057static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstructionEmbedFile *instruction) {
24058 IrInstruction *name = instruction->name->child;
25012static IrInstGen *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstSrcEmbedFile *instruction) {
25013 IrInstGen *name = instruction->name->child;
2405925014 if (type_is_invalid(name->value->type))
24060 return ira->codegen->invalid_instruction;
25015 return ira->codegen->invalid_inst_gen;
2406125016
2406225017 Buf *rel_file_path = ir_resolve_str(ira, name);
2406325018 if (!rel_file_path)
24064 return ira->codegen->invalid_instruction;
25019 return ira->codegen->invalid_inst_gen;
2406525020
24066 ZigType *import = get_scope_import(instruction->base.scope);
25021 ZigType *import = get_scope_import(instruction->base.base.scope);
2406725022 // figure out absolute path to resource
2406825023 Buf source_dir_path = BUF_INIT;
2406925024 os_path_dirname(import->data.structure.root_struct->path, &source_dir_path);
......@@ -24080,93 +25035,95 @@ static IrInstruction *ir_analyze_instruction_embed_file(IrAnalyze *ira, IrInstru
2408025035 Error err;
2408125036 if ((err = file_fetch(ira->codegen, file_path, file_contents))) {
2408225037 if (err == ErrorFileNotFound) {
24083 ir_add_error(ira, instruction->name, buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
24084 return ira->codegen->invalid_instruction;
25038 ir_add_error(ira, &instruction->name->base,
25039 buf_sprintf("unable to find '%s'", buf_ptr(file_path)));
25040 return ira->codegen->invalid_inst_gen;
2408525041 } else {
24086 ir_add_error(ira, instruction->name, buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
24087 return ira->codegen->invalid_instruction;
25042 ir_add_error(ira, &instruction->name->base,
25043 buf_sprintf("unable to open '%s': %s", buf_ptr(file_path), err_str(err)));
25044 return ira->codegen->invalid_inst_gen;
2408825045 }
2408925046 }
2409025047
2409125048 ZigType *result_type = get_array_type(ira->codegen,
2409225049 ira->codegen->builtin_types.entry_u8, buf_len(file_contents), nullptr);
24093 IrInstruction *result = ir_const(ira, &instruction->base, result_type);
25050 IrInstGen *result = ir_const(ira, &instruction->base.base, result_type);
2409425051 init_const_str_lit(ira->codegen, result->value, file_contents);
2409525052 return result;
2409625053}
2409725054
24098static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructionCmpxchgSrc *instruction) {
25055static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxchg *instruction) {
2409925056 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->type_value->child);
2410025057 if (type_is_invalid(operand_type))
24101 return ira->codegen->invalid_instruction;
25058 return ira->codegen->invalid_inst_gen;
2410225059
2410325060 if (operand_type->id == ZigTypeIdFloat) {
24104 ir_add_error(ira, instruction->type_value->child,
25061 ir_add_error(ira, &instruction->type_value->child->base,
2410525062 buf_sprintf("expected integer, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
24106 return ira->codegen->invalid_instruction;
25063 return ira->codegen->invalid_inst_gen;
2410725064 }
2410825065
24109 IrInstruction *ptr = instruction->ptr->child;
25066 IrInstGen *ptr = instruction->ptr->child;
2411025067 if (type_is_invalid(ptr->value->type))
24111 return ira->codegen->invalid_instruction;
25068 return ira->codegen->invalid_inst_gen;
2411225069
2411325070 // TODO let this be volatile
2411425071 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
24115 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
25072 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr, ptr_type);
2411625073 if (type_is_invalid(casted_ptr->value->type))
24117 return ira->codegen->invalid_instruction;
25074 return ira->codegen->invalid_inst_gen;
2411825075
24119 IrInstruction *cmp_value = instruction->cmp_value->child;
25076 IrInstGen *cmp_value = instruction->cmp_value->child;
2412025077 if (type_is_invalid(cmp_value->value->type))
24121 return ira->codegen->invalid_instruction;
25078 return ira->codegen->invalid_inst_gen;
2412225079
24123 IrInstruction *new_value = instruction->new_value->child;
25080 IrInstGen *new_value = instruction->new_value->child;
2412425081 if (type_is_invalid(new_value->value->type))
24125 return ira->codegen->invalid_instruction;
25082 return ira->codegen->invalid_inst_gen;
2412625083
24127 IrInstruction *success_order_value = instruction->success_order_value->child;
25084 IrInstGen *success_order_value = instruction->success_order_value->child;
2412825085 if (type_is_invalid(success_order_value->value->type))
24129 return ira->codegen->invalid_instruction;
25086 return ira->codegen->invalid_inst_gen;
2413025087
2413125088 AtomicOrder success_order;
2413225089 if (!ir_resolve_atomic_order(ira, success_order_value, &success_order))
24133 return ira->codegen->invalid_instruction;
25090 return ira->codegen->invalid_inst_gen;
2413425091
24135 IrInstruction *failure_order_value = instruction->failure_order_value->child;
25092 IrInstGen *failure_order_value = instruction->failure_order_value->child;
2413625093 if (type_is_invalid(failure_order_value->value->type))
24137 return ira->codegen->invalid_instruction;
25094 return ira->codegen->invalid_inst_gen;
2413825095
2413925096 AtomicOrder failure_order;
2414025097 if (!ir_resolve_atomic_order(ira, failure_order_value, &failure_order))
24141 return ira->codegen->invalid_instruction;
25098 return ira->codegen->invalid_inst_gen;
2414225099
24143 IrInstruction *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
25100 IrInstGen *casted_cmp_value = ir_implicit_cast(ira, cmp_value, operand_type);
2414425101 if (type_is_invalid(casted_cmp_value->value->type))
24145 return ira->codegen->invalid_instruction;
25102 return ira->codegen->invalid_inst_gen;
2414625103
24147 IrInstruction *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
25104 IrInstGen *casted_new_value = ir_implicit_cast(ira, new_value, operand_type);
2414825105 if (type_is_invalid(casted_new_value->value->type))
24149 return ira->codegen->invalid_instruction;
25106 return ira->codegen->invalid_inst_gen;
2415025107
2415125108 if (success_order < AtomicOrderMonotonic) {
24152 ir_add_error(ira, success_order_value,
25109 ir_add_error(ira, &success_order_value->base,
2415325110 buf_sprintf("success atomic ordering must be Monotonic or stricter"));
24154 return ira->codegen->invalid_instruction;
25111 return ira->codegen->invalid_inst_gen;
2415525112 }
2415625113 if (failure_order < AtomicOrderMonotonic) {
24157 ir_add_error(ira, failure_order_value,
25114 ir_add_error(ira, &failure_order_value->base,
2415825115 buf_sprintf("failure atomic ordering must be Monotonic or stricter"));
24159 return ira->codegen->invalid_instruction;
25116 return ira->codegen->invalid_inst_gen;
2416025117 }
2416125118 if (failure_order > success_order) {
24162 ir_add_error(ira, failure_order_value,
25119 ir_add_error(ira, &failure_order_value->base,
2416325120 buf_sprintf("failure atomic ordering must be no stricter than success"));
24164 return ira->codegen->invalid_instruction;
25121 return ira->codegen->invalid_inst_gen;
2416525122 }
2416625123 if (failure_order == AtomicOrderRelease || failure_order == AtomicOrderAcqRel) {
24167 ir_add_error(ira, failure_order_value,
25124 ir_add_error(ira, &failure_order_value->base,
2416825125 buf_sprintf("failure atomic ordering must not be Release or AcqRel"));
24169 return ira->codegen->invalid_instruction;
25126 return ira->codegen->invalid_inst_gen;
2417025127 }
2417125128
2417225129 if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
......@@ -24175,66 +25132,63 @@ static IrInstruction *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstructi
2417525132 }
2417625133
2417725134 ZigType *result_type = get_optional_type(ira->codegen, operand_type);
24178 IrInstruction *result_loc;
25135 IrInstGen *result_loc;
2417925136 if (handle_is_ptr(result_type)) {
24180 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
25137 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2418125138 result_type, nullptr, true, true);
24182 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
25139 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2418325140 return result_loc;
2418425141 }
2418525142 } else {
2418625143 result_loc = nullptr;
2418725144 }
2418825145
24189 return ir_build_cmpxchg_gen(ira, &instruction->base, result_type,
25146 return ir_build_cmpxchg_gen(ira, &instruction->base.base, result_type,
2419025147 casted_ptr, casted_cmp_value, casted_new_value,
2419125148 success_order, failure_order, instruction->is_weak, result_loc);
2419225149}
2419325150
24194static IrInstruction *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstructionFence *instruction) {
24195 IrInstruction *order_value = instruction->order_value->child;
24196 if (type_is_invalid(order_value->value->type))
24197 return ira->codegen->invalid_instruction;
25151static IrInstGen *ir_analyze_instruction_fence(IrAnalyze *ira, IrInstSrcFence *instruction) {
25152 IrInstGen *order_inst = instruction->order->child;
25153 if (type_is_invalid(order_inst->value->type))
25154 return ira->codegen->invalid_inst_gen;
2419825155
2419925156 AtomicOrder order;
24200 if (!ir_resolve_atomic_order(ira, order_value, &order))
24201 return ira->codegen->invalid_instruction;
25157 if (!ir_resolve_atomic_order(ira, order_inst, &order))
25158 return ira->codegen->invalid_inst_gen;
2420225159
2420325160 if (order < AtomicOrderAcquire) {
24204 ir_add_error(ira, order_value,
25161 ir_add_error(ira, &order_inst->base,
2420525162 buf_sprintf("atomic ordering must be Acquire or stricter"));
24206 return ira->codegen->invalid_instruction;
25163 return ira->codegen->invalid_inst_gen;
2420725164 }
2420825165
24209 IrInstruction *result = ir_build_fence(&ira->new_irb,
24210 instruction->base.scope, instruction->base.source_node, order_value, order);
24211 result->value->type = ira->codegen->builtin_types.entry_void;
24212 return result;
25166 return ir_build_fence_gen(ira, &instruction->base.base, order);
2421325167}
2421425168
24215static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstructionTruncate *instruction) {
24216 IrInstruction *dest_type_value = instruction->dest_type->child;
25169static IrInstGen *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstSrcTruncate *instruction) {
25170 IrInstGen *dest_type_value = instruction->dest_type->child;
2421725171 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2421825172 if (type_is_invalid(dest_type))
24219 return ira->codegen->invalid_instruction;
25173 return ira->codegen->invalid_inst_gen;
2422025174
2422125175 if (dest_type->id != ZigTypeIdInt &&
2422225176 dest_type->id != ZigTypeIdComptimeInt)
2422325177 {
24224 ir_add_error(ira, dest_type_value, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24225 return ira->codegen->invalid_instruction;
25178 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25179 return ira->codegen->invalid_inst_gen;
2422625180 }
2422725181
24228 IrInstruction *target = instruction->target->child;
25182 IrInstGen *target = instruction->target->child;
2422925183 ZigType *src_type = target->value->type;
2423025184 if (type_is_invalid(src_type))
24231 return ira->codegen->invalid_instruction;
25185 return ira->codegen->invalid_inst_gen;
2423225186
2423325187 if (src_type->id != ZigTypeIdInt &&
2423425188 src_type->id != ZigTypeIdComptimeInt)
2423525189 {
24236 ir_add_error(ira, target, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
24237 return ira->codegen->invalid_instruction;
25190 ir_add_error(ira, &target->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&src_type->name)));
25191 return ira->codegen->invalid_inst_gen;
2423825192 }
2423925193
2424025194 if (dest_type->id == ZigTypeIdComptimeInt) {
......@@ -24244,54 +25198,51 @@ static IrInstruction *ir_analyze_instruction_truncate(IrAnalyze *ira, IrInstruct
2424425198 if (instr_is_comptime(target)) {
2424525199 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2424625200 if (val == nullptr)
24247 return ira->codegen->invalid_instruction;
25201 return ira->codegen->invalid_inst_gen;
2424825202
24249 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
25203 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
2425025204 bigint_truncate(&result->value->data.x_bigint, &val->data.x_bigint,
2425125205 dest_type->data.integral.bit_count, dest_type->data.integral.is_signed);
2425225206 return result;
2425325207 }
2425425208
2425525209 if (src_type->data.integral.bit_count == 0 || dest_type->data.integral.bit_count == 0) {
24256 IrInstruction *result = ir_const(ira, &instruction->base, dest_type);
25210 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_type);
2425725211 bigint_init_unsigned(&result->value->data.x_bigint, 0);
2425825212 return result;
2425925213 }
2426025214
2426125215 if (src_type->data.integral.is_signed != dest_type->data.integral.is_signed) {
2426225216 const char *sign_str = dest_type->data.integral.is_signed ? "signed" : "unsigned";
24263 ir_add_error(ira, target, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
24264 return ira->codegen->invalid_instruction;
25217 ir_add_error(ira, &target->base, buf_sprintf("expected %s integer type, found '%s'", sign_str, buf_ptr(&src_type->name)));
25218 return ira->codegen->invalid_inst_gen;
2426525219 } else if (src_type->data.integral.bit_count < dest_type->data.integral.bit_count) {
24266 ir_add_error(ira, target, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
25220 ir_add_error(ira, &target->base, buf_sprintf("type '%s' has fewer bits than destination type '%s'",
2426725221 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
24268 return ira->codegen->invalid_instruction;
25222 return ira->codegen->invalid_inst_gen;
2426925223 }
2427025224
24271 IrInstruction *new_instruction = ir_build_truncate(&ira->new_irb, instruction->base.scope,
24272 instruction->base.source_node, dest_type_value, target);
24273 new_instruction->value->type = dest_type;
24274 return new_instruction;
25225 return ir_build_truncate_gen(ira, &instruction->base.base, dest_type, target);
2427525226}
2427625227
24277static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstructionIntCast *instruction) {
25228static IrInstGen *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstSrcIntCast *instruction) {
2427825229 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2427925230 if (type_is_invalid(dest_type))
24280 return ira->codegen->invalid_instruction;
25231 return ira->codegen->invalid_inst_gen;
2428125232
2428225233 if (dest_type->id != ZigTypeIdInt && dest_type->id != ZigTypeIdComptimeInt) {
24283 ir_add_error(ira, instruction->dest_type, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
24284 return ira->codegen->invalid_instruction;
25234 ir_add_error(ira, &instruction->dest_type->base, buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25235 return ira->codegen->invalid_inst_gen;
2428525236 }
2428625237
24287 IrInstruction *target = instruction->target->child;
25238 IrInstGen *target = instruction->target->child;
2428825239 if (type_is_invalid(target->value->type))
24289 return ira->codegen->invalid_instruction;
25240 return ira->codegen->invalid_inst_gen;
2429025241
2429125242 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24292 ir_add_error(ira, instruction->target, buf_sprintf("expected integer type, found '%s'",
25243 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected integer type, found '%s'",
2429325244 buf_ptr(&target->value->type->name)));
24294 return ira->codegen->invalid_instruction;
25245 return ira->codegen->invalid_inst_gen;
2429525246 }
2429625247
2429725248 if (instr_is_comptime(target)) {
......@@ -24299,28 +25250,28 @@ static IrInstruction *ir_analyze_instruction_int_cast(IrAnalyze *ira, IrInstruct
2429925250 }
2430025251
2430125252 if (dest_type->id == ZigTypeIdComptimeInt) {
24302 ir_add_error(ira, instruction->target, buf_sprintf("attempt to cast runtime value to '%s'",
25253 ir_add_error(ira, &instruction->target->base, buf_sprintf("attempt to cast runtime value to '%s'",
2430325254 buf_ptr(&dest_type->name)));
24304 return ira->codegen->invalid_instruction;
25255 return ira->codegen->invalid_inst_gen;
2430525256 }
2430625257
24307 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
25258 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
2430825259}
2430925260
24310static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstructionFloatCast *instruction) {
25261static IrInstGen *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstSrcFloatCast *instruction) {
2431125262 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2431225263 if (type_is_invalid(dest_type))
24313 return ira->codegen->invalid_instruction;
25264 return ira->codegen->invalid_inst_gen;
2431425265
2431525266 if (dest_type->id != ZigTypeIdFloat) {
24316 ir_add_error(ira, instruction->dest_type,
25267 ir_add_error(ira, &instruction->dest_type->base,
2431725268 buf_sprintf("expected float type, found '%s'", buf_ptr(&dest_type->name)));
24318 return ira->codegen->invalid_instruction;
25269 return ira->codegen->invalid_inst_gen;
2431925270 }
2432025271
24321 IrInstruction *target = instruction->target->child;
25272 IrInstGen *target = instruction->target->child;
2432225273 if (type_is_invalid(target->value->type))
24323 return ira->codegen->invalid_instruction;
25274 return ira->codegen->invalid_inst_gen;
2432425275
2432525276 if (target->value->type->id == ZigTypeIdComptimeInt ||
2432625277 target->value->type->id == ZigTypeIdComptimeFloat)
......@@ -24332,55 +25283,55 @@ static IrInstruction *ir_analyze_instruction_float_cast(IrAnalyze *ira, IrInstru
2433225283 } else {
2433325284 op = CastOpNumLitToConcrete;
2433425285 }
24335 return ir_resolve_cast(ira, &instruction->base, target, dest_type, op);
25286 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, op);
2433625287 } else {
24337 return ira->codegen->invalid_instruction;
25288 return ira->codegen->invalid_inst_gen;
2433825289 }
2433925290 }
2434025291
2434125292 if (target->value->type->id != ZigTypeIdFloat) {
24342 ir_add_error(ira, instruction->target, buf_sprintf("expected float type, found '%s'",
25293 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected float type, found '%s'",
2434325294 buf_ptr(&target->value->type->name)));
24344 return ira->codegen->invalid_instruction;
25295 return ira->codegen->invalid_inst_gen;
2434525296 }
2434625297
24347 return ir_analyze_widen_or_shorten(ira, &instruction->base, target, dest_type);
25298 return ir_analyze_widen_or_shorten(ira, &instruction->base.base, target, dest_type);
2434825299}
2434925300
24350static IrInstruction *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstructionErrSetCast *instruction) {
25301static IrInstGen *ir_analyze_instruction_err_set_cast(IrAnalyze *ira, IrInstSrcErrSetCast *instruction) {
2435125302 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2435225303 if (type_is_invalid(dest_type))
24353 return ira->codegen->invalid_instruction;
25304 return ira->codegen->invalid_inst_gen;
2435425305
2435525306 if (dest_type->id != ZigTypeIdErrorSet) {
24356 ir_add_error(ira, instruction->dest_type,
25307 ir_add_error(ira, &instruction->dest_type->base,
2435725308 buf_sprintf("expected error set type, found '%s'", buf_ptr(&dest_type->name)));
24358 return ira->codegen->invalid_instruction;
25309 return ira->codegen->invalid_inst_gen;
2435925310 }
2436025311
24361 IrInstruction *target = instruction->target->child;
25312 IrInstGen *target = instruction->target->child;
2436225313 if (type_is_invalid(target->value->type))
24363 return ira->codegen->invalid_instruction;
25314 return ira->codegen->invalid_inst_gen;
2436425315
2436525316 if (target->value->type->id != ZigTypeIdErrorSet) {
24366 ir_add_error(ira, instruction->target,
25317 ir_add_error(ira, &instruction->target->base,
2436725318 buf_sprintf("expected error set type, found '%s'", buf_ptr(&target->value->type->name)));
24368 return ira->codegen->invalid_instruction;
25319 return ira->codegen->invalid_inst_gen;
2436925320 }
2437025321
24371 return ir_analyze_err_set_cast(ira, &instruction->base, target, dest_type);
25322 return ir_analyze_err_set_cast(ira, &instruction->base.base, target, dest_type);
2437225323}
2437325324
24374static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstructionFromBytes *instruction) {
25325static IrInstGen *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstSrcFromBytes *instruction) {
2437525326 Error err;
2437625327
2437725328 ZigType *dest_child_type = ir_resolve_type(ira, instruction->dest_child_type->child);
2437825329 if (type_is_invalid(dest_child_type))
24379 return ira->codegen->invalid_instruction;
25330 return ira->codegen->invalid_inst_gen;
2438025331
24381 IrInstruction *target = instruction->target->child;
25332 IrInstGen *target = instruction->target->child;
2438225333 if (type_is_invalid(target->value->type))
24383 return ira->codegen->invalid_instruction;
25334 return ira->codegen->invalid_inst_gen;
2438425335
2438525336 bool src_ptr_const;
2438625337 bool src_ptr_volatile;
......@@ -24390,27 +25341,27 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2439025341 src_ptr_volatile = target->value->type->data.pointer.is_volatile;
2439125342
2439225343 if ((err = resolve_ptr_align(ira, target->value->type, &src_ptr_align)))
24393 return ira->codegen->invalid_instruction;
25344 return ira->codegen->invalid_inst_gen;
2439425345 } else if (is_slice(target->value->type)) {
2439525346 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
2439625347 src_ptr_const = src_ptr_type->data.pointer.is_const;
2439725348 src_ptr_volatile = src_ptr_type->data.pointer.is_volatile;
2439825349
2439925350 if ((err = resolve_ptr_align(ira, src_ptr_type, &src_ptr_align)))
24400 return ira->codegen->invalid_instruction;
25351 return ira->codegen->invalid_inst_gen;
2440125352 } else {
2440225353 src_ptr_const = true;
2440325354 src_ptr_volatile = false;
2440425355
2440525356 if ((err = type_resolve(ira->codegen, target->value->type, ResolveStatusAlignmentKnown)))
24406 return ira->codegen->invalid_instruction;
25357 return ira->codegen->invalid_inst_gen;
2440725358
2440825359 src_ptr_align = get_abi_alignment(ira->codegen, target->value->type);
2440925360 }
2441025361
2441125362 if (src_ptr_align != 0) {
2441225363 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusAlignmentKnown)))
24413 return ira->codegen->invalid_instruction;
25364 return ira->codegen->invalid_inst_gen;
2441425365 }
2441525366
2441625367 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_child_type,
......@@ -24423,9 +25374,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2442325374 src_ptr_align, 0, 0, false);
2442425375 ZigType *u8_slice = get_slice_type(ira->codegen, u8_ptr);
2442525376
24426 IrInstruction *casted_value = ir_implicit_cast(ira, target, u8_slice);
25377 IrInstGen *casted_value = ir_implicit_cast(ira, target, u8_slice);
2442725378 if (type_is_invalid(casted_value->value->type))
24428 return ira->codegen->invalid_instruction;
25379 return ira->codegen->invalid_inst_gen;
2442925380
2443025381 bool have_known_len = false;
2443125382 uint64_t known_len;
......@@ -24433,7 +25384,7 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2443325384 if (instr_is_comptime(casted_value)) {
2443425385 ZigValue *val = ir_resolve_const(ira, casted_value, UndefBad);
2443525386 if (!val)
24436 return ira->codegen->invalid_instruction;
25387 return ira->codegen->invalid_inst_gen;
2443725388
2443825389 ZigValue *len_val = val->data.x_struct.fields[slice_len_index];
2443925390 if (value_is_comptime(len_val)) {
......@@ -24442,9 +25393,9 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2444225393 }
2444325394 }
2444425395
24445 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
25396 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2444625397 dest_slice_type, nullptr, true, true);
24447 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc))) {
25398 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable)) {
2444825399 return result_loc;
2444925400 }
2445025401
......@@ -24461,41 +25412,41 @@ static IrInstruction *ir_analyze_instruction_from_bytes(IrAnalyze *ira, IrInstru
2446125412
2446225413 if (have_known_len) {
2446325414 if ((err = type_resolve(ira->codegen, dest_child_type, ResolveStatusSizeKnown)))
24464 return ira->codegen->invalid_instruction;
25415 return ira->codegen->invalid_inst_gen;
2446525416 uint64_t child_type_size = type_size(ira->codegen, dest_child_type);
2446625417 uint64_t remainder = known_len % child_type_size;
2446725418 if (remainder != 0) {
24468 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
25419 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2446925420 buf_sprintf("unable to convert [%" ZIG_PRI_u64 "]u8 to %s: size mismatch",
2447025421 known_len, buf_ptr(&dest_slice_type->name)));
24471 add_error_note(ira->codegen, msg, instruction->dest_child_type->source_node,
25422 add_error_note(ira->codegen, msg, instruction->dest_child_type->base.source_node,
2447225423 buf_sprintf("%s has size %" ZIG_PRI_u64 "; remaining bytes: %" ZIG_PRI_u64,
2447325424 buf_ptr(&dest_child_type->name), child_type_size, remainder));
24474 return ira->codegen->invalid_instruction;
25425 return ira->codegen->invalid_inst_gen;
2447525426 }
2447625427 }
2447725428
24478 return ir_build_resize_slice(ira, &instruction->base, casted_value, dest_slice_type, result_loc);
25429 return ir_build_resize_slice(ira, &instruction->base.base, casted_value, dest_slice_type, result_loc);
2447925430}
2448025431
24481static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstructionToBytes *instruction) {
25432static IrInstGen *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstSrcToBytes *instruction) {
2448225433 Error err;
2448325434
24484 IrInstruction *target = instruction->target->child;
25435 IrInstGen *target = instruction->target->child;
2448525436 if (type_is_invalid(target->value->type))
24486 return ira->codegen->invalid_instruction;
25437 return ira->codegen->invalid_inst_gen;
2448725438
2448825439 if (!is_slice(target->value->type)) {
24489 ir_add_error(ira, instruction->target,
25440 ir_add_error(ira, &instruction->target->base,
2449025441 buf_sprintf("expected slice, found '%s'", buf_ptr(&target->value->type->name)));
24491 return ira->codegen->invalid_instruction;
25442 return ira->codegen->invalid_inst_gen;
2449225443 }
2449325444
2449425445 ZigType *src_ptr_type = target->value->type->data.structure.fields[slice_ptr_index]->type_entry;
2449525446
2449625447 uint32_t alignment;
2449725448 if ((err = resolve_ptr_align(ira, src_ptr_type, &alignment)))
24498 return ira->codegen->invalid_instruction;
25449 return ira->codegen->invalid_inst_gen;
2449925450
2450025451 ZigType *dest_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2450125452 src_ptr_type->data.pointer.is_const, src_ptr_type->data.pointer.is_volatile, PtrLenUnknown,
......@@ -24505,9 +25456,9 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
2450525456 if (instr_is_comptime(target)) {
2450625457 ZigValue *target_val = ir_resolve_const(ira, target, UndefBad);
2450725458 if (target_val == nullptr)
24508 return ira->codegen->invalid_instruction;
25459 return ira->codegen->invalid_inst_gen;
2450925460
24510 IrInstruction *result = ir_const(ira, &instruction->base, dest_slice_type);
25461 IrInstGen *result = ir_const(ira, &instruction->base.base, dest_slice_type);
2451125462 result->value->data.x_struct.fields = alloc_const_vals_ptrs(2);
2451225463
2451325464 ZigValue *ptr_val = result->value->data.x_struct.fields[slice_ptr_index];
......@@ -24527,13 +25478,13 @@ static IrInstruction *ir_analyze_instruction_to_bytes(IrAnalyze *ira, IrInstruct
2452725478 return result;
2452825479 }
2452925480
24530 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
25481 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2453125482 dest_slice_type, nullptr, true, true);
24532 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
25483 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2453325484 return result_loc;
2453425485 }
2453525486
24536 return ir_build_resize_slice(ira, &instruction->base, target, dest_slice_type, result_loc);
25487 return ir_build_resize_slice(ira, &instruction->base.base, target, dest_slice_type, result_loc);
2453725488}
2453825489
2453925490static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_align) {
......@@ -24550,26 +25501,26 @@ static Error resolve_ptr_align(IrAnalyze *ira, ZigType *ty, uint32_t *result_ali
2455025501 return ErrorNone;
2455125502}
2455225503
24553static IrInstruction *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstructionIntToFloat *instruction) {
25504static IrInstGen *ir_analyze_instruction_int_to_float(IrAnalyze *ira, IrInstSrcIntToFloat *instruction) {
2455425505 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2455525506 if (type_is_invalid(dest_type))
24556 return ira->codegen->invalid_instruction;
25507 return ira->codegen->invalid_inst_gen;
2455725508
24558 IrInstruction *target = instruction->target->child;
25509 IrInstGen *target = instruction->target->child;
2455925510 if (type_is_invalid(target->value->type))
24560 return ira->codegen->invalid_instruction;
25511 return ira->codegen->invalid_inst_gen;
2456125512
2456225513 if (target->value->type->id != ZigTypeIdInt && target->value->type->id != ZigTypeIdComptimeInt) {
24563 ir_add_error(ira, instruction->target, buf_sprintf("expected int type, found '%s'",
25514 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected int type, found '%s'",
2456425515 buf_ptr(&target->value->type->name)));
24565 return ira->codegen->invalid_instruction;
25516 return ira->codegen->invalid_inst_gen;
2456625517 }
2456725518
24568 return ir_resolve_cast(ira, &instruction->base, target, dest_type, CastOpIntToFloat);
25519 return ir_resolve_cast(ira, &instruction->base.base, target, dest_type, CastOpIntToFloat);
2456925520}
2457025521
24571static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *source_instr,
24572 ZigType *dest_type, IrInstruction *operand, AstNode *operand_source_node)
25522static IrInstGen *ir_analyze_float_to_int(IrAnalyze *ira, IrInst* source_instr,
25523 ZigType *dest_type, IrInstGen *operand, AstNode *operand_source_node)
2457325524{
2457425525 if (operand->value->type->id == ZigTypeIdComptimeInt) {
2457525526 return ir_implicit_cast(ira, operand, dest_type);
......@@ -24578,106 +25529,107 @@ static IrInstruction *ir_analyze_float_to_int(IrAnalyze *ira, IrInstruction *sou
2457825529 if (operand->value->type->id != ZigTypeIdFloat && operand->value->type->id != ZigTypeIdComptimeFloat) {
2457925530 ir_add_error_node(ira, operand_source_node, buf_sprintf("expected float type, found '%s'",
2458025531 buf_ptr(&operand->value->type->name)));
24581 return ira->codegen->invalid_instruction;
25532 return ira->codegen->invalid_inst_gen;
2458225533 }
2458325534
2458425535 return ir_resolve_cast(ira, source_instr, operand, dest_type, CastOpFloatToInt);
2458525536}
2458625537
24587static IrInstruction *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstructionFloatToInt *instruction) {
25538static IrInstGen *ir_analyze_instruction_float_to_int(IrAnalyze *ira, IrInstSrcFloatToInt *instruction) {
2458825539 ZigType *dest_type = ir_resolve_type(ira, instruction->dest_type->child);
2458925540 if (type_is_invalid(dest_type))
24590 return ira->codegen->invalid_instruction;
25541 return ira->codegen->invalid_inst_gen;
2459125542
24592 IrInstruction *operand = instruction->target->child;
25543 IrInstGen *operand = instruction->target->child;
2459325544 if (type_is_invalid(operand->value->type))
24594 return ira->codegen->invalid_instruction;
25545 return ira->codegen->invalid_inst_gen;
2459525546
24596 return ir_analyze_float_to_int(ira, &instruction->base, dest_type, operand, instruction->target->source_node);
25547 return ir_analyze_float_to_int(ira, &instruction->base.base, dest_type, operand,
25548 instruction->target->base.source_node);
2459725549}
2459825550
24599static IrInstruction *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstructionErrToInt *instruction) {
24600 IrInstruction *target = instruction->target->child;
25551static IrInstGen *ir_analyze_instruction_err_to_int(IrAnalyze *ira, IrInstSrcErrToInt *instruction) {
25552 IrInstGen *target = instruction->target->child;
2460125553 if (type_is_invalid(target->value->type))
24602 return ira->codegen->invalid_instruction;
25554 return ira->codegen->invalid_inst_gen;
2460325555
24604 IrInstruction *casted_target;
25556 IrInstGen *casted_target;
2460525557 if (target->value->type->id == ZigTypeIdErrorSet) {
2460625558 casted_target = target;
2460725559 } else {
2460825560 casted_target = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_global_error_set);
2460925561 if (type_is_invalid(casted_target->value->type))
24610 return ira->codegen->invalid_instruction;
25562 return ira->codegen->invalid_inst_gen;
2461125563 }
2461225564
24613 return ir_analyze_err_to_int(ira, &instruction->base, casted_target, ira->codegen->err_tag_type);
25565 return ir_analyze_err_to_int(ira, &instruction->base.base, casted_target, ira->codegen->err_tag_type);
2461425566}
2461525567
24616static IrInstruction *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstructionIntToErr *instruction) {
24617 IrInstruction *target = instruction->target->child;
25568static IrInstGen *ir_analyze_instruction_int_to_err(IrAnalyze *ira, IrInstSrcIntToErr *instruction) {
25569 IrInstGen *target = instruction->target->child;
2461825570 if (type_is_invalid(target->value->type))
24619 return ira->codegen->invalid_instruction;
25571 return ira->codegen->invalid_inst_gen;
2462025572
24621 IrInstruction *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
25573 IrInstGen *casted_target = ir_implicit_cast(ira, target, ira->codegen->err_tag_type);
2462225574 if (type_is_invalid(casted_target->value->type))
24623 return ira->codegen->invalid_instruction;
25575 return ira->codegen->invalid_inst_gen;
2462425576
24625 return ir_analyze_int_to_err(ira, &instruction->base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
25577 return ir_analyze_int_to_err(ira, &instruction->base.base, casted_target, ira->codegen->builtin_types.entry_global_error_set);
2462625578}
2462725579
24628static IrInstruction *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstructionBoolToInt *instruction) {
24629 IrInstruction *target = instruction->target->child;
25580static IrInstGen *ir_analyze_instruction_bool_to_int(IrAnalyze *ira, IrInstSrcBoolToInt *instruction) {
25581 IrInstGen *target = instruction->target->child;
2463025582 if (type_is_invalid(target->value->type))
24631 return ira->codegen->invalid_instruction;
25583 return ira->codegen->invalid_inst_gen;
2463225584
2463325585 if (target->value->type->id != ZigTypeIdBool) {
24634 ir_add_error(ira, instruction->target, buf_sprintf("expected bool, found '%s'",
25586 ir_add_error(ira, &instruction->target->base, buf_sprintf("expected bool, found '%s'",
2463525587 buf_ptr(&target->value->type->name)));
24636 return ira->codegen->invalid_instruction;
25588 return ira->codegen->invalid_inst_gen;
2463725589 }
2463825590
2463925591 if (instr_is_comptime(target)) {
2464025592 bool is_true;
2464125593 if (!ir_resolve_bool(ira, target, &is_true))
24642 return ira->codegen->invalid_instruction;
25594 return ira->codegen->invalid_inst_gen;
2464325595
24644 return ir_const_unsigned(ira, &instruction->base, is_true ? 1 : 0);
25596 return ir_const_unsigned(ira, &instruction->base.base, is_true ? 1 : 0);
2464525597 }
2464625598
2464725599 ZigType *u1_type = get_int_type(ira->codegen, false, 1);
24648 return ir_resolve_cast(ira, &instruction->base, target, u1_type, CastOpBoolToInt);
25600 return ir_resolve_cast(ira, &instruction->base.base, target, u1_type, CastOpBoolToInt);
2464925601}
2465025602
24651static IrInstruction *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstructionIntType *instruction) {
24652 IrInstruction *is_signed_value = instruction->is_signed->child;
25603static IrInstGen *ir_analyze_instruction_int_type(IrAnalyze *ira, IrInstSrcIntType *instruction) {
25604 IrInstGen *is_signed_value = instruction->is_signed->child;
2465325605 bool is_signed;
2465425606 if (!ir_resolve_bool(ira, is_signed_value, &is_signed))
24655 return ira->codegen->invalid_instruction;
25607 return ira->codegen->invalid_inst_gen;
2465625608
24657 IrInstruction *bit_count_value = instruction->bit_count->child;
25609 IrInstGen *bit_count_value = instruction->bit_count->child;
2465825610 uint64_t bit_count;
2465925611 if (!ir_resolve_unsigned(ira, bit_count_value, ira->codegen->builtin_types.entry_u16, &bit_count))
24660 return ira->codegen->invalid_instruction;
25612 return ira->codegen->invalid_inst_gen;
2466125613
24662 return ir_const_type(ira, &instruction->base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
25614 return ir_const_type(ira, &instruction->base.base, get_int_type(ira->codegen, is_signed, (uint32_t)bit_count));
2466325615}
2466425616
24665static IrInstruction *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstructionVectorType *instruction) {
25617static IrInstGen *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstSrcVectorType *instruction) {
2466625618 uint64_t len;
2466725619 if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
24668 return ira->codegen->invalid_instruction;
25620 return ira->codegen->invalid_inst_gen;
2466925621
2467025622 ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);
2467125623 if (type_is_invalid(elem_type))
24672 return ira->codegen->invalid_instruction;
25624 return ira->codegen->invalid_inst_gen;
2467325625
2467425626 ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);
2467525627
24676 return ir_const_type(ira, &instruction->base, vector_type);
25628 return ir_const_type(ira, &instruction->base.base, vector_type);
2467725629}
2467825630
24679static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *source_instr,
24680 ZigType *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
25631static IrInstGen *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInst* source_instr,
25632 ZigType *scalar_type, IrInstGen *a, IrInstGen *b, IrInstGen *mask)
2468125633{
2468225634 ir_assert(source_instr && scalar_type && a && b && mask, source_instr);
2468325635 ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);
......@@ -24688,15 +25640,15 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2468825640 } else if (mask->value->type->id == ZigTypeIdArray) {
2468925641 len_mask = mask->value->type->data.array.len;
2469025642 } else {
24691 ir_add_error(ira, mask,
25643 ir_add_error(ira, &mask->base,
2469225644 buf_sprintf("expected vector or array, found '%s'",
2469325645 buf_ptr(&mask->value->type->name)));
24694 return ira->codegen->invalid_instruction;
25646 return ira->codegen->invalid_inst_gen;
2469525647 }
2469625648 mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,
2469725649 ira->codegen->builtin_types.entry_i32));
2469825650 if (type_is_invalid(mask->value->type))
24699 return ira->codegen->invalid_instruction;
25651 return ira->codegen->invalid_inst_gen;
2470025652
2470125653 uint32_t len_a;
2470225654 if (a->value->type->id == ZigTypeIdVector) {
......@@ -24706,11 +25658,11 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2470625658 } else if (a->value->type->id == ZigTypeIdUndefined) {
2470725659 len_a = UINT32_MAX;
2470825660 } else {
24709 ir_add_error(ira, a,
25661 ir_add_error(ira, &a->base,
2471025662 buf_sprintf("expected vector or array with element type '%s', found '%s'",
2471125663 buf_ptr(&scalar_type->name),
2471225664 buf_ptr(&a->value->type->name)));
24713 return ira->codegen->invalid_instruction;
25665 return ira->codegen->invalid_inst_gen;
2471425666 }
2471525667
2471625668 uint32_t len_b;
......@@ -24721,38 +25673,38 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2472125673 } else if (b->value->type->id == ZigTypeIdUndefined) {
2472225674 len_b = UINT32_MAX;
2472325675 } else {
24724 ir_add_error(ira, b,
25676 ir_add_error(ira, &b->base,
2472525677 buf_sprintf("expected vector or array with element type '%s', found '%s'",
2472625678 buf_ptr(&scalar_type->name),
2472725679 buf_ptr(&b->value->type->name)));
24728 return ira->codegen->invalid_instruction;
25680 return ira->codegen->invalid_inst_gen;
2472925681 }
2473025682
2473125683 if (len_a == UINT32_MAX && len_b == UINT32_MAX) {
24732 return ir_const_undef(ira, a, get_vector_type(ira->codegen, len_mask, scalar_type));
25684 return ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_mask, scalar_type));
2473325685 }
2473425686
2473525687 if (len_a == UINT32_MAX) {
2473625688 len_a = len_b;
24737 a = ir_const_undef(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
25689 a = ir_const_undef(ira, &a->base, get_vector_type(ira->codegen, len_a, scalar_type));
2473825690 } else {
2473925691 a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
2474025692 if (type_is_invalid(a->value->type))
24741 return ira->codegen->invalid_instruction;
25693 return ira->codegen->invalid_inst_gen;
2474225694 }
2474325695
2474425696 if (len_b == UINT32_MAX) {
2474525697 len_b = len_a;
24746 b = ir_const_undef(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
25698 b = ir_const_undef(ira, &b->base, get_vector_type(ira->codegen, len_b, scalar_type));
2474725699 } else {
2474825700 b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
2474925701 if (type_is_invalid(b->value->type))
24750 return ira->codegen->invalid_instruction;
25702 return ira->codegen->invalid_inst_gen;
2475125703 }
2475225704
2475325705 ZigValue *mask_val = ir_resolve_const(ira, mask, UndefOk);
2475425706 if (mask_val == nullptr)
24755 return ira->codegen->invalid_instruction;
25707 return ira->codegen->invalid_inst_gen;
2475625708
2475725709 expand_undef_array(ira->codegen, mask_val);
2475825710
......@@ -24762,7 +25714,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2476225714 continue;
2476325715 int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);
2476425716 uint32_t v;
24765 IrInstruction *chosen_operand;
25717 IrInstGen *chosen_operand;
2476625718 if (v_i32 >= 0) {
2476725719 v = (uint32_t)v_i32;
2476825720 chosen_operand = a;
......@@ -24771,16 +25723,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2477125723 chosen_operand = b;
2477225724 }
2477325725 if (v >= chosen_operand->value->type->data.vector.len) {
24774 ErrorMsg *msg = ir_add_error(ira, mask,
25726 ErrorMsg *msg = ir_add_error(ira, &mask->base,
2477525727 buf_sprintf("mask index '%u' has out-of-bounds selection", i));
24776 add_error_note(ira->codegen, msg, chosen_operand->source_node,
25728 add_error_note(ira->codegen, msg, chosen_operand->base.source_node,
2477725729 buf_sprintf("selected index '%u' out of bounds of %s", v,
2477825730 buf_ptr(&chosen_operand->value->type->name)));
2477925731 if (chosen_operand == a && v < len_a + len_b) {
24780 add_error_note(ira->codegen, msg, b->source_node,
25732 add_error_note(ira->codegen, msg, b->base.source_node,
2478125733 buf_create_from_str("selections from the second vector are specified with negative numbers"));
2478225734 }
24783 return ira->codegen->invalid_instruction;
25735 return ira->codegen->invalid_inst_gen;
2478425736 }
2478525737 }
2478625738
......@@ -24788,16 +25740,16 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2478825740 if (instr_is_comptime(a) && instr_is_comptime(b)) {
2478925741 ZigValue *a_val = ir_resolve_const(ira, a, UndefOk);
2479025742 if (a_val == nullptr)
24791 return ira->codegen->invalid_instruction;
25743 return ira->codegen->invalid_inst_gen;
2479225744
2479325745 ZigValue *b_val = ir_resolve_const(ira, b, UndefOk);
2479425746 if (b_val == nullptr)
24795 return ira->codegen->invalid_instruction;
25747 return ira->codegen->invalid_inst_gen;
2479625748
2479725749 expand_undef_array(ira->codegen, a_val);
2479825750 expand_undef_array(ira->codegen, b_val);
2479925751
24800 IrInstruction *result = ir_const(ira, source_instr, result_type);
25752 IrInstGen *result = ir_const(ira, source_instr, result_type);
2480125753 result->value->data.x_array.data.s_none.elements = create_const_vals(len_mask);
2480225754 for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {
2480325755 ZigValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
......@@ -24829,7 +25781,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2482925781 uint32_t len_min = min(len_a, len_b);
2483025782 uint32_t len_max = max(len_a, len_b);
2483125783
24832 IrInstruction *expand_mask = ir_const(ira, mask,
25784 IrInstGen *expand_mask = ir_const(ira, &mask->base,
2483325785 get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));
2483425786 expand_mask->value->data.x_array.data.s_none.elements = create_const_vals(len_max);
2483525787 uint32_t i = 0;
......@@ -24838,7 +25790,7 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2483825790 for (; i < len_max; i += 1)
2483925791 bigint_init_signed(&expand_mask->value->data.x_array.data.s_none.elements[i].data.x_bigint, -1);
2484025792
24841 IrInstruction *undef = ir_const_undef(ira, source_instr,
25793 IrInstGen *undef = ir_const_undef(ira, source_instr,
2484225794 get_vector_type(ira->codegen, len_min, scalar_type));
2484325795
2484425796 if (len_b < len_a) {
......@@ -24848,62 +25800,59 @@ static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *s
2484825800 }
2484925801 }
2485025802
24851 IrInstruction *result = ir_build_shuffle_vector(&ira->new_irb,
24852 source_instr->scope, source_instr->source_node,
24853 nullptr, a, b, mask);
24854 result->value->type = result_type;
24855 return result;
25803 return ir_build_shuffle_vector_gen(ira, source_instr->scope, source_instr->source_node,
25804 result_type, a, b, mask);
2485625805}
2485725806
24858static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstructionShuffleVector *instruction) {
24859 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type);
25807static IrInstGen *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstSrcShuffleVector *instruction) {
25808 ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type->child);
2486025809 if (type_is_invalid(scalar_type))
24861 return ira->codegen->invalid_instruction;
25810 return ira->codegen->invalid_inst_gen;
2486225811
24863 IrInstruction *a = instruction->a->child;
25812 IrInstGen *a = instruction->a->child;
2486425813 if (type_is_invalid(a->value->type))
24865 return ira->codegen->invalid_instruction;
25814 return ira->codegen->invalid_inst_gen;
2486625815
24867 IrInstruction *b = instruction->b->child;
25816 IrInstGen *b = instruction->b->child;
2486825817 if (type_is_invalid(b->value->type))
24869 return ira->codegen->invalid_instruction;
25818 return ira->codegen->invalid_inst_gen;
2487025819
24871 IrInstruction *mask = instruction->mask->child;
25820 IrInstGen *mask = instruction->mask->child;
2487225821 if (type_is_invalid(mask->value->type))
24873 return ira->codegen->invalid_instruction;
25822 return ira->codegen->invalid_inst_gen;
2487425823
24875 return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);
25824 return ir_analyze_shuffle_vector(ira, &instruction->base.base, scalar_type, a, b, mask);
2487625825}
2487725826
24878static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {
25827static IrInstGen *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstSrcSplat *instruction) {
2487925828 Error err;
2488025829
24881 IrInstruction *len = instruction->len->child;
25830 IrInstGen *len = instruction->len->child;
2488225831 if (type_is_invalid(len->value->type))
24883 return ira->codegen->invalid_instruction;
25832 return ira->codegen->invalid_inst_gen;
2488425833
24885 IrInstruction *scalar = instruction->scalar->child;
25834 IrInstGen *scalar = instruction->scalar->child;
2488625835 if (type_is_invalid(scalar->value->type))
24887 return ira->codegen->invalid_instruction;
25836 return ira->codegen->invalid_inst_gen;
2488825837
2488925838 uint64_t len_u64;
2489025839 if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
24891 return ira->codegen->invalid_instruction;
25840 return ira->codegen->invalid_inst_gen;
2489225841 uint32_t len_int = len_u64;
2489325842
24894 if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value->type)))
24895 return ira->codegen->invalid_instruction;
25843 if ((err = ir_validate_vector_elem_type(ira, scalar->base.source_node, scalar->value->type)))
25844 return ira->codegen->invalid_inst_gen;
2489625845
2489725846 ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value->type);
2489825847
2489925848 if (instr_is_comptime(scalar)) {
2490025849 ZigValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
2490125850 if (scalar_val == nullptr)
24902 return ira->codegen->invalid_instruction;
25851 return ira->codegen->invalid_inst_gen;
2490325852 if (scalar_val->special == ConstValSpecialUndef)
24904 return ir_const_undef(ira, &instruction->base, return_type);
25853 return ir_const_undef(ira, &instruction->base.base, return_type);
2490525854
24906 IrInstruction *result = ir_const(ira, &instruction->base, return_type);
25855 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
2490725856 result->value->data.x_array.data.s_none.elements = create_const_vals(len_int);
2490825857 for (uint32_t i = 0; i < len_int; i += 1) {
2490925858 copy_const_val(&result->value->data.x_array.data.s_none.elements[i], scalar_val);
......@@ -24911,48 +25860,45 @@ static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstruction
2491125860 return result;
2491225861 }
2491325862
24914 return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);
25863 return ir_build_splat_gen(ira, &instruction->base.base, return_type, scalar);
2491525864}
2491625865
24917static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {
24918 IrInstruction *value = instruction->value->child;
25866static IrInstGen *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstSrcBoolNot *instruction) {
25867 IrInstGen *value = instruction->value->child;
2491925868 if (type_is_invalid(value->value->type))
24920 return ira->codegen->invalid_instruction;
25869 return ira->codegen->invalid_inst_gen;
2492125870
2492225871 ZigType *bool_type = ira->codegen->builtin_types.entry_bool;
2492325872
24924 IrInstruction *casted_value = ir_implicit_cast(ira, value, bool_type);
25873 IrInstGen *casted_value = ir_implicit_cast(ira, value, bool_type);
2492525874 if (type_is_invalid(casted_value->value->type))
24926 return ira->codegen->invalid_instruction;
25875 return ira->codegen->invalid_inst_gen;
2492725876
2492825877 if (instr_is_comptime(casted_value)) {
2492925878 ZigValue *value = ir_resolve_const(ira, casted_value, UndefBad);
2493025879 if (value == nullptr)
24931 return ira->codegen->invalid_instruction;
25880 return ira->codegen->invalid_inst_gen;
2493225881
24933 return ir_const_bool(ira, &instruction->base, !value->data.x_bool);
25882 return ir_const_bool(ira, &instruction->base.base, !value->data.x_bool);
2493425883 }
2493525884
24936 IrInstruction *result = ir_build_bool_not(&ira->new_irb, instruction->base.scope,
24937 instruction->base.source_node, casted_value);
24938 result->value->type = bool_type;
24939 return result;
25885 return ir_build_bool_not_gen(ira, &instruction->base.base, casted_value);
2494025886}
2494125887
24942static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructionMemset *instruction) {
25888static IrInstGen *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstSrcMemset *instruction) {
2494325889 Error err;
2494425890
24945 IrInstruction *dest_ptr = instruction->dest_ptr->child;
25891 IrInstGen *dest_ptr = instruction->dest_ptr->child;
2494625892 if (type_is_invalid(dest_ptr->value->type))
24947 return ira->codegen->invalid_instruction;
25893 return ira->codegen->invalid_inst_gen;
2494825894
24949 IrInstruction *byte_value = instruction->byte->child;
25895 IrInstGen *byte_value = instruction->byte->child;
2495025896 if (type_is_invalid(byte_value->value->type))
24951 return ira->codegen->invalid_instruction;
25897 return ira->codegen->invalid_inst_gen;
2495225898
24953 IrInstruction *count_value = instruction->count->child;
25899 IrInstGen *count_value = instruction->count->child;
2495425900 if (type_is_invalid(count_value->value->type))
24955 return ira->codegen->invalid_instruction;
25901 return ira->codegen->invalid_inst_gen;
2495625902
2495725903 ZigType *dest_uncasted_type = dest_ptr->value->type;
2495825904 bool dest_is_volatile = (dest_uncasted_type->id == ZigTypeIdPointer) &&
......@@ -24963,24 +25909,24 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2496325909 uint32_t dest_align;
2496425910 if (dest_uncasted_type->id == ZigTypeIdPointer) {
2496525911 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
24966 return ira->codegen->invalid_instruction;
25912 return ira->codegen->invalid_inst_gen;
2496725913 } else {
2496825914 dest_align = get_abi_alignment(ira->codegen, u8);
2496925915 }
2497025916 ZigType *u8_ptr = get_pointer_to_type_extra(ira->codegen, u8, false, dest_is_volatile,
2497125917 PtrLenUnknown, dest_align, 0, 0, false);
2497225918
24973 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
25919 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr);
2497425920 if (type_is_invalid(casted_dest_ptr->value->type))
24975 return ira->codegen->invalid_instruction;
25921 return ira->codegen->invalid_inst_gen;
2497625922
24977 IrInstruction *casted_byte = ir_implicit_cast(ira, byte_value, u8);
25923 IrInstGen *casted_byte = ir_implicit_cast(ira, byte_value, u8);
2497825924 if (type_is_invalid(casted_byte->value->type))
24979 return ira->codegen->invalid_instruction;
25925 return ira->codegen->invalid_inst_gen;
2498025926
24981 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
25927 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
2498225928 if (type_is_invalid(casted_count->value->type))
24983 return ira->codegen->invalid_instruction;
25929 return ira->codegen->invalid_inst_gen;
2498425930
2498525931 // TODO test this at comptime with u8 and non-u8 types
2498625932 if (instr_is_comptime(casted_dest_ptr) &&
......@@ -24989,15 +25935,15 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2498925935 {
2499025936 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
2499125937 if (dest_ptr_val == nullptr)
24992 return ira->codegen->invalid_instruction;
25938 return ira->codegen->invalid_inst_gen;
2499325939
2499425940 ZigValue *byte_val = ir_resolve_const(ira, casted_byte, UndefOk);
2499525941 if (byte_val == nullptr)
24996 return ira->codegen->invalid_instruction;
25942 return ira->codegen->invalid_inst_gen;
2499725943
2499825944 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
2499925945 if (count_val == nullptr)
25000 return ira->codegen->invalid_instruction;
25946 return ira->codegen->invalid_inst_gen;
2500125947
2500225948 if (casted_dest_ptr->value->data.x_ptr.special != ConstPtrSpecialHardCodedAddr &&
2500325949 casted_dest_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar)
......@@ -25042,38 +25988,35 @@ static IrInstruction *ir_analyze_instruction_memset(IrAnalyze *ira, IrInstructio
2504225988 size_t count = bigint_as_usize(&count_val->data.x_bigint);
2504325989 size_t end = start + count;
2504425990 if (end > bound_end) {
25045 ir_add_error(ira, count_value, buf_sprintf("out of bounds pointer access"));
25046 return ira->codegen->invalid_instruction;
25991 ir_add_error(ira, &count_value->base, buf_sprintf("out of bounds pointer access"));
25992 return ira->codegen->invalid_inst_gen;
2504725993 }
2504825994
2504925995 for (size_t i = start; i < end; i += 1) {
2505025996 copy_const_val(&dest_elements[i], byte_val);
2505125997 }
2505225998
25053 return ir_const_void(ira, &instruction->base);
25999 return ir_const_void(ira, &instruction->base.base);
2505426000 }
2505526001 }
2505626002
25057 IrInstruction *result = ir_build_memset(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
25058 casted_dest_ptr, casted_byte, casted_count);
25059 result->value->type = ira->codegen->builtin_types.entry_void;
25060 return result;
26003 return ir_build_memset_gen(ira, &instruction->base.base, casted_dest_ptr, casted_byte, casted_count);
2506126004}
2506226005
25063static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructionMemcpy *instruction) {
26006static IrInstGen *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstSrcMemcpy *instruction) {
2506426007 Error err;
2506526008
25066 IrInstruction *dest_ptr = instruction->dest_ptr->child;
26009 IrInstGen *dest_ptr = instruction->dest_ptr->child;
2506726010 if (type_is_invalid(dest_ptr->value->type))
25068 return ira->codegen->invalid_instruction;
26011 return ira->codegen->invalid_inst_gen;
2506926012
25070 IrInstruction *src_ptr = instruction->src_ptr->child;
26013 IrInstGen *src_ptr = instruction->src_ptr->child;
2507126014 if (type_is_invalid(src_ptr->value->type))
25072 return ira->codegen->invalid_instruction;
26015 return ira->codegen->invalid_inst_gen;
2507326016
25074 IrInstruction *count_value = instruction->count->child;
26017 IrInstGen *count_value = instruction->count->child;
2507526018 if (type_is_invalid(count_value->value->type))
25076 return ira->codegen->invalid_instruction;
26019 return ira->codegen->invalid_inst_gen;
2507726020
2507826021 ZigType *u8 = ira->codegen->builtin_types.entry_u8;
2507926022 ZigType *dest_uncasted_type = dest_ptr->value->type;
......@@ -25086,7 +26029,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2508626029 uint32_t dest_align;
2508726030 if (dest_uncasted_type->id == ZigTypeIdPointer) {
2508826031 if ((err = resolve_ptr_align(ira, dest_uncasted_type, &dest_align)))
25089 return ira->codegen->invalid_instruction;
26032 return ira->codegen->invalid_inst_gen;
2509026033 } else {
2509126034 dest_align = get_abi_alignment(ira->codegen, u8);
2509226035 }
......@@ -25094,7 +26037,7 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2509426037 uint32_t src_align;
2509526038 if (src_uncasted_type->id == ZigTypeIdPointer) {
2509626039 if ((err = resolve_ptr_align(ira, src_uncasted_type, &src_align)))
25097 return ira->codegen->invalid_instruction;
26040 return ira->codegen->invalid_inst_gen;
2509826041 } else {
2509926042 src_align = get_abi_alignment(ira->codegen, u8);
2510026043 }
......@@ -25105,17 +26048,17 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2510526048 ZigType *u8_ptr_const = get_pointer_to_type_extra(ira->codegen, u8, true, src_is_volatile,
2510626049 PtrLenUnknown, src_align, 0, 0, false);
2510726050
25108 IrInstruction *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
26051 IrInstGen *casted_dest_ptr = ir_implicit_cast(ira, dest_ptr, u8_ptr_mut);
2510926052 if (type_is_invalid(casted_dest_ptr->value->type))
25110 return ira->codegen->invalid_instruction;
26053 return ira->codegen->invalid_inst_gen;
2511126054
25112 IrInstruction *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
26055 IrInstGen *casted_src_ptr = ir_implicit_cast(ira, src_ptr, u8_ptr_const);
2511326056 if (type_is_invalid(casted_src_ptr->value->type))
25114 return ira->codegen->invalid_instruction;
26057 return ira->codegen->invalid_inst_gen;
2511526058
25116 IrInstruction *casted_count = ir_implicit_cast(ira, count_value, usize);
26059 IrInstGen *casted_count = ir_implicit_cast(ira, count_value, usize);
2511726060 if (type_is_invalid(casted_count->value->type))
25118 return ira->codegen->invalid_instruction;
26061 return ira->codegen->invalid_inst_gen;
2511926062
2512026063 // TODO test this at comptime with u8 and non-u8 types
2512126064 // TODO test with dest ptr being a global runtime variable
......@@ -25125,15 +26068,15 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2512526068 {
2512626069 ZigValue *dest_ptr_val = ir_resolve_const(ira, casted_dest_ptr, UndefBad);
2512726070 if (dest_ptr_val == nullptr)
25128 return ira->codegen->invalid_instruction;
26071 return ira->codegen->invalid_inst_gen;
2512926072
2513026073 ZigValue *src_ptr_val = ir_resolve_const(ira, casted_src_ptr, UndefBad);
2513126074 if (src_ptr_val == nullptr)
25132 return ira->codegen->invalid_instruction;
26075 return ira->codegen->invalid_inst_gen;
2513326076
2513426077 ZigValue *count_val = ir_resolve_const(ira, casted_count, UndefBad);
2513526078 if (count_val == nullptr)
25136 return ira->codegen->invalid_instruction;
26079 return ira->codegen->invalid_inst_gen;
2513726080
2513826081 if (dest_ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr) {
2513926082 size_t count = bigint_as_usize(&count_val->data.x_bigint);
......@@ -25176,8 +26119,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2517626119 }
2517726120
2517826121 if (dest_start + count > dest_end) {
25179 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
25180 return ira->codegen->invalid_instruction;
26122 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
26123 return ira->codegen->invalid_inst_gen;
2518126124 }
2518226125
2518326126 ZigValue *src_elements;
......@@ -25219,8 +26162,8 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2521926162 }
2522026163
2522126164 if (src_start + count > src_end) {
25222 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds pointer access"));
25223 return ira->codegen->invalid_instruction;
26165 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds pointer access"));
26166 return ira->codegen->invalid_inst_gen;
2522426167 }
2522526168
2522626169 // TODO check for noalias violations - this should be generalized to work for any function
......@@ -25229,42 +26172,39 @@ static IrInstruction *ir_analyze_instruction_memcpy(IrAnalyze *ira, IrInstructio
2522926172 copy_const_val(&dest_elements[dest_start + i], &src_elements[src_start + i]);
2523026173 }
2523126174
25232 return ir_const_void(ira, &instruction->base);
26175 return ir_const_void(ira, &instruction->base.base);
2523326176 }
2523426177 }
2523526178
25236 IrInstruction *result = ir_build_memcpy(&ira->new_irb, instruction->base.scope, instruction->base.source_node,
25237 casted_dest_ptr, casted_src_ptr, casted_count);
25238 result->value->type = ira->codegen->builtin_types.entry_void;
25239 return result;
26179 return ir_build_memcpy_gen(ira, &instruction->base.base, casted_dest_ptr, casted_src_ptr, casted_count);
2524026180}
2524126181
25242static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstructionSliceSrc *instruction) {
25243 IrInstruction *ptr_ptr = instruction->ptr->child;
26182static IrInstGen *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstSrcSlice *instruction) {
26183 IrInstGen *ptr_ptr = instruction->ptr->child;
2524426184 if (type_is_invalid(ptr_ptr->value->type))
25245 return ira->codegen->invalid_instruction;
26185 return ira->codegen->invalid_inst_gen;
2524626186
2524726187 ZigType *ptr_ptr_type = ptr_ptr->value->type;
2524826188 assert(ptr_ptr_type->id == ZigTypeIdPointer);
2524926189 ZigType *array_type = ptr_ptr_type->data.pointer.child_type;
2525026190
25251 IrInstruction *start = instruction->start->child;
26191 IrInstGen *start = instruction->start->child;
2525226192 if (type_is_invalid(start->value->type))
25253 return ira->codegen->invalid_instruction;
26193 return ira->codegen->invalid_inst_gen;
2525426194
2525526195 ZigType *usize = ira->codegen->builtin_types.entry_usize;
25256 IrInstruction *casted_start = ir_implicit_cast(ira, start, usize);
26196 IrInstGen *casted_start = ir_implicit_cast(ira, start, usize);
2525726197 if (type_is_invalid(casted_start->value->type))
25258 return ira->codegen->invalid_instruction;
26198 return ira->codegen->invalid_inst_gen;
2525926199
25260 IrInstruction *end;
26200 IrInstGen *end;
2526126201 if (instruction->end) {
2526226202 end = instruction->end->child;
2526326203 if (type_is_invalid(end->value->type))
25264 return ira->codegen->invalid_instruction;
26204 return ira->codegen->invalid_inst_gen;
2526526205 end = ir_implicit_cast(ira, end, usize);
2526626206 if (type_is_invalid(end->value->type))
25267 return ira->codegen->invalid_instruction;
26207 return ira->codegen->invalid_inst_gen;
2526826208 } else {
2526926209 end = nullptr;
2527026210 }
......@@ -25292,8 +26232,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2529226232 PtrLenUnknown,
2529326233 array_type->data.pointer.explicit_alignment, 0, 0, false);
2529426234 } else {
25295 ir_add_error(ira, &instruction->base, buf_sprintf("slice of single-item pointer"));
25296 return ira->codegen->invalid_instruction;
26235 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of single-item pointer"));
26236 return ira->codegen->invalid_inst_gen;
2529726237 }
2529826238 } else {
2529926239 elem_type = array_type->data.pointer.child_type;
......@@ -25303,8 +26243,8 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2530326243 ZigType *maybe_sentineled_slice_ptr_type = array_type;
2530426244 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
2530526245 if (!end) {
25306 ir_add_error(ira, &instruction->base, buf_sprintf("slice of pointer must include end value"));
25307 return ira->codegen->invalid_instruction;
26246 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of pointer must include end value"));
26247 return ira->codegen->invalid_inst_gen;
2530826248 }
2530926249 }
2531026250 } else if (is_slice(array_type)) {
......@@ -25312,23 +26252,23 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2531226252 non_sentinel_slice_ptr_type = adjust_ptr_sentinel(ira->codegen, maybe_sentineled_slice_ptr_type, nullptr);
2531326253 elem_type = non_sentinel_slice_ptr_type->data.pointer.child_type;
2531426254 } else {
25315 ir_add_error(ira, &instruction->base,
26255 ir_add_error(ira, &instruction->base.base,
2531626256 buf_sprintf("slice of non-array type '%s'", buf_ptr(&array_type->name)));
25317 return ira->codegen->invalid_instruction;
26257 return ira->codegen->invalid_inst_gen;
2531826258 }
2531926259
2532026260 ZigType *return_type;
2532126261 ZigValue *sentinel_val = nullptr;
2532226262 if (instruction->sentinel) {
25323 IrInstruction *uncasted_sentinel = instruction->sentinel->child;
26263 IrInstGen *uncasted_sentinel = instruction->sentinel->child;
2532426264 if (type_is_invalid(uncasted_sentinel->value->type))
25325 return ira->codegen->invalid_instruction;
25326 IrInstruction *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
26265 return ira->codegen->invalid_inst_gen;
26266 IrInstGen *sentinel = ir_implicit_cast(ira, uncasted_sentinel, elem_type);
2532726267 if (type_is_invalid(sentinel->value->type))
25328 return ira->codegen->invalid_instruction;
26268 return ira->codegen->invalid_inst_gen;
2532926269 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
2533026270 if (sentinel_val == nullptr)
25331 return ira->codegen->invalid_instruction;
26271 return ira->codegen->invalid_inst_gen;
2533226272 ZigType *slice_ptr_type = adjust_ptr_sentinel(ira->codegen, non_sentinel_slice_ptr_type, sentinel_val);
2533326273 return_type = get_slice_type(ira->codegen, slice_ptr_type);
2533426274 } else {
......@@ -25350,9 +26290,9 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2535026290 if (array_type->id == ZigTypeIdPointer) {
2535126291 ZigType *child_array_type = array_type->data.pointer.child_type;
2535226292 assert(child_array_type->id == ZigTypeIdArray);
25353 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26293 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2535426294 if (parent_ptr == nullptr)
25355 return ira->codegen->invalid_instruction;
26295 return ira->codegen->invalid_inst_gen;
2535626296
2535726297
2535826298 if (parent_ptr->special == ConstValSpecialUndef) {
......@@ -25361,26 +26301,26 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2536126301 rel_end = SIZE_MAX;
2536226302 ptr_is_undef = true;
2536326303 } else {
25364 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.source_node);
26304 array_val = const_ptr_pointee(ira, ira->codegen, parent_ptr, instruction->base.base.source_node);
2536526305 if (array_val == nullptr)
25366 return ira->codegen->invalid_instruction;
26306 return ira->codegen->invalid_inst_gen;
2536726307
2536826308 rel_end = child_array_type->data.array.len;
2536926309 abs_offset = 0;
2537026310 }
2537126311 } else {
25372 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26312 array_val = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2537326313 if (array_val == nullptr)
25374 return ira->codegen->invalid_instruction;
26314 return ira->codegen->invalid_inst_gen;
2537526315 rel_end = array_type->data.array.len;
2537626316 parent_ptr = nullptr;
2537726317 abs_offset = 0;
2537826318 }
2537926319 } else if (array_type->id == ZigTypeIdPointer) {
2538026320 assert(array_type->data.pointer.ptr_len == PtrLenUnknown);
25381 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26321 parent_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2538226322 if (parent_ptr == nullptr)
25383 return ira->codegen->invalid_instruction;
26323 return ira->codegen->invalid_inst_gen;
2538426324
2538526325 if (parent_ptr->special == ConstValSpecialUndef) {
2538626326 array_val = nullptr;
......@@ -25426,19 +26366,19 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2542626366 zig_panic("TODO slice of null ptr");
2542726367 }
2542826368 } else if (is_slice(array_type)) {
25429 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.source_node);
26369 ZigValue *slice_ptr = const_ptr_pointee(ira, ira->codegen, ptr_ptr->value, instruction->base.base.source_node);
2543026370 if (slice_ptr == nullptr)
25431 return ira->codegen->invalid_instruction;
26371 return ira->codegen->invalid_inst_gen;
2543226372
2543326373 if (slice_ptr->special == ConstValSpecialUndef) {
25434 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
25435 return ira->codegen->invalid_instruction;
26374 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
26375 return ira->codegen->invalid_inst_gen;
2543626376 }
2543726377
2543826378 parent_ptr = slice_ptr->data.x_struct.fields[slice_ptr_index];
2543926379 if (parent_ptr->special == ConstValSpecialUndef) {
25440 ir_add_error(ira, &instruction->base, buf_sprintf("slice of undefined"));
25441 return ira->codegen->invalid_instruction;
26380 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice of undefined"));
26381 return ira->codegen->invalid_inst_gen;
2544226382 }
2544326383
2544426384 ZigValue *len_val = slice_ptr->data.x_struct.fields[slice_len_index];
......@@ -25481,37 +26421,37 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2548126421
2548226422 ZigValue *start_val = ir_resolve_const(ira, casted_start, UndefBad);
2548326423 if (!start_val)
25484 return ira->codegen->invalid_instruction;
26424 return ira->codegen->invalid_inst_gen;
2548526425
2548626426 uint64_t start_scalar = bigint_as_u64(&start_val->data.x_bigint);
2548726427 if (!ptr_is_undef && start_scalar > rel_end) {
25488 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
25489 return ira->codegen->invalid_instruction;
26428 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
26429 return ira->codegen->invalid_inst_gen;
2549026430 }
2549126431
2549226432 uint64_t end_scalar = rel_end;
2549326433 if (end) {
2549426434 ZigValue *end_val = ir_resolve_const(ira, end, UndefBad);
2549526435 if (!end_val)
25496 return ira->codegen->invalid_instruction;
26436 return ira->codegen->invalid_inst_gen;
2549726437 end_scalar = bigint_as_u64(&end_val->data.x_bigint);
2549826438 }
2549926439 if (!ptr_is_undef) {
2550026440 if (end_scalar > rel_end) {
25501 ir_add_error(ira, &instruction->base, buf_sprintf("out of bounds slice"));
25502 return ira->codegen->invalid_instruction;
26441 ir_add_error(ira, &instruction->base.base, buf_sprintf("out of bounds slice"));
26442 return ira->codegen->invalid_inst_gen;
2550326443 }
2550426444 if (start_scalar > end_scalar) {
25505 ir_add_error(ira, &instruction->base, buf_sprintf("slice start is greater than end"));
25506 return ira->codegen->invalid_instruction;
26445 ir_add_error(ira, &instruction->base.base, buf_sprintf("slice start is greater than end"));
26446 return ira->codegen->invalid_inst_gen;
2550726447 }
2550826448 }
2550926449 if (ptr_is_undef && start_scalar != end_scalar) {
25510 ir_add_error(ira, &instruction->base, buf_sprintf("non-zero length slice of undefined pointer"));
25511 return ira->codegen->invalid_instruction;
26450 ir_add_error(ira, &instruction->base.base, buf_sprintf("non-zero length slice of undefined pointer"));
26451 return ira->codegen->invalid_inst_gen;
2551226452 }
2551326453
25514 IrInstruction *result = ir_const(ira, &instruction->base, return_type);
26454 IrInstGen *result = ir_const(ira, &instruction->base.base, return_type);
2551526455 ZigValue *out_val = result->value;
2551626456 out_val->data.x_struct.fields = alloc_const_vals_ptrs(2);
2551726457
......@@ -25568,28 +26508,28 @@ static IrInstruction *ir_analyze_instruction_slice(IrAnalyze *ira, IrInstruction
2556826508 return result;
2556926509 }
2557026510
25571 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
26511 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2557226512 return_type, nullptr, true, true);
25573 if (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)) {
26513 if (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable) {
2557426514 return result_loc;
2557526515 }
25576 return ir_build_slice_gen(ira, &instruction->base, return_type,
26516 return ir_build_slice_gen(ira, &instruction->base.base, return_type,
2557726517 ptr_ptr, casted_start, end, instruction->safety_check_on, result_loc);
2557826518}
2557926519
25580static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstructionMemberCount *instruction) {
26520static IrInstGen *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInstSrcMemberCount *instruction) {
2558126521 Error err;
25582 IrInstruction *container = instruction->container->child;
26522 IrInstGen *container = instruction->container->child;
2558326523 if (type_is_invalid(container->value->type))
25584 return ira->codegen->invalid_instruction;
26524 return ira->codegen->invalid_inst_gen;
2558526525 ZigType *container_type = ir_resolve_type(ira, container);
2558626526
2558726527 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25588 return ira->codegen->invalid_instruction;
26528 return ira->codegen->invalid_inst_gen;
2558926529
2559026530 uint64_t result;
2559126531 if (type_is_invalid(container_type)) {
25592 return ira->codegen->invalid_instruction;
26532 return ira->codegen->invalid_inst_gen;
2559326533 } else if (container_type->id == ZigTypeIdEnum) {
2559426534 result = container_type->data.enumeration.src_field_count;
2559526535 } else if (container_type->id == ZigTypeIdStruct) {
......@@ -25597,135 +26537,135 @@ static IrInstruction *ir_analyze_instruction_member_count(IrAnalyze *ira, IrInst
2559726537 } else if (container_type->id == ZigTypeIdUnion) {
2559826538 result = container_type->data.unionation.src_field_count;
2559926539 } else if (container_type->id == ZigTypeIdErrorSet) {
25600 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.source_node)) {
25601 return ira->codegen->invalid_instruction;
26540 if (!resolve_inferred_error_set(ira->codegen, container_type, instruction->base.base.source_node)) {
26541 return ira->codegen->invalid_inst_gen;
2560226542 }
2560326543 if (type_is_global_error_set(container_type)) {
25604 ir_add_error(ira, &instruction->base, buf_sprintf("global error set member count not available at comptime"));
25605 return ira->codegen->invalid_instruction;
26544 ir_add_error(ira, &instruction->base.base, buf_sprintf("global error set member count not available at comptime"));
26545 return ira->codegen->invalid_inst_gen;
2560626546 }
2560726547 result = container_type->data.error_set.err_count;
2560826548 } else {
25609 ir_add_error(ira, &instruction->base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
25610 return ira->codegen->invalid_instruction;
26549 ir_add_error(ira, &instruction->base.base, buf_sprintf("no value count available for type '%s'", buf_ptr(&container_type->name)));
26550 return ira->codegen->invalid_inst_gen;
2561126551 }
2561226552
25613 return ir_const_unsigned(ira, &instruction->base, result);
26553 return ir_const_unsigned(ira, &instruction->base.base, result);
2561426554}
2561526555
25616static IrInstruction *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstructionMemberType *instruction) {
26556static IrInstGen *ir_analyze_instruction_member_type(IrAnalyze *ira, IrInstSrcMemberType *instruction) {
2561726557 Error err;
25618 IrInstruction *container_type_value = instruction->container_type->child;
26558 IrInstGen *container_type_value = instruction->container_type->child;
2561926559 ZigType *container_type = ir_resolve_type(ira, container_type_value);
2562026560 if (type_is_invalid(container_type))
25621 return ira->codegen->invalid_instruction;
26561 return ira->codegen->invalid_inst_gen;
2562226562
2562326563 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25624 return ira->codegen->invalid_instruction;
26564 return ira->codegen->invalid_inst_gen;
2562526565
2562626566
2562726567 uint64_t member_index;
25628 IrInstruction *index_value = instruction->member_index->child;
26568 IrInstGen *index_value = instruction->member_index->child;
2562926569 if (!ir_resolve_usize(ira, index_value, &member_index))
25630 return ira->codegen->invalid_instruction;
26570 return ira->codegen->invalid_inst_gen;
2563126571
2563226572 if (container_type->id == ZigTypeIdStruct) {
2563326573 if (member_index >= container_type->data.structure.src_field_count) {
25634 ir_add_error(ira, index_value,
26574 ir_add_error(ira, &index_value->base,
2563526575 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2563626576 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25637 return ira->codegen->invalid_instruction;
26577 return ira->codegen->invalid_inst_gen;
2563826578 }
2563926579 TypeStructField *field = container_type->data.structure.fields[member_index];
2564026580
25641 return ir_const_type(ira, &instruction->base, field->type_entry);
26581 return ir_const_type(ira, &instruction->base.base, field->type_entry);
2564226582 } else if (container_type->id == ZigTypeIdUnion) {
2564326583 if (member_index >= container_type->data.unionation.src_field_count) {
25644 ir_add_error(ira, index_value,
26584 ir_add_error(ira, &index_value->base,
2564526585 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2564626586 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25647 return ira->codegen->invalid_instruction;
26587 return ira->codegen->invalid_inst_gen;
2564826588 }
2564926589 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2565026590
25651 return ir_const_type(ira, &instruction->base, field->type_entry);
26591 return ir_const_type(ira, &instruction->base.base, field->type_entry);
2565226592 } else {
25653 ir_add_error(ira, container_type_value,
26593 ir_add_error(ira, &container_type_value->base,
2565426594 buf_sprintf("type '%s' does not support @memberType", buf_ptr(&container_type->name)));
25655 return ira->codegen->invalid_instruction;
26595 return ira->codegen->invalid_inst_gen;
2565626596 }
2565726597}
2565826598
25659static IrInstruction *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstructionMemberName *instruction) {
26599static IrInstGen *ir_analyze_instruction_member_name(IrAnalyze *ira, IrInstSrcMemberName *instruction) {
2566026600 Error err;
25661 IrInstruction *container_type_value = instruction->container_type->child;
26601 IrInstGen *container_type_value = instruction->container_type->child;
2566226602 ZigType *container_type = ir_resolve_type(ira, container_type_value);
2566326603 if (type_is_invalid(container_type))
25664 return ira->codegen->invalid_instruction;
26604 return ira->codegen->invalid_inst_gen;
2566526605
2566626606 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusSizeKnown)))
25667 return ira->codegen->invalid_instruction;
26607 return ira->codegen->invalid_inst_gen;
2566826608
2566926609 uint64_t member_index;
25670 IrInstruction *index_value = instruction->member_index->child;
26610 IrInstGen *index_value = instruction->member_index->child;
2567126611 if (!ir_resolve_usize(ira, index_value, &member_index))
25672 return ira->codegen->invalid_instruction;
26612 return ira->codegen->invalid_inst_gen;
2567326613
2567426614 if (container_type->id == ZigTypeIdStruct) {
2567526615 if (member_index >= container_type->data.structure.src_field_count) {
25676 ir_add_error(ira, index_value,
26616 ir_add_error(ira, &index_value->base,
2567726617 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2567826618 member_index, buf_ptr(&container_type->name), container_type->data.structure.src_field_count));
25679 return ira->codegen->invalid_instruction;
26619 return ira->codegen->invalid_inst_gen;
2568026620 }
2568126621 TypeStructField *field = container_type->data.structure.fields[member_index];
2568226622
25683 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26623 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2568426624 init_const_str_lit(ira->codegen, result->value, field->name);
2568526625 return result;
2568626626 } else if (container_type->id == ZigTypeIdEnum) {
2568726627 if (member_index >= container_type->data.enumeration.src_field_count) {
25688 ir_add_error(ira, index_value,
26628 ir_add_error(ira, &index_value->base,
2568926629 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2569026630 member_index, buf_ptr(&container_type->name), container_type->data.enumeration.src_field_count));
25691 return ira->codegen->invalid_instruction;
26631 return ira->codegen->invalid_inst_gen;
2569226632 }
2569326633 TypeEnumField *field = &container_type->data.enumeration.fields[member_index];
2569426634
25695 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26635 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2569626636 init_const_str_lit(ira->codegen, result->value, field->name);
2569726637 return result;
2569826638 } else if (container_type->id == ZigTypeIdUnion) {
2569926639 if (member_index >= container_type->data.unionation.src_field_count) {
25700 ir_add_error(ira, index_value,
26640 ir_add_error(ira, &index_value->base,
2570126641 buf_sprintf("member index %" ZIG_PRI_u64 " out of bounds; '%s' has %" PRIu32 " members",
2570226642 member_index, buf_ptr(&container_type->name), container_type->data.unionation.src_field_count));
25703 return ira->codegen->invalid_instruction;
26643 return ira->codegen->invalid_inst_gen;
2570426644 }
2570526645 TypeUnionField *field = &container_type->data.unionation.fields[member_index];
2570626646
25707 IrInstruction *result = ir_const(ira, &instruction->base, nullptr);
26647 IrInstGen *result = ir_const(ira, &instruction->base.base, nullptr);
2570826648 init_const_str_lit(ira->codegen, result->value, field->name);
2570926649 return result;
2571026650 } else {
25711 ir_add_error(ira, container_type_value,
26651 ir_add_error(ira, &container_type_value->base,
2571226652 buf_sprintf("type '%s' does not support @memberName", buf_ptr(&container_type->name)));
25713 return ira->codegen->invalid_instruction;
26653 return ira->codegen->invalid_inst_gen;
2571426654 }
2571526655}
2571626656
25717static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstructionHasField *instruction) {
26657static IrInstGen *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstSrcHasField *instruction) {
2571826658 Error err;
2571926659 ZigType *container_type = ir_resolve_type(ira, instruction->container_type->child);
2572026660 if (type_is_invalid(container_type))
25721 return ira->codegen->invalid_instruction;
26661 return ira->codegen->invalid_inst_gen;
2572226662
2572326663 if ((err = type_resolve(ira->codegen, container_type, ResolveStatusZeroBitsKnown)))
25724 return ira->codegen->invalid_instruction;
26664 return ira->codegen->invalid_inst_gen;
2572526665
2572626666 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
2572726667 if (field_name == nullptr)
25728 return ira->codegen->invalid_instruction;
26668 return ira->codegen->invalid_inst_gen;
2572926669
2573026670 bool result;
2573126671 if (container_type->id == ZigTypeIdStruct) {
......@@ -25735,91 +26675,77 @@ static IrInstruction *ir_analyze_instruction_has_field(IrAnalyze *ira, IrInstruc
2573526675 } else if (container_type->id == ZigTypeIdUnion) {
2573626676 result = find_union_type_field(container_type, field_name) != nullptr;
2573726677 } else {
25738 ir_add_error(ira, instruction->container_type,
26678 ir_add_error(ira, &instruction->container_type->base,
2573926679 buf_sprintf("type '%s' does not support @hasField", buf_ptr(&container_type->name)));
25740 return ira->codegen->invalid_instruction;
26680 return ira->codegen->invalid_inst_gen;
2574126681 }
25742 return ir_const_bool(ira, &instruction->base, result);
26682 return ir_const_bool(ira, &instruction->base.base, result);
2574326683}
2574426684
25745static IrInstruction *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstructionBreakpoint *instruction) {
25746 IrInstruction *result = ir_build_breakpoint(&ira->new_irb,
25747 instruction->base.scope, instruction->base.source_node);
25748 result->value->type = ira->codegen->builtin_types.entry_void;
25749 return result;
26685static IrInstGen *ir_analyze_instruction_breakpoint(IrAnalyze *ira, IrInstSrcBreakpoint *instruction) {
26686 return ir_build_breakpoint_gen(ira, &instruction->base.base);
2575026687}
2575126688
25752static IrInstruction *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstructionReturnAddress *instruction) {
25753 IrInstruction *result = ir_build_return_address(&ira->new_irb,
25754 instruction->base.scope, instruction->base.source_node);
25755 result->value->type = ira->codegen->builtin_types.entry_usize;
25756 return result;
26689static IrInstGen *ir_analyze_instruction_return_address(IrAnalyze *ira, IrInstSrcReturnAddress *instruction) {
26690 return ir_build_return_address_gen(ira, &instruction->base.base);
2575726691}
2575826692
25759static IrInstruction *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstructionFrameAddress *instruction) {
25760 IrInstruction *result = ir_build_frame_address(&ira->new_irb,
25761 instruction->base.scope, instruction->base.source_node);
25762 result->value->type = ira->codegen->builtin_types.entry_usize;
25763 return result;
26693static IrInstGen *ir_analyze_instruction_frame_address(IrAnalyze *ira, IrInstSrcFrameAddress *instruction) {
26694 return ir_build_frame_address_gen(ira, &instruction->base.base);
2576426695}
2576526696
25766static IrInstruction *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstructionFrameHandle *instruction) {
25767 ZigFn *fn = exec_fn_entry(ira->new_irb.exec);
25768 ir_assert(fn != nullptr, &instruction->base);
26697static IrInstGen *ir_analyze_instruction_frame_handle(IrAnalyze *ira, IrInstSrcFrameHandle *instruction) {
26698 ZigFn *fn = ira->new_irb.exec->fn_entry;
26699 ir_assert(fn != nullptr, &instruction->base.base);
2576926700
2577026701 if (fn->inferred_async_node == nullptr) {
25771 fn->inferred_async_node = instruction->base.source_node;
26702 fn->inferred_async_node = instruction->base.base.source_node;
2577226703 }
2577326704
2577426705 ZigType *frame_type = get_fn_frame_type(ira->codegen, fn);
2577526706 ZigType *ptr_frame_type = get_pointer_to_type(ira->codegen, frame_type, false);
2577626707
25777 IrInstruction *result = ir_build_handle(&ira->new_irb, instruction->base.scope, instruction->base.source_node);
25778 result->value->type = ptr_frame_type;
25779 return result;
26708 return ir_build_handle_gen(ira, &instruction->base.base, ptr_frame_type);
2578026709}
2578126710
25782static IrInstruction *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstructionFrameType *instruction) {
26711static IrInstGen *ir_analyze_instruction_frame_type(IrAnalyze *ira, IrInstSrcFrameType *instruction) {
2578326712 ZigFn *fn = ir_resolve_fn(ira, instruction->fn->child);
2578426713 if (fn == nullptr)
25785 return ira->codegen->invalid_instruction;
26714 return ira->codegen->invalid_inst_gen;
2578626715
2578726716 if (fn->type_entry->data.fn.is_generic) {
25788 ir_add_error(ira, &instruction->base,
26717 ir_add_error(ira, &instruction->base.base,
2578926718 buf_sprintf("@Frame() of generic function"));
25790 return ira->codegen->invalid_instruction;
26719 return ira->codegen->invalid_inst_gen;
2579126720 }
2579226721
2579326722 ZigType *ty = get_fn_frame_type(ira->codegen, fn);
25794 return ir_const_type(ira, &instruction->base, ty);
26723 return ir_const_type(ira, &instruction->base.base, ty);
2579526724}
2579626725
25797static IrInstruction *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstructionFrameSizeSrc *instruction) {
25798 IrInstruction *fn = instruction->fn->child;
26726static IrInstGen *ir_analyze_instruction_frame_size(IrAnalyze *ira, IrInstSrcFrameSize *instruction) {
26727 IrInstGen *fn = instruction->fn->child;
2579926728 if (type_is_invalid(fn->value->type))
25800 return ira->codegen->invalid_instruction;
26729 return ira->codegen->invalid_inst_gen;
2580126730
2580226731 if (fn->value->type->id != ZigTypeIdFn) {
25803 ir_add_error(ira, fn,
26732 ir_add_error(ira, &fn->base,
2580426733 buf_sprintf("expected function, found '%s'", buf_ptr(&fn->value->type->name)));
25805 return ira->codegen->invalid_instruction;
26734 return ira->codegen->invalid_inst_gen;
2580626735 }
2580726736
2580826737 ira->codegen->need_frame_size_prefix_data = true;
2580926738
25810 IrInstruction *result = ir_build_frame_size_gen(&ira->new_irb, instruction->base.scope,
25811 instruction->base.source_node, fn);
25812 result->value->type = ira->codegen->builtin_types.entry_usize;
25813 return result;
26739 return ir_build_frame_size_gen(ira, &instruction->base.base, fn);
2581426740}
2581526741
25816static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstructionAlignOf *instruction) {
26742static IrInstGen *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstSrcAlignOf *instruction) {
2581726743 // Here we create a lazy value in order to avoid resolving the alignment of the type
2581826744 // immediately. This avoids false positive dependency loops such as:
2581926745 // const Node = struct {
2582026746 // field: []align(@alignOf(Node)) Node,
2582126747 // };
25822 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_num_lit_int);
26748 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_num_lit_int);
2582326749 result->value->special = ConstValSpecialLazy;
2582426750
2582526751 LazyValueAlignOf *lazy_align_of = allocate<LazyValueAlignOf>(1, "LazyValueAlignOf");
......@@ -25829,41 +26755,41 @@ static IrInstruction *ir_analyze_instruction_align_of(IrAnalyze *ira, IrInstruct
2582926755
2583026756 lazy_align_of->target_type = instruction->type_value->child;
2583126757 if (ir_resolve_type_lazy(ira, lazy_align_of->target_type) == nullptr)
25832 return ira->codegen->invalid_instruction;
26758 return ira->codegen->invalid_inst_gen;
2583326759
2583426760 return result;
2583526761}
2583626762
25837static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstructionOverflowOp *instruction) {
26763static IrInstGen *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstSrcOverflowOp *instruction) {
2583826764 Error err;
2583926765
25840 IrInstruction *type_value = instruction->type_value->child;
26766 IrInstGen *type_value = instruction->type_value->child;
2584126767 if (type_is_invalid(type_value->value->type))
25842 return ira->codegen->invalid_instruction;
26768 return ira->codegen->invalid_inst_gen;
2584326769
2584426770 ZigType *dest_type = ir_resolve_type(ira, type_value);
2584526771 if (type_is_invalid(dest_type))
25846 return ira->codegen->invalid_instruction;
26772 return ira->codegen->invalid_inst_gen;
2584726773
2584826774 if (dest_type->id != ZigTypeIdInt) {
25849 ir_add_error(ira, type_value,
26775 ir_add_error(ira, &type_value->base,
2585026776 buf_sprintf("expected integer type, found '%s'", buf_ptr(&dest_type->name)));
25851 return ira->codegen->invalid_instruction;
26777 return ira->codegen->invalid_inst_gen;
2585226778 }
2585326779
25854 IrInstruction *op1 = instruction->op1->child;
26780 IrInstGen *op1 = instruction->op1->child;
2585526781 if (type_is_invalid(op1->value->type))
25856 return ira->codegen->invalid_instruction;
26782 return ira->codegen->invalid_inst_gen;
2585726783
25858 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
26784 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, dest_type);
2585926785 if (type_is_invalid(casted_op1->value->type))
25860 return ira->codegen->invalid_instruction;
26786 return ira->codegen->invalid_inst_gen;
2586126787
25862 IrInstruction *op2 = instruction->op2->child;
26788 IrInstGen *op2 = instruction->op2->child;
2586326789 if (type_is_invalid(op2->value->type))
25864 return ira->codegen->invalid_instruction;
26790 return ira->codegen->invalid_inst_gen;
2586526791
25866 IrInstruction *casted_op2;
26792 IrInstGen *casted_op2;
2586726793 if (instruction->op == IrOverflowOpShl) {
2586826794 ZigType *shift_amt_type = get_smallest_unsigned_int_type(ira->codegen,
2586926795 dest_type->data.integral.bit_count - 1);
......@@ -25872,17 +26798,17 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2587226798 casted_op2 = ir_implicit_cast(ira, op2, dest_type);
2587326799 }
2587426800 if (type_is_invalid(casted_op2->value->type))
25875 return ira->codegen->invalid_instruction;
26801 return ira->codegen->invalid_inst_gen;
2587626802
25877 IrInstruction *result_ptr = instruction->result_ptr->child;
26803 IrInstGen *result_ptr = instruction->result_ptr->child;
2587826804 if (type_is_invalid(result_ptr->value->type))
25879 return ira->codegen->invalid_instruction;
26805 return ira->codegen->invalid_inst_gen;
2588026806
2588126807 ZigType *expected_ptr_type;
2588226808 if (result_ptr->value->type->id == ZigTypeIdPointer) {
2588326809 uint32_t alignment;
2588426810 if ((err = resolve_ptr_align(ira, result_ptr->value->type, &alignment)))
25885 return ira->codegen->invalid_instruction;
26811 return ira->codegen->invalid_inst_gen;
2588626812 expected_ptr_type = get_pointer_to_type_extra(ira->codegen, dest_type,
2588726813 false, result_ptr->value->type->data.pointer.is_volatile,
2588826814 PtrLenSingle,
......@@ -25891,9 +26817,9 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2589126817 expected_ptr_type = get_pointer_to_type(ira->codegen, dest_type, false);
2589226818 }
2589326819
25894 IrInstruction *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
26820 IrInstGen *casted_result_ptr = ir_implicit_cast(ira, result_ptr, expected_ptr_type);
2589526821 if (type_is_invalid(casted_result_ptr->value->type))
25896 return ira->codegen->invalid_instruction;
26822 return ira->codegen->invalid_inst_gen;
2589726823
2589826824 if (instr_is_comptime(casted_op1) &&
2589926825 instr_is_comptime(casted_op2) &&
......@@ -25901,22 +26827,22 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2590126827 {
2590226828 ZigValue *op1_val = ir_resolve_const(ira, casted_op1, UndefBad);
2590326829 if (op1_val == nullptr)
25904 return ira->codegen->invalid_instruction;
26830 return ira->codegen->invalid_inst_gen;
2590526831
2590626832 ZigValue *op2_val = ir_resolve_const(ira, casted_op2, UndefBad);
2590726833 if (op2_val == nullptr)
25908 return ira->codegen->invalid_instruction;
26834 return ira->codegen->invalid_inst_gen;
2590926835
2591026836 ZigValue *result_val = ir_resolve_const(ira, casted_result_ptr, UndefBad);
2591126837 if (result_val == nullptr)
25912 return ira->codegen->invalid_instruction;
26838 return ira->codegen->invalid_inst_gen;
2591326839
2591426840 BigInt *op1_bigint = &op1_val->data.x_bigint;
2591526841 BigInt *op2_bigint = &op2_val->data.x_bigint;
2591626842 ZigValue *pointee_val = const_ptr_pointee(ira, ira->codegen, result_val,
25917 casted_result_ptr->source_node);
26843 casted_result_ptr->base.source_node);
2591826844 if (pointee_val == nullptr)
25919 return ira->codegen->invalid_instruction;
26845 return ira->codegen->invalid_inst_gen;
2592026846 BigInt *dest_bigint = &pointee_val->data.x_bigint;
2592126847 switch (instruction->op) {
2592226848 case IrOverflowOpAdd:
......@@ -25943,17 +26869,14 @@ static IrInstruction *ir_analyze_instruction_overflow_op(IrAnalyze *ira, IrInstr
2594326869 dest_type->data.integral.is_signed);
2594426870 }
2594526871 pointee_val->special = ConstValSpecialStatic;
25946 return ir_const_bool(ira, &instruction->base, result_bool);
26872 return ir_const_bool(ira, &instruction->base.base, result_bool);
2594726873 }
2594826874
25949 IrInstruction *result = ir_build_overflow_op(&ira->new_irb,
25950 instruction->base.scope, instruction->base.source_node,
25951 instruction->op, type_value, casted_op1, casted_op2, casted_result_ptr, dest_type);
25952 result->value->type = ira->codegen->builtin_types.entry_bool;
25953 return result;
26875 return ir_build_overflow_op_gen(ira, &instruction->base.base, instruction->op,
26876 casted_op1, casted_op2, casted_result_ptr, dest_type);
2595426877}
2595526878
25956static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, ZigType *float_type,
26879static void ir_eval_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *source_instr, ZigType *float_type,
2595726880 ZigValue *op1, ZigValue *op2, ZigValue *op3, ZigValue *out_val) {
2595826881 if (float_type->id == ZigTypeIdComptimeFloat) {
2595926882 f128M_mulAdd(&out_val->data.x_bigfloat.value, &op1->data.x_bigfloat.value, &op2->data.x_bigfloat.value,
......@@ -25980,61 +26903,61 @@ static void ir_eval_mul_add(IrAnalyze *ira, IrInstructionMulAdd *source_instr, Z
2598026903 }
2598126904}
2598226905
25983static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructionMulAdd *instruction) {
25984 IrInstruction *type_value = instruction->type_value->child;
26906static IrInstGen *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstSrcMulAdd *instruction) {
26907 IrInstGen *type_value = instruction->type_value->child;
2598526908 if (type_is_invalid(type_value->value->type))
25986 return ira->codegen->invalid_instruction;
26909 return ira->codegen->invalid_inst_gen;
2598726910
2598826911 ZigType *expr_type = ir_resolve_type(ira, type_value);
2598926912 if (type_is_invalid(expr_type))
25990 return ira->codegen->invalid_instruction;
26913 return ira->codegen->invalid_inst_gen;
2599126914
2599226915 // Only allow float types, and vectors of floats.
2599326916 ZigType *float_type = (expr_type->id == ZigTypeIdVector) ? expr_type->data.vector.elem_type : expr_type;
2599426917 if (float_type->id != ZigTypeIdFloat) {
25995 ir_add_error(ira, type_value,
26918 ir_add_error(ira, &type_value->base,
2599626919 buf_sprintf("expected float or vector of float type, found '%s'", buf_ptr(&float_type->name)));
25997 return ira->codegen->invalid_instruction;
26920 return ira->codegen->invalid_inst_gen;
2599826921 }
2599926922
26000 IrInstruction *op1 = instruction->op1->child;
26923 IrInstGen *op1 = instruction->op1->child;
2600126924 if (type_is_invalid(op1->value->type))
26002 return ira->codegen->invalid_instruction;
26925 return ira->codegen->invalid_inst_gen;
2600326926
26004 IrInstruction *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
26927 IrInstGen *casted_op1 = ir_implicit_cast(ira, op1, expr_type);
2600526928 if (type_is_invalid(casted_op1->value->type))
26006 return ira->codegen->invalid_instruction;
26929 return ira->codegen->invalid_inst_gen;
2600726930
26008 IrInstruction *op2 = instruction->op2->child;
26931 IrInstGen *op2 = instruction->op2->child;
2600926932 if (type_is_invalid(op2->value->type))
26010 return ira->codegen->invalid_instruction;
26933 return ira->codegen->invalid_inst_gen;
2601126934
26012 IrInstruction *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
26935 IrInstGen *casted_op2 = ir_implicit_cast(ira, op2, expr_type);
2601326936 if (type_is_invalid(casted_op2->value->type))
26014 return ira->codegen->invalid_instruction;
26937 return ira->codegen->invalid_inst_gen;
2601526938
26016 IrInstruction *op3 = instruction->op3->child;
26939 IrInstGen *op3 = instruction->op3->child;
2601726940 if (type_is_invalid(op3->value->type))
26018 return ira->codegen->invalid_instruction;
26941 return ira->codegen->invalid_inst_gen;
2601926942
26020 IrInstruction *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
26943 IrInstGen *casted_op3 = ir_implicit_cast(ira, op3, expr_type);
2602126944 if (type_is_invalid(casted_op3->value->type))
26022 return ira->codegen->invalid_instruction;
26945 return ira->codegen->invalid_inst_gen;
2602326946
2602426947 if (instr_is_comptime(casted_op1) &&
2602526948 instr_is_comptime(casted_op2) &&
2602626949 instr_is_comptime(casted_op3)) {
2602726950 ZigValue *op1_const = ir_resolve_const(ira, casted_op1, UndefBad);
2602826951 if (!op1_const)
26029 return ira->codegen->invalid_instruction;
26952 return ira->codegen->invalid_inst_gen;
2603026953 ZigValue *op2_const = ir_resolve_const(ira, casted_op2, UndefBad);
2603126954 if (!op2_const)
26032 return ira->codegen->invalid_instruction;
26955 return ira->codegen->invalid_inst_gen;
2603326956 ZigValue *op3_const = ir_resolve_const(ira, casted_op3, UndefBad);
2603426957 if (!op3_const)
26035 return ira->codegen->invalid_instruction;
26958 return ira->codegen->invalid_inst_gen;
2603626959
26037 IrInstruction *result = ir_const(ira, &instruction->base, expr_type);
26960 IrInstGen *result = ir_const(ira, &instruction->base.base, expr_type);
2603826961 ZigValue *out_val = result->value;
2603926962
2604026963 if (expr_type->id == ZigTypeIdVector) {
......@@ -26065,63 +26988,59 @@ static IrInstruction *ir_analyze_instruction_mul_add(IrAnalyze *ira, IrInstructi
2606526988 return result;
2606626989 }
2606726990
26068 IrInstruction *result = ir_build_mul_add(&ira->new_irb,
26069 instruction->base.scope, instruction->base.source_node,
26070 type_value, casted_op1, casted_op2, casted_op3);
26071 result->value->type = expr_type;
26072 return result;
26991 return ir_build_mul_add_gen(ira, &instruction->base.base, casted_op1, casted_op2, casted_op3, expr_type);
2607326992}
2607426993
26075static IrInstruction *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstructionTestErrSrc *instruction) {
26076 IrInstruction *base_ptr = instruction->base_ptr->child;
26994static IrInstGen *ir_analyze_instruction_test_err(IrAnalyze *ira, IrInstSrcTestErr *instruction) {
26995 IrInstGen *base_ptr = instruction->base_ptr->child;
2607726996 if (type_is_invalid(base_ptr->value->type))
26078 return ira->codegen->invalid_instruction;
26997 return ira->codegen->invalid_inst_gen;
2607926998
26080 IrInstruction *value;
26999 IrInstGen *value;
2608127000 if (instruction->base_ptr_is_payload) {
2608227001 value = base_ptr;
2608327002 } else {
26084 value = ir_get_deref(ira, &instruction->base, base_ptr, nullptr);
27003 value = ir_get_deref(ira, &instruction->base.base, base_ptr, nullptr);
2608527004 }
2608627005
2608727006 ZigType *type_entry = value->value->type;
2608827007 if (type_is_invalid(type_entry))
26089 return ira->codegen->invalid_instruction;
27008 return ira->codegen->invalid_inst_gen;
2609027009 if (type_entry->id == ZigTypeIdErrorUnion) {
2609127010 if (instr_is_comptime(value)) {
2609227011 ZigValue *err_union_val = ir_resolve_const(ira, value, UndefBad);
2609327012 if (!err_union_val)
26094 return ira->codegen->invalid_instruction;
27013 return ira->codegen->invalid_inst_gen;
2609527014
2609627015 if (err_union_val->special != ConstValSpecialRuntime) {
2609727016 ErrorTableEntry *err = err_union_val->data.x_err_union.error_set->data.x_err_set;
26098 return ir_const_bool(ira, &instruction->base, (err != nullptr));
27017 return ir_const_bool(ira, &instruction->base.base, (err != nullptr));
2609927018 }
2610027019 }
2610127020
2610227021 if (instruction->resolve_err_set) {
2610327022 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
26104 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.source_node)) {
26105 return ira->codegen->invalid_instruction;
27023 if (!resolve_inferred_error_set(ira->codegen, err_set_type, instruction->base.base.source_node)) {
27024 return ira->codegen->invalid_inst_gen;
2610627025 }
2610727026 if (!type_is_global_error_set(err_set_type) &&
2610827027 err_set_type->data.error_set.err_count == 0)
2610927028 {
2611027029 assert(!err_set_type->data.error_set.incomplete);
26111 return ir_const_bool(ira, &instruction->base, false);
27030 return ir_const_bool(ira, &instruction->base.base, false);
2611227031 }
2611327032 }
2611427033
26115 return ir_build_test_err_gen(ira, &instruction->base, value);
27034 return ir_build_test_err_gen(ira, &instruction->base.base, value);
2611627035 } else if (type_entry->id == ZigTypeIdErrorSet) {
26117 return ir_const_bool(ira, &instruction->base, true);
27036 return ir_const_bool(ira, &instruction->base.base, true);
2611827037 } else {
26119 return ir_const_bool(ira, &instruction->base, false);
27038 return ir_const_bool(ira, &instruction->base.base, false);
2612027039 }
2612127040}
2612227041
26123static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *source_instr,
26124 IrInstruction *base_ptr, bool initializing)
27042static IrInstGen *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInst* source_instr,
27043 IrInstGen *base_ptr, bool initializing)
2612527044{
2612627045 ZigType *ptr_type = base_ptr->value->type;
2612727046
......@@ -26130,12 +27049,12 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2613027049
2613127050 ZigType *type_entry = ptr_type->data.pointer.child_type;
2613227051 if (type_is_invalid(type_entry))
26133 return ira->codegen->invalid_instruction;
27052 return ira->codegen->invalid_inst_gen;
2613427053
2613527054 if (type_entry->id != ZigTypeIdErrorUnion) {
26136 ir_add_error(ira, base_ptr,
27055 ir_add_error(ira, &base_ptr->base,
2613727056 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26138 return ira->codegen->invalid_instruction;
27057 return ira->codegen->invalid_inst_gen;
2613927058 }
2614027059
2614127060 ZigType *err_set_type = type_entry->data.error_union.err_set_type;
......@@ -26146,13 +27065,13 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2614627065 if (instr_is_comptime(base_ptr)) {
2614727066 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
2614827067 if (!ptr_val)
26149 return ira->codegen->invalid_instruction;
27068 return ira->codegen->invalid_inst_gen;
2615027069 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar &&
2615127070 ptr_val->data.x_ptr.special != ConstPtrSpecialHardCodedAddr)
2615227071 {
2615327072 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2615427073 if (err_union_val == nullptr)
26155 return ira->codegen->invalid_instruction;
27074 return ira->codegen->invalid_inst_gen;
2615627075
2615727076 if (initializing && err_union_val->special == ConstValSpecialUndef) {
2615827077 ZigValue *vals = create_const_vals(2);
......@@ -26175,11 +27094,10 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2617527094 }
2617627095 ir_assert(err_union_val->special != ConstValSpecialRuntime, source_instr);
2617727096
26178 IrInstruction *result;
27097 IrInstGen *result;
2617927098 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26180 result = ir_build_unwrap_err_code(&ira->new_irb, source_instr->scope,
26181 source_instr->source_node, base_ptr);
26182 result->value->type = result_type;
27099 result = ir_build_unwrap_err_code_gen(ira, source_instr->scope,
27100 source_instr->source_node, base_ptr, result_type);
2618327101 result->value->special = ConstValSpecialStatic;
2618427102 } else {
2618527103 result = ir_const(ira, source_instr, result_type);
......@@ -26192,23 +27110,18 @@ static IrInstruction *ir_analyze_unwrap_err_code(IrAnalyze *ira, IrInstruction *
2619227110 }
2619327111 }
2619427112
26195 IrInstruction *result = ir_build_unwrap_err_code(&ira->new_irb,
26196 source_instr->scope, source_instr->source_node, base_ptr);
26197 result->value->type = result_type;
26198 return result;
27113 return ir_build_unwrap_err_code_gen(ira, source_instr->scope, source_instr->source_node, base_ptr, result_type);
2619927114}
2620027115
26201static IrInstruction *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira,
26202 IrInstructionUnwrapErrCode *instruction)
26203{
26204 IrInstruction *base_ptr = instruction->err_union_ptr->child;
27116static IrInstGen *ir_analyze_instruction_unwrap_err_code(IrAnalyze *ira, IrInstSrcUnwrapErrCode *instruction) {
27117 IrInstGen *base_ptr = instruction->err_union_ptr->child;
2620527118 if (type_is_invalid(base_ptr->value->type))
26206 return ira->codegen->invalid_instruction;
26207 return ir_analyze_unwrap_err_code(ira, &instruction->base, base_ptr, false);
27119 return ira->codegen->invalid_inst_gen;
27120 return ir_analyze_unwrap_err_code(ira, &instruction->base.base, base_ptr, false);
2620827121}
2620927122
26210static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruction *source_instr,
26211 IrInstruction *base_ptr, bool safety_check_on, bool initializing)
27123static IrInstGen *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInst* source_instr,
27124 IrInstGen *base_ptr, bool safety_check_on, bool initializing)
2621227125{
2621327126 ZigType *ptr_type = base_ptr->value->type;
2621427127
......@@ -26217,17 +27130,17 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2621727130
2621827131 ZigType *type_entry = ptr_type->data.pointer.child_type;
2621927132 if (type_is_invalid(type_entry))
26220 return ira->codegen->invalid_instruction;
27133 return ira->codegen->invalid_inst_gen;
2622127134
2622227135 if (type_entry->id != ZigTypeIdErrorUnion) {
26223 ir_add_error(ira, base_ptr,
27136 ir_add_error(ira, &base_ptr->base,
2622427137 buf_sprintf("expected error union type, found '%s'", buf_ptr(&type_entry->name)));
26225 return ira->codegen->invalid_instruction;
27138 return ira->codegen->invalid_inst_gen;
2622627139 }
2622727140
2622827141 ZigType *payload_type = type_entry->data.error_union.payload_type;
2622927142 if (type_is_invalid(payload_type))
26230 return ira->codegen->invalid_instruction;
27143 return ira->codegen->invalid_inst_gen;
2623127144
2623227145 ZigType *result_type = get_pointer_to_type_extra(ira->codegen, payload_type,
2623327146 ptr_type->data.pointer.is_const, ptr_type->data.pointer.is_volatile,
......@@ -26236,11 +27149,11 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2623627149 if (instr_is_comptime(base_ptr)) {
2623727150 ZigValue *ptr_val = ir_resolve_const(ira, base_ptr, UndefBad);
2623827151 if (!ptr_val)
26239 return ira->codegen->invalid_instruction;
27152 return ira->codegen->invalid_inst_gen;
2624027153 if (ptr_val->data.x_ptr.mut != ConstPtrMutRuntimeVar) {
2624127154 ZigValue *err_union_val = const_ptr_pointee(ira, ira->codegen, ptr_val, source_instr->source_node);
2624227155 if (err_union_val == nullptr)
26243 return ira->codegen->invalid_instruction;
27156 return ira->codegen->invalid_inst_gen;
2624427157 if (initializing && err_union_val->special == ConstValSpecialUndef) {
2624527158 ZigValue *vals = create_const_vals(2);
2624627159 ZigValue *err_set_val = &vals[0];
......@@ -26263,14 +27176,13 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2626327176 if (err != nullptr) {
2626427177 ir_add_error(ira, source_instr,
2626527178 buf_sprintf("caught unexpected error '%s'", buf_ptr(&err->name)));
26266 return ira->codegen->invalid_instruction;
27179 return ira->codegen->invalid_inst_gen;
2626727180 }
2626827181
26269 IrInstruction *result;
27182 IrInstGen *result;
2627027183 if (ptr_val->data.x_ptr.mut == ConstPtrMutInfer) {
26271 result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
26272 source_instr->source_node, base_ptr, safety_check_on, initializing);
26273 result->value->type = result_type;
27184 result = ir_build_unwrap_err_payload_gen(ira, source_instr->scope,
27185 source_instr->source_node, base_ptr, safety_check_on, initializing, result_type);
2627427186 result->value->special = ConstValSpecialStatic;
2627527187 } else {
2627627188 result = ir_const(ira, source_instr, result_type);
......@@ -26283,28 +27195,26 @@ static IrInstruction *ir_analyze_unwrap_error_payload(IrAnalyze *ira, IrInstruct
2628327195 }
2628427196 }
2628527197
26286 IrInstruction *result = ir_build_unwrap_err_payload(&ira->new_irb, source_instr->scope,
26287 source_instr->source_node, base_ptr, safety_check_on, initializing);
26288 result->value->type = result_type;
26289 return result;
27198 return ir_build_unwrap_err_payload_gen(ira, source_instr->scope, source_instr->source_node,
27199 base_ptr, safety_check_on, initializing, result_type);
2629027200}
2629127201
26292static IrInstruction *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
26293 IrInstructionUnwrapErrPayload *instruction)
27202static IrInstGen *ir_analyze_instruction_unwrap_err_payload(IrAnalyze *ira,
27203 IrInstSrcUnwrapErrPayload *instruction)
2629427204{
2629527205 assert(instruction->value->child);
26296 IrInstruction *value = instruction->value->child;
27206 IrInstGen *value = instruction->value->child;
2629727207 if (type_is_invalid(value->value->type))
26298 return ira->codegen->invalid_instruction;
27208 return ira->codegen->invalid_inst_gen;
2629927209
26300 return ir_analyze_unwrap_error_payload(ira, &instruction->base, value, instruction->safety_check_on, false);
27210 return ir_analyze_unwrap_error_payload(ira, &instruction->base.base, value, instruction->safety_check_on, false);
2630127211}
2630227212
26303static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstructionFnProto *instruction) {
26304 AstNode *proto_node = instruction->base.source_node;
27213static IrInstGen *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstSrcFnProto *instruction) {
27214 AstNode *proto_node = instruction->base.base.source_node;
2630527215 assert(proto_node->type == NodeTypeFnProto);
2630627216
26307 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
27217 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
2630827218 result->value->special = ConstValSpecialLazy;
2630927219
2631027220 LazyValueFnType *lazy_fn_type = allocate<LazyValueFnType>(1, "LazyValueFnType");
......@@ -26313,29 +27223,29 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
2631327223 lazy_fn_type->base.id = LazyValueIdFnType;
2631427224
2631527225 if (proto_node->data.fn_proto.auto_err_set) {
26316 ir_add_error(ira, &instruction->base,
27226 ir_add_error(ira, &instruction->base.base,
2631727227 buf_sprintf("inferring error set of return type valid only for function definitions"));
26318 return ira->codegen->invalid_instruction;
27228 return ira->codegen->invalid_inst_gen;
2631927229 }
2632027230
2632127231 lazy_fn_type->cc = cc_from_fn_proto(&proto_node->data.fn_proto);
2632227232 if (instruction->callconv_value != nullptr) {
2632327233 ZigType *cc_enum_type = get_builtin_type(ira->codegen, "CallingConvention");
2632427234
26325 IrInstruction *casted_value = ir_implicit_cast(ira, instruction->callconv_value, cc_enum_type);
27235 IrInstGen *casted_value = ir_implicit_cast(ira, instruction->callconv_value->child, cc_enum_type);
2632627236 if (type_is_invalid(casted_value->value->type))
26327 return ira->codegen->invalid_instruction;
27237 return ira->codegen->invalid_inst_gen;
2632827238
2632927239 ZigValue *const_value = ir_resolve_const(ira, casted_value, UndefBad);
2633027240 if (const_value == nullptr)
26331 return ira->codegen->invalid_instruction;
27241 return ira->codegen->invalid_inst_gen;
2633227242
2633327243 lazy_fn_type->cc = (CallingConvention)bigint_as_u32(&const_value->data.x_enum_tag);
2633427244 }
2633527245
2633627246 size_t param_count = proto_node->data.fn_proto.params.length;
2633727247 lazy_fn_type->proto_node = proto_node;
26338 lazy_fn_type->param_types = allocate<IrInstruction *>(param_count);
27248 lazy_fn_type->param_types = allocate<IrInstGen *>(param_count);
2633927249
2634027250 for (size_t param_index = 0; param_index < param_count; param_index += 1) {
2634127251 AstNode *param_node = proto_node->data.fn_proto.params.at(param_index);
......@@ -26360,63 +27270,63 @@ static IrInstruction *ir_analyze_instruction_fn_proto(IrAnalyze *ira, IrInstruct
2636027270 return result;
2636127271 }
2636227272
26363 IrInstruction *param_type_value = instruction->param_types[param_index]->child;
27273 IrInstGen *param_type_value = instruction->param_types[param_index]->child;
2636427274 if (type_is_invalid(param_type_value->value->type))
26365 return ira->codegen->invalid_instruction;
27275 return ira->codegen->invalid_inst_gen;
2636627276 if (ir_resolve_const(ira, param_type_value, LazyOk) == nullptr)
26367 return ira->codegen->invalid_instruction;
27277 return ira->codegen->invalid_inst_gen;
2636827278 lazy_fn_type->param_types[param_index] = param_type_value;
2636927279 }
2637027280
2637127281 if (instruction->align_value != nullptr) {
2637227282 lazy_fn_type->align_inst = instruction->align_value->child;
2637327283 if (ir_resolve_const(ira, lazy_fn_type->align_inst, LazyOk) == nullptr)
26374 return ira->codegen->invalid_instruction;
27284 return ira->codegen->invalid_inst_gen;
2637527285 }
2637627286
2637727287 lazy_fn_type->return_type = instruction->return_type->child;
2637827288 if (ir_resolve_const(ira, lazy_fn_type->return_type, LazyOk) == nullptr)
26379 return ira->codegen->invalid_instruction;
27289 return ira->codegen->invalid_inst_gen;
2638027290
2638127291 return result;
2638227292}
2638327293
26384static IrInstruction *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstructionTestComptime *instruction) {
26385 IrInstruction *value = instruction->value->child;
27294static IrInstGen *ir_analyze_instruction_test_comptime(IrAnalyze *ira, IrInstSrcTestComptime *instruction) {
27295 IrInstGen *value = instruction->value->child;
2638627296 if (type_is_invalid(value->value->type))
26387 return ira->codegen->invalid_instruction;
27297 return ira->codegen->invalid_inst_gen;
2638827298
26389 return ir_const_bool(ira, &instruction->base, instr_is_comptime(value));
27299 return ir_const_bool(ira, &instruction->base.base, instr_is_comptime(value));
2639027300}
2639127301
26392static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
26393 IrInstructionCheckSwitchProngs *instruction)
27302static IrInstGen *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
27303 IrInstSrcCheckSwitchProngs *instruction)
2639427304{
26395 IrInstruction *target_value = instruction->target_value->child;
27305 IrInstGen *target_value = instruction->target_value->child;
2639627306 ZigType *switch_type = target_value->value->type;
2639727307 if (type_is_invalid(switch_type))
26398 return ira->codegen->invalid_instruction;
27308 return ira->codegen->invalid_inst_gen;
2639927309
2640027310 if (switch_type->id == ZigTypeIdEnum) {
2640127311 HashMap<BigInt, AstNode *, bigint_hash, bigint_eql> field_prev_uses = {};
2640227312 field_prev_uses.init(switch_type->data.enumeration.src_field_count);
2640327313
2640427314 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26405 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27315 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2640627316
26407 IrInstruction *start_value_uncasted = range->start->child;
27317 IrInstGen *start_value_uncasted = range->start->child;
2640827318 if (type_is_invalid(start_value_uncasted->value->type))
26409 return ira->codegen->invalid_instruction;
26410 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
27319 return ira->codegen->invalid_inst_gen;
27320 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
2641127321 if (type_is_invalid(start_value->value->type))
26412 return ira->codegen->invalid_instruction;
27322 return ira->codegen->invalid_inst_gen;
2641327323
26414 IrInstruction *end_value_uncasted = range->end->child;
27324 IrInstGen *end_value_uncasted = range->end->child;
2641527325 if (type_is_invalid(end_value_uncasted->value->type))
26416 return ira->codegen->invalid_instruction;
26417 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
27326 return ira->codegen->invalid_inst_gen;
27327 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
2641827328 if (type_is_invalid(end_value->value->type))
26419 return ira->codegen->invalid_instruction;
27329 return ira->codegen->invalid_inst_gen;
2642027330
2642127331 assert(start_value->value->type->id == ZigTypeIdEnum);
2642227332 BigInt start_index;
......@@ -26427,7 +27337,7 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2642727337 bigint_init_bigint(&end_index, &end_value->value->data.x_enum_tag);
2642827338
2642927339 if (bigint_cmp(&start_index, &end_index) == CmpGT) {
26430 ir_add_error(ira, start_value,
27340 ir_add_error(ira, &start_value->base,
2643127341 buf_sprintf("range start value is greater than the end value"));
2643227342 }
2643327343
......@@ -26438,12 +27348,12 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2643827348 if (cmp == CmpGT) {
2643927349 break;
2644027350 }
26441 auto entry = field_prev_uses.put_unique(field_index, start_value->source_node);
27351 auto entry = field_prev_uses.put_unique(field_index, start_value->base.source_node);
2644227352 if (entry) {
2644327353 AstNode *prev_node = entry->value;
2644427354 TypeEnumField *enum_field = find_enum_field_by_tag(switch_type, &field_index);
2644527355 assert(enum_field != nullptr);
26446 ErrorMsg *msg = ir_add_error(ira, start_value,
27356 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
2644727357 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name),
2644827358 buf_ptr(enum_field->name)));
2644927359 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
......@@ -26451,79 +27361,96 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2645127361 bigint_incr(&field_index);
2645227362 }
2645327363 }
26454 if (!instruction->have_else_prong) {
26455 if (switch_type->data.enumeration.layout == ContainerLayoutExtern) {
26456 ir_add_error(ira, &instruction->base,
26457 buf_sprintf("switch on an extern enum must have an else prong"));
27364 if (instruction->have_underscore_prong) {
27365 if (!switch_type->data.enumeration.non_exhaustive){
27366 ir_add_error(ira, &instruction->base.base,
27367 buf_sprintf("switch on non-exhaustive enum has `_` prong"));
27368 }
27369 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
27370 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
27371 if (buf_eql_str(enum_field->name, "_"))
27372 continue;
27373
27374 auto entry = field_prev_uses.maybe_get(enum_field->value);
27375 if (!entry) {
27376 ir_add_error(ira, &instruction->base.base,
27377 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
27378 buf_ptr(enum_field->name)));
27379 }
27380 }
27381 } else if (!instruction->have_else_prong) {
27382 if (switch_type->data.enumeration.non_exhaustive) {
27383 ir_add_error(ira, &instruction->base.base,
27384 buf_sprintf("switch on non-exhaustive enum must include `else` or `_` prong"));
2645827385 }
2645927386 for (uint32_t i = 0; i < switch_type->data.enumeration.src_field_count; i += 1) {
2646027387 TypeEnumField *enum_field = &switch_type->data.enumeration.fields[i];
2646127388
2646227389 auto entry = field_prev_uses.maybe_get(enum_field->value);
2646327390 if (!entry) {
26464 ir_add_error(ira, &instruction->base,
27391 ir_add_error(ira, &instruction->base.base,
2646527392 buf_sprintf("enumeration value '%s.%s' not handled in switch", buf_ptr(&switch_type->name),
2646627393 buf_ptr(enum_field->name)));
2646727394 }
2646827395 }
2646927396 }
2647027397 } else if (switch_type->id == ZigTypeIdErrorSet) {
26471 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->source_node)) {
26472 return ira->codegen->invalid_instruction;
27398 if (!resolve_inferred_error_set(ira->codegen, switch_type, target_value->base.source_node)) {
27399 return ira->codegen->invalid_inst_gen;
2647327400 }
2647427401
2647527402 size_t field_prev_uses_count = ira->codegen->errors_by_index.length;
2647627403 AstNode **field_prev_uses = allocate<AstNode *>(field_prev_uses_count, "AstNode *");
2647727404
2647827405 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26479 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27406 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2648027407
26481 IrInstruction *start_value_uncasted = range->start->child;
27408 IrInstGen *start_value_uncasted = range->start->child;
2648227409 if (type_is_invalid(start_value_uncasted->value->type))
26483 return ira->codegen->invalid_instruction;
26484 IrInstruction *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
27410 return ira->codegen->invalid_inst_gen;
27411 IrInstGen *start_value = ir_implicit_cast(ira, start_value_uncasted, switch_type);
2648527412 if (type_is_invalid(start_value->value->type))
26486 return ira->codegen->invalid_instruction;
27413 return ira->codegen->invalid_inst_gen;
2648727414
26488 IrInstruction *end_value_uncasted = range->end->child;
27415 IrInstGen *end_value_uncasted = range->end->child;
2648927416 if (type_is_invalid(end_value_uncasted->value->type))
26490 return ira->codegen->invalid_instruction;
26491 IrInstruction *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
27417 return ira->codegen->invalid_inst_gen;
27418 IrInstGen *end_value = ir_implicit_cast(ira, end_value_uncasted, switch_type);
2649227419 if (type_is_invalid(end_value->value->type))
26493 return ira->codegen->invalid_instruction;
27420 return ira->codegen->invalid_inst_gen;
2649427421
26495 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
27422 ir_assert(start_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
2649627423 uint32_t start_index = start_value->value->data.x_err_set->value;
2649727424
26498 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base);
27425 ir_assert(end_value->value->type->id == ZigTypeIdErrorSet, &instruction->base.base);
2649927426 uint32_t end_index = end_value->value->data.x_err_set->value;
2650027427
2650127428 if (start_index != end_index) {
26502 ir_add_error(ira, end_value, buf_sprintf("ranges not allowed when switching on errors"));
26503 return ira->codegen->invalid_instruction;
27429 ir_add_error(ira, &end_value->base, buf_sprintf("ranges not allowed when switching on errors"));
27430 return ira->codegen->invalid_inst_gen;
2650427431 }
2650527432
2650627433 AstNode *prev_node = field_prev_uses[start_index];
2650727434 if (prev_node != nullptr) {
2650827435 Buf *err_name = &ira->codegen->errors_by_index.at(start_index)->name;
26509 ErrorMsg *msg = ir_add_error(ira, start_value,
27436 ErrorMsg *msg = ir_add_error(ira, &start_value->base,
2651027437 buf_sprintf("duplicate switch value: '%s.%s'", buf_ptr(&switch_type->name), buf_ptr(err_name)));
2651127438 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("other value is here"));
2651227439 }
26513 field_prev_uses[start_index] = start_value->source_node;
27440 field_prev_uses[start_index] = start_value->base.source_node;
2651427441 }
2651527442 if (!instruction->have_else_prong) {
2651627443 if (type_is_global_error_set(switch_type)) {
26517 ir_add_error(ira, &instruction->base,
27444 ir_add_error(ira, &instruction->base.base,
2651827445 buf_sprintf("else prong required when switching on type 'anyerror'"));
26519 return ira->codegen->invalid_instruction;
27446 return ira->codegen->invalid_inst_gen;
2652027447 } else {
2652127448 for (uint32_t i = 0; i < switch_type->data.error_set.err_count; i += 1) {
2652227449 ErrorTableEntry *err_entry = switch_type->data.error_set.errors[i];
2652327450
2652427451 AstNode *prev_node = field_prev_uses[err_entry->value];
2652527452 if (prev_node == nullptr) {
26526 ir_add_error(ira, &instruction->base,
27453 ir_add_error(ira, &instruction->base.base,
2652727454 buf_sprintf("error.%s not handled in switch", buf_ptr(&err_entry->name)));
2652827455 }
2652927456 }
......@@ -26534,44 +27461,44 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2653427461 } else if (switch_type->id == ZigTypeIdInt) {
2653527462 RangeSet rs = {0};
2653627463 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26537 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27464 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2653827465
26539 IrInstruction *start_value = range->start->child;
27466 IrInstGen *start_value = range->start->child;
2654027467 if (type_is_invalid(start_value->value->type))
26541 return ira->codegen->invalid_instruction;
26542 IrInstruction *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
27468 return ira->codegen->invalid_inst_gen;
27469 IrInstGen *casted_start_value = ir_implicit_cast(ira, start_value, switch_type);
2654327470 if (type_is_invalid(casted_start_value->value->type))
26544 return ira->codegen->invalid_instruction;
27471 return ira->codegen->invalid_inst_gen;
2654527472
26546 IrInstruction *end_value = range->end->child;
27473 IrInstGen *end_value = range->end->child;
2654727474 if (type_is_invalid(end_value->value->type))
26548 return ira->codegen->invalid_instruction;
26549 IrInstruction *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
27475 return ira->codegen->invalid_inst_gen;
27476 IrInstGen *casted_end_value = ir_implicit_cast(ira, end_value, switch_type);
2655027477 if (type_is_invalid(casted_end_value->value->type))
26551 return ira->codegen->invalid_instruction;
27478 return ira->codegen->invalid_inst_gen;
2655227479
2655327480 ZigValue *start_val = ir_resolve_const(ira, casted_start_value, UndefBad);
2655427481 if (!start_val)
26555 return ira->codegen->invalid_instruction;
27482 return ira->codegen->invalid_inst_gen;
2655627483
2655727484 ZigValue *end_val = ir_resolve_const(ira, casted_end_value, UndefBad);
2655827485 if (!end_val)
26559 return ira->codegen->invalid_instruction;
27486 return ira->codegen->invalid_inst_gen;
2656027487
2656127488 assert(start_val->type->id == ZigTypeIdInt || start_val->type->id == ZigTypeIdComptimeInt);
2656227489 assert(end_val->type->id == ZigTypeIdInt || end_val->type->id == ZigTypeIdComptimeInt);
2656327490
2656427491 if (bigint_cmp(&start_val->data.x_bigint, &end_val->data.x_bigint) == CmpGT) {
26565 ir_add_error(ira, start_value,
27492 ir_add_error(ira, &start_value->base,
2656627493 buf_sprintf("range start value is greater than the end value"));
2656727494 }
2656827495
2656927496 AstNode *prev_node = rangeset_add_range(&rs, &start_val->data.x_bigint, &end_val->data.x_bigint,
26570 start_value->source_node);
27497 start_value->base.source_node);
2657127498 if (prev_node != nullptr) {
26572 ErrorMsg *msg = ir_add_error(ira, start_value, buf_sprintf("duplicate switch value"));
27499 ErrorMsg *msg = ir_add_error(ira, &start_value->base, buf_sprintf("duplicate switch value"));
2657327500 add_error_note(ira->codegen, msg, prev_node, buf_sprintf("previous value is here"));
26574 return ira->codegen->invalid_instruction;
27501 return ira->codegen->invalid_inst_gen;
2657527502 }
2657627503 }
2657727504 if (!instruction->have_else_prong) {
......@@ -26580,25 +27507,25 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2658027507 BigInt max_val;
2658127508 eval_min_max_value_int(ira->codegen, switch_type, &max_val, true);
2658227509 if (!rangeset_spans(&rs, &min_val, &max_val)) {
26583 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
26584 return ira->codegen->invalid_instruction;
27510 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
27511 return ira->codegen->invalid_inst_gen;
2658527512 }
2658627513 }
2658727514 } else if (switch_type->id == ZigTypeIdBool) {
2658827515 int seenTrue = 0;
2658927516 int seenFalse = 0;
2659027517 for (size_t range_i = 0; range_i < instruction->range_count; range_i += 1) {
26591 IrInstructionCheckSwitchProngsRange *range = &instruction->ranges[range_i];
27518 IrInstSrcCheckSwitchProngsRange *range = &instruction->ranges[range_i];
2659227519
26593 IrInstruction *value = range->start->child;
27520 IrInstGen *value = range->start->child;
2659427521
26595 IrInstruction *casted_value = ir_implicit_cast(ira, value, switch_type);
27522 IrInstGen *casted_value = ir_implicit_cast(ira, value, switch_type);
2659627523 if (type_is_invalid(casted_value->value->type))
26597 return ira->codegen->invalid_instruction;
27524 return ira->codegen->invalid_inst_gen;
2659827525
2659927526 ZigValue *const_expr_val = ir_resolve_const(ira, casted_value, UndefBad);
2660027527 if (!const_expr_val)
26601 return ira->codegen->invalid_instruction;
27528 return ira->codegen->invalid_inst_gen;
2660227529
2660327530 assert(const_expr_val->type->id == ZigTypeIdBool);
2660427531
......@@ -26609,60 +27536,59 @@ static IrInstruction *ir_analyze_instruction_check_switch_prongs(IrAnalyze *ira,
2660927536 }
2661027537
2661127538 if ((seenTrue > 1) || (seenFalse > 1)) {
26612 ir_add_error(ira, value, buf_sprintf("duplicate switch value"));
26613 return ira->codegen->invalid_instruction;
27539 ir_add_error(ira, &value->base, buf_sprintf("duplicate switch value"));
27540 return ira->codegen->invalid_inst_gen;
2661427541 }
2661527542 }
2661627543 if (((seenTrue < 1) || (seenFalse < 1)) && !instruction->have_else_prong) {
26617 ir_add_error(ira, &instruction->base, buf_sprintf("switch must handle all possibilities"));
26618 return ira->codegen->invalid_instruction;
27544 ir_add_error(ira, &instruction->base.base, buf_sprintf("switch must handle all possibilities"));
27545 return ira->codegen->invalid_inst_gen;
2661927546 }
2662027547 } else if (!instruction->have_else_prong) {
26621 ir_add_error(ira, &instruction->base,
27548 ir_add_error(ira, &instruction->base.base,
2662227549 buf_sprintf("else prong required when switching on type '%s'", buf_ptr(&switch_type->name)));
26623 return ira->codegen->invalid_instruction;
27550 return ira->codegen->invalid_inst_gen;
2662427551 }
26625 return ir_const_void(ira, &instruction->base);
27552 return ir_const_void(ira, &instruction->base.base);
2662627553}
2662727554
26628static IrInstruction *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
26629 IrInstructionCheckStatementIsVoid *instruction)
27555static IrInstGen *ir_analyze_instruction_check_statement_is_void(IrAnalyze *ira,
27556 IrInstSrcCheckStatementIsVoid *instruction)
2663027557{
26631 IrInstruction *statement_value = instruction->statement_value->child;
27558 IrInstGen *statement_value = instruction->statement_value->child;
2663227559 ZigType *statement_type = statement_value->value->type;
2663327560 if (type_is_invalid(statement_type))
26634 return ira->codegen->invalid_instruction;
27561 return ira->codegen->invalid_inst_gen;
2663527562
2663627563 if (statement_type->id != ZigTypeIdVoid && statement_type->id != ZigTypeIdUnreachable) {
26637 ir_add_error(ira, &instruction->base, buf_sprintf("expression value is ignored"));
27564 ir_add_error(ira, &instruction->base.base, buf_sprintf("expression value is ignored"));
2663827565 }
2663927566
26640 return ir_const_void(ira, &instruction->base);
27567 return ir_const_void(ira, &instruction->base.base);
2664127568}
2664227569
26643static IrInstruction *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstructionPanic *instruction) {
26644 IrInstruction *msg = instruction->msg->child;
27570static IrInstGen *ir_analyze_instruction_panic(IrAnalyze *ira, IrInstSrcPanic *instruction) {
27571 IrInstGen *msg = instruction->msg->child;
2664527572 if (type_is_invalid(msg->value->type))
2664627573 return ir_unreach_error(ira);
2664727574
26648 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope)) {
26649 ir_add_error(ira, &instruction->base, buf_sprintf("encountered @panic at compile-time"));
27575 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope)) {
27576 ir_add_error(ira, &instruction->base.base, buf_sprintf("encountered @panic at compile-time"));
2665027577 return ir_unreach_error(ira);
2665127578 }
2665227579
2665327580 ZigType *u8_ptr_type = get_pointer_to_type_extra(ira->codegen, ira->codegen->builtin_types.entry_u8,
2665427581 true, false, PtrLenUnknown, 0, 0, 0, false);
2665527582 ZigType *str_type = get_slice_type(ira->codegen, u8_ptr_type);
26656 IrInstruction *casted_msg = ir_implicit_cast(ira, msg, str_type);
27583 IrInstGen *casted_msg = ir_implicit_cast(ira, msg, str_type);
2665727584 if (type_is_invalid(casted_msg->value->type))
2665827585 return ir_unreach_error(ira);
2665927586
26660 IrInstruction *new_instruction = ir_build_panic(&ira->new_irb, instruction->base.scope,
26661 instruction->base.source_node, casted_msg);
27587 IrInstGen *new_instruction = ir_build_panic_gen(ira, &instruction->base.base, casted_msg);
2666227588 return ir_finish_anal(ira, new_instruction);
2666327589}
2666427590
26665static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint32_t align_bytes, bool safety_check_on) {
27591static IrInstGen *ir_align_cast(IrAnalyze *ira, IrInstGen *target, uint32_t align_bytes, bool safety_check_on) {
2666627592 Error err;
2666727593
2666827594 ZigType *target_type = target->value->type;
......@@ -26674,7 +27600,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2667427600 if (target_type->id == ZigTypeIdPointer) {
2667527601 result_type = adjust_ptr_align(ira->codegen, target_type, align_bytes);
2667627602 if ((err = resolve_ptr_align(ira, target_type, &old_align_bytes)))
26677 return ira->codegen->invalid_instruction;
27603 return ira->codegen->invalid_inst_gen;
2667827604 } else if (target_type->id == ZigTypeIdFn) {
2667927605 FnTypeId fn_type_id = target_type->data.fn.fn_type_id;
2668027606 old_align_bytes = fn_type_id.alignment;
......@@ -26685,7 +27611,7 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2668527611 {
2668627612 ZigType *ptr_type = target_type->data.maybe.child_type;
2668727613 if ((err = resolve_ptr_align(ira, ptr_type, &old_align_bytes)))
26688 return ira->codegen->invalid_instruction;
27614 return ira->codegen->invalid_inst_gen;
2668927615 ZigType *better_ptr_type = adjust_ptr_align(ira->codegen, ptr_type, align_bytes);
2669027616
2669127617 result_type = get_optional_type(ira->codegen, better_ptr_type);
......@@ -26700,47 +27626,44 @@ static IrInstruction *ir_align_cast(IrAnalyze *ira, IrInstruction *target, uint3
2670027626 } else if (is_slice(target_type)) {
2670127627 ZigType *slice_ptr_type = target_type->data.structure.fields[slice_ptr_index]->type_entry;
2670227628 if ((err = resolve_ptr_align(ira, slice_ptr_type, &old_align_bytes)))
26703 return ira->codegen->invalid_instruction;
27629 return ira->codegen->invalid_inst_gen;
2670427630 ZigType *result_ptr_type = adjust_ptr_align(ira->codegen, slice_ptr_type, align_bytes);
2670527631 result_type = get_slice_type(ira->codegen, result_ptr_type);
2670627632 } else {
26707 ir_add_error(ira, target,
27633 ir_add_error(ira, &target->base,
2670827634 buf_sprintf("expected pointer or slice, found '%s'", buf_ptr(&target_type->name)));
26709 return ira->codegen->invalid_instruction;
27635 return ira->codegen->invalid_inst_gen;
2671027636 }
2671127637
2671227638 if (instr_is_comptime(target)) {
2671327639 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2671427640 if (!val)
26715 return ira->codegen->invalid_instruction;
27641 return ira->codegen->invalid_inst_gen;
2671627642
2671727643 if (val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr &&
2671827644 val->data.x_ptr.data.hard_coded_addr.addr % align_bytes != 0)
2671927645 {
26720 ir_add_error(ira, target,
27646 ir_add_error(ira, &target->base,
2672127647 buf_sprintf("pointer address 0x%" ZIG_PRI_x64 " is not aligned to %" PRIu32 " bytes",
2672227648 val->data.x_ptr.data.hard_coded_addr.addr, align_bytes));
26723 return ira->codegen->invalid_instruction;
27649 return ira->codegen->invalid_inst_gen;
2672427650 }
2672527651
26726 IrInstruction *result = ir_const(ira, target, result_type);
27652 IrInstGen *result = ir_const(ira, &target->base, result_type);
2672727653 copy_const_val(result->value, val);
2672827654 result->value->type = result_type;
2672927655 return result;
2673027656 }
2673127657
26732 IrInstruction *result;
2673327658 if (safety_check_on && align_bytes > old_align_bytes && align_bytes != 1) {
26734 result = ir_build_align_cast(&ira->new_irb, target->scope, target->source_node, nullptr, target);
27659 return ir_build_align_cast_gen(ira, target->base.scope, target->base.source_node, target, result_type);
2673527660 } else {
26736 result = ir_build_cast(&ira->new_irb, target->scope, target->source_node, result_type, target, CastOpNoop);
27661 return ir_build_cast(ira, &target->base, result_type, target, CastOpNoop);
2673727662 }
26738 result->value->type = result_type;
26739 return result;
2674027663}
2674127664
26742static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *ptr,
26743 ZigType *dest_type, IrInstruction *dest_type_src, bool safety_check_on)
27665static IrInstGen *ir_analyze_ptr_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *ptr,
27666 ZigType *dest_type, IrInst *dest_type_src, bool safety_check_on)
2674427667{
2674527668 Error err;
2674627669
......@@ -26756,44 +27679,44 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2675627679
2675727680 ZigType *src_ptr_type = get_src_ptr_type(src_type);
2675827681 if (src_ptr_type == nullptr) {
26759 ir_add_error(ira, ptr, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
26760 return ira->codegen->invalid_instruction;
27682 ir_add_error(ira, &ptr->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&src_type->name)));
27683 return ira->codegen->invalid_inst_gen;
2676127684 }
2676227685
2676327686 ZigType *dest_ptr_type = get_src_ptr_type(dest_type);
2676427687 if (dest_ptr_type == nullptr) {
2676527688 ir_add_error(ira, dest_type_src,
2676627689 buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
26767 return ira->codegen->invalid_instruction;
27690 return ira->codegen->invalid_inst_gen;
2676827691 }
2676927692
2677027693 if (get_ptr_const(src_type) && !get_ptr_const(dest_type)) {
2677127694 ir_add_error(ira, source_instr, buf_sprintf("cast discards const qualifier"));
26772 return ira->codegen->invalid_instruction;
27695 return ira->codegen->invalid_inst_gen;
2677327696 }
2677427697 uint32_t src_align_bytes;
2677527698 if ((err = resolve_ptr_align(ira, src_type, &src_align_bytes)))
26776 return ira->codegen->invalid_instruction;
27699 return ira->codegen->invalid_inst_gen;
2677727700
2677827701 uint32_t dest_align_bytes;
2677927702 if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))
26780 return ira->codegen->invalid_instruction;
27703 return ira->codegen->invalid_inst_gen;
2678127704
2678227705 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26783 return ira->codegen->invalid_instruction;
27706 return ira->codegen->invalid_inst_gen;
2678427707
2678527708 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
26786 return ira->codegen->invalid_instruction;
27709 return ira->codegen->invalid_inst_gen;
2678727710
2678827711 if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
2678927712 ErrorMsg *msg = ir_add_error(ira, source_instr,
2679027713 buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
2679127714 buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
26792 add_error_note(ira->codegen, msg, ptr->source_node,
27715 add_error_note(ira->codegen, msg, ptr->base.source_node,
2679327716 buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
2679427717 add_error_note(ira->codegen, msg, dest_type_src->source_node,
2679527718 buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
26796 return ira->codegen->invalid_instruction;
27719 return ira->codegen->invalid_inst_gen;
2679727720 }
2679827721
2679927722 if (instr_is_comptime(ptr)) {
......@@ -26801,7 +27724,7 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2680127724 UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;
2680227725 ZigValue *val = ir_resolve_const(ira, ptr, is_undef_allowed);
2680327726 if (!val)
26804 return ira->codegen->invalid_instruction;
27727 return ira->codegen->invalid_inst_gen;
2680527728
2680627729 if (value_is_comptime(val) && val->special != ConstValSpecialUndef) {
2680727730 bool is_addr_zero = val->data.x_ptr.special == ConstPtrSpecialNull ||
......@@ -26810,16 +27733,16 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2681027733 if (is_addr_zero && !dest_allows_addr_zero) {
2681127734 ir_add_error(ira, source_instr,
2681227735 buf_sprintf("null pointer casted to type '%s'", buf_ptr(&dest_type->name)));
26813 return ira->codegen->invalid_instruction;
27736 return ira->codegen->invalid_inst_gen;
2681427737 }
2681527738 }
2681627739
26817 IrInstruction *result;
27740 IrInstGen *result;
2681827741 if (ptr->value->data.x_ptr.mut == ConstPtrMutInfer) {
2681927742 result = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
2682027743
2682127744 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
26822 return ira->codegen->invalid_instruction;
27745 return ira->codegen->invalid_inst_gen;
2682327746 } else {
2682427747 result = ir_const(ira, source_instr, dest_type);
2682527748 }
......@@ -26837,40 +27760,40 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
2683727760
2683827761 if (dest_align_bytes > src_align_bytes) {
2683927762 ErrorMsg *msg = ir_add_error(ira, source_instr, buf_sprintf("cast increases pointer alignment"));
26840 add_error_note(ira->codegen, msg, ptr->source_node,
27763 add_error_note(ira->codegen, msg, ptr->base.source_node,
2684127764 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&src_type->name), src_align_bytes));
2684227765 add_error_note(ira->codegen, msg, dest_type_src->source_node,
2684327766 buf_sprintf("'%s' has alignment %" PRIu32, buf_ptr(&dest_type->name), dest_align_bytes));
26844 return ira->codegen->invalid_instruction;
27767 return ira->codegen->invalid_inst_gen;
2684527768 }
2684627769
26847 IrInstruction *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
27770 IrInstGen *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
2684827771
2684927772 // Keep the bigger alignment, it can only help-
2685027773 // unless the target is zero bits.
26851 IrInstruction *result;
27774 IrInstGen *result;
2685227775 if (src_align_bytes > dest_align_bytes && type_has_bits(dest_type)) {
2685327776 result = ir_align_cast(ira, casted_ptr, src_align_bytes, false);
2685427777 if (type_is_invalid(result->value->type))
26855 return ira->codegen->invalid_instruction;
27778 return ira->codegen->invalid_inst_gen;
2685627779 } else {
2685727780 result = casted_ptr;
2685827781 }
2685927782 return result;
2686027783}
2686127784
26862static IrInstruction *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstructionPtrCastSrc *instruction) {
26863 IrInstruction *dest_type_value = instruction->dest_type->child;
27785static IrInstGen *ir_analyze_instruction_ptr_cast(IrAnalyze *ira, IrInstSrcPtrCast *instruction) {
27786 IrInstGen *dest_type_value = instruction->dest_type->child;
2686427787 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2686527788 if (type_is_invalid(dest_type))
26866 return ira->codegen->invalid_instruction;
27789 return ira->codegen->invalid_inst_gen;
2686727790
26868 IrInstruction *ptr = instruction->ptr->child;
27791 IrInstGen *ptr = instruction->ptr->child;
2686927792 ZigType *src_type = ptr->value->type;
2687027793 if (type_is_invalid(src_type))
26871 return ira->codegen->invalid_instruction;
27794 return ira->codegen->invalid_inst_gen;
2687227795
26873 return ir_analyze_ptr_cast(ira, &instruction->base, ptr, dest_type, dest_type_value,
27796 return ir_analyze_ptr_cast(ira, &instruction->base.base, ptr, dest_type, &dest_type_value->base,
2687427797 instruction->safety_check_on);
2687527798}
2687627799
......@@ -27201,7 +28124,7 @@ static Error buf_read_value_bytes(IrAnalyze *ira, CodeGen *codegen, AstNode *sou
2720128124 zig_unreachable();
2720228125}
2720328126
27204static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *value,
28127static IrInstGen *ir_analyze_bit_cast(IrAnalyze *ira, IrInst* source_instr, IrInstGen *value,
2720528128 ZigType *dest_type)
2720628129{
2720728130 Error err;
......@@ -27217,14 +28140,14 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2721728140 buf_sprintf("cannot cast a value of type '%s'", buf_ptr(&dest_type->name)));
2721828141 add_error_note(ira->codegen, msg, source_instr->source_node,
2721928142 buf_sprintf("use @intToEnum for type coercion"));
27220 return ira->codegen->invalid_instruction;
28143 return ira->codegen->invalid_inst_gen;
2722128144 }
2722228145
2722328146 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusSizeKnown)))
27224 return ira->codegen->invalid_instruction;
28147 return ira->codegen->invalid_inst_gen;
2722528148
2722628149 if ((err = type_resolve(ira->codegen, src_type, ResolveStatusSizeKnown)))
27227 return ira->codegen->invalid_instruction;
28150 return ira->codegen->invalid_inst_gen;
2722828151
2722928152 uint64_t dest_size_bytes = type_size(ira->codegen, dest_type);
2723028153 uint64_t src_size_bytes = type_size(ira->codegen, src_type);
......@@ -27233,7 +28156,7 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2723328156 buf_sprintf("destination type '%s' has size %" ZIG_PRI_u64 " but source type '%s' has size %" ZIG_PRI_u64,
2723428157 buf_ptr(&dest_type->name), dest_size_bytes,
2723528158 buf_ptr(&src_type->name), src_size_bytes));
27236 return ira->codegen->invalid_instruction;
28159 return ira->codegen->invalid_inst_gen;
2723728160 }
2723828161
2723928162 uint64_t dest_size_bits = type_size_bits(ira->codegen, dest_type);
......@@ -27243,26 +28166,26 @@ static IrInstruction *ir_analyze_bit_cast(IrAnalyze *ira, IrInstruction *source_
2724328166 buf_sprintf("destination type '%s' has %" ZIG_PRI_u64 " bits but source type '%s' has %" ZIG_PRI_u64 " bits",
2724428167 buf_ptr(&dest_type->name), dest_size_bits,
2724528168 buf_ptr(&src_type->name), src_size_bits));
27246 return ira->codegen->invalid_instruction;
28169 return ira->codegen->invalid_inst_gen;
2724728170 }
2724828171
2724928172 if (instr_is_comptime(value)) {
2725028173 ZigValue *val = ir_resolve_const(ira, value, UndefBad);
2725128174 if (!val)
27252 return ira->codegen->invalid_instruction;
28175 return ira->codegen->invalid_inst_gen;
2725328176
27254 IrInstruction *result = ir_const(ira, source_instr, dest_type);
28177 IrInstGen *result = ir_const(ira, source_instr, dest_type);
2725528178 uint8_t *buf = allocate_nonzero<uint8_t>(src_size_bytes);
2725628179 buf_write_value_bytes(ira->codegen, buf, val);
2725728180 if ((err = buf_read_value_bytes(ira, ira->codegen, source_instr->source_node, buf, result->value)))
27258 return ira->codegen->invalid_instruction;
28181 return ira->codegen->invalid_inst_gen;
2725928182 return result;
2726028183 }
2726128184
2726228185 return ir_build_bit_cast_gen(ira, source_instr, value, dest_type);
2726328186}
2726428187
27265static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *source_instr, IrInstruction *target,
28188static IrInstGen *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInst* source_instr, IrInstGen *target,
2726628189 ZigType *ptr_type)
2726728190{
2726828191 Error err;
......@@ -27270,136 +28193,128 @@ static IrInstruction *ir_analyze_int_to_ptr(IrAnalyze *ira, IrInstruction *sourc
2727028193 ir_assert(get_src_ptr_type(ptr_type) != nullptr, source_instr);
2727128194 ir_assert(type_has_bits(ptr_type), source_instr);
2727228195
27273 IrInstruction *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
28196 IrInstGen *casted_int = ir_implicit_cast(ira, target, ira->codegen->builtin_types.entry_usize);
2727428197 if (type_is_invalid(casted_int->value->type))
27275 return ira->codegen->invalid_instruction;
28198 return ira->codegen->invalid_inst_gen;
2727628199
2727728200 if (instr_is_comptime(casted_int)) {
2727828201 ZigValue *val = ir_resolve_const(ira, casted_int, UndefBad);
2727928202 if (!val)
27280 return ira->codegen->invalid_instruction;
28203 return ira->codegen->invalid_inst_gen;
2728128204
2728228205 uint64_t addr = bigint_as_u64(&val->data.x_bigint);
2728328206 if (!ptr_allows_addr_zero(ptr_type) && addr == 0) {
2728428207 ir_add_error(ira, source_instr,
2728528208 buf_sprintf("pointer type '%s' does not allow address zero", buf_ptr(&ptr_type->name)));
27286 return ira->codegen->invalid_instruction;
28209 return ira->codegen->invalid_inst_gen;
2728728210 }
2728828211
2728928212 uint32_t align_bytes;
2729028213 if ((err = resolve_ptr_align(ira, ptr_type, &align_bytes)))
27291 return ira->codegen->invalid_instruction;
28214 return ira->codegen->invalid_inst_gen;
2729228215
2729328216 if (addr != 0 && addr % align_bytes != 0) {
2729428217 ir_add_error(ira, source_instr,
2729528218 buf_sprintf("pointer type '%s' requires aligned address",
2729628219 buf_ptr(&ptr_type->name)));
27297 return ira->codegen->invalid_instruction;
28220 return ira->codegen->invalid_inst_gen;
2729828221 }
2729928222
27300 IrInstruction *result = ir_const(ira, source_instr, ptr_type);
28223 IrInstGen *result = ir_const(ira, source_instr, ptr_type);
2730128224 result->value->data.x_ptr.special = ConstPtrSpecialHardCodedAddr;
2730228225 result->value->data.x_ptr.mut = ConstPtrMutRuntimeVar;
2730328226 result->value->data.x_ptr.data.hard_coded_addr.addr = addr;
2730428227 return result;
2730528228 }
2730628229
27307 IrInstruction *result = ir_build_int_to_ptr(&ira->new_irb, source_instr->scope,
27308 source_instr->source_node, nullptr, casted_int);
27309 result->value->type = ptr_type;
27310 return result;
28230 return ir_build_int_to_ptr_gen(ira, source_instr->scope, source_instr->source_node, casted_int, ptr_type);
2731128231}
2731228232
27313static IrInstruction *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstructionIntToPtr *instruction) {
28233static IrInstGen *ir_analyze_instruction_int_to_ptr(IrAnalyze *ira, IrInstSrcIntToPtr *instruction) {
2731428234 Error err;
27315 IrInstruction *dest_type_value = instruction->dest_type->child;
28235 IrInstGen *dest_type_value = instruction->dest_type->child;
2731628236 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2731728237 if (type_is_invalid(dest_type))
27318 return ira->codegen->invalid_instruction;
28238 return ira->codegen->invalid_inst_gen;
2731928239
2732028240 // We explicitly check for the size, so we can use get_src_ptr_type
2732128241 if (get_src_ptr_type(dest_type) == nullptr) {
27322 ir_add_error(ira, dest_type_value, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
27323 return ira->codegen->invalid_instruction;
28242 ir_add_error(ira, &dest_type_value->base, buf_sprintf("expected pointer, found '%s'", buf_ptr(&dest_type->name)));
28243 return ira->codegen->invalid_inst_gen;
2732428244 }
2732528245
2732628246 bool has_bits;
2732728247 if ((err = type_has_bits2(ira->codegen, dest_type, &has_bits)))
27328 return ira->codegen->invalid_instruction;
28248 return ira->codegen->invalid_inst_gen;
2732928249
2733028250 if (!has_bits) {
27331 ir_add_error(ira, dest_type_value,
28251 ir_add_error(ira, &dest_type_value->base,
2733228252 buf_sprintf("type '%s' has 0 bits and cannot store information", buf_ptr(&dest_type->name)));
27333 return ira->codegen->invalid_instruction;
28253 return ira->codegen->invalid_inst_gen;
2733428254 }
2733528255
27336 IrInstruction *target = instruction->target->child;
28256 IrInstGen *target = instruction->target->child;
2733728257 if (type_is_invalid(target->value->type))
27338 return ira->codegen->invalid_instruction;
28258 return ira->codegen->invalid_inst_gen;
2733928259
27340 return ir_analyze_int_to_ptr(ira, &instruction->base, target, dest_type);
28260 return ir_analyze_int_to_ptr(ira, &instruction->base.base, target, dest_type);
2734128261}
2734228262
27343static IrInstruction *ir_analyze_instruction_decl_ref(IrAnalyze *ira,
27344 IrInstructionDeclRef *instruction)
27345{
27346 IrInstruction *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base, instruction->tld);
28263static IrInstGen *ir_analyze_instruction_decl_ref(IrAnalyze *ira, IrInstSrcDeclRef *instruction) {
28264 IrInstGen *ref_instruction = ir_analyze_decl_ref(ira, &instruction->base.base, instruction->tld);
2734728265 if (type_is_invalid(ref_instruction->value->type)) {
27348 return ira->codegen->invalid_instruction;
28266 return ira->codegen->invalid_inst_gen;
2734928267 }
2735028268
2735128269 if (instruction->lval == LValPtr) {
2735228270 return ref_instruction;
2735328271 } else {
27354 return ir_get_deref(ira, &instruction->base, ref_instruction, nullptr);
28272 return ir_get_deref(ira, &instruction->base.base, ref_instruction, nullptr);
2735528273 }
2735628274}
2735728275
27358static IrInstruction *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstructionPtrToInt *instruction) {
28276static IrInstGen *ir_analyze_instruction_ptr_to_int(IrAnalyze *ira, IrInstSrcPtrToInt *instruction) {
2735928277 Error err;
27360 IrInstruction *target = instruction->target->child;
28278 IrInstGen *target = instruction->target->child;
2736128279 if (type_is_invalid(target->value->type))
27362 return ira->codegen->invalid_instruction;
28280 return ira->codegen->invalid_inst_gen;
2736328281
2736428282 ZigType *usize = ira->codegen->builtin_types.entry_usize;
2736528283
2736628284 // We check size explicitly so we can use get_src_ptr_type here.
2736728285 if (get_src_ptr_type(target->value->type) == nullptr) {
27368 ir_add_error(ira, target,
28286 ir_add_error(ira, &target->base,
2736928287 buf_sprintf("expected pointer, found '%s'", buf_ptr(&target->value->type->name)));
27370 return ira->codegen->invalid_instruction;
28288 return ira->codegen->invalid_inst_gen;
2737128289 }
2737228290
2737328291 bool has_bits;
2737428292 if ((err = type_has_bits2(ira->codegen, target->value->type, &has_bits)))
27375 return ira->codegen->invalid_instruction;
28293 return ira->codegen->invalid_inst_gen;
2737628294
2737728295 if (!has_bits) {
27378 ir_add_error(ira, target,
28296 ir_add_error(ira, &target->base,
2737928297 buf_sprintf("pointer to size 0 type has no address"));
27380 return ira->codegen->invalid_instruction;
28298 return ira->codegen->invalid_inst_gen;
2738128299 }
2738228300
2738328301 if (instr_is_comptime(target)) {
2738428302 ZigValue *val = ir_resolve_const(ira, target, UndefBad);
2738528303 if (!val)
27386 return ira->codegen->invalid_instruction;
28304 return ira->codegen->invalid_inst_gen;
2738728305 if (val->type->id == ZigTypeIdPointer && val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr) {
27388 IrInstruction *result = ir_const(ira, &instruction->base, usize);
28306 IrInstGen *result = ir_const(ira, &instruction->base.base, usize);
2738928307 bigint_init_unsigned(&result->value->data.x_bigint, val->data.x_ptr.data.hard_coded_addr.addr);
2739028308 result->value->type = usize;
2739128309 return result;
2739228310 }
2739328311 }
2739428312
27395 IrInstruction *result = ir_build_ptr_to_int(&ira->new_irb, instruction->base.scope,
27396 instruction->base.source_node, target);
27397 result->value->type = usize;
27398 return result;
28313 return ir_build_ptr_to_int_gen(ira, &instruction->base.base, target);
2739928314}
2740028315
27401static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstructionPtrType *instruction) {
27402 IrInstruction *result = ir_const(ira, &instruction->base, ira->codegen->builtin_types.entry_type);
28316static IrInstGen *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstSrcPtrType *instruction) {
28317 IrInstGen *result = ir_const(ira, &instruction->base.base, ira->codegen->builtin_types.entry_type);
2740328318 result->value->special = ConstValSpecialLazy;
2740428319
2740528320 LazyValuePtrType *lazy_ptr_type = allocate<LazyValuePtrType>(1, "LazyValuePtrType");
......@@ -27410,17 +28325,17 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
2741028325 if (instruction->sentinel != nullptr) {
2741128326 lazy_ptr_type->sentinel = instruction->sentinel->child;
2741228327 if (ir_resolve_const(ira, lazy_ptr_type->sentinel, LazyOk) == nullptr)
27413 return ira->codegen->invalid_instruction;
28328 return ira->codegen->invalid_inst_gen;
2741428329 }
2741528330
2741628331 lazy_ptr_type->elem_type = instruction->child_type->child;
2741728332 if (ir_resolve_type_lazy(ira, lazy_ptr_type->elem_type) == nullptr)
27418 return ira->codegen->invalid_instruction;
28333 return ira->codegen->invalid_inst_gen;
2741928334
2742028335 if (instruction->align_value != nullptr) {
2742128336 lazy_ptr_type->align_inst = instruction->align_value->child;
2742228337 if (ir_resolve_const(ira, lazy_ptr_type->align_inst, LazyOk) == nullptr)
27423 return ira->codegen->invalid_instruction;
28338 return ira->codegen->invalid_inst_gen;
2742428339 }
2742528340
2742628341 lazy_ptr_type->ptr_len = instruction->ptr_len;
......@@ -27433,10 +28348,10 @@ static IrInstruction *ir_analyze_instruction_ptr_type(IrAnalyze *ira, IrInstruct
2743328348 return result;
2743428349}
2743528350
27436static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstructionAlignCast *instruction) {
27437 IrInstruction *target = instruction->target->child;
28351static IrInstGen *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstSrcAlignCast *instruction) {
28352 IrInstGen *target = instruction->target->child;
2743828353 if (type_is_invalid(target->value->type))
27439 return ira->codegen->invalid_instruction;
28354 return ira->codegen->invalid_inst_gen;
2744028355
2744128356 ZigType *elem_type = nullptr;
2744228357 if (is_slice(target->value->type)) {
......@@ -27447,192 +28362,192 @@ static IrInstruction *ir_analyze_instruction_align_cast(IrAnalyze *ira, IrInstru
2744728362 }
2744828363
2744928364 uint32_t align_bytes;
27450 IrInstruction *align_bytes_inst = instruction->align_bytes->child;
28365 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
2745128366 if (!ir_resolve_align(ira, align_bytes_inst, elem_type, &align_bytes))
27452 return ira->codegen->invalid_instruction;
28367 return ira->codegen->invalid_inst_gen;
2745328368
27454 IrInstruction *result = ir_align_cast(ira, target, align_bytes, true);
28369 IrInstGen *result = ir_align_cast(ira, target, align_bytes, true);
2745528370 if (type_is_invalid(result->value->type))
27456 return ira->codegen->invalid_instruction;
28371 return ira->codegen->invalid_inst_gen;
2745728372
2745828373 return result;
2745928374}
2746028375
27461static IrInstruction *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstructionOpaqueType *instruction) {
28376static IrInstGen *ir_analyze_instruction_opaque_type(IrAnalyze *ira, IrInstSrcOpaqueType *instruction) {
2746228377 Buf *bare_name = buf_alloc();
27463 Buf *full_name = get_anon_type_name(ira->codegen, ira->new_irb.exec, "opaque",
27464 instruction->base.scope, instruction->base.source_node, bare_name);
27465 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.scope, instruction->base.source_node,
27466 buf_ptr(full_name), bare_name);
27467 return ir_const_type(ira, &instruction->base, result_type);
28378 Buf *full_name = get_anon_type_name(ira->codegen, ira->old_irb.exec, "opaque",
28379 instruction->base.base.scope, instruction->base.base.source_node, bare_name);
28380 ZigType *result_type = get_opaque_type(ira->codegen, instruction->base.base.scope,
28381 instruction->base.base.source_node, buf_ptr(full_name), bare_name);
28382 return ir_const_type(ira, &instruction->base.base, result_type);
2746828383}
2746928384
27470static IrInstruction *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstructionSetAlignStack *instruction) {
28385static IrInstGen *ir_analyze_instruction_set_align_stack(IrAnalyze *ira, IrInstSrcSetAlignStack *instruction) {
2747128386 uint32_t align_bytes;
27472 IrInstruction *align_bytes_inst = instruction->align_bytes->child;
28387 IrInstGen *align_bytes_inst = instruction->align_bytes->child;
2747328388 if (!ir_resolve_align(ira, align_bytes_inst, nullptr, &align_bytes))
27474 return ira->codegen->invalid_instruction;
28389 return ira->codegen->invalid_inst_gen;
2747528390
2747628391 if (align_bytes > 256) {
27477 ir_add_error(ira, &instruction->base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
27478 return ira->codegen->invalid_instruction;
28392 ir_add_error(ira, &instruction->base.base, buf_sprintf("attempt to @setAlignStack(%" PRIu32 "); maximum is 256", align_bytes));
28393 return ira->codegen->invalid_inst_gen;
2747928394 }
2748028395
27481 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28396 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
2748228397 if (fn_entry == nullptr) {
27483 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack outside function"));
27484 return ira->codegen->invalid_instruction;
28398 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack outside function"));
28399 return ira->codegen->invalid_inst_gen;
2748528400 }
2748628401 if (fn_entry->type_entry->data.fn.fn_type_id.cc == CallingConventionNaked) {
27487 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in naked function"));
27488 return ira->codegen->invalid_instruction;
28402 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in naked function"));
28403 return ira->codegen->invalid_inst_gen;
2748928404 }
2749028405
2749128406 if (fn_entry->fn_inline == FnInlineAlways) {
27492 ir_add_error(ira, &instruction->base, buf_sprintf("@setAlignStack in inline function"));
27493 return ira->codegen->invalid_instruction;
28407 ir_add_error(ira, &instruction->base.base, buf_sprintf("@setAlignStack in inline function"));
28408 return ira->codegen->invalid_inst_gen;
2749428409 }
2749528410
2749628411 if (fn_entry->set_alignstack_node != nullptr) {
27497 ErrorMsg *msg = ir_add_error_node(ira, instruction->base.source_node,
28412 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2749828413 buf_sprintf("alignstack set twice"));
2749928414 add_error_note(ira->codegen, msg, fn_entry->set_alignstack_node, buf_sprintf("first set here"));
27500 return ira->codegen->invalid_instruction;
28415 return ira->codegen->invalid_inst_gen;
2750128416 }
2750228417
27503 fn_entry->set_alignstack_node = instruction->base.source_node;
28418 fn_entry->set_alignstack_node = instruction->base.base.source_node;
2750428419 fn_entry->alignstack_value = align_bytes;
2750528420
27506 return ir_const_void(ira, &instruction->base);
28421 return ir_const_void(ira, &instruction->base.base);
2750728422}
2750828423
27509static IrInstruction *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstructionArgType *instruction) {
27510 IrInstruction *fn_type_inst = instruction->fn_type->child;
28424static IrInstGen *ir_analyze_instruction_arg_type(IrAnalyze *ira, IrInstSrcArgType *instruction) {
28425 IrInstGen *fn_type_inst = instruction->fn_type->child;
2751128426 ZigType *fn_type = ir_resolve_type(ira, fn_type_inst);
2751228427 if (type_is_invalid(fn_type))
27513 return ira->codegen->invalid_instruction;
28428 return ira->codegen->invalid_inst_gen;
2751428429
27515 IrInstruction *arg_index_inst = instruction->arg_index->child;
28430 IrInstGen *arg_index_inst = instruction->arg_index->child;
2751628431 uint64_t arg_index;
2751728432 if (!ir_resolve_usize(ira, arg_index_inst, &arg_index))
27518 return ira->codegen->invalid_instruction;
28433 return ira->codegen->invalid_inst_gen;
2751928434
2752028435 if (fn_type->id == ZigTypeIdBoundFn) {
2752128436 fn_type = fn_type->data.bound_fn.fn_type;
2752228437 arg_index += 1;
2752328438 }
2752428439 if (fn_type->id != ZigTypeIdFn) {
27525 ir_add_error(ira, fn_type_inst, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
27526 return ira->codegen->invalid_instruction;
28440 ir_add_error(ira, &fn_type_inst->base, buf_sprintf("expected function, found '%s'", buf_ptr(&fn_type->name)));
28441 return ira->codegen->invalid_inst_gen;
2752728442 }
2752828443
2752928444 FnTypeId *fn_type_id = &fn_type->data.fn.fn_type_id;
2753028445 if (arg_index >= fn_type_id->param_count) {
2753128446 if (instruction->allow_var) {
2753228447 // TODO remove this with var args
27533 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
28448 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
2753428449 }
27535 ir_add_error(ira, arg_index_inst,
28450 ir_add_error(ira, &arg_index_inst->base,
2753628451 buf_sprintf("arg index %" ZIG_PRI_u64 " out of bounds; '%s' has %" ZIG_PRI_usize " arguments",
2753728452 arg_index, buf_ptr(&fn_type->name), fn_type_id->param_count));
27538 return ira->codegen->invalid_instruction;
28453 return ira->codegen->invalid_inst_gen;
2753928454 }
2754028455
2754128456 ZigType *result_type = fn_type_id->param_info[arg_index].type;
2754228457 if (result_type == nullptr) {
2754328458 // Args are only unresolved if our function is generic.
27544 ir_assert(fn_type->data.fn.is_generic, &instruction->base);
28459 ir_assert(fn_type->data.fn.is_generic, &instruction->base.base);
2754528460
2754628461 if (instruction->allow_var) {
27547 return ir_const_type(ira, &instruction->base, ira->codegen->builtin_types.entry_var);
28462 return ir_const_type(ira, &instruction->base.base, ira->codegen->builtin_types.entry_var);
2754828463 } else {
27549 ir_add_error(ira, arg_index_inst,
28464 ir_add_error(ira, &arg_index_inst->base,
2755028465 buf_sprintf("@ArgType could not resolve the type of arg %" ZIG_PRI_u64 " because '%s' is generic",
2755128466 arg_index, buf_ptr(&fn_type->name)));
27552 return ira->codegen->invalid_instruction;
28467 return ira->codegen->invalid_inst_gen;
2755328468 }
2755428469 }
27555 return ir_const_type(ira, &instruction->base, result_type);
28470 return ir_const_type(ira, &instruction->base.base, result_type);
2755628471}
2755728472
27558static IrInstruction *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstructionTagType *instruction) {
28473static IrInstGen *ir_analyze_instruction_tag_type(IrAnalyze *ira, IrInstSrcTagType *instruction) {
2755928474 Error err;
27560 IrInstruction *target_inst = instruction->target->child;
28475 IrInstGen *target_inst = instruction->target->child;
2756128476 ZigType *enum_type = ir_resolve_type(ira, target_inst);
2756228477 if (type_is_invalid(enum_type))
27563 return ira->codegen->invalid_instruction;
28478 return ira->codegen->invalid_inst_gen;
2756428479
2756528480 if (enum_type->id == ZigTypeIdEnum) {
2756628481 if ((err = type_resolve(ira->codegen, enum_type, ResolveStatusSizeKnown)))
27567 return ira->codegen->invalid_instruction;
28482 return ira->codegen->invalid_inst_gen;
2756828483
27569 return ir_const_type(ira, &instruction->base, enum_type->data.enumeration.tag_int_type);
28484 return ir_const_type(ira, &instruction->base.base, enum_type->data.enumeration.tag_int_type);
2757028485 } else if (enum_type->id == ZigTypeIdUnion) {
27571 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target, enum_type);
28486 ZigType *tag_type = ir_resolve_union_tag_type(ira, instruction->target->base.source_node, enum_type);
2757228487 if (type_is_invalid(tag_type))
27573 return ira->codegen->invalid_instruction;
27574 return ir_const_type(ira, &instruction->base, tag_type);
28488 return ira->codegen->invalid_inst_gen;
28489 return ir_const_type(ira, &instruction->base.base, tag_type);
2757528490 } else {
27576 ir_add_error(ira, target_inst, buf_sprintf("expected enum or union, found '%s'",
28491 ir_add_error(ira, &target_inst->base, buf_sprintf("expected enum or union, found '%s'",
2757728492 buf_ptr(&enum_type->name)));
27578 return ira->codegen->invalid_instruction;
28493 return ira->codegen->invalid_inst_gen;
2757928494 }
2758028495}
2758128496
27582static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op) {
28497static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op) {
2758328498 ZigType *operand_type = ir_resolve_type(ira, op);
2758428499 if (type_is_invalid(operand_type))
2758528500 return ira->codegen->builtin_types.entry_invalid;
2758628501
2758728502 if (operand_type->id == ZigTypeIdInt) {
2758828503 if (operand_type->data.integral.bit_count < 8) {
27589 ir_add_error(ira, op,
28504 ir_add_error(ira, &op->base,
2759028505 buf_sprintf("expected integer type 8 bits or larger, found %" PRIu32 "-bit integer type",
2759128506 operand_type->data.integral.bit_count));
2759228507 return ira->codegen->builtin_types.entry_invalid;
2759328508 }
2759428509 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2759528510 if (operand_type->data.integral.bit_count > max_atomic_bits) {
27596 ir_add_error(ira, op,
28511 ir_add_error(ira, &op->base,
2759728512 buf_sprintf("expected %" PRIu32 "-bit integer type or smaller, found %" PRIu32 "-bit integer type",
2759828513 max_atomic_bits, operand_type->data.integral.bit_count));
2759928514 return ira->codegen->builtin_types.entry_invalid;
2760028515 }
2760128516 if (!is_power_of_2(operand_type->data.integral.bit_count)) {
27602 ir_add_error(ira, op,
28517 ir_add_error(ira, &op->base,
2760328518 buf_sprintf("%" PRIu32 "-bit integer type is not a power of 2", operand_type->data.integral.bit_count));
2760428519 return ira->codegen->builtin_types.entry_invalid;
2760528520 }
2760628521 } else if (operand_type->id == ZigTypeIdEnum) {
2760728522 ZigType *int_type = operand_type->data.enumeration.tag_int_type;
2760828523 if (int_type->data.integral.bit_count < 8) {
27609 ir_add_error(ira, op,
28524 ir_add_error(ira, &op->base,
2761028525 buf_sprintf("expected enum tag type 8 bits or larger, found %" PRIu32 "-bit tag type",
2761128526 int_type->data.integral.bit_count));
2761228527 return ira->codegen->builtin_types.entry_invalid;
2761328528 }
2761428529 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2761528530 if (int_type->data.integral.bit_count > max_atomic_bits) {
27616 ir_add_error(ira, op,
28531 ir_add_error(ira, &op->base,
2761728532 buf_sprintf("expected %" PRIu32 "-bit enum tag type or smaller, found %" PRIu32 "-bit tag type",
2761828533 max_atomic_bits, int_type->data.integral.bit_count));
2761928534 return ira->codegen->builtin_types.entry_invalid;
2762028535 }
2762128536 if (!is_power_of_2(int_type->data.integral.bit_count)) {
27622 ir_add_error(ira, op,
28537 ir_add_error(ira, &op->base,
2762328538 buf_sprintf("%" PRIu32 "-bit enum tag type is not a power of 2", int_type->data.integral.bit_count));
2762428539 return ira->codegen->builtin_types.entry_invalid;
2762528540 }
2762628541 } else if (operand_type->id == ZigTypeIdFloat) {
2762728542 uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch);
2762828543 if (operand_type->data.floating.bit_count > max_atomic_bits) {
27629 ir_add_error(ira, op,
28544 ir_add_error(ira, &op->base,
2763028545 buf_sprintf("expected %" PRIu32 "-bit float or smaller, found %" PRIu32 "-bit float",
2763128546 max_atomic_bits, (uint32_t) operand_type->data.floating.bit_count));
2763228547 return ira->codegen->builtin_types.entry_invalid;
2763328548 }
2763428549 } else if (get_codegen_ptr_type(operand_type) == nullptr) {
27635 ir_add_error(ira, op,
28550 ir_add_error(ira, &op->base,
2763628551 buf_sprintf("expected integer, float, enum or pointer type, found '%s'", buf_ptr(&operand_type->name)));
2763728552 return ira->codegen->builtin_types.entry_invalid;
2763828553 }
......@@ -27640,172 +28555,146 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstruction *op
2764028555 return operand_type;
2764128556}
2764228557
27643static IrInstruction *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstructionAtomicRmw *instruction) {
28558static IrInstGen *ir_analyze_instruction_atomic_rmw(IrAnalyze *ira, IrInstSrcAtomicRmw *instruction) {
2764428559 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2764528560 if (type_is_invalid(operand_type))
27646 return ira->codegen->invalid_instruction;
28561 return ira->codegen->invalid_inst_gen;
2764728562
27648 IrInstruction *ptr_inst = instruction->ptr->child;
28563 IrInstGen *ptr_inst = instruction->ptr->child;
2764928564 if (type_is_invalid(ptr_inst->value->type))
27650 return ira->codegen->invalid_instruction;
28565 return ira->codegen->invalid_inst_gen;
2765128566
2765228567 // TODO let this be volatile
2765328568 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27654 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28569 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2765528570 if (type_is_invalid(casted_ptr->value->type))
27656 return ira->codegen->invalid_instruction;
28571 return ira->codegen->invalid_inst_gen;
2765728572
2765828573 AtomicRmwOp op;
27659 if (instruction->op == nullptr) {
27660 op = instruction->resolved_op;
27661 } else {
27662 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
27663 return ira->codegen->invalid_instruction;
27664 }
28574 if (!ir_resolve_atomic_rmw_op(ira, instruction->op->child, &op)) {
28575 return ira->codegen->invalid_inst_gen;
2766528576 }
2766628577
2766728578 if (operand_type->id == ZigTypeIdEnum && op != AtomicRmwOp_xchg) {
27668 ir_add_error(ira, instruction->op,
28579 ir_add_error(ira, &instruction->op->base,
2766928580 buf_sprintf("@atomicRmw on enum only works with .Xchg"));
27670 return ira->codegen->invalid_instruction;
28581 return ira->codegen->invalid_inst_gen;
2767128582 } else if (operand_type->id == ZigTypeIdFloat && op > AtomicRmwOp_sub) {
27672 ir_add_error(ira, instruction->op,
28583 ir_add_error(ira, &instruction->op->base,
2767328584 buf_sprintf("@atomicRmw with float only works with .Xchg, .Add and .Sub"));
27674 return ira->codegen->invalid_instruction;
28585 return ira->codegen->invalid_inst_gen;
2767528586 }
2767628587
27677 IrInstruction *operand = instruction->operand->child;
28588 IrInstGen *operand = instruction->operand->child;
2767828589 if (type_is_invalid(operand->value->type))
27679 return ira->codegen->invalid_instruction;
28590 return ira->codegen->invalid_inst_gen;
2768028591
27681 IrInstruction *casted_operand = ir_implicit_cast(ira, operand, operand_type);
28592 IrInstGen *casted_operand = ir_implicit_cast(ira, operand, operand_type);
2768228593 if (type_is_invalid(casted_operand->value->type))
27683 return ira->codegen->invalid_instruction;
28594 return ira->codegen->invalid_inst_gen;
2768428595
2768528596 AtomicOrder ordering;
27686 if (instruction->ordering == nullptr) {
27687 ordering = instruction->resolved_ordering;
27688 } else {
27689 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27690 return ira->codegen->invalid_instruction;
27691 if (ordering == AtomicOrderUnordered) {
27692 ir_add_error(ira, instruction->ordering,
27693 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
27694 return ira->codegen->invalid_instruction;
27695 }
28597 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28598 return ira->codegen->invalid_inst_gen;
28599 if (ordering == AtomicOrderUnordered) {
28600 ir_add_error(ira, &instruction->ordering->base,
28601 buf_sprintf("@atomicRmw atomic ordering must not be Unordered"));
28602 return ira->codegen->invalid_inst_gen;
2769628603 }
2769728604
2769828605 if (instr_is_comptime(casted_operand) && instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut == ConstPtrMutComptimeVar)
2769928606 {
27700 zig_panic("TODO compile-time execution of atomicRmw");
28607 ir_add_error(ira, &instruction->base.base,
28608 buf_sprintf("compiler bug: TODO compile-time execution of @atomicRmw"));
28609 return ira->codegen->invalid_inst_gen;
2770128610 }
2770228611
27703 IrInstruction *result = ir_build_atomic_rmw(&ira->new_irb, instruction->base.scope,
27704 instruction->base.source_node, nullptr, casted_ptr, nullptr, casted_operand, nullptr,
27705 op, ordering);
27706 result->value->type = operand_type;
27707 return result;
28612 return ir_build_atomic_rmw_gen(ira, &instruction->base.base, casted_ptr, casted_operand, op,
28613 ordering, operand_type);
2770828614}
2770928615
27710static IrInstruction *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstructionAtomicLoad *instruction) {
28616static IrInstGen *ir_analyze_instruction_atomic_load(IrAnalyze *ira, IrInstSrcAtomicLoad *instruction) {
2771128617 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2771228618 if (type_is_invalid(operand_type))
27713 return ira->codegen->invalid_instruction;
28619 return ira->codegen->invalid_inst_gen;
2771428620
27715 IrInstruction *ptr_inst = instruction->ptr->child;
28621 IrInstGen *ptr_inst = instruction->ptr->child;
2771628622 if (type_is_invalid(ptr_inst->value->type))
27717 return ira->codegen->invalid_instruction;
28623 return ira->codegen->invalid_inst_gen;
2771828624
2771928625 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, true);
27720 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28626 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2772128627 if (type_is_invalid(casted_ptr->value->type))
27722 return ira->codegen->invalid_instruction;
28628 return ira->codegen->invalid_inst_gen;
2772328629
2772428630 AtomicOrder ordering;
27725 if (instruction->ordering == nullptr) {
27726 ordering = instruction->resolved_ordering;
27727 } else {
27728 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27729 return ira->codegen->invalid_instruction;
27730 }
28631 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28632 return ira->codegen->invalid_inst_gen;
2773128633
2773228634 if (ordering == AtomicOrderRelease || ordering == AtomicOrderAcqRel) {
27733 ir_assert(instruction->ordering != nullptr, &instruction->base);
27734 ir_add_error(ira, instruction->ordering,
28635 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
28636 ir_add_error(ira, &instruction->ordering->base,
2773528637 buf_sprintf("@atomicLoad atomic ordering must not be Release or AcqRel"));
27736 return ira->codegen->invalid_instruction;
28638 return ira->codegen->invalid_inst_gen;
2773728639 }
2773828640
2773928641 if (instr_is_comptime(casted_ptr)) {
27740 IrInstruction *result = ir_get_deref(ira, &instruction->base, casted_ptr, nullptr);
27741 ir_assert(result->value->type != nullptr, &instruction->base);
28642 IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr);
28643 ir_assert(result->value->type != nullptr, &instruction->base.base);
2774228644 return result;
2774328645 }
2774428646
27745 IrInstruction *result = ir_build_atomic_load(&ira->new_irb, instruction->base.scope,
27746 instruction->base.source_node, nullptr, casted_ptr, nullptr, ordering);
27747 result->value->type = operand_type;
27748 return result;
28647 return ir_build_atomic_load_gen(ira, &instruction->base.base, casted_ptr, ordering, operand_type);
2774928648}
2775028649
27751static IrInstruction *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstructionAtomicStore *instruction) {
28650static IrInstGen *ir_analyze_instruction_atomic_store(IrAnalyze *ira, IrInstSrcAtomicStore *instruction) {
2775228651 ZigType *operand_type = ir_resolve_atomic_operand_type(ira, instruction->operand_type->child);
2775328652 if (type_is_invalid(operand_type))
27754 return ira->codegen->invalid_instruction;
28653 return ira->codegen->invalid_inst_gen;
2775528654
27756 IrInstruction *ptr_inst = instruction->ptr->child;
28655 IrInstGen *ptr_inst = instruction->ptr->child;
2775728656 if (type_is_invalid(ptr_inst->value->type))
27758 return ira->codegen->invalid_instruction;
28657 return ira->codegen->invalid_inst_gen;
2775928658
2776028659 ZigType *ptr_type = get_pointer_to_type(ira->codegen, operand_type, false);
27761 IrInstruction *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
28660 IrInstGen *casted_ptr = ir_implicit_cast(ira, ptr_inst, ptr_type);
2776228661 if (type_is_invalid(casted_ptr->value->type))
27763 return ira->codegen->invalid_instruction;
28662 return ira->codegen->invalid_inst_gen;
2776428663
27765 IrInstruction *value = instruction->value->child;
28664 IrInstGen *value = instruction->value->child;
2776628665 if (type_is_invalid(value->value->type))
27767 return ira->codegen->invalid_instruction;
28666 return ira->codegen->invalid_inst_gen;
2776828667
27769 IrInstruction *casted_value = ir_implicit_cast(ira, value, operand_type);
28668 IrInstGen *casted_value = ir_implicit_cast(ira, value, operand_type);
2777028669 if (type_is_invalid(casted_value->value->type))
27771 return ira->codegen->invalid_instruction;
28670 return ira->codegen->invalid_inst_gen;
2777228671
2777328672
2777428673 AtomicOrder ordering;
27775 if (instruction->ordering == nullptr) {
27776 ordering = instruction->resolved_ordering;
27777 } else {
27778 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
27779 return ira->codegen->invalid_instruction;
27780 }
28674 if (!ir_resolve_atomic_order(ira, instruction->ordering->child, &ordering))
28675 return ira->codegen->invalid_inst_gen;
2778128676
2778228677 if (ordering == AtomicOrderAcquire || ordering == AtomicOrderAcqRel) {
27783 ir_assert(instruction->ordering != nullptr, &instruction->base);
27784 ir_add_error(ira, instruction->ordering,
28678 ir_assert(instruction->ordering != nullptr, &instruction->base.base);
28679 ir_add_error(ira, &instruction->ordering->base,
2778528680 buf_sprintf("@atomicStore atomic ordering must not be Acquire or AcqRel"));
27786 return ira->codegen->invalid_instruction;
28681 return ira->codegen->invalid_inst_gen;
2778728682 }
2778828683
2778928684 if (instr_is_comptime(casted_value) && instr_is_comptime(casted_ptr)) {
27790 IrInstruction *result = ir_analyze_store_ptr(ira, &instruction->base, casted_ptr, value, false);
28685 IrInstGen *result = ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, value, false);
2779128686 result->value->type = ira->codegen->builtin_types.entry_void;
2779228687 return result;
2779328688 }
2779428689
27795 IrInstruction *result = ir_build_atomic_store(&ira->new_irb, instruction->base.scope,
27796 instruction->base.source_node, nullptr, casted_ptr, casted_value, nullptr, ordering);
27797 result->value->type = ira->codegen->builtin_types.entry_void;
27798 return result;
28690 return ir_build_atomic_store_gen(ira, &instruction->base.base, casted_ptr, casted_value, ordering);
2779928691}
2780028692
27801static IrInstruction *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstructionSaveErrRetAddr *instruction) {
27802 IrInstruction *result = ir_build_save_err_ret_addr(&ira->new_irb, instruction->base.scope,
27803 instruction->base.source_node);
27804 result->value->type = ira->codegen->builtin_types.entry_void;
27805 return result;
28693static IrInstGen *ir_analyze_instruction_save_err_ret_addr(IrAnalyze *ira, IrInstSrcSaveErrRetAddr *instruction) {
28694 return ir_build_save_err_ret_addr_gen(ira, &instruction->base.base);
2780628695}
2780728696
27808static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, BuiltinFnId fop, ZigType *float_type,
28697static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInst* source_instr, BuiltinFnId fop, ZigType *float_type,
2780928698 ZigValue *op, ZigValue *out_val)
2781028699{
2781128700 assert(ira && source_instr && float_type && out_val && op);
......@@ -28018,30 +28907,30 @@ static ErrorMsg *ir_eval_float_op(IrAnalyze *ira, IrInstruction *source_instr, B
2801828907 return nullptr;
2801928908}
2802028909
28021static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstructionFloatOp *instruction) {
28022 IrInstruction *operand = instruction->operand->child;
28910static IrInstGen *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstSrcFloatOp *instruction) {
28911 IrInstGen *operand = instruction->operand->child;
2802328912 ZigType *operand_type = operand->value->type;
2802428913 if (type_is_invalid(operand_type))
28025 return ira->codegen->invalid_instruction;
28914 return ira->codegen->invalid_inst_gen;
2802628915
2802728916 // This instruction accepts floats and vectors of floats.
2802828917 ZigType *scalar_type = (operand_type->id == ZigTypeIdVector) ?
2802928918 operand_type->data.vector.elem_type : operand_type;
2803028919
2803128920 if (scalar_type->id != ZigTypeIdFloat && scalar_type->id != ZigTypeIdComptimeFloat) {
28032 ir_add_error(ira, operand,
28921 ir_add_error(ira, &operand->base,
2803328922 buf_sprintf("expected float type, found '%s'", buf_ptr(&scalar_type->name)));
28034 return ira->codegen->invalid_instruction;
28923 return ira->codegen->invalid_inst_gen;
2803528924 }
2803628925
2803728926 if (instr_is_comptime(operand)) {
2803828927 ZigValue *operand_val = ir_resolve_const(ira, operand, UndefOk);
2803928928 if (operand_val == nullptr)
28040 return ira->codegen->invalid_instruction;
28929 return ira->codegen->invalid_inst_gen;
2804128930 if (operand_val->special == ConstValSpecialUndef)
28042 return ir_const_undef(ira, &instruction->base, operand_type);
28931 return ir_const_undef(ira, &instruction->base.base, operand_type);
2804328932
28044 IrInstruction *result = ir_const(ira, &instruction->base, operand_type);
28933 IrInstGen *result = ir_const(ira, &instruction->base.base, operand_type);
2804528934 ZigValue *out_val = result->value;
2804628935
2804728936 if (operand_type->id == ZigTypeIdVector) {
......@@ -28052,47 +28941,44 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct
2805228941 for (size_t i = 0; i < len; i += 1) {
2805328942 ZigValue *elem_operand = &operand_val->data.x_array.data.s_none.elements[i];
2805428943 ZigValue *float_out_val = &out_val->data.x_array.data.s_none.elements[i];
28055 ir_assert(elem_operand->type == scalar_type, &instruction->base);
28056 ir_assert(float_out_val->type == scalar_type, &instruction->base);
28057 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
28944 ir_assert(elem_operand->type == scalar_type, &instruction->base.base);
28945 ir_assert(float_out_val->type == scalar_type, &instruction->base.base);
28946 ErrorMsg *msg = ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
2805828947 elem_operand, float_out_val);
2805928948 if (msg != nullptr) {
28060 add_error_note(ira->codegen, msg, instruction->base.source_node,
28949 add_error_note(ira->codegen, msg, instruction->base.base.source_node,
2806128950 buf_sprintf("when computing vector element at index %" ZIG_PRI_usize, i));
28062 return ira->codegen->invalid_instruction;
28951 return ira->codegen->invalid_inst_gen;
2806328952 }
2806428953 float_out_val->type = scalar_type;
2806528954 }
2806628955 out_val->type = operand_type;
2806728956 out_val->special = ConstValSpecialStatic;
2806828957 } else {
28069 if (ir_eval_float_op(ira, &instruction->base, instruction->fn_id, scalar_type,
28958 if (ir_eval_float_op(ira, &instruction->base.base, instruction->fn_id, scalar_type,
2807028959 operand_val, out_val) != nullptr)
2807128960 {
28072 return ira->codegen->invalid_instruction;
28961 return ira->codegen->invalid_inst_gen;
2807328962 }
2807428963 }
2807528964 return result;
2807628965 }
2807728966
28078 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base);
28967 ir_assert(scalar_type->id == ZigTypeIdFloat, &instruction->base.base);
2807928968
28080 IrInstruction *result = ir_build_float_op(&ira->new_irb, instruction->base.scope,
28081 instruction->base.source_node, operand, instruction->fn_id);
28082 result->value->type = operand_type;
28083 return result;
28969 return ir_build_float_op_gen(ira, &instruction->base.base, operand, instruction->fn_id, operand_type);
2808428970}
2808528971
28086static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstructionBswap *instruction) {
28972static IrInstGen *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstSrcBswap *instruction) {
2808728973 Error err;
2808828974
2808928975 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2809028976 if (type_is_invalid(int_type))
28091 return ira->codegen->invalid_instruction;
28977 return ira->codegen->invalid_inst_gen;
2809228978
28093 IrInstruction *uncasted_op = instruction->op->child;
28979 IrInstGen *uncasted_op = instruction->op->child;
2809428980 if (type_is_invalid(uncasted_op->value->type))
28095 return ira->codegen->invalid_instruction;
28981 return ira->codegen->invalid_inst_gen;
2809628982
2809728983 uint32_t vector_len; // UINT32_MAX means not a vector
2809828984 if (uncasted_op->value->type->id == ZigTypeIdArray &&
......@@ -28108,28 +28994,28 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2810828994 bool is_vector = (vector_len != UINT32_MAX);
2810928995 ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;
2811028996
28111 IrInstruction *op = ir_implicit_cast(ira, uncasted_op, op_type);
28997 IrInstGen *op = ir_implicit_cast(ira, uncasted_op, op_type);
2811228998 if (type_is_invalid(op->value->type))
28113 return ira->codegen->invalid_instruction;
28999 return ira->codegen->invalid_inst_gen;
2811429000
2811529001 if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)
2811629002 return op;
2811729003
2811829004 if (int_type->data.integral.bit_count % 8 != 0) {
28119 ir_add_error(ira, instruction->op,
29005 ir_add_error(ira, &instruction->op->base,
2812029006 buf_sprintf("@byteSwap integer type '%s' has %" PRIu32 " bits which is not evenly divisible by 8",
2812129007 buf_ptr(&int_type->name), int_type->data.integral.bit_count));
28122 return ira->codegen->invalid_instruction;
29008 return ira->codegen->invalid_inst_gen;
2812329009 }
2812429010
2812529011 if (instr_is_comptime(op)) {
2812629012 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2812729013 if (val == nullptr)
28128 return ira->codegen->invalid_instruction;
29014 return ira->codegen->invalid_inst_gen;
2812929015 if (val->special == ConstValSpecialUndef)
28130 return ir_const_undef(ira, &instruction->base, op_type);
29016 return ir_const_undef(ira, &instruction->base.base, op_type);
2813129017
28132 IrInstruction *result = ir_const(ira, &instruction->base, op_type);
29018 IrInstGen *result = ir_const(ira, &instruction->base.base, op_type);
2813329019 size_t buf_size = int_type->data.integral.bit_count / 8;
2813429020 uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);
2813529021 if (is_vector) {
......@@ -28137,10 +29023,10 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2813729023 result->value->data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);
2813829024 for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {
2813929025 ZigValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];
28140 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.source_node,
29026 if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.base.source_node,
2814129027 op_elem_val, UndefOk)))
2814229028 {
28143 return ira->codegen->invalid_instruction;
29029 return ira->codegen->invalid_inst_gen;
2814429030 }
2814529031 ZigValue *result_elem_val = &result->value->data.x_array.data.s_none.elements[i];
2814629032 result_elem_val->type = int_type;
......@@ -28162,23 +29048,20 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
2816229048 return result;
2816329049 }
2816429050
28165 IrInstruction *result = ir_build_bswap(&ira->new_irb, instruction->base.scope,
28166 instruction->base.source_node, nullptr, op);
28167 result->value->type = op_type;
28168 return result;
29051 return ir_build_bswap_gen(ira, &instruction->base.base, op_type, op);
2816929052}
2817029053
28171static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstructionBitReverse *instruction) {
29054static IrInstGen *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstSrcBitReverse *instruction) {
2817229055 ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
2817329056 if (type_is_invalid(int_type))
28174 return ira->codegen->invalid_instruction;
29057 return ira->codegen->invalid_inst_gen;
2817529058
28176 IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
29059 IrInstGen *op = ir_implicit_cast(ira, instruction->op->child, int_type);
2817729060 if (type_is_invalid(op->value->type))
28178 return ira->codegen->invalid_instruction;
29061 return ira->codegen->invalid_inst_gen;
2817929062
2818029063 if (int_type->data.integral.bit_count == 0) {
28181 IrInstruction *result = ir_const(ira, &instruction->base, int_type);
29064 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
2818229065 bigint_init_unsigned(&result->value->data.x_bigint, 0);
2818329066 return result;
2818429067 }
......@@ -28186,11 +29069,11 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
2818629069 if (instr_is_comptime(op)) {
2818729070 ZigValue *val = ir_resolve_const(ira, op, UndefOk);
2818829071 if (val == nullptr)
28189 return ira->codegen->invalid_instruction;
29072 return ira->codegen->invalid_inst_gen;
2819029073 if (val->special == ConstValSpecialUndef)
28191 return ir_const_undef(ira, &instruction->base, int_type);
29074 return ir_const_undef(ira, &instruction->base.base, int_type);
2819229075
28193 IrInstruction *result = ir_const(ira, &instruction->base, int_type);
29076 IrInstGen *result = ir_const(ira, &instruction->base.base, int_type);
2819429077 size_t num_bits = int_type->data.integral.bit_count;
2819529078 size_t buf_size = (num_bits + 7) / 8;
2819629079 uint8_t *comptime_buf = allocate_nonzero<uint8_t>(buf_size);
......@@ -28217,128 +29100,125 @@ static IrInstruction *ir_analyze_instruction_bit_reverse(IrAnalyze *ira, IrInstr
2821729100 return result;
2821829101 }
2821929102
28220 IrInstruction *result = ir_build_bit_reverse(&ira->new_irb, instruction->base.scope,
28221 instruction->base.source_node, nullptr, op);
28222 result->value->type = int_type;
28223 return result;
29103 return ir_build_bit_reverse_gen(ira, &instruction->base.base, int_type, op);
2822429104}
2822529105
2822629106
28227static IrInstruction *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstructionEnumToInt *instruction) {
28228 IrInstruction *target = instruction->target->child;
29107static IrInstGen *ir_analyze_instruction_enum_to_int(IrAnalyze *ira, IrInstSrcEnumToInt *instruction) {
29108 IrInstGen *target = instruction->target->child;
2822929109 if (type_is_invalid(target->value->type))
28230 return ira->codegen->invalid_instruction;
29110 return ira->codegen->invalid_inst_gen;
2823129111
28232 return ir_analyze_enum_to_int(ira, &instruction->base, target);
29112 return ir_analyze_enum_to_int(ira, &instruction->base.base, target);
2823329113}
2823429114
28235static IrInstruction *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstructionIntToEnum *instruction) {
29115static IrInstGen *ir_analyze_instruction_int_to_enum(IrAnalyze *ira, IrInstSrcIntToEnum *instruction) {
2823629116 Error err;
28237 IrInstruction *dest_type_value = instruction->dest_type->child;
29117 IrInstGen *dest_type_value = instruction->dest_type->child;
2823829118 ZigType *dest_type = ir_resolve_type(ira, dest_type_value);
2823929119 if (type_is_invalid(dest_type))
28240 return ira->codegen->invalid_instruction;
29120 return ira->codegen->invalid_inst_gen;
2824129121
2824229122 if (dest_type->id != ZigTypeIdEnum) {
28243 ir_add_error(ira, instruction->dest_type,
29123 ir_add_error(ira, &instruction->dest_type->base,
2824429124 buf_sprintf("expected enum, found type '%s'", buf_ptr(&dest_type->name)));
28245 return ira->codegen->invalid_instruction;
29125 return ira->codegen->invalid_inst_gen;
2824629126 }
2824729127
2824829128 if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
28249 return ira->codegen->invalid_instruction;
29129 return ira->codegen->invalid_inst_gen;
2825029130
2825129131 ZigType *tag_type = dest_type->data.enumeration.tag_int_type;
2825229132
28253 IrInstruction *target = instruction->target->child;
29133 IrInstGen *target = instruction->target->child;
2825429134 if (type_is_invalid(target->value->type))
28255 return ira->codegen->invalid_instruction;
29135 return ira->codegen->invalid_inst_gen;
2825629136
28257 IrInstruction *casted_target = ir_implicit_cast(ira, target, tag_type);
29137 IrInstGen *casted_target = ir_implicit_cast(ira, target, tag_type);
2825829138 if (type_is_invalid(casted_target->value->type))
28259 return ira->codegen->invalid_instruction;
29139 return ira->codegen->invalid_inst_gen;
2826029140
28261 return ir_analyze_int_to_enum(ira, &instruction->base, casted_target, dest_type);
29141 return ir_analyze_int_to_enum(ira, &instruction->base.base, casted_target, dest_type);
2826229142}
2826329143
28264static IrInstruction *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstructionCheckRuntimeScope *instruction) {
28265 IrInstruction *block_comptime_inst = instruction->scope_is_comptime->child;
29144static IrInstGen *ir_analyze_instruction_check_runtime_scope(IrAnalyze *ira, IrInstSrcCheckRuntimeScope *instruction) {
29145 IrInstGen *block_comptime_inst = instruction->scope_is_comptime->child;
2826629146 bool scope_is_comptime;
2826729147 if (!ir_resolve_bool(ira, block_comptime_inst, &scope_is_comptime))
28268 return ira->codegen->invalid_instruction;
29148 return ira->codegen->invalid_inst_gen;
2826929149
28270 IrInstruction *is_comptime_inst = instruction->is_comptime->child;
29150 IrInstGen *is_comptime_inst = instruction->is_comptime->child;
2827129151 bool is_comptime;
2827229152 if (!ir_resolve_bool(ira, is_comptime_inst, &is_comptime))
28273 return ira->codegen->invalid_instruction;
29153 return ira->codegen->invalid_inst_gen;
2827429154
2827529155 if (!scope_is_comptime && is_comptime) {
28276 ErrorMsg *msg = ir_add_error(ira, &instruction->base,
29156 ErrorMsg *msg = ir_add_error(ira, &instruction->base.base,
2827729157 buf_sprintf("comptime control flow inside runtime block"));
28278 add_error_note(ira->codegen, msg, block_comptime_inst->source_node,
29158 add_error_note(ira->codegen, msg, block_comptime_inst->base.source_node,
2827929159 buf_sprintf("runtime block created here"));
28280 return ira->codegen->invalid_instruction;
29160 return ira->codegen->invalid_inst_gen;
2828129161 }
2828229162
28283 return ir_const_void(ira, &instruction->base);
29163 return ir_const_void(ira, &instruction->base.base);
2828429164}
2828529165
28286static IrInstruction *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstructionHasDecl *instruction) {
29166static IrInstGen *ir_analyze_instruction_has_decl(IrAnalyze *ira, IrInstSrcHasDecl *instruction) {
2828729167 ZigType *container_type = ir_resolve_type(ira, instruction->container->child);
2828829168 if (type_is_invalid(container_type))
28289 return ira->codegen->invalid_instruction;
29169 return ira->codegen->invalid_inst_gen;
2829029170
2829129171 Buf *name = ir_resolve_str(ira, instruction->name->child);
2829229172 if (name == nullptr)
28293 return ira->codegen->invalid_instruction;
29173 return ira->codegen->invalid_inst_gen;
2829429174
2829529175 if (!is_container(container_type)) {
28296 ir_add_error(ira, instruction->container,
29176 ir_add_error(ira, &instruction->container->base,
2829729177 buf_sprintf("expected struct, enum, or union; found '%s'", buf_ptr(&container_type->name)));
28298 return ira->codegen->invalid_instruction;
29178 return ira->codegen->invalid_inst_gen;
2829929179 }
2830029180
2830129181 ScopeDecls *container_scope = get_container_scope(container_type);
2830229182 Tld *tld = find_container_decl(ira->codegen, container_scope, name);
2830329183 if (tld == nullptr)
28304 return ir_const_bool(ira, &instruction->base, false);
29184 return ir_const_bool(ira, &instruction->base.base, false);
2830529185
28306 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.scope)) {
28307 return ir_const_bool(ira, &instruction->base, false);
29186 if (tld->visib_mod == VisibModPrivate && tld->import != get_scope_import(instruction->base.base.scope)) {
29187 return ir_const_bool(ira, &instruction->base.base, false);
2830829188 }
2830929189
28310 return ir_const_bool(ira, &instruction->base, true);
29190 return ir_const_bool(ira, &instruction->base.base, true);
2831129191}
2831229192
28313static IrInstruction *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstructionUndeclaredIdent *instruction) {
29193static IrInstGen *ir_analyze_instruction_undeclared_ident(IrAnalyze *ira, IrInstSrcUndeclaredIdent *instruction) {
2831429194 // put a variable of same name with invalid type in global scope
2831529195 // so that future references to this same name will find a variable with an invalid type
28316 populate_invalid_variable_in_scope(ira->codegen, instruction->base.scope, instruction->base.source_node,
28317 instruction->name);
28318 ir_add_error(ira, &instruction->base,
29196 populate_invalid_variable_in_scope(ira->codegen, instruction->base.base.scope,
29197 instruction->base.base.source_node, instruction->name);
29198 ir_add_error(ira, &instruction->base.base,
2831929199 buf_sprintf("use of undeclared identifier '%s'", buf_ptr(instruction->name)));
28320 return ira->codegen->invalid_instruction;
29200 return ira->codegen->invalid_inst_gen;
2832129201}
2832229202
28323static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstructionEndExpr *instruction) {
28324 IrInstruction *value = instruction->value->child;
29203static IrInstGen *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstSrcEndExpr *instruction) {
29204 IrInstGen *value = instruction->value->child;
2832529205 if (type_is_invalid(value->value->type))
28326 return ira->codegen->invalid_instruction;
29206 return ira->codegen->invalid_inst_gen;
2832729207
2832829208 bool was_written = instruction->result_loc->written;
28329 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
29209 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2833029210 value->value->type, value, false, true);
2833129211 if (result_loc != nullptr) {
2833229212 if (type_is_invalid(result_loc->value->type))
28333 return ira->codegen->invalid_instruction;
29213 return ira->codegen->invalid_inst_gen;
2833429214 if (result_loc->value->type->id == ZigTypeIdUnreachable)
2833529215 return result_loc;
2833629216
2833729217 if (!was_written || instruction->result_loc->id == ResultLocIdPeer) {
28338 IrInstruction *store_ptr = ir_analyze_store_ptr(ira, &instruction->base, result_loc, value,
29218 IrInstGen *store_ptr = ir_analyze_store_ptr(ira, &instruction->base.base, result_loc, value,
2833929219 instruction->result_loc->allow_write_through_const);
2834029220 if (type_is_invalid(store_ptr->value->type)) {
28341 return ira->codegen->invalid_instruction;
29221 return ira->codegen->invalid_inst_gen;
2834229222 }
2834329223 }
2834429224
......@@ -28353,101 +29233,100 @@ static IrInstruction *ir_analyze_instruction_end_expr(IrAnalyze *ira, IrInstruct
2835329233 }
2835429234 }
2835529235
28356 return ir_const_void(ira, &instruction->base);
29236 return ir_const_void(ira, &instruction->base.base);
2835729237}
2835829238
28359static IrInstruction *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstructionImplicitCast *instruction) {
28360 IrInstruction *operand = instruction->operand->child;
29239static IrInstGen *ir_analyze_instruction_implicit_cast(IrAnalyze *ira, IrInstSrcImplicitCast *instruction) {
29240 IrInstGen *operand = instruction->operand->child;
2836129241 if (type_is_invalid(operand->value->type))
2836229242 return operand;
2836329243
2836429244 ZigType *dest_type = ir_resolve_type(ira, instruction->result_loc_cast->base.source_instruction->child);
2836529245 if (type_is_invalid(dest_type))
28366 return ira->codegen->invalid_instruction;
28367 return ir_implicit_cast2(ira, &instruction->base, operand, dest_type);
29246 return ira->codegen->invalid_inst_gen;
29247 return ir_implicit_cast2(ira, &instruction->base.base, operand, dest_type);
2836829248}
2836929249
28370static IrInstruction *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstructionBitCastSrc *instruction) {
28371 IrInstruction *operand = instruction->operand->child;
29250static IrInstGen *ir_analyze_instruction_bit_cast_src(IrAnalyze *ira, IrInstSrcBitCast *instruction) {
29251 IrInstGen *operand = instruction->operand->child;
2837229252 if (type_is_invalid(operand->value->type))
2837329253 return operand;
2837429254
28375 IrInstruction *result_loc = ir_resolve_result(ira, &instruction->base,
29255 IrInstGen *result_loc = ir_resolve_result(ira, &instruction->base.base,
2837629256 &instruction->result_loc_bit_cast->base, operand->value->type, operand, false, true);
28377 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
29257 if (result_loc != nullptr &&
29258 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29259 {
2837829260 return result_loc;
29261 }
2837929262
2838029263 ZigType *dest_type = ir_resolve_type(ira,
2838129264 instruction->result_loc_bit_cast->base.source_instruction->child);
2838229265 if (type_is_invalid(dest_type))
28383 return ira->codegen->invalid_instruction;
28384 return ir_analyze_bit_cast(ira, &instruction->base, operand, dest_type);
29266 return ira->codegen->invalid_inst_gen;
29267 return ir_analyze_bit_cast(ira, &instruction->base.base, operand, dest_type);
2838529268}
2838629269
28387static IrInstruction *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
28388 IrInstructionUnionInitNamedField *instruction)
29270static IrInstGen *ir_analyze_instruction_union_init_named_field(IrAnalyze *ira,
29271 IrInstSrcUnionInitNamedField *instruction)
2838929272{
2839029273 ZigType *union_type = ir_resolve_type(ira, instruction->union_type->child);
2839129274 if (type_is_invalid(union_type))
28392 return ira->codegen->invalid_instruction;
29275 return ira->codegen->invalid_inst_gen;
2839329276
2839429277 if (union_type->id != ZigTypeIdUnion) {
28395 ir_add_error(ira, instruction->union_type,
29278 ir_add_error(ira, &instruction->union_type->base,
2839629279 buf_sprintf("non-union type '%s' passed to @unionInit", buf_ptr(&union_type->name)));
28397 return ira->codegen->invalid_instruction;
29280 return ira->codegen->invalid_inst_gen;
2839829281 }
2839929282
2840029283 Buf *field_name = ir_resolve_str(ira, instruction->field_name->child);
2840129284 if (field_name == nullptr)
28402 return ira->codegen->invalid_instruction;
29285 return ira->codegen->invalid_inst_gen;
2840329286
28404 IrInstruction *field_result_loc = instruction->field_result_loc->child;
29287 IrInstGen *field_result_loc = instruction->field_result_loc->child;
2840529288 if (type_is_invalid(field_result_loc->value->type))
28406 return ira->codegen->invalid_instruction;
29289 return ira->codegen->invalid_inst_gen;
2840729290
28408 IrInstruction *result_loc = instruction->result_loc->child;
29291 IrInstGen *result_loc = instruction->result_loc->child;
2840929292 if (type_is_invalid(result_loc->value->type))
28410 return ira->codegen->invalid_instruction;
29293 return ira->codegen->invalid_inst_gen;
2841129294
28412 return ir_analyze_union_init(ira, &instruction->base, instruction->base.source_node,
29295 return ir_analyze_union_init(ira, &instruction->base.base, instruction->base.base.source_node,
2841329296 union_type, field_name, field_result_loc, result_loc);
2841429297}
2841529298
28416static IrInstruction *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstructionSuspendBegin *instruction) {
28417 IrInstructionSuspendBegin *result = ir_build_suspend_begin(&ira->new_irb, instruction->base.scope,
28418 instruction->base.source_node);
28419 return &result->base;
29299static IrInstGen *ir_analyze_instruction_suspend_begin(IrAnalyze *ira, IrInstSrcSuspendBegin *instruction) {
29300 return ir_build_suspend_begin_gen(ira, &instruction->base.base);
2842029301}
2842129302
28422static IrInstruction *ir_analyze_instruction_suspend_finish(IrAnalyze *ira,
28423 IrInstructionSuspendFinish *instruction)
28424{
28425 IrInstruction *begin_base = instruction->begin->base.child;
29303static IrInstGen *ir_analyze_instruction_suspend_finish(IrAnalyze *ira, IrInstSrcSuspendFinish *instruction) {
29304 IrInstGen *begin_base = instruction->begin->base.child;
2842629305 if (type_is_invalid(begin_base->value->type))
28427 return ira->codegen->invalid_instruction;
28428 ir_assert(begin_base->id == IrInstructionIdSuspendBegin, &instruction->base);
28429 IrInstructionSuspendBegin *begin = reinterpret_cast<IrInstructionSuspendBegin *>(begin_base);
29306 return ira->codegen->invalid_inst_gen;
29307 ir_assert(begin_base->id == IrInstGenIdSuspendBegin, &instruction->base.base);
29308 IrInstGenSuspendBegin *begin = reinterpret_cast<IrInstGenSuspendBegin *>(begin_base);
2843029309
28431 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28432 ir_assert(fn_entry != nullptr, &instruction->base);
29310 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
29311 ir_assert(fn_entry != nullptr, &instruction->base.base);
2843329312
2843429313 if (fn_entry->inferred_async_node == nullptr) {
28435 fn_entry->inferred_async_node = instruction->base.source_node;
29314 fn_entry->inferred_async_node = instruction->base.base.source_node;
2843629315 }
2843729316
28438 return ir_build_suspend_finish(&ira->new_irb, instruction->base.scope, instruction->base.source_node, begin);
29317 return ir_build_suspend_finish_gen(ira, &instruction->base.base, begin);
2843929318}
2844029319
28441static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruction *source_instr,
28442 IrInstruction *frame_ptr, ZigFn **target_fn)
29320static IrInstGen *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInst* source_instr,
29321 IrInstGen *frame_ptr, ZigFn **target_fn)
2844329322{
2844429323 if (type_is_invalid(frame_ptr->value->type))
28445 return ira->codegen->invalid_instruction;
29324 return ira->codegen->invalid_inst_gen;
2844629325
2844729326 *target_fn = nullptr;
2844829327
2844929328 ZigType *result_type;
28450 IrInstruction *frame;
29329 IrInstGen *frame;
2845129330 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
2845229331 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
2845329332 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
......@@ -28470,38 +29349,38 @@ static IrInstruction *analyze_frame_ptr_to_anyframe_T(IrAnalyze *ira, IrInstruct
2847029349 {
2847129350 ir_add_error(ira, source_instr,
2847229351 buf_sprintf("expected anyframe->T, found '%s'", buf_ptr(&frame->value->type->name)));
28473 return ira->codegen->invalid_instruction;
29352 return ira->codegen->invalid_inst_gen;
2847429353 } else {
2847529354 result_type = frame->value->type->data.any_frame.result_type;
2847629355 }
2847729356 }
2847829357
2847929358 ZigType *any_frame_type = get_any_frame_type(ira->codegen, result_type);
28480 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
29359 IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
2848129360 if (type_is_invalid(casted_frame->value->type))
28482 return ira->codegen->invalid_instruction;
29361 return ira->codegen->invalid_inst_gen;
2848329362
2848429363 return casted_frame;
2848529364}
2848629365
28487static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstructionAwaitSrc *instruction) {
28488 IrInstruction *operand = instruction->frame->child;
29366static IrInstGen *ir_analyze_instruction_await(IrAnalyze *ira, IrInstSrcAwait *instruction) {
29367 IrInstGen *operand = instruction->frame->child;
2848929368 if (type_is_invalid(operand->value->type))
28490 return ira->codegen->invalid_instruction;
29369 return ira->codegen->invalid_inst_gen;
2849129370 ZigFn *target_fn;
28492 IrInstruction *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base, operand, &target_fn);
29371 IrInstGen *frame = analyze_frame_ptr_to_anyframe_T(ira, &instruction->base.base, operand, &target_fn);
2849329372 if (type_is_invalid(frame->value->type))
28494 return ira->codegen->invalid_instruction;
29373 return ira->codegen->invalid_inst_gen;
2849529374
2849629375 ZigType *result_type = frame->value->type->data.any_frame.result_type;
2849729376
28498 ZigFn *fn_entry = exec_fn_entry(ira->new_irb.exec);
28499 ir_assert(fn_entry != nullptr, &instruction->base);
29377 ZigFn *fn_entry = ira->new_irb.exec->fn_entry;
29378 ir_assert(fn_entry != nullptr, &instruction->base.base);
2850029379
2850129380 // If it's not @Frame(func) then it's definitely a suspend point
2850229381 if (target_fn == nullptr) {
2850329382 if (fn_entry->inferred_async_node == nullptr) {
28504 fn_entry->inferred_async_node = instruction->base.source_node;
29383 fn_entry->inferred_async_node = instruction->base.base.source_node;
2850529384 }
2850629385 }
2850729386
......@@ -28509,401 +29388,367 @@ static IrInstruction *ir_analyze_instruction_await(IrAnalyze *ira, IrInstruction
2850929388 fn_entry->calls_or_awaits_errorable_fn = true;
2851029389 }
2851129390
28512 IrInstruction *result_loc;
29391 IrInstGen *result_loc;
2851329392 if (type_has_bits(result_type)) {
28514 result_loc = ir_resolve_result(ira, &instruction->base, instruction->result_loc,
29393 result_loc = ir_resolve_result(ira, &instruction->base.base, instruction->result_loc,
2851529394 result_type, nullptr, true, true);
28516 if (result_loc != nullptr && (type_is_invalid(result_loc->value->type) || instr_is_unreachable(result_loc)))
29395 if (result_loc != nullptr &&
29396 (type_is_invalid(result_loc->value->type) || result_loc->value->type->id == ZigTypeIdUnreachable))
29397 {
2851729398 return result_loc;
29399 }
2851829400 } else {
2851929401 result_loc = nullptr;
2852029402 }
2852129403
28522 IrInstructionAwaitGen *result = ir_build_await_gen(ira, &instruction->base, frame, result_type, result_loc);
29404 IrInstGenAwait *result = ir_build_await_gen(ira, &instruction->base.base, frame, result_type, result_loc);
2852329405 result->target_fn = target_fn;
2852429406 fn_entry->await_list.append(result);
2852529407 return ir_finish_anal(ira, &result->base);
2852629408}
2852729409
28528static IrInstruction *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstructionResume *instruction) {
28529 IrInstruction *frame_ptr = instruction->frame->child;
29410static IrInstGen *ir_analyze_instruction_resume(IrAnalyze *ira, IrInstSrcResume *instruction) {
29411 IrInstGen *frame_ptr = instruction->frame->child;
2853029412 if (type_is_invalid(frame_ptr->value->type))
28531 return ira->codegen->invalid_instruction;
29413 return ira->codegen->invalid_inst_gen;
2853229414
28533 IrInstruction *frame;
29415 IrInstGen *frame;
2853429416 if (frame_ptr->value->type->id == ZigTypeIdPointer &&
2853529417 frame_ptr->value->type->data.pointer.ptr_len == PtrLenSingle &&
2853629418 frame_ptr->value->type->data.pointer.child_type->id == ZigTypeIdFnFrame)
2853729419 {
2853829420 frame = frame_ptr;
2853929421 } else {
28540 frame = ir_get_deref(ira, &instruction->base, frame_ptr, nullptr);
29422 frame = ir_get_deref(ira, &instruction->base.base, frame_ptr, nullptr);
2854129423 }
2854229424
2854329425 ZigType *any_frame_type = get_any_frame_type(ira->codegen, nullptr);
28544 IrInstruction *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
29426 IrInstGen *casted_frame = ir_implicit_cast(ira, frame, any_frame_type);
2854529427 if (type_is_invalid(casted_frame->value->type))
28546 return ira->codegen->invalid_instruction;
29428 return ira->codegen->invalid_inst_gen;
2854729429
28548 return ir_build_resume(&ira->new_irb, instruction->base.scope, instruction->base.source_node, casted_frame);
29430 return ir_build_resume_gen(ira, &instruction->base.base, casted_frame);
2854929431}
2855029432
28551static IrInstruction *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstructionSpillBegin *instruction) {
28552 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope))
28553 return ir_const_void(ira, &instruction->base);
29433static IrInstGen *ir_analyze_instruction_spill_begin(IrAnalyze *ira, IrInstSrcSpillBegin *instruction) {
29434 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope))
29435 return ir_const_void(ira, &instruction->base.base);
2855429436
28555 IrInstruction *operand = instruction->operand->child;
29437 IrInstGen *operand = instruction->operand->child;
2855629438 if (type_is_invalid(operand->value->type))
28557 return ira->codegen->invalid_instruction;
29439 return ira->codegen->invalid_inst_gen;
2855829440
2855929441 if (!type_has_bits(operand->value->type))
28560 return ir_const_void(ira, &instruction->base);
29442 return ir_const_void(ira, &instruction->base.base);
2856129443
28562 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base);
29444 ir_assert(instruction->spill_id == SpillIdRetErrCode, &instruction->base.base);
2856329445 ira->new_irb.exec->need_err_code_spill = true;
2856429446
28565 IrInstructionSpillBegin *result = ir_build_spill_begin(&ira->new_irb, instruction->base.scope,
28566 instruction->base.source_node, operand, instruction->spill_id);
28567 return &result->base;
29447 return ir_build_spill_begin_gen(ira, &instruction->base.base, operand, instruction->spill_id);
2856829448}
2856929449
28570static IrInstruction *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstructionSpillEnd *instruction) {
28571 IrInstruction *operand = instruction->begin->operand->child;
29450static IrInstGen *ir_analyze_instruction_spill_end(IrAnalyze *ira, IrInstSrcSpillEnd *instruction) {
29451 IrInstGen *operand = instruction->begin->operand->child;
2857229452 if (type_is_invalid(operand->value->type))
28573 return ira->codegen->invalid_instruction;
29453 return ira->codegen->invalid_inst_gen;
2857429454
28575 if (ir_should_inline(ira->new_irb.exec, instruction->base.scope) || !type_has_bits(operand->value->type))
29455 if (ir_should_inline(ira->old_irb.exec, instruction->base.base.scope) || !type_has_bits(operand->value->type))
2857629456 return operand;
2857729457
28578 ir_assert(instruction->begin->base.child->id == IrInstructionIdSpillBegin, &instruction->base);
28579 IrInstructionSpillBegin *begin = reinterpret_cast<IrInstructionSpillBegin *>(instruction->begin->base.child);
29458 ir_assert(instruction->begin->base.child->id == IrInstGenIdSpillBegin, &instruction->base.base);
29459 IrInstGenSpillBegin *begin = reinterpret_cast<IrInstGenSpillBegin *>(instruction->begin->base.child);
2858029460
28581 IrInstruction *result = ir_build_spill_end(&ira->new_irb, instruction->base.scope,
28582 instruction->base.source_node, begin);
28583 result->value->type = operand->value->type;
28584 return result;
29461 return ir_build_spill_end_gen(ira, &instruction->base.base, begin, operand->value->type);
2858529462}
2858629463
28587static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction *instruction) {
29464static IrInstGen *ir_analyze_instruction_base(IrAnalyze *ira, IrInstSrc *instruction) {
2858829465 switch (instruction->id) {
28589 case IrInstructionIdInvalid:
28590 case IrInstructionIdWidenOrShorten:
28591 case IrInstructionIdStructFieldPtr:
28592 case IrInstructionIdUnionFieldPtr:
28593 case IrInstructionIdOptionalWrap:
28594 case IrInstructionIdErrWrapCode:
28595 case IrInstructionIdErrWrapPayload:
28596 case IrInstructionIdCast:
28597 case IrInstructionIdDeclVarGen:
28598 case IrInstructionIdPtrCastGen:
28599 case IrInstructionIdCmpxchgGen:
28600 case IrInstructionIdArrayToVector:
28601 case IrInstructionIdVectorToArray:
28602 case IrInstructionIdPtrOfArrayToSlice:
28603 case IrInstructionIdAssertZero:
28604 case IrInstructionIdAssertNonNull:
28605 case IrInstructionIdResizeSlice:
28606 case IrInstructionIdLoadPtrGen:
28607 case IrInstructionIdBitCastGen:
28608 case IrInstructionIdCallGen:
28609 case IrInstructionIdReturnPtr:
28610 case IrInstructionIdAllocaGen:
28611 case IrInstructionIdSliceGen:
28612 case IrInstructionIdRefGen:
28613 case IrInstructionIdTestErrGen:
28614 case IrInstructionIdFrameSizeGen:
28615 case IrInstructionIdAwaitGen:
28616 case IrInstructionIdSplatGen:
28617 case IrInstructionIdVectorExtractElem:
28618 case IrInstructionIdVectorStoreElem:
28619 case IrInstructionIdAsmGen:
29466 case IrInstSrcIdInvalid:
2862029467 zig_unreachable();
2862129468
28622 case IrInstructionIdReturn:
28623 return ir_analyze_instruction_return(ira, (IrInstructionReturn *)instruction);
28624 case IrInstructionIdConst:
28625 return ir_analyze_instruction_const(ira, (IrInstructionConst *)instruction);
28626 case IrInstructionIdUnOp:
28627 return ir_analyze_instruction_un_op(ira, (IrInstructionUnOp *)instruction);
28628 case IrInstructionIdBinOp:
28629 return ir_analyze_instruction_bin_op(ira, (IrInstructionBinOp *)instruction);
28630 case IrInstructionIdMergeErrSets:
28631 return ir_analyze_instruction_merge_err_sets(ira, (IrInstructionMergeErrSets *)instruction);
28632 case IrInstructionIdDeclVarSrc:
28633 return ir_analyze_instruction_decl_var(ira, (IrInstructionDeclVarSrc *)instruction);
28634 case IrInstructionIdLoadPtr:
28635 return ir_analyze_instruction_load_ptr(ira, (IrInstructionLoadPtr *)instruction);
28636 case IrInstructionIdStorePtr:
28637 return ir_analyze_instruction_store_ptr(ira, (IrInstructionStorePtr *)instruction);
28638 case IrInstructionIdElemPtr:
28639 return ir_analyze_instruction_elem_ptr(ira, (IrInstructionElemPtr *)instruction);
28640 case IrInstructionIdVarPtr:
28641 return ir_analyze_instruction_var_ptr(ira, (IrInstructionVarPtr *)instruction);
28642 case IrInstructionIdFieldPtr:
28643 return ir_analyze_instruction_field_ptr(ira, (IrInstructionFieldPtr *)instruction);
28644 case IrInstructionIdCallSrc:
28645 return ir_analyze_instruction_call(ira, (IrInstructionCallSrc *)instruction);
28646 case IrInstructionIdCallSrcArgs:
28647 return ir_analyze_instruction_call_args(ira, (IrInstructionCallSrcArgs *)instruction);
28648 case IrInstructionIdCallExtra:
28649 return ir_analyze_instruction_call_extra(ira, (IrInstructionCallExtra *)instruction);
28650 case IrInstructionIdBr:
28651 return ir_analyze_instruction_br(ira, (IrInstructionBr *)instruction);
28652 case IrInstructionIdCondBr:
28653 return ir_analyze_instruction_cond_br(ira, (IrInstructionCondBr *)instruction);
28654 case IrInstructionIdUnreachable:
28655 return ir_analyze_instruction_unreachable(ira, (IrInstructionUnreachable *)instruction);
28656 case IrInstructionIdPhi:
28657 return ir_analyze_instruction_phi(ira, (IrInstructionPhi *)instruction);
28658 case IrInstructionIdTypeOf:
28659 return ir_analyze_instruction_typeof(ira, (IrInstructionTypeOf *)instruction);
28660 case IrInstructionIdSetCold:
28661 return ir_analyze_instruction_set_cold(ira, (IrInstructionSetCold *)instruction);
28662 case IrInstructionIdSetRuntimeSafety:
28663 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstructionSetRuntimeSafety *)instruction);
28664 case IrInstructionIdSetFloatMode:
28665 return ir_analyze_instruction_set_float_mode(ira, (IrInstructionSetFloatMode *)instruction);
28666 case IrInstructionIdAnyFrameType:
28667 return ir_analyze_instruction_any_frame_type(ira, (IrInstructionAnyFrameType *)instruction);
28668 case IrInstructionIdSliceType:
28669 return ir_analyze_instruction_slice_type(ira, (IrInstructionSliceType *)instruction);
28670 case IrInstructionIdAsmSrc:
28671 return ir_analyze_instruction_asm(ira, (IrInstructionAsmSrc *)instruction);
28672 case IrInstructionIdArrayType:
28673 return ir_analyze_instruction_array_type(ira, (IrInstructionArrayType *)instruction);
28674 case IrInstructionIdSizeOf:
28675 return ir_analyze_instruction_size_of(ira, (IrInstructionSizeOf *)instruction);
28676 case IrInstructionIdTestNonNull:
28677 return ir_analyze_instruction_test_non_null(ira, (IrInstructionTestNonNull *)instruction);
28678 case IrInstructionIdOptionalUnwrapPtr:
28679 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstructionOptionalUnwrapPtr *)instruction);
28680 case IrInstructionIdClz:
28681 return ir_analyze_instruction_clz(ira, (IrInstructionClz *)instruction);
28682 case IrInstructionIdCtz:
28683 return ir_analyze_instruction_ctz(ira, (IrInstructionCtz *)instruction);
28684 case IrInstructionIdPopCount:
28685 return ir_analyze_instruction_pop_count(ira, (IrInstructionPopCount *)instruction);
28686 case IrInstructionIdBswap:
28687 return ir_analyze_instruction_bswap(ira, (IrInstructionBswap *)instruction);
28688 case IrInstructionIdBitReverse:
28689 return ir_analyze_instruction_bit_reverse(ira, (IrInstructionBitReverse *)instruction);
28690 case IrInstructionIdSwitchBr:
28691 return ir_analyze_instruction_switch_br(ira, (IrInstructionSwitchBr *)instruction);
28692 case IrInstructionIdSwitchTarget:
28693 return ir_analyze_instruction_switch_target(ira, (IrInstructionSwitchTarget *)instruction);
28694 case IrInstructionIdSwitchVar:
28695 return ir_analyze_instruction_switch_var(ira, (IrInstructionSwitchVar *)instruction);
28696 case IrInstructionIdSwitchElseVar:
28697 return ir_analyze_instruction_switch_else_var(ira, (IrInstructionSwitchElseVar *)instruction);
28698 case IrInstructionIdUnionTag:
28699 return ir_analyze_instruction_union_tag(ira, (IrInstructionUnionTag *)instruction);
28700 case IrInstructionIdImport:
28701 return ir_analyze_instruction_import(ira, (IrInstructionImport *)instruction);
28702 case IrInstructionIdRef:
28703 return ir_analyze_instruction_ref(ira, (IrInstructionRef *)instruction);
28704 case IrInstructionIdContainerInitList:
28705 return ir_analyze_instruction_container_init_list(ira, (IrInstructionContainerInitList *)instruction);
28706 case IrInstructionIdContainerInitFields:
28707 return ir_analyze_instruction_container_init_fields(ira, (IrInstructionContainerInitFields *)instruction);
28708 case IrInstructionIdCompileErr:
28709 return ir_analyze_instruction_compile_err(ira, (IrInstructionCompileErr *)instruction);
28710 case IrInstructionIdCompileLog:
28711 return ir_analyze_instruction_compile_log(ira, (IrInstructionCompileLog *)instruction);
28712 case IrInstructionIdErrName:
28713 return ir_analyze_instruction_err_name(ira, (IrInstructionErrName *)instruction);
28714 case IrInstructionIdTypeName:
28715 return ir_analyze_instruction_type_name(ira, (IrInstructionTypeName *)instruction);
28716 case IrInstructionIdCImport:
28717 return ir_analyze_instruction_c_import(ira, (IrInstructionCImport *)instruction);
28718 case IrInstructionIdCInclude:
28719 return ir_analyze_instruction_c_include(ira, (IrInstructionCInclude *)instruction);
28720 case IrInstructionIdCDefine:
28721 return ir_analyze_instruction_c_define(ira, (IrInstructionCDefine *)instruction);
28722 case IrInstructionIdCUndef:
28723 return ir_analyze_instruction_c_undef(ira, (IrInstructionCUndef *)instruction);
28724 case IrInstructionIdEmbedFile:
28725 return ir_analyze_instruction_embed_file(ira, (IrInstructionEmbedFile *)instruction);
28726 case IrInstructionIdCmpxchgSrc:
28727 return ir_analyze_instruction_cmpxchg(ira, (IrInstructionCmpxchgSrc *)instruction);
28728 case IrInstructionIdFence:
28729 return ir_analyze_instruction_fence(ira, (IrInstructionFence *)instruction);
28730 case IrInstructionIdTruncate:
28731 return ir_analyze_instruction_truncate(ira, (IrInstructionTruncate *)instruction);
28732 case IrInstructionIdIntCast:
28733 return ir_analyze_instruction_int_cast(ira, (IrInstructionIntCast *)instruction);
28734 case IrInstructionIdFloatCast:
28735 return ir_analyze_instruction_float_cast(ira, (IrInstructionFloatCast *)instruction);
28736 case IrInstructionIdErrSetCast:
28737 return ir_analyze_instruction_err_set_cast(ira, (IrInstructionErrSetCast *)instruction);
28738 case IrInstructionIdFromBytes:
28739 return ir_analyze_instruction_from_bytes(ira, (IrInstructionFromBytes *)instruction);
28740 case IrInstructionIdToBytes:
28741 return ir_analyze_instruction_to_bytes(ira, (IrInstructionToBytes *)instruction);
28742 case IrInstructionIdIntToFloat:
28743 return ir_analyze_instruction_int_to_float(ira, (IrInstructionIntToFloat *)instruction);
28744 case IrInstructionIdFloatToInt:
28745 return ir_analyze_instruction_float_to_int(ira, (IrInstructionFloatToInt *)instruction);
28746 case IrInstructionIdBoolToInt:
28747 return ir_analyze_instruction_bool_to_int(ira, (IrInstructionBoolToInt *)instruction);
28748 case IrInstructionIdIntType:
28749 return ir_analyze_instruction_int_type(ira, (IrInstructionIntType *)instruction);
28750 case IrInstructionIdVectorType:
28751 return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);
28752 case IrInstructionIdShuffleVector:
28753 return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);
28754 case IrInstructionIdSplatSrc:
28755 return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);
28756 case IrInstructionIdBoolNot:
28757 return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);
28758 case IrInstructionIdMemset:
28759 return ir_analyze_instruction_memset(ira, (IrInstructionMemset *)instruction);
28760 case IrInstructionIdMemcpy:
28761 return ir_analyze_instruction_memcpy(ira, (IrInstructionMemcpy *)instruction);
28762 case IrInstructionIdSliceSrc:
28763 return ir_analyze_instruction_slice(ira, (IrInstructionSliceSrc *)instruction);
28764 case IrInstructionIdMemberCount:
28765 return ir_analyze_instruction_member_count(ira, (IrInstructionMemberCount *)instruction);
28766 case IrInstructionIdMemberType:
28767 return ir_analyze_instruction_member_type(ira, (IrInstructionMemberType *)instruction);
28768 case IrInstructionIdMemberName:
28769 return ir_analyze_instruction_member_name(ira, (IrInstructionMemberName *)instruction);
28770 case IrInstructionIdBreakpoint:
28771 return ir_analyze_instruction_breakpoint(ira, (IrInstructionBreakpoint *)instruction);
28772 case IrInstructionIdReturnAddress:
28773 return ir_analyze_instruction_return_address(ira, (IrInstructionReturnAddress *)instruction);
28774 case IrInstructionIdFrameAddress:
28775 return ir_analyze_instruction_frame_address(ira, (IrInstructionFrameAddress *)instruction);
28776 case IrInstructionIdFrameHandle:
28777 return ir_analyze_instruction_frame_handle(ira, (IrInstructionFrameHandle *)instruction);
28778 case IrInstructionIdFrameType:
28779 return ir_analyze_instruction_frame_type(ira, (IrInstructionFrameType *)instruction);
28780 case IrInstructionIdFrameSizeSrc:
28781 return ir_analyze_instruction_frame_size(ira, (IrInstructionFrameSizeSrc *)instruction);
28782 case IrInstructionIdAlignOf:
28783 return ir_analyze_instruction_align_of(ira, (IrInstructionAlignOf *)instruction);
28784 case IrInstructionIdOverflowOp:
28785 return ir_analyze_instruction_overflow_op(ira, (IrInstructionOverflowOp *)instruction);
28786 case IrInstructionIdTestErrSrc:
28787 return ir_analyze_instruction_test_err(ira, (IrInstructionTestErrSrc *)instruction);
28788 case IrInstructionIdUnwrapErrCode:
28789 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstructionUnwrapErrCode *)instruction);
28790 case IrInstructionIdUnwrapErrPayload:
28791 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstructionUnwrapErrPayload *)instruction);
28792 case IrInstructionIdFnProto:
28793 return ir_analyze_instruction_fn_proto(ira, (IrInstructionFnProto *)instruction);
28794 case IrInstructionIdTestComptime:
28795 return ir_analyze_instruction_test_comptime(ira, (IrInstructionTestComptime *)instruction);
28796 case IrInstructionIdCheckSwitchProngs:
28797 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstructionCheckSwitchProngs *)instruction);
28798 case IrInstructionIdCheckStatementIsVoid:
28799 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstructionCheckStatementIsVoid *)instruction);
28800 case IrInstructionIdDeclRef:
28801 return ir_analyze_instruction_decl_ref(ira, (IrInstructionDeclRef *)instruction);
28802 case IrInstructionIdPanic:
28803 return ir_analyze_instruction_panic(ira, (IrInstructionPanic *)instruction);
28804 case IrInstructionIdPtrCastSrc:
28805 return ir_analyze_instruction_ptr_cast(ira, (IrInstructionPtrCastSrc *)instruction);
28806 case IrInstructionIdIntToPtr:
28807 return ir_analyze_instruction_int_to_ptr(ira, (IrInstructionIntToPtr *)instruction);
28808 case IrInstructionIdPtrToInt:
28809 return ir_analyze_instruction_ptr_to_int(ira, (IrInstructionPtrToInt *)instruction);
28810 case IrInstructionIdTagName:
28811 return ir_analyze_instruction_enum_tag_name(ira, (IrInstructionTagName *)instruction);
28812 case IrInstructionIdFieldParentPtr:
28813 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstructionFieldParentPtr *)instruction);
28814 case IrInstructionIdByteOffsetOf:
28815 return ir_analyze_instruction_byte_offset_of(ira, (IrInstructionByteOffsetOf *)instruction);
28816 case IrInstructionIdBitOffsetOf:
28817 return ir_analyze_instruction_bit_offset_of(ira, (IrInstructionBitOffsetOf *)instruction);
28818 case IrInstructionIdTypeInfo:
28819 return ir_analyze_instruction_type_info(ira, (IrInstructionTypeInfo *) instruction);
28820 case IrInstructionIdType:
28821 return ir_analyze_instruction_type(ira, (IrInstructionType *)instruction);
28822 case IrInstructionIdHasField:
28823 return ir_analyze_instruction_has_field(ira, (IrInstructionHasField *) instruction);
28824 case IrInstructionIdTypeId:
28825 return ir_analyze_instruction_type_id(ira, (IrInstructionTypeId *)instruction);
28826 case IrInstructionIdSetEvalBranchQuota:
28827 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstructionSetEvalBranchQuota *)instruction);
28828 case IrInstructionIdPtrType:
28829 return ir_analyze_instruction_ptr_type(ira, (IrInstructionPtrType *)instruction);
28830 case IrInstructionIdAlignCast:
28831 return ir_analyze_instruction_align_cast(ira, (IrInstructionAlignCast *)instruction);
28832 case IrInstructionIdImplicitCast:
28833 return ir_analyze_instruction_implicit_cast(ira, (IrInstructionImplicitCast *)instruction);
28834 case IrInstructionIdResolveResult:
28835 return ir_analyze_instruction_resolve_result(ira, (IrInstructionResolveResult *)instruction);
28836 case IrInstructionIdResetResult:
28837 return ir_analyze_instruction_reset_result(ira, (IrInstructionResetResult *)instruction);
28838 case IrInstructionIdOpaqueType:
28839 return ir_analyze_instruction_opaque_type(ira, (IrInstructionOpaqueType *)instruction);
28840 case IrInstructionIdSetAlignStack:
28841 return ir_analyze_instruction_set_align_stack(ira, (IrInstructionSetAlignStack *)instruction);
28842 case IrInstructionIdArgType:
28843 return ir_analyze_instruction_arg_type(ira, (IrInstructionArgType *)instruction);
28844 case IrInstructionIdTagType:
28845 return ir_analyze_instruction_tag_type(ira, (IrInstructionTagType *)instruction);
28846 case IrInstructionIdExport:
28847 return ir_analyze_instruction_export(ira, (IrInstructionExport *)instruction);
28848 case IrInstructionIdErrorReturnTrace:
28849 return ir_analyze_instruction_error_return_trace(ira, (IrInstructionErrorReturnTrace *)instruction);
28850 case IrInstructionIdErrorUnion:
28851 return ir_analyze_instruction_error_union(ira, (IrInstructionErrorUnion *)instruction);
28852 case IrInstructionIdAtomicRmw:
28853 return ir_analyze_instruction_atomic_rmw(ira, (IrInstructionAtomicRmw *)instruction);
28854 case IrInstructionIdAtomicLoad:
28855 return ir_analyze_instruction_atomic_load(ira, (IrInstructionAtomicLoad *)instruction);
28856 case IrInstructionIdAtomicStore:
28857 return ir_analyze_instruction_atomic_store(ira, (IrInstructionAtomicStore *)instruction);
28858 case IrInstructionIdSaveErrRetAddr:
28859 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstructionSaveErrRetAddr *)instruction);
28860 case IrInstructionIdAddImplicitReturnType:
28861 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstructionAddImplicitReturnType *)instruction);
28862 case IrInstructionIdFloatOp:
28863 return ir_analyze_instruction_float_op(ira, (IrInstructionFloatOp *)instruction);
28864 case IrInstructionIdMulAdd:
28865 return ir_analyze_instruction_mul_add(ira, (IrInstructionMulAdd *)instruction);
28866 case IrInstructionIdIntToErr:
28867 return ir_analyze_instruction_int_to_err(ira, (IrInstructionIntToErr *)instruction);
28868 case IrInstructionIdErrToInt:
28869 return ir_analyze_instruction_err_to_int(ira, (IrInstructionErrToInt *)instruction);
28870 case IrInstructionIdIntToEnum:
28871 return ir_analyze_instruction_int_to_enum(ira, (IrInstructionIntToEnum *)instruction);
28872 case IrInstructionIdEnumToInt:
28873 return ir_analyze_instruction_enum_to_int(ira, (IrInstructionEnumToInt *)instruction);
28874 case IrInstructionIdCheckRuntimeScope:
28875 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstructionCheckRuntimeScope *)instruction);
28876 case IrInstructionIdHasDecl:
28877 return ir_analyze_instruction_has_decl(ira, (IrInstructionHasDecl *)instruction);
28878 case IrInstructionIdUndeclaredIdent:
28879 return ir_analyze_instruction_undeclared_ident(ira, (IrInstructionUndeclaredIdent *)instruction);
28880 case IrInstructionIdAllocaSrc:
29469 case IrInstSrcIdReturn:
29470 return ir_analyze_instruction_return(ira, (IrInstSrcReturn *)instruction);
29471 case IrInstSrcIdConst:
29472 return ir_analyze_instruction_const(ira, (IrInstSrcConst *)instruction);
29473 case IrInstSrcIdUnOp:
29474 return ir_analyze_instruction_un_op(ira, (IrInstSrcUnOp *)instruction);
29475 case IrInstSrcIdBinOp:
29476 return ir_analyze_instruction_bin_op(ira, (IrInstSrcBinOp *)instruction);
29477 case IrInstSrcIdMergeErrSets:
29478 return ir_analyze_instruction_merge_err_sets(ira, (IrInstSrcMergeErrSets *)instruction);
29479 case IrInstSrcIdDeclVar:
29480 return ir_analyze_instruction_decl_var(ira, (IrInstSrcDeclVar *)instruction);
29481 case IrInstSrcIdLoadPtr:
29482 return ir_analyze_instruction_load_ptr(ira, (IrInstSrcLoadPtr *)instruction);
29483 case IrInstSrcIdStorePtr:
29484 return ir_analyze_instruction_store_ptr(ira, (IrInstSrcStorePtr *)instruction);
29485 case IrInstSrcIdElemPtr:
29486 return ir_analyze_instruction_elem_ptr(ira, (IrInstSrcElemPtr *)instruction);
29487 case IrInstSrcIdVarPtr:
29488 return ir_analyze_instruction_var_ptr(ira, (IrInstSrcVarPtr *)instruction);
29489 case IrInstSrcIdFieldPtr:
29490 return ir_analyze_instruction_field_ptr(ira, (IrInstSrcFieldPtr *)instruction);
29491 case IrInstSrcIdCall:
29492 return ir_analyze_instruction_call(ira, (IrInstSrcCall *)instruction);
29493 case IrInstSrcIdCallArgs:
29494 return ir_analyze_instruction_call_args(ira, (IrInstSrcCallArgs *)instruction);
29495 case IrInstSrcIdCallExtra:
29496 return ir_analyze_instruction_call_extra(ira, (IrInstSrcCallExtra *)instruction);
29497 case IrInstSrcIdBr:
29498 return ir_analyze_instruction_br(ira, (IrInstSrcBr *)instruction);
29499 case IrInstSrcIdCondBr:
29500 return ir_analyze_instruction_cond_br(ira, (IrInstSrcCondBr *)instruction);
29501 case IrInstSrcIdUnreachable:
29502 return ir_analyze_instruction_unreachable(ira, (IrInstSrcUnreachable *)instruction);
29503 case IrInstSrcIdPhi:
29504 return ir_analyze_instruction_phi(ira, (IrInstSrcPhi *)instruction);
29505 case IrInstSrcIdTypeOf:
29506 return ir_analyze_instruction_typeof(ira, (IrInstSrcTypeOf *)instruction);
29507 case IrInstSrcIdSetCold:
29508 return ir_analyze_instruction_set_cold(ira, (IrInstSrcSetCold *)instruction);
29509 case IrInstSrcIdSetRuntimeSafety:
29510 return ir_analyze_instruction_set_runtime_safety(ira, (IrInstSrcSetRuntimeSafety *)instruction);
29511 case IrInstSrcIdSetFloatMode:
29512 return ir_analyze_instruction_set_float_mode(ira, (IrInstSrcSetFloatMode *)instruction);
29513 case IrInstSrcIdAnyFrameType:
29514 return ir_analyze_instruction_any_frame_type(ira, (IrInstSrcAnyFrameType *)instruction);
29515 case IrInstSrcIdSliceType:
29516 return ir_analyze_instruction_slice_type(ira, (IrInstSrcSliceType *)instruction);
29517 case IrInstSrcIdAsm:
29518 return ir_analyze_instruction_asm(ira, (IrInstSrcAsm *)instruction);
29519 case IrInstSrcIdArrayType:
29520 return ir_analyze_instruction_array_type(ira, (IrInstSrcArrayType *)instruction);
29521 case IrInstSrcIdSizeOf:
29522 return ir_analyze_instruction_size_of(ira, (IrInstSrcSizeOf *)instruction);
29523 case IrInstSrcIdTestNonNull:
29524 return ir_analyze_instruction_test_non_null(ira, (IrInstSrcTestNonNull *)instruction);
29525 case IrInstSrcIdOptionalUnwrapPtr:
29526 return ir_analyze_instruction_optional_unwrap_ptr(ira, (IrInstSrcOptionalUnwrapPtr *)instruction);
29527 case IrInstSrcIdClz:
29528 return ir_analyze_instruction_clz(ira, (IrInstSrcClz *)instruction);
29529 case IrInstSrcIdCtz:
29530 return ir_analyze_instruction_ctz(ira, (IrInstSrcCtz *)instruction);
29531 case IrInstSrcIdPopCount:
29532 return ir_analyze_instruction_pop_count(ira, (IrInstSrcPopCount *)instruction);
29533 case IrInstSrcIdBswap:
29534 return ir_analyze_instruction_bswap(ira, (IrInstSrcBswap *)instruction);
29535 case IrInstSrcIdBitReverse:
29536 return ir_analyze_instruction_bit_reverse(ira, (IrInstSrcBitReverse *)instruction);
29537 case IrInstSrcIdSwitchBr:
29538 return ir_analyze_instruction_switch_br(ira, (IrInstSrcSwitchBr *)instruction);
29539 case IrInstSrcIdSwitchTarget:
29540 return ir_analyze_instruction_switch_target(ira, (IrInstSrcSwitchTarget *)instruction);
29541 case IrInstSrcIdSwitchVar:
29542 return ir_analyze_instruction_switch_var(ira, (IrInstSrcSwitchVar *)instruction);
29543 case IrInstSrcIdSwitchElseVar:
29544 return ir_analyze_instruction_switch_else_var(ira, (IrInstSrcSwitchElseVar *)instruction);
29545 case IrInstSrcIdImport:
29546 return ir_analyze_instruction_import(ira, (IrInstSrcImport *)instruction);
29547 case IrInstSrcIdRef:
29548 return ir_analyze_instruction_ref(ira, (IrInstSrcRef *)instruction);
29549 case IrInstSrcIdContainerInitList:
29550 return ir_analyze_instruction_container_init_list(ira, (IrInstSrcContainerInitList *)instruction);
29551 case IrInstSrcIdContainerInitFields:
29552 return ir_analyze_instruction_container_init_fields(ira, (IrInstSrcContainerInitFields *)instruction);
29553 case IrInstSrcIdCompileErr:
29554 return ir_analyze_instruction_compile_err(ira, (IrInstSrcCompileErr *)instruction);
29555 case IrInstSrcIdCompileLog:
29556 return ir_analyze_instruction_compile_log(ira, (IrInstSrcCompileLog *)instruction);
29557 case IrInstSrcIdErrName:
29558 return ir_analyze_instruction_err_name(ira, (IrInstSrcErrName *)instruction);
29559 case IrInstSrcIdTypeName:
29560 return ir_analyze_instruction_type_name(ira, (IrInstSrcTypeName *)instruction);
29561 case IrInstSrcIdCImport:
29562 return ir_analyze_instruction_c_import(ira, (IrInstSrcCImport *)instruction);
29563 case IrInstSrcIdCInclude:
29564 return ir_analyze_instruction_c_include(ira, (IrInstSrcCInclude *)instruction);
29565 case IrInstSrcIdCDefine:
29566 return ir_analyze_instruction_c_define(ira, (IrInstSrcCDefine *)instruction);
29567 case IrInstSrcIdCUndef:
29568 return ir_analyze_instruction_c_undef(ira, (IrInstSrcCUndef *)instruction);
29569 case IrInstSrcIdEmbedFile:
29570 return ir_analyze_instruction_embed_file(ira, (IrInstSrcEmbedFile *)instruction);
29571 case IrInstSrcIdCmpxchg:
29572 return ir_analyze_instruction_cmpxchg(ira, (IrInstSrcCmpxchg *)instruction);
29573 case IrInstSrcIdFence:
29574 return ir_analyze_instruction_fence(ira, (IrInstSrcFence *)instruction);
29575 case IrInstSrcIdTruncate:
29576 return ir_analyze_instruction_truncate(ira, (IrInstSrcTruncate *)instruction);
29577 case IrInstSrcIdIntCast:
29578 return ir_analyze_instruction_int_cast(ira, (IrInstSrcIntCast *)instruction);
29579 case IrInstSrcIdFloatCast:
29580 return ir_analyze_instruction_float_cast(ira, (IrInstSrcFloatCast *)instruction);
29581 case IrInstSrcIdErrSetCast:
29582 return ir_analyze_instruction_err_set_cast(ira, (IrInstSrcErrSetCast *)instruction);
29583 case IrInstSrcIdFromBytes:
29584 return ir_analyze_instruction_from_bytes(ira, (IrInstSrcFromBytes *)instruction);
29585 case IrInstSrcIdToBytes:
29586 return ir_analyze_instruction_to_bytes(ira, (IrInstSrcToBytes *)instruction);
29587 case IrInstSrcIdIntToFloat:
29588 return ir_analyze_instruction_int_to_float(ira, (IrInstSrcIntToFloat *)instruction);
29589 case IrInstSrcIdFloatToInt:
29590 return ir_analyze_instruction_float_to_int(ira, (IrInstSrcFloatToInt *)instruction);
29591 case IrInstSrcIdBoolToInt:
29592 return ir_analyze_instruction_bool_to_int(ira, (IrInstSrcBoolToInt *)instruction);
29593 case IrInstSrcIdIntType:
29594 return ir_analyze_instruction_int_type(ira, (IrInstSrcIntType *)instruction);
29595 case IrInstSrcIdVectorType:
29596 return ir_analyze_instruction_vector_type(ira, (IrInstSrcVectorType *)instruction);
29597 case IrInstSrcIdShuffleVector:
29598 return ir_analyze_instruction_shuffle_vector(ira, (IrInstSrcShuffleVector *)instruction);
29599 case IrInstSrcIdSplat:
29600 return ir_analyze_instruction_splat(ira, (IrInstSrcSplat *)instruction);
29601 case IrInstSrcIdBoolNot:
29602 return ir_analyze_instruction_bool_not(ira, (IrInstSrcBoolNot *)instruction);
29603 case IrInstSrcIdMemset:
29604 return ir_analyze_instruction_memset(ira, (IrInstSrcMemset *)instruction);
29605 case IrInstSrcIdMemcpy:
29606 return ir_analyze_instruction_memcpy(ira, (IrInstSrcMemcpy *)instruction);
29607 case IrInstSrcIdSlice:
29608 return ir_analyze_instruction_slice(ira, (IrInstSrcSlice *)instruction);
29609 case IrInstSrcIdMemberCount:
29610 return ir_analyze_instruction_member_count(ira, (IrInstSrcMemberCount *)instruction);
29611 case IrInstSrcIdMemberType:
29612 return ir_analyze_instruction_member_type(ira, (IrInstSrcMemberType *)instruction);
29613 case IrInstSrcIdMemberName:
29614 return ir_analyze_instruction_member_name(ira, (IrInstSrcMemberName *)instruction);
29615 case IrInstSrcIdBreakpoint:
29616 return ir_analyze_instruction_breakpoint(ira, (IrInstSrcBreakpoint *)instruction);
29617 case IrInstSrcIdReturnAddress:
29618 return ir_analyze_instruction_return_address(ira, (IrInstSrcReturnAddress *)instruction);
29619 case IrInstSrcIdFrameAddress:
29620 return ir_analyze_instruction_frame_address(ira, (IrInstSrcFrameAddress *)instruction);
29621 case IrInstSrcIdFrameHandle:
29622 return ir_analyze_instruction_frame_handle(ira, (IrInstSrcFrameHandle *)instruction);
29623 case IrInstSrcIdFrameType:
29624 return ir_analyze_instruction_frame_type(ira, (IrInstSrcFrameType *)instruction);
29625 case IrInstSrcIdFrameSize:
29626 return ir_analyze_instruction_frame_size(ira, (IrInstSrcFrameSize *)instruction);
29627 case IrInstSrcIdAlignOf:
29628 return ir_analyze_instruction_align_of(ira, (IrInstSrcAlignOf *)instruction);
29629 case IrInstSrcIdOverflowOp:
29630 return ir_analyze_instruction_overflow_op(ira, (IrInstSrcOverflowOp *)instruction);
29631 case IrInstSrcIdTestErr:
29632 return ir_analyze_instruction_test_err(ira, (IrInstSrcTestErr *)instruction);
29633 case IrInstSrcIdUnwrapErrCode:
29634 return ir_analyze_instruction_unwrap_err_code(ira, (IrInstSrcUnwrapErrCode *)instruction);
29635 case IrInstSrcIdUnwrapErrPayload:
29636 return ir_analyze_instruction_unwrap_err_payload(ira, (IrInstSrcUnwrapErrPayload *)instruction);
29637 case IrInstSrcIdFnProto:
29638 return ir_analyze_instruction_fn_proto(ira, (IrInstSrcFnProto *)instruction);
29639 case IrInstSrcIdTestComptime:
29640 return ir_analyze_instruction_test_comptime(ira, (IrInstSrcTestComptime *)instruction);
29641 case IrInstSrcIdCheckSwitchProngs:
29642 return ir_analyze_instruction_check_switch_prongs(ira, (IrInstSrcCheckSwitchProngs *)instruction);
29643 case IrInstSrcIdCheckStatementIsVoid:
29644 return ir_analyze_instruction_check_statement_is_void(ira, (IrInstSrcCheckStatementIsVoid *)instruction);
29645 case IrInstSrcIdDeclRef:
29646 return ir_analyze_instruction_decl_ref(ira, (IrInstSrcDeclRef *)instruction);
29647 case IrInstSrcIdPanic:
29648 return ir_analyze_instruction_panic(ira, (IrInstSrcPanic *)instruction);
29649 case IrInstSrcIdPtrCast:
29650 return ir_analyze_instruction_ptr_cast(ira, (IrInstSrcPtrCast *)instruction);
29651 case IrInstSrcIdIntToPtr:
29652 return ir_analyze_instruction_int_to_ptr(ira, (IrInstSrcIntToPtr *)instruction);
29653 case IrInstSrcIdPtrToInt:
29654 return ir_analyze_instruction_ptr_to_int(ira, (IrInstSrcPtrToInt *)instruction);
29655 case IrInstSrcIdTagName:
29656 return ir_analyze_instruction_enum_tag_name(ira, (IrInstSrcTagName *)instruction);
29657 case IrInstSrcIdFieldParentPtr:
29658 return ir_analyze_instruction_field_parent_ptr(ira, (IrInstSrcFieldParentPtr *)instruction);
29659 case IrInstSrcIdByteOffsetOf:
29660 return ir_analyze_instruction_byte_offset_of(ira, (IrInstSrcByteOffsetOf *)instruction);
29661 case IrInstSrcIdBitOffsetOf:
29662 return ir_analyze_instruction_bit_offset_of(ira, (IrInstSrcBitOffsetOf *)instruction);
29663 case IrInstSrcIdTypeInfo:
29664 return ir_analyze_instruction_type_info(ira, (IrInstSrcTypeInfo *) instruction);
29665 case IrInstSrcIdType:
29666 return ir_analyze_instruction_type(ira, (IrInstSrcType *)instruction);
29667 case IrInstSrcIdHasField:
29668 return ir_analyze_instruction_has_field(ira, (IrInstSrcHasField *) instruction);
29669 case IrInstSrcIdTypeId:
29670 return ir_analyze_instruction_type_id(ira, (IrInstSrcTypeId *)instruction);
29671 case IrInstSrcIdSetEvalBranchQuota:
29672 return ir_analyze_instruction_set_eval_branch_quota(ira, (IrInstSrcSetEvalBranchQuota *)instruction);
29673 case IrInstSrcIdPtrType:
29674 return ir_analyze_instruction_ptr_type(ira, (IrInstSrcPtrType *)instruction);
29675 case IrInstSrcIdAlignCast:
29676 return ir_analyze_instruction_align_cast(ira, (IrInstSrcAlignCast *)instruction);
29677 case IrInstSrcIdImplicitCast:
29678 return ir_analyze_instruction_implicit_cast(ira, (IrInstSrcImplicitCast *)instruction);
29679 case IrInstSrcIdResolveResult:
29680 return ir_analyze_instruction_resolve_result(ira, (IrInstSrcResolveResult *)instruction);
29681 case IrInstSrcIdResetResult:
29682 return ir_analyze_instruction_reset_result(ira, (IrInstSrcResetResult *)instruction);
29683 case IrInstSrcIdOpaqueType:
29684 return ir_analyze_instruction_opaque_type(ira, (IrInstSrcOpaqueType *)instruction);
29685 case IrInstSrcIdSetAlignStack:
29686 return ir_analyze_instruction_set_align_stack(ira, (IrInstSrcSetAlignStack *)instruction);
29687 case IrInstSrcIdArgType:
29688 return ir_analyze_instruction_arg_type(ira, (IrInstSrcArgType *)instruction);
29689 case IrInstSrcIdTagType:
29690 return ir_analyze_instruction_tag_type(ira, (IrInstSrcTagType *)instruction);
29691 case IrInstSrcIdExport:
29692 return ir_analyze_instruction_export(ira, (IrInstSrcExport *)instruction);
29693 case IrInstSrcIdErrorReturnTrace:
29694 return ir_analyze_instruction_error_return_trace(ira, (IrInstSrcErrorReturnTrace *)instruction);
29695 case IrInstSrcIdErrorUnion:
29696 return ir_analyze_instruction_error_union(ira, (IrInstSrcErrorUnion *)instruction);
29697 case IrInstSrcIdAtomicRmw:
29698 return ir_analyze_instruction_atomic_rmw(ira, (IrInstSrcAtomicRmw *)instruction);
29699 case IrInstSrcIdAtomicLoad:
29700 return ir_analyze_instruction_atomic_load(ira, (IrInstSrcAtomicLoad *)instruction);
29701 case IrInstSrcIdAtomicStore:
29702 return ir_analyze_instruction_atomic_store(ira, (IrInstSrcAtomicStore *)instruction);
29703 case IrInstSrcIdSaveErrRetAddr:
29704 return ir_analyze_instruction_save_err_ret_addr(ira, (IrInstSrcSaveErrRetAddr *)instruction);
29705 case IrInstSrcIdAddImplicitReturnType:
29706 return ir_analyze_instruction_add_implicit_return_type(ira, (IrInstSrcAddImplicitReturnType *)instruction);
29707 case IrInstSrcIdFloatOp:
29708 return ir_analyze_instruction_float_op(ira, (IrInstSrcFloatOp *)instruction);
29709 case IrInstSrcIdMulAdd:
29710 return ir_analyze_instruction_mul_add(ira, (IrInstSrcMulAdd *)instruction);
29711 case IrInstSrcIdIntToErr:
29712 return ir_analyze_instruction_int_to_err(ira, (IrInstSrcIntToErr *)instruction);
29713 case IrInstSrcIdErrToInt:
29714 return ir_analyze_instruction_err_to_int(ira, (IrInstSrcErrToInt *)instruction);
29715 case IrInstSrcIdIntToEnum:
29716 return ir_analyze_instruction_int_to_enum(ira, (IrInstSrcIntToEnum *)instruction);
29717 case IrInstSrcIdEnumToInt:
29718 return ir_analyze_instruction_enum_to_int(ira, (IrInstSrcEnumToInt *)instruction);
29719 case IrInstSrcIdCheckRuntimeScope:
29720 return ir_analyze_instruction_check_runtime_scope(ira, (IrInstSrcCheckRuntimeScope *)instruction);
29721 case IrInstSrcIdHasDecl:
29722 return ir_analyze_instruction_has_decl(ira, (IrInstSrcHasDecl *)instruction);
29723 case IrInstSrcIdUndeclaredIdent:
29724 return ir_analyze_instruction_undeclared_ident(ira, (IrInstSrcUndeclaredIdent *)instruction);
29725 case IrInstSrcIdAlloca:
2888129726 return nullptr;
28882 case IrInstructionIdEndExpr:
28883 return ir_analyze_instruction_end_expr(ira, (IrInstructionEndExpr *)instruction);
28884 case IrInstructionIdBitCastSrc:
28885 return ir_analyze_instruction_bit_cast_src(ira, (IrInstructionBitCastSrc *)instruction);
28886 case IrInstructionIdUnionInitNamedField:
28887 return ir_analyze_instruction_union_init_named_field(ira, (IrInstructionUnionInitNamedField *)instruction);
28888 case IrInstructionIdSuspendBegin:
28889 return ir_analyze_instruction_suspend_begin(ira, (IrInstructionSuspendBegin *)instruction);
28890 case IrInstructionIdSuspendFinish:
28891 return ir_analyze_instruction_suspend_finish(ira, (IrInstructionSuspendFinish *)instruction);
28892 case IrInstructionIdResume:
28893 return ir_analyze_instruction_resume(ira, (IrInstructionResume *)instruction);
28894 case IrInstructionIdAwaitSrc:
28895 return ir_analyze_instruction_await(ira, (IrInstructionAwaitSrc *)instruction);
28896 case IrInstructionIdSpillBegin:
28897 return ir_analyze_instruction_spill_begin(ira, (IrInstructionSpillBegin *)instruction);
28898 case IrInstructionIdSpillEnd:
28899 return ir_analyze_instruction_spill_end(ira, (IrInstructionSpillEnd *)instruction);
29727 case IrInstSrcIdEndExpr:
29728 return ir_analyze_instruction_end_expr(ira, (IrInstSrcEndExpr *)instruction);
29729 case IrInstSrcIdBitCast:
29730 return ir_analyze_instruction_bit_cast_src(ira, (IrInstSrcBitCast *)instruction);
29731 case IrInstSrcIdUnionInitNamedField:
29732 return ir_analyze_instruction_union_init_named_field(ira, (IrInstSrcUnionInitNamedField *)instruction);
29733 case IrInstSrcIdSuspendBegin:
29734 return ir_analyze_instruction_suspend_begin(ira, (IrInstSrcSuspendBegin *)instruction);
29735 case IrInstSrcIdSuspendFinish:
29736 return ir_analyze_instruction_suspend_finish(ira, (IrInstSrcSuspendFinish *)instruction);
29737 case IrInstSrcIdResume:
29738 return ir_analyze_instruction_resume(ira, (IrInstSrcResume *)instruction);
29739 case IrInstSrcIdAwait:
29740 return ir_analyze_instruction_await(ira, (IrInstSrcAwait *)instruction);
29741 case IrInstSrcIdSpillBegin:
29742 return ir_analyze_instruction_spill_begin(ira, (IrInstSrcSpillBegin *)instruction);
29743 case IrInstSrcIdSpillEnd:
29744 return ir_analyze_instruction_spill_end(ira, (IrInstSrcSpillEnd *)instruction);
2890029745 }
2890129746 zig_unreachable();
2890229747}
2890329748
2890429749// This function attempts to evaluate IR code while doing type checking and other analysis.
28905// It emits a new IrExecutable which is partially evaluated IR code.
28906ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_exec,
29750// It emits to a new IrExecutableGen which is partially evaluated IR code.
29751ZigType *ir_analyze(CodeGen *codegen, IrExecutableSrc *old_exec, IrExecutableGen *new_exec,
2890729752 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *result_ptr)
2890829753{
2890929754 assert(old_exec->first_err_trace_msg == nullptr);
......@@ -28923,9 +29768,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2892329768 ira->new_irb.codegen = codegen;
2892429769 ira->new_irb.exec = new_exec;
2892529770
28926 IrBasicBlock *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
28927 IrBasicBlock *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
28928 ir_ref_bb(new_entry_bb);
29771 IrBasicBlockSrc *old_entry_bb = ira->old_irb.exec->basic_block_list.at(0);
29772 IrBasicBlockGen *new_entry_bb = ir_get_new_bb(ira, old_entry_bb, nullptr);
29773 ir_ref_bb_gen(new_entry_bb);
2892929774 ira->new_irb.current_basic_block = new_entry_bb;
2893029775 ira->old_bb_index = 0;
2893129776
......@@ -28933,7 +29778,7 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2893329778
2893429779 if (result_ptr != nullptr) {
2893529780 assert(result_ptr->type->id == ZigTypeIdPointer);
28936 IrInstructionConst *const_inst = ir_create_instruction<IrInstructionConst>(
29781 IrInstGenConst *const_inst = ir_create_inst_noval<IrInstGenConst>(
2893729782 &ira->new_irb, new_exec->begin_scope, new_exec->source_node);
2893829783 const_inst->base.value = result_ptr;
2893929784 ira->return_ptr = &const_inst->base;
......@@ -28945,9 +29790,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2894529790 }
2894629791
2894729792 while (ira->old_bb_index < ira->old_irb.exec->basic_block_list.length) {
28948 IrInstruction *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
29793 IrInstSrc *old_instruction = ira->old_irb.current_basic_block->instruction_list.at(ira->instruction_index);
2894929794
28950 if (old_instruction->ref_count == 0 && !ir_has_side_effects(old_instruction)) {
29795 if (old_instruction->base.ref_count == 0 && !ir_inst_src_has_side_effects(old_instruction)) {
2895129796 ira->instruction_index += 1;
2895229797 continue;
2895329798 }
......@@ -28956,14 +29801,14 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2895629801 fprintf(stderr, "~ ");
2895729802 old_instruction->src();
2895829803 fprintf(stderr, "~ ");
28959 ir_print_instruction(codegen, stderr, old_instruction, 0, IrPassSrc);
29804 ir_print_inst_src(codegen, stderr, old_instruction, 0);
2896029805 bool want_break = false;
28961 if (ira->break_debug_id == old_instruction->debug_id) {
29806 if (ira->break_debug_id == old_instruction->base.debug_id) {
2896229807 want_break = true;
28963 } else if (old_instruction->source_node != nullptr) {
29808 } else if (old_instruction->base.source_node != nullptr) {
2896429809 for (size_t i = 0; i < dbg_ir_breakpoints_count; i += 1) {
28965 if (dbg_ir_breakpoints_buf[i].line == old_instruction->source_node->line + 1 &&
28966 buf_ends_with_str(old_instruction->source_node->owner->data.structure.root_struct->path,
29810 if (dbg_ir_breakpoints_buf[i].line == old_instruction->base.source_node->line + 1 &&
29811 buf_ends_with_str(old_instruction->base.source_node->owner->data.structure.root_struct->path,
2896729812 dbg_ir_breakpoints_buf[i].src_file))
2896829813 {
2896929814 want_break = true;
......@@ -28972,9 +29817,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2897229817 }
2897329818 if (want_break) BREAKPOINT;
2897429819 }
28975 IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
29820 IrInstGen *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
2897629821 if (new_instruction != nullptr) {
28977 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, old_instruction);
29822 ir_assert(new_instruction->value->type != nullptr || new_instruction->value->type != nullptr, &old_instruction->base);
2897829823 old_instruction->child = new_instruction;
2897929824
2898029825 if (type_is_invalid(new_instruction->value->type)) {
......@@ -28988,19 +29833,19 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2898829833 new_exec->first_err_trace_msg = ira->codegen->trace_err;
2898929834 }
2899029835 if (new_exec->first_err_trace_msg != nullptr &&
28991 !old_instruction->source_node->already_traced_this_node)
29836 !old_instruction->base.source_node->already_traced_this_node)
2899229837 {
28993 old_instruction->source_node->already_traced_this_node = true;
29838 old_instruction->base.source_node->already_traced_this_node = true;
2899429839 new_exec->first_err_trace_msg = add_error_note(ira->codegen, new_exec->first_err_trace_msg,
28995 old_instruction->source_node, buf_create_from_str("referenced here"));
29840 old_instruction->base.source_node, buf_create_from_str("referenced here"));
2899629841 }
2899729842 return ira->codegen->builtin_types.entry_invalid;
2899829843 } else if (ira->codegen->verbose_ir) {
2899929844 fprintf(stderr, "-> ");
29000 if (instr_is_unreachable(new_instruction)) {
29845 if (new_instruction->value->type->id == ZigTypeIdUnreachable) {
2900129846 fprintf(stderr, "(noreturn)\n");
2900229847 } else {
29003 ir_print_instruction(codegen, stderr, new_instruction, 0, IrPassGen);
29848 ir_print_inst_gen(codegen, stderr, new_instruction, 0);
2900429849 }
2900529850 }
2900629851
......@@ -29040,204 +29885,279 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
2904029885 return res_type;
2904129886}
2904229887
29043bool ir_has_side_effects(IrInstruction *instruction) {
29888bool ir_inst_gen_has_side_effects(IrInstGen *instruction) {
2904429889 switch (instruction->id) {
29045 case IrInstructionIdInvalid:
29890 case IrInstGenIdInvalid:
2904629891 zig_unreachable();
29047 case IrInstructionIdBr:
29048 case IrInstructionIdCondBr:
29049 case IrInstructionIdSwitchBr:
29050 case IrInstructionIdDeclVarSrc:
29051 case IrInstructionIdDeclVarGen:
29052 case IrInstructionIdStorePtr:
29053 case IrInstructionIdVectorStoreElem:
29054 case IrInstructionIdCallExtra:
29055 case IrInstructionIdCallSrc:
29056 case IrInstructionIdCallSrcArgs:
29057 case IrInstructionIdCallGen:
29058 case IrInstructionIdReturn:
29059 case IrInstructionIdUnreachable:
29060 case IrInstructionIdSetCold:
29061 case IrInstructionIdSetRuntimeSafety:
29062 case IrInstructionIdSetFloatMode:
29063 case IrInstructionIdImport:
29064 case IrInstructionIdCompileErr:
29065 case IrInstructionIdCompileLog:
29066 case IrInstructionIdCImport:
29067 case IrInstructionIdCInclude:
29068 case IrInstructionIdCDefine:
29069 case IrInstructionIdCUndef:
29070 case IrInstructionIdFence:
29071 case IrInstructionIdMemset:
29072 case IrInstructionIdMemcpy:
29073 case IrInstructionIdBreakpoint:
29074 case IrInstructionIdOverflowOp: // TODO when we support multiple returns this can be side effect free
29075 case IrInstructionIdCheckSwitchProngs:
29076 case IrInstructionIdCheckStatementIsVoid:
29077 case IrInstructionIdCheckRuntimeScope:
29078 case IrInstructionIdPanic:
29079 case IrInstructionIdSetEvalBranchQuota:
29080 case IrInstructionIdPtrType:
29081 case IrInstructionIdSetAlignStack:
29082 case IrInstructionIdExport:
29083 case IrInstructionIdSaveErrRetAddr:
29084 case IrInstructionIdAddImplicitReturnType:
29085 case IrInstructionIdAtomicRmw:
29086 case IrInstructionIdAtomicStore:
29087 case IrInstructionIdCmpxchgGen:
29088 case IrInstructionIdCmpxchgSrc:
29089 case IrInstructionIdAssertZero:
29090 case IrInstructionIdAssertNonNull:
29091 case IrInstructionIdResizeSlice:
29092 case IrInstructionIdUndeclaredIdent:
29093 case IrInstructionIdEndExpr:
29094 case IrInstructionIdPtrOfArrayToSlice:
29095 case IrInstructionIdSliceGen:
29096 case IrInstructionIdOptionalWrap:
29097 case IrInstructionIdVectorToArray:
29098 case IrInstructionIdResetResult:
29099 case IrInstructionIdSuspendBegin:
29100 case IrInstructionIdSuspendFinish:
29101 case IrInstructionIdResume:
29102 case IrInstructionIdAwaitSrc:
29103 case IrInstructionIdAwaitGen:
29104 case IrInstructionIdSpillBegin:
29892 case IrInstGenIdBr:
29893 case IrInstGenIdCondBr:
29894 case IrInstGenIdSwitchBr:
29895 case IrInstGenIdDeclVar:
29896 case IrInstGenIdStorePtr:
29897 case IrInstGenIdVectorStoreElem:
29898 case IrInstGenIdCall:
29899 case IrInstGenIdReturn:
29900 case IrInstGenIdUnreachable:
29901 case IrInstGenIdFence:
29902 case IrInstGenIdMemset:
29903 case IrInstGenIdMemcpy:
29904 case IrInstGenIdBreakpoint:
29905 case IrInstGenIdOverflowOp: // TODO when we support multiple returns this can be side effect free
29906 case IrInstGenIdPanic:
29907 case IrInstGenIdSaveErrRetAddr:
29908 case IrInstGenIdAtomicRmw:
29909 case IrInstGenIdAtomicStore:
29910 case IrInstGenIdCmpxchg:
29911 case IrInstGenIdAssertZero:
29912 case IrInstGenIdAssertNonNull:
29913 case IrInstGenIdResizeSlice:
29914 case IrInstGenIdPtrOfArrayToSlice:
29915 case IrInstGenIdSlice:
29916 case IrInstGenIdOptionalWrap:
29917 case IrInstGenIdVectorToArray:
29918 case IrInstGenIdSuspendBegin:
29919 case IrInstGenIdSuspendFinish:
29920 case IrInstGenIdResume:
29921 case IrInstGenIdAwait:
29922 case IrInstGenIdSpillBegin:
2910529923 return true;
2910629924
29107 case IrInstructionIdPhi:
29108 case IrInstructionIdUnOp:
29109 case IrInstructionIdBinOp:
29110 case IrInstructionIdMergeErrSets:
29111 case IrInstructionIdLoadPtr:
29112 case IrInstructionIdConst:
29113 case IrInstructionIdCast:
29114 case IrInstructionIdContainerInitList:
29115 case IrInstructionIdContainerInitFields:
29116 case IrInstructionIdUnionInitNamedField:
29117 case IrInstructionIdFieldPtr:
29118 case IrInstructionIdElemPtr:
29119 case IrInstructionIdVarPtr:
29120 case IrInstructionIdReturnPtr:
29121 case IrInstructionIdTypeOf:
29122 case IrInstructionIdStructFieldPtr:
29123 case IrInstructionIdArrayType:
29124 case IrInstructionIdSliceType:
29125 case IrInstructionIdAnyFrameType:
29126 case IrInstructionIdSizeOf:
29127 case IrInstructionIdTestNonNull:
29128 case IrInstructionIdOptionalUnwrapPtr:
29129 case IrInstructionIdClz:
29130 case IrInstructionIdCtz:
29131 case IrInstructionIdPopCount:
29132 case IrInstructionIdBswap:
29133 case IrInstructionIdBitReverse:
29134 case IrInstructionIdSwitchVar:
29135 case IrInstructionIdSwitchElseVar:
29136 case IrInstructionIdSwitchTarget:
29137 case IrInstructionIdUnionTag:
29138 case IrInstructionIdRef:
29139 case IrInstructionIdEmbedFile:
29140 case IrInstructionIdTruncate:
29141 case IrInstructionIdIntType:
29142 case IrInstructionIdVectorType:
29143 case IrInstructionIdShuffleVector:
29144 case IrInstructionIdSplatSrc:
29145 case IrInstructionIdSplatGen:
29146 case IrInstructionIdBoolNot:
29147 case IrInstructionIdSliceSrc:
29148 case IrInstructionIdMemberCount:
29149 case IrInstructionIdMemberType:
29150 case IrInstructionIdMemberName:
29151 case IrInstructionIdAlignOf:
29152 case IrInstructionIdReturnAddress:
29153 case IrInstructionIdFrameAddress:
29154 case IrInstructionIdFrameHandle:
29155 case IrInstructionIdFrameType:
29156 case IrInstructionIdFrameSizeSrc:
29157 case IrInstructionIdFrameSizeGen:
29158 case IrInstructionIdTestErrSrc:
29159 case IrInstructionIdTestErrGen:
29160 case IrInstructionIdFnProto:
29161 case IrInstructionIdTestComptime:
29162 case IrInstructionIdPtrCastSrc:
29163 case IrInstructionIdPtrCastGen:
29164 case IrInstructionIdBitCastSrc:
29165 case IrInstructionIdBitCastGen:
29166 case IrInstructionIdWidenOrShorten:
29167 case IrInstructionIdPtrToInt:
29168 case IrInstructionIdIntToPtr:
29169 case IrInstructionIdIntToEnum:
29170 case IrInstructionIdIntToErr:
29171 case IrInstructionIdErrToInt:
29172 case IrInstructionIdDeclRef:
29173 case IrInstructionIdErrName:
29174 case IrInstructionIdTypeName:
29175 case IrInstructionIdTagName:
29176 case IrInstructionIdFieldParentPtr:
29177 case IrInstructionIdByteOffsetOf:
29178 case IrInstructionIdBitOffsetOf:
29179 case IrInstructionIdTypeInfo:
29180 case IrInstructionIdType:
29181 case IrInstructionIdHasField:
29182 case IrInstructionIdTypeId:
29183 case IrInstructionIdAlignCast:
29184 case IrInstructionIdImplicitCast:
29185 case IrInstructionIdResolveResult:
29186 case IrInstructionIdOpaqueType:
29187 case IrInstructionIdArgType:
29188 case IrInstructionIdTagType:
29189 case IrInstructionIdErrorReturnTrace:
29190 case IrInstructionIdErrorUnion:
29191 case IrInstructionIdFloatOp:
29192 case IrInstructionIdMulAdd:
29193 case IrInstructionIdAtomicLoad:
29194 case IrInstructionIdIntCast:
29195 case IrInstructionIdFloatCast:
29196 case IrInstructionIdErrSetCast:
29197 case IrInstructionIdIntToFloat:
29198 case IrInstructionIdFloatToInt:
29199 case IrInstructionIdBoolToInt:
29200 case IrInstructionIdFromBytes:
29201 case IrInstructionIdToBytes:
29202 case IrInstructionIdEnumToInt:
29203 case IrInstructionIdArrayToVector:
29204 case IrInstructionIdHasDecl:
29205 case IrInstructionIdAllocaSrc:
29206 case IrInstructionIdAllocaGen:
29207 case IrInstructionIdSpillEnd:
29208 case IrInstructionIdVectorExtractElem:
29925 case IrInstGenIdPhi:
29926 case IrInstGenIdBinOp:
29927 case IrInstGenIdConst:
29928 case IrInstGenIdCast:
29929 case IrInstGenIdElemPtr:
29930 case IrInstGenIdVarPtr:
29931 case IrInstGenIdReturnPtr:
29932 case IrInstGenIdStructFieldPtr:
29933 case IrInstGenIdTestNonNull:
29934 case IrInstGenIdOptionalUnwrapPtr:
29935 case IrInstGenIdClz:
29936 case IrInstGenIdCtz:
29937 case IrInstGenIdPopCount:
29938 case IrInstGenIdBswap:
29939 case IrInstGenIdBitReverse:
29940 case IrInstGenIdUnionTag:
29941 case IrInstGenIdTruncate:
29942 case IrInstGenIdShuffleVector:
29943 case IrInstGenIdSplat:
29944 case IrInstGenIdBoolNot:
29945 case IrInstGenIdReturnAddress:
29946 case IrInstGenIdFrameAddress:
29947 case IrInstGenIdFrameHandle:
29948 case IrInstGenIdFrameSize:
29949 case IrInstGenIdTestErr:
29950 case IrInstGenIdPtrCast:
29951 case IrInstGenIdBitCast:
29952 case IrInstGenIdWidenOrShorten:
29953 case IrInstGenIdPtrToInt:
29954 case IrInstGenIdIntToPtr:
29955 case IrInstGenIdIntToEnum:
29956 case IrInstGenIdIntToErr:
29957 case IrInstGenIdErrToInt:
29958 case IrInstGenIdErrName:
29959 case IrInstGenIdTagName:
29960 case IrInstGenIdFieldParentPtr:
29961 case IrInstGenIdAlignCast:
29962 case IrInstGenIdErrorReturnTrace:
29963 case IrInstGenIdFloatOp:
29964 case IrInstGenIdMulAdd:
29965 case IrInstGenIdAtomicLoad:
29966 case IrInstGenIdArrayToVector:
29967 case IrInstGenIdAlloca:
29968 case IrInstGenIdSpillEnd:
29969 case IrInstGenIdVectorExtractElem:
29970 case IrInstGenIdBinaryNot:
29971 case IrInstGenIdNegation:
29972 case IrInstGenIdNegationWrapping:
2920929973 return false;
2921029974
29211 case IrInstructionIdAsmSrc:
29975 case IrInstGenIdAsm:
2921229976 {
29213 IrInstructionAsmSrc *asm_instruction = (IrInstructionAsmSrc *)instruction;
29977 IrInstGenAsm *asm_instruction = (IrInstGenAsm *)instruction;
2921429978 return asm_instruction->has_side_effects;
2921529979 }
29980 case IrInstGenIdUnwrapErrPayload:
29981 {
29982 IrInstGenUnwrapErrPayload *unwrap_err_payload_instruction =
29983 (IrInstGenUnwrapErrPayload *)instruction;
29984 return unwrap_err_payload_instruction->safety_check_on ||
29985 unwrap_err_payload_instruction->initializing;
29986 }
29987 case IrInstGenIdUnwrapErrCode:
29988 return reinterpret_cast<IrInstGenUnwrapErrCode *>(instruction)->initializing;
29989 case IrInstGenIdUnionFieldPtr:
29990 return reinterpret_cast<IrInstGenUnionFieldPtr *>(instruction)->initializing;
29991 case IrInstGenIdErrWrapPayload:
29992 return reinterpret_cast<IrInstGenErrWrapPayload *>(instruction)->result_loc != nullptr;
29993 case IrInstGenIdErrWrapCode:
29994 return reinterpret_cast<IrInstGenErrWrapCode *>(instruction)->result_loc != nullptr;
29995 case IrInstGenIdLoadPtr:
29996 return reinterpret_cast<IrInstGenLoadPtr *>(instruction)->result_loc != nullptr;
29997 case IrInstGenIdRef:
29998 return reinterpret_cast<IrInstGenRef *>(instruction)->result_loc != nullptr;
29999 }
30000 zig_unreachable();
30001}
30002
30003bool ir_inst_src_has_side_effects(IrInstSrc *instruction) {
30004 switch (instruction->id) {
30005 case IrInstSrcIdInvalid:
30006 zig_unreachable();
30007 case IrInstSrcIdBr:
30008 case IrInstSrcIdCondBr:
30009 case IrInstSrcIdSwitchBr:
30010 case IrInstSrcIdDeclVar:
30011 case IrInstSrcIdStorePtr:
30012 case IrInstSrcIdCallExtra:
30013 case IrInstSrcIdCall:
30014 case IrInstSrcIdCallArgs:
30015 case IrInstSrcIdReturn:
30016 case IrInstSrcIdUnreachable:
30017 case IrInstSrcIdSetCold:
30018 case IrInstSrcIdSetRuntimeSafety:
30019 case IrInstSrcIdSetFloatMode:
30020 case IrInstSrcIdImport:
30021 case IrInstSrcIdCompileErr:
30022 case IrInstSrcIdCompileLog:
30023 case IrInstSrcIdCImport:
30024 case IrInstSrcIdCInclude:
30025 case IrInstSrcIdCDefine:
30026 case IrInstSrcIdCUndef:
30027 case IrInstSrcIdFence:
30028 case IrInstSrcIdMemset:
30029 case IrInstSrcIdMemcpy:
30030 case IrInstSrcIdBreakpoint:
30031 case IrInstSrcIdOverflowOp: // TODO when we support multiple returns this can be side effect free
30032 case IrInstSrcIdCheckSwitchProngs:
30033 case IrInstSrcIdCheckStatementIsVoid:
30034 case IrInstSrcIdCheckRuntimeScope:
30035 case IrInstSrcIdPanic:
30036 case IrInstSrcIdSetEvalBranchQuota:
30037 case IrInstSrcIdPtrType:
30038 case IrInstSrcIdSetAlignStack:
30039 case IrInstSrcIdExport:
30040 case IrInstSrcIdSaveErrRetAddr:
30041 case IrInstSrcIdAddImplicitReturnType:
30042 case IrInstSrcIdAtomicRmw:
30043 case IrInstSrcIdAtomicStore:
30044 case IrInstSrcIdCmpxchg:
30045 case IrInstSrcIdUndeclaredIdent:
30046 case IrInstSrcIdEndExpr:
30047 case IrInstSrcIdResetResult:
30048 case IrInstSrcIdSuspendBegin:
30049 case IrInstSrcIdSuspendFinish:
30050 case IrInstSrcIdResume:
30051 case IrInstSrcIdAwait:
30052 case IrInstSrcIdSpillBegin:
30053 return true;
30054
30055 case IrInstSrcIdPhi:
30056 case IrInstSrcIdUnOp:
30057 case IrInstSrcIdBinOp:
30058 case IrInstSrcIdMergeErrSets:
30059 case IrInstSrcIdLoadPtr:
30060 case IrInstSrcIdConst:
30061 case IrInstSrcIdContainerInitList:
30062 case IrInstSrcIdContainerInitFields:
30063 case IrInstSrcIdUnionInitNamedField:
30064 case IrInstSrcIdFieldPtr:
30065 case IrInstSrcIdElemPtr:
30066 case IrInstSrcIdVarPtr:
30067 case IrInstSrcIdTypeOf:
30068 case IrInstSrcIdArrayType:
30069 case IrInstSrcIdSliceType:
30070 case IrInstSrcIdAnyFrameType:
30071 case IrInstSrcIdSizeOf:
30072 case IrInstSrcIdTestNonNull:
30073 case IrInstSrcIdOptionalUnwrapPtr:
30074 case IrInstSrcIdClz:
30075 case IrInstSrcIdCtz:
30076 case IrInstSrcIdPopCount:
30077 case IrInstSrcIdBswap:
30078 case IrInstSrcIdBitReverse:
30079 case IrInstSrcIdSwitchVar:
30080 case IrInstSrcIdSwitchElseVar:
30081 case IrInstSrcIdSwitchTarget:
30082 case IrInstSrcIdRef:
30083 case IrInstSrcIdEmbedFile:
30084 case IrInstSrcIdTruncate:
30085 case IrInstSrcIdIntType:
30086 case IrInstSrcIdVectorType:
30087 case IrInstSrcIdShuffleVector:
30088 case IrInstSrcIdSplat:
30089 case IrInstSrcIdBoolNot:
30090 case IrInstSrcIdSlice:
30091 case IrInstSrcIdMemberCount:
30092 case IrInstSrcIdMemberType:
30093 case IrInstSrcIdMemberName:
30094 case IrInstSrcIdAlignOf:
30095 case IrInstSrcIdReturnAddress:
30096 case IrInstSrcIdFrameAddress:
30097 case IrInstSrcIdFrameHandle:
30098 case IrInstSrcIdFrameType:
30099 case IrInstSrcIdFrameSize:
30100 case IrInstSrcIdTestErr:
30101 case IrInstSrcIdFnProto:
30102 case IrInstSrcIdTestComptime:
30103 case IrInstSrcIdPtrCast:
30104 case IrInstSrcIdBitCast:
30105 case IrInstSrcIdPtrToInt:
30106 case IrInstSrcIdIntToPtr:
30107 case IrInstSrcIdIntToEnum:
30108 case IrInstSrcIdIntToErr:
30109 case IrInstSrcIdErrToInt:
30110 case IrInstSrcIdDeclRef:
30111 case IrInstSrcIdErrName:
30112 case IrInstSrcIdTypeName:
30113 case IrInstSrcIdTagName:
30114 case IrInstSrcIdFieldParentPtr:
30115 case IrInstSrcIdByteOffsetOf:
30116 case IrInstSrcIdBitOffsetOf:
30117 case IrInstSrcIdTypeInfo:
30118 case IrInstSrcIdType:
30119 case IrInstSrcIdHasField:
30120 case IrInstSrcIdTypeId:
30121 case IrInstSrcIdAlignCast:
30122 case IrInstSrcIdImplicitCast:
30123 case IrInstSrcIdResolveResult:
30124 case IrInstSrcIdOpaqueType:
30125 case IrInstSrcIdArgType:
30126 case IrInstSrcIdTagType:
30127 case IrInstSrcIdErrorReturnTrace:
30128 case IrInstSrcIdErrorUnion:
30129 case IrInstSrcIdFloatOp:
30130 case IrInstSrcIdMulAdd:
30131 case IrInstSrcIdAtomicLoad:
30132 case IrInstSrcIdIntCast:
30133 case IrInstSrcIdFloatCast:
30134 case IrInstSrcIdErrSetCast:
30135 case IrInstSrcIdIntToFloat:
30136 case IrInstSrcIdFloatToInt:
30137 case IrInstSrcIdBoolToInt:
30138 case IrInstSrcIdFromBytes:
30139 case IrInstSrcIdToBytes:
30140 case IrInstSrcIdEnumToInt:
30141 case IrInstSrcIdHasDecl:
30142 case IrInstSrcIdAlloca:
30143 case IrInstSrcIdSpillEnd:
30144 return false;
2921630145
29217 case IrInstructionIdAsmGen:
30146 case IrInstSrcIdAsm:
2921830147 {
29219 IrInstructionAsmGen *asm_instruction = (IrInstructionAsmGen *)instruction;
30148 IrInstSrcAsm *asm_instruction = (IrInstSrcAsm *)instruction;
2922030149 return asm_instruction->has_side_effects;
2922130150 }
29222 case IrInstructionIdUnwrapErrPayload:
30151
30152 case IrInstSrcIdUnwrapErrPayload:
2922330153 {
29224 IrInstructionUnwrapErrPayload *unwrap_err_payload_instruction =
29225 (IrInstructionUnwrapErrPayload *)instruction;
30154 IrInstSrcUnwrapErrPayload *unwrap_err_payload_instruction =
30155 (IrInstSrcUnwrapErrPayload *)instruction;
2922630156 return unwrap_err_payload_instruction->safety_check_on ||
2922730157 unwrap_err_payload_instruction->initializing;
2922830158 }
29229 case IrInstructionIdUnwrapErrCode:
29230 return reinterpret_cast<IrInstructionUnwrapErrCode *>(instruction)->initializing;
29231 case IrInstructionIdUnionFieldPtr:
29232 return reinterpret_cast<IrInstructionUnionFieldPtr *>(instruction)->initializing;
29233 case IrInstructionIdErrWrapPayload:
29234 return reinterpret_cast<IrInstructionErrWrapPayload *>(instruction)->result_loc != nullptr;
29235 case IrInstructionIdErrWrapCode:
29236 return reinterpret_cast<IrInstructionErrWrapCode *>(instruction)->result_loc != nullptr;
29237 case IrInstructionIdLoadPtrGen:
29238 return reinterpret_cast<IrInstructionLoadPtrGen *>(instruction)->result_loc != nullptr;
29239 case IrInstructionIdRefGen:
29240 return reinterpret_cast<IrInstructionRefGen *>(instruction)->result_loc != nullptr;
30159 case IrInstSrcIdUnwrapErrCode:
30160 return reinterpret_cast<IrInstSrcUnwrapErrCode *>(instruction)->initializing;
2924130161 }
2924230162 zig_unreachable();
2924330163}
......@@ -29271,14 +30191,14 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2927130191 param_info->type = nullptr;
2927230192 return get_generic_fn_type(ira->codegen, &fn_type_id);
2927330193 } else {
29274 IrInstruction *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
30194 IrInstGen *param_type_inst = lazy_fn_type->param_types[fn_type_id.next_param_index];
2927530195 ZigType *param_type = ir_resolve_type(ira, param_type_inst);
2927630196 if (type_is_invalid(param_type))
2927730197 return nullptr;
2927830198 switch (type_requires_comptime(ira->codegen, param_type)) {
2927930199 case ReqCompTimeYes:
2928030200 if (!calling_convention_allows_zig_types(fn_type_id.cc)) {
29281 ir_add_error(ira, param_type_inst,
30201 ir_add_error(ira, &param_type_inst->base,
2928230202 buf_sprintf("parameter of type '%s' not allowed in function with calling convention '%s'",
2928330203 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
2928430204 return nullptr;
......@@ -29296,7 +30216,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2929630216 if ((err = type_has_bits2(ira->codegen, param_type, &has_bits)))
2929730217 return nullptr;
2929830218 if (!has_bits) {
29299 ir_add_error(ira, param_type_inst,
30219 ir_add_error(ira, &param_type_inst->base,
2930030220 buf_sprintf("parameter of type '%s' has 0 bits; not allowed in function with calling convention '%s'",
2930130221 buf_ptr(&param_type->name), calling_convention_name(fn_type_id.cc)));
2930230222 return nullptr;
......@@ -29315,7 +30235,7 @@ static ZigType *ir_resolve_lazy_fn_type(IrAnalyze *ira, AstNode *source_node, La
2931530235 if (type_is_invalid(fn_type_id.return_type))
2931630236 return nullptr;
2931730237 if (fn_type_id.return_type->id == ZigTypeIdOpaque) {
29318 ir_add_error(ira, lazy_fn_type->return_type, buf_create_from_str("return type cannot be opaque"));
30238 ir_add_error(ira, &lazy_fn_type->return_type->base, buf_create_from_str("return type cannot be opaque"));
2931930239 return nullptr;
2932030240 }
2932130241
......@@ -29347,7 +30267,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2934730267 case ZigTypeIdBoundFn:
2934830268 case ZigTypeIdVoid:
2934930269 case ZigTypeIdOpaque:
29350 ir_add_error(ira, lazy_align_of->target_type,
30270 ir_add_error(ira, &lazy_align_of->target_type->base,
2935130271 buf_sprintf("no align available for type '%s'",
2935230272 buf_ptr(&lazy_align_of->target_type->value->data.x_type->name)));
2935330273 return ErrorSemanticAnalyzeFail;
......@@ -29397,7 +30317,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2939730317 case ZigTypeIdNull:
2939830318 case ZigTypeIdBoundFn:
2939930319 case ZigTypeIdOpaque:
29400 ir_add_error(ira, lazy_size_of->target_type,
30320 ir_add_error(ira, &lazy_size_of->target_type->base,
2940130321 buf_sprintf("no size available for type '%s'",
2940230322 buf_ptr(&lazy_size_of->target_type->value->data.x_type->name)));
2940330323 return ErrorSemanticAnalyzeFail;
......@@ -29455,7 +30375,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2945530375 if (lazy_slice_type->sentinel != nullptr) {
2945630376 if (type_is_invalid(lazy_slice_type->sentinel->value->type))
2945730377 return ErrorSemanticAnalyzeFail;
29458 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
30378 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_slice_type->sentinel, elem_type);
2945930379 if (type_is_invalid(sentinel->value->type))
2946030380 return ErrorSemanticAnalyzeFail;
2946130381 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29478,7 +30398,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2947830398 case ZigTypeIdUndefined:
2947930399 case ZigTypeIdNull:
2948030400 case ZigTypeIdOpaque:
29481 ir_add_error(ira, lazy_slice_type->elem_type,
30401 ir_add_error(ira, &lazy_slice_type->elem_type->base,
2948230402 buf_sprintf("slice of type '%s' not allowed", buf_ptr(&elem_type->name)));
2948330403 return ErrorSemanticAnalyzeFail;
2948430404 case ZigTypeIdMetaType:
......@@ -29534,7 +30454,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2953430454 if (lazy_ptr_type->sentinel != nullptr) {
2953530455 if (type_is_invalid(lazy_ptr_type->sentinel->value->type))
2953630456 return ErrorSemanticAnalyzeFail;
29537 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
30457 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_ptr_type->sentinel, elem_type);
2953830458 if (type_is_invalid(sentinel->value->type))
2953930459 return ErrorSemanticAnalyzeFail;
2954030460 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29551,11 +30471,11 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2955130471 }
2955230472
2955330473 if (elem_type->id == ZigTypeIdUnreachable) {
29554 ir_add_error(ira, lazy_ptr_type->elem_type,
30474 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2955530475 buf_create_from_str("pointer to noreturn not allowed"));
2955630476 return ErrorSemanticAnalyzeFail;
2955730477 } else if (elem_type->id == ZigTypeIdOpaque && lazy_ptr_type->ptr_len == PtrLenUnknown) {
29558 ir_add_error(ira, lazy_ptr_type->elem_type,
30478 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2955930479 buf_create_from_str("unknown-length pointer to opaque"));
2956030480 return ErrorSemanticAnalyzeFail;
2956130481 } else if (lazy_ptr_type->ptr_len == PtrLenC) {
......@@ -29563,16 +30483,16 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2956330483 if ((err = type_allowed_in_extern(ira->codegen, elem_type, &ok_type)))
2956430484 return err;
2956530485 if (!ok_type) {
29566 ir_add_error(ira, lazy_ptr_type->elem_type,
30486 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2956730487 buf_sprintf("C pointers cannot point to non-C-ABI-compatible type '%s'",
2956830488 buf_ptr(&elem_type->name)));
2956930489 return ErrorSemanticAnalyzeFail;
2957030490 } else if (elem_type->id == ZigTypeIdOpaque) {
29571 ir_add_error(ira, lazy_ptr_type->elem_type,
30491 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2957230492 buf_sprintf("C pointers cannot point opaque types"));
2957330493 return ErrorSemanticAnalyzeFail;
2957430494 } else if (lazy_ptr_type->is_allowzero) {
29575 ir_add_error(ira, lazy_ptr_type->elem_type,
30495 ir_add_error(ira, &lazy_ptr_type->elem_type->base,
2957630496 buf_sprintf("C pointers always allow address zero"));
2957730497 return ErrorSemanticAnalyzeFail;
2957830498 }
......@@ -29610,7 +30530,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2961030530 case ZigTypeIdUndefined:
2961130531 case ZigTypeIdNull:
2961230532 case ZigTypeIdOpaque:
29613 ir_add_error(ira, lazy_array_type->elem_type,
30533 ir_add_error(ira, &lazy_array_type->elem_type->base,
2961430534 buf_sprintf("array of type '%s' not allowed",
2961530535 buf_ptr(&elem_type->name)));
2961630536 return ErrorSemanticAnalyzeFail;
......@@ -29645,7 +30565,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2964530565 if (lazy_array_type->sentinel != nullptr) {
2964630566 if (type_is_invalid(lazy_array_type->sentinel->value->type))
2964730567 return ErrorSemanticAnalyzeFail;
29648 IrInstruction *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
30568 IrInstGen *sentinel = ir_implicit_cast(ira, lazy_array_type->sentinel, elem_type);
2964930569 if (type_is_invalid(sentinel->value->type))
2965030570 return ErrorSemanticAnalyzeFail;
2965130571 sentinel_val = ir_resolve_const(ira, sentinel, UndefBad);
......@@ -29669,7 +30589,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2966930589 return ErrorSemanticAnalyzeFail;
2967030590
2967130591 if (payload_type->id == ZigTypeIdOpaque || payload_type->id == ZigTypeIdUnreachable) {
29672 ir_add_error(ira, lazy_opt_type->payload_type,
30592 ir_add_error(ira, &lazy_opt_type->payload_type->base,
2967330593 buf_sprintf("type '%s' cannot be optional", buf_ptr(&payload_type->name)));
2967430594 return ErrorSemanticAnalyzeFail;
2967530595 }
......@@ -29711,7 +30631,7 @@ static Error ir_resolve_lazy_raw(AstNode *source_node, ZigValue *val) {
2971130631 return ErrorSemanticAnalyzeFail;
2971230632
2971330633 if (err_set_type->id != ZigTypeIdErrorSet) {
29714 ir_add_error(ira, lazy_err_union_type->err_set_type,
30634 ir_add_error(ira, &lazy_err_union_type->err_set_type->base,
2971530635 buf_sprintf("expected error set type, found type '%s'",
2971630636 buf_ptr(&err_set_type->name)));
2971730637 return ErrorSemanticAnalyzeFail;
......@@ -29747,8 +30667,8 @@ Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val) {
2974730667 return ErrorNone;
2974830668}
2974930669
29750void IrInstruction::src() {
29751 IrInstruction *inst = this;
30670void IrInst::src() {
30671 IrInst *inst = this;
2975230672 if (inst->source_node != nullptr) {
2975330673 inst->source_node->src();
2975430674 } else {
......@@ -29756,26 +30676,45 @@ void IrInstruction::src() {
2975630676 }
2975730677}
2975830678
29759void IrInstruction::dump() {
29760 IrInstruction *inst = this;
30679void IrInst::dump() {
30680 this->src();
30681 fprintf(stderr, "IrInst(#%" PRIu32 ")\n", this->debug_id);
30682}
30683
30684void IrInstSrc::src() {
30685 this->base.src();
30686}
30687
30688void IrInstGen::src() {
30689 this->base.src();
30690}
30691
30692void IrInstSrc::dump() {
30693 IrInstSrc *inst = this;
2976130694 inst->src();
29762 IrPass pass = (inst->child == nullptr) ? IrPassGen : IrPassSrc;
29763 if (inst->scope == nullptr) {
30695 if (inst->base.scope == nullptr) {
2976430696 fprintf(stderr, "(null scope)\n");
2976530697 } else {
29766 ir_print_instruction(inst->scope->codegen, stderr, inst, 0, pass);
29767 if (pass == IrPassSrc) {
29768 fprintf(stderr, "-> ");
29769 ir_print_instruction(inst->scope->codegen, stderr, inst->child, 0, IrPassGen);
29770 }
30698 ir_print_inst_src(inst->base.scope->codegen, stderr, inst, 0);
30699 fprintf(stderr, "-> ");
30700 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst->child, 0);
30701 }
30702}
30703void IrInstGen::dump() {
30704 IrInstGen *inst = this;
30705 inst->src();
30706 if (inst->base.scope == nullptr) {
30707 fprintf(stderr, "(null scope)\n");
30708 } else {
30709 ir_print_inst_gen(inst->base.scope->codegen, stderr, inst, 0);
2977130710 }
2977230711}
2977330712
2977430713void IrAnalyze::dump() {
29775 ir_print(this->codegen, stderr, this->new_irb.exec, 0, IrPassGen);
30714 ir_print_gen(this->codegen, stderr, this->new_irb.exec, 0);
2977630715 if (this->new_irb.current_basic_block != nullptr) {
2977730716 fprintf(stderr, "Current basic block:\n");
29778 ir_print_basic_block(this->codegen, stderr, this->new_irb.current_basic_block, 1, IrPassGen);
30717 ir_print_basic_block_gen(this->codegen, stderr, this->new_irb.current_basic_block, 1);
2977930718 }
2978030719}
2978130720
src/ir.hpp+10-10
......@@ -10,33 +10,33 @@
1010
1111#include "all_types.hpp"
1212
13enum IrPass {
14 IrPassSrc,
15 IrPassGen,
16};
17
18bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutable *ir_executable);
13bool ir_gen(CodeGen *g, AstNode *node, Scope *scope, IrExecutableSrc *ir_executable);
1914bool ir_gen_fn(CodeGen *g, ZigFn *fn_entry);
2015
16IrInstGen *ir_create_alloca(CodeGen *g, Scope *scope, AstNode *source_node, ZigFn *fn,
17 ZigType *var_type, const char *name_hint);
18
2119Error ir_eval_const_value(CodeGen *codegen, Scope *scope, AstNode *node,
2220 ZigValue *return_ptr, size_t *backward_branch_count, size_t *backward_branch_quota,
2321 ZigFn *fn_entry, Buf *c_import_buf, AstNode *source_node, Buf *exec_name,
24 IrExecutable *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
22 IrExecutableGen *parent_exec, AstNode *expected_type_source_node, UndefAllowed undef);
2523
2624Error ir_resolve_lazy(CodeGen *codegen, AstNode *source_node, ZigValue *val);
2725
28ZigType *ir_analyze(CodeGen *g, IrExecutable *old_executable, IrExecutable *new_executable,
26ZigType *ir_analyze(CodeGen *g, IrExecutableSrc *old_executable, IrExecutableGen *new_executable,
2927 ZigType *expected_type, AstNode *expected_type_source_node, ZigValue *return_ptr);
3028
31bool ir_has_side_effects(IrInstruction *instruction);
29bool ir_inst_gen_has_side_effects(IrInstGen *inst);
30bool ir_inst_src_has_side_effects(IrInstSrc *inst);
3231
3332struct IrAnalyze;
3433ZigValue *const_ptr_pointee(IrAnalyze *ira, CodeGen *codegen, ZigValue *const_val,
3534 AstNode *source_node);
36const char *float_op_to_name(BuiltinFnId op);
3735
3836// for debugging purposes
3937void dbg_ir_break(const char *src_file, uint32_t line);
4038void dbg_ir_clear(void);
4139
40void destroy_instruction_gen(IrInstGen *inst);
41
4242#endif
src/ir_print.cpp+1998-1281
......@@ -10,19 +10,35 @@
1010#include "ir_print.hpp"
1111#include "os.hpp"
1212
13static uint32_t hash_instruction_ptr(IrInstruction* instruction) {
13static uint32_t hash_inst_src_ptr(IrInstSrc* instruction) {
1414 return (uint32_t)(uintptr_t)instruction;
1515}
1616
17static bool instruction_ptr_equal(IrInstruction* a, IrInstruction* b) {
17static uint32_t hash_inst_gen_ptr(IrInstGen* instruction) {
18 return (uint32_t)(uintptr_t)instruction;
19}
20
21static bool inst_src_ptr_eql(IrInstSrc* a, IrInstSrc* b) {
1822 return a == b;
1923}
2024
21using InstructionSet = HashMap<IrInstruction*, uint8_t, hash_instruction_ptr, instruction_ptr_equal>;
22using InstructionList = ZigList<IrInstruction*>;
25static bool inst_gen_ptr_eql(IrInstGen* a, IrInstGen* b) {
26 return a == b;
27}
28
29using InstSetSrc = HashMap<IrInstSrc*, uint8_t, hash_inst_src_ptr, inst_src_ptr_eql>;
30using InstSetGen = HashMap<IrInstGen*, uint8_t, hash_inst_gen_ptr, inst_gen_ptr_eql>;
31using InstListSrc = ZigList<IrInstSrc*>;
32using InstListGen = ZigList<IrInstGen*>;
33
34struct IrPrintSrc {
35 CodeGen *codegen;
36 FILE *f;
37 int indent;
38 int indent_size;
39};
2340
24struct IrPrint {
25 IrPass pass;
41struct IrPrintGen {
2642 CodeGen *codegen;
2743 FILE *f;
2844 int indent;
......@@ -32,417 +48,590 @@ struct IrPrint {
3248 // present in the instruction list. Thus we track which instructions
3349 // are printed (per executable) and after each pass 2 instruction those
3450 // var instructions are rendered in a trailing fashion.
35 InstructionSet printed;
36 InstructionList pending;
51 InstSetGen printed;
52 InstListGen pending;
3753};
3854
39static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction);
55static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst);
56static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst);
4057
41const char* ir_instruction_type_str(IrInstructionId id) {
58const char* ir_inst_src_type_str(IrInstSrcId id) {
4259 switch (id) {
43 case IrInstructionIdInvalid:
44 return "Invalid";
45 case IrInstructionIdShuffleVector:
46 return "Shuffle";
47 case IrInstructionIdSplatSrc:
48 return "SplatSrc";
49 case IrInstructionIdSplatGen:
50 return "SplatGen";
51 case IrInstructionIdDeclVarSrc:
52 return "DeclVarSrc";
53 case IrInstructionIdDeclVarGen:
54 return "DeclVarGen";
55 case IrInstructionIdBr:
56 return "Br";
57 case IrInstructionIdCondBr:
58 return "CondBr";
59 case IrInstructionIdSwitchBr:
60 return "SwitchBr";
61 case IrInstructionIdSwitchVar:
62 return "SwitchVar";
63 case IrInstructionIdSwitchElseVar:
64 return "SwitchElseVar";
65 case IrInstructionIdSwitchTarget:
66 return "SwitchTarget";
67 case IrInstructionIdPhi:
68 return "Phi";
69 case IrInstructionIdUnOp:
70 return "UnOp";
71 case IrInstructionIdBinOp:
72 return "BinOp";
73 case IrInstructionIdMergeErrSets:
74 return "MergeErrSets";
75 case IrInstructionIdLoadPtr:
76 return "LoadPtr";
77 case IrInstructionIdLoadPtrGen:
78 return "LoadPtrGen";
79 case IrInstructionIdStorePtr:
80 return "StorePtr";
81 case IrInstructionIdVectorStoreElem:
82 return "VectorStoreElem";
83 case IrInstructionIdFieldPtr:
84 return "FieldPtr";
85 case IrInstructionIdStructFieldPtr:
86 return "StructFieldPtr";
87 case IrInstructionIdUnionFieldPtr:
88 return "UnionFieldPtr";
89 case IrInstructionIdElemPtr:
90 return "ElemPtr";
91 case IrInstructionIdVarPtr:
92 return "VarPtr";
93 case IrInstructionIdReturnPtr:
94 return "ReturnPtr";
95 case IrInstructionIdCallExtra:
96 return "CallExtra";
97 case IrInstructionIdCallSrc:
98 return "CallSrc";
99 case IrInstructionIdCallSrcArgs:
100 return "CallSrcArgs";
101 case IrInstructionIdCallGen:
102 return "CallGen";
103 case IrInstructionIdConst:
104 return "Const";
105 case IrInstructionIdReturn:
106 return "Return";
107 case IrInstructionIdCast:
108 return "Cast";
109 case IrInstructionIdResizeSlice:
110 return "ResizeSlice";
111 case IrInstructionIdContainerInitList:
112 return "ContainerInitList";
113 case IrInstructionIdContainerInitFields:
114 return "ContainerInitFields";
115 case IrInstructionIdUnreachable:
116 return "Unreachable";
117 case IrInstructionIdTypeOf:
118 return "TypeOf";
119 case IrInstructionIdSetCold:
120 return "SetCold";
121 case IrInstructionIdSetRuntimeSafety:
122 return "SetRuntimeSafety";
123 case IrInstructionIdSetFloatMode:
124 return "SetFloatMode";
125 case IrInstructionIdArrayType:
126 return "ArrayType";
127 case IrInstructionIdAnyFrameType:
128 return "AnyFrameType";
129 case IrInstructionIdSliceType:
130 return "SliceType";
131 case IrInstructionIdAsmSrc:
132 return "AsmSrc";
133 case IrInstructionIdAsmGen:
134 return "AsmGen";
135 case IrInstructionIdSizeOf:
136 return "SizeOf";
137 case IrInstructionIdTestNonNull:
138 return "TestNonNull";
139 case IrInstructionIdOptionalUnwrapPtr:
140 return "OptionalUnwrapPtr";
141 case IrInstructionIdOptionalWrap:
142 return "OptionalWrap";
143 case IrInstructionIdUnionTag:
144 return "UnionTag";
145 case IrInstructionIdClz:
146 return "Clz";
147 case IrInstructionIdCtz:
148 return "Ctz";
149 case IrInstructionIdPopCount:
150 return "PopCount";
151 case IrInstructionIdBswap:
152 return "Bswap";
153 case IrInstructionIdBitReverse:
154 return "BitReverse";
155 case IrInstructionIdImport:
156 return "Import";
157 case IrInstructionIdCImport:
158 return "CImport";
159 case IrInstructionIdCInclude:
160 return "CInclude";
161 case IrInstructionIdCDefine:
162 return "CDefine";
163 case IrInstructionIdCUndef:
164 return "CUndef";
165 case IrInstructionIdRef:
166 return "Ref";
167 case IrInstructionIdRefGen:
168 return "RefGen";
169 case IrInstructionIdCompileErr:
170 return "CompileErr";
171 case IrInstructionIdCompileLog:
172 return "CompileLog";
173 case IrInstructionIdErrName:
174 return "ErrName";
175 case IrInstructionIdEmbedFile:
176 return "EmbedFile";
177 case IrInstructionIdCmpxchgSrc:
178 return "CmpxchgSrc";
179 case IrInstructionIdCmpxchgGen:
180 return "CmpxchgGen";
181 case IrInstructionIdFence:
182 return "Fence";
183 case IrInstructionIdTruncate:
184 return "Truncate";
185 case IrInstructionIdIntCast:
186 return "IntCast";
187 case IrInstructionIdFloatCast:
188 return "FloatCast";
189 case IrInstructionIdIntToFloat:
190 return "IntToFloat";
191 case IrInstructionIdFloatToInt:
192 return "FloatToInt";
193 case IrInstructionIdBoolToInt:
194 return "BoolToInt";
195 case IrInstructionIdIntType:
196 return "IntType";
197 case IrInstructionIdVectorType:
198 return "VectorType";
199 case IrInstructionIdBoolNot:
200 return "BoolNot";
201 case IrInstructionIdMemset:
202 return "Memset";
203 case IrInstructionIdMemcpy:
204 return "Memcpy";
205 case IrInstructionIdSliceSrc:
206 return "SliceSrc";
207 case IrInstructionIdSliceGen:
208 return "SliceGen";
209 case IrInstructionIdMemberCount:
210 return "MemberCount";
211 case IrInstructionIdMemberType:
212 return "MemberType";
213 case IrInstructionIdMemberName:
214 return "MemberName";
215 case IrInstructionIdBreakpoint:
216 return "Breakpoint";
217 case IrInstructionIdReturnAddress:
218 return "ReturnAddress";
219 case IrInstructionIdFrameAddress:
220 return "FrameAddress";
221 case IrInstructionIdFrameHandle:
222 return "FrameHandle";
223 case IrInstructionIdFrameType:
224 return "FrameType";
225 case IrInstructionIdFrameSizeSrc:
226 return "FrameSizeSrc";
227 case IrInstructionIdFrameSizeGen:
228 return "FrameSizeGen";
229 case IrInstructionIdAlignOf:
230 return "AlignOf";
231 case IrInstructionIdOverflowOp:
232 return "OverflowOp";
233 case IrInstructionIdTestErrSrc:
234 return "TestErrSrc";
235 case IrInstructionIdTestErrGen:
236 return "TestErrGen";
237 case IrInstructionIdMulAdd:
238 return "MulAdd";
239 case IrInstructionIdFloatOp:
240 return "FloatOp";
241 case IrInstructionIdUnwrapErrCode:
242 return "UnwrapErrCode";
243 case IrInstructionIdUnwrapErrPayload:
244 return "UnwrapErrPayload";
245 case IrInstructionIdErrWrapCode:
246 return "ErrWrapCode";
247 case IrInstructionIdErrWrapPayload:
248 return "ErrWrapPayload";
249 case IrInstructionIdFnProto:
250 return "FnProto";
251 case IrInstructionIdTestComptime:
252 return "TestComptime";
253 case IrInstructionIdPtrCastSrc:
254 return "PtrCastSrc";
255 case IrInstructionIdPtrCastGen:
256 return "PtrCastGen";
257 case IrInstructionIdBitCastSrc:
258 return "BitCastSrc";
259 case IrInstructionIdBitCastGen:
260 return "BitCastGen";
261 case IrInstructionIdWidenOrShorten:
262 return "WidenOrShorten";
263 case IrInstructionIdIntToPtr:
264 return "IntToPtr";
265 case IrInstructionIdPtrToInt:
266 return "PtrToInt";
267 case IrInstructionIdIntToEnum:
268 return "IntToEnum";
269 case IrInstructionIdEnumToInt:
270 return "EnumToInt";
271 case IrInstructionIdIntToErr:
272 return "IntToErr";
273 case IrInstructionIdErrToInt:
274 return "ErrToInt";
275 case IrInstructionIdCheckSwitchProngs:
276 return "CheckSwitchProngs";
277 case IrInstructionIdCheckStatementIsVoid:
278 return "CheckStatementIsVoid";
279 case IrInstructionIdTypeName:
280 return "TypeName";
281 case IrInstructionIdDeclRef:
282 return "DeclRef";
283 case IrInstructionIdPanic:
284 return "Panic";
285 case IrInstructionIdTagName:
286 return "TagName";
287 case IrInstructionIdTagType:
288 return "TagType";
289 case IrInstructionIdFieldParentPtr:
290 return "FieldParentPtr";
291 case IrInstructionIdByteOffsetOf:
292 return "ByteOffsetOf";
293 case IrInstructionIdBitOffsetOf:
294 return "BitOffsetOf";
295 case IrInstructionIdTypeInfo:
296 return "TypeInfo";
297 case IrInstructionIdType:
298 return "Type";
299 case IrInstructionIdHasField:
300 return "HasField";
301 case IrInstructionIdTypeId:
302 return "TypeId";
303 case IrInstructionIdSetEvalBranchQuota:
304 return "SetEvalBranchQuota";
305 case IrInstructionIdPtrType:
306 return "PtrType";
307 case IrInstructionIdAlignCast:
308 return "AlignCast";
309 case IrInstructionIdImplicitCast:
310 return "ImplicitCast";
311 case IrInstructionIdResolveResult:
312 return "ResolveResult";
313 case IrInstructionIdResetResult:
314 return "ResetResult";
315 case IrInstructionIdOpaqueType:
316 return "OpaqueType";
317 case IrInstructionIdSetAlignStack:
318 return "SetAlignStack";
319 case IrInstructionIdArgType:
320 return "ArgType";
321 case IrInstructionIdExport:
322 return "Export";
323 case IrInstructionIdErrorReturnTrace:
324 return "ErrorReturnTrace";
325 case IrInstructionIdErrorUnion:
326 return "ErrorUnion";
327 case IrInstructionIdAtomicRmw:
328 return "AtomicRmw";
329 case IrInstructionIdAtomicLoad:
330 return "AtomicLoad";
331 case IrInstructionIdAtomicStore:
332 return "AtomicStore";
333 case IrInstructionIdSaveErrRetAddr:
334 return "SaveErrRetAddr";
335 case IrInstructionIdAddImplicitReturnType:
336 return "AddImplicitReturnType";
337 case IrInstructionIdErrSetCast:
338 return "ErrSetCast";
339 case IrInstructionIdToBytes:
340 return "ToBytes";
341 case IrInstructionIdFromBytes:
342 return "FromBytes";
343 case IrInstructionIdCheckRuntimeScope:
344 return "CheckRuntimeScope";
345 case IrInstructionIdVectorToArray:
346 return "VectorToArray";
347 case IrInstructionIdArrayToVector:
348 return "ArrayToVector";
349 case IrInstructionIdAssertZero:
350 return "AssertZero";
351 case IrInstructionIdAssertNonNull:
352 return "AssertNonNull";
353 case IrInstructionIdHasDecl:
354 return "HasDecl";
355 case IrInstructionIdUndeclaredIdent:
356 return "UndeclaredIdent";
357 case IrInstructionIdAllocaSrc:
358 return "AllocaSrc";
359 case IrInstructionIdAllocaGen:
360 return "AllocaGen";
361 case IrInstructionIdEndExpr:
362 return "EndExpr";
363 case IrInstructionIdPtrOfArrayToSlice:
364 return "PtrOfArrayToSlice";
365 case IrInstructionIdUnionInitNamedField:
366 return "UnionInitNamedField";
367 case IrInstructionIdSuspendBegin:
368 return "SuspendBegin";
369 case IrInstructionIdSuspendFinish:
370 return "SuspendFinish";
371 case IrInstructionIdAwaitSrc:
372 return "AwaitSrc";
373 case IrInstructionIdAwaitGen:
374 return "AwaitGen";
375 case IrInstructionIdResume:
376 return "Resume";
377 case IrInstructionIdSpillBegin:
378 return "SpillBegin";
379 case IrInstructionIdSpillEnd:
380 return "SpillEnd";
381 case IrInstructionIdVectorExtractElem:
382 return "VectorExtractElem";
60 case IrInstSrcIdInvalid:
61 return "SrcInvalid";
62 case IrInstSrcIdShuffleVector:
63 return "SrcShuffle";
64 case IrInstSrcIdSplat:
65 return "SrcSplat";
66 case IrInstSrcIdDeclVar:
67 return "SrcDeclVar";
68 case IrInstSrcIdBr:
69 return "SrcBr";
70 case IrInstSrcIdCondBr:
71 return "SrcCondBr";
72 case IrInstSrcIdSwitchBr:
73 return "SrcSwitchBr";
74 case IrInstSrcIdSwitchVar:
75 return "SrcSwitchVar";
76 case IrInstSrcIdSwitchElseVar:
77 return "SrcSwitchElseVar";
78 case IrInstSrcIdSwitchTarget:
79 return "SrcSwitchTarget";
80 case IrInstSrcIdPhi:
81 return "SrcPhi";
82 case IrInstSrcIdUnOp:
83 return "SrcUnOp";
84 case IrInstSrcIdBinOp:
85 return "SrcBinOp";
86 case IrInstSrcIdMergeErrSets:
87 return "SrcMergeErrSets";
88 case IrInstSrcIdLoadPtr:
89 return "SrcLoadPtr";
90 case IrInstSrcIdStorePtr:
91 return "SrcStorePtr";
92 case IrInstSrcIdFieldPtr:
93 return "SrcFieldPtr";
94 case IrInstSrcIdElemPtr:
95 return "SrcElemPtr";
96 case IrInstSrcIdVarPtr:
97 return "SrcVarPtr";
98 case IrInstSrcIdCallExtra:
99 return "SrcCallExtra";
100 case IrInstSrcIdCall:
101 return "SrcCall";
102 case IrInstSrcIdCallArgs:
103 return "SrcCallArgs";
104 case IrInstSrcIdConst:
105 return "SrcConst";
106 case IrInstSrcIdReturn:
107 return "SrcReturn";
108 case IrInstSrcIdContainerInitList:
109 return "SrcContainerInitList";
110 case IrInstSrcIdContainerInitFields:
111 return "SrcContainerInitFields";
112 case IrInstSrcIdUnreachable:
113 return "SrcUnreachable";
114 case IrInstSrcIdTypeOf:
115 return "SrcTypeOf";
116 case IrInstSrcIdSetCold:
117 return "SrcSetCold";
118 case IrInstSrcIdSetRuntimeSafety:
119 return "SrcSetRuntimeSafety";
120 case IrInstSrcIdSetFloatMode:
121 return "SrcSetFloatMode";
122 case IrInstSrcIdArrayType:
123 return "SrcArrayType";
124 case IrInstSrcIdAnyFrameType:
125 return "SrcAnyFrameType";
126 case IrInstSrcIdSliceType:
127 return "SrcSliceType";
128 case IrInstSrcIdAsm:
129 return "SrcAsm";
130 case IrInstSrcIdSizeOf:
131 return "SrcSizeOf";
132 case IrInstSrcIdTestNonNull:
133 return "SrcTestNonNull";
134 case IrInstSrcIdOptionalUnwrapPtr:
135 return "SrcOptionalUnwrapPtr";
136 case IrInstSrcIdClz:
137 return "SrcClz";
138 case IrInstSrcIdCtz:
139 return "SrcCtz";
140 case IrInstSrcIdPopCount:
141 return "SrcPopCount";
142 case IrInstSrcIdBswap:
143 return "SrcBswap";
144 case IrInstSrcIdBitReverse:
145 return "SrcBitReverse";
146 case IrInstSrcIdImport:
147 return "SrcImport";
148 case IrInstSrcIdCImport:
149 return "SrcCImport";
150 case IrInstSrcIdCInclude:
151 return "SrcCInclude";
152 case IrInstSrcIdCDefine:
153 return "SrcCDefine";
154 case IrInstSrcIdCUndef:
155 return "SrcCUndef";
156 case IrInstSrcIdRef:
157 return "SrcRef";
158 case IrInstSrcIdCompileErr:
159 return "SrcCompileErr";
160 case IrInstSrcIdCompileLog:
161 return "SrcCompileLog";
162 case IrInstSrcIdErrName:
163 return "SrcErrName";
164 case IrInstSrcIdEmbedFile:
165 return "SrcEmbedFile";
166 case IrInstSrcIdCmpxchg:
167 return "SrcCmpxchg";
168 case IrInstSrcIdFence:
169 return "SrcFence";
170 case IrInstSrcIdTruncate:
171 return "SrcTruncate";
172 case IrInstSrcIdIntCast:
173 return "SrcIntCast";
174 case IrInstSrcIdFloatCast:
175 return "SrcFloatCast";
176 case IrInstSrcIdIntToFloat:
177 return "SrcIntToFloat";
178 case IrInstSrcIdFloatToInt:
179 return "SrcFloatToInt";
180 case IrInstSrcIdBoolToInt:
181 return "SrcBoolToInt";
182 case IrInstSrcIdIntType:
183 return "SrcIntType";
184 case IrInstSrcIdVectorType:
185 return "SrcVectorType";
186 case IrInstSrcIdBoolNot:
187 return "SrcBoolNot";
188 case IrInstSrcIdMemset:
189 return "SrcMemset";
190 case IrInstSrcIdMemcpy:
191 return "SrcMemcpy";
192 case IrInstSrcIdSlice:
193 return "SrcSlice";
194 case IrInstSrcIdMemberCount:
195 return "SrcMemberCount";
196 case IrInstSrcIdMemberType:
197 return "SrcMemberType";
198 case IrInstSrcIdMemberName:
199 return "SrcMemberName";
200 case IrInstSrcIdBreakpoint:
201 return "SrcBreakpoint";
202 case IrInstSrcIdReturnAddress:
203 return "SrcReturnAddress";
204 case IrInstSrcIdFrameAddress:
205 return "SrcFrameAddress";
206 case IrInstSrcIdFrameHandle:
207 return "SrcFrameHandle";
208 case IrInstSrcIdFrameType:
209 return "SrcFrameType";
210 case IrInstSrcIdFrameSize:
211 return "SrcFrameSize";
212 case IrInstSrcIdAlignOf:
213 return "SrcAlignOf";
214 case IrInstSrcIdOverflowOp:
215 return "SrcOverflowOp";
216 case IrInstSrcIdTestErr:
217 return "SrcTestErr";
218 case IrInstSrcIdMulAdd:
219 return "SrcMulAdd";
220 case IrInstSrcIdFloatOp:
221 return "SrcFloatOp";
222 case IrInstSrcIdUnwrapErrCode:
223 return "SrcUnwrapErrCode";
224 case IrInstSrcIdUnwrapErrPayload:
225 return "SrcUnwrapErrPayload";
226 case IrInstSrcIdFnProto:
227 return "SrcFnProto";
228 case IrInstSrcIdTestComptime:
229 return "SrcTestComptime";
230 case IrInstSrcIdPtrCast:
231 return "SrcPtrCast";
232 case IrInstSrcIdBitCast:
233 return "SrcBitCast";
234 case IrInstSrcIdIntToPtr:
235 return "SrcIntToPtr";
236 case IrInstSrcIdPtrToInt:
237 return "SrcPtrToInt";
238 case IrInstSrcIdIntToEnum:
239 return "SrcIntToEnum";
240 case IrInstSrcIdEnumToInt:
241 return "SrcEnumToInt";
242 case IrInstSrcIdIntToErr:
243 return "SrcIntToErr";
244 case IrInstSrcIdErrToInt:
245 return "SrcErrToInt";
246 case IrInstSrcIdCheckSwitchProngs:
247 return "SrcCheckSwitchProngs";
248 case IrInstSrcIdCheckStatementIsVoid:
249 return "SrcCheckStatementIsVoid";
250 case IrInstSrcIdTypeName:
251 return "SrcTypeName";
252 case IrInstSrcIdDeclRef:
253 return "SrcDeclRef";
254 case IrInstSrcIdPanic:
255 return "SrcPanic";
256 case IrInstSrcIdTagName:
257 return "SrcTagName";
258 case IrInstSrcIdTagType:
259 return "SrcTagType";
260 case IrInstSrcIdFieldParentPtr:
261 return "SrcFieldParentPtr";
262 case IrInstSrcIdByteOffsetOf:
263 return "SrcByteOffsetOf";
264 case IrInstSrcIdBitOffsetOf:
265 return "SrcBitOffsetOf";
266 case IrInstSrcIdTypeInfo:
267 return "SrcTypeInfo";
268 case IrInstSrcIdType:
269 return "SrcType";
270 case IrInstSrcIdHasField:
271 return "SrcHasField";
272 case IrInstSrcIdTypeId:
273 return "SrcTypeId";
274 case IrInstSrcIdSetEvalBranchQuota:
275 return "SrcSetEvalBranchQuota";
276 case IrInstSrcIdPtrType:
277 return "SrcPtrType";
278 case IrInstSrcIdAlignCast:
279 return "SrcAlignCast";
280 case IrInstSrcIdImplicitCast:
281 return "SrcImplicitCast";
282 case IrInstSrcIdResolveResult:
283 return "SrcResolveResult";
284 case IrInstSrcIdResetResult:
285 return "SrcResetResult";
286 case IrInstSrcIdOpaqueType:
287 return "SrcOpaqueType";
288 case IrInstSrcIdSetAlignStack:
289 return "SrcSetAlignStack";
290 case IrInstSrcIdArgType:
291 return "SrcArgType";
292 case IrInstSrcIdExport:
293 return "SrcExport";
294 case IrInstSrcIdErrorReturnTrace:
295 return "SrcErrorReturnTrace";
296 case IrInstSrcIdErrorUnion:
297 return "SrcErrorUnion";
298 case IrInstSrcIdAtomicRmw:
299 return "SrcAtomicRmw";
300 case IrInstSrcIdAtomicLoad:
301 return "SrcAtomicLoad";
302 case IrInstSrcIdAtomicStore:
303 return "SrcAtomicStore";
304 case IrInstSrcIdSaveErrRetAddr:
305 return "SrcSaveErrRetAddr";
306 case IrInstSrcIdAddImplicitReturnType:
307 return "SrcAddImplicitReturnType";
308 case IrInstSrcIdErrSetCast:
309 return "SrcErrSetCast";
310 case IrInstSrcIdToBytes:
311 return "SrcToBytes";
312 case IrInstSrcIdFromBytes:
313 return "SrcFromBytes";
314 case IrInstSrcIdCheckRuntimeScope:
315 return "SrcCheckRuntimeScope";
316 case IrInstSrcIdHasDecl:
317 return "SrcHasDecl";
318 case IrInstSrcIdUndeclaredIdent:
319 return "SrcUndeclaredIdent";
320 case IrInstSrcIdAlloca:
321 return "SrcAlloca";
322 case IrInstSrcIdEndExpr:
323 return "SrcEndExpr";
324 case IrInstSrcIdUnionInitNamedField:
325 return "SrcUnionInitNamedField";
326 case IrInstSrcIdSuspendBegin:
327 return "SrcSuspendBegin";
328 case IrInstSrcIdSuspendFinish:
329 return "SrcSuspendFinish";
330 case IrInstSrcIdAwait:
331 return "SrcAwaitSr";
332 case IrInstSrcIdResume:
333 return "SrcResume";
334 case IrInstSrcIdSpillBegin:
335 return "SrcSpillBegin";
336 case IrInstSrcIdSpillEnd:
337 return "SrcSpillEnd";
383338 }
384339 zig_unreachable();
385340}
386341
387static void ir_print_indent(IrPrint *irp) {
342const char* ir_inst_gen_type_str(IrInstGenId id) {
343 switch (id) {
344 case IrInstGenIdInvalid:
345 return "GenInvalid";
346 case IrInstGenIdShuffleVector:
347 return "GenShuffle";
348 case IrInstGenIdSplat:
349 return "GenSplat";
350 case IrInstGenIdDeclVar:
351 return "GenDeclVar";
352 case IrInstGenIdBr:
353 return "GenBr";
354 case IrInstGenIdCondBr:
355 return "GenCondBr";
356 case IrInstGenIdSwitchBr:
357 return "GenSwitchBr";
358 case IrInstGenIdPhi:
359 return "GenPhi";
360 case IrInstGenIdBinOp:
361 return "GenBinOp";
362 case IrInstGenIdLoadPtr:
363 return "GenLoadPtr";
364 case IrInstGenIdStorePtr:
365 return "GenStorePtr";
366 case IrInstGenIdVectorStoreElem:
367 return "GenVectorStoreElem";
368 case IrInstGenIdStructFieldPtr:
369 return "GenStructFieldPtr";
370 case IrInstGenIdUnionFieldPtr:
371 return "GenUnionFieldPtr";
372 case IrInstGenIdElemPtr:
373 return "GenElemPtr";
374 case IrInstGenIdVarPtr:
375 return "GenVarPtr";
376 case IrInstGenIdReturnPtr:
377 return "GenReturnPtr";
378 case IrInstGenIdCall:
379 return "GenCall";
380 case IrInstGenIdConst:
381 return "GenConst";
382 case IrInstGenIdReturn:
383 return "GenReturn";
384 case IrInstGenIdCast:
385 return "GenCast";
386 case IrInstGenIdResizeSlice:
387 return "GenResizeSlice";
388 case IrInstGenIdUnreachable:
389 return "GenUnreachable";
390 case IrInstGenIdAsm:
391 return "GenAsm";
392 case IrInstGenIdTestNonNull:
393 return "GenTestNonNull";
394 case IrInstGenIdOptionalUnwrapPtr:
395 return "GenOptionalUnwrapPtr";
396 case IrInstGenIdOptionalWrap:
397 return "GenOptionalWrap";
398 case IrInstGenIdUnionTag:
399 return "GenUnionTag";
400 case IrInstGenIdClz:
401 return "GenClz";
402 case IrInstGenIdCtz:
403 return "GenCtz";
404 case IrInstGenIdPopCount:
405 return "GenPopCount";
406 case IrInstGenIdBswap:
407 return "GenBswap";
408 case IrInstGenIdBitReverse:
409 return "GenBitReverse";
410 case IrInstGenIdRef:
411 return "GenRef";
412 case IrInstGenIdErrName:
413 return "GenErrName";
414 case IrInstGenIdCmpxchg:
415 return "GenCmpxchg";
416 case IrInstGenIdFence:
417 return "GenFence";
418 case IrInstGenIdTruncate:
419 return "GenTruncate";
420 case IrInstGenIdBoolNot:
421 return "GenBoolNot";
422 case IrInstGenIdMemset:
423 return "GenMemset";
424 case IrInstGenIdMemcpy:
425 return "GenMemcpy";
426 case IrInstGenIdSlice:
427 return "GenSlice";
428 case IrInstGenIdBreakpoint:
429 return "GenBreakpoint";
430 case IrInstGenIdReturnAddress:
431 return "GenReturnAddress";
432 case IrInstGenIdFrameAddress:
433 return "GenFrameAddress";
434 case IrInstGenIdFrameHandle:
435 return "GenFrameHandle";
436 case IrInstGenIdFrameSize:
437 return "GenFrameSize";
438 case IrInstGenIdOverflowOp:
439 return "GenOverflowOp";
440 case IrInstGenIdTestErr:
441 return "GenTestErr";
442 case IrInstGenIdMulAdd:
443 return "GenMulAdd";
444 case IrInstGenIdFloatOp:
445 return "GenFloatOp";
446 case IrInstGenIdUnwrapErrCode:
447 return "GenUnwrapErrCode";
448 case IrInstGenIdUnwrapErrPayload:
449 return "GenUnwrapErrPayload";
450 case IrInstGenIdErrWrapCode:
451 return "GenErrWrapCode";
452 case IrInstGenIdErrWrapPayload:
453 return "GenErrWrapPayload";
454 case IrInstGenIdPtrCast:
455 return "GenPtrCast";
456 case IrInstGenIdBitCast:
457 return "GenBitCast";
458 case IrInstGenIdWidenOrShorten:
459 return "GenWidenOrShorten";
460 case IrInstGenIdIntToPtr:
461 return "GenIntToPtr";
462 case IrInstGenIdPtrToInt:
463 return "GenPtrToInt";
464 case IrInstGenIdIntToEnum:
465 return "GenIntToEnum";
466 case IrInstGenIdIntToErr:
467 return "GenIntToErr";
468 case IrInstGenIdErrToInt:
469 return "GenErrToInt";
470 case IrInstGenIdPanic:
471 return "GenPanic";
472 case IrInstGenIdTagName:
473 return "GenTagName";
474 case IrInstGenIdFieldParentPtr:
475 return "GenFieldParentPtr";
476 case IrInstGenIdAlignCast:
477 return "GenAlignCast";
478 case IrInstGenIdErrorReturnTrace:
479 return "GenErrorReturnTrace";
480 case IrInstGenIdAtomicRmw:
481 return "GenAtomicRmw";
482 case IrInstGenIdAtomicLoad:
483 return "GenAtomicLoad";
484 case IrInstGenIdAtomicStore:
485 return "GenAtomicStore";
486 case IrInstGenIdSaveErrRetAddr:
487 return "GenSaveErrRetAddr";
488 case IrInstGenIdVectorToArray:
489 return "GenVectorToArray";
490 case IrInstGenIdArrayToVector:
491 return "GenArrayToVector";
492 case IrInstGenIdAssertZero:
493 return "GenAssertZero";
494 case IrInstGenIdAssertNonNull:
495 return "GenAssertNonNull";
496 case IrInstGenIdAlloca:
497 return "GenAlloca";
498 case IrInstGenIdPtrOfArrayToSlice:
499 return "GenPtrOfArrayToSlice";
500 case IrInstGenIdSuspendBegin:
501 return "GenSuspendBegin";
502 case IrInstGenIdSuspendFinish:
503 return "GenSuspendFinish";
504 case IrInstGenIdAwait:
505 return "GenAwait";
506 case IrInstGenIdResume:
507 return "GenResume";
508 case IrInstGenIdSpillBegin:
509 return "GenSpillBegin";
510 case IrInstGenIdSpillEnd:
511 return "GenSpillEnd";
512 case IrInstGenIdVectorExtractElem:
513 return "GenVectorExtractElem";
514 case IrInstGenIdBinaryNot:
515 return "GenBinaryNot";
516 case IrInstGenIdNegation:
517 return "GenNegation";
518 case IrInstGenIdNegationWrapping:
519 return "GenNegationWrapping";
520 }
521 zig_unreachable();
522}
523
524static void ir_print_indent_src(IrPrintSrc *irp) {
388525 for (int i = 0; i < irp->indent; i += 1) {
389526 fprintf(irp->f, " ");
390527 }
391528}
392529
393static void ir_print_prefix(IrPrint *irp, IrInstruction *instruction, bool trailing) {
394 ir_print_indent(irp);
530static void ir_print_indent_gen(IrPrintGen *irp) {
531 for (int i = 0; i < irp->indent; i += 1) {
532 fprintf(irp->f, " ");
533 }
534}
535
536static void ir_print_prefix_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
537 ir_print_indent_src(irp);
538 const char mark = trailing ? ':' : '#';
539 const char *type_name;
540 if (instruction->id == IrInstSrcIdConst) {
541 type_name = buf_ptr(&reinterpret_cast<IrInstSrcConst *>(instruction)->value->type->name);
542 } else if (instruction->is_noreturn) {
543 type_name = "noreturn";
544 } else {
545 type_name = "(unknown)";
546 }
547 const char *ref_count = ir_inst_src_has_side_effects(instruction) ?
548 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
549 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
550 ir_inst_src_type_str(instruction->id), type_name, ref_count);
551}
552
553static void ir_print_prefix_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
554 ir_print_indent_gen(irp);
395555 const char mark = trailing ? ':' : '#';
396556 const char *type_name = instruction->value->type ? buf_ptr(&instruction->value->type->name) : "(unknown)";
397 const char *ref_count = ir_has_side_effects(instruction) ?
398 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->ref_count));
399 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->debug_id,
400 ir_instruction_type_str(instruction->id), type_name, ref_count);
557 const char *ref_count = ir_inst_gen_has_side_effects(instruction) ?
558 "-" : buf_ptr(buf_sprintf("%" PRIu32 "", instruction->base.ref_count));
559 fprintf(irp->f, "%c%-3" PRIu32 "| %-22s| %-12s| %-2s| ", mark, instruction->base.debug_id,
560 ir_inst_gen_type_str(instruction->id), type_name, ref_count);
401561}
402562
403static void ir_print_const_value(IrPrint *irp, ZigValue *const_val) {
404 Buf buf = BUF_INIT;
405 buf_resize(&buf, 0);
406 render_const_value(irp->codegen, &buf, const_val);
407 fprintf(irp->f, "%s", buf_ptr(&buf));
563static void ir_print_var_src(IrPrintSrc *irp, IrInstSrc *inst) {
564 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
408565}
409566
410static void ir_print_var_instruction(IrPrint *irp, IrInstruction *instruction) {
411 fprintf(irp->f, "#%" PRIu32 "", instruction->debug_id);
412 if (irp->pass != IrPassSrc && irp->printed.maybe_get(instruction) == nullptr) {
413 irp->printed.put(instruction, 0);
414 irp->pending.append(instruction);
567static void ir_print_var_gen(IrPrintGen *irp, IrInstGen *inst) {
568 fprintf(irp->f, "#%" PRIu32 "", inst->base.debug_id);
569 if (irp->printed.maybe_get(inst) == nullptr) {
570 irp->printed.put(inst, 0);
571 irp->pending.append(inst);
415572 }
416573}
417574
418static void ir_print_other_instruction(IrPrint *irp, IrInstruction *instruction) {
419 if (instruction == nullptr) {
575static void ir_print_other_inst_src(IrPrintSrc *irp, IrInstSrc *inst) {
576 if (inst == nullptr) {
420577 fprintf(irp->f, "(null)");
421578 return;
422579 }
580 ir_print_var_src(irp, inst);
581}
582
583static void ir_print_const_value(CodeGen *g, FILE *f, ZigValue *const_val) {
584 Buf buf = BUF_INIT;
585 buf_resize(&buf, 0);
586 render_const_value(g, &buf, const_val);
587 fprintf(f, "%s", buf_ptr(&buf));
588}
589
590static void ir_print_other_inst_gen(IrPrintGen *irp, IrInstGen *inst) {
591 if (inst == nullptr) {
592 fprintf(irp->f, "(null)");
593 return;
594 }
595
596 if (inst->value->special != ConstValSpecialRuntime) {
597 ir_print_const_value(irp->codegen, irp->f, inst->value);
598 } else {
599 ir_print_var_gen(irp, inst);
600 }
601}
423602
424 if (instruction->value->special != ConstValSpecialRuntime) {
425 ir_print_const_value(irp, instruction->value);
603static void ir_print_other_block(IrPrintSrc *irp, IrBasicBlockSrc *bb) {
604 if (bb == nullptr) {
605 fprintf(irp->f, "(null block)");
426606 } else {
427 ir_print_var_instruction(irp, instruction);
607 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
428608 }
429609}
430610
431static void ir_print_other_block(IrPrint *irp, IrBasicBlock *bb) {
611static void ir_print_other_block_gen(IrPrintGen *irp, IrBasicBlockGen *bb) {
432612 if (bb == nullptr) {
433613 fprintf(irp->f, "(null block)");
434614 } else {
435 fprintf(irp->f, "$%s_%" ZIG_PRI_usize "", bb->name_hint, bb->debug_id);
615 fprintf(irp->f, "$%s_%" PRIu32 "", bb->name_hint, bb->debug_id);
436616 }
437617}
438618
439static void ir_print_return(IrPrint *irp, IrInstructionReturn *instruction) {
619static void ir_print_return_src(IrPrintSrc *irp, IrInstSrcReturn *inst) {
440620 fprintf(irp->f, "return ");
441 ir_print_other_instruction(irp, instruction->operand);
621 ir_print_other_inst_src(irp, inst->operand);
442622}
443623
444static void ir_print_const(IrPrint *irp, IrInstructionConst *const_instruction) {
445 ir_print_const_value(irp, const_instruction->base.value);
624static void ir_print_return_gen(IrPrintGen *irp, IrInstGenReturn *inst) {
625 fprintf(irp->f, "return ");
626 ir_print_other_inst_gen(irp, inst->operand);
627}
628
629static void ir_print_const(IrPrintSrc *irp, IrInstSrcConst *const_instruction) {
630 ir_print_const_value(irp->codegen, irp->f, const_instruction->value);
631}
632
633static void ir_print_const(IrPrintGen *irp, IrInstGenConst *const_instruction) {
634 ir_print_const_value(irp->codegen, irp->f, const_instruction->base.value);
446635}
447636
448637static const char *ir_bin_op_id_str(IrBinOp op_id) {
......@@ -531,89 +720,111 @@ static const char *ir_un_op_id_str(IrUnOp op_id) {
531720 zig_unreachable();
532721}
533722
534static void ir_print_un_op(IrPrint *irp, IrInstructionUnOp *un_op_instruction) {
535 fprintf(irp->f, "%s ", ir_un_op_id_str(un_op_instruction->op_id));
536 ir_print_other_instruction(irp, un_op_instruction->value);
723static void ir_print_un_op(IrPrintSrc *irp, IrInstSrcUnOp *inst) {
724 fprintf(irp->f, "%s ", ir_un_op_id_str(inst->op_id));
725 ir_print_other_inst_src(irp, inst->value);
726}
727
728static void ir_print_bin_op(IrPrintSrc *irp, IrInstSrcBinOp *bin_op_instruction) {
729 ir_print_other_inst_src(irp, bin_op_instruction->op1);
730 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
731 ir_print_other_inst_src(irp, bin_op_instruction->op2);
732 if (!bin_op_instruction->safety_check_on) {
733 fprintf(irp->f, " // no safety");
734 }
537735}
538736
539static void ir_print_bin_op(IrPrint *irp, IrInstructionBinOp *bin_op_instruction) {
540 ir_print_other_instruction(irp, bin_op_instruction->op1);
737static void ir_print_bin_op(IrPrintGen *irp, IrInstGenBinOp *bin_op_instruction) {
738 ir_print_other_inst_gen(irp, bin_op_instruction->op1);
541739 fprintf(irp->f, " %s ", ir_bin_op_id_str(bin_op_instruction->op_id));
542 ir_print_other_instruction(irp, bin_op_instruction->op2);
740 ir_print_other_inst_gen(irp, bin_op_instruction->op2);
543741 if (!bin_op_instruction->safety_check_on) {
544742 fprintf(irp->f, " // no safety");
545743 }
546744}
547745
548static void ir_print_merge_err_sets(IrPrint *irp, IrInstructionMergeErrSets *instruction) {
549 ir_print_other_instruction(irp, instruction->op1);
746static void ir_print_merge_err_sets(IrPrintSrc *irp, IrInstSrcMergeErrSets *instruction) {
747 ir_print_other_inst_src(irp, instruction->op1);
550748 fprintf(irp->f, " || ");
551 ir_print_other_instruction(irp, instruction->op2);
749 ir_print_other_inst_src(irp, instruction->op2);
552750 if (instruction->type_name != nullptr) {
553751 fprintf(irp->f, " // name=%s", buf_ptr(instruction->type_name));
554752 }
555753}
556754
557static void ir_print_decl_var_src(IrPrint *irp, IrInstructionDeclVarSrc *decl_var_instruction) {
755static void ir_print_decl_var_src(IrPrintSrc *irp, IrInstSrcDeclVar *decl_var_instruction) {
558756 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
559757 const char *name = decl_var_instruction->var->name;
560758 if (decl_var_instruction->var_type) {
561759 fprintf(irp->f, "%s %s: ", var_or_const, name);
562 ir_print_other_instruction(irp, decl_var_instruction->var_type);
760 ir_print_other_inst_src(irp, decl_var_instruction->var_type);
563761 fprintf(irp->f, " ");
564762 } else {
565763 fprintf(irp->f, "%s %s ", var_or_const, name);
566764 }
567765 if (decl_var_instruction->align_value) {
568766 fprintf(irp->f, "align ");
569 ir_print_other_instruction(irp, decl_var_instruction->align_value);
767 ir_print_other_inst_src(irp, decl_var_instruction->align_value);
570768 fprintf(irp->f, " ");
571769 }
572770 fprintf(irp->f, "= ");
573 ir_print_other_instruction(irp, decl_var_instruction->ptr);
771 ir_print_other_inst_src(irp, decl_var_instruction->ptr);
574772 if (decl_var_instruction->var->is_comptime != nullptr) {
575773 fprintf(irp->f, " // comptime = ");
576 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
774 ir_print_other_inst_src(irp, decl_var_instruction->var->is_comptime);
577775 }
578776}
579777
580static void ir_print_cast(IrPrint *irp, IrInstructionCast *cast_instruction) {
581 fprintf(irp->f, "cast ");
582 ir_print_other_instruction(irp, cast_instruction->value);
583 fprintf(irp->f, " to %s", buf_ptr(&cast_instruction->dest_type->name));
778static const char *cast_op_str(CastOp op) {
779 switch (op) {
780 case CastOpNoCast: return "NoCast";
781 case CastOpNoop: return "NoOp";
782 case CastOpIntToFloat: return "IntToFloat";
783 case CastOpFloatToInt: return "FloatToInt";
784 case CastOpBoolToInt: return "BoolToInt";
785 case CastOpNumLitToConcrete: return "NumLitToConcrate";
786 case CastOpErrSet: return "ErrSet";
787 case CastOpBitCast: return "BitCast";
788 }
789 zig_unreachable();
790}
791
792static void ir_print_cast(IrPrintGen *irp, IrInstGenCast *cast_instruction) {
793 fprintf(irp->f, "%s cast ", cast_op_str(cast_instruction->cast_op));
794 ir_print_other_inst_gen(irp, cast_instruction->value);
584795}
585796
586static void ir_print_result_loc_var(IrPrint *irp, ResultLocVar *result_loc_var) {
797static void ir_print_result_loc_var(IrPrintSrc *irp, ResultLocVar *result_loc_var) {
587798 fprintf(irp->f, "var(");
588 ir_print_other_instruction(irp, result_loc_var->base.source_instruction);
799 ir_print_other_inst_src(irp, result_loc_var->base.source_instruction);
589800 fprintf(irp->f, ")");
590801}
591802
592static void ir_print_result_loc_instruction(IrPrint *irp, ResultLocInstruction *result_loc_inst) {
803static void ir_print_result_loc_instruction(IrPrintSrc *irp, ResultLocInstruction *result_loc_inst) {
593804 fprintf(irp->f, "inst(");
594 ir_print_other_instruction(irp, result_loc_inst->base.source_instruction);
805 ir_print_other_inst_src(irp, result_loc_inst->base.source_instruction);
595806 fprintf(irp->f, ")");
596807}
597808
598static void ir_print_result_loc_peer(IrPrint *irp, ResultLocPeer *result_loc_peer) {
809static void ir_print_result_loc_peer(IrPrintSrc *irp, ResultLocPeer *result_loc_peer) {
599810 fprintf(irp->f, "peer(next=");
600811 ir_print_other_block(irp, result_loc_peer->next_bb);
601812 fprintf(irp->f, ")");
602813}
603814
604static void ir_print_result_loc_bit_cast(IrPrint *irp, ResultLocBitCast *result_loc_bit_cast) {
815static void ir_print_result_loc_bit_cast(IrPrintSrc *irp, ResultLocBitCast *result_loc_bit_cast) {
605816 fprintf(irp->f, "bitcast(ty=");
606 ir_print_other_instruction(irp, result_loc_bit_cast->base.source_instruction);
817 ir_print_other_inst_src(irp, result_loc_bit_cast->base.source_instruction);
607818 fprintf(irp->f, ")");
608819}
609820
610static void ir_print_result_loc_cast(IrPrint *irp, ResultLocCast *result_loc_cast) {
821static void ir_print_result_loc_cast(IrPrintSrc *irp, ResultLocCast *result_loc_cast) {
611822 fprintf(irp->f, "cast(ty=");
612 ir_print_other_instruction(irp, result_loc_cast->base.source_instruction);
823 ir_print_other_inst_src(irp, result_loc_cast->base.source_instruction);
613824 fprintf(irp->f, ")");
614825}
615826
616static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
827static void ir_print_result_loc(IrPrintSrc *irp, ResultLoc *result_loc) {
617828 switch (result_loc->id) {
618829 case ResultLocIdInvalid:
619830 zig_unreachable();
......@@ -640,34 +851,34 @@ static void ir_print_result_loc(IrPrint *irp, ResultLoc *result_loc) {
640851 zig_unreachable();
641852}
642853
643static void ir_print_call_extra(IrPrint *irp, IrInstructionCallExtra *instruction) {
854static void ir_print_call_extra(IrPrintSrc *irp, IrInstSrcCallExtra *instruction) {
644855 fprintf(irp->f, "opts=");
645 ir_print_other_instruction(irp, instruction->options);
856 ir_print_other_inst_src(irp, instruction->options);
646857 fprintf(irp->f, ", fn=");
647 ir_print_other_instruction(irp, instruction->fn_ref);
858 ir_print_other_inst_src(irp, instruction->fn_ref);
648859 fprintf(irp->f, ", args=");
649 ir_print_other_instruction(irp, instruction->args);
860 ir_print_other_inst_src(irp, instruction->args);
650861 fprintf(irp->f, ", result=");
651862 ir_print_result_loc(irp, instruction->result_loc);
652863}
653864
654static void ir_print_call_src_args(IrPrint *irp, IrInstructionCallSrcArgs *instruction) {
865static void ir_print_call_args(IrPrintSrc *irp, IrInstSrcCallArgs *instruction) {
655866 fprintf(irp->f, "opts=");
656 ir_print_other_instruction(irp, instruction->options);
867 ir_print_other_inst_src(irp, instruction->options);
657868 fprintf(irp->f, ", fn=");
658 ir_print_other_instruction(irp, instruction->fn_ref);
869 ir_print_other_inst_src(irp, instruction->fn_ref);
659870 fprintf(irp->f, ", args=(");
660871 for (size_t i = 0; i < instruction->args_len; i += 1) {
661 IrInstruction *arg = instruction->args_ptr[i];
872 IrInstSrc *arg = instruction->args_ptr[i];
662873 if (i != 0)
663874 fprintf(irp->f, ", ");
664 ir_print_other_instruction(irp, arg);
875 ir_print_other_inst_src(irp, arg);
665876 }
666877 fprintf(irp->f, "), result=");
667878 ir_print_result_loc(irp, instruction->result_loc);
668879}
669880
670static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instruction) {
881static void ir_print_call_src(IrPrintSrc *irp, IrInstSrcCall *call_instruction) {
671882 switch (call_instruction->modifier) {
672883 case CallModifierNone:
673884 break;
......@@ -699,20 +910,20 @@ static void ir_print_call_src(IrPrint *irp, IrInstructionCallSrc *call_instructi
699910 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
700911 } else {
701912 assert(call_instruction->fn_ref);
702 ir_print_other_instruction(irp, call_instruction->fn_ref);
913 ir_print_other_inst_src(irp, call_instruction->fn_ref);
703914 }
704915 fprintf(irp->f, "(");
705916 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
706 IrInstruction *arg = call_instruction->args[i];
917 IrInstSrc *arg = call_instruction->args[i];
707918 if (i != 0)
708919 fprintf(irp->f, ", ");
709 ir_print_other_instruction(irp, arg);
920 ir_print_other_inst_src(irp, arg);
710921 }
711922 fprintf(irp->f, ")result=");
712923 ir_print_result_loc(irp, call_instruction->result_loc);
713924}
714925
715static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instruction) {
926static void ir_print_call_gen(IrPrintGen *irp, IrInstGenCall *call_instruction) {
716927 switch (call_instruction->modifier) {
717928 case CallModifierNone:
718929 break;
......@@ -744,221 +955,291 @@ static void ir_print_call_gen(IrPrint *irp, IrInstructionCallGen *call_instructi
744955 fprintf(irp->f, "%s", buf_ptr(&call_instruction->fn_entry->symbol_name));
745956 } else {
746957 assert(call_instruction->fn_ref);
747 ir_print_other_instruction(irp, call_instruction->fn_ref);
958 ir_print_other_inst_gen(irp, call_instruction->fn_ref);
748959 }
749960 fprintf(irp->f, "(");
750961 for (size_t i = 0; i < call_instruction->arg_count; i += 1) {
751 IrInstruction *arg = call_instruction->args[i];
962 IrInstGen *arg = call_instruction->args[i];
752963 if (i != 0)
753964 fprintf(irp->f, ", ");
754 ir_print_other_instruction(irp, arg);
965 ir_print_other_inst_gen(irp, arg);
755966 }
756967 fprintf(irp->f, ")result=");
757 ir_print_other_instruction(irp, call_instruction->result_loc);
968 ir_print_other_inst_gen(irp, call_instruction->result_loc);
758969}
759970
760static void ir_print_cond_br(IrPrint *irp, IrInstructionCondBr *cond_br_instruction) {
971static void ir_print_cond_br(IrPrintSrc *irp, IrInstSrcCondBr *inst) {
761972 fprintf(irp->f, "if (");
762 ir_print_other_instruction(irp, cond_br_instruction->condition);
973 ir_print_other_inst_src(irp, inst->condition);
763974 fprintf(irp->f, ") ");
764 ir_print_other_block(irp, cond_br_instruction->then_block);
975 ir_print_other_block(irp, inst->then_block);
765976 fprintf(irp->f, " else ");
766 ir_print_other_block(irp, cond_br_instruction->else_block);
767 if (cond_br_instruction->is_comptime != nullptr) {
977 ir_print_other_block(irp, inst->else_block);
978 if (inst->is_comptime != nullptr) {
768979 fprintf(irp->f, " // comptime = ");
769 ir_print_other_instruction(irp, cond_br_instruction->is_comptime);
980 ir_print_other_inst_src(irp, inst->is_comptime);
770981 }
771982}
772983
773static void ir_print_br(IrPrint *irp, IrInstructionBr *br_instruction) {
984static void ir_print_cond_br(IrPrintGen *irp, IrInstGenCondBr *inst) {
985 fprintf(irp->f, "if (");
986 ir_print_other_inst_gen(irp, inst->condition);
987 fprintf(irp->f, ") ");
988 ir_print_other_block_gen(irp, inst->then_block);
989 fprintf(irp->f, " else ");
990 ir_print_other_block_gen(irp, inst->else_block);
991}
992
993static void ir_print_br(IrPrintSrc *irp, IrInstSrcBr *br_instruction) {
774994 fprintf(irp->f, "goto ");
775995 ir_print_other_block(irp, br_instruction->dest_block);
776996 if (br_instruction->is_comptime != nullptr) {
777997 fprintf(irp->f, " // comptime = ");
778 ir_print_other_instruction(irp, br_instruction->is_comptime);
998 ir_print_other_inst_src(irp, br_instruction->is_comptime);
779999 }
7801000}
7811001
782static void ir_print_phi(IrPrint *irp, IrInstructionPhi *phi_instruction) {
1002static void ir_print_br(IrPrintGen *irp, IrInstGenBr *inst) {
1003 fprintf(irp->f, "goto ");
1004 ir_print_other_block_gen(irp, inst->dest_block);
1005}
1006
1007static void ir_print_phi(IrPrintSrc *irp, IrInstSrcPhi *phi_instruction) {
7831008 assert(phi_instruction->incoming_count != 0);
7841009 assert(phi_instruction->incoming_count != SIZE_MAX);
7851010 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
786 IrBasicBlock *incoming_block = phi_instruction->incoming_blocks[i];
787 IrInstruction *incoming_value = phi_instruction->incoming_values[i];
1011 IrBasicBlockSrc *incoming_block = phi_instruction->incoming_blocks[i];
1012 IrInstSrc *incoming_value = phi_instruction->incoming_values[i];
7881013 if (i != 0)
7891014 fprintf(irp->f, " ");
7901015 ir_print_other_block(irp, incoming_block);
7911016 fprintf(irp->f, ":");
792 ir_print_other_instruction(irp, incoming_value);
1017 ir_print_other_inst_src(irp, incoming_value);
7931018 }
7941019}
7951020
796static void ir_print_container_init_list(IrPrint *irp, IrInstructionContainerInitList *instruction) {
1021static void ir_print_phi(IrPrintGen *irp, IrInstGenPhi *phi_instruction) {
1022 assert(phi_instruction->incoming_count != 0);
1023 assert(phi_instruction->incoming_count != SIZE_MAX);
1024 for (size_t i = 0; i < phi_instruction->incoming_count; i += 1) {
1025 IrBasicBlockGen *incoming_block = phi_instruction->incoming_blocks[i];
1026 IrInstGen *incoming_value = phi_instruction->incoming_values[i];
1027 if (i != 0)
1028 fprintf(irp->f, " ");
1029 ir_print_other_block_gen(irp, incoming_block);
1030 fprintf(irp->f, ":");
1031 ir_print_other_inst_gen(irp, incoming_value);
1032 }
1033}
1034
1035static void ir_print_container_init_list(IrPrintSrc *irp, IrInstSrcContainerInitList *instruction) {
7971036 fprintf(irp->f, "{");
7981037 if (instruction->item_count > 50) {
7991038 fprintf(irp->f, "...(%" ZIG_PRI_usize " items)...", instruction->item_count);
8001039 } else {
8011040 for (size_t i = 0; i < instruction->item_count; i += 1) {
802 IrInstruction *result_loc = instruction->elem_result_loc_list[i];
1041 IrInstSrc *result_loc = instruction->elem_result_loc_list[i];
8031042 if (i != 0)
8041043 fprintf(irp->f, ", ");
805 ir_print_other_instruction(irp, result_loc);
1044 ir_print_other_inst_src(irp, result_loc);
8061045 }
8071046 }
8081047 fprintf(irp->f, "}result=");
809 ir_print_other_instruction(irp, instruction->result_loc);
1048 ir_print_other_inst_src(irp, instruction->result_loc);
8101049}
8111050
812static void ir_print_container_init_fields(IrPrint *irp, IrInstructionContainerInitFields *instruction) {
1051static void ir_print_container_init_fields(IrPrintSrc *irp, IrInstSrcContainerInitFields *instruction) {
8131052 fprintf(irp->f, "{");
8141053 for (size_t i = 0; i < instruction->field_count; i += 1) {
815 IrInstructionContainerInitFieldsField *field = &instruction->fields[i];
1054 IrInstSrcContainerInitFieldsField *field = &instruction->fields[i];
8161055 const char *comma = (i == 0) ? "" : ", ";
8171056 fprintf(irp->f, "%s.%s = ", comma, buf_ptr(field->name));
818 ir_print_other_instruction(irp, field->result_loc);
1057 ir_print_other_inst_src(irp, field->result_loc);
8191058 }
8201059 fprintf(irp->f, "}result=");
821 ir_print_other_instruction(irp, instruction->result_loc);
1060 ir_print_other_inst_src(irp, instruction->result_loc);
1061}
1062
1063static void ir_print_unreachable(IrPrintSrc *irp, IrInstSrcUnreachable *instruction) {
1064 fprintf(irp->f, "unreachable");
8221065}
8231066
824static void ir_print_unreachable(IrPrint *irp, IrInstructionUnreachable *instruction) {
1067static void ir_print_unreachable(IrPrintGen *irp, IrInstGenUnreachable *instruction) {
8251068 fprintf(irp->f, "unreachable");
8261069}
8271070
828static void ir_print_elem_ptr(IrPrint *irp, IrInstructionElemPtr *instruction) {
1071static void ir_print_elem_ptr(IrPrintSrc *irp, IrInstSrcElemPtr *instruction) {
8291072 fprintf(irp->f, "&");
830 ir_print_other_instruction(irp, instruction->array_ptr);
1073 ir_print_other_inst_src(irp, instruction->array_ptr);
8311074 fprintf(irp->f, "[");
832 ir_print_other_instruction(irp, instruction->elem_index);
1075 ir_print_other_inst_src(irp, instruction->elem_index);
8331076 fprintf(irp->f, "]");
8341077 if (!instruction->safety_check_on) {
8351078 fprintf(irp->f, " // no safety");
8361079 }
8371080}
8381081
839static void ir_print_var_ptr(IrPrint *irp, IrInstructionVarPtr *instruction) {
1082static void ir_print_elem_ptr(IrPrintGen *irp, IrInstGenElemPtr *instruction) {
1083 fprintf(irp->f, "&");
1084 ir_print_other_inst_gen(irp, instruction->array_ptr);
1085 fprintf(irp->f, "[");
1086 ir_print_other_inst_gen(irp, instruction->elem_index);
1087 fprintf(irp->f, "]");
1088 if (!instruction->safety_check_on) {
1089 fprintf(irp->f, " // no safety");
1090 }
1091}
1092
1093static void ir_print_var_ptr(IrPrintSrc *irp, IrInstSrcVarPtr *instruction) {
1094 fprintf(irp->f, "&%s", instruction->var->name);
1095}
1096
1097static void ir_print_var_ptr(IrPrintGen *irp, IrInstGenVarPtr *instruction) {
8401098 fprintf(irp->f, "&%s", instruction->var->name);
8411099}
8421100
843static void ir_print_return_ptr(IrPrint *irp, IrInstructionReturnPtr *instruction) {
1101static void ir_print_return_ptr(IrPrintGen *irp, IrInstGenReturnPtr *instruction) {
8441102 fprintf(irp->f, "@ReturnPtr");
8451103}
8461104
847static void ir_print_load_ptr(IrPrint *irp, IrInstructionLoadPtr *instruction) {
848 ir_print_other_instruction(irp, instruction->ptr);
1105static void ir_print_load_ptr(IrPrintSrc *irp, IrInstSrcLoadPtr *instruction) {
1106 ir_print_other_inst_src(irp, instruction->ptr);
8491107 fprintf(irp->f, ".*");
8501108}
8511109
852static void ir_print_load_ptr_gen(IrPrint *irp, IrInstructionLoadPtrGen *instruction) {
1110static void ir_print_load_ptr_gen(IrPrintGen *irp, IrInstGenLoadPtr *instruction) {
8531111 fprintf(irp->f, "loadptr(");
854 ir_print_other_instruction(irp, instruction->ptr);
1112 ir_print_other_inst_gen(irp, instruction->ptr);
8551113 fprintf(irp->f, ")result=");
856 ir_print_other_instruction(irp, instruction->result_loc);
1114 ir_print_other_inst_gen(irp, instruction->result_loc);
1115}
1116
1117static void ir_print_store_ptr(IrPrintSrc *irp, IrInstSrcStorePtr *instruction) {
1118 fprintf(irp->f, "*");
1119 ir_print_var_src(irp, instruction->ptr);
1120 fprintf(irp->f, " = ");
1121 ir_print_other_inst_src(irp, instruction->value);
8571122}
8581123
859static void ir_print_store_ptr(IrPrint *irp, IrInstructionStorePtr *instruction) {
1124static void ir_print_store_ptr(IrPrintGen *irp, IrInstGenStorePtr *instruction) {
8601125 fprintf(irp->f, "*");
861 ir_print_var_instruction(irp, instruction->ptr);
1126 ir_print_var_gen(irp, instruction->ptr);
8621127 fprintf(irp->f, " = ");
863 ir_print_other_instruction(irp, instruction->value);
1128 ir_print_other_inst_gen(irp, instruction->value);
8641129}
8651130
866static void ir_print_vector_store_elem(IrPrint *irp, IrInstructionVectorStoreElem *instruction) {
1131static void ir_print_vector_store_elem(IrPrintGen *irp, IrInstGenVectorStoreElem *instruction) {
8671132 fprintf(irp->f, "vector_ptr=");
868 ir_print_var_instruction(irp, instruction->vector_ptr);
1133 ir_print_var_gen(irp, instruction->vector_ptr);
8691134 fprintf(irp->f, ",index=");
870 ir_print_var_instruction(irp, instruction->index);
1135 ir_print_var_gen(irp, instruction->index);
8711136 fprintf(irp->f, ",value=");
872 ir_print_other_instruction(irp, instruction->value);
1137 ir_print_other_inst_gen(irp, instruction->value);
8731138}
8741139
875static void ir_print_typeof(IrPrint *irp, IrInstructionTypeOf *instruction) {
1140static void ir_print_typeof(IrPrintSrc *irp, IrInstSrcTypeOf *instruction) {
8761141 fprintf(irp->f, "@TypeOf(");
877 ir_print_other_instruction(irp, instruction->value);
1142 ir_print_other_inst_src(irp, instruction->value);
8781143 fprintf(irp->f, ")");
8791144}
8801145
881static void ir_print_field_ptr(IrPrint *irp, IrInstructionFieldPtr *instruction) {
1146static void ir_print_binary_not(IrPrintGen *irp, IrInstGenBinaryNot *instruction) {
1147 fprintf(irp->f, "~");
1148 ir_print_other_inst_gen(irp, instruction->operand);
1149}
1150
1151static void ir_print_negation(IrPrintGen *irp, IrInstGenNegation *instruction) {
1152 fprintf(irp->f, "-");
1153 ir_print_other_inst_gen(irp, instruction->operand);
1154}
1155
1156static void ir_print_negation_wrapping(IrPrintGen *irp, IrInstGenNegationWrapping *instruction) {
1157 fprintf(irp->f, "-%%");
1158 ir_print_other_inst_gen(irp, instruction->operand);
1159}
1160
1161
1162static void ir_print_field_ptr(IrPrintSrc *irp, IrInstSrcFieldPtr *instruction) {
8821163 if (instruction->field_name_buffer) {
8831164 fprintf(irp->f, "fieldptr ");
884 ir_print_other_instruction(irp, instruction->container_ptr);
1165 ir_print_other_inst_src(irp, instruction->container_ptr);
8851166 fprintf(irp->f, ".%s", buf_ptr(instruction->field_name_buffer));
8861167 } else {
8871168 assert(instruction->field_name_expr);
8881169 fprintf(irp->f, "@field(");
889 ir_print_other_instruction(irp, instruction->container_ptr);
1170 ir_print_other_inst_src(irp, instruction->container_ptr);
8901171 fprintf(irp->f, ", ");
891 ir_print_other_instruction(irp, instruction->field_name_expr);
1172 ir_print_other_inst_src(irp, instruction->field_name_expr);
8921173 fprintf(irp->f, ")");
8931174 }
8941175}
8951176
896static void ir_print_struct_field_ptr(IrPrint *irp, IrInstructionStructFieldPtr *instruction) {
1177static void ir_print_struct_field_ptr(IrPrintGen *irp, IrInstGenStructFieldPtr *instruction) {
8971178 fprintf(irp->f, "@StructFieldPtr(&");
898 ir_print_other_instruction(irp, instruction->struct_ptr);
1179 ir_print_other_inst_gen(irp, instruction->struct_ptr);
8991180 fprintf(irp->f, ".%s", buf_ptr(instruction->field->name));
9001181 fprintf(irp->f, ")");
9011182}
9021183
903static void ir_print_union_field_ptr(IrPrint *irp, IrInstructionUnionFieldPtr *instruction) {
1184static void ir_print_union_field_ptr(IrPrintGen *irp, IrInstGenUnionFieldPtr *instruction) {
9041185 fprintf(irp->f, "@UnionFieldPtr(&");
905 ir_print_other_instruction(irp, instruction->union_ptr);
1186 ir_print_other_inst_gen(irp, instruction->union_ptr);
9061187 fprintf(irp->f, ".%s", buf_ptr(instruction->field->enum_field->name));
9071188 fprintf(irp->f, ")");
9081189}
9091190
910static void ir_print_set_cold(IrPrint *irp, IrInstructionSetCold *instruction) {
1191static void ir_print_set_cold(IrPrintSrc *irp, IrInstSrcSetCold *instruction) {
9111192 fprintf(irp->f, "@setCold(");
912 ir_print_other_instruction(irp, instruction->is_cold);
1193 ir_print_other_inst_src(irp, instruction->is_cold);
9131194 fprintf(irp->f, ")");
9141195}
9151196
916static void ir_print_set_runtime_safety(IrPrint *irp, IrInstructionSetRuntimeSafety *instruction) {
1197static void ir_print_set_runtime_safety(IrPrintSrc *irp, IrInstSrcSetRuntimeSafety *instruction) {
9171198 fprintf(irp->f, "@setRuntimeSafety(");
918 ir_print_other_instruction(irp, instruction->safety_on);
1199 ir_print_other_inst_src(irp, instruction->safety_on);
9191200 fprintf(irp->f, ")");
9201201}
9211202
922static void ir_print_set_float_mode(IrPrint *irp, IrInstructionSetFloatMode *instruction) {
1203static void ir_print_set_float_mode(IrPrintSrc *irp, IrInstSrcSetFloatMode *instruction) {
9231204 fprintf(irp->f, "@setFloatMode(");
924 ir_print_other_instruction(irp, instruction->scope_value);
1205 ir_print_other_inst_src(irp, instruction->scope_value);
9251206 fprintf(irp->f, ", ");
926 ir_print_other_instruction(irp, instruction->mode_value);
1207 ir_print_other_inst_src(irp, instruction->mode_value);
9271208 fprintf(irp->f, ")");
9281209}
9291210
930static void ir_print_array_type(IrPrint *irp, IrInstructionArrayType *instruction) {
1211static void ir_print_array_type(IrPrintSrc *irp, IrInstSrcArrayType *instruction) {
9311212 fprintf(irp->f, "[");
932 ir_print_other_instruction(irp, instruction->size);
1213 ir_print_other_inst_src(irp, instruction->size);
9331214 if (instruction->sentinel != nullptr) {
9341215 fprintf(irp->f, ":");
935 ir_print_other_instruction(irp, instruction->sentinel);
1216 ir_print_other_inst_src(irp, instruction->sentinel);
9361217 }
9371218 fprintf(irp->f, "]");
938 ir_print_other_instruction(irp, instruction->child_type);
1219 ir_print_other_inst_src(irp, instruction->child_type);
9391220}
9401221
941static void ir_print_slice_type(IrPrint *irp, IrInstructionSliceType *instruction) {
1222static void ir_print_slice_type(IrPrintSrc *irp, IrInstSrcSliceType *instruction) {
9421223 const char *const_kw = instruction->is_const ? "const " : "";
9431224 fprintf(irp->f, "[]%s", const_kw);
944 ir_print_other_instruction(irp, instruction->child_type);
1225 ir_print_other_inst_src(irp, instruction->child_type);
9451226}
9461227
947static void ir_print_any_frame_type(IrPrint *irp, IrInstructionAnyFrameType *instruction) {
1228static void ir_print_any_frame_type(IrPrintSrc *irp, IrInstSrcAnyFrameType *instruction) {
9481229 if (instruction->payload_type == nullptr) {
9491230 fprintf(irp->f, "anyframe");
9501231 } else {
9511232 fprintf(irp->f, "anyframe->");
952 ir_print_other_instruction(irp, instruction->payload_type);
1233 ir_print_other_inst_src(irp, instruction->payload_type);
9531234 }
9541235}
9551236
956static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
957 assert(instruction->base.source_node->type == NodeTypeAsmExpr);
958 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
1237static void ir_print_asm_src(IrPrintSrc *irp, IrInstSrcAsm *instruction) {
1238 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
1239 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
9591240 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
9601241 fprintf(irp->f, "asm%s (", volatile_kw);
961 ir_print_other_instruction(irp, instruction->asm_template);
1242 ir_print_other_inst_src(irp, instruction->asm_template);
9621243
9631244 for (size_t i = 0; i < asm_expr->output_list.length; i += 1) {
9641245 AsmOutput *asm_output = asm_expr->output_list.at(i);
......@@ -969,7 +1250,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9691250 buf_ptr(asm_output->constraint));
9701251 if (asm_output->return_type) {
9711252 fprintf(irp->f, "-> ");
972 ir_print_other_instruction(irp, instruction->output_types[i]);
1253 ir_print_other_inst_src(irp, instruction->output_types[i]);
9731254 } else {
9741255 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
9751256 }
......@@ -984,7 +1265,7 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9841265 fprintf(irp->f, "[%s] \"%s\" (",
9851266 buf_ptr(asm_input->asm_symbolic_name),
9861267 buf_ptr(asm_input->constraint));
987 ir_print_other_instruction(irp, instruction->input_list[i]);
1268 ir_print_other_inst_src(irp, instruction->input_list[i]);
9881269 fprintf(irp->f, ")");
9891270 }
9901271 fprintf(irp->f, " : ");
......@@ -996,9 +1277,9 @@ static void ir_print_asm_src(IrPrint *irp, IrInstructionAsmSrc *instruction) {
9961277 fprintf(irp->f, ")");
9971278}
9981279
999static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
1000 assert(instruction->base.source_node->type == NodeTypeAsmExpr);
1001 AstNodeAsmExpr *asm_expr = &instruction->base.source_node->data.asm_expr;
1280static void ir_print_asm_gen(IrPrintGen *irp, IrInstGenAsm *instruction) {
1281 assert(instruction->base.base.source_node->type == NodeTypeAsmExpr);
1282 AstNodeAsmExpr *asm_expr = &instruction->base.base.source_node->data.asm_expr;
10021283 const char *volatile_kw = instruction->has_side_effects ? " volatile" : "";
10031284 fprintf(irp->f, "asm%s (\"%s\") : ", volatile_kw, buf_ptr(instruction->asm_template));
10041285
......@@ -1011,7 +1292,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10111292 buf_ptr(asm_output->constraint));
10121293 if (asm_output->return_type) {
10131294 fprintf(irp->f, "-> ");
1014 ir_print_other_instruction(irp, instruction->output_types[i]);
1295 ir_print_other_inst_gen(irp, instruction->output_types[i]);
10151296 } else {
10161297 fprintf(irp->f, "%s", buf_ptr(asm_output->variable_name));
10171298 }
......@@ -1026,7 +1307,7 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10261307 fprintf(irp->f, "[%s] \"%s\" (",
10271308 buf_ptr(asm_input->asm_symbolic_name),
10281309 buf_ptr(asm_input->constraint));
1029 ir_print_other_instruction(irp, instruction->input_list[i]);
1310 ir_print_other_inst_gen(irp, instruction->input_list[i]);
10301311 fprintf(irp->f, ")");
10311312 }
10321313 fprintf(irp->f, " : ");
......@@ -1038,96 +1319,120 @@ static void ir_print_asm_gen(IrPrint *irp, IrInstructionAsmGen *instruction) {
10381319 fprintf(irp->f, ")");
10391320}
10401321
1041static void ir_print_size_of(IrPrint *irp, IrInstructionSizeOf *instruction) {
1322static void ir_print_size_of(IrPrintSrc *irp, IrInstSrcSizeOf *instruction) {
10421323 if (instruction->bit_size)
10431324 fprintf(irp->f, "@bitSizeOf(");
10441325 else
10451326 fprintf(irp->f, "@sizeOf(");
1046 ir_print_other_instruction(irp, instruction->type_value);
1327 ir_print_other_inst_src(irp, instruction->type_value);
10471328 fprintf(irp->f, ")");
10481329}
10491330
1050static void ir_print_test_non_null(IrPrint *irp, IrInstructionTestNonNull *instruction) {
1051 ir_print_other_instruction(irp, instruction->value);
1331static void ir_print_test_non_null(IrPrintSrc *irp, IrInstSrcTestNonNull *instruction) {
1332 ir_print_other_inst_src(irp, instruction->value);
1333 fprintf(irp->f, " != null");
1334}
1335
1336static void ir_print_test_non_null(IrPrintGen *irp, IrInstGenTestNonNull *instruction) {
1337 ir_print_other_inst_gen(irp, instruction->value);
10521338 fprintf(irp->f, " != null");
10531339}
10541340
1055static void ir_print_optional_unwrap_ptr(IrPrint *irp, IrInstructionOptionalUnwrapPtr *instruction) {
1341static void ir_print_optional_unwrap_ptr(IrPrintSrc *irp, IrInstSrcOptionalUnwrapPtr *instruction) {
10561342 fprintf(irp->f, "&");
1057 ir_print_other_instruction(irp, instruction->base_ptr);
1343 ir_print_other_inst_src(irp, instruction->base_ptr);
10581344 fprintf(irp->f, ".*.?");
10591345 if (!instruction->safety_check_on) {
10601346 fprintf(irp->f, " // no safety");
10611347 }
10621348}
10631349
1064static void ir_print_clz(IrPrint *irp, IrInstructionClz *instruction) {
1065 fprintf(irp->f, "@clz(");
1066 if (instruction->type != nullptr) {
1067 ir_print_other_instruction(irp, instruction->type);
1068 } else {
1069 fprintf(irp->f, "null");
1350static void ir_print_optional_unwrap_ptr(IrPrintGen *irp, IrInstGenOptionalUnwrapPtr *instruction) {
1351 fprintf(irp->f, "&");
1352 ir_print_other_inst_gen(irp, instruction->base_ptr);
1353 fprintf(irp->f, ".*.?");
1354 if (!instruction->safety_check_on) {
1355 fprintf(irp->f, " // no safety");
10701356 }
1357}
1358
1359static void ir_print_clz(IrPrintSrc *irp, IrInstSrcClz *instruction) {
1360 fprintf(irp->f, "@clz(");
1361 ir_print_other_inst_src(irp, instruction->type);
10711362 fprintf(irp->f, ",");
1072 ir_print_other_instruction(irp, instruction->op);
1363 ir_print_other_inst_src(irp, instruction->op);
10731364 fprintf(irp->f, ")");
10741365}
10751366
1076static void ir_print_ctz(IrPrint *irp, IrInstructionCtz *instruction) {
1367static void ir_print_clz(IrPrintGen *irp, IrInstGenClz *instruction) {
1368 fprintf(irp->f, "@clz(");
1369 ir_print_other_inst_gen(irp, instruction->op);
1370 fprintf(irp->f, ")");
1371}
1372
1373static void ir_print_ctz(IrPrintSrc *irp, IrInstSrcCtz *instruction) {
10771374 fprintf(irp->f, "@ctz(");
1078 if (instruction->type != nullptr) {
1079 ir_print_other_instruction(irp, instruction->type);
1080 } else {
1081 fprintf(irp->f, "null");
1082 }
1375 ir_print_other_inst_src(irp, instruction->type);
10831376 fprintf(irp->f, ",");
1084 ir_print_other_instruction(irp, instruction->op);
1377 ir_print_other_inst_src(irp, instruction->op);
10851378 fprintf(irp->f, ")");
10861379}
10871380
1088static void ir_print_pop_count(IrPrint *irp, IrInstructionPopCount *instruction) {
1381static void ir_print_ctz(IrPrintGen *irp, IrInstGenCtz *instruction) {
1382 fprintf(irp->f, "@ctz(");
1383 ir_print_other_inst_gen(irp, instruction->op);
1384 fprintf(irp->f, ")");
1385}
1386
1387static void ir_print_pop_count(IrPrintSrc *irp, IrInstSrcPopCount *instruction) {
10891388 fprintf(irp->f, "@popCount(");
1090 if (instruction->type != nullptr) {
1091 ir_print_other_instruction(irp, instruction->type);
1092 } else {
1093 fprintf(irp->f, "null");
1094 }
1389 ir_print_other_inst_src(irp, instruction->type);
10951390 fprintf(irp->f, ",");
1096 ir_print_other_instruction(irp, instruction->op);
1391 ir_print_other_inst_src(irp, instruction->op);
10971392 fprintf(irp->f, ")");
10981393}
10991394
1100static void ir_print_bswap(IrPrint *irp, IrInstructionBswap *instruction) {
1395static void ir_print_pop_count(IrPrintGen *irp, IrInstGenPopCount *instruction) {
1396 fprintf(irp->f, "@popCount(");
1397 ir_print_other_inst_gen(irp, instruction->op);
1398 fprintf(irp->f, ")");
1399}
1400
1401static void ir_print_bswap(IrPrintSrc *irp, IrInstSrcBswap *instruction) {
11011402 fprintf(irp->f, "@byteSwap(");
1102 if (instruction->type != nullptr) {
1103 ir_print_other_instruction(irp, instruction->type);
1104 } else {
1105 fprintf(irp->f, "null");
1106 }
1403 ir_print_other_inst_src(irp, instruction->type);
11071404 fprintf(irp->f, ",");
1108 ir_print_other_instruction(irp, instruction->op);
1405 ir_print_other_inst_src(irp, instruction->op);
11091406 fprintf(irp->f, ")");
11101407}
11111408
1112static void ir_print_bit_reverse(IrPrint *irp, IrInstructionBitReverse *instruction) {
1409static void ir_print_bswap(IrPrintGen *irp, IrInstGenBswap *instruction) {
1410 fprintf(irp->f, "@byteSwap(");
1411 ir_print_other_inst_gen(irp, instruction->op);
1412 fprintf(irp->f, ")");
1413}
1414
1415static void ir_print_bit_reverse(IrPrintSrc *irp, IrInstSrcBitReverse *instruction) {
11131416 fprintf(irp->f, "@bitReverse(");
1114 if (instruction->type != nullptr) {
1115 ir_print_other_instruction(irp, instruction->type);
1116 } else {
1117 fprintf(irp->f, "null");
1118 }
1417 ir_print_other_inst_src(irp, instruction->type);
11191418 fprintf(irp->f, ",");
1120 ir_print_other_instruction(irp, instruction->op);
1419 ir_print_other_inst_src(irp, instruction->op);
11211420 fprintf(irp->f, ")");
11221421}
11231422
1124static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction) {
1423static void ir_print_bit_reverse(IrPrintGen *irp, IrInstGenBitReverse *instruction) {
1424 fprintf(irp->f, "@bitReverse(");
1425 ir_print_other_inst_gen(irp, instruction->op);
1426 fprintf(irp->f, ")");
1427}
1428
1429static void ir_print_switch_br(IrPrintSrc *irp, IrInstSrcSwitchBr *instruction) {
11251430 fprintf(irp->f, "switch (");
1126 ir_print_other_instruction(irp, instruction->target_value);
1431 ir_print_other_inst_src(irp, instruction->target_value);
11271432 fprintf(irp->f, ") ");
11281433 for (size_t i = 0; i < instruction->case_count; i += 1) {
1129 IrInstructionSwitchBrCase *this_case = &instruction->cases[i];
1130 ir_print_other_instruction(irp, this_case->value);
1434 IrInstSrcSwitchBrCase *this_case = &instruction->cases[i];
1435 ir_print_other_inst_src(irp, this_case->value);
11311436 fprintf(irp->f, " => ");
11321437 ir_print_other_block(irp, this_case->block);
11331438 fprintf(irp->f, ", ");
......@@ -1136,359 +1441,453 @@ static void ir_print_switch_br(IrPrint *irp, IrInstructionSwitchBr *instruction)
11361441 ir_print_other_block(irp, instruction->else_block);
11371442 if (instruction->is_comptime != nullptr) {
11381443 fprintf(irp->f, " // comptime = ");
1139 ir_print_other_instruction(irp, instruction->is_comptime);
1444 ir_print_other_inst_src(irp, instruction->is_comptime);
1445 }
1446}
1447
1448static void ir_print_switch_br(IrPrintGen *irp, IrInstGenSwitchBr *instruction) {
1449 fprintf(irp->f, "switch (");
1450 ir_print_other_inst_gen(irp, instruction->target_value);
1451 fprintf(irp->f, ") ");
1452 for (size_t i = 0; i < instruction->case_count; i += 1) {
1453 IrInstGenSwitchBrCase *this_case = &instruction->cases[i];
1454 ir_print_other_inst_gen(irp, this_case->value);
1455 fprintf(irp->f, " => ");
1456 ir_print_other_block_gen(irp, this_case->block);
1457 fprintf(irp->f, ", ");
11401458 }
1459 fprintf(irp->f, "else => ");
1460 ir_print_other_block_gen(irp, instruction->else_block);
11411461}
11421462
1143static void ir_print_switch_var(IrPrint *irp, IrInstructionSwitchVar *instruction) {
1463static void ir_print_switch_var(IrPrintSrc *irp, IrInstSrcSwitchVar *instruction) {
11441464 fprintf(irp->f, "switchvar ");
1145 ir_print_other_instruction(irp, instruction->target_value_ptr);
1465 ir_print_other_inst_src(irp, instruction->target_value_ptr);
11461466 for (size_t i = 0; i < instruction->prongs_len; i += 1) {
11471467 fprintf(irp->f, ", ");
1148 ir_print_other_instruction(irp, instruction->prongs_ptr[i]);
1468 ir_print_other_inst_src(irp, instruction->prongs_ptr[i]);
11491469 }
11501470}
11511471
1152static void ir_print_switch_else_var(IrPrint *irp, IrInstructionSwitchElseVar *instruction) {
1472static void ir_print_switch_else_var(IrPrintSrc *irp, IrInstSrcSwitchElseVar *instruction) {
11531473 fprintf(irp->f, "switchelsevar ");
1154 ir_print_other_instruction(irp, &instruction->switch_br->base);
1474 ir_print_other_inst_src(irp, &instruction->switch_br->base);
11551475}
11561476
1157static void ir_print_switch_target(IrPrint *irp, IrInstructionSwitchTarget *instruction) {
1477static void ir_print_switch_target(IrPrintSrc *irp, IrInstSrcSwitchTarget *instruction) {
11581478 fprintf(irp->f, "switchtarget ");
1159 ir_print_other_instruction(irp, instruction->target_value_ptr);
1479 ir_print_other_inst_src(irp, instruction->target_value_ptr);
11601480}
11611481
1162static void ir_print_union_tag(IrPrint *irp, IrInstructionUnionTag *instruction) {
1482static void ir_print_union_tag(IrPrintGen *irp, IrInstGenUnionTag *instruction) {
11631483 fprintf(irp->f, "uniontag ");
1164 ir_print_other_instruction(irp, instruction->value);
1484 ir_print_other_inst_gen(irp, instruction->value);
11651485}
11661486
1167static void ir_print_import(IrPrint *irp, IrInstructionImport *instruction) {
1487static void ir_print_import(IrPrintSrc *irp, IrInstSrcImport *instruction) {
11681488 fprintf(irp->f, "@import(");
1169 ir_print_other_instruction(irp, instruction->name);
1489 ir_print_other_inst_src(irp, instruction->name);
11701490 fprintf(irp->f, ")");
11711491}
11721492
1173static void ir_print_ref(IrPrint *irp, IrInstructionRef *instruction) {
1493static void ir_print_ref(IrPrintSrc *irp, IrInstSrcRef *instruction) {
11741494 const char *const_str = instruction->is_const ? "const " : "";
11751495 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
11761496 fprintf(irp->f, "%s%sref ", const_str, volatile_str);
1177 ir_print_other_instruction(irp, instruction->value);
1497 ir_print_other_inst_src(irp, instruction->value);
11781498}
11791499
1180static void ir_print_ref_gen(IrPrint *irp, IrInstructionRefGen *instruction) {
1500static void ir_print_ref_gen(IrPrintGen *irp, IrInstGenRef *instruction) {
11811501 fprintf(irp->f, "@ref(");
1182 ir_print_other_instruction(irp, instruction->operand);
1502 ir_print_other_inst_gen(irp, instruction->operand);
11831503 fprintf(irp->f, ")result=");
1184 ir_print_other_instruction(irp, instruction->result_loc);
1504 ir_print_other_inst_gen(irp, instruction->result_loc);
11851505}
11861506
1187static void ir_print_compile_err(IrPrint *irp, IrInstructionCompileErr *instruction) {
1507static void ir_print_compile_err(IrPrintSrc *irp, IrInstSrcCompileErr *instruction) {
11881508 fprintf(irp->f, "@compileError(");
1189 ir_print_other_instruction(irp, instruction->msg);
1509 ir_print_other_inst_src(irp, instruction->msg);
11901510 fprintf(irp->f, ")");
11911511}
11921512
1193static void ir_print_compile_log(IrPrint *irp, IrInstructionCompileLog *instruction) {
1513static void ir_print_compile_log(IrPrintSrc *irp, IrInstSrcCompileLog *instruction) {
11941514 fprintf(irp->f, "@compileLog(");
11951515 for (size_t i = 0; i < instruction->msg_count; i += 1) {
11961516 if (i != 0)
11971517 fprintf(irp->f, ",");
1198 IrInstruction *msg = instruction->msg_list[i];
1199 ir_print_other_instruction(irp, msg);
1518 IrInstSrc *msg = instruction->msg_list[i];
1519 ir_print_other_inst_src(irp, msg);
12001520 }
12011521 fprintf(irp->f, ")");
12021522}
12031523
1204static void ir_print_err_name(IrPrint *irp, IrInstructionErrName *instruction) {
1524static void ir_print_err_name(IrPrintSrc *irp, IrInstSrcErrName *instruction) {
12051525 fprintf(irp->f, "@errorName(");
1206 ir_print_other_instruction(irp, instruction->value);
1526 ir_print_other_inst_src(irp, instruction->value);
12071527 fprintf(irp->f, ")");
12081528}
12091529
1210static void ir_print_c_import(IrPrint *irp, IrInstructionCImport *instruction) {
1530static void ir_print_err_name(IrPrintGen *irp, IrInstGenErrName *instruction) {
1531 fprintf(irp->f, "@errorName(");
1532 ir_print_other_inst_gen(irp, instruction->value);
1533 fprintf(irp->f, ")");
1534}
1535
1536static void ir_print_c_import(IrPrintSrc *irp, IrInstSrcCImport *instruction) {
12111537 fprintf(irp->f, "@cImport(...)");
12121538}
12131539
1214static void ir_print_c_include(IrPrint *irp, IrInstructionCInclude *instruction) {
1540static void ir_print_c_include(IrPrintSrc *irp, IrInstSrcCInclude *instruction) {
12151541 fprintf(irp->f, "@cInclude(");
1216 ir_print_other_instruction(irp, instruction->name);
1542 ir_print_other_inst_src(irp, instruction->name);
12171543 fprintf(irp->f, ")");
12181544}
12191545
1220static void ir_print_c_define(IrPrint *irp, IrInstructionCDefine *instruction) {
1546static void ir_print_c_define(IrPrintSrc *irp, IrInstSrcCDefine *instruction) {
12211547 fprintf(irp->f, "@cDefine(");
1222 ir_print_other_instruction(irp, instruction->name);
1548 ir_print_other_inst_src(irp, instruction->name);
12231549 fprintf(irp->f, ", ");
1224 ir_print_other_instruction(irp, instruction->value);
1550 ir_print_other_inst_src(irp, instruction->value);
12251551 fprintf(irp->f, ")");
12261552}
12271553
1228static void ir_print_c_undef(IrPrint *irp, IrInstructionCUndef *instruction) {
1554static void ir_print_c_undef(IrPrintSrc *irp, IrInstSrcCUndef *instruction) {
12291555 fprintf(irp->f, "@cUndef(");
1230 ir_print_other_instruction(irp, instruction->name);
1556 ir_print_other_inst_src(irp, instruction->name);
12311557 fprintf(irp->f, ")");
12321558}
12331559
1234static void ir_print_embed_file(IrPrint *irp, IrInstructionEmbedFile *instruction) {
1560static void ir_print_embed_file(IrPrintSrc *irp, IrInstSrcEmbedFile *instruction) {
12351561 fprintf(irp->f, "@embedFile(");
1236 ir_print_other_instruction(irp, instruction->name);
1562 ir_print_other_inst_src(irp, instruction->name);
12371563 fprintf(irp->f, ")");
12381564}
12391565
1240static void ir_print_cmpxchg_src(IrPrint *irp, IrInstructionCmpxchgSrc *instruction) {
1566static void ir_print_cmpxchg_src(IrPrintSrc *irp, IrInstSrcCmpxchg *instruction) {
12411567 fprintf(irp->f, "@cmpxchg(");
1242 ir_print_other_instruction(irp, instruction->ptr);
1568 ir_print_other_inst_src(irp, instruction->ptr);
12431569 fprintf(irp->f, ", ");
1244 ir_print_other_instruction(irp, instruction->cmp_value);
1570 ir_print_other_inst_src(irp, instruction->cmp_value);
12451571 fprintf(irp->f, ", ");
1246 ir_print_other_instruction(irp, instruction->new_value);
1572 ir_print_other_inst_src(irp, instruction->new_value);
12471573 fprintf(irp->f, ", ");
1248 ir_print_other_instruction(irp, instruction->success_order_value);
1574 ir_print_other_inst_src(irp, instruction->success_order_value);
12491575 fprintf(irp->f, ", ");
1250 ir_print_other_instruction(irp, instruction->failure_order_value);
1576 ir_print_other_inst_src(irp, instruction->failure_order_value);
12511577 fprintf(irp->f, ")result=");
12521578 ir_print_result_loc(irp, instruction->result_loc);
12531579}
12541580
1255static void ir_print_cmpxchg_gen(IrPrint *irp, IrInstructionCmpxchgGen *instruction) {
1581static void ir_print_cmpxchg_gen(IrPrintGen *irp, IrInstGenCmpxchg *instruction) {
12561582 fprintf(irp->f, "@cmpxchg(");
1257 ir_print_other_instruction(irp, instruction->ptr);
1583 ir_print_other_inst_gen(irp, instruction->ptr);
12581584 fprintf(irp->f, ", ");
1259 ir_print_other_instruction(irp, instruction->cmp_value);
1585 ir_print_other_inst_gen(irp, instruction->cmp_value);
12601586 fprintf(irp->f, ", ");
1261 ir_print_other_instruction(irp, instruction->new_value);
1587 ir_print_other_inst_gen(irp, instruction->new_value);
12621588 fprintf(irp->f, ", TODO print atomic orders)result=");
1263 ir_print_other_instruction(irp, instruction->result_loc);
1589 ir_print_other_inst_gen(irp, instruction->result_loc);
12641590}
12651591
1266static void ir_print_fence(IrPrint *irp, IrInstructionFence *instruction) {
1592static void ir_print_fence(IrPrintSrc *irp, IrInstSrcFence *instruction) {
12671593 fprintf(irp->f, "@fence(");
1268 ir_print_other_instruction(irp, instruction->order_value);
1594 ir_print_other_inst_src(irp, instruction->order);
12691595 fprintf(irp->f, ")");
12701596}
12711597
1272static void ir_print_truncate(IrPrint *irp, IrInstructionTruncate *instruction) {
1598static const char *atomic_order_str(AtomicOrder order) {
1599 switch (order) {
1600 case AtomicOrderUnordered: return "Unordered";
1601 case AtomicOrderMonotonic: return "Monotonic";
1602 case AtomicOrderAcquire: return "Acquire";
1603 case AtomicOrderRelease: return "Release";
1604 case AtomicOrderAcqRel: return "AcqRel";
1605 case AtomicOrderSeqCst: return "SeqCst";
1606 }
1607 zig_unreachable();
1608}
1609
1610static void ir_print_fence(IrPrintGen *irp, IrInstGenFence *instruction) {
1611 fprintf(irp->f, "fence %s", atomic_order_str(instruction->order));
1612}
1613
1614static void ir_print_truncate(IrPrintSrc *irp, IrInstSrcTruncate *instruction) {
12731615 fprintf(irp->f, "@truncate(");
1274 ir_print_other_instruction(irp, instruction->dest_type);
1616 ir_print_other_inst_src(irp, instruction->dest_type);
12751617 fprintf(irp->f, ", ");
1276 ir_print_other_instruction(irp, instruction->target);
1618 ir_print_other_inst_src(irp, instruction->target);
12771619 fprintf(irp->f, ")");
12781620}
12791621
1280static void ir_print_int_cast(IrPrint *irp, IrInstructionIntCast *instruction) {
1622static void ir_print_truncate(IrPrintGen *irp, IrInstGenTruncate *instruction) {
1623 fprintf(irp->f, "@truncate(");
1624 ir_print_other_inst_gen(irp, instruction->target);
1625 fprintf(irp->f, ")");
1626}
1627
1628static void ir_print_int_cast(IrPrintSrc *irp, IrInstSrcIntCast *instruction) {
12811629 fprintf(irp->f, "@intCast(");
1282 ir_print_other_instruction(irp, instruction->dest_type);
1630 ir_print_other_inst_src(irp, instruction->dest_type);
12831631 fprintf(irp->f, ", ");
1284 ir_print_other_instruction(irp, instruction->target);
1632 ir_print_other_inst_src(irp, instruction->target);
12851633 fprintf(irp->f, ")");
12861634}
12871635
1288static void ir_print_float_cast(IrPrint *irp, IrInstructionFloatCast *instruction) {
1636static void ir_print_float_cast(IrPrintSrc *irp, IrInstSrcFloatCast *instruction) {
12891637 fprintf(irp->f, "@floatCast(");
1290 ir_print_other_instruction(irp, instruction->dest_type);
1638 ir_print_other_inst_src(irp, instruction->dest_type);
12911639 fprintf(irp->f, ", ");
1292 ir_print_other_instruction(irp, instruction->target);
1640 ir_print_other_inst_src(irp, instruction->target);
12931641 fprintf(irp->f, ")");
12941642}
12951643
1296static void ir_print_err_set_cast(IrPrint *irp, IrInstructionErrSetCast *instruction) {
1644static void ir_print_err_set_cast(IrPrintSrc *irp, IrInstSrcErrSetCast *instruction) {
12971645 fprintf(irp->f, "@errSetCast(");
1298 ir_print_other_instruction(irp, instruction->dest_type);
1646 ir_print_other_inst_src(irp, instruction->dest_type);
12991647 fprintf(irp->f, ", ");
1300 ir_print_other_instruction(irp, instruction->target);
1648 ir_print_other_inst_src(irp, instruction->target);
13011649 fprintf(irp->f, ")");
13021650}
13031651
1304static void ir_print_from_bytes(IrPrint *irp, IrInstructionFromBytes *instruction) {
1652static void ir_print_from_bytes(IrPrintSrc *irp, IrInstSrcFromBytes *instruction) {
13051653 fprintf(irp->f, "@bytesToSlice(");
1306 ir_print_other_instruction(irp, instruction->dest_child_type);
1654 ir_print_other_inst_src(irp, instruction->dest_child_type);
13071655 fprintf(irp->f, ", ");
1308 ir_print_other_instruction(irp, instruction->target);
1656 ir_print_other_inst_src(irp, instruction->target);
13091657 fprintf(irp->f, ")");
13101658}
13111659
1312static void ir_print_to_bytes(IrPrint *irp, IrInstructionToBytes *instruction) {
1660static void ir_print_to_bytes(IrPrintSrc *irp, IrInstSrcToBytes *instruction) {
13131661 fprintf(irp->f, "@sliceToBytes(");
1314 ir_print_other_instruction(irp, instruction->target);
1662 ir_print_other_inst_src(irp, instruction->target);
13151663 fprintf(irp->f, ")");
13161664}
13171665
1318static void ir_print_int_to_float(IrPrint *irp, IrInstructionIntToFloat *instruction) {
1666static void ir_print_int_to_float(IrPrintSrc *irp, IrInstSrcIntToFloat *instruction) {
13191667 fprintf(irp->f, "@intToFloat(");
1320 ir_print_other_instruction(irp, instruction->dest_type);
1668 ir_print_other_inst_src(irp, instruction->dest_type);
13211669 fprintf(irp->f, ", ");
1322 ir_print_other_instruction(irp, instruction->target);
1670 ir_print_other_inst_src(irp, instruction->target);
13231671 fprintf(irp->f, ")");
13241672}
13251673
1326static void ir_print_float_to_int(IrPrint *irp, IrInstructionFloatToInt *instruction) {
1674static void ir_print_float_to_int(IrPrintSrc *irp, IrInstSrcFloatToInt *instruction) {
13271675 fprintf(irp->f, "@floatToInt(");
1328 ir_print_other_instruction(irp, instruction->dest_type);
1676 ir_print_other_inst_src(irp, instruction->dest_type);
13291677 fprintf(irp->f, ", ");
1330 ir_print_other_instruction(irp, instruction->target);
1678 ir_print_other_inst_src(irp, instruction->target);
13311679 fprintf(irp->f, ")");
13321680}
13331681
1334static void ir_print_bool_to_int(IrPrint *irp, IrInstructionBoolToInt *instruction) {
1682static void ir_print_bool_to_int(IrPrintSrc *irp, IrInstSrcBoolToInt *instruction) {
13351683 fprintf(irp->f, "@boolToInt(");
1336 ir_print_other_instruction(irp, instruction->target);
1684 ir_print_other_inst_src(irp, instruction->target);
13371685 fprintf(irp->f, ")");
13381686}
13391687
1340static void ir_print_int_type(IrPrint *irp, IrInstructionIntType *instruction) {
1688static void ir_print_int_type(IrPrintSrc *irp, IrInstSrcIntType *instruction) {
13411689 fprintf(irp->f, "@IntType(");
1342 ir_print_other_instruction(irp, instruction->is_signed);
1690 ir_print_other_inst_src(irp, instruction->is_signed);
13431691 fprintf(irp->f, ", ");
1344 ir_print_other_instruction(irp, instruction->bit_count);
1692 ir_print_other_inst_src(irp, instruction->bit_count);
13451693 fprintf(irp->f, ")");
13461694}
13471695
1348static void ir_print_vector_type(IrPrint *irp, IrInstructionVectorType *instruction) {
1696static void ir_print_vector_type(IrPrintSrc *irp, IrInstSrcVectorType *instruction) {
13491697 fprintf(irp->f, "@Vector(");
1350 ir_print_other_instruction(irp, instruction->len);
1698 ir_print_other_inst_src(irp, instruction->len);
13511699 fprintf(irp->f, ", ");
1352 ir_print_other_instruction(irp, instruction->elem_type);
1700 ir_print_other_inst_src(irp, instruction->elem_type);
13531701 fprintf(irp->f, ")");
13541702}
13551703
1356static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *instruction) {
1704static void ir_print_shuffle_vector(IrPrintSrc *irp, IrInstSrcShuffleVector *instruction) {
13571705 fprintf(irp->f, "@shuffle(");
1358 ir_print_other_instruction(irp, instruction->scalar_type);
1706 ir_print_other_inst_src(irp, instruction->scalar_type);
13591707 fprintf(irp->f, ", ");
1360 ir_print_other_instruction(irp, instruction->a);
1708 ir_print_other_inst_src(irp, instruction->a);
13611709 fprintf(irp->f, ", ");
1362 ir_print_other_instruction(irp, instruction->b);
1710 ir_print_other_inst_src(irp, instruction->b);
13631711 fprintf(irp->f, ", ");
1364 ir_print_other_instruction(irp, instruction->mask);
1712 ir_print_other_inst_src(irp, instruction->mask);
13651713 fprintf(irp->f, ")");
13661714}
13671715
1368static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {
1716static void ir_print_shuffle_vector(IrPrintGen *irp, IrInstGenShuffleVector *instruction) {
1717 fprintf(irp->f, "@shuffle(");
1718 ir_print_other_inst_gen(irp, instruction->a);
1719 fprintf(irp->f, ", ");
1720 ir_print_other_inst_gen(irp, instruction->b);
1721 fprintf(irp->f, ", ");
1722 ir_print_other_inst_gen(irp, instruction->mask);
1723 fprintf(irp->f, ")");
1724}
1725
1726static void ir_print_splat_src(IrPrintSrc *irp, IrInstSrcSplat *instruction) {
13691727 fprintf(irp->f, "@splat(");
1370 ir_print_other_instruction(irp, instruction->len);
1728 ir_print_other_inst_src(irp, instruction->len);
13711729 fprintf(irp->f, ", ");
1372 ir_print_other_instruction(irp, instruction->scalar);
1730 ir_print_other_inst_src(irp, instruction->scalar);
13731731 fprintf(irp->f, ")");
13741732}
13751733
1376static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {
1734static void ir_print_splat_gen(IrPrintGen *irp, IrInstGenSplat *instruction) {
13771735 fprintf(irp->f, "@splat(");
1378 ir_print_other_instruction(irp, instruction->scalar);
1736 ir_print_other_inst_gen(irp, instruction->scalar);
13791737 fprintf(irp->f, ")");
13801738}
13811739
1382static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {
1740static void ir_print_bool_not(IrPrintSrc *irp, IrInstSrcBoolNot *instruction) {
1741 fprintf(irp->f, "! ");
1742 ir_print_other_inst_src(irp, instruction->value);
1743}
1744
1745static void ir_print_bool_not(IrPrintGen *irp, IrInstGenBoolNot *instruction) {
13831746 fprintf(irp->f, "! ");
1384 ir_print_other_instruction(irp, instruction->value);
1747 ir_print_other_inst_gen(irp, instruction->value);
13851748}
13861749
1387static void ir_print_memset(IrPrint *irp, IrInstructionMemset *instruction) {
1750static void ir_print_memset(IrPrintSrc *irp, IrInstSrcMemset *instruction) {
13881751 fprintf(irp->f, "@memset(");
1389 ir_print_other_instruction(irp, instruction->dest_ptr);
1752 ir_print_other_inst_src(irp, instruction->dest_ptr);
1753 fprintf(irp->f, ", ");
1754 ir_print_other_inst_src(irp, instruction->byte);
1755 fprintf(irp->f, ", ");
1756 ir_print_other_inst_src(irp, instruction->count);
1757 fprintf(irp->f, ")");
1758}
1759
1760static void ir_print_memset(IrPrintGen *irp, IrInstGenMemset *instruction) {
1761 fprintf(irp->f, "@memset(");
1762 ir_print_other_inst_gen(irp, instruction->dest_ptr);
1763 fprintf(irp->f, ", ");
1764 ir_print_other_inst_gen(irp, instruction->byte);
1765 fprintf(irp->f, ", ");
1766 ir_print_other_inst_gen(irp, instruction->count);
1767 fprintf(irp->f, ")");
1768}
1769
1770static void ir_print_memcpy(IrPrintSrc *irp, IrInstSrcMemcpy *instruction) {
1771 fprintf(irp->f, "@memcpy(");
1772 ir_print_other_inst_src(irp, instruction->dest_ptr);
13901773 fprintf(irp->f, ", ");
1391 ir_print_other_instruction(irp, instruction->byte);
1774 ir_print_other_inst_src(irp, instruction->src_ptr);
13921775 fprintf(irp->f, ", ");
1393 ir_print_other_instruction(irp, instruction->count);
1776 ir_print_other_inst_src(irp, instruction->count);
13941777 fprintf(irp->f, ")");
13951778}
13961779
1397static void ir_print_memcpy(IrPrint *irp, IrInstructionMemcpy *instruction) {
1780static void ir_print_memcpy(IrPrintGen *irp, IrInstGenMemcpy *instruction) {
13981781 fprintf(irp->f, "@memcpy(");
1399 ir_print_other_instruction(irp, instruction->dest_ptr);
1782 ir_print_other_inst_gen(irp, instruction->dest_ptr);
14001783 fprintf(irp->f, ", ");
1401 ir_print_other_instruction(irp, instruction->src_ptr);
1784 ir_print_other_inst_gen(irp, instruction->src_ptr);
14021785 fprintf(irp->f, ", ");
1403 ir_print_other_instruction(irp, instruction->count);
1786 ir_print_other_inst_gen(irp, instruction->count);
14041787 fprintf(irp->f, ")");
14051788}
14061789
1407static void ir_print_slice_src(IrPrint *irp, IrInstructionSliceSrc *instruction) {
1408 ir_print_other_instruction(irp, instruction->ptr);
1790static void ir_print_slice_src(IrPrintSrc *irp, IrInstSrcSlice *instruction) {
1791 ir_print_other_inst_src(irp, instruction->ptr);
14091792 fprintf(irp->f, "[");
1410 ir_print_other_instruction(irp, instruction->start);
1793 ir_print_other_inst_src(irp, instruction->start);
14111794 fprintf(irp->f, "..");
14121795 if (instruction->end)
1413 ir_print_other_instruction(irp, instruction->end);
1796 ir_print_other_inst_src(irp, instruction->end);
14141797 fprintf(irp->f, "]result=");
14151798 ir_print_result_loc(irp, instruction->result_loc);
14161799}
14171800
1418static void ir_print_slice_gen(IrPrint *irp, IrInstructionSliceGen *instruction) {
1419 ir_print_other_instruction(irp, instruction->ptr);
1801static void ir_print_slice_gen(IrPrintGen *irp, IrInstGenSlice *instruction) {
1802 ir_print_other_inst_gen(irp, instruction->ptr);
14201803 fprintf(irp->f, "[");
1421 ir_print_other_instruction(irp, instruction->start);
1804 ir_print_other_inst_gen(irp, instruction->start);
14221805 fprintf(irp->f, "..");
14231806 if (instruction->end)
1424 ir_print_other_instruction(irp, instruction->end);
1807 ir_print_other_inst_gen(irp, instruction->end);
14251808 fprintf(irp->f, "]result=");
1426 ir_print_other_instruction(irp, instruction->result_loc);
1809 ir_print_other_inst_gen(irp, instruction->result_loc);
14271810}
14281811
1429static void ir_print_member_count(IrPrint *irp, IrInstructionMemberCount *instruction) {
1812static void ir_print_member_count(IrPrintSrc *irp, IrInstSrcMemberCount *instruction) {
14301813 fprintf(irp->f, "@memberCount(");
1431 ir_print_other_instruction(irp, instruction->container);
1814 ir_print_other_inst_src(irp, instruction->container);
14321815 fprintf(irp->f, ")");
14331816}
14341817
1435static void ir_print_member_type(IrPrint *irp, IrInstructionMemberType *instruction) {
1818static void ir_print_member_type(IrPrintSrc *irp, IrInstSrcMemberType *instruction) {
14361819 fprintf(irp->f, "@memberType(");
1437 ir_print_other_instruction(irp, instruction->container_type);
1820 ir_print_other_inst_src(irp, instruction->container_type);
14381821 fprintf(irp->f, ", ");
1439 ir_print_other_instruction(irp, instruction->member_index);
1822 ir_print_other_inst_src(irp, instruction->member_index);
14401823 fprintf(irp->f, ")");
14411824}
14421825
1443static void ir_print_member_name(IrPrint *irp, IrInstructionMemberName *instruction) {
1826static void ir_print_member_name(IrPrintSrc *irp, IrInstSrcMemberName *instruction) {
14441827 fprintf(irp->f, "@memberName(");
1445 ir_print_other_instruction(irp, instruction->container_type);
1828 ir_print_other_inst_src(irp, instruction->container_type);
14461829 fprintf(irp->f, ", ");
1447 ir_print_other_instruction(irp, instruction->member_index);
1830 ir_print_other_inst_src(irp, instruction->member_index);
14481831 fprintf(irp->f, ")");
14491832}
14501833
1451static void ir_print_breakpoint(IrPrint *irp, IrInstructionBreakpoint *instruction) {
1834static void ir_print_breakpoint(IrPrintSrc *irp, IrInstSrcBreakpoint *instruction) {
1835 fprintf(irp->f, "@breakpoint()");
1836}
1837
1838static void ir_print_breakpoint(IrPrintGen *irp, IrInstGenBreakpoint *instruction) {
14521839 fprintf(irp->f, "@breakpoint()");
14531840}
14541841
1455static void ir_print_frame_address(IrPrint *irp, IrInstructionFrameAddress *instruction) {
1842static void ir_print_frame_address(IrPrintSrc *irp, IrInstSrcFrameAddress *instruction) {
1843 fprintf(irp->f, "@frameAddress()");
1844}
1845
1846static void ir_print_frame_address(IrPrintGen *irp, IrInstGenFrameAddress *instruction) {
14561847 fprintf(irp->f, "@frameAddress()");
14571848}
14581849
1459static void ir_print_handle(IrPrint *irp, IrInstructionFrameHandle *instruction) {
1850static void ir_print_handle(IrPrintSrc *irp, IrInstSrcFrameHandle *instruction) {
14601851 fprintf(irp->f, "@frame()");
14611852}
14621853
1463static void ir_print_frame_type(IrPrint *irp, IrInstructionFrameType *instruction) {
1854static void ir_print_handle(IrPrintGen *irp, IrInstGenFrameHandle *instruction) {
1855 fprintf(irp->f, "@frame()");
1856}
1857
1858static void ir_print_frame_type(IrPrintSrc *irp, IrInstSrcFrameType *instruction) {
14641859 fprintf(irp->f, "@Frame(");
1465 ir_print_other_instruction(irp, instruction->fn);
1860 ir_print_other_inst_src(irp, instruction->fn);
14661861 fprintf(irp->f, ")");
14671862}
14681863
1469static void ir_print_frame_size_src(IrPrint *irp, IrInstructionFrameSizeSrc *instruction) {
1864static void ir_print_frame_size_src(IrPrintSrc *irp, IrInstSrcFrameSize *instruction) {
14701865 fprintf(irp->f, "@frameSize(");
1471 ir_print_other_instruction(irp, instruction->fn);
1866 ir_print_other_inst_src(irp, instruction->fn);
14721867 fprintf(irp->f, ")");
14731868}
14741869
1475static void ir_print_frame_size_gen(IrPrint *irp, IrInstructionFrameSizeGen *instruction) {
1870static void ir_print_frame_size_gen(IrPrintGen *irp, IrInstGenFrameSize *instruction) {
14761871 fprintf(irp->f, "@frameSize(");
1477 ir_print_other_instruction(irp, instruction->fn);
1872 ir_print_other_inst_gen(irp, instruction->fn);
14781873 fprintf(irp->f, ")");
14791874}
14801875
1481static void ir_print_return_address(IrPrint *irp, IrInstructionReturnAddress *instruction) {
1876static void ir_print_return_address(IrPrintSrc *irp, IrInstSrcReturnAddress *instruction) {
1877 fprintf(irp->f, "@returnAddress()");
1878}
1879
1880static void ir_print_return_address(IrPrintGen *irp, IrInstGenReturnAddress *instruction) {
14821881 fprintf(irp->f, "@returnAddress()");
14831882}
14841883
1485static void ir_print_align_of(IrPrint *irp, IrInstructionAlignOf *instruction) {
1884static void ir_print_align_of(IrPrintSrc *irp, IrInstSrcAlignOf *instruction) {
14861885 fprintf(irp->f, "@alignOf(");
1487 ir_print_other_instruction(irp, instruction->type_value);
1886 ir_print_other_inst_src(irp, instruction->type_value);
14881887 fprintf(irp->f, ")");
14891888}
14901889
1491static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruction) {
1890static void ir_print_overflow_op(IrPrintSrc *irp, IrInstSrcOverflowOp *instruction) {
14921891 switch (instruction->op) {
14931892 case IrOverflowOpAdd:
14941893 fprintf(irp->f, "@addWithOverflow(");
......@@ -1503,1146 +1902,1457 @@ static void ir_print_overflow_op(IrPrint *irp, IrInstructionOverflowOp *instruct
15031902 fprintf(irp->f, "@shlWithOverflow(");
15041903 break;
15051904 }
1506 ir_print_other_instruction(irp, instruction->type_value);
1905 ir_print_other_inst_src(irp, instruction->type_value);
15071906 fprintf(irp->f, ", ");
1508 ir_print_other_instruction(irp, instruction->op1);
1907 ir_print_other_inst_src(irp, instruction->op1);
1908 fprintf(irp->f, ", ");
1909 ir_print_other_inst_src(irp, instruction->op2);
1910 fprintf(irp->f, ", ");
1911 ir_print_other_inst_src(irp, instruction->result_ptr);
1912 fprintf(irp->f, ")");
1913}
1914
1915static void ir_print_overflow_op(IrPrintGen *irp, IrInstGenOverflowOp *instruction) {
1916 switch (instruction->op) {
1917 case IrOverflowOpAdd:
1918 fprintf(irp->f, "@addWithOverflow(");
1919 break;
1920 case IrOverflowOpSub:
1921 fprintf(irp->f, "@subWithOverflow(");
1922 break;
1923 case IrOverflowOpMul:
1924 fprintf(irp->f, "@mulWithOverflow(");
1925 break;
1926 case IrOverflowOpShl:
1927 fprintf(irp->f, "@shlWithOverflow(");
1928 break;
1929 }
1930 ir_print_other_inst_gen(irp, instruction->op1);
15091931 fprintf(irp->f, ", ");
1510 ir_print_other_instruction(irp, instruction->op2);
1932 ir_print_other_inst_gen(irp, instruction->op2);
15111933 fprintf(irp->f, ", ");
1512 ir_print_other_instruction(irp, instruction->result_ptr);
1934 ir_print_other_inst_gen(irp, instruction->result_ptr);
15131935 fprintf(irp->f, ")");
15141936}
15151937
1516static void ir_print_test_err_src(IrPrint *irp, IrInstructionTestErrSrc *instruction) {
1938static void ir_print_test_err_src(IrPrintSrc *irp, IrInstSrcTestErr *instruction) {
15171939 fprintf(irp->f, "@testError(");
1518 ir_print_other_instruction(irp, instruction->base_ptr);
1940 ir_print_other_inst_src(irp, instruction->base_ptr);
15191941 fprintf(irp->f, ")");
15201942}
15211943
1522static void ir_print_test_err_gen(IrPrint *irp, IrInstructionTestErrGen *instruction) {
1944static void ir_print_test_err_gen(IrPrintGen *irp, IrInstGenTestErr *instruction) {
15231945 fprintf(irp->f, "@testError(");
1524 ir_print_other_instruction(irp, instruction->err_union);
1946 ir_print_other_inst_gen(irp, instruction->err_union);
1947 fprintf(irp->f, ")");
1948}
1949
1950static void ir_print_unwrap_err_code(IrPrintSrc *irp, IrInstSrcUnwrapErrCode *instruction) {
1951 fprintf(irp->f, "UnwrapErrorCode(");
1952 ir_print_other_inst_src(irp, instruction->err_union_ptr);
15251953 fprintf(irp->f, ")");
15261954}
15271955
1528static void ir_print_unwrap_err_code(IrPrint *irp, IrInstructionUnwrapErrCode *instruction) {
1956static void ir_print_unwrap_err_code(IrPrintGen *irp, IrInstGenUnwrapErrCode *instruction) {
15291957 fprintf(irp->f, "UnwrapErrorCode(");
1530 ir_print_other_instruction(irp, instruction->err_union_ptr);
1958 ir_print_other_inst_gen(irp, instruction->err_union_ptr);
15311959 fprintf(irp->f, ")");
15321960}
15331961
1534static void ir_print_unwrap_err_payload(IrPrint *irp, IrInstructionUnwrapErrPayload *instruction) {
1962static void ir_print_unwrap_err_payload(IrPrintSrc *irp, IrInstSrcUnwrapErrPayload *instruction) {
1963 fprintf(irp->f, "ErrorUnionFieldPayload(");
1964 ir_print_other_inst_src(irp, instruction->value);
1965 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
1966}
1967
1968static void ir_print_unwrap_err_payload(IrPrintGen *irp, IrInstGenUnwrapErrPayload *instruction) {
15351969 fprintf(irp->f, "ErrorUnionFieldPayload(");
1536 ir_print_other_instruction(irp, instruction->value);
1970 ir_print_other_inst_gen(irp, instruction->value);
15371971 fprintf(irp->f, ")safety=%d,init=%d",instruction->safety_check_on, instruction->initializing);
15381972}
15391973
1540static void ir_print_optional_wrap(IrPrint *irp, IrInstructionOptionalWrap *instruction) {
1974static void ir_print_optional_wrap(IrPrintGen *irp, IrInstGenOptionalWrap *instruction) {
15411975 fprintf(irp->f, "@optionalWrap(");
1542 ir_print_other_instruction(irp, instruction->operand);
1976 ir_print_other_inst_gen(irp, instruction->operand);
15431977 fprintf(irp->f, ")result=");
1544 ir_print_other_instruction(irp, instruction->result_loc);
1978 ir_print_other_inst_gen(irp, instruction->result_loc);
15451979}
15461980
1547static void ir_print_err_wrap_code(IrPrint *irp, IrInstructionErrWrapCode *instruction) {
1981static void ir_print_err_wrap_code(IrPrintGen *irp, IrInstGenErrWrapCode *instruction) {
15481982 fprintf(irp->f, "@errWrapCode(");
1549 ir_print_other_instruction(irp, instruction->operand);
1983 ir_print_other_inst_gen(irp, instruction->operand);
15501984 fprintf(irp->f, ")result=");
1551 ir_print_other_instruction(irp, instruction->result_loc);
1985 ir_print_other_inst_gen(irp, instruction->result_loc);
15521986}
15531987
1554static void ir_print_err_wrap_payload(IrPrint *irp, IrInstructionErrWrapPayload *instruction) {
1988static void ir_print_err_wrap_payload(IrPrintGen *irp, IrInstGenErrWrapPayload *instruction) {
15551989 fprintf(irp->f, "@errWrapPayload(");
1556 ir_print_other_instruction(irp, instruction->operand);
1990 ir_print_other_inst_gen(irp, instruction->operand);
15571991 fprintf(irp->f, ")result=");
1558 ir_print_other_instruction(irp, instruction->result_loc);
1992 ir_print_other_inst_gen(irp, instruction->result_loc);
15591993}
15601994
1561static void ir_print_fn_proto(IrPrint *irp, IrInstructionFnProto *instruction) {
1995static void ir_print_fn_proto(IrPrintSrc *irp, IrInstSrcFnProto *instruction) {
15621996 fprintf(irp->f, "fn(");
1563 for (size_t i = 0; i < instruction->base.source_node->data.fn_proto.params.length; i += 1) {
1997 for (size_t i = 0; i < instruction->base.base.source_node->data.fn_proto.params.length; i += 1) {
15641998 if (i != 0)
15651999 fprintf(irp->f, ",");
1566 if (instruction->is_var_args && i == instruction->base.source_node->data.fn_proto.params.length - 1) {
2000 if (instruction->is_var_args && i == instruction->base.base.source_node->data.fn_proto.params.length - 1) {
15672001 fprintf(irp->f, "...");
15682002 } else {
1569 ir_print_other_instruction(irp, instruction->param_types[i]);
2003 ir_print_other_inst_src(irp, instruction->param_types[i]);
15702004 }
15712005 }
15722006 fprintf(irp->f, ")");
15732007 if (instruction->align_value != nullptr) {
15742008 fprintf(irp->f, " align ");
1575 ir_print_other_instruction(irp, instruction->align_value);
2009 ir_print_other_inst_src(irp, instruction->align_value);
15762010 fprintf(irp->f, " ");
15772011 }
15782012 fprintf(irp->f, "->");
1579 ir_print_other_instruction(irp, instruction->return_type);
2013 ir_print_other_inst_src(irp, instruction->return_type);
15802014}
15812015
1582static void ir_print_test_comptime(IrPrint *irp, IrInstructionTestComptime *instruction) {
2016static void ir_print_test_comptime(IrPrintSrc *irp, IrInstSrcTestComptime *instruction) {
15832017 fprintf(irp->f, "@testComptime(");
1584 ir_print_other_instruction(irp, instruction->value);
2018 ir_print_other_inst_src(irp, instruction->value);
15852019 fprintf(irp->f, ")");
15862020}
15872021
1588static void ir_print_ptr_cast_src(IrPrint *irp, IrInstructionPtrCastSrc *instruction) {
2022static void ir_print_ptr_cast_src(IrPrintSrc *irp, IrInstSrcPtrCast *instruction) {
15892023 fprintf(irp->f, "@ptrCast(");
15902024 if (instruction->dest_type) {
1591 ir_print_other_instruction(irp, instruction->dest_type);
2025 ir_print_other_inst_src(irp, instruction->dest_type);
15922026 }
15932027 fprintf(irp->f, ",");
1594 ir_print_other_instruction(irp, instruction->ptr);
2028 ir_print_other_inst_src(irp, instruction->ptr);
15952029 fprintf(irp->f, ")");
15962030}
15972031
1598static void ir_print_ptr_cast_gen(IrPrint *irp, IrInstructionPtrCastGen *instruction) {
2032static void ir_print_ptr_cast_gen(IrPrintGen *irp, IrInstGenPtrCast *instruction) {
15992033 fprintf(irp->f, "@ptrCast(");
1600 ir_print_other_instruction(irp, instruction->ptr);
2034 ir_print_other_inst_gen(irp, instruction->ptr);
16012035 fprintf(irp->f, ")");
16022036}
16032037
1604static void ir_print_implicit_cast(IrPrint *irp, IrInstructionImplicitCast *instruction) {
2038static void ir_print_implicit_cast(IrPrintSrc *irp, IrInstSrcImplicitCast *instruction) {
16052039 fprintf(irp->f, "@implicitCast(");
1606 ir_print_other_instruction(irp, instruction->operand);
2040 ir_print_other_inst_src(irp, instruction->operand);
16072041 fprintf(irp->f, ")result=");
16082042 ir_print_result_loc(irp, &instruction->result_loc_cast->base);
16092043}
16102044
1611static void ir_print_bit_cast_src(IrPrint *irp, IrInstructionBitCastSrc *instruction) {
2045static void ir_print_bit_cast_src(IrPrintSrc *irp, IrInstSrcBitCast *instruction) {
16122046 fprintf(irp->f, "@bitCast(");
1613 ir_print_other_instruction(irp, instruction->operand);
2047 ir_print_other_inst_src(irp, instruction->operand);
16142048 fprintf(irp->f, ")result=");
16152049 ir_print_result_loc(irp, &instruction->result_loc_bit_cast->base);
16162050}
16172051
1618static void ir_print_bit_cast_gen(IrPrint *irp, IrInstructionBitCastGen *instruction) {
2052static void ir_print_bit_cast_gen(IrPrintGen *irp, IrInstGenBitCast *instruction) {
16192053 fprintf(irp->f, "@bitCast(");
1620 ir_print_other_instruction(irp, instruction->operand);
2054 ir_print_other_inst_gen(irp, instruction->operand);
16212055 fprintf(irp->f, ")");
16222056}
16232057
1624static void ir_print_widen_or_shorten(IrPrint *irp, IrInstructionWidenOrShorten *instruction) {
2058static void ir_print_widen_or_shorten(IrPrintGen *irp, IrInstGenWidenOrShorten *instruction) {
16252059 fprintf(irp->f, "WidenOrShorten(");
1626 ir_print_other_instruction(irp, instruction->target);
2060 ir_print_other_inst_gen(irp, instruction->target);
16272061 fprintf(irp->f, ")");
16282062}
16292063
1630static void ir_print_ptr_to_int(IrPrint *irp, IrInstructionPtrToInt *instruction) {
2064static void ir_print_ptr_to_int(IrPrintSrc *irp, IrInstSrcPtrToInt *instruction) {
16312065 fprintf(irp->f, "@ptrToInt(");
1632 ir_print_other_instruction(irp, instruction->target);
2066 ir_print_other_inst_src(irp, instruction->target);
16332067 fprintf(irp->f, ")");
16342068}
16352069
1636static void ir_print_int_to_ptr(IrPrint *irp, IrInstructionIntToPtr *instruction) {
2070static void ir_print_ptr_to_int(IrPrintGen *irp, IrInstGenPtrToInt *instruction) {
2071 fprintf(irp->f, "@ptrToInt(");
2072 ir_print_other_inst_gen(irp, instruction->target);
2073 fprintf(irp->f, ")");
2074}
2075
2076static void ir_print_int_to_ptr(IrPrintSrc *irp, IrInstSrcIntToPtr *instruction) {
16372077 fprintf(irp->f, "@intToPtr(");
1638 if (instruction->dest_type == nullptr) {
1639 fprintf(irp->f, "(null)");
1640 } else {
1641 ir_print_other_instruction(irp, instruction->dest_type);
1642 }
2078 ir_print_other_inst_src(irp, instruction->dest_type);
16432079 fprintf(irp->f, ",");
1644 ir_print_other_instruction(irp, instruction->target);
2080 ir_print_other_inst_src(irp, instruction->target);
16452081 fprintf(irp->f, ")");
16462082}
16472083
1648static void ir_print_int_to_enum(IrPrint *irp, IrInstructionIntToEnum *instruction) {
2084static void ir_print_int_to_ptr(IrPrintGen *irp, IrInstGenIntToPtr *instruction) {
2085 fprintf(irp->f, "@intToPtr(");
2086 ir_print_other_inst_gen(irp, instruction->target);
2087 fprintf(irp->f, ")");
2088}
2089
2090static void ir_print_int_to_enum(IrPrintSrc *irp, IrInstSrcIntToEnum *instruction) {
16492091 fprintf(irp->f, "@intToEnum(");
1650 if (instruction->dest_type == nullptr) {
1651 fprintf(irp->f, "(null)");
1652 } else {
1653 ir_print_other_instruction(irp, instruction->dest_type);
1654 }
1655 ir_print_other_instruction(irp, instruction->target);
2092 ir_print_other_inst_src(irp, instruction->dest_type);
2093 fprintf(irp->f, ",");
2094 ir_print_other_inst_src(irp, instruction->target);
16562095 fprintf(irp->f, ")");
16572096}
16582097
1659static void ir_print_enum_to_int(IrPrint *irp, IrInstructionEnumToInt *instruction) {
2098static void ir_print_int_to_enum(IrPrintGen *irp, IrInstGenIntToEnum *instruction) {
2099 fprintf(irp->f, "@intToEnum(");
2100 ir_print_other_inst_gen(irp, instruction->target);
2101 fprintf(irp->f, ")");
2102}
2103
2104static void ir_print_enum_to_int(IrPrintSrc *irp, IrInstSrcEnumToInt *instruction) {
16602105 fprintf(irp->f, "@enumToInt(");
1661 ir_print_other_instruction(irp, instruction->target);
2106 ir_print_other_inst_src(irp, instruction->target);
16622107 fprintf(irp->f, ")");
16632108}
16642109
1665static void ir_print_check_runtime_scope(IrPrint *irp, IrInstructionCheckRuntimeScope *instruction) {
2110static void ir_print_check_runtime_scope(IrPrintSrc *irp, IrInstSrcCheckRuntimeScope *instruction) {
16662111 fprintf(irp->f, "@checkRuntimeScope(");
1667 ir_print_other_instruction(irp, instruction->scope_is_comptime);
2112 ir_print_other_inst_src(irp, instruction->scope_is_comptime);
16682113 fprintf(irp->f, ",");
1669 ir_print_other_instruction(irp, instruction->is_comptime);
2114 ir_print_other_inst_src(irp, instruction->is_comptime);
16702115 fprintf(irp->f, ")");
16712116}
16722117
1673static void ir_print_array_to_vector(IrPrint *irp, IrInstructionArrayToVector *instruction) {
2118static void ir_print_array_to_vector(IrPrintGen *irp, IrInstGenArrayToVector *instruction) {
16742119 fprintf(irp->f, "ArrayToVector(");
1675 ir_print_other_instruction(irp, instruction->array);
2120 ir_print_other_inst_gen(irp, instruction->array);
16762121 fprintf(irp->f, ")");
16772122}
16782123
1679static void ir_print_vector_to_array(IrPrint *irp, IrInstructionVectorToArray *instruction) {
2124static void ir_print_vector_to_array(IrPrintGen *irp, IrInstGenVectorToArray *instruction) {
16802125 fprintf(irp->f, "VectorToArray(");
1681 ir_print_other_instruction(irp, instruction->vector);
2126 ir_print_other_inst_gen(irp, instruction->vector);
16822127 fprintf(irp->f, ")result=");
1683 ir_print_other_instruction(irp, instruction->result_loc);
2128 ir_print_other_inst_gen(irp, instruction->result_loc);
16842129}
16852130
1686static void ir_print_ptr_of_array_to_slice(IrPrint *irp, IrInstructionPtrOfArrayToSlice *instruction) {
2131static void ir_print_ptr_of_array_to_slice(IrPrintGen *irp, IrInstGenPtrOfArrayToSlice *instruction) {
16872132 fprintf(irp->f, "PtrOfArrayToSlice(");
1688 ir_print_other_instruction(irp, instruction->operand);
2133 ir_print_other_inst_gen(irp, instruction->operand);
16892134 fprintf(irp->f, ")result=");
1690 ir_print_other_instruction(irp, instruction->result_loc);
2135 ir_print_other_inst_gen(irp, instruction->result_loc);
16912136}
16922137
1693static void ir_print_assert_zero(IrPrint *irp, IrInstructionAssertZero *instruction) {
2138static void ir_print_assert_zero(IrPrintGen *irp, IrInstGenAssertZero *instruction) {
16942139 fprintf(irp->f, "AssertZero(");
1695 ir_print_other_instruction(irp, instruction->target);
2140 ir_print_other_inst_gen(irp, instruction->target);
16962141 fprintf(irp->f, ")");
16972142}
16982143
1699static void ir_print_assert_non_null(IrPrint *irp, IrInstructionAssertNonNull *instruction) {
2144static void ir_print_assert_non_null(IrPrintGen *irp, IrInstGenAssertNonNull *instruction) {
17002145 fprintf(irp->f, "AssertNonNull(");
1701 ir_print_other_instruction(irp, instruction->target);
2146 ir_print_other_inst_gen(irp, instruction->target);
17022147 fprintf(irp->f, ")");
17032148}
17042149
1705static void ir_print_resize_slice(IrPrint *irp, IrInstructionResizeSlice *instruction) {
2150static void ir_print_resize_slice(IrPrintGen *irp, IrInstGenResizeSlice *instruction) {
17062151 fprintf(irp->f, "@resizeSlice(");
1707 ir_print_other_instruction(irp, instruction->operand);
2152 ir_print_other_inst_gen(irp, instruction->operand);
17082153 fprintf(irp->f, ")result=");
1709 ir_print_other_instruction(irp, instruction->result_loc);
2154 ir_print_other_inst_gen(irp, instruction->result_loc);
17102155}
17112156
1712static void ir_print_alloca_src(IrPrint *irp, IrInstructionAllocaSrc *instruction) {
2157static void ir_print_alloca_src(IrPrintSrc *irp, IrInstSrcAlloca *instruction) {
17132158 fprintf(irp->f, "Alloca(align=");
1714 ir_print_other_instruction(irp, instruction->align);
2159 ir_print_other_inst_src(irp, instruction->align);
17152160 fprintf(irp->f, ",name=%s)", instruction->name_hint);
17162161}
17172162
1718static void ir_print_alloca_gen(IrPrint *irp, IrInstructionAllocaGen *instruction) {
2163static void ir_print_alloca_gen(IrPrintGen *irp, IrInstGenAlloca *instruction) {
17192164 fprintf(irp->f, "Alloca(align=%" PRIu32 ",name=%s)", instruction->align, instruction->name_hint);
17202165}
17212166
1722static void ir_print_end_expr(IrPrint *irp, IrInstructionEndExpr *instruction) {
2167static void ir_print_end_expr(IrPrintSrc *irp, IrInstSrcEndExpr *instruction) {
17232168 fprintf(irp->f, "EndExpr(result=");
17242169 ir_print_result_loc(irp, instruction->result_loc);
17252170 fprintf(irp->f, ",value=");
1726 ir_print_other_instruction(irp, instruction->value);
2171 ir_print_other_inst_src(irp, instruction->value);
17272172 fprintf(irp->f, ")");
17282173}
17292174
1730static void ir_print_int_to_err(IrPrint *irp, IrInstructionIntToErr *instruction) {
2175static void ir_print_int_to_err(IrPrintSrc *irp, IrInstSrcIntToErr *instruction) {
17312176 fprintf(irp->f, "inttoerr ");
1732 ir_print_other_instruction(irp, instruction->target);
2177 ir_print_other_inst_src(irp, instruction->target);
17332178}
17342179
1735static void ir_print_err_to_int(IrPrint *irp, IrInstructionErrToInt *instruction) {
2180static void ir_print_int_to_err(IrPrintGen *irp, IrInstGenIntToErr *instruction) {
2181 fprintf(irp->f, "inttoerr ");
2182 ir_print_other_inst_gen(irp, instruction->target);
2183}
2184
2185static void ir_print_err_to_int(IrPrintSrc *irp, IrInstSrcErrToInt *instruction) {
2186 fprintf(irp->f, "errtoint ");
2187 ir_print_other_inst_src(irp, instruction->target);
2188}
2189
2190static void ir_print_err_to_int(IrPrintGen *irp, IrInstGenErrToInt *instruction) {
17362191 fprintf(irp->f, "errtoint ");
1737 ir_print_other_instruction(irp, instruction->target);
2192 ir_print_other_inst_gen(irp, instruction->target);
17382193}
17392194
1740static void ir_print_check_switch_prongs(IrPrint *irp, IrInstructionCheckSwitchProngs *instruction) {
2195static void ir_print_check_switch_prongs(IrPrintSrc *irp, IrInstSrcCheckSwitchProngs *instruction) {
17412196 fprintf(irp->f, "@checkSwitchProngs(");
1742 ir_print_other_instruction(irp, instruction->target_value);
2197 ir_print_other_inst_src(irp, instruction->target_value);
17432198 fprintf(irp->f, ",");
17442199 for (size_t i = 0; i < instruction->range_count; i += 1) {
17452200 if (i != 0)
17462201 fprintf(irp->f, ",");
1747 ir_print_other_instruction(irp, instruction->ranges[i].start);
2202 ir_print_other_inst_src(irp, instruction->ranges[i].start);
17482203 fprintf(irp->f, "...");
1749 ir_print_other_instruction(irp, instruction->ranges[i].end);
2204 ir_print_other_inst_src(irp, instruction->ranges[i].end);
17502205 }
17512206 const char *have_else_str = instruction->have_else_prong ? "yes" : "no";
17522207 fprintf(irp->f, ")else:%s", have_else_str);
17532208}
17542209
1755static void ir_print_check_statement_is_void(IrPrint *irp, IrInstructionCheckStatementIsVoid *instruction) {
2210static void ir_print_check_statement_is_void(IrPrintSrc *irp, IrInstSrcCheckStatementIsVoid *instruction) {
17562211 fprintf(irp->f, "@checkStatementIsVoid(");
1757 ir_print_other_instruction(irp, instruction->statement_value);
2212 ir_print_other_inst_src(irp, instruction->statement_value);
17582213 fprintf(irp->f, ")");
17592214}
17602215
1761static void ir_print_type_name(IrPrint *irp, IrInstructionTypeName *instruction) {
2216static void ir_print_type_name(IrPrintSrc *irp, IrInstSrcTypeName *instruction) {
17622217 fprintf(irp->f, "typename ");
1763 ir_print_other_instruction(irp, instruction->type_value);
2218 ir_print_other_inst_src(irp, instruction->type_value);
2219}
2220
2221static void ir_print_tag_name(IrPrintSrc *irp, IrInstSrcTagName *instruction) {
2222 fprintf(irp->f, "tagname ");
2223 ir_print_other_inst_src(irp, instruction->target);
17642224}
17652225
1766static void ir_print_tag_name(IrPrint *irp, IrInstructionTagName *instruction) {
2226static void ir_print_tag_name(IrPrintGen *irp, IrInstGenTagName *instruction) {
17672227 fprintf(irp->f, "tagname ");
1768 ir_print_other_instruction(irp, instruction->target);
2228 ir_print_other_inst_gen(irp, instruction->target);
17692229}
17702230
1771static void ir_print_ptr_type(IrPrint *irp, IrInstructionPtrType *instruction) {
2231static void ir_print_ptr_type(IrPrintSrc *irp, IrInstSrcPtrType *instruction) {
17722232 fprintf(irp->f, "&");
17732233 if (instruction->align_value != nullptr) {
17742234 fprintf(irp->f, "align(");
1775 ir_print_other_instruction(irp, instruction->align_value);
2235 ir_print_other_inst_src(irp, instruction->align_value);
17762236 fprintf(irp->f, ")");
17772237 }
17782238 const char *const_str = instruction->is_const ? "const " : "";
17792239 const char *volatile_str = instruction->is_volatile ? "volatile " : "";
17802240 fprintf(irp->f, ":%" PRIu32 ":%" PRIu32 " %s%s", instruction->bit_offset_start, instruction->host_int_bytes,
17812241 const_str, volatile_str);
1782 ir_print_other_instruction(irp, instruction->child_type);
2242 ir_print_other_inst_src(irp, instruction->child_type);
17832243}
17842244
1785static void ir_print_decl_ref(IrPrint *irp, IrInstructionDeclRef *instruction) {
2245static void ir_print_decl_ref(IrPrintSrc *irp, IrInstSrcDeclRef *instruction) {
17862246 const char *ptr_str = (instruction->lval == LValPtr) ? "ptr " : "";
17872247 fprintf(irp->f, "declref %s%s", ptr_str, buf_ptr(instruction->tld->name));
17882248}
17892249
1790static void ir_print_panic(IrPrint *irp, IrInstructionPanic *instruction) {
2250static void ir_print_panic(IrPrintSrc *irp, IrInstSrcPanic *instruction) {
17912251 fprintf(irp->f, "@panic(");
1792 ir_print_other_instruction(irp, instruction->msg);
2252 ir_print_other_inst_src(irp, instruction->msg);
17932253 fprintf(irp->f, ")");
17942254}
17952255
1796static void ir_print_field_parent_ptr(IrPrint *irp, IrInstructionFieldParentPtr *instruction) {
2256static void ir_print_panic(IrPrintGen *irp, IrInstGenPanic *instruction) {
2257 fprintf(irp->f, "@panic(");
2258 ir_print_other_inst_gen(irp, instruction->msg);
2259 fprintf(irp->f, ")");
2260}
2261
2262static void ir_print_field_parent_ptr(IrPrintSrc *irp, IrInstSrcFieldParentPtr *instruction) {
17972263 fprintf(irp->f, "@fieldParentPtr(");
1798 ir_print_other_instruction(irp, instruction->type_value);
2264 ir_print_other_inst_src(irp, instruction->type_value);
17992265 fprintf(irp->f, ",");
1800 ir_print_other_instruction(irp, instruction->field_name);
2266 ir_print_other_inst_src(irp, instruction->field_name);
18012267 fprintf(irp->f, ",");
1802 ir_print_other_instruction(irp, instruction->field_ptr);
2268 ir_print_other_inst_src(irp, instruction->field_ptr);
18032269 fprintf(irp->f, ")");
18042270}
18052271
1806static void ir_print_byte_offset_of(IrPrint *irp, IrInstructionByteOffsetOf *instruction) {
2272static void ir_print_field_parent_ptr(IrPrintGen *irp, IrInstGenFieldParentPtr *instruction) {
2273 fprintf(irp->f, "@fieldParentPtr(%s,", buf_ptr(instruction->field->name));
2274 ir_print_other_inst_gen(irp, instruction->field_ptr);
2275 fprintf(irp->f, ")");
2276}
2277
2278static void ir_print_byte_offset_of(IrPrintSrc *irp, IrInstSrcByteOffsetOf *instruction) {
18072279 fprintf(irp->f, "@byte_offset_of(");
1808 ir_print_other_instruction(irp, instruction->type_value);
2280 ir_print_other_inst_src(irp, instruction->type_value);
18092281 fprintf(irp->f, ",");
1810 ir_print_other_instruction(irp, instruction->field_name);
2282 ir_print_other_inst_src(irp, instruction->field_name);
18112283 fprintf(irp->f, ")");
18122284}
18132285
1814static void ir_print_bit_offset_of(IrPrint *irp, IrInstructionBitOffsetOf *instruction) {
2286static void ir_print_bit_offset_of(IrPrintSrc *irp, IrInstSrcBitOffsetOf *instruction) {
18152287 fprintf(irp->f, "@bit_offset_of(");
1816 ir_print_other_instruction(irp, instruction->type_value);
2288 ir_print_other_inst_src(irp, instruction->type_value);
18172289 fprintf(irp->f, ",");
1818 ir_print_other_instruction(irp, instruction->field_name);
2290 ir_print_other_inst_src(irp, instruction->field_name);
18192291 fprintf(irp->f, ")");
18202292}
18212293
1822static void ir_print_type_info(IrPrint *irp, IrInstructionTypeInfo *instruction) {
2294static void ir_print_type_info(IrPrintSrc *irp, IrInstSrcTypeInfo *instruction) {
18232295 fprintf(irp->f, "@typeInfo(");
1824 ir_print_other_instruction(irp, instruction->type_value);
2296 ir_print_other_inst_src(irp, instruction->type_value);
18252297 fprintf(irp->f, ")");
18262298}
18272299
1828static void ir_print_type(IrPrint *irp, IrInstructionType *instruction) {
2300static void ir_print_type(IrPrintSrc *irp, IrInstSrcType *instruction) {
18292301 fprintf(irp->f, "@Type(");
1830 ir_print_other_instruction(irp, instruction->type_info);
2302 ir_print_other_inst_src(irp, instruction->type_info);
18312303 fprintf(irp->f, ")");
18322304}
18332305
1834static void ir_print_has_field(IrPrint *irp, IrInstructionHasField *instruction) {
2306static void ir_print_has_field(IrPrintSrc *irp, IrInstSrcHasField *instruction) {
18352307 fprintf(irp->f, "@hasField(");
1836 ir_print_other_instruction(irp, instruction->container_type);
2308 ir_print_other_inst_src(irp, instruction->container_type);
18372309 fprintf(irp->f, ",");
1838 ir_print_other_instruction(irp, instruction->field_name);
2310 ir_print_other_inst_src(irp, instruction->field_name);
18392311 fprintf(irp->f, ")");
18402312}
18412313
1842static void ir_print_type_id(IrPrint *irp, IrInstructionTypeId *instruction) {
2314static void ir_print_type_id(IrPrintSrc *irp, IrInstSrcTypeId *instruction) {
18432315 fprintf(irp->f, "@typeId(");
1844 ir_print_other_instruction(irp, instruction->type_value);
2316 ir_print_other_inst_src(irp, instruction->type_value);
18452317 fprintf(irp->f, ")");
18462318}
18472319
1848static void ir_print_set_eval_branch_quota(IrPrint *irp, IrInstructionSetEvalBranchQuota *instruction) {
2320static void ir_print_set_eval_branch_quota(IrPrintSrc *irp, IrInstSrcSetEvalBranchQuota *instruction) {
18492321 fprintf(irp->f, "@setEvalBranchQuota(");
1850 ir_print_other_instruction(irp, instruction->new_quota);
2322 ir_print_other_inst_src(irp, instruction->new_quota);
18512323 fprintf(irp->f, ")");
18522324}
18532325
1854static void ir_print_align_cast(IrPrint *irp, IrInstructionAlignCast *instruction) {
2326static void ir_print_align_cast(IrPrintSrc *irp, IrInstSrcAlignCast *instruction) {
18552327 fprintf(irp->f, "@alignCast(");
1856 if (instruction->align_bytes == nullptr) {
1857 fprintf(irp->f, "null");
1858 } else {
1859 ir_print_other_instruction(irp, instruction->align_bytes);
1860 }
2328 ir_print_other_inst_src(irp, instruction->align_bytes);
18612329 fprintf(irp->f, ",");
1862 ir_print_other_instruction(irp, instruction->target);
2330 ir_print_other_inst_src(irp, instruction->target);
2331 fprintf(irp->f, ")");
2332}
2333
2334static void ir_print_align_cast(IrPrintGen *irp, IrInstGenAlignCast *instruction) {
2335 fprintf(irp->f, "@alignCast(");
2336 ir_print_other_inst_gen(irp, instruction->target);
18632337 fprintf(irp->f, ")");
18642338}
18652339
1866static void ir_print_resolve_result(IrPrint *irp, IrInstructionResolveResult *instruction) {
2340static void ir_print_resolve_result(IrPrintSrc *irp, IrInstSrcResolveResult *instruction) {
18672341 fprintf(irp->f, "ResolveResult(");
18682342 ir_print_result_loc(irp, instruction->result_loc);
18692343 fprintf(irp->f, ")");
18702344}
18712345
1872static void ir_print_reset_result(IrPrint *irp, IrInstructionResetResult *instruction) {
2346static void ir_print_reset_result(IrPrintSrc *irp, IrInstSrcResetResult *instruction) {
18732347 fprintf(irp->f, "ResetResult(");
18742348 ir_print_result_loc(irp, instruction->result_loc);
18752349 fprintf(irp->f, ")");
18762350}
18772351
1878static void ir_print_opaque_type(IrPrint *irp, IrInstructionOpaqueType *instruction) {
2352static void ir_print_opaque_type(IrPrintSrc *irp, IrInstSrcOpaqueType *instruction) {
18792353 fprintf(irp->f, "@OpaqueType()");
18802354}
18812355
1882static void ir_print_set_align_stack(IrPrint *irp, IrInstructionSetAlignStack *instruction) {
2356static void ir_print_set_align_stack(IrPrintSrc *irp, IrInstSrcSetAlignStack *instruction) {
18832357 fprintf(irp->f, "@setAlignStack(");
1884 ir_print_other_instruction(irp, instruction->align_bytes);
2358 ir_print_other_inst_src(irp, instruction->align_bytes);
18852359 fprintf(irp->f, ")");
18862360}
18872361
1888static void ir_print_arg_type(IrPrint *irp, IrInstructionArgType *instruction) {
2362static void ir_print_arg_type(IrPrintSrc *irp, IrInstSrcArgType *instruction) {
18892363 fprintf(irp->f, "@ArgType(");
1890 ir_print_other_instruction(irp, instruction->fn_type);
2364 ir_print_other_inst_src(irp, instruction->fn_type);
18912365 fprintf(irp->f, ",");
1892 ir_print_other_instruction(irp, instruction->arg_index);
2366 ir_print_other_inst_src(irp, instruction->arg_index);
18932367 fprintf(irp->f, ")");
18942368}
18952369
1896static void ir_print_enum_tag_type(IrPrint *irp, IrInstructionTagType *instruction) {
2370static void ir_print_enum_tag_type(IrPrintSrc *irp, IrInstSrcTagType *instruction) {
18972371 fprintf(irp->f, "@TagType(");
1898 ir_print_other_instruction(irp, instruction->target);
2372 ir_print_other_inst_src(irp, instruction->target);
18992373 fprintf(irp->f, ")");
19002374}
19012375
1902static void ir_print_export(IrPrint *irp, IrInstructionExport *instruction) {
2376static void ir_print_export(IrPrintSrc *irp, IrInstSrcExport *instruction) {
19032377 fprintf(irp->f, "@export(");
1904 ir_print_other_instruction(irp, instruction->target);
2378 ir_print_other_inst_src(irp, instruction->target);
19052379 fprintf(irp->f, ",");
1906 ir_print_other_instruction(irp, instruction->options);
2380 ir_print_other_inst_src(irp, instruction->options);
2381 fprintf(irp->f, ")");
2382}
2383
2384static void ir_print_error_return_trace(IrPrintSrc *irp, IrInstSrcErrorReturnTrace *instruction) {
2385 fprintf(irp->f, "@errorReturnTrace(");
2386 switch (instruction->optional) {
2387 case IrInstErrorReturnTraceNull:
2388 fprintf(irp->f, "Null");
2389 break;
2390 case IrInstErrorReturnTraceNonNull:
2391 fprintf(irp->f, "NonNull");
2392 break;
2393 }
19072394 fprintf(irp->f, ")");
19082395}
19092396
1910static void ir_print_error_return_trace(IrPrint *irp, IrInstructionErrorReturnTrace *instruction) {
2397static void ir_print_error_return_trace(IrPrintGen *irp, IrInstGenErrorReturnTrace *instruction) {
19112398 fprintf(irp->f, "@errorReturnTrace(");
19122399 switch (instruction->optional) {
1913 case IrInstructionErrorReturnTrace::Null:
2400 case IrInstErrorReturnTraceNull:
19142401 fprintf(irp->f, "Null");
19152402 break;
1916 case IrInstructionErrorReturnTrace::NonNull:
2403 case IrInstErrorReturnTraceNonNull:
19172404 fprintf(irp->f, "NonNull");
19182405 break;
19192406 }
19202407 fprintf(irp->f, ")");
19212408}
19222409
1923static void ir_print_error_union(IrPrint *irp, IrInstructionErrorUnion *instruction) {
1924 ir_print_other_instruction(irp, instruction->err_set);
2410static void ir_print_error_union(IrPrintSrc *irp, IrInstSrcErrorUnion *instruction) {
2411 ir_print_other_inst_src(irp, instruction->err_set);
19252412 fprintf(irp->f, "!");
1926 ir_print_other_instruction(irp, instruction->payload);
2413 ir_print_other_inst_src(irp, instruction->payload);
19272414}
19282415
1929static void ir_print_atomic_rmw(IrPrint *irp, IrInstructionAtomicRmw *instruction) {
2416static void ir_print_atomic_rmw(IrPrintSrc *irp, IrInstSrcAtomicRmw *instruction) {
19302417 fprintf(irp->f, "@atomicRmw(");
1931 if (instruction->operand_type != nullptr) {
1932 ir_print_other_instruction(irp, instruction->operand_type);
1933 } else {
1934 fprintf(irp->f, "[TODO print]");
1935 }
2418 ir_print_other_inst_src(irp, instruction->operand_type);
19362419 fprintf(irp->f, ",");
1937 ir_print_other_instruction(irp, instruction->ptr);
2420 ir_print_other_inst_src(irp, instruction->ptr);
19382421 fprintf(irp->f, ",");
1939 if (instruction->op != nullptr) {
1940 ir_print_other_instruction(irp, instruction->op);
1941 } else {
1942 fprintf(irp->f, "[TODO print]");
1943 }
2422 ir_print_other_inst_src(irp, instruction->op);
19442423 fprintf(irp->f, ",");
1945 ir_print_other_instruction(irp, instruction->operand);
2424 ir_print_other_inst_src(irp, instruction->operand);
19462425 fprintf(irp->f, ",");
1947 if (instruction->ordering != nullptr) {
1948 ir_print_other_instruction(irp, instruction->ordering);
1949 } else {
1950 fprintf(irp->f, "[TODO print]");
1951 }
2426 ir_print_other_inst_src(irp, instruction->ordering);
19522427 fprintf(irp->f, ")");
19532428}
19542429
1955static void ir_print_atomic_load(IrPrint *irp, IrInstructionAtomicLoad *instruction) {
2430static void ir_print_atomic_rmw(IrPrintGen *irp, IrInstGenAtomicRmw *instruction) {
2431 fprintf(irp->f, "@atomicRmw(");
2432 ir_print_other_inst_gen(irp, instruction->ptr);
2433 fprintf(irp->f, ",[TODO print op],");
2434 ir_print_other_inst_gen(irp, instruction->operand);
2435 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2436}
2437
2438static void ir_print_atomic_load(IrPrintSrc *irp, IrInstSrcAtomicLoad *instruction) {
19562439 fprintf(irp->f, "@atomicLoad(");
1957 if (instruction->operand_type != nullptr) {
1958 ir_print_other_instruction(irp, instruction->operand_type);
1959 } else {
1960 fprintf(irp->f, "[TODO print]");
1961 }
2440 ir_print_other_inst_src(irp, instruction->operand_type);
19622441 fprintf(irp->f, ",");
1963 ir_print_other_instruction(irp, instruction->ptr);
2442 ir_print_other_inst_src(irp, instruction->ptr);
19642443 fprintf(irp->f, ",");
1965 if (instruction->ordering != nullptr) {
1966 ir_print_other_instruction(irp, instruction->ordering);
1967 } else {
1968 fprintf(irp->f, "[TODO print]");
1969 }
2444 ir_print_other_inst_src(irp, instruction->ordering);
19702445 fprintf(irp->f, ")");
19712446}
19722447
1973static void ir_print_atomic_store(IrPrint *irp, IrInstructionAtomicStore *instruction) {
2448static void ir_print_atomic_load(IrPrintGen *irp, IrInstGenAtomicLoad *instruction) {
2449 fprintf(irp->f, "@atomicLoad(");
2450 ir_print_other_inst_gen(irp, instruction->ptr);
2451 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2452}
2453
2454static void ir_print_atomic_store(IrPrintSrc *irp, IrInstSrcAtomicStore *instruction) {
19742455 fprintf(irp->f, "@atomicStore(");
1975 if (instruction->operand_type != nullptr) {
1976 ir_print_other_instruction(irp, instruction->operand_type);
1977 } else {
1978 fprintf(irp->f, "[TODO print]");
1979 }
2456 ir_print_other_inst_src(irp, instruction->operand_type);
19802457 fprintf(irp->f, ",");
1981 ir_print_other_instruction(irp, instruction->ptr);
2458 ir_print_other_inst_src(irp, instruction->ptr);
19822459 fprintf(irp->f, ",");
1983 ir_print_other_instruction(irp, instruction->value);
2460 ir_print_other_inst_src(irp, instruction->value);
19842461 fprintf(irp->f, ",");
1985 if (instruction->ordering != nullptr) {
1986 ir_print_other_instruction(irp, instruction->ordering);
1987 } else {
1988 fprintf(irp->f, "[TODO print]");
1989 }
2462 ir_print_other_inst_src(irp, instruction->ordering);
19902463 fprintf(irp->f, ")");
19912464}
19922465
2466static void ir_print_atomic_store(IrPrintGen *irp, IrInstGenAtomicStore *instruction) {
2467 fprintf(irp->f, "@atomicStore(");
2468 ir_print_other_inst_gen(irp, instruction->ptr);
2469 fprintf(irp->f, ",");
2470 ir_print_other_inst_gen(irp, instruction->value);
2471 fprintf(irp->f, ",%s)", atomic_order_str(instruction->ordering));
2472}
2473
2474
2475static void ir_print_save_err_ret_addr(IrPrintSrc *irp, IrInstSrcSaveErrRetAddr *instruction) {
2476 fprintf(irp->f, "@saveErrRetAddr()");
2477}
19932478
1994static void ir_print_save_err_ret_addr(IrPrint *irp, IrInstructionSaveErrRetAddr *instruction) {
2479static void ir_print_save_err_ret_addr(IrPrintGen *irp, IrInstGenSaveErrRetAddr *instruction) {
19952480 fprintf(irp->f, "@saveErrRetAddr()");
19962481}
19972482
1998static void ir_print_add_implicit_return_type(IrPrint *irp, IrInstructionAddImplicitReturnType *instruction) {
2483static void ir_print_add_implicit_return_type(IrPrintSrc *irp, IrInstSrcAddImplicitReturnType *instruction) {
19992484 fprintf(irp->f, "@addImplicitReturnType(");
2000 ir_print_other_instruction(irp, instruction->value);
2485 ir_print_other_inst_src(irp, instruction->value);
2486 fprintf(irp->f, ")");
2487}
2488
2489static void ir_print_float_op(IrPrintSrc *irp, IrInstSrcFloatOp *instruction) {
2490 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2491 ir_print_other_inst_src(irp, instruction->operand);
20012492 fprintf(irp->f, ")");
20022493}
20032494
2004static void ir_print_float_op(IrPrint *irp, IrInstructionFloatOp *instruction) {
2495static void ir_print_float_op(IrPrintGen *irp, IrInstGenFloatOp *instruction) {
20052496 fprintf(irp->f, "@%s(", float_op_to_name(instruction->fn_id));
2006 ir_print_other_instruction(irp, instruction->operand);
2497 ir_print_other_inst_gen(irp, instruction->operand);
20072498 fprintf(irp->f, ")");
20082499}
20092500
2010static void ir_print_mul_add(IrPrint *irp, IrInstructionMulAdd *instruction) {
2501static void ir_print_mul_add(IrPrintSrc *irp, IrInstSrcMulAdd *instruction) {
20112502 fprintf(irp->f, "@mulAdd(");
2012 if (instruction->type_value != nullptr) {
2013 ir_print_other_instruction(irp, instruction->type_value);
2014 } else {
2015 fprintf(irp->f, "null");
2016 }
2503 ir_print_other_inst_src(irp, instruction->type_value);
20172504 fprintf(irp->f, ",");
2018 ir_print_other_instruction(irp, instruction->op1);
2505 ir_print_other_inst_src(irp, instruction->op1);
20192506 fprintf(irp->f, ",");
2020 ir_print_other_instruction(irp, instruction->op2);
2507 ir_print_other_inst_src(irp, instruction->op2);
20212508 fprintf(irp->f, ",");
2022 ir_print_other_instruction(irp, instruction->op3);
2509 ir_print_other_inst_src(irp, instruction->op3);
20232510 fprintf(irp->f, ")");
20242511}
20252512
2026static void ir_print_decl_var_gen(IrPrint *irp, IrInstructionDeclVarGen *decl_var_instruction) {
2513static void ir_print_mul_add(IrPrintGen *irp, IrInstGenMulAdd *instruction) {
2514 fprintf(irp->f, "@mulAdd(");
2515 ir_print_other_inst_gen(irp, instruction->op1);
2516 fprintf(irp->f, ",");
2517 ir_print_other_inst_gen(irp, instruction->op2);
2518 fprintf(irp->f, ",");
2519 ir_print_other_inst_gen(irp, instruction->op3);
2520 fprintf(irp->f, ")");
2521}
2522
2523static void ir_print_decl_var_gen(IrPrintGen *irp, IrInstGenDeclVar *decl_var_instruction) {
20272524 ZigVar *var = decl_var_instruction->var;
20282525 const char *var_or_const = decl_var_instruction->var->gen_is_const ? "const" : "var";
20292526 const char *name = decl_var_instruction->var->name;
20302527 fprintf(irp->f, "%s %s: %s align(%u) = ", var_or_const, name, buf_ptr(&var->var_type->name),
20312528 var->align_bytes);
20322529
2033 ir_print_other_instruction(irp, decl_var_instruction->var_ptr);
2034 if (decl_var_instruction->var->is_comptime != nullptr) {
2035 fprintf(irp->f, " // comptime = ");
2036 ir_print_other_instruction(irp, decl_var_instruction->var->is_comptime);
2037 }
2530 ir_print_other_inst_gen(irp, decl_var_instruction->var_ptr);
20382531}
20392532
2040static void ir_print_has_decl(IrPrint *irp, IrInstructionHasDecl *instruction) {
2533static void ir_print_has_decl(IrPrintSrc *irp, IrInstSrcHasDecl *instruction) {
20412534 fprintf(irp->f, "@hasDecl(");
2042 ir_print_other_instruction(irp, instruction->container);
2535 ir_print_other_inst_src(irp, instruction->container);
20432536 fprintf(irp->f, ",");
2044 ir_print_other_instruction(irp, instruction->name);
2537 ir_print_other_inst_src(irp, instruction->name);
20452538 fprintf(irp->f, ")");
20462539}
20472540
2048static void ir_print_undeclared_ident(IrPrint *irp, IrInstructionUndeclaredIdent *instruction) {
2541static void ir_print_undeclared_ident(IrPrintSrc *irp, IrInstSrcUndeclaredIdent *instruction) {
20492542 fprintf(irp->f, "@undeclaredIdent(%s)", buf_ptr(instruction->name));
20502543}
20512544
2052static void ir_print_union_init_named_field(IrPrint *irp, IrInstructionUnionInitNamedField *instruction) {
2545static void ir_print_union_init_named_field(IrPrintSrc *irp, IrInstSrcUnionInitNamedField *instruction) {
20532546 fprintf(irp->f, "@unionInit(");
2054 ir_print_other_instruction(irp, instruction->union_type);
2547 ir_print_other_inst_src(irp, instruction->union_type);
20552548 fprintf(irp->f, ", ");
2056 ir_print_other_instruction(irp, instruction->field_name);
2549 ir_print_other_inst_src(irp, instruction->field_name);
20572550 fprintf(irp->f, ", ");
2058 ir_print_other_instruction(irp, instruction->field_result_loc);
2551 ir_print_other_inst_src(irp, instruction->field_result_loc);
20592552 fprintf(irp->f, ", ");
2060 ir_print_other_instruction(irp, instruction->result_loc);
2553 ir_print_other_inst_src(irp, instruction->result_loc);
20612554 fprintf(irp->f, ")");
20622555}
20632556
2064static void ir_print_suspend_begin(IrPrint *irp, IrInstructionSuspendBegin *instruction) {
2557static void ir_print_suspend_begin(IrPrintSrc *irp, IrInstSrcSuspendBegin *instruction) {
2558 fprintf(irp->f, "@suspendBegin()");
2559}
2560
2561static void ir_print_suspend_begin(IrPrintGen *irp, IrInstGenSuspendBegin *instruction) {
20652562 fprintf(irp->f, "@suspendBegin()");
20662563}
20672564
2068static void ir_print_suspend_finish(IrPrint *irp, IrInstructionSuspendFinish *instruction) {
2565static void ir_print_suspend_finish(IrPrintSrc *irp, IrInstSrcSuspendFinish *instruction) {
2566 fprintf(irp->f, "@suspendFinish()");
2567}
2568
2569static void ir_print_suspend_finish(IrPrintGen *irp, IrInstGenSuspendFinish *instruction) {
20692570 fprintf(irp->f, "@suspendFinish()");
20702571}
20712572
2072static void ir_print_resume(IrPrint *irp, IrInstructionResume *instruction) {
2573static void ir_print_resume(IrPrintSrc *irp, IrInstSrcResume *instruction) {
20732574 fprintf(irp->f, "resume ");
2074 ir_print_other_instruction(irp, instruction->frame);
2575 ir_print_other_inst_src(irp, instruction->frame);
20752576}
20762577
2077static void ir_print_await_src(IrPrint *irp, IrInstructionAwaitSrc *instruction) {
2578static void ir_print_resume(IrPrintGen *irp, IrInstGenResume *instruction) {
2579 fprintf(irp->f, "resume ");
2580 ir_print_other_inst_gen(irp, instruction->frame);
2581}
2582
2583static void ir_print_await_src(IrPrintSrc *irp, IrInstSrcAwait *instruction) {
20782584 fprintf(irp->f, "@await(");
2079 ir_print_other_instruction(irp, instruction->frame);
2585 ir_print_other_inst_src(irp, instruction->frame);
20802586 fprintf(irp->f, ",");
20812587 ir_print_result_loc(irp, instruction->result_loc);
20822588 fprintf(irp->f, ")");
20832589}
20842590
2085static void ir_print_await_gen(IrPrint *irp, IrInstructionAwaitGen *instruction) {
2591static void ir_print_await_gen(IrPrintGen *irp, IrInstGenAwait *instruction) {
20862592 fprintf(irp->f, "@await(");
2087 ir_print_other_instruction(irp, instruction->frame);
2593 ir_print_other_inst_gen(irp, instruction->frame);
20882594 fprintf(irp->f, ",");
2089 ir_print_other_instruction(irp, instruction->result_loc);
2595 ir_print_other_inst_gen(irp, instruction->result_loc);
2596 fprintf(irp->f, ")");
2597}
2598
2599static void ir_print_spill_begin(IrPrintSrc *irp, IrInstSrcSpillBegin *instruction) {
2600 fprintf(irp->f, "@spillBegin(");
2601 ir_print_other_inst_src(irp, instruction->operand);
20902602 fprintf(irp->f, ")");
20912603}
20922604
2093static void ir_print_spill_begin(IrPrint *irp, IrInstructionSpillBegin *instruction) {
2605static void ir_print_spill_begin(IrPrintGen *irp, IrInstGenSpillBegin *instruction) {
20942606 fprintf(irp->f, "@spillBegin(");
2095 ir_print_other_instruction(irp, instruction->operand);
2607 ir_print_other_inst_gen(irp, instruction->operand);
20962608 fprintf(irp->f, ")");
20972609}
20982610
2099static void ir_print_spill_end(IrPrint *irp, IrInstructionSpillEnd *instruction) {
2611static void ir_print_spill_end(IrPrintSrc *irp, IrInstSrcSpillEnd *instruction) {
21002612 fprintf(irp->f, "@spillEnd(");
2101 ir_print_other_instruction(irp, &instruction->begin->base);
2613 ir_print_other_inst_src(irp, &instruction->begin->base);
21022614 fprintf(irp->f, ")");
21032615}
21042616
2105static void ir_print_vector_extract_elem(IrPrint *irp, IrInstructionVectorExtractElem *instruction) {
2617static void ir_print_spill_end(IrPrintGen *irp, IrInstGenSpillEnd *instruction) {
2618 fprintf(irp->f, "@spillEnd(");
2619 ir_print_other_inst_gen(irp, &instruction->begin->base);
2620 fprintf(irp->f, ")");
2621}
2622
2623static void ir_print_vector_extract_elem(IrPrintGen *irp, IrInstGenVectorExtractElem *instruction) {
21062624 fprintf(irp->f, "@vectorExtractElem(");
2107 ir_print_other_instruction(irp, instruction->vector);
2625 ir_print_other_inst_gen(irp, instruction->vector);
21082626 fprintf(irp->f, ",");
2109 ir_print_other_instruction(irp, instruction->index);
2627 ir_print_other_inst_gen(irp, instruction->index);
21102628 fprintf(irp->f, ")");
21112629}
21122630
2113static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool trailing) {
2114 ir_print_prefix(irp, instruction, trailing);
2631static void ir_print_inst_src(IrPrintSrc *irp, IrInstSrc *instruction, bool trailing) {
2632 ir_print_prefix_src(irp, instruction, trailing);
21152633 switch (instruction->id) {
2116 case IrInstructionIdInvalid:
2634 case IrInstSrcIdInvalid:
21172635 zig_unreachable();
2118 case IrInstructionIdReturn:
2119 ir_print_return(irp, (IrInstructionReturn *)instruction);
2636 case IrInstSrcIdReturn:
2637 ir_print_return_src(irp, (IrInstSrcReturn *)instruction);
2638 break;
2639 case IrInstSrcIdConst:
2640 ir_print_const(irp, (IrInstSrcConst *)instruction);
2641 break;
2642 case IrInstSrcIdBinOp:
2643 ir_print_bin_op(irp, (IrInstSrcBinOp *)instruction);
2644 break;
2645 case IrInstSrcIdMergeErrSets:
2646 ir_print_merge_err_sets(irp, (IrInstSrcMergeErrSets *)instruction);
2647 break;
2648 case IrInstSrcIdDeclVar:
2649 ir_print_decl_var_src(irp, (IrInstSrcDeclVar *)instruction);
2650 break;
2651 case IrInstSrcIdCallExtra:
2652 ir_print_call_extra(irp, (IrInstSrcCallExtra *)instruction);
2653 break;
2654 case IrInstSrcIdCall:
2655 ir_print_call_src(irp, (IrInstSrcCall *)instruction);
2656 break;
2657 case IrInstSrcIdCallArgs:
2658 ir_print_call_args(irp, (IrInstSrcCallArgs *)instruction);
2659 break;
2660 case IrInstSrcIdUnOp:
2661 ir_print_un_op(irp, (IrInstSrcUnOp *)instruction);
2662 break;
2663 case IrInstSrcIdCondBr:
2664 ir_print_cond_br(irp, (IrInstSrcCondBr *)instruction);
21202665 break;
2121 case IrInstructionIdConst:
2122 ir_print_const(irp, (IrInstructionConst *)instruction);
2666 case IrInstSrcIdBr:
2667 ir_print_br(irp, (IrInstSrcBr *)instruction);
21232668 break;
2124 case IrInstructionIdBinOp:
2125 ir_print_bin_op(irp, (IrInstructionBinOp *)instruction);
2669 case IrInstSrcIdPhi:
2670 ir_print_phi(irp, (IrInstSrcPhi *)instruction);
21262671 break;
2127 case IrInstructionIdMergeErrSets:
2128 ir_print_merge_err_sets(irp, (IrInstructionMergeErrSets *)instruction);
2672 case IrInstSrcIdContainerInitList:
2673 ir_print_container_init_list(irp, (IrInstSrcContainerInitList *)instruction);
21292674 break;
2130 case IrInstructionIdDeclVarSrc:
2131 ir_print_decl_var_src(irp, (IrInstructionDeclVarSrc *)instruction);
2675 case IrInstSrcIdContainerInitFields:
2676 ir_print_container_init_fields(irp, (IrInstSrcContainerInitFields *)instruction);
21322677 break;
2133 case IrInstructionIdCast:
2134 ir_print_cast(irp, (IrInstructionCast *)instruction);
2678 case IrInstSrcIdUnreachable:
2679 ir_print_unreachable(irp, (IrInstSrcUnreachable *)instruction);
21352680 break;
2136 case IrInstructionIdCallExtra:
2137 ir_print_call_extra(irp, (IrInstructionCallExtra *)instruction);
2681 case IrInstSrcIdElemPtr:
2682 ir_print_elem_ptr(irp, (IrInstSrcElemPtr *)instruction);
21382683 break;
2139 case IrInstructionIdCallSrc:
2140 ir_print_call_src(irp, (IrInstructionCallSrc *)instruction);
2684 case IrInstSrcIdVarPtr:
2685 ir_print_var_ptr(irp, (IrInstSrcVarPtr *)instruction);
21412686 break;
2142 case IrInstructionIdCallSrcArgs:
2143 ir_print_call_src_args(irp, (IrInstructionCallSrcArgs *)instruction);
2687 case IrInstSrcIdLoadPtr:
2688 ir_print_load_ptr(irp, (IrInstSrcLoadPtr *)instruction);
21442689 break;
2145 case IrInstructionIdCallGen:
2146 ir_print_call_gen(irp, (IrInstructionCallGen *)instruction);
2690 case IrInstSrcIdStorePtr:
2691 ir_print_store_ptr(irp, (IrInstSrcStorePtr *)instruction);
21472692 break;
2148 case IrInstructionIdUnOp:
2149 ir_print_un_op(irp, (IrInstructionUnOp *)instruction);
2693 case IrInstSrcIdTypeOf:
2694 ir_print_typeof(irp, (IrInstSrcTypeOf *)instruction);
21502695 break;
2151 case IrInstructionIdCondBr:
2152 ir_print_cond_br(irp, (IrInstructionCondBr *)instruction);
2696 case IrInstSrcIdFieldPtr:
2697 ir_print_field_ptr(irp, (IrInstSrcFieldPtr *)instruction);
21532698 break;
2154 case IrInstructionIdBr:
2155 ir_print_br(irp, (IrInstructionBr *)instruction);
2699 case IrInstSrcIdSetCold:
2700 ir_print_set_cold(irp, (IrInstSrcSetCold *)instruction);
21562701 break;
2157 case IrInstructionIdPhi:
2158 ir_print_phi(irp, (IrInstructionPhi *)instruction);
2702 case IrInstSrcIdSetRuntimeSafety:
2703 ir_print_set_runtime_safety(irp, (IrInstSrcSetRuntimeSafety *)instruction);
21592704 break;
2160 case IrInstructionIdContainerInitList:
2161 ir_print_container_init_list(irp, (IrInstructionContainerInitList *)instruction);
2705 case IrInstSrcIdSetFloatMode:
2706 ir_print_set_float_mode(irp, (IrInstSrcSetFloatMode *)instruction);
21622707 break;
2163 case IrInstructionIdContainerInitFields:
2164 ir_print_container_init_fields(irp, (IrInstructionContainerInitFields *)instruction);
2708 case IrInstSrcIdArrayType:
2709 ir_print_array_type(irp, (IrInstSrcArrayType *)instruction);
21652710 break;
2166 case IrInstructionIdUnreachable:
2167 ir_print_unreachable(irp, (IrInstructionUnreachable *)instruction);
2711 case IrInstSrcIdSliceType:
2712 ir_print_slice_type(irp, (IrInstSrcSliceType *)instruction);
21682713 break;
2169 case IrInstructionIdElemPtr:
2170 ir_print_elem_ptr(irp, (IrInstructionElemPtr *)instruction);
2714 case IrInstSrcIdAnyFrameType:
2715 ir_print_any_frame_type(irp, (IrInstSrcAnyFrameType *)instruction);
21712716 break;
2172 case IrInstructionIdVarPtr:
2173 ir_print_var_ptr(irp, (IrInstructionVarPtr *)instruction);
2717 case IrInstSrcIdAsm:
2718 ir_print_asm_src(irp, (IrInstSrcAsm *)instruction);
21742719 break;
2175 case IrInstructionIdReturnPtr:
2176 ir_print_return_ptr(irp, (IrInstructionReturnPtr *)instruction);
2720 case IrInstSrcIdSizeOf:
2721 ir_print_size_of(irp, (IrInstSrcSizeOf *)instruction);
21772722 break;
2178 case IrInstructionIdLoadPtr:
2179 ir_print_load_ptr(irp, (IrInstructionLoadPtr *)instruction);
2723 case IrInstSrcIdTestNonNull:
2724 ir_print_test_non_null(irp, (IrInstSrcTestNonNull *)instruction);
21802725 break;
2181 case IrInstructionIdLoadPtrGen:
2182 ir_print_load_ptr_gen(irp, (IrInstructionLoadPtrGen *)instruction);
2726 case IrInstSrcIdOptionalUnwrapPtr:
2727 ir_print_optional_unwrap_ptr(irp, (IrInstSrcOptionalUnwrapPtr *)instruction);
21832728 break;
2184 case IrInstructionIdStorePtr:
2185 ir_print_store_ptr(irp, (IrInstructionStorePtr *)instruction);
2729 case IrInstSrcIdPopCount:
2730 ir_print_pop_count(irp, (IrInstSrcPopCount *)instruction);
21862731 break;
2187 case IrInstructionIdVectorStoreElem:
2188 ir_print_vector_store_elem(irp, (IrInstructionVectorStoreElem *)instruction);
2732 case IrInstSrcIdCtz:
2733 ir_print_ctz(irp, (IrInstSrcCtz *)instruction);
21892734 break;
2190 case IrInstructionIdTypeOf:
2191 ir_print_typeof(irp, (IrInstructionTypeOf *)instruction);
2735 case IrInstSrcIdBswap:
2736 ir_print_bswap(irp, (IrInstSrcBswap *)instruction);
21922737 break;
2193 case IrInstructionIdFieldPtr:
2194 ir_print_field_ptr(irp, (IrInstructionFieldPtr *)instruction);
2738 case IrInstSrcIdBitReverse:
2739 ir_print_bit_reverse(irp, (IrInstSrcBitReverse *)instruction);
21952740 break;
2196 case IrInstructionIdStructFieldPtr:
2197 ir_print_struct_field_ptr(irp, (IrInstructionStructFieldPtr *)instruction);
2741 case IrInstSrcIdSwitchBr:
2742 ir_print_switch_br(irp, (IrInstSrcSwitchBr *)instruction);
21982743 break;
2199 case IrInstructionIdUnionFieldPtr:
2200 ir_print_union_field_ptr(irp, (IrInstructionUnionFieldPtr *)instruction);
2744 case IrInstSrcIdSwitchVar:
2745 ir_print_switch_var(irp, (IrInstSrcSwitchVar *)instruction);
22012746 break;
2202 case IrInstructionIdSetCold:
2203 ir_print_set_cold(irp, (IrInstructionSetCold *)instruction);
2747 case IrInstSrcIdSwitchElseVar:
2748 ir_print_switch_else_var(irp, (IrInstSrcSwitchElseVar *)instruction);
22042749 break;
2205 case IrInstructionIdSetRuntimeSafety:
2206 ir_print_set_runtime_safety(irp, (IrInstructionSetRuntimeSafety *)instruction);
2750 case IrInstSrcIdSwitchTarget:
2751 ir_print_switch_target(irp, (IrInstSrcSwitchTarget *)instruction);
22072752 break;
2208 case IrInstructionIdSetFloatMode:
2209 ir_print_set_float_mode(irp, (IrInstructionSetFloatMode *)instruction);
2753 case IrInstSrcIdImport:
2754 ir_print_import(irp, (IrInstSrcImport *)instruction);
22102755 break;
2211 case IrInstructionIdArrayType:
2212 ir_print_array_type(irp, (IrInstructionArrayType *)instruction);
2756 case IrInstSrcIdRef:
2757 ir_print_ref(irp, (IrInstSrcRef *)instruction);
22132758 break;
2214 case IrInstructionIdSliceType:
2215 ir_print_slice_type(irp, (IrInstructionSliceType *)instruction);
2759 case IrInstSrcIdCompileErr:
2760 ir_print_compile_err(irp, (IrInstSrcCompileErr *)instruction);
22162761 break;
2217 case IrInstructionIdAnyFrameType:
2218 ir_print_any_frame_type(irp, (IrInstructionAnyFrameType *)instruction);
2762 case IrInstSrcIdCompileLog:
2763 ir_print_compile_log(irp, (IrInstSrcCompileLog *)instruction);
22192764 break;
2220 case IrInstructionIdAsmSrc:
2221 ir_print_asm_src(irp, (IrInstructionAsmSrc *)instruction);
2765 case IrInstSrcIdErrName:
2766 ir_print_err_name(irp, (IrInstSrcErrName *)instruction);
22222767 break;
2223 case IrInstructionIdAsmGen:
2224 ir_print_asm_gen(irp, (IrInstructionAsmGen *)instruction);
2768 case IrInstSrcIdCImport:
2769 ir_print_c_import(irp, (IrInstSrcCImport *)instruction);
22252770 break;
2226 case IrInstructionIdSizeOf:
2227 ir_print_size_of(irp, (IrInstructionSizeOf *)instruction);
2771 case IrInstSrcIdCInclude:
2772 ir_print_c_include(irp, (IrInstSrcCInclude *)instruction);
22282773 break;
2229 case IrInstructionIdTestNonNull:
2230 ir_print_test_non_null(irp, (IrInstructionTestNonNull *)instruction);
2774 case IrInstSrcIdCDefine:
2775 ir_print_c_define(irp, (IrInstSrcCDefine *)instruction);
22312776 break;
2232 case IrInstructionIdOptionalUnwrapPtr:
2233 ir_print_optional_unwrap_ptr(irp, (IrInstructionOptionalUnwrapPtr *)instruction);
2777 case IrInstSrcIdCUndef:
2778 ir_print_c_undef(irp, (IrInstSrcCUndef *)instruction);
22342779 break;
2235 case IrInstructionIdPopCount:
2236 ir_print_pop_count(irp, (IrInstructionPopCount *)instruction);
2780 case IrInstSrcIdEmbedFile:
2781 ir_print_embed_file(irp, (IrInstSrcEmbedFile *)instruction);
22372782 break;
2238 case IrInstructionIdClz:
2239 ir_print_clz(irp, (IrInstructionClz *)instruction);
2783 case IrInstSrcIdCmpxchg:
2784 ir_print_cmpxchg_src(irp, (IrInstSrcCmpxchg *)instruction);
22402785 break;
2241 case IrInstructionIdCtz:
2242 ir_print_ctz(irp, (IrInstructionCtz *)instruction);
2786 case IrInstSrcIdFence:
2787 ir_print_fence(irp, (IrInstSrcFence *)instruction);
22432788 break;
2244 case IrInstructionIdBswap:
2245 ir_print_bswap(irp, (IrInstructionBswap *)instruction);
2789 case IrInstSrcIdTruncate:
2790 ir_print_truncate(irp, (IrInstSrcTruncate *)instruction);
22462791 break;
2247 case IrInstructionIdBitReverse:
2248 ir_print_bit_reverse(irp, (IrInstructionBitReverse *)instruction);
2792 case IrInstSrcIdIntCast:
2793 ir_print_int_cast(irp, (IrInstSrcIntCast *)instruction);
22492794 break;
2250 case IrInstructionIdSwitchBr:
2251 ir_print_switch_br(irp, (IrInstructionSwitchBr *)instruction);
2795 case IrInstSrcIdFloatCast:
2796 ir_print_float_cast(irp, (IrInstSrcFloatCast *)instruction);
22522797 break;
2253 case IrInstructionIdSwitchVar:
2254 ir_print_switch_var(irp, (IrInstructionSwitchVar *)instruction);
2798 case IrInstSrcIdErrSetCast:
2799 ir_print_err_set_cast(irp, (IrInstSrcErrSetCast *)instruction);
22552800 break;
2256 case IrInstructionIdSwitchElseVar:
2257 ir_print_switch_else_var(irp, (IrInstructionSwitchElseVar *)instruction);
2801 case IrInstSrcIdFromBytes:
2802 ir_print_from_bytes(irp, (IrInstSrcFromBytes *)instruction);
22582803 break;
2259 case IrInstructionIdSwitchTarget:
2260 ir_print_switch_target(irp, (IrInstructionSwitchTarget *)instruction);
2804 case IrInstSrcIdToBytes:
2805 ir_print_to_bytes(irp, (IrInstSrcToBytes *)instruction);
22612806 break;
2262 case IrInstructionIdUnionTag:
2263 ir_print_union_tag(irp, (IrInstructionUnionTag *)instruction);
2807 case IrInstSrcIdIntToFloat:
2808 ir_print_int_to_float(irp, (IrInstSrcIntToFloat *)instruction);
22642809 break;
2265 case IrInstructionIdImport:
2266 ir_print_import(irp, (IrInstructionImport *)instruction);
2810 case IrInstSrcIdFloatToInt:
2811 ir_print_float_to_int(irp, (IrInstSrcFloatToInt *)instruction);
22672812 break;
2268 case IrInstructionIdRef:
2269 ir_print_ref(irp, (IrInstructionRef *)instruction);
2813 case IrInstSrcIdBoolToInt:
2814 ir_print_bool_to_int(irp, (IrInstSrcBoolToInt *)instruction);
22702815 break;
2271 case IrInstructionIdRefGen:
2272 ir_print_ref_gen(irp, (IrInstructionRefGen *)instruction);
2816 case IrInstSrcIdIntType:
2817 ir_print_int_type(irp, (IrInstSrcIntType *)instruction);
22732818 break;
2274 case IrInstructionIdCompileErr:
2275 ir_print_compile_err(irp, (IrInstructionCompileErr *)instruction);
2819 case IrInstSrcIdVectorType:
2820 ir_print_vector_type(irp, (IrInstSrcVectorType *)instruction);
22762821 break;
2277 case IrInstructionIdCompileLog:
2278 ir_print_compile_log(irp, (IrInstructionCompileLog *)instruction);
2822 case IrInstSrcIdShuffleVector:
2823 ir_print_shuffle_vector(irp, (IrInstSrcShuffleVector *)instruction);
22792824 break;
2280 case IrInstructionIdErrName:
2281 ir_print_err_name(irp, (IrInstructionErrName *)instruction);
2825 case IrInstSrcIdSplat:
2826 ir_print_splat_src(irp, (IrInstSrcSplat *)instruction);
22822827 break;
2283 case IrInstructionIdCImport:
2284 ir_print_c_import(irp, (IrInstructionCImport *)instruction);
2828 case IrInstSrcIdBoolNot:
2829 ir_print_bool_not(irp, (IrInstSrcBoolNot *)instruction);
22852830 break;
2286 case IrInstructionIdCInclude:
2287 ir_print_c_include(irp, (IrInstructionCInclude *)instruction);
2831 case IrInstSrcIdMemset:
2832 ir_print_memset(irp, (IrInstSrcMemset *)instruction);
22882833 break;
2289 case IrInstructionIdCDefine:
2290 ir_print_c_define(irp, (IrInstructionCDefine *)instruction);
2834 case IrInstSrcIdMemcpy:
2835 ir_print_memcpy(irp, (IrInstSrcMemcpy *)instruction);
22912836 break;
2292 case IrInstructionIdCUndef:
2293 ir_print_c_undef(irp, (IrInstructionCUndef *)instruction);
2837 case IrInstSrcIdSlice:
2838 ir_print_slice_src(irp, (IrInstSrcSlice *)instruction);
22942839 break;
2295 case IrInstructionIdEmbedFile:
2296 ir_print_embed_file(irp, (IrInstructionEmbedFile *)instruction);
2840 case IrInstSrcIdMemberCount:
2841 ir_print_member_count(irp, (IrInstSrcMemberCount *)instruction);
22972842 break;
2298 case IrInstructionIdCmpxchgSrc:
2299 ir_print_cmpxchg_src(irp, (IrInstructionCmpxchgSrc *)instruction);
2843 case IrInstSrcIdMemberType:
2844 ir_print_member_type(irp, (IrInstSrcMemberType *)instruction);
23002845 break;
2301 case IrInstructionIdCmpxchgGen:
2302 ir_print_cmpxchg_gen(irp, (IrInstructionCmpxchgGen *)instruction);
2846 case IrInstSrcIdMemberName:
2847 ir_print_member_name(irp, (IrInstSrcMemberName *)instruction);
23032848 break;
2304 case IrInstructionIdFence:
2305 ir_print_fence(irp, (IrInstructionFence *)instruction);
2849 case IrInstSrcIdBreakpoint:
2850 ir_print_breakpoint(irp, (IrInstSrcBreakpoint *)instruction);
23062851 break;
2307 case IrInstructionIdTruncate:
2308 ir_print_truncate(irp, (IrInstructionTruncate *)instruction);
2852 case IrInstSrcIdReturnAddress:
2853 ir_print_return_address(irp, (IrInstSrcReturnAddress *)instruction);
23092854 break;
2310 case IrInstructionIdIntCast:
2311 ir_print_int_cast(irp, (IrInstructionIntCast *)instruction);
2855 case IrInstSrcIdFrameAddress:
2856 ir_print_frame_address(irp, (IrInstSrcFrameAddress *)instruction);
23122857 break;
2313 case IrInstructionIdFloatCast:
2314 ir_print_float_cast(irp, (IrInstructionFloatCast *)instruction);
2858 case IrInstSrcIdFrameHandle:
2859 ir_print_handle(irp, (IrInstSrcFrameHandle *)instruction);
23152860 break;
2316 case IrInstructionIdErrSetCast:
2317 ir_print_err_set_cast(irp, (IrInstructionErrSetCast *)instruction);
2861 case IrInstSrcIdFrameType:
2862 ir_print_frame_type(irp, (IrInstSrcFrameType *)instruction);
23182863 break;
2319 case IrInstructionIdFromBytes:
2320 ir_print_from_bytes(irp, (IrInstructionFromBytes *)instruction);
2864 case IrInstSrcIdFrameSize:
2865 ir_print_frame_size_src(irp, (IrInstSrcFrameSize *)instruction);
23212866 break;
2322 case IrInstructionIdToBytes:
2323 ir_print_to_bytes(irp, (IrInstructionToBytes *)instruction);
2867 case IrInstSrcIdAlignOf:
2868 ir_print_align_of(irp, (IrInstSrcAlignOf *)instruction);
23242869 break;
2325 case IrInstructionIdIntToFloat:
2326 ir_print_int_to_float(irp, (IrInstructionIntToFloat *)instruction);
2870 case IrInstSrcIdOverflowOp:
2871 ir_print_overflow_op(irp, (IrInstSrcOverflowOp *)instruction);
23272872 break;
2328 case IrInstructionIdFloatToInt:
2329 ir_print_float_to_int(irp, (IrInstructionFloatToInt *)instruction);
2873 case IrInstSrcIdTestErr:
2874 ir_print_test_err_src(irp, (IrInstSrcTestErr *)instruction);
23302875 break;
2331 case IrInstructionIdBoolToInt:
2332 ir_print_bool_to_int(irp, (IrInstructionBoolToInt *)instruction);
2876 case IrInstSrcIdUnwrapErrCode:
2877 ir_print_unwrap_err_code(irp, (IrInstSrcUnwrapErrCode *)instruction);
23332878 break;
2334 case IrInstructionIdIntType:
2335 ir_print_int_type(irp, (IrInstructionIntType *)instruction);
2879 case IrInstSrcIdUnwrapErrPayload:
2880 ir_print_unwrap_err_payload(irp, (IrInstSrcUnwrapErrPayload *)instruction);
23362881 break;
2337 case IrInstructionIdVectorType:
2338 ir_print_vector_type(irp, (IrInstructionVectorType *)instruction);
2882 case IrInstSrcIdFnProto:
2883 ir_print_fn_proto(irp, (IrInstSrcFnProto *)instruction);
23392884 break;
2340 case IrInstructionIdShuffleVector:
2341 ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);
2885 case IrInstSrcIdTestComptime:
2886 ir_print_test_comptime(irp, (IrInstSrcTestComptime *)instruction);
23422887 break;
2343 case IrInstructionIdSplatSrc:
2344 ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);
2888 case IrInstSrcIdPtrCast:
2889 ir_print_ptr_cast_src(irp, (IrInstSrcPtrCast *)instruction);
23452890 break;
2346 case IrInstructionIdSplatGen:
2347 ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);
2891 case IrInstSrcIdBitCast:
2892 ir_print_bit_cast_src(irp, (IrInstSrcBitCast *)instruction);
23482893 break;
2349 case IrInstructionIdBoolNot:
2350 ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);
2894 case IrInstSrcIdPtrToInt:
2895 ir_print_ptr_to_int(irp, (IrInstSrcPtrToInt *)instruction);
23512896 break;
2352 case IrInstructionIdMemset:
2353 ir_print_memset(irp, (IrInstructionMemset *)instruction);
2897 case IrInstSrcIdIntToPtr:
2898 ir_print_int_to_ptr(irp, (IrInstSrcIntToPtr *)instruction);
23542899 break;
2355 case IrInstructionIdMemcpy:
2356 ir_print_memcpy(irp, (IrInstructionMemcpy *)instruction);
2900 case IrInstSrcIdIntToEnum:
2901 ir_print_int_to_enum(irp, (IrInstSrcIntToEnum *)instruction);
23572902 break;
2358 case IrInstructionIdSliceSrc:
2359 ir_print_slice_src(irp, (IrInstructionSliceSrc *)instruction);
2903 case IrInstSrcIdIntToErr:
2904 ir_print_int_to_err(irp, (IrInstSrcIntToErr *)instruction);
23602905 break;
2361 case IrInstructionIdSliceGen:
2362 ir_print_slice_gen(irp, (IrInstructionSliceGen *)instruction);
2906 case IrInstSrcIdErrToInt:
2907 ir_print_err_to_int(irp, (IrInstSrcErrToInt *)instruction);
23632908 break;
2364 case IrInstructionIdMemberCount:
2365 ir_print_member_count(irp, (IrInstructionMemberCount *)instruction);
2909 case IrInstSrcIdCheckSwitchProngs:
2910 ir_print_check_switch_prongs(irp, (IrInstSrcCheckSwitchProngs *)instruction);
23662911 break;
2367 case IrInstructionIdMemberType:
2368 ir_print_member_type(irp, (IrInstructionMemberType *)instruction);
2912 case IrInstSrcIdCheckStatementIsVoid:
2913 ir_print_check_statement_is_void(irp, (IrInstSrcCheckStatementIsVoid *)instruction);
23692914 break;
2370 case IrInstructionIdMemberName:
2371 ir_print_member_name(irp, (IrInstructionMemberName *)instruction);
2915 case IrInstSrcIdTypeName:
2916 ir_print_type_name(irp, (IrInstSrcTypeName *)instruction);
23722917 break;
2373 case IrInstructionIdBreakpoint:
2374 ir_print_breakpoint(irp, (IrInstructionBreakpoint *)instruction);
2918 case IrInstSrcIdTagName:
2919 ir_print_tag_name(irp, (IrInstSrcTagName *)instruction);
23752920 break;
2376 case IrInstructionIdReturnAddress:
2377 ir_print_return_address(irp, (IrInstructionReturnAddress *)instruction);
2921 case IrInstSrcIdPtrType:
2922 ir_print_ptr_type(irp, (IrInstSrcPtrType *)instruction);
23782923 break;
2379 case IrInstructionIdFrameAddress:
2380 ir_print_frame_address(irp, (IrInstructionFrameAddress *)instruction);
2924 case IrInstSrcIdDeclRef:
2925 ir_print_decl_ref(irp, (IrInstSrcDeclRef *)instruction);
23812926 break;
2382 case IrInstructionIdFrameHandle:
2383 ir_print_handle(irp, (IrInstructionFrameHandle *)instruction);
2927 case IrInstSrcIdPanic:
2928 ir_print_panic(irp, (IrInstSrcPanic *)instruction);
23842929 break;
2385 case IrInstructionIdFrameType:
2386 ir_print_frame_type(irp, (IrInstructionFrameType *)instruction);
2930 case IrInstSrcIdFieldParentPtr:
2931 ir_print_field_parent_ptr(irp, (IrInstSrcFieldParentPtr *)instruction);
23872932 break;
2388 case IrInstructionIdFrameSizeSrc:
2389 ir_print_frame_size_src(irp, (IrInstructionFrameSizeSrc *)instruction);
2933 case IrInstSrcIdByteOffsetOf:
2934 ir_print_byte_offset_of(irp, (IrInstSrcByteOffsetOf *)instruction);
23902935 break;
2391 case IrInstructionIdFrameSizeGen:
2392 ir_print_frame_size_gen(irp, (IrInstructionFrameSizeGen *)instruction);
2936 case IrInstSrcIdBitOffsetOf:
2937 ir_print_bit_offset_of(irp, (IrInstSrcBitOffsetOf *)instruction);
23932938 break;
2394 case IrInstructionIdAlignOf:
2395 ir_print_align_of(irp, (IrInstructionAlignOf *)instruction);
2939 case IrInstSrcIdTypeInfo:
2940 ir_print_type_info(irp, (IrInstSrcTypeInfo *)instruction);
23962941 break;
2397 case IrInstructionIdOverflowOp:
2398 ir_print_overflow_op(irp, (IrInstructionOverflowOp *)instruction);
2942 case IrInstSrcIdType:
2943 ir_print_type(irp, (IrInstSrcType *)instruction);
23992944 break;
2400 case IrInstructionIdTestErrSrc:
2401 ir_print_test_err_src(irp, (IrInstructionTestErrSrc *)instruction);
2945 case IrInstSrcIdHasField:
2946 ir_print_has_field(irp, (IrInstSrcHasField *)instruction);
24022947 break;
2403 case IrInstructionIdTestErrGen:
2404 ir_print_test_err_gen(irp, (IrInstructionTestErrGen *)instruction);
2948 case IrInstSrcIdTypeId:
2949 ir_print_type_id(irp, (IrInstSrcTypeId *)instruction);
24052950 break;
2406 case IrInstructionIdUnwrapErrCode:
2407 ir_print_unwrap_err_code(irp, (IrInstructionUnwrapErrCode *)instruction);
2951 case IrInstSrcIdSetEvalBranchQuota:
2952 ir_print_set_eval_branch_quota(irp, (IrInstSrcSetEvalBranchQuota *)instruction);
24082953 break;
2409 case IrInstructionIdUnwrapErrPayload:
2410 ir_print_unwrap_err_payload(irp, (IrInstructionUnwrapErrPayload *)instruction);
2954 case IrInstSrcIdAlignCast:
2955 ir_print_align_cast(irp, (IrInstSrcAlignCast *)instruction);
24112956 break;
2412 case IrInstructionIdOptionalWrap:
2413 ir_print_optional_wrap(irp, (IrInstructionOptionalWrap *)instruction);
2957 case IrInstSrcIdImplicitCast:
2958 ir_print_implicit_cast(irp, (IrInstSrcImplicitCast *)instruction);
24142959 break;
2415 case IrInstructionIdErrWrapCode:
2416 ir_print_err_wrap_code(irp, (IrInstructionErrWrapCode *)instruction);
2960 case IrInstSrcIdResolveResult:
2961 ir_print_resolve_result(irp, (IrInstSrcResolveResult *)instruction);
24172962 break;
2418 case IrInstructionIdErrWrapPayload:
2419 ir_print_err_wrap_payload(irp, (IrInstructionErrWrapPayload *)instruction);
2963 case IrInstSrcIdResetResult:
2964 ir_print_reset_result(irp, (IrInstSrcResetResult *)instruction);
24202965 break;
2421 case IrInstructionIdFnProto:
2422 ir_print_fn_proto(irp, (IrInstructionFnProto *)instruction);
2966 case IrInstSrcIdOpaqueType:
2967 ir_print_opaque_type(irp, (IrInstSrcOpaqueType *)instruction);
24232968 break;
2424 case IrInstructionIdTestComptime:
2425 ir_print_test_comptime(irp, (IrInstructionTestComptime *)instruction);
2969 case IrInstSrcIdSetAlignStack:
2970 ir_print_set_align_stack(irp, (IrInstSrcSetAlignStack *)instruction);
24262971 break;
2427 case IrInstructionIdPtrCastSrc:
2428 ir_print_ptr_cast_src(irp, (IrInstructionPtrCastSrc *)instruction);
2972 case IrInstSrcIdArgType:
2973 ir_print_arg_type(irp, (IrInstSrcArgType *)instruction);
24292974 break;
2430 case IrInstructionIdPtrCastGen:
2431 ir_print_ptr_cast_gen(irp, (IrInstructionPtrCastGen *)instruction);
2975 case IrInstSrcIdTagType:
2976 ir_print_enum_tag_type(irp, (IrInstSrcTagType *)instruction);
24322977 break;
2433 case IrInstructionIdBitCastSrc:
2434 ir_print_bit_cast_src(irp, (IrInstructionBitCastSrc *)instruction);
2978 case IrInstSrcIdExport:
2979 ir_print_export(irp, (IrInstSrcExport *)instruction);
24352980 break;
2436 case IrInstructionIdBitCastGen:
2437 ir_print_bit_cast_gen(irp, (IrInstructionBitCastGen *)instruction);
2981 case IrInstSrcIdErrorReturnTrace:
2982 ir_print_error_return_trace(irp, (IrInstSrcErrorReturnTrace *)instruction);
24382983 break;
2439 case IrInstructionIdWidenOrShorten:
2440 ir_print_widen_or_shorten(irp, (IrInstructionWidenOrShorten *)instruction);
2984 case IrInstSrcIdErrorUnion:
2985 ir_print_error_union(irp, (IrInstSrcErrorUnion *)instruction);
24412986 break;
2442 case IrInstructionIdPtrToInt:
2443 ir_print_ptr_to_int(irp, (IrInstructionPtrToInt *)instruction);
2987 case IrInstSrcIdAtomicRmw:
2988 ir_print_atomic_rmw(irp, (IrInstSrcAtomicRmw *)instruction);
24442989 break;
2445 case IrInstructionIdIntToPtr:
2446 ir_print_int_to_ptr(irp, (IrInstructionIntToPtr *)instruction);
2990 case IrInstSrcIdSaveErrRetAddr:
2991 ir_print_save_err_ret_addr(irp, (IrInstSrcSaveErrRetAddr *)instruction);
2992 break;
2993 case IrInstSrcIdAddImplicitReturnType:
2994 ir_print_add_implicit_return_type(irp, (IrInstSrcAddImplicitReturnType *)instruction);
2995 break;
2996 case IrInstSrcIdFloatOp:
2997 ir_print_float_op(irp, (IrInstSrcFloatOp *)instruction);
2998 break;
2999 case IrInstSrcIdMulAdd:
3000 ir_print_mul_add(irp, (IrInstSrcMulAdd *)instruction);
3001 break;
3002 case IrInstSrcIdAtomicLoad:
3003 ir_print_atomic_load(irp, (IrInstSrcAtomicLoad *)instruction);
3004 break;
3005 case IrInstSrcIdAtomicStore:
3006 ir_print_atomic_store(irp, (IrInstSrcAtomicStore *)instruction);
3007 break;
3008 case IrInstSrcIdEnumToInt:
3009 ir_print_enum_to_int(irp, (IrInstSrcEnumToInt *)instruction);
3010 break;
3011 case IrInstSrcIdCheckRuntimeScope:
3012 ir_print_check_runtime_scope(irp, (IrInstSrcCheckRuntimeScope *)instruction);
3013 break;
3014 case IrInstSrcIdHasDecl:
3015 ir_print_has_decl(irp, (IrInstSrcHasDecl *)instruction);
3016 break;
3017 case IrInstSrcIdUndeclaredIdent:
3018 ir_print_undeclared_ident(irp, (IrInstSrcUndeclaredIdent *)instruction);
3019 break;
3020 case IrInstSrcIdAlloca:
3021 ir_print_alloca_src(irp, (IrInstSrcAlloca *)instruction);
3022 break;
3023 case IrInstSrcIdEndExpr:
3024 ir_print_end_expr(irp, (IrInstSrcEndExpr *)instruction);
3025 break;
3026 case IrInstSrcIdUnionInitNamedField:
3027 ir_print_union_init_named_field(irp, (IrInstSrcUnionInitNamedField *)instruction);
3028 break;
3029 case IrInstSrcIdSuspendBegin:
3030 ir_print_suspend_begin(irp, (IrInstSrcSuspendBegin *)instruction);
3031 break;
3032 case IrInstSrcIdSuspendFinish:
3033 ir_print_suspend_finish(irp, (IrInstSrcSuspendFinish *)instruction);
3034 break;
3035 case IrInstSrcIdResume:
3036 ir_print_resume(irp, (IrInstSrcResume *)instruction);
3037 break;
3038 case IrInstSrcIdAwait:
3039 ir_print_await_src(irp, (IrInstSrcAwait *)instruction);
3040 break;
3041 case IrInstSrcIdSpillBegin:
3042 ir_print_spill_begin(irp, (IrInstSrcSpillBegin *)instruction);
3043 break;
3044 case IrInstSrcIdSpillEnd:
3045 ir_print_spill_end(irp, (IrInstSrcSpillEnd *)instruction);
3046 break;
3047 case IrInstSrcIdClz:
3048 ir_print_clz(irp, (IrInstSrcClz *)instruction);
3049 break;
3050 }
3051 fprintf(irp->f, "\n");
3052}
3053
3054static void ir_print_inst_gen(IrPrintGen *irp, IrInstGen *instruction, bool trailing) {
3055 ir_print_prefix_gen(irp, instruction, trailing);
3056 switch (instruction->id) {
3057 case IrInstGenIdInvalid:
3058 zig_unreachable();
3059 case IrInstGenIdReturn:
3060 ir_print_return_gen(irp, (IrInstGenReturn *)instruction);
24473061 break;
2448 case IrInstructionIdIntToEnum:
2449 ir_print_int_to_enum(irp, (IrInstructionIntToEnum *)instruction);
3062 case IrInstGenIdConst:
3063 ir_print_const(irp, (IrInstGenConst *)instruction);
24503064 break;
2451 case IrInstructionIdIntToErr:
2452 ir_print_int_to_err(irp, (IrInstructionIntToErr *)instruction);
3065 case IrInstGenIdBinOp:
3066 ir_print_bin_op(irp, (IrInstGenBinOp *)instruction);
24533067 break;
2454 case IrInstructionIdErrToInt:
2455 ir_print_err_to_int(irp, (IrInstructionErrToInt *)instruction);
3068 case IrInstGenIdDeclVar:
3069 ir_print_decl_var_gen(irp, (IrInstGenDeclVar *)instruction);
24563070 break;
2457 case IrInstructionIdCheckSwitchProngs:
2458 ir_print_check_switch_prongs(irp, (IrInstructionCheckSwitchProngs *)instruction);
3071 case IrInstGenIdCast:
3072 ir_print_cast(irp, (IrInstGenCast *)instruction);
24593073 break;
2460 case IrInstructionIdCheckStatementIsVoid:
2461 ir_print_check_statement_is_void(irp, (IrInstructionCheckStatementIsVoid *)instruction);
3074 case IrInstGenIdCall:
3075 ir_print_call_gen(irp, (IrInstGenCall *)instruction);
24623076 break;
2463 case IrInstructionIdTypeName:
2464 ir_print_type_name(irp, (IrInstructionTypeName *)instruction);
3077 case IrInstGenIdCondBr:
3078 ir_print_cond_br(irp, (IrInstGenCondBr *)instruction);
24653079 break;
2466 case IrInstructionIdTagName:
2467 ir_print_tag_name(irp, (IrInstructionTagName *)instruction);
3080 case IrInstGenIdBr:
3081 ir_print_br(irp, (IrInstGenBr *)instruction);
24683082 break;
2469 case IrInstructionIdPtrType:
2470 ir_print_ptr_type(irp, (IrInstructionPtrType *)instruction);
3083 case IrInstGenIdPhi:
3084 ir_print_phi(irp, (IrInstGenPhi *)instruction);
24713085 break;
2472 case IrInstructionIdDeclRef:
2473 ir_print_decl_ref(irp, (IrInstructionDeclRef *)instruction);
3086 case IrInstGenIdUnreachable:
3087 ir_print_unreachable(irp, (IrInstGenUnreachable *)instruction);
24743088 break;
2475 case IrInstructionIdPanic:
2476 ir_print_panic(irp, (IrInstructionPanic *)instruction);
3089 case IrInstGenIdElemPtr:
3090 ir_print_elem_ptr(irp, (IrInstGenElemPtr *)instruction);
24773091 break;
2478 case IrInstructionIdFieldParentPtr:
2479 ir_print_field_parent_ptr(irp, (IrInstructionFieldParentPtr *)instruction);
3092 case IrInstGenIdVarPtr:
3093 ir_print_var_ptr(irp, (IrInstGenVarPtr *)instruction);
24803094 break;
2481 case IrInstructionIdByteOffsetOf:
2482 ir_print_byte_offset_of(irp, (IrInstructionByteOffsetOf *)instruction);
3095 case IrInstGenIdReturnPtr:
3096 ir_print_return_ptr(irp, (IrInstGenReturnPtr *)instruction);
24833097 break;
2484 case IrInstructionIdBitOffsetOf:
2485 ir_print_bit_offset_of(irp, (IrInstructionBitOffsetOf *)instruction);
3098 case IrInstGenIdLoadPtr:
3099 ir_print_load_ptr_gen(irp, (IrInstGenLoadPtr *)instruction);
24863100 break;
2487 case IrInstructionIdTypeInfo:
2488 ir_print_type_info(irp, (IrInstructionTypeInfo *)instruction);
3101 case IrInstGenIdStorePtr:
3102 ir_print_store_ptr(irp, (IrInstGenStorePtr *)instruction);
24893103 break;
2490 case IrInstructionIdType:
2491 ir_print_type(irp, (IrInstructionType *)instruction);
3104 case IrInstGenIdStructFieldPtr:
3105 ir_print_struct_field_ptr(irp, (IrInstGenStructFieldPtr *)instruction);
24923106 break;
2493 case IrInstructionIdHasField:
2494 ir_print_has_field(irp, (IrInstructionHasField *)instruction);
3107 case IrInstGenIdUnionFieldPtr:
3108 ir_print_union_field_ptr(irp, (IrInstGenUnionFieldPtr *)instruction);
24953109 break;
2496 case IrInstructionIdTypeId:
2497 ir_print_type_id(irp, (IrInstructionTypeId *)instruction);
3110 case IrInstGenIdAsm:
3111 ir_print_asm_gen(irp, (IrInstGenAsm *)instruction);
24983112 break;
2499 case IrInstructionIdSetEvalBranchQuota:
2500 ir_print_set_eval_branch_quota(irp, (IrInstructionSetEvalBranchQuota *)instruction);
3113 case IrInstGenIdTestNonNull:
3114 ir_print_test_non_null(irp, (IrInstGenTestNonNull *)instruction);
25013115 break;
2502 case IrInstructionIdAlignCast:
2503 ir_print_align_cast(irp, (IrInstructionAlignCast *)instruction);
3116 case IrInstGenIdOptionalUnwrapPtr:
3117 ir_print_optional_unwrap_ptr(irp, (IrInstGenOptionalUnwrapPtr *)instruction);
25043118 break;
2505 case IrInstructionIdImplicitCast:
2506 ir_print_implicit_cast(irp, (IrInstructionImplicitCast *)instruction);
3119 case IrInstGenIdPopCount:
3120 ir_print_pop_count(irp, (IrInstGenPopCount *)instruction);
25073121 break;
2508 case IrInstructionIdResolveResult:
2509 ir_print_resolve_result(irp, (IrInstructionResolveResult *)instruction);
3122 case IrInstGenIdClz:
3123 ir_print_clz(irp, (IrInstGenClz *)instruction);
25103124 break;
2511 case IrInstructionIdResetResult:
2512 ir_print_reset_result(irp, (IrInstructionResetResult *)instruction);
3125 case IrInstGenIdCtz:
3126 ir_print_ctz(irp, (IrInstGenCtz *)instruction);
25133127 break;
2514 case IrInstructionIdOpaqueType:
2515 ir_print_opaque_type(irp, (IrInstructionOpaqueType *)instruction);
3128 case IrInstGenIdBswap:
3129 ir_print_bswap(irp, (IrInstGenBswap *)instruction);
25163130 break;
2517 case IrInstructionIdSetAlignStack:
2518 ir_print_set_align_stack(irp, (IrInstructionSetAlignStack *)instruction);
3131 case IrInstGenIdBitReverse:
3132 ir_print_bit_reverse(irp, (IrInstGenBitReverse *)instruction);
25193133 break;
2520 case IrInstructionIdArgType:
2521 ir_print_arg_type(irp, (IrInstructionArgType *)instruction);
3134 case IrInstGenIdSwitchBr:
3135 ir_print_switch_br(irp, (IrInstGenSwitchBr *)instruction);
25223136 break;
2523 case IrInstructionIdTagType:
2524 ir_print_enum_tag_type(irp, (IrInstructionTagType *)instruction);
3137 case IrInstGenIdUnionTag:
3138 ir_print_union_tag(irp, (IrInstGenUnionTag *)instruction);
25253139 break;
2526 case IrInstructionIdExport:
2527 ir_print_export(irp, (IrInstructionExport *)instruction);
3140 case IrInstGenIdRef:
3141 ir_print_ref_gen(irp, (IrInstGenRef *)instruction);
25283142 break;
2529 case IrInstructionIdErrorReturnTrace:
2530 ir_print_error_return_trace(irp, (IrInstructionErrorReturnTrace *)instruction);
3143 case IrInstGenIdErrName:
3144 ir_print_err_name(irp, (IrInstGenErrName *)instruction);
25313145 break;
2532 case IrInstructionIdErrorUnion:
2533 ir_print_error_union(irp, (IrInstructionErrorUnion *)instruction);
3146 case IrInstGenIdCmpxchg:
3147 ir_print_cmpxchg_gen(irp, (IrInstGenCmpxchg *)instruction);
25343148 break;
2535 case IrInstructionIdAtomicRmw:
2536 ir_print_atomic_rmw(irp, (IrInstructionAtomicRmw *)instruction);
3149 case IrInstGenIdFence:
3150 ir_print_fence(irp, (IrInstGenFence *)instruction);
25373151 break;
2538 case IrInstructionIdSaveErrRetAddr:
2539 ir_print_save_err_ret_addr(irp, (IrInstructionSaveErrRetAddr *)instruction);
3152 case IrInstGenIdTruncate:
3153 ir_print_truncate(irp, (IrInstGenTruncate *)instruction);
25403154 break;
2541 case IrInstructionIdAddImplicitReturnType:
2542 ir_print_add_implicit_return_type(irp, (IrInstructionAddImplicitReturnType *)instruction);
3155 case IrInstGenIdShuffleVector:
3156 ir_print_shuffle_vector(irp, (IrInstGenShuffleVector *)instruction);
25433157 break;
2544 case IrInstructionIdFloatOp:
2545 ir_print_float_op(irp, (IrInstructionFloatOp *)instruction);
3158 case IrInstGenIdSplat:
3159 ir_print_splat_gen(irp, (IrInstGenSplat *)instruction);
25463160 break;
2547 case IrInstructionIdMulAdd:
2548 ir_print_mul_add(irp, (IrInstructionMulAdd *)instruction);
3161 case IrInstGenIdBoolNot:
3162 ir_print_bool_not(irp, (IrInstGenBoolNot *)instruction);
25493163 break;
2550 case IrInstructionIdAtomicLoad:
2551 ir_print_atomic_load(irp, (IrInstructionAtomicLoad *)instruction);
3164 case IrInstGenIdMemset:
3165 ir_print_memset(irp, (IrInstGenMemset *)instruction);
25523166 break;
2553 case IrInstructionIdAtomicStore:
2554 ir_print_atomic_store(irp, (IrInstructionAtomicStore *)instruction);
3167 case IrInstGenIdMemcpy:
3168 ir_print_memcpy(irp, (IrInstGenMemcpy *)instruction);
25553169 break;
2556 case IrInstructionIdEnumToInt:
2557 ir_print_enum_to_int(irp, (IrInstructionEnumToInt *)instruction);
3170 case IrInstGenIdSlice:
3171 ir_print_slice_gen(irp, (IrInstGenSlice *)instruction);
25583172 break;
2559 case IrInstructionIdCheckRuntimeScope:
2560 ir_print_check_runtime_scope(irp, (IrInstructionCheckRuntimeScope *)instruction);
3173 case IrInstGenIdBreakpoint:
3174 ir_print_breakpoint(irp, (IrInstGenBreakpoint *)instruction);
25613175 break;
2562 case IrInstructionIdDeclVarGen:
2563 ir_print_decl_var_gen(irp, (IrInstructionDeclVarGen *)instruction);
3176 case IrInstGenIdReturnAddress:
3177 ir_print_return_address(irp, (IrInstGenReturnAddress *)instruction);
25643178 break;
2565 case IrInstructionIdArrayToVector:
2566 ir_print_array_to_vector(irp, (IrInstructionArrayToVector *)instruction);
3179 case IrInstGenIdFrameAddress:
3180 ir_print_frame_address(irp, (IrInstGenFrameAddress *)instruction);
25673181 break;
2568 case IrInstructionIdVectorToArray:
2569 ir_print_vector_to_array(irp, (IrInstructionVectorToArray *)instruction);
3182 case IrInstGenIdFrameHandle:
3183 ir_print_handle(irp, (IrInstGenFrameHandle *)instruction);
25703184 break;
2571 case IrInstructionIdPtrOfArrayToSlice:
2572 ir_print_ptr_of_array_to_slice(irp, (IrInstructionPtrOfArrayToSlice *)instruction);
3185 case IrInstGenIdFrameSize:
3186 ir_print_frame_size_gen(irp, (IrInstGenFrameSize *)instruction);
25733187 break;
2574 case IrInstructionIdAssertZero:
2575 ir_print_assert_zero(irp, (IrInstructionAssertZero *)instruction);
3188 case IrInstGenIdOverflowOp:
3189 ir_print_overflow_op(irp, (IrInstGenOverflowOp *)instruction);
25763190 break;
2577 case IrInstructionIdAssertNonNull:
2578 ir_print_assert_non_null(irp, (IrInstructionAssertNonNull *)instruction);
3191 case IrInstGenIdTestErr:
3192 ir_print_test_err_gen(irp, (IrInstGenTestErr *)instruction);
25793193 break;
2580 case IrInstructionIdResizeSlice:
2581 ir_print_resize_slice(irp, (IrInstructionResizeSlice *)instruction);
3194 case IrInstGenIdUnwrapErrCode:
3195 ir_print_unwrap_err_code(irp, (IrInstGenUnwrapErrCode *)instruction);
25823196 break;
2583 case IrInstructionIdHasDecl:
2584 ir_print_has_decl(irp, (IrInstructionHasDecl *)instruction);
3197 case IrInstGenIdUnwrapErrPayload:
3198 ir_print_unwrap_err_payload(irp, (IrInstGenUnwrapErrPayload *)instruction);
25853199 break;
2586 case IrInstructionIdUndeclaredIdent:
2587 ir_print_undeclared_ident(irp, (IrInstructionUndeclaredIdent *)instruction);
3200 case IrInstGenIdOptionalWrap:
3201 ir_print_optional_wrap(irp, (IrInstGenOptionalWrap *)instruction);
25883202 break;
2589 case IrInstructionIdAllocaSrc:
2590 ir_print_alloca_src(irp, (IrInstructionAllocaSrc *)instruction);
3203 case IrInstGenIdErrWrapCode:
3204 ir_print_err_wrap_code(irp, (IrInstGenErrWrapCode *)instruction);
25913205 break;
2592 case IrInstructionIdAllocaGen:
2593 ir_print_alloca_gen(irp, (IrInstructionAllocaGen *)instruction);
3206 case IrInstGenIdErrWrapPayload:
3207 ir_print_err_wrap_payload(irp, (IrInstGenErrWrapPayload *)instruction);
25943208 break;
2595 case IrInstructionIdEndExpr:
2596 ir_print_end_expr(irp, (IrInstructionEndExpr *)instruction);
3209 case IrInstGenIdPtrCast:
3210 ir_print_ptr_cast_gen(irp, (IrInstGenPtrCast *)instruction);
25973211 break;
2598 case IrInstructionIdUnionInitNamedField:
2599 ir_print_union_init_named_field(irp, (IrInstructionUnionInitNamedField *)instruction);
3212 case IrInstGenIdBitCast:
3213 ir_print_bit_cast_gen(irp, (IrInstGenBitCast *)instruction);
26003214 break;
2601 case IrInstructionIdSuspendBegin:
2602 ir_print_suspend_begin(irp, (IrInstructionSuspendBegin *)instruction);
3215 case IrInstGenIdWidenOrShorten:
3216 ir_print_widen_or_shorten(irp, (IrInstGenWidenOrShorten *)instruction);
26033217 break;
2604 case IrInstructionIdSuspendFinish:
2605 ir_print_suspend_finish(irp, (IrInstructionSuspendFinish *)instruction);
3218 case IrInstGenIdPtrToInt:
3219 ir_print_ptr_to_int(irp, (IrInstGenPtrToInt *)instruction);
26063220 break;
2607 case IrInstructionIdResume:
2608 ir_print_resume(irp, (IrInstructionResume *)instruction);
3221 case IrInstGenIdIntToPtr:
3222 ir_print_int_to_ptr(irp, (IrInstGenIntToPtr *)instruction);
26093223 break;
2610 case IrInstructionIdAwaitSrc:
2611 ir_print_await_src(irp, (IrInstructionAwaitSrc *)instruction);
3224 case IrInstGenIdIntToEnum:
3225 ir_print_int_to_enum(irp, (IrInstGenIntToEnum *)instruction);
26123226 break;
2613 case IrInstructionIdAwaitGen:
2614 ir_print_await_gen(irp, (IrInstructionAwaitGen *)instruction);
3227 case IrInstGenIdIntToErr:
3228 ir_print_int_to_err(irp, (IrInstGenIntToErr *)instruction);
26153229 break;
2616 case IrInstructionIdSpillBegin:
2617 ir_print_spill_begin(irp, (IrInstructionSpillBegin *)instruction);
3230 case IrInstGenIdErrToInt:
3231 ir_print_err_to_int(irp, (IrInstGenErrToInt *)instruction);
26183232 break;
2619 case IrInstructionIdSpillEnd:
2620 ir_print_spill_end(irp, (IrInstructionSpillEnd *)instruction);
3233 case IrInstGenIdTagName:
3234 ir_print_tag_name(irp, (IrInstGenTagName *)instruction);
26213235 break;
2622 case IrInstructionIdVectorExtractElem:
2623 ir_print_vector_extract_elem(irp, (IrInstructionVectorExtractElem *)instruction);
3236 case IrInstGenIdPanic:
3237 ir_print_panic(irp, (IrInstGenPanic *)instruction);
3238 break;
3239 case IrInstGenIdFieldParentPtr:
3240 ir_print_field_parent_ptr(irp, (IrInstGenFieldParentPtr *)instruction);
3241 break;
3242 case IrInstGenIdAlignCast:
3243 ir_print_align_cast(irp, (IrInstGenAlignCast *)instruction);
3244 break;
3245 case IrInstGenIdErrorReturnTrace:
3246 ir_print_error_return_trace(irp, (IrInstGenErrorReturnTrace *)instruction);
3247 break;
3248 case IrInstGenIdAtomicRmw:
3249 ir_print_atomic_rmw(irp, (IrInstGenAtomicRmw *)instruction);
3250 break;
3251 case IrInstGenIdSaveErrRetAddr:
3252 ir_print_save_err_ret_addr(irp, (IrInstGenSaveErrRetAddr *)instruction);
3253 break;
3254 case IrInstGenIdFloatOp:
3255 ir_print_float_op(irp, (IrInstGenFloatOp *)instruction);
3256 break;
3257 case IrInstGenIdMulAdd:
3258 ir_print_mul_add(irp, (IrInstGenMulAdd *)instruction);
3259 break;
3260 case IrInstGenIdAtomicLoad:
3261 ir_print_atomic_load(irp, (IrInstGenAtomicLoad *)instruction);
3262 break;
3263 case IrInstGenIdAtomicStore:
3264 ir_print_atomic_store(irp, (IrInstGenAtomicStore *)instruction);
3265 break;
3266 case IrInstGenIdArrayToVector:
3267 ir_print_array_to_vector(irp, (IrInstGenArrayToVector *)instruction);
3268 break;
3269 case IrInstGenIdVectorToArray:
3270 ir_print_vector_to_array(irp, (IrInstGenVectorToArray *)instruction);
3271 break;
3272 case IrInstGenIdPtrOfArrayToSlice:
3273 ir_print_ptr_of_array_to_slice(irp, (IrInstGenPtrOfArrayToSlice *)instruction);
3274 break;
3275 case IrInstGenIdAssertZero:
3276 ir_print_assert_zero(irp, (IrInstGenAssertZero *)instruction);
3277 break;
3278 case IrInstGenIdAssertNonNull:
3279 ir_print_assert_non_null(irp, (IrInstGenAssertNonNull *)instruction);
3280 break;
3281 case IrInstGenIdResizeSlice:
3282 ir_print_resize_slice(irp, (IrInstGenResizeSlice *)instruction);
3283 break;
3284 case IrInstGenIdAlloca:
3285 ir_print_alloca_gen(irp, (IrInstGenAlloca *)instruction);
3286 break;
3287 case IrInstGenIdSuspendBegin:
3288 ir_print_suspend_begin(irp, (IrInstGenSuspendBegin *)instruction);
3289 break;
3290 case IrInstGenIdSuspendFinish:
3291 ir_print_suspend_finish(irp, (IrInstGenSuspendFinish *)instruction);
3292 break;
3293 case IrInstGenIdResume:
3294 ir_print_resume(irp, (IrInstGenResume *)instruction);
3295 break;
3296 case IrInstGenIdAwait:
3297 ir_print_await_gen(irp, (IrInstGenAwait *)instruction);
3298 break;
3299 case IrInstGenIdSpillBegin:
3300 ir_print_spill_begin(irp, (IrInstGenSpillBegin *)instruction);
3301 break;
3302 case IrInstGenIdSpillEnd:
3303 ir_print_spill_end(irp, (IrInstGenSpillEnd *)instruction);
3304 break;
3305 case IrInstGenIdVectorExtractElem:
3306 ir_print_vector_extract_elem(irp, (IrInstGenVectorExtractElem *)instruction);
3307 break;
3308 case IrInstGenIdVectorStoreElem:
3309 ir_print_vector_store_elem(irp, (IrInstGenVectorStoreElem *)instruction);
3310 break;
3311 case IrInstGenIdBinaryNot:
3312 ir_print_binary_not(irp, (IrInstGenBinaryNot *)instruction);
3313 break;
3314 case IrInstGenIdNegation:
3315 ir_print_negation(irp, (IrInstGenNegation *)instruction);
3316 break;
3317 case IrInstGenIdNegationWrapping:
3318 ir_print_negation_wrapping(irp, (IrInstGenNegationWrapping *)instruction);
26243319 break;
26253320 }
26263321 fprintf(irp->f, "\n");
26273322}
26283323
2629static void irp_print_basic_block(IrPrint *irp, IrBasicBlock *current_block) {
2630 fprintf(irp->f, "%s_%" ZIG_PRI_usize ":\n", current_block->name_hint, current_block->debug_id);
3324static void irp_print_basic_block_src(IrPrintSrc *irp, IrBasicBlockSrc *current_block) {
3325 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
26313326 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
2632 IrInstruction *instruction = current_block->instruction_list.at(instr_i);
2633 if (irp->pass != IrPassSrc) {
2634 irp->printed.put(instruction, 0);
2635 irp->pending.clear();
2636 }
2637 ir_print_instruction(irp, instruction, false);
3327 IrInstSrc *instruction = current_block->instruction_list.at(instr_i);
3328 ir_print_inst_src(irp, instruction, false);
3329 }
3330}
3331
3332static void irp_print_basic_block_gen(IrPrintGen *irp, IrBasicBlockGen *current_block) {
3333 fprintf(irp->f, "%s_%" PRIu32 ":\n", current_block->name_hint, current_block->debug_id);
3334 for (size_t instr_i = 0; instr_i < current_block->instruction_list.length; instr_i += 1) {
3335 IrInstGen *instruction = current_block->instruction_list.at(instr_i);
3336 irp->printed.put(instruction, 0);
3337 irp->pending.clear();
3338 ir_print_inst_gen(irp, instruction, false);
26383339 for (size_t j = 0; j < irp->pending.length; ++j)
2639 ir_print_instruction(irp, irp->pending.at(j), true);
3340 ir_print_inst_gen(irp, irp->pending.at(j), true);
26403341 }
26413342}
26423343
2643void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass) {
2644 IrPrint ir_print = {};
2645 ir_print.pass = pass;
3344void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size) {
3345 IrPrintSrc ir_print = {};
3346 ir_print.codegen = codegen;
3347 ir_print.f = f;
3348 ir_print.indent = indent_size;
3349 ir_print.indent_size = indent_size;
3350
3351 irp_print_basic_block_src(&ir_print, bb);
3352}
3353
3354void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size) {
3355 IrPrintGen ir_print = {};
26463356 ir_print.codegen = codegen;
26473357 ir_print.f = f;
26483358 ir_print.indent = indent_size;
......@@ -2651,16 +3361,28 @@ void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int inden
26513361 ir_print.printed.init(64);
26523362 ir_print.pending = {};
26533363
2654 irp_print_basic_block(&ir_print, bb);
3364 irp_print_basic_block_gen(&ir_print, bb);
26553365
26563366 ir_print.pending.deinit();
26573367 ir_print.printed.deinit();
26583368}
26593369
2660void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass) {
2661 IrPrint ir_print = {};
2662 IrPrint *irp = &ir_print;
2663 irp->pass = pass;
3370void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size) {
3371 IrPrintSrc ir_print = {};
3372 IrPrintSrc *irp = &ir_print;
3373 irp->codegen = codegen;
3374 irp->f = f;
3375 irp->indent = indent_size;
3376 irp->indent_size = indent_size;
3377
3378 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
3379 irp_print_basic_block_src(irp, executable->basic_block_list.at(bb_i));
3380 }
3381}
3382
3383void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size) {
3384 IrPrintGen ir_print = {};
3385 IrPrintGen *irp = &ir_print;
26643386 irp->codegen = codegen;
26653387 irp->f = f;
26663388 irp->indent = indent_size;
......@@ -2670,32 +3392,27 @@ void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_si
26703392 irp->pending = {};
26713393
26723394 for (size_t bb_i = 0; bb_i < executable->basic_block_list.length; bb_i += 1) {
2673 irp_print_basic_block(irp, executable->basic_block_list.at(bb_i));
3395 irp_print_basic_block_gen(irp, executable->basic_block_list.at(bb_i));
26743396 }
26753397
26763398 irp->pending.deinit();
26773399 irp->printed.deinit();
26783400}
26793401
2680void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass) {
2681 IrPrint ir_print = {};
2682 IrPrint *irp = &ir_print;
2683 irp->pass = pass;
3402void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *instruction, int indent_size) {
3403 IrPrintSrc ir_print = {};
3404 IrPrintSrc *irp = &ir_print;
26843405 irp->codegen = codegen;
26853406 irp->f = f;
26863407 irp->indent = indent_size;
26873408 irp->indent_size = indent_size;
2688 irp->printed = {};
2689 irp->printed.init(4);
2690 irp->pending = {};
26913409
2692 ir_print_instruction(irp, instruction, false);
3410 ir_print_inst_src(irp, instruction, false);
26933411}
26943412
2695void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass) {
2696 IrPrint ir_print = {};
2697 IrPrint *irp = &ir_print;
2698 irp->pass = pass;
3413void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *instruction, int indent_size) {
3414 IrPrintGen ir_print = {};
3415 IrPrintGen *irp = &ir_print;
26993416 irp->codegen = codegen;
27003417 irp->f = f;
27013418 irp->indent = indent_size;
......@@ -2704,5 +3421,5 @@ void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_
27043421 irp->printed.init(4);
27053422 irp->pending = {};
27063423
2707 ir_print_const_value(irp, value);
3424 ir_print_inst_gen(irp, instruction, false);
27083425}
src/ir_print.hpp+8-5
......@@ -12,11 +12,14 @@
1212
1313#include <stdio.h>
1414
15void ir_print(CodeGen *codegen, FILE *f, IrExecutable *executable, int indent_size, IrPass pass);
16void ir_print_instruction(CodeGen *codegen, FILE *f, IrInstruction *instruction, int indent_size, IrPass pass);
17void ir_print_const_expr(CodeGen *codegen, FILE *f, ZigValue *value, int indent_size, IrPass pass);
18void ir_print_basic_block(CodeGen *codegen, FILE *f, IrBasicBlock *bb, int indent_size, IrPass pass);
15void ir_print_src(CodeGen *codegen, FILE *f, IrExecutableSrc *executable, int indent_size);
16void ir_print_gen(CodeGen *codegen, FILE *f, IrExecutableGen *executable, int indent_size);
17void ir_print_inst_src(CodeGen *codegen, FILE *f, IrInstSrc *inst, int indent_size);
18void ir_print_inst_gen(CodeGen *codegen, FILE *f, IrInstGen *inst, int indent_size);
19void ir_print_basic_block_src(CodeGen *codegen, FILE *f, IrBasicBlockSrc *bb, int indent_size);
20void ir_print_basic_block_gen(CodeGen *codegen, FILE *f, IrBasicBlockGen *bb, int indent_size);
1921
20const char* ir_instruction_type_str(IrInstructionId id);
22const char* ir_inst_src_type_str(IrInstSrcId id);
23const char* ir_inst_gen_type_str(IrInstGenId id);
2124
2225#endif
src/main.cpp+30-91
......@@ -93,6 +93,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
9393 " --verbose-llvm-ir enable compiler debug output for LLVM IR\n"
9494 " --verbose-cimport enable compiler debug output for C imports\n"
9595 " --verbose-cc enable compiler debug output for C compilation\n"
96 " --verbose-llvm-cpu-features enable compiler debug output for LLVM CPU features\n"
9697 " -dirafter [dir] add directory to AFTER include search path\n"
9798 " -isystem [dir] add directory to SYSTEM include search path\n"
9899 " -I[dir] add directory to include search path\n"
......@@ -100,6 +101,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
100101 " --override-lib-dir [arg] override path to Zig lib directory\n"
101102 " -ffunction-sections places each function in a separate section\n"
102103 " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n"
104 " -target-cpu [cpu] target one specific CPU by name\n"
105 " -target-feature [features] specify the set of CPU features to target\n"
103106 "\n"
104107 "Link Options:\n"
105108 " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"
......@@ -141,100 +144,18 @@ static int print_libc_usage(const char *arg0, FILE *file, int return_code) {
141144 "You can save this into a file and then edit the paths to create a cross\n"
142145 "compilation libc kit. Then you can pass `--libc [file]` for Zig to use it.\n"
143146 "\n"
144 "When compiling natively and no `--libc` argument provided, Zig automatically\n"
145 "creates zig-cache/native_libc.txt so that it does not have to detect libc\n"
146 "on every invocation. You can remove this file to have Zig re-detect the\n"
147 "native libc.\n"
147 "When compiling natively and no `--libc` argument provided, Zig will create\n"
148 "`%s/native_libc.txt`\n"
149 "so that it does not have to detect libc on every invocation. You can remove\n"
150 "this file to have Zig re-detect the native libc.\n"
148151 "\n\n"
149152 "Usage: %s libc [file]\n"
150153 "\n"
151154 "Parse a libc installation text file and validate it.\n"
152 , arg0, arg0);
155 , arg0, buf_ptr(get_global_cache_dir()), arg0);
153156 return return_code;
154157}
155158
156static bool arch_available_in_llvm(ZigLLVM_ArchType arch) {
157 LLVMTargetRef target_ref;
158 char *err_msg = nullptr;
159 char triple_string[128];
160 sprintf(triple_string, "%s-unknown-unknown-unknown", ZigLLVMGetArchTypeName(arch));
161 return !LLVMGetTargetFromTriple(triple_string, &target_ref, &err_msg);
162}
163
164static int print_target_list(FILE *f) {
165 ZigTarget native;
166 get_native_target(&native);
167
168 fprintf(f, "Architectures:\n");
169 size_t arch_count = target_arch_count();
170 for (size_t arch_i = 0; arch_i < arch_count; arch_i += 1) {
171 ZigLLVM_ArchType arch = target_arch_enum(arch_i);
172 if (!arch_available_in_llvm(arch))
173 continue;
174 const char *arch_name = target_arch_name(arch);
175 SubArchList sub_arch_list = target_subarch_list(arch);
176 size_t sub_count = target_subarch_count(sub_arch_list);
177 const char *arch_native_str = (native.arch == arch) ? " (native)" : "";
178 fprintf(f, " %s%s\n", arch_name, arch_native_str);
179 for (size_t sub_i = 0; sub_i < sub_count; sub_i += 1) {
180 ZigLLVM_SubArchType sub = target_subarch_enum(sub_arch_list, sub_i);
181 const char *sub_name = target_subarch_name(sub);
182 const char *sub_native_str = (native.arch == arch && native.sub_arch == sub) ? " (native)" : "";
183 fprintf(f, " %s%s\n", sub_name, sub_native_str);
184 }
185 }
186
187 fprintf(f, "\nOperating Systems:\n");
188 size_t os_count = target_os_count();
189 for (size_t i = 0; i < os_count; i += 1) {
190 Os os_type = target_os_enum(i);
191 const char *native_str = (native.os == os_type) ? " (native)" : "";
192 fprintf(f, " %s%s\n", target_os_name(os_type), native_str);
193 }
194
195 fprintf(f, "\nC ABIs:\n");
196 size_t abi_count = target_abi_count();
197 for (size_t i = 0; i < abi_count; i += 1) {
198 ZigLLVM_EnvironmentType abi = target_abi_enum(i);
199 const char *native_str = (native.abi == abi) ? " (native)" : "";
200 fprintf(f, " %s%s\n", target_abi_name(abi), native_str);
201 }
202
203 fprintf(f, "\nAvailable libcs:\n");
204 size_t libc_count = target_libc_count();
205 for (size_t i = 0; i < libc_count; i += 1) {
206 ZigTarget libc_target;
207 target_libc_enum(i, &libc_target);
208 bool is_native = native.arch == libc_target.arch &&
209 native.os == libc_target.os &&
210 native.abi == libc_target.abi;
211 const char *native_str = is_native ? " (native)" : "";
212 fprintf(f, " %s-%s-%s%s\n", target_arch_name(libc_target.arch),
213 target_os_name(libc_target.os), target_abi_name(libc_target.abi), native_str);
214 }
215
216 fprintf(f, "\nAvailable glibc versions:\n");
217 ZigGLibCAbi *glibc_abi;
218 Error err;
219 if ((err = glibc_load_metadata(&glibc_abi, get_zig_lib_dir(), true))) {
220 return EXIT_FAILURE;
221 }
222 for (size_t i = 0; i < glibc_abi->all_versions.length; i += 1) {
223 ZigGLibCVersion *this_ver = &glibc_abi->all_versions.at(i);
224 bool is_native = native.glibc_version != nullptr &&
225 native.glibc_version->major == this_ver->major &&
226 native.glibc_version->minor == this_ver->minor &&
227 native.glibc_version->patch == this_ver->patch;
228 const char *native_str = is_native ? " (native)" : "";
229 if (this_ver->patch == 0) {
230 fprintf(f, " %d.%d%s\n", this_ver->major, this_ver->minor, native_str);
231 } else {
232 fprintf(f, " %d.%d.%d%s\n", this_ver->major, this_ver->minor, this_ver->patch, native_str);
233 }
234 }
235 return EXIT_SUCCESS;
236}
237
238159enum Cmd {
239160 CmdNone,
240161 CmdBuild,
......@@ -478,6 +399,7 @@ int main(int argc, char **argv) {
478399 bool verbose_llvm_ir = false;
479400 bool verbose_cimport = false;
480401 bool verbose_cc = false;
402 bool verbose_llvm_cpu_features = false;
481403 bool link_eh_frame_hdr = false;
482404 ErrColor color = ErrColorAuto;
483405 CacheOpt enable_cache = CacheOptAuto;
......@@ -528,6 +450,8 @@ int main(int argc, char **argv) {
528450 WantStackCheck want_stack_check = WantStackCheckAuto;
529451 WantCSanitize want_sanitize_c = WantCSanitizeAuto;
530452 bool function_sections = false;
453 const char *cpu = nullptr;
454 const char *features = nullptr;
531455
532456 ZigList<const char *> llvm_argv = {0};
533457 llvm_argv.append("zig (LLVM option parsing)");
......@@ -692,6 +616,8 @@ int main(int argc, char **argv) {
692616 verbose_cimport = true;
693617 } else if (strcmp(arg, "--verbose-cc") == 0) {
694618 verbose_cc = true;
619 } else if (strcmp(arg, "--verbose-llvm-cpu-features") == 0) {
620 verbose_llvm_cpu_features = true;
695621 } else if (strcmp(arg, "-rdynamic") == 0) {
696622 rdynamic = true;
697623 } else if (strcmp(arg, "--each-lib-rpath") == 0) {
......@@ -936,6 +862,10 @@ int main(int argc, char **argv) {
936862 , argv[i]);
937863 return EXIT_FAILURE;
938864 }
865 } else if (strcmp(arg, "-target-cpu") == 0) {
866 cpu = argv[i];
867 } else if (strcmp(arg, "-target-feature") == 0) {
868 features = argv[i];
939869 } else {
940870 fprintf(stderr, "Invalid argument: %s\n", arg);
941871 return print_error_usage(arg0);
......@@ -1051,15 +981,22 @@ int main(int argc, char **argv) {
1051981 }
1052982 }
1053983
984 Buf zig_triple_buf = BUF_INIT;
985 target_triple_zig(&zig_triple_buf, &target);
986
987 const char *stage2_triple_arg = target.is_native ? nullptr : buf_ptr(&zig_triple_buf);
988 if ((err = stage2_cpu_features_parse(&target.cpu_features, stage2_triple_arg, cpu, features))) {
989 fprintf(stderr, "unable to initialize CPU features: %s\n", err_str(err));
990 return main_exit(root_progress_node, EXIT_FAILURE);
991 }
992
1054993 if (output_dir != nullptr && enable_cache == CacheOptOn) {
1055994 fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n");
1056995 return print_error_usage(arg0);
1057996 }
1058997
1059998 if (target_requires_pic(&target, have_libc) && want_pic == WantPICDisabled) {
1060 Buf triple_buf = BUF_INIT;
1061 target_triple_zig(&triple_buf, &target);
1062 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&triple_buf));
999 fprintf(stderr, "`--disable-pic` is incompatible with target '%s'\n", buf_ptr(&zig_triple_buf));
10631000 return print_error_usage(arg0);
10641001 }
10651002
......@@ -1226,6 +1163,7 @@ int main(int argc, char **argv) {
12261163 g->verbose_llvm_ir = verbose_llvm_ir;
12271164 g->verbose_cimport = verbose_cimport;
12281165 g->verbose_cc = verbose_cc;
1166 g->verbose_llvm_cpu_features = verbose_llvm_cpu_features;
12291167 g->output_dir = output_dir;
12301168 g->disable_gen_h = disable_gen_h;
12311169 g->bundle_compiler_rt = bundle_compiler_rt;
......@@ -1233,6 +1171,7 @@ int main(int argc, char **argv) {
12331171 g->system_linker_hack = system_linker_hack;
12341172 g->function_sections = function_sections;
12351173
1174
12361175 for (size_t i = 0; i < lib_dirs.length; i += 1) {
12371176 codegen_add_lib_dir(g, lib_dirs.at(i));
12381177 }
......@@ -1413,7 +1352,7 @@ int main(int argc, char **argv) {
14131352 return main_exit(root_progress_node, EXIT_SUCCESS);
14141353 }
14151354 case CmdTargets:
1416 return print_target_list(stdout);
1355 return stage2_cmd_targets(buf_ptr(&zig_triple_buf));
14171356 case CmdNone:
14181357 return print_full_usage(arg0, stderr, EXIT_FAILURE);
14191358 }
src/parser.cpp+1-1
......@@ -147,7 +147,7 @@ static void ast_invalid_token_error(ParseContext *pc, Token *token) {
147147}
148148
149149static AstNode *ast_create_node_no_line_info(ParseContext *pc, NodeType type) {
150 AstNode *node = allocate<AstNode>(1);
150 AstNode *node = allocate<AstNode>(1, "AstNode");
151151 node->type = type;
152152 node->owner = pc->owner;
153153 return node;
src/target.cpp+6-9
......@@ -57,9 +57,6 @@ static const ZigLLVM_SubArchType subarch_list_arm64[] = {
5757 ZigLLVM_ARMSubArch_v8_2a,
5858 ZigLLVM_ARMSubArch_v8_1a,
5959 ZigLLVM_ARMSubArch_v8,
60 ZigLLVM_ARMSubArch_v8r,
61 ZigLLVM_ARMSubArch_v8m_baseline,
62 ZigLLVM_ARMSubArch_v8m_mainline,
6360};
6461
6562static const ZigLLVM_SubArchType subarch_list_kalimba[] = {
......@@ -683,7 +680,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
683680 case ZigLLVM_ARMSubArch_v8_1a:
684681 return "v8_1a";
685682 case ZigLLVM_ARMSubArch_v8:
686 return "v8";
683 return "v8a";
687684 case ZigLLVM_ARMSubArch_v8r:
688685 return "v8r";
689686 case ZigLLVM_ARMSubArch_v8m_baseline:
......@@ -693,7 +690,7 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
693690 case ZigLLVM_ARMSubArch_v8_1m_mainline:
694691 return "v8_1m_mainline";
695692 case ZigLLVM_ARMSubArch_v7:
696 return "v7";
693 return "v7a";
697694 case ZigLLVM_ARMSubArch_v7em:
698695 return "v7em";
699696 case ZigLLVM_ARMSubArch_v7m:
......@@ -832,10 +829,10 @@ void init_all_targets(void) {
832829void target_triple_zig(Buf *triple, const ZigTarget *target) {
833830 buf_resize(triple, 0);
834831 buf_appendf(triple, "%s%s-%s-%s",
835 ZigLLVMGetArchTypeName(target->arch),
836 ZigLLVMGetSubArchTypeName(target->sub_arch),
837 ZigLLVMGetOSTypeName(get_llvm_os_type(target->os)),
838 ZigLLVMGetEnvironmentTypeName(target->abi));
832 target_arch_name(target->arch),
833 target_subarch_name(target->sub_arch),
834 target_os_name(target->os),
835 target_abi_name(target->abi));
839836}
840837
841838void target_triple_llvm(Buf *triple, const ZigTarget *target) {
src/target.hpp+1
......@@ -91,6 +91,7 @@ struct ZigTarget {
9191 Os os;
9292 ZigLLVM_EnvironmentType abi;
9393 ZigGLibCVersion *glibc_version; // null means default
94 Stage2CpuFeatures *cpu_features;
9495 bool is_native;
9596};
9697
src/userland.cpp+57-1
......@@ -2,7 +2,8 @@
22// src-self-hosted/stage1.zig
33
44#include "userland.h"
5#include "ast_render.hpp"
5#include "util.hpp"
6#include "zig_llvm.h"
67#include <stdio.h>
78#include <stdlib.h>
89#include <string.h>
......@@ -88,3 +89,58 @@ void stage2_progress_end(Stage2ProgressNode *node) {}
8889void stage2_progress_complete_one(Stage2ProgressNode *node) {}
8990void stage2_progress_disable_tty(Stage2Progress *progress) {}
9091void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){}
92
93struct Stage2CpuFeatures {
94 const char *llvm_cpu_name;
95 const char *llvm_cpu_features;
96 const char *builtin_str;
97 const char *cache_hash;
98};
99
100Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_triple,
101 const char *cpu_name, const char *cpu_features)
102{
103 if (zig_triple == nullptr) {
104 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
105 result->llvm_cpu_name = ZigLLVMGetHostCPUName();
106 result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
107 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
108 result->cache_hash = "native\n\n";
109 *out = result;
110 return ErrorNone;
111 }
112 if (cpu_name == nullptr && cpu_features == nullptr) {
113 Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
114 result->builtin_str = "arch.getBaselineCpuFeatures();\n";
115 result->cache_hash = "\n\n";
116 *out = result;
117 return ErrorNone;
118 }
119
120 const char *msg = "stage0 called stage2_cpu_features_parse with non-null cpu name or features";
121 stage2_panic(msg, strlen(msg));
122}
123
124void stage2_cpu_features_get_cache_hash(const Stage2CpuFeatures *cpu_features,
125 const char **ptr, size_t *len)
126{
127 *ptr = cpu_features->cache_hash;
128 *len = strlen(cpu_features->cache_hash);
129}
130const char *stage2_cpu_features_get_llvm_cpu(const Stage2CpuFeatures *cpu_features) {
131 return cpu_features->llvm_cpu_name;
132}
133const char *stage2_cpu_features_get_llvm_features(const Stage2CpuFeatures *cpu_features) {
134 return cpu_features->llvm_cpu_features;
135}
136void stage2_cpu_features_get_builtin_str(const Stage2CpuFeatures *cpu_features,
137 const char **ptr, size_t *len)
138{
139 *ptr = cpu_features->builtin_str;
140 *len = strlen(cpu_features->builtin_str);
141}
142
143int stage2_cmd_targets(const char *zig_triple) {
144 const char *msg = "stage0 called stage2_cmd_targets";
145 stage2_panic(msg, strlen(msg));
146}
src/userland.h+31
......@@ -78,6 +78,12 @@ enum Error {
7878 ErrorNotLazy,
7979 ErrorIsAsync,
8080 ErrorImportOutsidePkgPath,
81 ErrorUnknownCpu,
82 ErrorUnknownSubArchitecture,
83 ErrorUnknownCpuFeature,
84 ErrorInvalidCpuFeatures,
85 ErrorInvalidLlvmCpuFeaturesFormat,
86 ErrorUnknownApplicationBinaryInterface,
8187};
8288
8389// ABI warning
......@@ -174,4 +180,29 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node);
174180ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node,
175181 size_t completed_count, size_t estimated_total_items);
176182
183// ABI warning
184struct Stage2CpuFeatures;
185
186// ABI warning
187ZIG_EXTERN_C Error stage2_cpu_features_parse(struct Stage2CpuFeatures **result,
188 const char *zig_triple, const char *cpu_name, const char *cpu_features);
189
190// ABI warning
191ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_cpu(const struct Stage2CpuFeatures *cpu_features);
192
193// ABI warning
194ZIG_EXTERN_C const char *stage2_cpu_features_get_llvm_features(const struct Stage2CpuFeatures *cpu_features);
195
196// ABI warning
197ZIG_EXTERN_C void stage2_cpu_features_get_builtin_str(const struct Stage2CpuFeatures *cpu_features,
198 const char **ptr, size_t *len);
199
200// ABI warning
201ZIG_EXTERN_C void stage2_cpu_features_get_cache_hash(const struct Stage2CpuFeatures *cpu_features,
202 const char **ptr, size_t *len);
203
204// ABI warning
205ZIG_EXTERN_C int stage2_cmd_targets(const char *zig_triple);
206
207
177208#endif
src/zig_clang.cpp+9
......@@ -1625,6 +1625,10 @@ unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionD
16251625 return 0;
16261626}
16271627
1628ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self) {
1629 return bitcast(reinterpret_cast<const clang::ParmVarDecl *>(self)->getOriginalType());
1630}
1631
16281632const ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const ZigClangRecordDecl *zig_record_decl) {
16291633 const clang::RecordDecl *record_decl = reinterpret_cast<const clang::RecordDecl *>(zig_record_decl);
16301634 const clang::RecordDecl *definition = record_decl->getDefinition();
......@@ -1877,6 +1881,11 @@ bool ZigClangType_isRecordType(const ZigClangType *self) {
18771881 return casted->isRecordType();
18781882}
18791883
1884bool ZigClangType_isConstantArrayType(const ZigClangType *self) {
1885 auto casted = reinterpret_cast<const clang::Type *>(self);
1886 return casted->isConstantArrayType();
1887}
1888
18801889const char *ZigClangType_getTypeClassName(const ZigClangType *self) {
18811890 auto casted = reinterpret_cast<const clang::Type *>(self);
18821891 return casted->getTypeClassName();
src/zig_clang.h+3
......@@ -866,6 +866,8 @@ ZIG_EXTERN_C const char* ZigClangVarDecl_getSectionAttribute(const struct ZigCla
866866ZIG_EXTERN_C unsigned ZigClangVarDecl_getAlignedAttribute(const struct ZigClangVarDecl *self, const ZigClangASTContext* ctx);
867867ZIG_EXTERN_C unsigned ZigClangFunctionDecl_getAlignedAttribute(const struct ZigClangFunctionDecl *self, const ZigClangASTContext* ctx);
868868
869ZIG_EXTERN_C struct ZigClangQualType ZigClangParmVarDecl_getOriginalType(const struct ZigClangParmVarDecl *self);
870
869871ZIG_EXTERN_C bool ZigClangRecordDecl_getPackedAttribute(const struct ZigClangRecordDecl *);
870872ZIG_EXTERN_C const struct ZigClangRecordDecl *ZigClangRecordDecl_getDefinition(const struct ZigClangRecordDecl *);
871873ZIG_EXTERN_C const struct ZigClangEnumDecl *ZigClangEnumDecl_getDefinition(const struct ZigClangEnumDecl *);
......@@ -945,6 +947,7 @@ ZIG_EXTERN_C bool ZigClangType_isBooleanType(const struct ZigClangType *self);
945947ZIG_EXTERN_C bool ZigClangType_isVoidType(const struct ZigClangType *self);
946948ZIG_EXTERN_C bool ZigClangType_isArrayType(const struct ZigClangType *self);
947949ZIG_EXTERN_C bool ZigClangType_isRecordType(const struct ZigClangType *self);
950ZIG_EXTERN_C bool ZigClangType_isConstantArrayType(const ZigClangType *self);
948951ZIG_EXTERN_C const char *ZigClangType_getTypeClassName(const struct ZigClangType *self);
949952ZIG_EXTERN_C const struct ZigClangArrayType *ZigClangType_getAsArrayTypeUnsafe(const struct ZigClangType *self);
950953ZIG_EXTERN_C const ZigClangRecordType *ZigClangType_getAsRecordType(const ZigClangType *self);
src/zig_llvm.cpp+2-2
......@@ -821,7 +821,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
821821 case ZigLLVM_ARMSubArch_v8_1a:
822822 return "v8.1a";
823823 case ZigLLVM_ARMSubArch_v8:
824 return "v8";
824 return "v8a";
825825 case ZigLLVM_ARMSubArch_v8r:
826826 return "v8r";
827827 case ZigLLVM_ARMSubArch_v8m_baseline:
......@@ -831,7 +831,7 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) {
831831 case ZigLLVM_ARMSubArch_v8_1m_mainline:
832832 return "v8.1m.main";
833833 case ZigLLVM_ARMSubArch_v7:
834 return "v7";
834 return "v7a";
835835 case ZigLLVM_ARMSubArch_v7em:
836836 return "v7em";
837837 case ZigLLVM_ARMSubArch_v7m:
test/compile_errors.zig+63-23
......@@ -1,7 +1,64 @@
11const tests = @import("tests.zig");
22const builtin = @import("builtin");
3const Target = @import("std").Target;
34
45pub fn addCases(cases: *tests.CompileErrorContext) void {
6 cases.addTest("dependency loop in top-level decl with @TypeInfo",
7 \\export const foo = @typeInfo(@This());
8 , &[_][]const u8{
9 "tmp.zig:1:20: error: dependency loop detected",
10 });
11
12 cases.addTest("non-exhaustive enums",
13 \\const A = enum {
14 \\ a,
15 \\ b,
16 \\ _ = 1,
17 \\};
18 \\const B = enum(u1) {
19 \\ a,
20 \\ _,
21 \\ b,
22 \\};
23 \\const C = enum(u1) {
24 \\ a,
25 \\ b,
26 \\ _,
27 \\};
28 \\pub export fn entry() void {
29 \\ _ = A;
30 \\ _ = B;
31 \\ _ = C;
32 \\}
33 , &[_][]const u8{
34 "tmp.zig:4:5: error: non-exhaustive enum must specify size",
35 "error: value assigned to '_' field of non-exhaustive enum",
36 "error: non-exhaustive enum specifies every value",
37 "error: '_' field of non-exhaustive enum must be last",
38 });
39
40 cases.addTest("switching with non-exhaustive enums",
41 \\const E = enum(u8) {
42 \\ a,
43 \\ b,
44 \\ _,
45 \\};
46 \\pub export fn entry() void {
47 \\ var e: E = .b;
48 \\ switch (e) { // error: switch not handling the tag `b`
49 \\ .a => {},
50 \\ _ => {},
51 \\ }
52 \\ switch (e) { // error: switch on non-exhaustive enum must include `else` or `_` prong
53 \\ .a => {},
54 \\ .b => {},
55 \\ }
56 \\}
57 , &[_][]const u8{
58 "tmp.zig:8:5: error: enumeration value 'E.b' not handled in switch",
59 "tmp.zig:12:5: error: switch on non-exhaustive enum must include `else` or `_` prong",
60 });
61
562 cases.addTest("@export with empty name string",
663 \\pub export fn entry() void { }
764 \\comptime {
......@@ -139,25 +196,6 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
139196 "tmp.zig:2:13: error: pointer type '[*]align(4) u8' requires aligned address",
140197 });
141198
142 cases.add("switch on extern enum missing else prong",
143 \\const i = extern enum {
144 \\ n = 0,
145 \\ o = 2,
146 \\ p = 4,
147 \\ q = 4,
148 \\};
149 \\pub fn main() void {
150 \\ var x = @intToEnum(i, 52);
151 \\ switch (x) {
152 \\ .n,
153 \\ .o,
154 \\ .p => unreachable,
155 \\ }
156 \\}
157 , &[_][]const u8{
158 "tmp.zig:9:5: error: switch on an extern enum must have an else prong",
159 });
160
161199 cases.add("invalid float literal",
162200 \\const std = @import("std");
163201 \\
......@@ -241,9 +279,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
241279 , &[_][]const u8{
242280 "tmp.zig:3:5: error: target arch 'wasm32' does not support calling with a new stack",
243281 });
244 tc.target = tests.Target{
245 .Cross = tests.CrossTarget{
282 tc.target = Target{
283 .Cross = .{
246284 .arch = .wasm32,
285 .cpu_features = Target.Arch.wasm32.getBaselineCpuFeatures(),
247286 .os = .wasi,
248287 .abi = .none,
249288 },
......@@ -642,9 +681,10 @@ pub fn addCases(cases: *tests.CompileErrorContext) void {
642681 , &[_][]const u8{
643682 "tmp.zig:2:14: error: could not find 'foo' in the inputs or outputs",
644683 });
645 tc.target = tests.Target{
646 .Cross = tests.CrossTarget{
684 tc.target = Target{
685 .Cross = .{
647686 .arch = .x86_64,
687 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
648688 .os = .linux,
649689 .abi = .gnu,
650690 },
test/stack_traces.zig+98
......@@ -51,11 +51,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
5151 // debug
5252 \\error: TheSkyIsFalling
5353 \\source.zig:4:5: [address] in main (test)
54 \\ return error.TheSkyIsFalling;
55 \\ ^
5456 \\
5557 ,
5658 // release-safe
5759 \\error: TheSkyIsFalling
5860 \\source.zig:4:5: [address] in std.start.main (test)
61 \\ return error.TheSkyIsFalling;
62 \\ ^
5963 \\
6064 ,
6165 // release-fast
......@@ -74,13 +78,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
7478 // debug
7579 \\error: TheSkyIsFalling
7680 \\source.zig:4:5: [address] in foo (test)
81 \\ return error.TheSkyIsFalling;
82 \\ ^
7783 \\source.zig:8:5: [address] in main (test)
84 \\ try foo();
85 \\ ^
7886 \\
7987 ,
8088 // release-safe
8189 \\error: TheSkyIsFalling
8290 \\source.zig:4:5: [address] in std.start.main (test)
91 \\ return error.TheSkyIsFalling;
92 \\ ^
8393 \\source.zig:8:5: [address] in std.start.main (test)
94 \\ try foo();
95 \\ ^
8496 \\
8597 ,
8698 // release-fast
......@@ -99,17 +111,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
99111 // debug
100112 \\error: TheSkyIsFalling
101113 \\source.zig:12:5: [address] in make_error (test)
114 \\ return error.TheSkyIsFalling;
115 \\ ^
102116 \\source.zig:8:5: [address] in bar (test)
117 \\ return make_error();
118 \\ ^
103119 \\source.zig:4:5: [address] in foo (test)
120 \\ try bar();
121 \\ ^
104122 \\source.zig:16:5: [address] in main (test)
123 \\ try foo();
124 \\ ^
105125 \\
106126 ,
107127 // release-safe
108128 \\error: TheSkyIsFalling
109129 \\source.zig:12:5: [address] in std.start.main (test)
130 \\ return error.TheSkyIsFalling;
131 \\ ^
110132 \\source.zig:8:5: [address] in std.start.main (test)
133 \\ return make_error();
134 \\ ^
111135 \\source.zig:4:5: [address] in std.start.main (test)
136 \\ try bar();
137 \\ ^
112138 \\source.zig:16:5: [address] in std.start.main (test)
139 \\ try foo();
140 \\ ^
113141 \\
114142 ,
115143 // release-fast
......@@ -130,11 +158,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
130158 // debug
131159 \\error: TheSkyIsFalling
132160 \\source.zig:4:5: [address] in main (test)
161 \\ return error.TheSkyIsFalling;
162 \\ ^
133163 \\
134164 ,
135165 // release-safe
136166 \\error: TheSkyIsFalling
137167 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
168 \\ return error.TheSkyIsFalling;
169 \\ ^
138170 \\
139171 ,
140172 // release-fast
......@@ -153,13 +185,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
153185 // debug
154186 \\error: TheSkyIsFalling
155187 \\source.zig:4:5: [address] in foo (test)
188 \\ return error.TheSkyIsFalling;
189 \\ ^
156190 \\source.zig:8:5: [address] in main (test)
191 \\ try foo();
192 \\ ^
157193 \\
158194 ,
159195 // release-safe
160196 \\error: TheSkyIsFalling
161197 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
198 \\ return error.TheSkyIsFalling;
199 \\ ^
162200 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
201 \\ try foo();
202 \\ ^
163203 \\
164204 ,
165205 // release-fast
......@@ -178,17 +218,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
178218 // debug
179219 \\error: TheSkyIsFalling
180220 \\source.zig:12:5: [address] in make_error (test)
221 \\ return error.TheSkyIsFalling;
222 \\ ^
181223 \\source.zig:8:5: [address] in bar (test)
224 \\ return make_error();
225 \\ ^
182226 \\source.zig:4:5: [address] in foo (test)
227 \\ try bar();
228 \\ ^
183229 \\source.zig:16:5: [address] in main (test)
230 \\ try foo();
231 \\ ^
184232 \\
185233 ,
186234 // release-safe
187235 \\error: TheSkyIsFalling
188236 \\source.zig:12:5: [address] in std.start.posixCallMainAndExit (test)
237 \\ return error.TheSkyIsFalling;
238 \\ ^
189239 \\source.zig:8:5: [address] in std.start.posixCallMainAndExit (test)
240 \\ return make_error();
241 \\ ^
190242 \\source.zig:4:5: [address] in std.start.posixCallMainAndExit (test)
243 \\ try bar();
244 \\ ^
191245 \\source.zig:16:5: [address] in std.start.posixCallMainAndExit (test)
246 \\ try foo();
247 \\ ^
192248 \\
193249 ,
194250 // release-fast
......@@ -209,11 +265,15 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
209265 // debug
210266 \\error: TheSkyIsFalling
211267 \\source.zig:4:5: [address] in _main.0 (test.o)
268 \\ return error.TheSkyIsFalling;
269 \\ ^
212270 \\
213271 ,
214272 // release-safe
215273 \\error: TheSkyIsFalling
216274 \\source.zig:4:5: [address] in _main (test.o)
275 \\ return error.TheSkyIsFalling;
276 \\ ^
217277 \\
218278 ,
219279 // release-fast
......@@ -232,13 +292,21 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
232292 // debug
233293 \\error: TheSkyIsFalling
234294 \\source.zig:4:5: [address] in _foo (test.o)
295 \\ return error.TheSkyIsFalling;
296 \\ ^
235297 \\source.zig:8:5: [address] in _main.0 (test.o)
298 \\ try foo();
299 \\ ^
236300 \\
237301 ,
238302 // release-safe
239303 \\error: TheSkyIsFalling
240304 \\source.zig:4:5: [address] in _main (test.o)
305 \\ return error.TheSkyIsFalling;
306 \\ ^
241307 \\source.zig:8:5: [address] in _main (test.o)
308 \\ try foo();
309 \\ ^
242310 \\
243311 ,
244312 // release-fast
......@@ -257,17 +325,33 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
257325 // debug
258326 \\error: TheSkyIsFalling
259327 \\source.zig:12:5: [address] in _make_error (test.o)
328 \\ return error.TheSkyIsFalling;
329 \\ ^
260330 \\source.zig:8:5: [address] in _bar (test.o)
331 \\ return make_error();
332 \\ ^
261333 \\source.zig:4:5: [address] in _foo (test.o)
334 \\ try bar();
335 \\ ^
262336 \\source.zig:16:5: [address] in _main.0 (test.o)
337 \\ try foo();
338 \\ ^
263339 \\
264340 ,
265341 // release-safe
266342 \\error: TheSkyIsFalling
267343 \\source.zig:12:5: [address] in _main (test.o)
344 \\ return error.TheSkyIsFalling;
345 \\ ^
268346 \\source.zig:8:5: [address] in _main (test.o)
347 \\ return make_error();
348 \\ ^
269349 \\source.zig:4:5: [address] in _main (test.o)
350 \\ try bar();
351 \\ ^
270352 \\source.zig:16:5: [address] in _main (test.o)
353 \\ try foo();
354 \\ ^
271355 \\
272356 ,
273357 // release-fast
......@@ -288,6 +372,8 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
288372 // debug
289373 \\error: TheSkyIsFalling
290374 \\source.zig:4:5: [address] in main (test.obj)
375 \\ return error.TheSkyIsFalling;
376 \\ ^
291377 \\
292378 ,
293379 // release-safe
......@@ -309,7 +395,11 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
309395 // debug
310396 \\error: TheSkyIsFalling
311397 \\source.zig:4:5: [address] in foo (test.obj)
398 \\ return error.TheSkyIsFalling;
399 \\ ^
312400 \\source.zig:8:5: [address] in main (test.obj)
401 \\ try foo();
402 \\ ^
313403 \\
314404 ,
315405 // release-safe
......@@ -331,9 +421,17 @@ pub fn addCases(cases: *tests.StackTracesContext) void {
331421 // debug
332422 \\error: TheSkyIsFalling
333423 \\source.zig:12:5: [address] in make_error (test.obj)
424 \\ return error.TheSkyIsFalling;
425 \\ ^
334426 \\source.zig:8:5: [address] in bar (test.obj)
427 \\ return make_error();
428 \\ ^
335429 \\source.zig:4:5: [address] in foo (test.obj)
430 \\ try bar();
431 \\ ^
336432 \\source.zig:16:5: [address] in main (test.obj)
433 \\ try foo();
434 \\ ^
337435 \\
338436 ,
339437 // release-safe
test/stage1/behavior/bitcast.zig+8-8
......@@ -168,11 +168,11 @@ test "nested bitcast" {
168168 comptime S.foo(42);
169169}
170170
171test "bitcast passed as tuple element" {
172 const S = struct {
173 fn foo(args: var) void {
174 expect(args[0] == 1.00000e-09);
175 }
176 };
177 S.foo(.{@bitCast(f32, @as(u32, 814313563))});
178}
171//test "bitcast passed as tuple element" {
172// const S = struct {
173// fn foo(args: var) void {
174// expect(args[0] == 1.00000e-09);
175// }
176// };
177// S.foo(.{@bitCast(f32, @as(u32, 814313563))});
178//}
test/stage1/behavior/cast.zig-1
......@@ -618,7 +618,6 @@ test "peer resolution of string literals" {
618618 .b => "two",
619619 .c => "three",
620620 .d => "four",
621 else => unreachable,
622621 };
623622 expect(mem.eql(u8, cmd, "two"));
624623 }
test/stage1/behavior/enum.zig+71-9
......@@ -11,16 +11,9 @@ test "extern enum" {
1111 };
1212 fn doTheTest(y: c_int) void {
1313 var x = i.o;
14 expect(@enumToInt(x) == 2);
15 x = @intToEnum(i, 12);
16 expect(@enumToInt(x) == 12);
17 x = @intToEnum(i, y);
18 expect(@enumToInt(x) == 52);
1914 switch (x) {
20 .n,
21 .o,
22 .p => unreachable,
23 else => {},
15 .n, .p => unreachable,
16 .o => {},
2417 }
2518 }
2619 };
......@@ -28,6 +21,70 @@ test "extern enum" {
2821 comptime S.doTheTest(52);
2922}
3023
24test "non-exhaustive enum" {
25 const S = struct {
26 const E = enum(u8) {
27 a,
28 b,
29 _,
30 };
31 fn doTheTest(y: u8) void {
32 var e: E = .b;
33 expect(switch (e) {
34 .a => false,
35 .b => true,
36 _ => false,
37 });
38 e = @intToEnum(E, 12);
39 expect(switch (e) {
40 .a => false,
41 .b => false,
42 _ => true,
43 });
44
45 expect(switch (e) {
46 .a => false,
47 .b => false,
48 else => true,
49 });
50 e = .b;
51 expect(switch (e) {
52 .a => false,
53 else => true,
54 });
55
56 expect(@typeInfo(E).Enum.fields.len == 2);
57 e = @intToEnum(E, 12);
58 expect(@enumToInt(e) == 12);
59 e = @intToEnum(E, y);
60 expect(@enumToInt(e) == 52);
61 expect(@typeInfo(E).Enum.is_exhaustive == false);
62 }
63 };
64 S.doTheTest(52);
65 comptime S.doTheTest(52);
66}
67
68test "empty non-exhaustive enum" {
69 const S = struct {
70 const E = enum(u8) {
71 _,
72 };
73 fn doTheTest(y: u8) void {
74 var e = @intToEnum(E, y);
75 expect(switch (e) {
76 _ => true,
77 });
78 expect(@enumToInt(e) == y);
79
80 expect(@typeInfo(E).Enum.fields.len == 0);
81 expect(@typeInfo(E).Enum.is_exhaustive == false);
82 }
83 };
84 S.doTheTest(42);
85 comptime S.doTheTest(42);
86}
87
3188test "enum type" {
3289 const foo1 = Foo{ .One = 13 };
3390 const foo2 = Foo{
......@@ -1057,3 +1114,8 @@ test "enum with one member default to u0 tag type" {
10571114 };
10581115 comptime expect(@TagType(E0) == u0);
10591116}
1117
1118test "tagName on enum literals" {
1119 expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
1120 comptime expect(mem.eql(u8, @tagName(.FooBar), "FooBar"));
1121}
test/stage1/behavior/math.zig+8
......@@ -529,6 +529,10 @@ test "comptime_int xor" {
529529}
530530
531531test "f128" {
532 if (std.Target.current.isWindows()) {
533 // TODO https://github.com/ziglang/zig/issues/508
534 return error.SkipZigTest;
535 }
532536 test_f128();
533537 comptime test_f128();
534538}
......@@ -627,6 +631,10 @@ test "NaN comparison" {
627631 // TODO: https://github.com/ziglang/zig/issues/3338
628632 return error.SkipZigTest;
629633 }
634 if (std.Target.current.isWindows()) {
635 // TODO https://github.com/ziglang/zig/issues/508
636 return error.SkipZigTest;
637 }
630638 testNanEqNan(f16);
631639 testNanEqNan(f32);
632640 testNanEqNan(f64);
test/stage1/behavior/union.zig+9
......@@ -629,3 +629,12 @@ test "union initializer generates padding only if needed" {
629629 var v = U{ .A = 532 };
630630 expect(v.A == 532);
631631}
632
633test "runtime tag name with single field" {
634 const U = union(enum) {
635 A: i32,
636 };
637
638 var v = U{ .A = 42 };
639 expect(std.mem.eql(u8, @tagName(v), "A"));
640}
test/tests.zig+223-196
......@@ -38,236 +38,260 @@ const TestTarget = struct {
3838 disable_native: bool = false,
3939};
4040
41const test_targets = [_]TestTarget{
42 TestTarget{},
43 TestTarget{
44 .link_libc = true,
45 },
46 TestTarget{
47 .single_threaded = true,
48 },
49
50 TestTarget{
51 .target = Target{
52 .Cross = CrossTarget{
53 .os = .linux,
54 .arch = .x86_64,
55 .abi = .none,
41const test_targets = blk: {
42 // getBaselineCpuFeatures calls populateDependencies which has a O(N ^ 2) algorithm
43 // (where N is roughly 160, which technically makes it O(1), but it adds up to a
44 // lot of branches)
45 @setEvalBranchQuota(50000);
46 break :blk [_]TestTarget{
47 TestTarget{},
48 TestTarget{
49 .link_libc = true,
50 },
51 TestTarget{
52 .single_threaded = true,
53 },
54
55 TestTarget{
56 .target = Target{
57 .Cross = CrossTarget{
58 .os = .linux,
59 .arch = .x86_64,
60 .abi = .none,
61 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
62 },
5663 },
5764 },
58 },
59 TestTarget{
60 .target = Target{
61 .Cross = CrossTarget{
62 .os = .linux,
63 .arch = .x86_64,
64 .abi = .gnu,
65 TestTarget{
66 .target = Target{
67 .Cross = CrossTarget{
68 .os = .linux,
69 .arch = .x86_64,
70 .abi = .gnu,
71 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
72 },
6573 },
74 .link_libc = true,
6675 },
67 .link_libc = true,
68 },
69 TestTarget{
70 .target = Target{
71 .Cross = CrossTarget{
72 .os = .linux,
73 .arch = .x86_64,
74 .abi = .musl,
76 TestTarget{
77 .target = Target{
78 .Cross = CrossTarget{
79 .os = .linux,
80 .arch = .x86_64,
81 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
82 .abi = .musl,
83 },
7584 },
85 .link_libc = true,
7686 },
77 .link_libc = true,
78 },
79
80 TestTarget{
81 .target = Target{
82 .Cross = CrossTarget{
83 .os = .linux,
84 .arch = .i386,
85 .abi = .none,
87
88 TestTarget{
89 .target = Target{
90 .Cross = CrossTarget{
91 .os = .linux,
92 .arch = .i386,
93 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
94 .abi = .none,
95 },
8696 },
8797 },
88 },
89 TestTarget{
90 .target = Target{
91 .Cross = CrossTarget{
92 .os = .linux,
93 .arch = .i386,
94 .abi = .musl,
98 TestTarget{
99 .target = Target{
100 .Cross = CrossTarget{
101 .os = .linux,
102 .arch = .i386,
103 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
104 .abi = .musl,
105 },
95106 },
107 .link_libc = true,
96108 },
97 .link_libc = true,
98 },
99
100 TestTarget{
101 .target = Target{
102 .Cross = CrossTarget{
103 .os = .linux,
104 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
105 .abi = .none,
109
110 TestTarget{
111 .target = Target{
112 .Cross = CrossTarget{
113 .os = .linux,
114 .arch = Target.Arch{ .aarch64 = .v8a },
115 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
116 .abi = .none,
117 },
106118 },
107119 },
108 },
109 TestTarget{
110 .target = Target{
111 .Cross = CrossTarget{
112 .os = .linux,
113 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
114 .abi = .musl,
120 TestTarget{
121 .target = Target{
122 .Cross = CrossTarget{
123 .os = .linux,
124 .arch = Target.Arch{ .aarch64 = .v8a },
125 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
126 .abi = .musl,
127 },
115128 },
129 .link_libc = true,
116130 },
117 .link_libc = true,
118 },
119 TestTarget{
120 .target = Target{
121 .Cross = CrossTarget{
122 .os = .linux,
123 .arch = builtin.Arch{ .aarch64 = builtin.Arch.Arm64.v8_5a },
124 .abi = .gnu,
131 TestTarget{
132 .target = Target{
133 .Cross = CrossTarget{
134 .os = .linux,
135 .arch = Target.Arch{ .aarch64 = .v8a },
136 .cpu_features = (Target.Arch{ .aarch64 = .v8a }).getBaselineCpuFeatures(),
137 .abi = .gnu,
138 },
125139 },
140 .link_libc = true,
126141 },
127 .link_libc = true,
128 },
129
130 TestTarget{
131 .target = Target{
132 .Cross = CrossTarget{
133 .os = .linux,
134 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
135 .abi = .none,
142
143 TestTarget{
144 .target = Target{
145 .Cross = CrossTarget{
146 .os = .linux,
147 .arch = Target.Arch{ .arm = .v8a },
148 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
149 .abi = .none,
150 },
136151 },
137152 },
138 },
139 TestTarget{
140 .target = Target{
141 .Cross = CrossTarget{
142 .os = .linux,
143 .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
144 .abi = .musleabihf,
153 TestTarget{
154 .target = Target{
155 .Cross = CrossTarget{
156 .os = .linux,
157 .arch = Target.Arch{ .arm = .v8a },
158 .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
159 .abi = .musleabihf,
160 },
145161 },
162 .link_libc = true,
146163 },
147 .link_libc = true,
148 },
149 // TODO https://github.com/ziglang/zig/issues/3287
150 //TestTarget{
151 // .target = Target{
152 // .Cross = CrossTarget{
153 // .os = .linux,
154 // .arch = builtin.Arch{ .arm = builtin.Arch.Arm32.v8_5a },
155 // .abi = .gnueabihf,
156 // },
157 // },
158 // .link_libc = true,
159 //},
160
161 TestTarget{
162 .target = Target{
163 .Cross = CrossTarget{
164 .os = .linux,
165 .arch = .mipsel,
166 .abi = .none,
164 // TODO https://github.com/ziglang/zig/issues/3287
165 //TestTarget{
166 // .target = Target{
167 // .Cross = CrossTarget{
168 // .os = .linux,
169 // .arch = Target.Arch{ .arm = .v8a },
170 // .cpu_features = (Target.Arch{ .arm = .v8a }).getBaselineCpuFeatures(),
171 // .abi = .gnueabihf,
172 // },
173 // },
174 // .link_libc = true,
175 //},
176
177 TestTarget{
178 .target = Target{
179 .Cross = CrossTarget{
180 .os = .linux,
181 .arch = .mipsel,
182 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
183 .abi = .none,
184 },
167185 },
168186 },
169 },
170 TestTarget{
171 .target = Target{
172 .Cross = CrossTarget{
173 .os = .linux,
174 .arch = .mipsel,
175 .abi = .musl,
187 TestTarget{
188 .target = Target{
189 .Cross = CrossTarget{
190 .os = .linux,
191 .arch = .mipsel,
192 .cpu_features = Target.Arch.mipsel.getBaselineCpuFeatures(),
193 .abi = .musl,
194 },
176195 },
196 .link_libc = true,
177197 },
178 .link_libc = true,
179 },
180
181 TestTarget{
182 .target = Target{
183 .Cross = CrossTarget{
184 .os = .macosx,
185 .arch = .x86_64,
186 .abi = .gnu,
198
199 TestTarget{
200 .target = Target{
201 .Cross = CrossTarget{
202 .os = .macosx,
203 .arch = .x86_64,
204 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
205 .abi = .gnu,
206 },
187207 },
208 // TODO https://github.com/ziglang/zig/issues/3295
209 .disable_native = true,
188210 },
189 // TODO https://github.com/ziglang/zig/issues/3295
190 .disable_native = true,
191 },
192
193 TestTarget{
194 .target = Target{
195 .Cross = CrossTarget{
196 .os = .windows,
197 .arch = .i386,
198 .abi = .msvc,
211
212 TestTarget{
213 .target = Target{
214 .Cross = CrossTarget{
215 .os = .windows,
216 .arch = .i386,
217 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
218 .abi = .msvc,
219 },
199220 },
200221 },
201 },
202
203 TestTarget{
204 .target = Target{
205 .Cross = CrossTarget{
206 .os = .windows,
207 .arch = .x86_64,
208 .abi = .msvc,
222
223 TestTarget{
224 .target = Target{
225 .Cross = CrossTarget{
226 .os = .windows,
227 .arch = .x86_64,
228 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
229 .abi = .msvc,
230 },
209231 },
210232 },
211 },
212
213 TestTarget{
214 .target = Target{
215 .Cross = CrossTarget{
216 .os = .windows,
217 .arch = .i386,
218 .abi = .gnu,
233
234 TestTarget{
235 .target = Target{
236 .Cross = CrossTarget{
237 .os = .windows,
238 .arch = .i386,
239 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
240 .abi = .gnu,
241 },
219242 },
243 .link_libc = true,
220244 },
221 .link_libc = true,
222 },
223
224 TestTarget{
225 .target = Target{
226 .Cross = CrossTarget{
227 .os = .windows,
228 .arch = .x86_64,
229 .abi = .gnu,
245
246 TestTarget{
247 .target = Target{
248 .Cross = CrossTarget{
249 .os = .windows,
250 .arch = .x86_64,
251 .cpu_features = Target.Arch.x86_64.getBaselineCpuFeatures(),
252 .abi = .gnu,
253 },
230254 },
255 .link_libc = true,
231256 },
232 .link_libc = true,
233 },
234
235 // Do the release tests last because they take a long time
236 TestTarget{
237 .mode = .ReleaseFast,
238 },
239 TestTarget{
240 .link_libc = true,
241 .mode = .ReleaseFast,
242 },
243 TestTarget{
244 .mode = .ReleaseFast,
245 .single_threaded = true,
246 },
247
248 TestTarget{
249 .mode = .ReleaseSafe,
250 },
251 TestTarget{
252 .link_libc = true,
253 .mode = .ReleaseSafe,
254 },
255 TestTarget{
256 .mode = .ReleaseSafe,
257 .single_threaded = true,
258 },
259
260 TestTarget{
261 .mode = .ReleaseSmall,
262 },
263 TestTarget{
264 .link_libc = true,
265 .mode = .ReleaseSmall,
266 },
267 TestTarget{
268 .mode = .ReleaseSmall,
269 .single_threaded = true,
270 },
257
258 // Do the release tests last because they take a long time
259 TestTarget{
260 .mode = .ReleaseFast,
261 },
262 TestTarget{
263 .link_libc = true,
264 .mode = .ReleaseFast,
265 },
266 TestTarget{
267 .mode = .ReleaseFast,
268 .single_threaded = true,
269 },
270
271 TestTarget{
272 .mode = .ReleaseSafe,
273 },
274 TestTarget{
275 .link_libc = true,
276 .mode = .ReleaseSafe,
277 },
278 TestTarget{
279 .mode = .ReleaseSafe,
280 .single_threaded = true,
281 },
282
283 TestTarget{
284 .mode = .ReleaseSmall,
285 },
286 TestTarget{
287 .link_libc = true,
288 .mode = .ReleaseSmall,
289 },
290 TestTarget{
291 .mode = .ReleaseSmall,
292 .single_threaded = true,
293 },
294 };
271295};
272296
273297const max_stdout_size = 1 * 1024 * 1024; // 1 MB
......@@ -598,6 +622,9 @@ pub const StackTracesContext = struct {
598622 child.stderr_behavior = .Pipe;
599623 child.env_map = b.env_map;
600624
625 if (b.verbose) {
626 printInvocation(args.toSliceConst());
627 }
601628 child.spawn() catch |err| debug.panic("Unable to spawn {}: {}\n", .{ full_exe_path, @errorName(err) });
602629
603630 var stdout = Buffer.initNull(b.allocator);
test/translate_c.zig+77-13
......@@ -1,7 +1,33 @@
11const tests = @import("tests.zig");
22const builtin = @import("builtin");
3const Target = @import("std").Target;
34
45pub fn addCases(cases: *tests.TranslateCContext) void {
6 cases.add("array initializer w/ typedef",
7 \\typedef unsigned char uuid_t[16];
8 \\static const uuid_t UUID_NULL __attribute__ ((unused)) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
9 , &[_][]const u8{
10 \\pub const uuid_t = [16]u8;
11 \\pub const UUID_NULL: uuid_t = .{
12 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
13 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
14 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
15 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
16 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
17 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
18 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
19 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
20 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
21 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
22 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
23 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
24 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
25 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
26 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
27 \\ @bitCast(u8, @truncate(i8, @as(c_int, 0))),
28 \\};
29 });
30
531 cases.add("empty declaration",
632 \\;
733 , &[_][]const u8{""});
......@@ -629,6 +655,7 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
629655 \\ VAL21 = 6917529027641081853,
630656 \\ VAL22 = 0,
631657 \\ VAL23 = -1,
658 \\ _,
632659 \\};
633660 });
634661 }
......@@ -988,8 +1015,9 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
9881015 \\enum enum_ty { FOO };
9891016 , &[_][]const u8{
9901017 \\pub const FOO = @enumToInt(enum_enum_ty.FOO);
991 \\pub const enum_enum_ty = extern enum {
1018 \\pub const enum_enum_ty = extern enum(c_int) {
9921019 \\ FOO,
1020 \\ _,
9931021 \\};
9941022 \\pub extern var my_enum: enum_enum_ty;
9951023 });
......@@ -1003,7 +1031,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10031031 });
10041032
10051033 cases.addWithTarget("Calling convention", tests.Target{
1006 .Cross = .{ .os = .linux, .arch = .i386, .abi = .none },
1034 .Cross = .{
1035 .os = .linux,
1036 .arch = .i386,
1037 .abi = .none,
1038 .cpu_features = Target.Arch.i386.getBaselineCpuFeatures(),
1039 },
10071040 },
10081041 \\void __attribute__((fastcall)) foo1(float *a);
10091042 \\void __attribute__((stdcall)) foo2(float *a);
......@@ -1019,7 +1052,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10191052 });
10201053
10211054 cases.addWithTarget("Calling convention", tests.Target{
1022 .Cross = .{ .os = .linux, .arch = .{ .arm = .v8_5a }, .abi = .none },
1055 .Cross = .{
1056 .os = .linux,
1057 .arch = .{ .arm = .v8_5a },
1058 .abi = .none,
1059 .cpu_features = (Target.Arch{ .arm = .v8_5a }).getBaselineCpuFeatures(),
1060 },
10231061 },
10241062 \\void __attribute__((pcs("aapcs"))) foo1(float *a);
10251063 \\void __attribute__((pcs("aapcs-vfp"))) foo2(float *a);
......@@ -1029,7 +1067,12 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
10291067 });
10301068
10311069 cases.addWithTarget("Calling convention", tests.Target{
1032 .Cross = .{ .os = .linux, .arch = .{ .aarch64 = .v8_5a }, .abi = .none },
1070 .Cross = .{
1071 .os = .linux,
1072 .arch = .{ .aarch64 = .v8_5a },
1073 .abi = .none,
1074 .cpu_features = (Target.Arch{ .aarch64 = .v8_5a }).getBaselineCpuFeatures(),
1075 },
10331076 },
10341077 \\void __attribute__((aarch64_vector_pcs)) foo1(float *a);
10351078 , &[_][]const u8{
......@@ -1102,28 +1145,31 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
11021145 \\pub const a = @enumToInt(enum_unnamed_1.a);
11031146 \\pub const b = @enumToInt(enum_unnamed_1.b);
11041147 \\pub const c = @enumToInt(enum_unnamed_1.c);
1105 \\const enum_unnamed_1 = extern enum {
1148 \\const enum_unnamed_1 = extern enum(c_int) {
11061149 \\ a,
11071150 \\ b,
11081151 \\ c,
1152 \\ _,
11091153 \\};
11101154 \\pub const d = enum_unnamed_1;
11111155 \\pub const e = @enumToInt(enum_unnamed_2.e);
11121156 \\pub const f = @enumToInt(enum_unnamed_2.f);
11131157 \\pub const g = @enumToInt(enum_unnamed_2.g);
1114 \\const enum_unnamed_2 = extern enum {
1158 \\const enum_unnamed_2 = extern enum(c_int) {
11151159 \\ e = 0,
11161160 \\ f = 4,
11171161 \\ g = 5,
1162 \\ _,
11181163 \\};
11191164 \\pub export var h: enum_unnamed_2 = @intToEnum(enum_unnamed_2, e);
11201165 \\pub const i = @enumToInt(enum_unnamed_3.i);
11211166 \\pub const j = @enumToInt(enum_unnamed_3.j);
11221167 \\pub const k = @enumToInt(enum_unnamed_3.k);
1123 \\const enum_unnamed_3 = extern enum {
1168 \\const enum_unnamed_3 = extern enum(c_int) {
11241169 \\ i,
11251170 \\ j,
11261171 \\ k,
1172 \\ _,
11271173 \\};
11281174 \\pub const struct_Baz = extern struct {
11291175 \\ l: enum_unnamed_3,
......@@ -1132,10 +1178,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
11321178 \\pub const n = @enumToInt(enum_i.n);
11331179 \\pub const o = @enumToInt(enum_i.o);
11341180 \\pub const p = @enumToInt(enum_i.p);
1135 \\pub const enum_i = extern enum {
1181 \\pub const enum_i = extern enum(c_int) {
11361182 \\ n,
11371183 \\ o,
11381184 \\ p,
1185 \\ _,
11391186 \\};
11401187 ,
11411188 \\pub const Baz = struct_Baz;
......@@ -1563,9 +1610,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
15631610 , &[_][]const u8{
15641611 \\pub const One = @enumToInt(enum_unnamed_1.One);
15651612 \\pub const Two = @enumToInt(enum_unnamed_1.Two);
1566 \\const enum_unnamed_1 = extern enum {
1613 \\const enum_unnamed_1 = extern enum(c_int) {
15671614 \\ One,
15681615 \\ Two,
1616 \\ _,
15691617 \\};
15701618 });
15711619
......@@ -1665,10 +1713,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
16651713 \\ return ((((((((((e + f) + g) + h) + i) + j) + k) + l) + m) + o) + p);
16661714 \\}
16671715 , &[_][]const u8{
1668 \\pub const enum_Foo = extern enum {
1716 \\pub const enum_Foo = extern enum(c_int) {
16691717 \\ A,
16701718 \\ B,
16711719 \\ C,
1720 \\ _,
16721721 \\};
16731722 \\pub const SomeTypedef = c_int;
16741723 \\pub export fn and_or_non_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void) c_int {
......@@ -1710,9 +1759,10 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
17101759 \\ y: c_int,
17111760 \\};
17121761 ,
1713 \\pub const enum_Bar = extern enum {
1762 \\pub const enum_Bar = extern enum(c_int) {
17141763 \\ A,
17151764 \\ B,
1765 \\ _,
17161766 \\};
17171767 \\pub extern fn func(a: [*c]struct_Foo, b: [*c][*c]enum_Bar) void;
17181768 ,
......@@ -1973,10 +2023,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
19732023 \\ return 4;
19742024 \\}
19752025 , &[_][]const u8{
1976 \\pub const enum_SomeEnum = extern enum {
2026 \\pub const enum_SomeEnum = extern enum(c_int) {
19772027 \\ A,
19782028 \\ B,
19792029 \\ C,
2030 \\ _,
19802031 \\};
19812032 \\pub export fn if_none_bool(arg_a: c_int, arg_b: f32, arg_c: ?*c_void, arg_d: enum_SomeEnum) c_int {
19822033 \\ var a = arg_a;
......@@ -2414,10 +2465,11 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
24142465 \\pub const FooA = @enumToInt(enum_Foo.A);
24152466 \\pub const FooB = @enumToInt(enum_Foo.B);
24162467 \\pub const Foo1 = @enumToInt(enum_Foo.@"1");
2417 \\pub const enum_Foo = extern enum {
2468 \\pub const enum_Foo = extern enum(c_int) {
24182469 \\ A = 2,
24192470 \\ B = 5,
24202471 \\ @"1" = 6,
2472 \\ _,
24212473 \\};
24222474 ,
24232475 \\pub const Foo = enum_Foo;
......@@ -2579,4 +2631,16 @@ pub fn addCases(cases: *tests.TranslateCContext) void {
25792631 \\ return foo((@intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(c)))) != @intCast(c_int, @bitCast(i1, @intCast(u1, @boolToInt(b))))));
25802632 \\}
25812633 });
2634
2635 cases.add("Don't make const parameters mutable",
2636 \\int max(const int x, int y) {
2637 \\ return (x > y) ? x : y;
2638 \\}
2639 , &[_][]const u8{
2640 \\pub export fn max(x: c_int, arg_y: c_int) c_int {
2641 \\ var y = arg_y;
2642 \\ return if (x > y) x else y;
2643 \\}
2644 });
2645
25822646}