Commit e672555f4f92725ac82c1aa687932ece2c91595f | zig

author	Alex Rønne Petersen <alex@alexrp.com> 2026-07-07 10:35:08+02:00
committer	Alex Rønne Petersen <alex@alexrp.com> 2026-07-07 10:35:08+02:00
log	e672555f4f92725ac82c1aa687932ece2c91595f
tree	1820a8bb22d17a9b31c25b064600b4ed107e51b5
parent	160e1b229b6859861108270fc8783851a38517c6
parent	773a555397684e602fc2a645f221babdfb0a5042

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/36063

5 files changed, 28 insertions(+), 7 deletions(-)

lib/std/Target/loongarch.zig+1-3

...	...	@@ -168,11 +168,9 @@ pub const cpu = struct {
168	168	};
169	169	pub const generic_la64: CpuModel = .{
170	170	.name = "generic_la64",
171		.llvm_name = "generic-la64",
	171	.llvm_name = null,
172	172	.features = featureSet(&[_]Feature{
173	173	.@"64bit",
174		.lsx,
175		.ual,
176	174	}),
177	175	};
178	176	pub const la32rv1_0: CpuModel = .{

lib/std/zig/system/loongarch.zig+17-2

...	...	@@ -1,6 +1,13 @@
1	1	const builtin = @import("builtin");
2	2	const std = @import("std");
3	3
	4	const Variant = enum(u2) {
	5	la32r = 0b00,
	6	la32 = 0b01,
	7	la64 = 0b10,
	8	reserved = 0b11,
	9	};
	10
4	11	inline fn bit(input: u32, offset: u5) bool {
5	12	return (input >> offset) & 1 != 0;
6	13	}
...	...	@@ -19,10 +26,16 @@ pub fn detectNativeCpuAndFeatures(
19	26	_ = os;
20	27	_ = query;
21	28
	29	const variant: Variant = @enumFromInt(cpucfg(1) & 0b11);
	30
22	31	var cpu: std.Target.Cpu = .{
23	32	.arch = arch,
24		.model = switch (cpucfg(0) & 0xf000) {
25		else => return null,
	33	.model = switch (cpucfg(0) & 0b1111000000000000) {
	34	else => switch (variant) {
	35	.la32r, .la32 => &std.Target.loongarch.cpu.generic_la32,
	36	.la64 => &std.Target.loongarch.cpu.generic_la64,
	37	.reserved => unreachable,
	38	},
26	39	0xc000 => &std.Target.loongarch.cpu.la464,
27	40	0xd000 => &std.Target.loongarch.cpu.la664,
28	41	},
...	...	@@ -31,6 +44,8 @@ pub fn detectNativeCpuAndFeatures(
31	44
32	45	cpu.features.addFeatureSet(cpu.model.features);
33	46
	47	setFeature(&cpu, .@"32s", variant != .la32r);
	48
34	49	const cfg2 = cpucfg(2);
35	50	const cfg3 = cpucfg(3);
36	51

lib/zig.h+1-1

...	...	@@ -4636,7 +4636,7 @@ static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) z
4636	4636
4637	4637	static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) {
4638	4638	#if defined(zig_gnuc_asm)
4639		__asm__("cpucfg %[result], %[word]" : [result] "=r" (result) : [word] "r" (word));
	4639	__asm__("cpucfg %[result], %[word]" : [result] "=r" (*result) : [word] "r" (word));
4640	4640	#else
4641	4641	*result = 0;
4642	4642	#endif

stage1/zig.h+1-1

...	...	@@ -4636,7 +4636,7 @@ static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) z
4636	4636
4637	4637	static inline void zig_e_zig_loongarch_cpucfg(uint32_t word, uint32_t* result) {
4638	4638	#if defined(zig_gnuc_asm)
4639		__asm__("cpucfg %[result], %[word]" : [result] "=r" (result) : [word] "r" (word));
	4639	__asm__("cpucfg %[result], %[word]" : [result] "=r" (*result) : [word] "r" (word));
4640	4640	#else
4641	4641	*result = 0;
4642	4642	#endif

tools/update_cpu_features.zig+8