authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-10-20 09:52:48+02:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-10-20 09:52:48+02:00
loge771583d88f18548b3b012df004ea9ef5201e5cf
treef527f4b6a4159d1d25681c2268e1bd9e3da23898
parent099361c14699cc28eb3fcefd1adf3bfd509883a0
parentffe1510d292ce7cf21dab97a7d33c3627d23ebf9

Merge pull request '`std.Target`: more fixes' (#37334) from alexrp/zig:target-fixes into master

Reviewed-on: https://codeberg.org/ziglang/zig/pulls/37334

15 files changed, 1142 insertions(+), 1030 deletions(-)

lib/compiler_rt/atomics.zig+1-1
...@@ -13,7 +13,7 @@ const symbol = compiler_rt.symbol;...@@ -13,7 +13,7 @@ const symbol = compiler_rt.symbol;
13// detail to keep the export logic clean and because we need some kind of CAS to13// detail to keep the export logic clean and because we need some kind of CAS to
14// implement the spinlocks.14// implement the spinlocks.
15const supports_atomic_ops = switch (arch) {15const supports_atomic_ops = switch (arch) {
16 .msp430, .avr, .bpfel, .bpfeb => false,16 .msp430, .avr, .bpfel, .bpfeb, .lanai => false,
17 .arm, .armeb, .thumb, .thumbeb =>17 .arm, .armeb, .thumb, .thumbeb =>
18 // The ARM v6m ISA has no ldrex/strex and so it's impossible to do CAS18 // The ARM v6m ISA has no ldrex/strex and so it's impossible to do CAS
19 // operations (unless we're targeting Linux, the kernel provides a way to19 // operations (unless we're targeting Linux, the kernel provides a way to
lib/std/Target.zig+113-101
...@@ -2069,10 +2069,12 @@ pub const Cpu = struct {...@@ -2069,10 +2069,12 @@ pub const Cpu = struct {
2069 .riscv64, .riscv64be => &riscv.cpu.generic_rv64,2069 .riscv64, .riscv64be => &riscv.cpu.generic_rv64,
2070 .sparc => &sparc.cpu.v7,2070 .sparc => &sparc.cpu.v7,
2071 .sparc64 => &sparc.cpu.v9, // SPARC can only be 64-bit from v9 and up.2071 .sparc64 => &sparc.cpu.v9, // SPARC can only be 64-bit from v9 and up.
2072 .ve => &ve.cpu.ve10,
2072 .wasm32, .wasm64 => &wasm.cpu.mvp,2073 .wasm32, .wasm64 => &wasm.cpu.mvp,
2073 .x86_16 => &x86.cpu.i86,2074 .x86_16 => &x86.cpu.i86,
2074 .x86 => &x86.cpu.i386,2075 .x86 => &x86.cpu.i386,
2075 .x86_64 => &x86.cpu.x86_64,2076 .x86_64 => &x86.cpu.x86_64,
2077 .xcore => &xcore.cpu.xs1b,
2076 inline else => |a| &@field(Target, @tagName(a.family())).cpu.generic,2078 inline else => |a| &@field(Target, @tagName(a.family())).cpu.generic,
2077 };2079 };
2078 }2080 }
...@@ -2087,16 +2089,16 @@ pub const Cpu = struct {...@@ -2087,16 +2089,16 @@ pub const Cpu = struct {
2087 /// `Os.Tag.freestanding`.2089 /// `Os.Tag.freestanding`.
2088 pub fn baseline(arch: Arch, os: Os) *const Model {2090 pub fn baseline(arch: Arch, os: Os) *const Model {
2089 return switch (arch) {2091 return switch (arch) {
2090 .alpha => &alpha.cpu.ev6,2092 .alpha => &alpha.cpu.ev56,
2091 .amdgcn => &amdgcn.cpu.gfx906,2093 .amdgcn => &amdgcn.cpu.gfx906,
2092 .arm => switch (os.tag) {2094 .arm => switch (os.tag) {
2093 .@"3ds" => &arm.cpu.mpcore,2095 .@"3ds" => &arm.cpu.mpcore,
2094 .vita => &arm.cpu.cortex_a9,2096 .vita => &arm.cpu.kermit,
2095 .gba => &arm.cpu.arm7tdmi,2097 .gba => &arm.cpu.arm7tdmi,
2096 else => &arm.cpu.baseline,2098 else => &arm.cpu.baseline,
2097 },2099 },
2098 .thumb => switch (os.tag) {2100 .thumb => switch (os.tag) {
2099 .vita => &arm.cpu.cortex_a9,2101 .vita => &arm.cpu.kermit,
2100 .gba => &arm.cpu.arm7tdmi,2102 .gba => &arm.cpu.arm7tdmi,
2101 else => &arm.cpu.baseline,2103 else => &arm.cpu.baseline,
2102 },2104 },
...@@ -2114,8 +2116,7 @@ pub const Cpu = struct {...@@ -2114,8 +2116,7 @@ pub const Cpu = struct {
2114 .bpfel, .bpfeb => &bpf.cpu.v3,2116 .bpfel, .bpfeb => &bpf.cpu.v3,
2115 .csky => &csky.cpu.ck810, // gcc/clang do not have a generic csky model.2117 .csky => &csky.cpu.ck810, // gcc/clang do not have a generic csky model.
2116 .hexagon => &hexagon.cpu.hexagonv68, // gcc/clang do not have a generic hexagon model.2118 .hexagon => &hexagon.cpu.hexagonv68, // gcc/clang do not have a generic hexagon model.
2117 .hppa => &hppa.cpu.pa_7300lc,2119 .hppa => &hppa.cpu.pa_7000,
2118 .kvx => &kvx.cpu.coolidge_v2,
2119 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.2120 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
2120 .loongarch32 => &loongarch.cpu.la32v1_0,2121 .loongarch32 => &loongarch.cpu.la32v1_0,
2121 .loongarch64 => &loongarch.cpu.la64v1_0,2122 .loongarch64 => &loongarch.cpu.la64v1_0,
...@@ -2160,7 +2161,6 @@ pub const Cpu = struct {...@@ -2160,7 +2161,6 @@ pub const Cpu = struct {
2160 .ps5 => &x86.cpu.znver2,2161 .ps5 => &x86.cpu.znver2,
2161 else => generic(arch),2162 else => generic(arch),
2162 },2163 },
2163 .xcore => &xcore.cpu.xs1b_generic,
2164 .xtensa => &xtensa.cpu.esp32,2164 .xtensa => &xtensa.cpu.esp32,
2165 .wasm32, .wasm64 => &wasm.cpu.lime1,2165 .wasm32, .wasm64 => &wasm.cpu.lime1,
21662166
...@@ -2599,6 +2599,16 @@ pub const DynamicLinker = struct {...@@ -2599,6 +2599,16 @@ pub const DynamicLinker = struct {
2599 if (ptrBitWidth_cpu_abi(cpu, abi) == 64) "64" else "",2599 if (ptrBitWidth_cpu_abi(cpu, abi) == 64) "64" else "",
2600 }) else none,2600 }) else none,
26012601
2602 else => none,
2603 }
2604 else if (abi.isOpenHarmony())
2605 switch (cpu.arch) {
2606 .aarch64,
2607 .x86_64,
2608 => |arch| if (abi == .ohos) initFmt("/lib/ld-musl-{s}.so.1", .{@tagName(arch)}) else none,
2609
2610 .arm => if (abi == .ohoseabi) init("/lib/ld-musl-arm.so.1") else none,
2611
2602 else => none,2612 else => none,
2603 }2613 }
2604 else if (abi.isMusl())2614 else if (abi.isMusl())
...@@ -2750,7 +2760,6 @@ pub const DynamicLinker = struct {...@@ -2750,7 +2760,6 @@ pub const DynamicLinker = struct {
2750 },2760 },
2751 }),2761 }),
27522762
2753 .hppa,
2754 .m68k,2763 .m68k,
2755 .microblaze,2764 .microblaze,
2756 .microblazeel,2765 .microblazeel,
...@@ -2780,7 +2789,9 @@ pub const DynamicLinker = struct {...@@ -2780,7 +2789,9 @@ pub const DynamicLinker = struct {
2780 if (cpu.has(.mips, .nan2008)) "-linux-mipsn8" else "",2789 if (cpu.has(.mips, .nan2008)) "-linux-mipsn8" else "",
2781 }),2790 }),
27822791
2783 .powerpc => switch (abi) {2792 .hppa,
2793 .powerpc,
2794 => switch (abi) {
2784 .gnueabi,2795 .gnueabi,
2785 .gnueabihf,2796 .gnueabihf,
2786 => init("/lib/ld.so.1"),2797 => init("/lib/ld.so.1"),
...@@ -3058,14 +3069,17 @@ pub fn ptrBitWidth(target: *const Target) u16 {...@@ -3058,14 +3069,17 @@ pub fn ptrBitWidth(target: *const Target) u16 {
3058pub fn stackAlignment(target: *const Target) u16 {3069pub fn stackAlignment(target: *const Target) u16 {
3059 // Overrides for when the stack alignment is not equal to the pointer width.3070 // Overrides for when the stack alignment is not equal to the pointer width.
3060 switch (target.cpu.arch) {3071 switch (target.cpu.arch) {
3061 .ez80 => return 1,3072 .avr,
3073 .ez80,
3074 => return 1,
30623075
3063 .m68k => return 2,3076 .m68k => if (target.os.tag != .netbsd) return 2,
30643077
3065 .amdgcn => return 4,3078 .amdgcn => return 4,
30663079
3067 .arm,3080 .arm,
3068 .armeb,3081 .armeb,
3082 .hexagon,
3069 .hppa,3083 .hppa,
3070 .lanai,3084 .lanai,
3071 .mips,3085 .mips,
...@@ -3083,28 +3097,34 @@ pub fn stackAlignment(target: *const Target) u16 {...@@ -3083,28 +3097,34 @@ pub fn stackAlignment(target: *const Target) u16 {
3083 .hppa64,3097 .hppa64,
3084 .loongarch32,3098 .loongarch32,
3085 .loongarch64,3099 .loongarch64,
3100 .m88k,
3086 .mips64,3101 .mips64,
3087 .mips64el,3102 .mips64el,
3103 .powerpc,
3104 .powerpcle,
3105 .powerpc64,
3106 .powerpc64le,
3088 .sparc64,3107 .sparc64,
3089 .ve,3108 .ve,
3090 .wasm32,3109 .wasm32,
3091 .wasm64,3110 .wasm64,
3092 .x86_64,3111 .x86_64,
3112 .xtensa,
3113 .xtensaeb,
3093 => return 16,3114 => return 16,
30943115
3095 // Some of the following prongs should really be testing the ABI, but our current `Abi` enum
3096 // can't handle that level of nuance yet.
3097 .powerpc64,
3098 .powerpc64le,
3099 => if (target.os.tag == .linux) return 16,
3100
3101 .riscv32,3116 .riscv32,
3102 .riscv32be,3117 .riscv32be,
3103 .riscv64,3118 .riscv64,
3104 .riscv64be,3119 .riscv64be,
3105 => if (!target.cpu.has(.riscv, .e)) return 16,3120 => if (!target.cpu.has(.riscv, .e)) return 16,
31063121
3107 .x86 => if (target.os.tag != .windows and target.os.tag != .uefi) return 16,3122 .x86 => switch (target.os.tag) {
3123 .hurd,
3124 .linux,
3125 => return 16,
3126 else => {},
3127 },
31083128
3109 .kvx => return 32,3129 .kvx => return 32,
31103130
...@@ -3160,6 +3180,7 @@ pub fn cCharSignedness(target: *const Target) ?std.builtin.Signedness {...@@ -3160,6 +3180,7 @@ pub fn cCharSignedness(target: *const Target) ?std.builtin.Signedness {
3160 .powerpcle,3180 .powerpcle,
3161 .powerpc64,3181 .powerpc64,
3162 .powerpc64le,3182 .powerpc64le,
3183 .propeller,
3163 .s390x,3184 .s390x,
3164 .riscv32,3185 .riscv32,
3165 .riscv32be,3186 .riscv32be,
...@@ -3223,6 +3244,7 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {...@@ -3223,6 +3244,7 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {
3223 .freestanding,3244 .freestanding,
3224 .other,3245 .other,
3225 .ashetos,3246 .ashetos,
3247 .tios,
3226 => switch (target.cpu.arch) {3248 => switch (target.cpu.arch) {
3227 .msp430,3249 .msp430,
3228 .x86_16,3250 .x86_16,
...@@ -3245,6 +3267,13 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {...@@ -3245,6 +3267,13 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {
3245 .long, .ulong, .float => 32,3267 .long, .ulong, .float => 32,
3246 .double, .longdouble, .longlong, .ulonglong => 64,3268 .double, .longdouble, .longlong, .ulonglong => 64,
3247 },3269 },
3270 .ez80 => switch (c_type) {
3271 .char => 8,
3272 .short, .ushort => 16,
3273 .int, .uint => 24,
3274 .long, .ulong, .float, .double => 32,
3275 .longlong, .ulonglong, .longdouble => 64,
3276 },
3248 else => switch (c_type) {3277 else => switch (c_type) {
3249 .char => 8,3278 .char => 8,
3250 .short, .ushort => 16,3279 .short, .ushort => 16,
...@@ -3302,88 +3331,73 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {...@@ -3302,88 +3331,73 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {
33023331
3303 .wasi,3332 .wasi,
3304 .emscripten,3333 .emscripten,
3305 => switch (target.cpu.arch) {3334 => switch (c_type) {
3306 .mips64,3335 .char => 8,
3307 .mips64el,3336 .short, .ushort => 16,
3308 => switch (c_type) {3337 .int, .uint, .float => 32,
3309 .char => 8,3338 .long, .ulong => switch (target.os.tag) {
3310 .short, .ushort => 16,3339 .plan9 => 32, // This is certainly A Choice.
3311 .int, .uint, .float => 32,3340 else => target.ptrBitWidth(),
3312 .long, .ulong => switch (target.abi) {
3313 .gnuabin32, .muslabin32, .abin32 => 32,
3314 else => 64,
3315 },
3316 .longlong, .ulonglong, .double => 64,
3317 .longdouble => 128,
3318 },3341 },
3319 .x86_64 => switch (c_type) {3342 .longlong, .ulonglong, .double => 64,
3320 .char => 8,3343 .longdouble => switch (target.cpu.arch) {
3321 .short, .ushort => 16,3344 .x86,
3322 .int, .uint, .float => 32,3345 .x86_64,
3323 .long, .ulong => switch (target.abi) {3346 => switch (target.abi) {
3324 .gnux32, .muslx32, .x32 => 32,3347 .android, .ohos => 64,
3325 else => 64,3348 else => 80,
3326 },3349 },
3327 .longlong, .ulonglong, .double => 64,
3328 .longdouble => 80,
3329 },
3330 else => switch (c_type) {
3331 .char => 8,
3332 .short, .ushort => 16,
3333 .int, .uint, .float => 32,
3334 .long, .ulong => target.ptrBitWidth(),
3335 .longlong, .ulonglong, .double => 64,
3336 .longdouble => switch (target.cpu.arch) {
3337 .x86 => switch (target.abi) {
3338 .android => 64,
3339 else => 80,
3340 },
33413350
3342 .powerpc,3351 .powerpc,
3343 .powerpcle,3352 .powerpcle,
3344 => switch (target.abi) {3353 => switch (target.abi) {
3345 .musleabi, .musleabihf => 64,3354 .musleabi, .musleabihf => 64,
3346 else => switch (target.os.tag) {3355 else => switch (target.os.tag) {
3347 .netbsd,3356 .netbsd,
3348 .openbsd,3357 .openbsd,
3349 => 64,3358 => 64,
3350 else => 128,3359 else => 128,
3351 },
3352 },3360 },
3361 },
33533362
3354 .powerpc64,3363 .powerpc64,
3355 .powerpc64le,3364 .powerpc64le,
3356 => switch (target.abi) {3365 => switch (target.abi) {
3357 .musl => 64,3366 .musl => 64,
3358 else => switch (target.os.tag) {3367 else => switch (target.os.tag) {
3359 .freebsd,3368 .freebsd,
3360 .openbsd,3369 .openbsd,
3361 => 64,3370 => 64,
3362 else => 128,3371 else => 128,
3363 },
3364 },3372 },
3373 },
33653374
3366 .alpha,3375 .alpha => switch (target.os.tag) {
3367 .riscv32,3376 .netbsd,
3368 .riscv32be,3377 .openbsd,
3369 .riscv64,3378 => 64,
3370 .riscv64be,3379 else => 128,
3371 .aarch64,
3372 .aarch64_be,
3373 .s390x,
3374 .mips64,
3375 .mips64el,
3376 .sparc,
3377 .sparc64,
3378 .wasm32,
3379 .wasm64,
3380 .loongarch32,
3381 .loongarch64,
3382 .ve,
3383 => 128,
3384
3385 else => 64,
3386 },3380 },
3381
3382 .riscv32,
3383 .riscv32be,
3384 .riscv64,
3385 .riscv64be,
3386 .aarch64,
3387 .aarch64_be,
3388 .s390x,
3389 .mips64,
3390 .mips64el,
3391 .sparc,
3392 .sparc64,
3393 .wasm32,
3394 .wasm64,
3395 .loongarch32,
3396 .loongarch64,
3397 .ve,
3398 => 128,
3399
3400 else => 64,
3387 },3401 },
3388 },3402 },
33893403
...@@ -3481,14 +3495,6 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {...@@ -3481,14 +3495,6 @@ pub fn cTypeBitSize(target: *const Target, c_type: CType) ?u16 {
3481 .longdouble => 80,3495 .longdouble => 80,
3482 },3496 },
34833497
3484 .tios => switch (c_type) {
3485 .char => 8,
3486 .short, .ushort => 16,
3487 .int, .uint => 24,
3488 .long, .ulong, .float, .double => 32,
3489 .longlong, .ulonglong, .longdouble => 64,
3490 },
3491
3492 .opengl => null,3498 .opengl => null,
3493 };3499 };
3494}3500}
...@@ -3739,7 +3745,10 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3739,7 +3745,10 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3739 .lanai => .{ .lanai_sysv = .{} },3745 .lanai => .{ .lanai_sysv = .{} },
3740 .loongarch64 => .{ .loongarch64_lp64 = .{} },3746 .loongarch64 => .{ .loongarch64_lp64 = .{} },
3741 .loongarch32 => .{ .loongarch32_ilp32 = .{} },3747 .loongarch32 => .{ .loongarch32_ilp32 = .{} },
3742 .m68k => .{ .m68k_gnu = .{} },3748 .m68k => switch (target.os.tag) {
3749 .netbsd => .{ .m68k_sysv = .{} },
3750 else => .{ .m68k_gnu = .{} },
3751 },
3743 .m88k => .{ .m88k_sysv = .{} },3752 .m88k => .{ .m88k_sysv = .{} },
3744 .microblaze, .microblazeel => .{ .microblaze_std = .{} },3753 .microblaze, .microblazeel => .{ .microblaze_std = .{} },
3745 .msp430 => .{ .msp430_eabi = .{} },3754 .msp430 => .{ .msp430_eabi = .{} },
...@@ -3749,7 +3758,10 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention...@@ -3749,7 +3758,10 @@ pub fn cCallingConvention(target: *const Target) ?std.builtin.CallingConvention
3749 .sh, .sheb => .{ .sh_gnu = .{} },3758 .sh, .sheb => .{ .sh_gnu = .{} },
3750 .ve => .{ .ve_sysv = .{} },3759 .ve => .{ .ve_sysv = .{} },
3751 .xcore => .{ .xcore_xs1 = .{} },3760 .xcore => .{ .xcore_xs1 = .{} },
3752 .xtensa, .xtensaeb => .{ .xtensa_call0 = .{} },3761 .xtensa, .xtensaeb => switch (target.abi) {
3762 .call0 => .{ .xtensa_call0 = .{} },
3763 else => .{ .xtensa_windowed = .{} },
3764 },
3753 .amdgcn => .{ .amdgcn_device = .{} },3765 .amdgcn => .{ .amdgcn_device = .{} },
3754 .nvptx, .nvptx64 => .nvptx_device,3766 .nvptx, .nvptx64 => .nvptx_device,
3755 .spirv32, .spirv64 => .spirv_device,3767 .spirv32, .spirv64 => .spirv_device,
lib/std/Target/alpha.zig+1-1
...@@ -32,7 +32,7 @@ pub const all_features = blk: {...@@ -32,7 +32,7 @@ pub const all_features = blk: {
32 };32 };
33 result[@backingInt(Feature.fix)] = .{33 result[@backingInt(Feature.fix)] = .{
34 .llvm_name = null,34 .llvm_name = null,
35 .description = "Enable floating point move and square root extensions",35 .description = "Enable FPR-to-GPR move and square root extensions",
36 .dependencies = featureSet(&[_]Feature{}),36 .dependencies = featureSet(&[_]Feature{}),
37 };37 };
38 result[@backingInt(Feature.max)] = .{38 result[@backingInt(Feature.max)] = .{
lib/std/Target/arm.zig+37-39
...@@ -1200,7 +1200,6 @@ pub const all_features = blk: {...@@ -1200,7 +1200,6 @@ pub const all_features = blk: {
1200 .db,1200 .db,
1201 .dsp,1201 .dsp,
1202 .has_v7,1202 .has_v7,
1203 .neon,
1204 .perfmon,1203 .perfmon,
1205 }),1204 }),
1206 };1205 };
...@@ -1250,7 +1249,6 @@ pub const all_features = blk: {...@@ -1250,7 +1249,6 @@ pub const all_features = blk: {
1250 .dsp,1249 .dsp,
1251 .has_v7,1250 .has_v7,
1252 .mp,1251 .mp,
1253 .neon,
1254 .perfmon,1252 .perfmon,
1255 .trustzone,1253 .trustzone,
1256 .virtualization,1254 .virtualization,
...@@ -1262,12 +1260,12 @@ pub const all_features = blk: {...@@ -1262,12 +1260,12 @@ pub const all_features = blk: {
1262 .dependencies = featureSet(&[_]Feature{1260 .dependencies = featureSet(&[_]Feature{
1263 .aclass,1261 .aclass,
1264 .crc,1262 .crc,
1265 .crypto,
1266 .db,1263 .db,
1267 .dsp,1264 .dsp,
1268 .fp_armv8,1265 .fp_armv8,
1269 .has_v8_1a,1266 .has_v8_1a,
1270 .mp,1267 .mp,
1268 .neon,
1271 .trustzone,1269 .trustzone,
1272 .virtualization,1270 .virtualization,
1273 }),1271 }),
...@@ -1276,7 +1274,6 @@ pub const all_features = blk: {...@@ -1276,7 +1274,6 @@ pub const all_features = blk: {
1276 .llvm_name = "armv8.1-m.main",1274 .llvm_name = "armv8.1-m.main",
1277 .description = "ARMv81mMainline architecture",1275 .description = "ARMv81mMainline architecture",
1278 .dependencies = featureSet(&[_]Feature{1276 .dependencies = featureSet(&[_]Feature{
1279 .@"8msecext",
1280 .acquire_release,1277 .acquire_release,
1281 .db,1278 .db,
1282 .has_v8_1m_main,1279 .has_v8_1m_main,
...@@ -1294,12 +1291,12 @@ pub const all_features = blk: {...@@ -1294,12 +1291,12 @@ pub const all_features = blk: {
1294 .dependencies = featureSet(&[_]Feature{1291 .dependencies = featureSet(&[_]Feature{
1295 .aclass,1292 .aclass,
1296 .crc,1293 .crc,
1297 .crypto,
1298 .db,1294 .db,
1299 .dsp,1295 .dsp,
1300 .fp_armv8,1296 .fp_armv8,
1301 .has_v8_2a,1297 .has_v8_2a,
1302 .mp,1298 .mp,
1299 .neon,
1303 .ras,1300 .ras,
1304 .trustzone,1301 .trustzone,
1305 .virtualization,1302 .virtualization,
...@@ -1311,12 +1308,12 @@ pub const all_features = blk: {...@@ -1311,12 +1308,12 @@ pub const all_features = blk: {
1311 .dependencies = featureSet(&[_]Feature{1308 .dependencies = featureSet(&[_]Feature{
1312 .aclass,1309 .aclass,
1313 .crc,1310 .crc,
1314 .crypto,
1315 .db,1311 .db,
1316 .dsp,1312 .dsp,
1317 .fp_armv8,1313 .fp_armv8,
1318 .has_v8_3a,1314 .has_v8_3a,
1319 .mp,1315 .mp,
1316 .neon,
1320 .ras,1317 .ras,
1321 .trustzone,1318 .trustzone,
1322 .virtualization,1319 .virtualization,
...@@ -1328,7 +1325,6 @@ pub const all_features = blk: {...@@ -1328,7 +1325,6 @@ pub const all_features = blk: {
1328 .dependencies = featureSet(&[_]Feature{1325 .dependencies = featureSet(&[_]Feature{
1329 .aclass,1326 .aclass,
1330 .crc,1327 .crc,
1331 .crypto,
1332 .db,1328 .db,
1333 .dsp,1329 .dsp,
1334 .fp_armv8,1330 .fp_armv8,
...@@ -1345,7 +1341,6 @@ pub const all_features = blk: {...@@ -1345,7 +1341,6 @@ pub const all_features = blk: {
1345 .dependencies = featureSet(&[_]Feature{1341 .dependencies = featureSet(&[_]Feature{
1346 .aclass,1342 .aclass,
1347 .crc,1343 .crc,
1348 .crypto,
1349 .db,1344 .db,
1350 .dsp,1345 .dsp,
1351 .fp_armv8,1346 .fp_armv8,
...@@ -1362,7 +1357,6 @@ pub const all_features = blk: {...@@ -1362,7 +1357,6 @@ pub const all_features = blk: {
1362 .dependencies = featureSet(&[_]Feature{1357 .dependencies = featureSet(&[_]Feature{
1363 .aclass,1358 .aclass,
1364 .crc,1359 .crc,
1365 .crypto,
1366 .db,1360 .db,
1367 .dsp,1361 .dsp,
1368 .fp_armv8,1362 .fp_armv8,
...@@ -1379,7 +1373,6 @@ pub const all_features = blk: {...@@ -1379,7 +1373,6 @@ pub const all_features = blk: {
1379 .dependencies = featureSet(&[_]Feature{1373 .dependencies = featureSet(&[_]Feature{
1380 .aclass,1374 .aclass,
1381 .crc,1375 .crc,
1382 .crypto,
1383 .db,1376 .db,
1384 .dsp,1377 .dsp,
1385 .fp_armv8,1378 .fp_armv8,
...@@ -1396,7 +1389,6 @@ pub const all_features = blk: {...@@ -1396,7 +1389,6 @@ pub const all_features = blk: {
1396 .dependencies = featureSet(&[_]Feature{1389 .dependencies = featureSet(&[_]Feature{
1397 .aclass,1390 .aclass,
1398 .crc,1391 .crc,
1399 .crypto,
1400 .db,1392 .db,
1401 .dsp,1393 .dsp,
1402 .fp_armv8,1394 .fp_armv8,
...@@ -1413,7 +1405,6 @@ pub const all_features = blk: {...@@ -1413,7 +1405,6 @@ pub const all_features = blk: {
1413 .dependencies = featureSet(&[_]Feature{1405 .dependencies = featureSet(&[_]Feature{
1414 .aclass,1406 .aclass,
1415 .crc,1407 .crc,
1416 .crypto,
1417 .db,1408 .db,
1418 .dsp,1409 .dsp,
1419 .fp_armv8,1410 .fp_armv8,
...@@ -1430,12 +1421,12 @@ pub const all_features = blk: {...@@ -1430,12 +1421,12 @@ pub const all_features = blk: {
1430 .dependencies = featureSet(&[_]Feature{1421 .dependencies = featureSet(&[_]Feature{
1431 .aclass,1422 .aclass,
1432 .crc,1423 .crc,
1433 .crypto,
1434 .db,1424 .db,
1435 .dsp,1425 .dsp,
1436 .fp_armv8,1426 .fp_armv8,
1437 .has_v8,1427 .has_v8,
1438 .mp,1428 .mp,
1429 .neon,
1439 .trustzone,1430 .trustzone,
1440 .virtualization,1431 .virtualization,
1441 }),1432 }),
...@@ -1444,7 +1435,6 @@ pub const all_features = blk: {...@@ -1444,7 +1435,6 @@ pub const all_features = blk: {
1444 .llvm_name = "armv8-m.base",1435 .llvm_name = "armv8-m.base",
1445 .description = "ARMv8mBaseline architecture",1436 .description = "ARMv8mBaseline architecture",
1446 .dependencies = featureSet(&[_]Feature{1437 .dependencies = featureSet(&[_]Feature{
1447 .@"8msecext",
1448 .acquire_release,1438 .acquire_release,
1449 .db,1439 .db,
1450 .has_v7clrex,1440 .has_v7clrex,
...@@ -1460,7 +1450,6 @@ pub const all_features = blk: {...@@ -1460,7 +1450,6 @@ pub const all_features = blk: {
1460 .llvm_name = "armv8-m.main",1450 .llvm_name = "armv8-m.main",
1461 .description = "ARMv8mMainline architecture",1451 .description = "ARMv8mMainline architecture",
1462 .dependencies = featureSet(&[_]Feature{1452 .dependencies = featureSet(&[_]Feature{
1463 .@"8msecext",
1464 .acquire_release,1453 .acquire_release,
1465 .db,1454 .db,
1466 .has_v8m_main,1455 .has_v8m_main,
...@@ -1523,7 +1512,6 @@ pub const all_features = blk: {...@@ -1523,7 +1512,6 @@ pub const all_features = blk: {
1523 .dependencies = featureSet(&[_]Feature{1512 .dependencies = featureSet(&[_]Feature{
1524 .aclass,1513 .aclass,
1525 .crc,1514 .crc,
1526 .crypto,
1527 .db,1515 .db,
1528 .dsp,1516 .dsp,
1529 .fp_armv8,1517 .fp_armv8,
...@@ -1949,6 +1937,7 @@ pub const cpu = struct {...@@ -1949,6 +1937,7 @@ pub const cpu = struct {
1949 .llvm_name = "generic",1937 .llvm_name = "generic",
1950 .features = featureSet(&[_]Feature{1938 .features = featureSet(&[_]Feature{
1951 .v7a,1939 .v7a,
1940 .vfp3d16,
1952 }),1941 }),
1953 };1942 };
1954 pub const cortex_a12: CpuModel = .{1943 pub const cortex_a12: CpuModel = .{
...@@ -1960,7 +1949,6 @@ pub const cpu = struct {...@@ -1960,7 +1949,6 @@ pub const cpu = struct {
1960 .ret_addr_stack,1949 .ret_addr_stack,
1961 .trustzone,1950 .trustzone,
1962 .v7a,1951 .v7a,
1963 .vfp4,
1964 .virtualization,1952 .virtualization,
1965 .vmlx_forwarding,1953 .vmlx_forwarding,
1966 }),1954 }),
...@@ -1976,7 +1964,6 @@ pub const cpu = struct {...@@ -1976,7 +1964,6 @@ pub const cpu = struct {
1976 .splat_vfp_neon,1964 .splat_vfp_neon,
1977 .trustzone,1965 .trustzone,
1978 .v7a,1966 .v7a,
1979 .vfp4,
1980 .virtualization,1967 .virtualization,
1981 .vldn_align,1968 .vldn_align,
1982 }),1969 }),
...@@ -1990,7 +1977,6 @@ pub const cpu = struct {...@@ -1990,7 +1977,6 @@ pub const cpu = struct {
1990 .ret_addr_stack,1977 .ret_addr_stack,
1991 .trustzone,1978 .trustzone,
1992 .v7a,1979 .v7a,
1993 .vfp4,
1994 .virtualization,1980 .virtualization,
1995 .vmlx_forwarding,1981 .vmlx_forwarding,
1996 }),1982 }),
...@@ -2020,7 +2006,6 @@ pub const cpu = struct {...@@ -2020,7 +2006,6 @@ pub const cpu = struct {
2020 .slowfpvmlx,2006 .slowfpvmlx,
2021 .trustzone,2007 .trustzone,
2022 .v7a,2008 .v7a,
2023 .vfp4,
2024 .vmlx_forwarding,2009 .vmlx_forwarding,
2025 }),2010 }),
2026 };2011 };
...@@ -2072,7 +2057,6 @@ pub const cpu = struct {...@@ -2072,7 +2057,6 @@ pub const cpu = struct {
2072 .slowfpvmlx,2057 .slowfpvmlx,
2073 .trustzone,2058 .trustzone,
2074 .v7a,2059 .v7a,
2075 .vfp4,
2076 .virtualization,2060 .virtualization,
2077 .vmlx_forwarding,2061 .vmlx_forwarding,
2078 .vmlx_hazards,2062 .vmlx_hazards,
...@@ -2186,7 +2170,6 @@ pub const cpu = struct {...@@ -2186,7 +2170,6 @@ pub const cpu = struct {
2186 .features = featureSet(&[_]Feature{2170 .features = featureSet(&[_]Feature{
2187 .avoid_partial_cpsr,2171 .avoid_partial_cpsr,
2188 .expand_fp_mlx,2172 .expand_fp_mlx,
2189 .fp16,
2190 .mp,2173 .mp,
2191 .muxed_units,2174 .muxed_units,
2192 .neon_fpmovs,2175 .neon_fpmovs,
...@@ -2285,12 +2268,10 @@ pub const cpu = struct {...@@ -2285,12 +2268,10 @@ pub const cpu = struct {
2285 .name = "cortex_m52",2268 .name = "cortex_m52",
2286 .llvm_name = "cortex-m52",2269 .llvm_name = "cortex-m52",
2287 .features = featureSet(&[_]Feature{2270 .features = featureSet(&[_]Feature{
2288 .fp_armv8d16,2271 .dsp,
2289 .loop_align,2272 .loop_align,
2290 .mve1beat,2273 .mve1beat,
2291 .mve_fp,
2292 .no_branch_predictor,2274 .no_branch_predictor,
2293 .pacbti,
2294 .slowfpvmlx,2275 .slowfpvmlx,
2295 .use_misched,2276 .use_misched,
2296 .v8_1m_main,2277 .v8_1m_main,
...@@ -2324,6 +2305,7 @@ pub const cpu = struct {...@@ -2324,6 +2305,7 @@ pub const cpu = struct {
2324 .name = "cortex_m85",2305 .name = "cortex_m85",
2325 .llvm_name = "cortex-m85",2306 .llvm_name = "cortex-m85",
2326 .features = featureSet(&[_]Feature{2307 .features = featureSet(&[_]Feature{
2308 .@"8msecext",
2327 .branch_align_64,2309 .branch_align_64,
2328 .dsp,2310 .dsp,
2329 .m85,2311 .m85,
...@@ -2364,16 +2346,13 @@ pub const cpu = struct {...@@ -2364,16 +2346,13 @@ pub const cpu = struct {
2364 .slowfpvfmx,2346 .slowfpvfmx,
2365 .slowfpvmlx,2347 .slowfpvmlx,
2366 .v7r,2348 .v7r,
2367 .vfp3d16,
2368 }),2349 }),
2369 };2350 };
2370 pub const cortex_r52: CpuModel = .{2351 pub const cortex_r52: CpuModel = .{
2371 .name = "cortex_r52",2352 .name = "cortex_r52",
2372 .llvm_name = "cortex-r52",2353 .llvm_name = "cortex-r52",
2373 .features = featureSet(&[_]Feature{2354 .features = featureSet(&[_]Feature{
2374 .fp_armv8,
2375 .fpao,2355 .fpao,
2376 .neon,
2377 .use_misched,2356 .use_misched,
2378 .v8r,2357 .v8r,
2379 }),2358 }),
...@@ -2382,9 +2361,7 @@ pub const cpu = struct {...@@ -2382,9 +2361,7 @@ pub const cpu = struct {
2382 .name = "cortex_r52plus",2361 .name = "cortex_r52plus",
2383 .llvm_name = "cortex-r52plus",2362 .llvm_name = "cortex-r52plus",
2384 .features = featureSet(&[_]Feature{2363 .features = featureSet(&[_]Feature{
2385 .fp_armv8,
2386 .fpao,2364 .fpao,
2387 .neon,
2388 .use_misched,2365 .use_misched,
2389 .v8r,2366 .v8r,
2390 }),2367 }),
...@@ -2394,7 +2371,6 @@ pub const cpu = struct {...@@ -2394,7 +2371,6 @@ pub const cpu = struct {
2394 .llvm_name = "cortex-r7",2371 .llvm_name = "cortex-r7",
2395 .features = featureSet(&[_]Feature{2372 .features = featureSet(&[_]Feature{
2396 .avoid_partial_cpsr,2373 .avoid_partial_cpsr,
2397 .fp16,
2398 .hwdiv_arm,2374 .hwdiv_arm,
2399 .mp,2375 .mp,
2400 .ret_addr_stack,2376 .ret_addr_stack,
...@@ -2402,7 +2378,6 @@ pub const cpu = struct {...@@ -2402,7 +2378,6 @@ pub const cpu = struct {
2402 .slowfpvfmx,2378 .slowfpvfmx,
2403 .slowfpvmlx,2379 .slowfpvmlx,
2404 .v7r,2380 .v7r,
2405 .vfp3d16,
2406 }),2381 }),
2407 };2382 };
2408 pub const cortex_r8: CpuModel = .{2383 pub const cortex_r8: CpuModel = .{
...@@ -2410,7 +2385,6 @@ pub const cpu = struct {...@@ -2410,7 +2385,6 @@ pub const cpu = struct {
2410 .llvm_name = "cortex-r8",2385 .llvm_name = "cortex-r8",
2411 .features = featureSet(&[_]Feature{2386 .features = featureSet(&[_]Feature{
2412 .avoid_partial_cpsr,2387 .avoid_partial_cpsr,
2413 .fp16,
2414 .hwdiv_arm,2388 .hwdiv_arm,
2415 .mp,2389 .mp,
2416 .ret_addr_stack,2390 .ret_addr_stack,
...@@ -2418,7 +2392,6 @@ pub const cpu = struct {...@@ -2418,7 +2392,6 @@ pub const cpu = struct {
2418 .slowfpvfmx,2392 .slowfpvfmx,
2419 .slowfpvmlx,2393 .slowfpvmlx,
2420 .v7r,2394 .v7r,
2421 .vfp3d16,
2422 }),2395 }),
2423 };2396 };
2424 pub const cortex_x1: CpuModel = .{2397 pub const cortex_x1: CpuModel = .{
...@@ -2445,6 +2418,7 @@ pub const cpu = struct {...@@ -2445,6 +2418,7 @@ pub const cpu = struct {
2445 .features = featureSet(&[_]Feature{2418 .features = featureSet(&[_]Feature{
2446 .avoid_movs_shop,2419 .avoid_movs_shop,
2447 .avoid_partial_cpsr,2420 .avoid_partial_cpsr,
2421 .crypto,
2448 .disable_postra_scheduler,2422 .disable_postra_scheduler,
2449 .neonfp,2423 .neonfp,
2450 .ret_addr_stack,2424 .ret_addr_stack,
...@@ -2466,6 +2440,7 @@ pub const cpu = struct {...@@ -2466,6 +2440,7 @@ pub const cpu = struct {
2466 .name = "exynos_m1",2440 .name = "exynos_m1",
2467 .llvm_name = null,2441 .llvm_name = null,
2468 .features = featureSet(&[_]Feature{2442 .features = featureSet(&[_]Feature{
2443 .crypto,
2469 .expand_fp_mlx,2444 .expand_fp_mlx,
2470 .fuse_aes,2445 .fuse_aes,
2471 .fuse_literals,2446 .fuse_literals,
...@@ -2486,6 +2461,7 @@ pub const cpu = struct {...@@ -2486,6 +2461,7 @@ pub const cpu = struct {
2486 .name = "exynos_m2",2461 .name = "exynos_m2",
2487 .llvm_name = null,2462 .llvm_name = null,
2488 .features = featureSet(&[_]Feature{2463 .features = featureSet(&[_]Feature{
2464 .crypto,
2489 .expand_fp_mlx,2465 .expand_fp_mlx,
2490 .fuse_aes,2466 .fuse_aes,
2491 .fuse_literals,2467 .fuse_literals,
...@@ -2506,6 +2482,7 @@ pub const cpu = struct {...@@ -2506,6 +2482,7 @@ pub const cpu = struct {
2506 .name = "exynos_m3",2482 .name = "exynos_m3",
2507 .llvm_name = "exynos-m3",2483 .llvm_name = "exynos-m3",
2508 .features = featureSet(&[_]Feature{2484 .features = featureSet(&[_]Feature{
2485 .crypto,
2509 .expand_fp_mlx,2486 .expand_fp_mlx,
2510 .fuse_aes,2487 .fuse_aes,
2511 .fuse_literals,2488 .fuse_literals,
...@@ -2526,6 +2503,7 @@ pub const cpu = struct {...@@ -2526,6 +2503,7 @@ pub const cpu = struct {
2526 .name = "exynos_m4",2503 .name = "exynos_m4",
2527 .llvm_name = "exynos-m4",2504 .llvm_name = "exynos-m4",
2528 .features = featureSet(&[_]Feature{2505 .features = featureSet(&[_]Feature{
2506 .crypto,
2529 .dotprod,2507 .dotprod,
2530 .expand_fp_mlx,2508 .expand_fp_mlx,
2531 .fullfp16,2509 .fullfp16,
...@@ -2548,6 +2526,7 @@ pub const cpu = struct {...@@ -2548,6 +2526,7 @@ pub const cpu = struct {
2548 .name = "exynos_m5",2526 .name = "exynos_m5",
2549 .llvm_name = "exynos-m5",2527 .llvm_name = "exynos-m5",
2550 .features = featureSet(&[_]Feature{2528 .features = featureSet(&[_]Feature{
2529 .crypto,
2551 .dotprod,2530 .dotprod,
2552 .expand_fp_mlx,2531 .expand_fp_mlx,
2553 .fullfp16,2532 .fullfp16,
...@@ -2578,6 +2557,26 @@ pub const cpu = struct {...@@ -2578,6 +2557,26 @@ pub const cpu = struct {
2578 .v5te,2557 .v5te,
2579 }),2558 }),
2580 };2559 };
2560 pub const kermit: CpuModel = .{
2561 .name = "kermit",
2562 .llvm_name = "cortex-a9",
2563 .features = featureSet(&[_]Feature{
2564 .avoid_partial_cpsr,
2565 .expand_fp_mlx,
2566 .fp16,
2567 .mp,
2568 .muxed_units,
2569 .neon,
2570 .neon_fpmovs,
2571 .prefer_vmovsr,
2572 .ret_addr_stack,
2573 .trustzone,
2574 .v7a,
2575 .vldn_align,
2576 .vmlx_forwarding,
2577 .vmlx_hazards,
2578 }),
2579 };
2581 pub const krait: CpuModel = .{2580 pub const krait: CpuModel = .{
2582 .name = "krait",2581 .name = "krait",
2583 .llvm_name = "krait",2582 .llvm_name = "krait",
...@@ -2586,6 +2585,7 @@ pub const cpu = struct {...@@ -2586,6 +2585,7 @@ pub const cpu = struct {
2586 .hwdiv,2585 .hwdiv,
2587 .hwdiv_arm,2586 .hwdiv_arm,
2588 .muxed_units,2587 .muxed_units,
2588 .neon,
2589 .ret_addr_stack,2589 .ret_addr_stack,
2590 .v7a,2590 .v7a,
2591 .vfp4,2591 .vfp4,
...@@ -2597,6 +2597,7 @@ pub const cpu = struct {...@@ -2597,6 +2597,7 @@ pub const cpu = struct {
2597 .name = "kryo",2597 .name = "kryo",
2598 .llvm_name = "kryo",2598 .llvm_name = "kryo",
2599 .features = featureSet(&[_]Feature{2599 .features = featureSet(&[_]Feature{
2600 .crypto,
2600 .v8a,2601 .v8a,
2601 }),2602 }),
2602 };2603 };
...@@ -2666,9 +2667,7 @@ pub const cpu = struct {...@@ -2666,9 +2667,7 @@ pub const cpu = struct {
2666 .llvm_name = "star-mc1",2667 .llvm_name = "star-mc1",
2667 .features = featureSet(&[_]Feature{2668 .features = featureSet(&[_]Feature{
2668 .avoid_muls,2669 .avoid_muls,
2669 .dsp,
2670 .fix_cmse_cve_2021_35465,2670 .fix_cmse_cve_2021_35465,
2671 .fp_armv8d16sp,
2672 .loop_align,2671 .loop_align,
2673 .no_branch_predictor,2672 .no_branch_predictor,
2674 .slowfpvfmx,2673 .slowfpvfmx,
...@@ -2681,12 +2680,10 @@ pub const cpu = struct {...@@ -2681,12 +2680,10 @@ pub const cpu = struct {
2681 .name = "star_mc3",2680 .name = "star_mc3",
2682 .llvm_name = "star-mc3",2681 .llvm_name = "star-mc3",
2683 .features = featureSet(&[_]Feature{2682 .features = featureSet(&[_]Feature{
2684 .fp_armv8d16,2683 .dsp,
2685 .loop_align,2684 .loop_align,
2686 .mve1beat,2685 .mve1beat,
2687 .mve_fp,
2688 .no_branch_predictor,2686 .no_branch_predictor,
2689 .pacbti,
2690 .slowfpvmlx,2687 .slowfpvmlx,
2691 .use_misched,2688 .use_misched,
2692 .v8_1m_main,2689 .v8_1m_main,
...@@ -2730,6 +2727,7 @@ pub const cpu = struct {...@@ -2730,6 +2727,7 @@ pub const cpu = struct {
2730 .hwdiv,2727 .hwdiv,
2731 .hwdiv_arm,2728 .hwdiv_arm,
2732 .mp,2729 .mp,
2730 .neon,
2733 .neonfp,2731 .neonfp,
2734 .prefer_ishst,2732 .prefer_ishst,
2735 .prof_unpr,2733 .prof_unpr,
lib/std/Target/bpf.zig-12
...@@ -7,8 +7,6 @@ const CpuModel = std.Target.Cpu.Model;...@@ -7,8 +7,6 @@ const CpuModel = std.Target.Cpu.Model;
7pub const Feature = enum {7pub const Feature = enum {
8 allows_misaligned_mem_access,8 allows_misaligned_mem_access,
9 alu32,9 alu32,
10 dummy,
11 dwarfris,
12};10};
1311
14pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;12pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
...@@ -30,16 +28,6 @@ pub const all_features = blk: {...@@ -30,16 +28,6 @@ pub const all_features = blk: {
30 .description = "Enable ALU32 instructions",28 .description = "Enable ALU32 instructions",
31 .dependencies = featureSet(&[_]Feature{}),29 .dependencies = featureSet(&[_]Feature{}),
32 };30 };
33 result[@backingInt(Feature.dummy)] = .{
34 .llvm_name = "dummy",
35 .description = "unused feature",
36 .dependencies = featureSet(&[_]Feature{}),
37 };
38 result[@backingInt(Feature.dwarfris)] = .{
39 .llvm_name = "dwarfris",
40 .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections",
41 .dependencies = featureSet(&[_]Feature{}),
42 };
43 const ti = @typeInfo(Feature);31 const ti = @typeInfo(Feature);
44 for (&result, 0..) |*elem, i| {32 for (&result, 0..) |*elem, i| {
45 elem.index = i;33 elem.index = i;
lib/std/Target/csky.zig-457
...@@ -14,19 +14,6 @@ pub const Feature = enum {...@@ -14,19 +14,6 @@ pub const Feature = enum {
14 @"7e10",14 @"7e10",
15 btst16,15 btst16,
16 cache,16 cache,
17 ccrt,
18 ck801,
19 ck802,
20 ck803,
21 ck803s,
22 ck804,
23 ck805,
24 ck807,
25 ck810,
26 ck810v,
27 ck860,
28 ck860v,
29 constpool,
30 doloop,17 doloop,
31 dsp1e2,18 dsp1e2,
32 dsp_silan,19 dsp_silan,
...@@ -57,10 +44,6 @@ pub const Feature = enum {...@@ -57,10 +44,6 @@ pub const Feature = enum {
57 java,44 java,
58 mp,45 mp,
59 mp1e2,46 mp1e2,
60 multiple_stld,
61 nvic,
62 pushpop,
63 smart,
64 soft_tp,47 soft_tp,
65 stack_size,48 stack_size,
66 trust,49 trust,
...@@ -137,71 +120,6 @@ pub const all_features = blk: {...@@ -137,71 +120,6 @@ pub const all_features = blk: {
137 .description = "Enable cache",120 .description = "Enable cache",
138 .dependencies = featureSet(&[_]Feature{}),121 .dependencies = featureSet(&[_]Feature{}),
139 };122 };
140 result[@backingInt(Feature.ccrt)] = .{
141 .llvm_name = "ccrt",
142 .description = "Use CSKY compiler runtime",
143 .dependencies = featureSet(&[_]Feature{}),
144 };
145 result[@backingInt(Feature.ck801)] = .{
146 .llvm_name = "ck801",
147 .description = "CSKY ck801 processors",
148 .dependencies = featureSet(&[_]Feature{}),
149 };
150 result[@backingInt(Feature.ck802)] = .{
151 .llvm_name = "ck802",
152 .description = "CSKY ck802 processors",
153 .dependencies = featureSet(&[_]Feature{}),
154 };
155 result[@backingInt(Feature.ck803)] = .{
156 .llvm_name = "ck803",
157 .description = "CSKY ck803 processors",
158 .dependencies = featureSet(&[_]Feature{}),
159 };
160 result[@backingInt(Feature.ck803s)] = .{
161 .llvm_name = "ck803s",
162 .description = "CSKY ck803s processors",
163 .dependencies = featureSet(&[_]Feature{}),
164 };
165 result[@backingInt(Feature.ck804)] = .{
166 .llvm_name = "ck804",
167 .description = "CSKY ck804 processors",
168 .dependencies = featureSet(&[_]Feature{}),
169 };
170 result[@backingInt(Feature.ck805)] = .{
171 .llvm_name = "ck805",
172 .description = "CSKY ck805 processors",
173 .dependencies = featureSet(&[_]Feature{}),
174 };
175 result[@backingInt(Feature.ck807)] = .{
176 .llvm_name = "ck807",
177 .description = "CSKY ck807 processors",
178 .dependencies = featureSet(&[_]Feature{}),
179 };
180 result[@backingInt(Feature.ck810)] = .{
181 .llvm_name = "ck810",
182 .description = "CSKY ck810 processors",
183 .dependencies = featureSet(&[_]Feature{}),
184 };
185 result[@backingInt(Feature.ck810v)] = .{
186 .llvm_name = "ck810v",
187 .description = "CSKY ck810v processors",
188 .dependencies = featureSet(&[_]Feature{}),
189 };
190 result[@backingInt(Feature.ck860)] = .{
191 .llvm_name = "ck860",
192 .description = "CSKY ck860 processors",
193 .dependencies = featureSet(&[_]Feature{}),
194 };
195 result[@backingInt(Feature.ck860v)] = .{
196 .llvm_name = "ck860v",
197 .description = "CSKY ck860v processors",
198 .dependencies = featureSet(&[_]Feature{}),
199 };
200 result[@backingInt(Feature.constpool)] = .{
201 .llvm_name = "constpool",
202 .description = "Dump the constant pool by compiler",
203 .dependencies = featureSet(&[_]Feature{}),
204 };
205 result[@backingInt(Feature.doloop)] = .{123 result[@backingInt(Feature.doloop)] = .{
206 .llvm_name = "doloop",124 .llvm_name = "doloop",
207 .description = "Enable doloop instructions",125 .description = "Enable doloop instructions",
...@@ -360,26 +278,6 @@ pub const all_features = blk: {...@@ -360,26 +278,6 @@ pub const all_features = blk: {
360 .@"3e7",278 .@"3e7",
361 }),279 }),
362 };280 };
363 result[@backingInt(Feature.multiple_stld)] = .{
364 .llvm_name = "multiple_stld",
365 .description = "Enable multiple load/store instructions",
366 .dependencies = featureSet(&[_]Feature{}),
367 };
368 result[@backingInt(Feature.nvic)] = .{
369 .llvm_name = "nvic",
370 .description = "Enable NVIC",
371 .dependencies = featureSet(&[_]Feature{}),
372 };
373 result[@backingInt(Feature.pushpop)] = .{
374 .llvm_name = "pushpop",
375 .description = "Enable push/pop instructions",
376 .dependencies = featureSet(&[_]Feature{}),
377 };
378 result[@backingInt(Feature.smart)] = .{
379 .llvm_name = "smart",
380 .description = "Let CPU work in Smart Mode",
381 .dependencies = featureSet(&[_]Feature{}),
382 };
383 result[@backingInt(Feature.soft_tp)] = .{281 result[@backingInt(Feature.soft_tp)] = .{
384 .llvm_name = "soft-tp",282 .llvm_name = "soft-tp",
385 .description = "Disable TLS Pointer register",283 .description = "Disable TLS Pointer register",
...@@ -429,7 +327,6 @@ pub const cpu = struct {...@@ -429,7 +327,6 @@ pub const cpu = struct {
429 .llvm_name = "c807",327 .llvm_name = "c807",
430 .features = featureSet(&[_]Feature{328 .features = featureSet(&[_]Feature{
431 .cache,329 .cache,
432 .ck807,
433 .dsp1e2,330 .dsp1e2,
434 .dspe60,331 .dspe60,
435 .edsp,332 .edsp,
...@@ -438,7 +335,6 @@ pub const cpu = struct {...@@ -438,7 +335,6 @@ pub const cpu = struct {
438 .hwdiv,335 .hwdiv,
439 .mp,336 .mp,
440 .mp1e2,337 .mp1e2,
441 .nvic,
442 .trust,338 .trust,
443 }),339 }),
444 };340 };
...@@ -447,7 +343,6 @@ pub const cpu = struct {...@@ -447,7 +343,6 @@ pub const cpu = struct {
447 .llvm_name = "c807f",343 .llvm_name = "c807f",
448 .features = featureSet(&[_]Feature{344 .features = featureSet(&[_]Feature{
449 .cache,345 .cache,
450 .ck807,
451 .dsp1e2,346 .dsp1e2,
452 .dspe60,347 .dspe60,
453 .edsp,348 .edsp,
...@@ -463,7 +358,6 @@ pub const cpu = struct {...@@ -463,7 +358,6 @@ pub const cpu = struct {
463 .hwdiv,358 .hwdiv,
464 .mp,359 .mp,
465 .mp1e2,360 .mp1e2,
466 .nvic,
467 .trust,361 .trust,
468 }),362 }),
469 };363 };
...@@ -473,7 +367,6 @@ pub const cpu = struct {...@@ -473,7 +367,6 @@ pub const cpu = struct {
473 .features = featureSet(&[_]Feature{367 .features = featureSet(&[_]Feature{
474 .@"7e10",368 .@"7e10",
475 .cache,369 .cache,
476 .ck810,
477 .dsp1e2,370 .dsp1e2,
478 .dspe60,371 .dspe60,
479 .edsp,372 .edsp,
...@@ -487,7 +380,6 @@ pub const cpu = struct {...@@ -487,7 +380,6 @@ pub const cpu = struct {
487 .hwdiv,380 .hwdiv,
488 .mp,381 .mp,
489 .mp1e2,382 .mp1e2,
490 .nvic,
491 .trust,383 .trust,
492 }),384 }),
493 };385 };
...@@ -497,7 +389,6 @@ pub const cpu = struct {...@@ -497,7 +389,6 @@ pub const cpu = struct {
497 .features = featureSet(&[_]Feature{389 .features = featureSet(&[_]Feature{
498 .@"7e10",390 .@"7e10",
499 .cache,391 .cache,
500 .ck810,
501 .dsp1e2,392 .dsp1e2,
502 .dspe60,393 .dspe60,
503 .edsp,394 .edsp,
...@@ -511,7 +402,6 @@ pub const cpu = struct {...@@ -511,7 +402,6 @@ pub const cpu = struct {
511 .hwdiv,402 .hwdiv,
512 .mp,403 .mp,
513 .mp1e2,404 .mp1e2,
514 .nvic,
515 .trust,405 .trust,
516 }),406 }),
517 };407 };
...@@ -521,8 +411,6 @@ pub const cpu = struct {...@@ -521,8 +411,6 @@ pub const cpu = struct {
521 .features = featureSet(&[_]Feature{411 .features = featureSet(&[_]Feature{
522 .@"7e10",412 .@"7e10",
523 .cache,413 .cache,
524 .ck810,
525 .ck810v,
526 .dsp1e2,414 .dsp1e2,
527 .dspe60,415 .dspe60,
528 .edsp,416 .edsp,
...@@ -536,7 +424,6 @@ pub const cpu = struct {...@@ -536,7 +424,6 @@ pub const cpu = struct {
536 .hwdiv,424 .hwdiv,
537 .mp,425 .mp,
538 .mp1e2,426 .mp1e2,
539 .nvic,
540 .trust,427 .trust,
541 .vdspv1,428 .vdspv1,
542 }),429 }),
...@@ -547,8 +434,6 @@ pub const cpu = struct {...@@ -547,8 +434,6 @@ pub const cpu = struct {
547 .features = featureSet(&[_]Feature{434 .features = featureSet(&[_]Feature{
548 .@"7e10",435 .@"7e10",
549 .cache,436 .cache,
550 .ck810,
551 .ck810v,
552 .dsp1e2,437 .dsp1e2,
553 .dspe60,438 .dspe60,
554 .edsp,439 .edsp,
...@@ -562,7 +447,6 @@ pub const cpu = struct {...@@ -562,7 +447,6 @@ pub const cpu = struct {
562 .hwdiv,447 .hwdiv,
563 .mp,448 .mp,
564 .mp1e2,449 .mp1e2,
565 .nvic,
566 .trust,450 .trust,
567 .vdspv1,451 .vdspv1,
568 }),452 }),
...@@ -576,7 +460,6 @@ pub const cpu = struct {...@@ -576,7 +460,6 @@ pub const cpu = struct {
576 .@"3e3r3",460 .@"3e3r3",
577 .btst16,461 .btst16,
578 .cache,462 .cache,
579 .ck860,
580 .dspe60,463 .dspe60,
581 .float7e60,464 .float7e60,
582 .fpuv3_df,465 .fpuv3_df,
...@@ -588,7 +471,6 @@ pub const cpu = struct {...@@ -588,7 +471,6 @@ pub const cpu = struct {
588 .hwdiv,471 .hwdiv,
589 .mp,472 .mp,
590 .mp1e2,473 .mp1e2,
591 .nvic,
592 .trust,474 .trust,
593 }),475 }),
594 };476 };
...@@ -601,8 +483,6 @@ pub const cpu = struct {...@@ -601,8 +483,6 @@ pub const cpu = struct {
601 .@"3e3r3",483 .@"3e3r3",
602 .btst16,484 .btst16,
603 .cache,485 .cache,
604 .ck860,
605 .ck860v,
606 .dspe60,486 .dspe60,
607 .float7e60,487 .float7e60,
608 .fpuv3_df,488 .fpuv3_df,
...@@ -614,7 +494,6 @@ pub const cpu = struct {...@@ -614,7 +494,6 @@ pub const cpu = struct {
614 .hwdiv,494 .hwdiv,
615 .mp,495 .mp,
616 .mp1e2,496 .mp1e2,
617 .nvic,
618 .trust,497 .trust,
619 .vdsp2e60f,498 .vdsp2e60f,
620 .vdspv2,499 .vdspv2,
...@@ -625,7 +504,6 @@ pub const cpu = struct {...@@ -625,7 +504,6 @@ pub const cpu = struct {
625 .llvm_name = "ck801",504 .llvm_name = "ck801",
626 .features = featureSet(&[_]Feature{505 .features = featureSet(&[_]Feature{
627 .btst16,506 .btst16,
628 .ck801,
629 .e1,507 .e1,
630 .trust,508 .trust,
631 }),509 }),
...@@ -635,7 +513,6 @@ pub const cpu = struct {...@@ -635,7 +513,6 @@ pub const cpu = struct {
635 .llvm_name = "ck801t",513 .llvm_name = "ck801t",
636 .features = featureSet(&[_]Feature{514 .features = featureSet(&[_]Feature{
637 .btst16,515 .btst16,
638 .ck801,
639 .e1,516 .e1,
640 .trust,517 .trust,
641 }),518 }),
...@@ -645,9 +522,7 @@ pub const cpu = struct {...@@ -645,9 +522,7 @@ pub const cpu = struct {
645 .llvm_name = "ck802",522 .llvm_name = "ck802",
646 .features = featureSet(&[_]Feature{523 .features = featureSet(&[_]Feature{
647 .btst16,524 .btst16,
648 .ck802,
649 .e2,525 .e2,
650 .nvic,
651 .trust,526 .trust,
652 }),527 }),
653 };528 };
...@@ -656,10 +531,8 @@ pub const cpu = struct {...@@ -656,10 +531,8 @@ pub const cpu = struct {
656 .llvm_name = "ck802j",531 .llvm_name = "ck802j",
657 .features = featureSet(&[_]Feature{532 .features = featureSet(&[_]Feature{
658 .btst16,533 .btst16,
659 .ck802,
660 .e2,534 .e2,
661 .java,535 .java,
662 .nvic,
663 .trust,536 .trust,
664 }),537 }),
665 };538 };
...@@ -668,9 +541,7 @@ pub const cpu = struct {...@@ -668,9 +541,7 @@ pub const cpu = struct {
668 .llvm_name = "ck802t",541 .llvm_name = "ck802t",
669 .features = featureSet(&[_]Feature{542 .features = featureSet(&[_]Feature{
670 .btst16,543 .btst16,
671 .ck802,
672 .e2,544 .e2,
673 .nvic,
674 .trust,545 .trust,
675 }),546 }),
676 };547 };
...@@ -679,10 +550,8 @@ pub const cpu = struct {...@@ -679,10 +550,8 @@ pub const cpu = struct {
679 .llvm_name = "ck803",550 .llvm_name = "ck803",
680 .features = featureSet(&[_]Feature{551 .features = featureSet(&[_]Feature{
681 .btst16,552 .btst16,
682 .ck803,
683 .hwdiv,553 .hwdiv,
684 .mp,554 .mp,
685 .nvic,
686 .trust,555 .trust,
687 }),556 }),
688 };557 };
...@@ -691,13 +560,11 @@ pub const cpu = struct {...@@ -691,13 +560,11 @@ pub const cpu = struct {
691 .llvm_name = "ck803e",560 .llvm_name = "ck803e",
692 .features = featureSet(&[_]Feature{561 .features = featureSet(&[_]Feature{
693 .btst16,562 .btst16,
694 .ck803,
695 .dsp1e2,563 .dsp1e2,
696 .dspe60,564 .dspe60,
697 .edsp,565 .edsp,
698 .hwdiv,566 .hwdiv,
699 .mp,567 .mp,
700 .nvic,
701 .trust,568 .trust,
702 }),569 }),
703 };570 };
...@@ -706,7 +573,6 @@ pub const cpu = struct {...@@ -706,7 +573,6 @@ pub const cpu = struct {
706 .llvm_name = "ck803ef",573 .llvm_name = "ck803ef",
707 .features = featureSet(&[_]Feature{574 .features = featureSet(&[_]Feature{
708 .btst16,575 .btst16,
709 .ck803,
710 .dsp1e2,576 .dsp1e2,
711 .dspe60,577 .dspe60,
712 .edsp,578 .edsp,
...@@ -715,7 +581,6 @@ pub const cpu = struct {...@@ -715,7 +581,6 @@ pub const cpu = struct {
715 .fpuv2_sf,581 .fpuv2_sf,
716 .hwdiv,582 .hwdiv,
717 .mp,583 .mp,
718 .nvic,
719 .trust,584 .trust,
720 }),585 }),
721 };586 };
...@@ -724,7 +589,6 @@ pub const cpu = struct {...@@ -724,7 +589,6 @@ pub const cpu = struct {
724 .llvm_name = "ck803efh",589 .llvm_name = "ck803efh",
725 .features = featureSet(&[_]Feature{590 .features = featureSet(&[_]Feature{
726 .btst16,591 .btst16,
727 .ck803,
728 .dsp1e2,592 .dsp1e2,
729 .dspe60,593 .dspe60,
730 .edsp,594 .edsp,
...@@ -733,7 +597,6 @@ pub const cpu = struct {...@@ -733,7 +597,6 @@ pub const cpu = struct {
733 .fpuv2_sf,597 .fpuv2_sf,
734 .hwdiv,598 .hwdiv,
735 .mp,599 .mp,
736 .nvic,
737 .trust,600 .trust,
738 }),601 }),
739 };602 };
...@@ -743,7 +606,6 @@ pub const cpu = struct {...@@ -743,7 +606,6 @@ pub const cpu = struct {
743 .features = featureSet(&[_]Feature{606 .features = featureSet(&[_]Feature{
744 .@"3e3r1",607 .@"3e3r1",
745 .btst16,608 .btst16,
746 .ck803,
747 .dsp1e2,609 .dsp1e2,
748 .dspe60,610 .dspe60,
749 .dspv2,611 .dspv2,
...@@ -754,7 +616,6 @@ pub const cpu = struct {...@@ -754,7 +616,6 @@ pub const cpu = struct {
754 .high_registers,616 .high_registers,
755 .hwdiv,617 .hwdiv,
756 .mp,618 .mp,
757 .nvic,
758 .trust,619 .trust,
759 }),620 }),
760 };621 };
...@@ -765,7 +626,6 @@ pub const cpu = struct {...@@ -765,7 +626,6 @@ pub const cpu = struct {
765 .@"3e3r2",626 .@"3e3r2",
766 .@"3e3r3",627 .@"3e3r3",
767 .btst16,628 .btst16,
768 .ck803,
769 .dsp1e2,629 .dsp1e2,
770 .dspe60,630 .dspe60,
771 .dspv2,631 .dspv2,
...@@ -776,7 +636,6 @@ pub const cpu = struct {...@@ -776,7 +636,6 @@ pub const cpu = struct {
776 .high_registers,636 .high_registers,
777 .hwdiv,637 .hwdiv,
778 .mp,638 .mp,
779 .nvic,
780 .trust,639 .trust,
781 }),640 }),
782 };641 };
...@@ -787,7 +646,6 @@ pub const cpu = struct {...@@ -787,7 +646,6 @@ pub const cpu = struct {
787 .@"3e3r2",646 .@"3e3r2",
788 .@"3e3r3",647 .@"3e3r3",
789 .btst16,648 .btst16,
790 .ck803,
791 .dsp1e2,649 .dsp1e2,
792 .dspe60,650 .dspe60,
793 .dspv2,651 .dspv2,
...@@ -798,7 +656,6 @@ pub const cpu = struct {...@@ -798,7 +656,6 @@ pub const cpu = struct {
798 .high_registers,656 .high_registers,
799 .hwdiv,657 .hwdiv,
800 .mp,658 .mp,
801 .nvic,
802 .trust,659 .trust,
803 }),660 }),
804 };661 };
...@@ -807,7 +664,6 @@ pub const cpu = struct {...@@ -807,7 +664,6 @@ pub const cpu = struct {
807 .llvm_name = "ck803efht",664 .llvm_name = "ck803efht",
808 .features = featureSet(&[_]Feature{665 .features = featureSet(&[_]Feature{
809 .btst16,666 .btst16,
810 .ck803,
811 .dsp1e2,667 .dsp1e2,
812 .dspe60,668 .dspe60,
813 .edsp,669 .edsp,
...@@ -816,7 +672,6 @@ pub const cpu = struct {...@@ -816,7 +672,6 @@ pub const cpu = struct {
816 .fpuv2_sf,672 .fpuv2_sf,
817 .hwdiv,673 .hwdiv,
818 .mp,674 .mp,
819 .nvic,
820 .trust,675 .trust,
821 }),676 }),
822 };677 };
...@@ -826,7 +681,6 @@ pub const cpu = struct {...@@ -826,7 +681,6 @@ pub const cpu = struct {
826 .features = featureSet(&[_]Feature{681 .features = featureSet(&[_]Feature{
827 .@"3e3r1",682 .@"3e3r1",
828 .btst16,683 .btst16,
829 .ck803,
830 .dsp1e2,684 .dsp1e2,
831 .dspe60,685 .dspe60,
832 .dspv2,686 .dspv2,
...@@ -837,7 +691,6 @@ pub const cpu = struct {...@@ -837,7 +691,6 @@ pub const cpu = struct {
837 .high_registers,691 .high_registers,
838 .hwdiv,692 .hwdiv,
839 .mp,693 .mp,
840 .nvic,
841 .trust,694 .trust,
842 }),695 }),
843 };696 };
...@@ -848,7 +701,6 @@ pub const cpu = struct {...@@ -848,7 +701,6 @@ pub const cpu = struct {
848 .@"3e3r2",701 .@"3e3r2",
849 .@"3e3r3",702 .@"3e3r3",
850 .btst16,703 .btst16,
851 .ck803,
852 .dsp1e2,704 .dsp1e2,
853 .dspe60,705 .dspe60,
854 .dspv2,706 .dspv2,
...@@ -859,7 +711,6 @@ pub const cpu = struct {...@@ -859,7 +711,6 @@ pub const cpu = struct {
859 .high_registers,711 .high_registers,
860 .hwdiv,712 .hwdiv,
861 .mp,713 .mp,
862 .nvic,
863 .trust,714 .trust,
864 }),715 }),
865 };716 };
...@@ -870,7 +721,6 @@ pub const cpu = struct {...@@ -870,7 +721,6 @@ pub const cpu = struct {
870 .@"3e3r2",721 .@"3e3r2",
871 .@"3e3r3",722 .@"3e3r3",
872 .btst16,723 .btst16,
873 .ck803,
874 .dsp1e2,724 .dsp1e2,
875 .dspe60,725 .dspe60,
876 .dspv2,726 .dspv2,
...@@ -881,7 +731,6 @@ pub const cpu = struct {...@@ -881,7 +731,6 @@ pub const cpu = struct {
881 .high_registers,731 .high_registers,
882 .hwdiv,732 .hwdiv,
883 .mp,733 .mp,
884 .nvic,
885 .trust,734 .trust,
886 }),735 }),
887 };736 };
...@@ -891,7 +740,6 @@ pub const cpu = struct {...@@ -891,7 +740,6 @@ pub const cpu = struct {
891 .features = featureSet(&[_]Feature{740 .features = featureSet(&[_]Feature{
892 .@"3e3r1",741 .@"3e3r1",
893 .btst16,742 .btst16,
894 .ck803,
895 .dsp1e2,743 .dsp1e2,
896 .dspe60,744 .dspe60,
897 .dspv2,745 .dspv2,
...@@ -902,7 +750,6 @@ pub const cpu = struct {...@@ -902,7 +750,6 @@ pub const cpu = struct {
902 .high_registers,750 .high_registers,
903 .hwdiv,751 .hwdiv,
904 .mp,752 .mp,
905 .nvic,
906 .trust,753 .trust,
907 }),754 }),
908 };755 };
...@@ -913,7 +760,6 @@ pub const cpu = struct {...@@ -913,7 +760,6 @@ pub const cpu = struct {
913 .@"3e3r2",760 .@"3e3r2",
914 .@"3e3r3",761 .@"3e3r3",
915 .btst16,762 .btst16,
916 .ck803,
917 .dsp1e2,763 .dsp1e2,
918 .dspe60,764 .dspe60,
919 .dspv2,765 .dspv2,
...@@ -924,7 +770,6 @@ pub const cpu = struct {...@@ -924,7 +770,6 @@ pub const cpu = struct {
924 .high_registers,770 .high_registers,
925 .hwdiv,771 .hwdiv,
926 .mp,772 .mp,
927 .nvic,
928 .trust,773 .trust,
929 }),774 }),
930 };775 };
...@@ -935,7 +780,6 @@ pub const cpu = struct {...@@ -935,7 +780,6 @@ pub const cpu = struct {
935 .@"3e3r2",780 .@"3e3r2",
936 .@"3e3r3",781 .@"3e3r3",
937 .btst16,782 .btst16,
938 .ck803,
939 .dsp1e2,783 .dsp1e2,
940 .dspe60,784 .dspe60,
941 .dspv2,785 .dspv2,
...@@ -946,7 +790,6 @@ pub const cpu = struct {...@@ -946,7 +790,6 @@ pub const cpu = struct {
946 .high_registers,790 .high_registers,
947 .hwdiv,791 .hwdiv,
948 .mp,792 .mp,
949 .nvic,
950 .trust,793 .trust,
951 }),794 }),
952 };795 };
...@@ -955,7 +798,6 @@ pub const cpu = struct {...@@ -955,7 +798,6 @@ pub const cpu = struct {
955 .llvm_name = "ck803eft",798 .llvm_name = "ck803eft",
956 .features = featureSet(&[_]Feature{799 .features = featureSet(&[_]Feature{
957 .btst16,800 .btst16,
958 .ck803,
959 .dsp1e2,801 .dsp1e2,
960 .dspe60,802 .dspe60,
961 .edsp,803 .edsp,
...@@ -964,7 +806,6 @@ pub const cpu = struct {...@@ -964,7 +806,6 @@ pub const cpu = struct {
964 .fpuv2_sf,806 .fpuv2_sf,
965 .hwdiv,807 .hwdiv,
966 .mp,808 .mp,
967 .nvic,
968 .trust,809 .trust,
969 }),810 }),
970 };811 };
...@@ -974,7 +815,6 @@ pub const cpu = struct {...@@ -974,7 +815,6 @@ pub const cpu = struct {
974 .features = featureSet(&[_]Feature{815 .features = featureSet(&[_]Feature{
975 .@"3e3r1",816 .@"3e3r1",
976 .btst16,817 .btst16,
977 .ck803,
978 .dsp1e2,818 .dsp1e2,
979 .dspe60,819 .dspe60,
980 .dspv2,820 .dspv2,
...@@ -985,7 +825,6 @@ pub const cpu = struct {...@@ -985,7 +825,6 @@ pub const cpu = struct {
985 .high_registers,825 .high_registers,
986 .hwdiv,826 .hwdiv,
987 .mp,827 .mp,
988 .nvic,
989 .trust,828 .trust,
990 }),829 }),
991 };830 };
...@@ -996,7 +835,6 @@ pub const cpu = struct {...@@ -996,7 +835,6 @@ pub const cpu = struct {
996 .@"3e3r2",835 .@"3e3r2",
997 .@"3e3r3",836 .@"3e3r3",
998 .btst16,837 .btst16,
999 .ck803,
1000 .dsp1e2,838 .dsp1e2,
1001 .dspe60,839 .dspe60,
1002 .dspv2,840 .dspv2,
...@@ -1007,7 +845,6 @@ pub const cpu = struct {...@@ -1007,7 +845,6 @@ pub const cpu = struct {
1007 .high_registers,845 .high_registers,
1008 .hwdiv,846 .hwdiv,
1009 .mp,847 .mp,
1010 .nvic,
1011 .trust,848 .trust,
1012 }),849 }),
1013 };850 };
...@@ -1018,7 +855,6 @@ pub const cpu = struct {...@@ -1018,7 +855,6 @@ pub const cpu = struct {
1018 .@"3e3r2",855 .@"3e3r2",
1019 .@"3e3r3",856 .@"3e3r3",
1020 .btst16,857 .btst16,
1021 .ck803,
1022 .dsp1e2,858 .dsp1e2,
1023 .dspe60,859 .dspe60,
1024 .dspv2,860 .dspv2,
...@@ -1029,7 +865,6 @@ pub const cpu = struct {...@@ -1029,7 +865,6 @@ pub const cpu = struct {
1029 .high_registers,865 .high_registers,
1030 .hwdiv,866 .hwdiv,
1031 .mp,867 .mp,
1032 .nvic,
1033 .trust,868 .trust,
1034 }),869 }),
1035 };870 };
...@@ -1038,13 +873,11 @@ pub const cpu = struct {...@@ -1038,13 +873,11 @@ pub const cpu = struct {
1038 .llvm_name = "ck803eh",873 .llvm_name = "ck803eh",
1039 .features = featureSet(&[_]Feature{874 .features = featureSet(&[_]Feature{
1040 .btst16,875 .btst16,
1041 .ck803,
1042 .dsp1e2,876 .dsp1e2,
1043 .dspe60,877 .dspe60,
1044 .edsp,878 .edsp,
1045 .hwdiv,879 .hwdiv,
1046 .mp,880 .mp,
1047 .nvic,
1048 .trust,881 .trust,
1049 }),882 }),
1050 };883 };
...@@ -1055,7 +888,6 @@ pub const cpu = struct {...@@ -1055,7 +888,6 @@ pub const cpu = struct {
1055 .@"3e3r1",888 .@"3e3r1",
1056 .@"3e3r3",889 .@"3e3r3",
1057 .btst16,890 .btst16,
1058 .ck803,
1059 .dsp1e2,891 .dsp1e2,
1060 .dspe60,892 .dspe60,
1061 .dspv2,893 .dspv2,
...@@ -1063,7 +895,6 @@ pub const cpu = struct {...@@ -1063,7 +895,6 @@ pub const cpu = struct {
1063 .high_registers,895 .high_registers,
1064 .hwdiv,896 .hwdiv,
1065 .mp,897 .mp,
1066 .nvic,
1067 .trust,898 .trust,
1068 }),899 }),
1069 };900 };
...@@ -1074,7 +905,6 @@ pub const cpu = struct {...@@ -1074,7 +905,6 @@ pub const cpu = struct {
1074 .@"3e3r2",905 .@"3e3r2",
1075 .@"3e3r3",906 .@"3e3r3",
1076 .btst16,907 .btst16,
1077 .ck803,
1078 .dsp1e2,908 .dsp1e2,
1079 .dspe60,909 .dspe60,
1080 .dspv2,910 .dspv2,
...@@ -1082,7 +912,6 @@ pub const cpu = struct {...@@ -1082,7 +912,6 @@ pub const cpu = struct {
1082 .high_registers,912 .high_registers,
1083 .hwdiv,913 .hwdiv,
1084 .mp,914 .mp,
1085 .nvic,
1086 .trust,915 .trust,
1087 }),916 }),
1088 };917 };
...@@ -1093,7 +922,6 @@ pub const cpu = struct {...@@ -1093,7 +922,6 @@ pub const cpu = struct {
1093 .@"3e3r2",922 .@"3e3r2",
1094 .@"3e3r3",923 .@"3e3r3",
1095 .btst16,924 .btst16,
1096 .ck803,
1097 .dsp1e2,925 .dsp1e2,
1098 .dspe60,926 .dspe60,
1099 .dspv2,927 .dspv2,
...@@ -1101,7 +929,6 @@ pub const cpu = struct {...@@ -1101,7 +929,6 @@ pub const cpu = struct {
1101 .high_registers,929 .high_registers,
1102 .hwdiv,930 .hwdiv,
1103 .mp,931 .mp,
1104 .nvic,
1105 .trust,932 .trust,
1106 }),933 }),
1107 };934 };
...@@ -1110,13 +937,11 @@ pub const cpu = struct {...@@ -1110,13 +937,11 @@ pub const cpu = struct {
1110 .llvm_name = "ck803eht",937 .llvm_name = "ck803eht",
1111 .features = featureSet(&[_]Feature{938 .features = featureSet(&[_]Feature{
1112 .btst16,939 .btst16,
1113 .ck803,
1114 .dsp1e2,940 .dsp1e2,
1115 .dspe60,941 .dspe60,
1116 .edsp,942 .edsp,
1117 .hwdiv,943 .hwdiv,
1118 .mp,944 .mp,
1119 .nvic,
1120 .trust,945 .trust,
1121 }),946 }),
1122 };947 };
...@@ -1127,7 +952,6 @@ pub const cpu = struct {...@@ -1127,7 +952,6 @@ pub const cpu = struct {
1127 .@"3e3r1",952 .@"3e3r1",
1128 .@"3e3r3",953 .@"3e3r3",
1129 .btst16,954 .btst16,
1130 .ck803,
1131 .dsp1e2,955 .dsp1e2,
1132 .dspe60,956 .dspe60,
1133 .dspv2,957 .dspv2,
...@@ -1135,7 +959,6 @@ pub const cpu = struct {...@@ -1135,7 +959,6 @@ pub const cpu = struct {
1135 .high_registers,959 .high_registers,
1136 .hwdiv,960 .hwdiv,
1137 .mp,961 .mp,
1138 .nvic,
1139 .trust,962 .trust,
1140 }),963 }),
1141 };964 };
...@@ -1146,7 +969,6 @@ pub const cpu = struct {...@@ -1146,7 +969,6 @@ pub const cpu = struct {
1146 .@"3e3r2",969 .@"3e3r2",
1147 .@"3e3r3",970 .@"3e3r3",
1148 .btst16,971 .btst16,
1149 .ck803,
1150 .dsp1e2,972 .dsp1e2,
1151 .dspe60,973 .dspe60,
1152 .dspv2,974 .dspv2,
...@@ -1154,7 +976,6 @@ pub const cpu = struct {...@@ -1154,7 +976,6 @@ pub const cpu = struct {
1154 .high_registers,976 .high_registers,
1155 .hwdiv,977 .hwdiv,
1156 .mp,978 .mp,
1157 .nvic,
1158 .trust,979 .trust,
1159 }),980 }),
1160 };981 };
...@@ -1165,7 +986,6 @@ pub const cpu = struct {...@@ -1165,7 +986,6 @@ pub const cpu = struct {
1165 .@"3e3r2",986 .@"3e3r2",
1166 .@"3e3r3",987 .@"3e3r3",
1167 .btst16,988 .btst16,
1168 .ck803,
1169 .dsp1e2,989 .dsp1e2,
1170 .dspe60,990 .dspe60,
1171 .dspv2,991 .dspv2,
...@@ -1173,7 +993,6 @@ pub const cpu = struct {...@@ -1173,7 +993,6 @@ pub const cpu = struct {
1173 .high_registers,993 .high_registers,
1174 .hwdiv,994 .hwdiv,
1175 .mp,995 .mp,
1176 .nvic,
1177 .trust,996 .trust,
1178 }),997 }),
1179 };998 };
...@@ -1184,7 +1003,6 @@ pub const cpu = struct {...@@ -1184,7 +1003,6 @@ pub const cpu = struct {
1184 .@"3e3r1",1003 .@"3e3r1",
1185 .@"3e3r3",1004 .@"3e3r3",
1186 .btst16,1005 .btst16,
1187 .ck803,
1188 .dsp1e2,1006 .dsp1e2,
1189 .dspe60,1007 .dspe60,
1190 .dspv2,1008 .dspv2,
...@@ -1192,7 +1010,6 @@ pub const cpu = struct {...@@ -1192,7 +1010,6 @@ pub const cpu = struct {
1192 .high_registers,1010 .high_registers,
1193 .hwdiv,1011 .hwdiv,
1194 .mp,1012 .mp,
1195 .nvic,
1196 .trust,1013 .trust,
1197 }),1014 }),
1198 };1015 };
...@@ -1203,7 +1020,6 @@ pub const cpu = struct {...@@ -1203,7 +1020,6 @@ pub const cpu = struct {
1203 .@"3e3r2",1020 .@"3e3r2",
1204 .@"3e3r3",1021 .@"3e3r3",
1205 .btst16,1022 .btst16,
1206 .ck803,
1207 .dsp1e2,1023 .dsp1e2,
1208 .dspe60,1024 .dspe60,
1209 .dspv2,1025 .dspv2,
...@@ -1211,7 +1027,6 @@ pub const cpu = struct {...@@ -1211,7 +1027,6 @@ pub const cpu = struct {
1211 .high_registers,1027 .high_registers,
1212 .hwdiv,1028 .hwdiv,
1213 .mp,1029 .mp,
1214 .nvic,
1215 .trust,1030 .trust,
1216 }),1031 }),
1217 };1032 };
...@@ -1222,7 +1037,6 @@ pub const cpu = struct {...@@ -1222,7 +1037,6 @@ pub const cpu = struct {
1222 .@"3e3r2",1037 .@"3e3r2",
1223 .@"3e3r3",1038 .@"3e3r3",
1224 .btst16,1039 .btst16,
1225 .ck803,
1226 .dsp1e2,1040 .dsp1e2,
1227 .dspe60,1041 .dspe60,
1228 .dspv2,1042 .dspv2,
...@@ -1230,7 +1044,6 @@ pub const cpu = struct {...@@ -1230,7 +1044,6 @@ pub const cpu = struct {
1230 .high_registers,1044 .high_registers,
1231 .hwdiv,1045 .hwdiv,
1232 .mp,1046 .mp,
1233 .nvic,
1234 .trust,1047 .trust,
1235 }),1048 }),
1236 };1049 };
...@@ -1239,13 +1052,11 @@ pub const cpu = struct {...@@ -1239,13 +1052,11 @@ pub const cpu = struct {
1239 .llvm_name = "ck803et",1052 .llvm_name = "ck803et",
1240 .features = featureSet(&[_]Feature{1053 .features = featureSet(&[_]Feature{
1241 .btst16,1054 .btst16,
1242 .ck803,
1243 .dsp1e2,1055 .dsp1e2,
1244 .dspe60,1056 .dspe60,
1245 .edsp,1057 .edsp,
1246 .hwdiv,1058 .hwdiv,
1247 .mp,1059 .mp,
1248 .nvic,
1249 .trust,1060 .trust,
1250 }),1061 }),
1251 };1062 };
...@@ -1256,7 +1067,6 @@ pub const cpu = struct {...@@ -1256,7 +1067,6 @@ pub const cpu = struct {
1256 .@"3e3r1",1067 .@"3e3r1",
1257 .@"3e3r3",1068 .@"3e3r3",
1258 .btst16,1069 .btst16,
1259 .ck803,
1260 .dsp1e2,1070 .dsp1e2,
1261 .dspe60,1071 .dspe60,
1262 .dspv2,1072 .dspv2,
...@@ -1264,7 +1074,6 @@ pub const cpu = struct {...@@ -1264,7 +1074,6 @@ pub const cpu = struct {
1264 .high_registers,1074 .high_registers,
1265 .hwdiv,1075 .hwdiv,
1266 .mp,1076 .mp,
1267 .nvic,
1268 .trust,1077 .trust,
1269 }),1078 }),
1270 };1079 };
...@@ -1275,7 +1084,6 @@ pub const cpu = struct {...@@ -1275,7 +1084,6 @@ pub const cpu = struct {
1275 .@"3e3r2",1084 .@"3e3r2",
1276 .@"3e3r3",1085 .@"3e3r3",
1277 .btst16,1086 .btst16,
1278 .ck803,
1279 .dsp1e2,1087 .dsp1e2,
1280 .dspe60,1088 .dspe60,
1281 .dspv2,1089 .dspv2,
...@@ -1283,7 +1091,6 @@ pub const cpu = struct {...@@ -1283,7 +1091,6 @@ pub const cpu = struct {
1283 .high_registers,1091 .high_registers,
1284 .hwdiv,1092 .hwdiv,
1285 .mp,1093 .mp,
1286 .nvic,
1287 .trust,1094 .trust,
1288 }),1095 }),
1289 };1096 };
...@@ -1294,7 +1101,6 @@ pub const cpu = struct {...@@ -1294,7 +1101,6 @@ pub const cpu = struct {
1294 .@"3e3r2",1101 .@"3e3r2",
1295 .@"3e3r3",1102 .@"3e3r3",
1296 .btst16,1103 .btst16,
1297 .ck803,
1298 .dsp1e2,1104 .dsp1e2,
1299 .dspe60,1105 .dspe60,
1300 .dspv2,1106 .dspv2,
...@@ -1302,7 +1108,6 @@ pub const cpu = struct {...@@ -1302,7 +1108,6 @@ pub const cpu = struct {
1302 .high_registers,1108 .high_registers,
1303 .hwdiv,1109 .hwdiv,
1304 .mp,1110 .mp,
1305 .nvic,
1306 .trust,1111 .trust,
1307 }),1112 }),
1308 };1113 };
...@@ -1311,13 +1116,11 @@ pub const cpu = struct {...@@ -1311,13 +1116,11 @@ pub const cpu = struct {
1311 .llvm_name = "ck803f",1116 .llvm_name = "ck803f",
1312 .features = featureSet(&[_]Feature{1117 .features = featureSet(&[_]Feature{
1313 .btst16,1118 .btst16,
1314 .ck803,
1315 .float1e3,1119 .float1e3,
1316 .floate1,1120 .floate1,
1317 .fpuv2_sf,1121 .fpuv2_sf,
1318 .hwdiv,1122 .hwdiv,
1319 .mp,1123 .mp,
1320 .nvic,
1321 .trust,1124 .trust,
1322 }),1125 }),
1323 };1126 };
...@@ -1326,13 +1129,11 @@ pub const cpu = struct {...@@ -1326,13 +1129,11 @@ pub const cpu = struct {
1326 .llvm_name = "ck803fh",1129 .llvm_name = "ck803fh",
1327 .features = featureSet(&[_]Feature{1130 .features = featureSet(&[_]Feature{
1328 .btst16,1131 .btst16,
1329 .ck803,
1330 .float1e3,1132 .float1e3,
1331 .floate1,1133 .floate1,
1332 .fpuv2_sf,1134 .fpuv2_sf,
1333 .hwdiv,1135 .hwdiv,
1334 .mp,1136 .mp,
1335 .nvic,
1336 .trust,1137 .trust,
1337 }),1138 }),
1338 };1139 };
...@@ -1343,14 +1144,12 @@ pub const cpu = struct {...@@ -1343,14 +1144,12 @@ pub const cpu = struct {
1343 .@"3e3r1",1144 .@"3e3r1",
1344 .@"3e3r3",1145 .@"3e3r3",
1345 .btst16,1146 .btst16,
1346 .ck803,
1347 .dspv2,1147 .dspv2,
1348 .float1e3,1148 .float1e3,
1349 .floate1,1149 .floate1,
1350 .fpuv2_sf,1150 .fpuv2_sf,
1351 .hwdiv,1151 .hwdiv,
1352 .mp,1152 .mp,
1353 .nvic,
1354 .trust,1153 .trust,
1355 }),1154 }),
1356 };1155 };
...@@ -1361,14 +1160,12 @@ pub const cpu = struct {...@@ -1361,14 +1160,12 @@ pub const cpu = struct {
1361 .@"3e3r2",1160 .@"3e3r2",
1362 .@"3e3r3",1161 .@"3e3r3",
1363 .btst16,1162 .btst16,
1364 .ck803,
1365 .dspv2,1163 .dspv2,
1366 .float1e3,1164 .float1e3,
1367 .floate1,1165 .floate1,
1368 .fpuv2_sf,1166 .fpuv2_sf,
1369 .hwdiv,1167 .hwdiv,
1370 .mp,1168 .mp,
1371 .nvic,
1372 .trust,1169 .trust,
1373 }),1170 }),
1374 };1171 };
...@@ -1379,14 +1176,12 @@ pub const cpu = struct {...@@ -1379,14 +1176,12 @@ pub const cpu = struct {
1379 .@"3e3r2",1176 .@"3e3r2",
1380 .@"3e3r3",1177 .@"3e3r3",
1381 .btst16,1178 .btst16,
1382 .ck803,
1383 .dspv2,1179 .dspv2,
1384 .float1e3,1180 .float1e3,
1385 .floate1,1181 .floate1,
1386 .fpuv2_sf,1182 .fpuv2_sf,
1387 .hwdiv,1183 .hwdiv,
1388 .mp,1184 .mp,
1389 .nvic,
1390 .trust,1185 .trust,
1391 }),1186 }),
1392 };1187 };
...@@ -1397,14 +1192,12 @@ pub const cpu = struct {...@@ -1397,14 +1192,12 @@ pub const cpu = struct {
1397 .@"3e3r1",1192 .@"3e3r1",
1398 .@"3e3r3",1193 .@"3e3r3",
1399 .btst16,1194 .btst16,
1400 .ck803,
1401 .dspv2,1195 .dspv2,
1402 .float1e3,1196 .float1e3,
1403 .floate1,1197 .floate1,
1404 .fpuv2_sf,1198 .fpuv2_sf,
1405 .hwdiv,1199 .hwdiv,
1406 .mp,1200 .mp,
1407 .nvic,
1408 .trust,1201 .trust,
1409 }),1202 }),
1410 };1203 };
...@@ -1415,14 +1208,12 @@ pub const cpu = struct {...@@ -1415,14 +1208,12 @@ pub const cpu = struct {
1415 .@"3e3r2",1208 .@"3e3r2",
1416 .@"3e3r3",1209 .@"3e3r3",
1417 .btst16,1210 .btst16,
1418 .ck803,
1419 .dspv2,1211 .dspv2,
1420 .float1e3,1212 .float1e3,
1421 .floate1,1213 .floate1,
1422 .fpuv2_sf,1214 .fpuv2_sf,
1423 .hwdiv,1215 .hwdiv,
1424 .mp,1216 .mp,
1425 .nvic,
1426 .trust,1217 .trust,
1427 }),1218 }),
1428 };1219 };
...@@ -1433,14 +1224,12 @@ pub const cpu = struct {...@@ -1433,14 +1224,12 @@ pub const cpu = struct {
1433 .@"3e3r2",1224 .@"3e3r2",
1434 .@"3e3r3",1225 .@"3e3r3",
1435 .btst16,1226 .btst16,
1436 .ck803,
1437 .dspv2,1227 .dspv2,
1438 .float1e3,1228 .float1e3,
1439 .floate1,1229 .floate1,
1440 .fpuv2_sf,1230 .fpuv2_sf,
1441 .hwdiv,1231 .hwdiv,
1442 .mp,1232 .mp,
1443 .nvic,
1444 .trust,1233 .trust,
1445 }),1234 }),
1446 };1235 };
...@@ -1449,13 +1238,11 @@ pub const cpu = struct {...@@ -1449,13 +1238,11 @@ pub const cpu = struct {
1449 .llvm_name = "ck803ft",1238 .llvm_name = "ck803ft",
1450 .features = featureSet(&[_]Feature{1239 .features = featureSet(&[_]Feature{
1451 .btst16,1240 .btst16,
1452 .ck803,
1453 .float1e3,1241 .float1e3,
1454 .floate1,1242 .floate1,
1455 .fpuv2_sf,1243 .fpuv2_sf,
1456 .hwdiv,1244 .hwdiv,
1457 .mp,1245 .mp,
1458 .nvic,
1459 .trust,1246 .trust,
1460 }),1247 }),
1461 };1248 };
...@@ -1465,14 +1252,12 @@ pub const cpu = struct {...@@ -1465,14 +1252,12 @@ pub const cpu = struct {
1465 .features = featureSet(&[_]Feature{1252 .features = featureSet(&[_]Feature{
1466 .@"3e3r1",1253 .@"3e3r1",
1467 .btst16,1254 .btst16,
1468 .ck803,
1469 .dspv2,1255 .dspv2,
1470 .float1e3,1256 .float1e3,
1471 .floate1,1257 .floate1,
1472 .fpuv2_sf,1258 .fpuv2_sf,
1473 .hwdiv,1259 .hwdiv,
1474 .mp,1260 .mp,
1475 .nvic,
1476 .trust,1261 .trust,
1477 }),1262 }),
1478 };1263 };
...@@ -1483,14 +1268,12 @@ pub const cpu = struct {...@@ -1483,14 +1268,12 @@ pub const cpu = struct {
1483 .@"3e3r2",1268 .@"3e3r2",
1484 .@"3e3r3",1269 .@"3e3r3",
1485 .btst16,1270 .btst16,
1486 .ck803,
1487 .dspv2,1271 .dspv2,
1488 .float1e3,1272 .float1e3,
1489 .floate1,1273 .floate1,
1490 .fpuv2_sf,1274 .fpuv2_sf,
1491 .hwdiv,1275 .hwdiv,
1492 .mp,1276 .mp,
1493 .nvic,
1494 .trust,1277 .trust,
1495 }),1278 }),
1496 };1279 };
...@@ -1501,14 +1284,12 @@ pub const cpu = struct {...@@ -1501,14 +1284,12 @@ pub const cpu = struct {
1501 .@"3e3r2",1284 .@"3e3r2",
1502 .@"3e3r3",1285 .@"3e3r3",
1503 .btst16,1286 .btst16,
1504 .ck803,
1505 .dspv2,1287 .dspv2,
1506 .float1e3,1288 .float1e3,
1507 .floate1,1289 .floate1,
1508 .fpuv2_sf,1290 .fpuv2_sf,
1509 .hwdiv,1291 .hwdiv,
1510 .mp,1292 .mp,
1511 .nvic,
1512 .trust,1293 .trust,
1513 }),1294 }),
1514 };1295 };
...@@ -1517,10 +1298,8 @@ pub const cpu = struct {...@@ -1517,10 +1298,8 @@ pub const cpu = struct {
1517 .llvm_name = "ck803h",1298 .llvm_name = "ck803h",
1518 .features = featureSet(&[_]Feature{1299 .features = featureSet(&[_]Feature{
1519 .btst16,1300 .btst16,
1520 .ck803,
1521 .hwdiv,1301 .hwdiv,
1522 .mp,1302 .mp,
1523 .nvic,
1524 .trust,1303 .trust,
1525 }),1304 }),
1526 };1305 };
...@@ -1531,11 +1310,9 @@ pub const cpu = struct {...@@ -1531,11 +1310,9 @@ pub const cpu = struct {
1531 .@"3e3r1",1310 .@"3e3r1",
1532 .@"3e3r3",1311 .@"3e3r3",
1533 .btst16,1312 .btst16,
1534 .ck803,
1535 .dspv2,1313 .dspv2,
1536 .hwdiv,1314 .hwdiv,
1537 .mp,1315 .mp,
1538 .nvic,
1539 .trust,1316 .trust,
1540 }),1317 }),
1541 };1318 };
...@@ -1546,11 +1323,9 @@ pub const cpu = struct {...@@ -1546,11 +1323,9 @@ pub const cpu = struct {
1546 .@"3e3r2",1323 .@"3e3r2",
1547 .@"3e3r3",1324 .@"3e3r3",
1548 .btst16,1325 .btst16,
1549 .ck803,
1550 .dspv2,1326 .dspv2,
1551 .hwdiv,1327 .hwdiv,
1552 .mp,1328 .mp,
1553 .nvic,
1554 .trust,1329 .trust,
1555 }),1330 }),
1556 };1331 };
...@@ -1561,11 +1336,9 @@ pub const cpu = struct {...@@ -1561,11 +1336,9 @@ pub const cpu = struct {
1561 .@"3e3r2",1336 .@"3e3r2",
1562 .@"3e3r3",1337 .@"3e3r3",
1563 .btst16,1338 .btst16,
1564 .ck803,
1565 .dspv2,1339 .dspv2,
1566 .hwdiv,1340 .hwdiv,
1567 .mp,1341 .mp,
1568 .nvic,
1569 .trust,1342 .trust,
1570 }),1343 }),
1571 };1344 };
...@@ -1574,10 +1347,8 @@ pub const cpu = struct {...@@ -1574,10 +1347,8 @@ pub const cpu = struct {
1574 .llvm_name = "ck803ht",1347 .llvm_name = "ck803ht",
1575 .features = featureSet(&[_]Feature{1348 .features = featureSet(&[_]Feature{
1576 .btst16,1349 .btst16,
1577 .ck803,
1578 .hwdiv,1350 .hwdiv,
1579 .mp,1351 .mp,
1580 .nvic,
1581 .trust,1352 .trust,
1582 }),1353 }),
1583 };1354 };
...@@ -1588,11 +1359,9 @@ pub const cpu = struct {...@@ -1588,11 +1359,9 @@ pub const cpu = struct {
1588 .@"3e3r1",1359 .@"3e3r1",
1589 .@"3e3r3",1360 .@"3e3r3",
1590 .btst16,1361 .btst16,
1591 .ck803,
1592 .dspv2,1362 .dspv2,
1593 .hwdiv,1363 .hwdiv,
1594 .mp,1364 .mp,
1595 .nvic,
1596 .trust,1365 .trust,
1597 }),1366 }),
1598 };1367 };
...@@ -1603,11 +1372,9 @@ pub const cpu = struct {...@@ -1603,11 +1372,9 @@ pub const cpu = struct {
1603 .@"3e3r2",1372 .@"3e3r2",
1604 .@"3e3r3",1373 .@"3e3r3",
1605 .btst16,1374 .btst16,
1606 .ck803,
1607 .dspv2,1375 .dspv2,
1608 .hwdiv,1376 .hwdiv,
1609 .mp,1377 .mp,
1610 .nvic,
1611 .trust,1378 .trust,
1612 }),1379 }),
1613 };1380 };
...@@ -1618,11 +1385,9 @@ pub const cpu = struct {...@@ -1618,11 +1385,9 @@ pub const cpu = struct {
1618 .@"3e3r2",1385 .@"3e3r2",
1619 .@"3e3r3",1386 .@"3e3r3",
1620 .btst16,1387 .btst16,
1621 .ck803,
1622 .dspv2,1388 .dspv2,
1623 .hwdiv,1389 .hwdiv,
1624 .mp,1390 .mp,
1625 .nvic,
1626 .trust,1391 .trust,
1627 }),1392 }),
1628 };1393 };
...@@ -1633,11 +1398,9 @@ pub const cpu = struct {...@@ -1633,11 +1398,9 @@ pub const cpu = struct {
1633 .@"3e3r1",1398 .@"3e3r1",
1634 .@"3e3r3",1399 .@"3e3r3",
1635 .btst16,1400 .btst16,
1636 .ck803,
1637 .dspv2,1401 .dspv2,
1638 .hwdiv,1402 .hwdiv,
1639 .mp,1403 .mp,
1640 .nvic,
1641 .trust,1404 .trust,
1642 }),1405 }),
1643 };1406 };
...@@ -1648,11 +1411,9 @@ pub const cpu = struct {...@@ -1648,11 +1411,9 @@ pub const cpu = struct {
1648 .@"3e3r2",1411 .@"3e3r2",
1649 .@"3e3r3",1412 .@"3e3r3",
1650 .btst16,1413 .btst16,
1651 .ck803,
1652 .dspv2,1414 .dspv2,
1653 .hwdiv,1415 .hwdiv,
1654 .mp,1416 .mp,
1655 .nvic,
1656 .trust,1417 .trust,
1657 }),1418 }),
1658 };1419 };
...@@ -1663,11 +1424,9 @@ pub const cpu = struct {...@@ -1663,11 +1424,9 @@ pub const cpu = struct {
1663 .@"3e3r2",1424 .@"3e3r2",
1664 .@"3e3r3",1425 .@"3e3r3",
1665 .btst16,1426 .btst16,
1666 .ck803,
1667 .dspv2,1427 .dspv2,
1668 .hwdiv,1428 .hwdiv,
1669 .mp,1429 .mp,
1670 .nvic,
1671 .trust,1430 .trust,
1672 }),1431 }),
1673 };1432 };
...@@ -1677,11 +1436,8 @@ pub const cpu = struct {...@@ -1677,11 +1436,8 @@ pub const cpu = struct {
1677 .features = featureSet(&[_]Feature{1436 .features = featureSet(&[_]Feature{
1678 .@"3e3r1",1437 .@"3e3r1",
1679 .btst16,1438 .btst16,
1680 .ck803,
1681 .ck803s,
1682 .hwdiv,1439 .hwdiv,
1683 .mp,1440 .mp,
1684 .nvic,
1685 .trust,1441 .trust,
1686 }),1442 }),
1687 };1443 };
...@@ -1691,14 +1447,11 @@ pub const cpu = struct {...@@ -1691,14 +1447,11 @@ pub const cpu = struct {
1691 .features = featureSet(&[_]Feature{1447 .features = featureSet(&[_]Feature{
1692 .@"3e3r1",1448 .@"3e3r1",
1693 .btst16,1449 .btst16,
1694 .ck803,
1695 .ck803s,
1696 .dsp1e2,1450 .dsp1e2,
1697 .dspe60,1451 .dspe60,
1698 .edsp,1452 .edsp,
1699 .hwdiv,1453 .hwdiv,
1700 .mp,1454 .mp,
1701 .nvic,
1702 .trust,1455 .trust,
1703 }),1456 }),
1704 };1457 };
...@@ -1708,8 +1461,6 @@ pub const cpu = struct {...@@ -1708,8 +1461,6 @@ pub const cpu = struct {
1708 .features = featureSet(&[_]Feature{1461 .features = featureSet(&[_]Feature{
1709 .@"3e3r1",1462 .@"3e3r1",
1710 .btst16,1463 .btst16,
1711 .ck803,
1712 .ck803s,
1713 .dsp1e2,1464 .dsp1e2,
1714 .dspe60,1465 .dspe60,
1715 .edsp,1466 .edsp,
...@@ -1718,7 +1469,6 @@ pub const cpu = struct {...@@ -1718,7 +1469,6 @@ pub const cpu = struct {
1718 .fpuv2_sf,1469 .fpuv2_sf,
1719 .hwdiv,1470 .hwdiv,
1720 .mp,1471 .mp,
1721 .nvic,
1722 .trust,1472 .trust,
1723 }),1473 }),
1724 };1474 };
...@@ -1728,8 +1478,6 @@ pub const cpu = struct {...@@ -1728,8 +1478,6 @@ pub const cpu = struct {
1728 .features = featureSet(&[_]Feature{1478 .features = featureSet(&[_]Feature{
1729 .@"3e3r1",1479 .@"3e3r1",
1730 .btst16,1480 .btst16,
1731 .ck803,
1732 .ck803s,
1733 .dsp1e2,1481 .dsp1e2,
1734 .dsp_silan,1482 .dsp_silan,
1735 .dspe60,1483 .dspe60,
...@@ -1739,7 +1487,6 @@ pub const cpu = struct {...@@ -1739,7 +1487,6 @@ pub const cpu = struct {
1739 .fpuv2_sf,1487 .fpuv2_sf,
1740 .hwdiv,1488 .hwdiv,
1741 .mp,1489 .mp,
1742 .nvic,
1743 .trust,1490 .trust,
1744 }),1491 }),
1745 };1492 };
...@@ -1749,8 +1496,6 @@ pub const cpu = struct {...@@ -1749,8 +1496,6 @@ pub const cpu = struct {
1749 .features = featureSet(&[_]Feature{1496 .features = featureSet(&[_]Feature{
1750 .@"3e3r1",1497 .@"3e3r1",
1751 .btst16,1498 .btst16,
1752 .ck803,
1753 .ck803s,
1754 .dsp1e2,1499 .dsp1e2,
1755 .dsp_silan,1500 .dsp_silan,
1756 .dspe60,1501 .dspe60,
...@@ -1760,7 +1505,6 @@ pub const cpu = struct {...@@ -1760,7 +1505,6 @@ pub const cpu = struct {
1760 .fpuv2_sf,1505 .fpuv2_sf,
1761 .hwdiv,1506 .hwdiv,
1762 .mp,1507 .mp,
1763 .nvic,
1764 .trust,1508 .trust,
1765 }),1509 }),
1766 };1510 };
...@@ -1770,8 +1514,6 @@ pub const cpu = struct {...@@ -1770,8 +1514,6 @@ pub const cpu = struct {
1770 .features = featureSet(&[_]Feature{1514 .features = featureSet(&[_]Feature{
1771 .@"3e3r1",1515 .@"3e3r1",
1772 .btst16,1516 .btst16,
1773 .ck803,
1774 .ck803s,
1775 .dsp1e2,1517 .dsp1e2,
1776 .dspe60,1518 .dspe60,
1777 .edsp,1519 .edsp,
...@@ -1780,7 +1522,6 @@ pub const cpu = struct {...@@ -1780,7 +1522,6 @@ pub const cpu = struct {
1780 .fpuv2_sf,1522 .fpuv2_sf,
1781 .hwdiv,1523 .hwdiv,
1782 .mp,1524 .mp,
1783 .nvic,
1784 .trust,1525 .trust,
1785 }),1526 }),
1786 };1527 };
...@@ -1790,15 +1531,12 @@ pub const cpu = struct {...@@ -1790,15 +1531,12 @@ pub const cpu = struct {
1790 .features = featureSet(&[_]Feature{1531 .features = featureSet(&[_]Feature{
1791 .@"3e3r1",1532 .@"3e3r1",
1792 .btst16,1533 .btst16,
1793 .ck803,
1794 .ck803s,
1795 .dsp1e2,1534 .dsp1e2,
1796 .dsp_silan,1535 .dsp_silan,
1797 .dspe60,1536 .dspe60,
1798 .edsp,1537 .edsp,
1799 .hwdiv,1538 .hwdiv,
1800 .mp,1539 .mp,
1801 .nvic,
1802 .trust,1540 .trust,
1803 }),1541 }),
1804 };1542 };
...@@ -1808,14 +1546,11 @@ pub const cpu = struct {...@@ -1808,14 +1546,11 @@ pub const cpu = struct {
1808 .features = featureSet(&[_]Feature{1546 .features = featureSet(&[_]Feature{
1809 .@"3e3r1",1547 .@"3e3r1",
1810 .btst16,1548 .btst16,
1811 .ck803,
1812 .ck803s,
1813 .float1e3,1549 .float1e3,
1814 .floate1,1550 .floate1,
1815 .fpuv2_sf,1551 .fpuv2_sf,
1816 .hwdiv,1552 .hwdiv,
1817 .mp,1553 .mp,
1818 .nvic,
1819 .trust,1554 .trust,
1820 }),1555 }),
1821 };1556 };
...@@ -1825,15 +1560,12 @@ pub const cpu = struct {...@@ -1825,15 +1560,12 @@ pub const cpu = struct {
1825 .features = featureSet(&[_]Feature{1560 .features = featureSet(&[_]Feature{
1826 .@"3e3r1",1561 .@"3e3r1",
1827 .btst16,1562 .btst16,
1828 .ck803,
1829 .ck803s,
1830 .dsp_silan,1563 .dsp_silan,
1831 .float1e3,1564 .float1e3,
1832 .floate1,1565 .floate1,
1833 .fpuv2_sf,1566 .fpuv2_sf,
1834 .hwdiv,1567 .hwdiv,
1835 .mp,1568 .mp,
1836 .nvic,
1837 .trust,1569 .trust,
1838 }),1570 }),
1839 };1571 };
...@@ -1843,12 +1575,9 @@ pub const cpu = struct {...@@ -1843,12 +1575,9 @@ pub const cpu = struct {
1843 .features = featureSet(&[_]Feature{1575 .features = featureSet(&[_]Feature{
1844 .@"3e3r1",1576 .@"3e3r1",
1845 .btst16,1577 .btst16,
1846 .ck803,
1847 .ck803s,
1848 .dsp_silan,1578 .dsp_silan,
1849 .hwdiv,1579 .hwdiv,
1850 .mp,1580 .mp,
1851 .nvic,
1852 .trust,1581 .trust,
1853 }),1582 }),
1854 };1583 };
...@@ -1858,12 +1587,9 @@ pub const cpu = struct {...@@ -1858,12 +1587,9 @@ pub const cpu = struct {
1858 .features = featureSet(&[_]Feature{1587 .features = featureSet(&[_]Feature{
1859 .@"3e3r1",1588 .@"3e3r1",
1860 .btst16,1589 .btst16,
1861 .ck803,
1862 .ck803s,
1863 .dsp_silan,1590 .dsp_silan,
1864 .hwdiv,1591 .hwdiv,
1865 .mp,1592 .mp,
1866 .nvic,
1867 .trust,1593 .trust,
1868 }),1594 }),
1869 };1595 };
...@@ -1873,11 +1599,8 @@ pub const cpu = struct {...@@ -1873,11 +1599,8 @@ pub const cpu = struct {
1873 .features = featureSet(&[_]Feature{1599 .features = featureSet(&[_]Feature{
1874 .@"3e3r1",1600 .@"3e3r1",
1875 .btst16,1601 .btst16,
1876 .ck803,
1877 .ck803s,
1878 .hwdiv,1602 .hwdiv,
1879 .mp,1603 .mp,
1880 .nvic,
1881 .trust,1604 .trust,
1882 }),1605 }),
1883 };1606 };
...@@ -1886,10 +1609,8 @@ pub const cpu = struct {...@@ -1886,10 +1609,8 @@ pub const cpu = struct {
1886 .llvm_name = "ck803t",1609 .llvm_name = "ck803t",
1887 .features = featureSet(&[_]Feature{1610 .features = featureSet(&[_]Feature{
1888 .btst16,1611 .btst16,
1889 .ck803,
1890 .hwdiv,1612 .hwdiv,
1891 .mp,1613 .mp,
1892 .nvic,
1893 .trust,1614 .trust,
1894 }),1615 }),
1895 };1616 };
...@@ -1900,11 +1621,9 @@ pub const cpu = struct {...@@ -1900,11 +1621,9 @@ pub const cpu = struct {
1900 .@"3e3r1",1621 .@"3e3r1",
1901 .@"3e3r3",1622 .@"3e3r3",
1902 .btst16,1623 .btst16,
1903 .ck803,
1904 .dspv2,1624 .dspv2,
1905 .hwdiv,1625 .hwdiv,
1906 .mp,1626 .mp,
1907 .nvic,
1908 .trust,1627 .trust,
1909 }),1628 }),
1910 };1629 };
...@@ -1915,11 +1634,9 @@ pub const cpu = struct {...@@ -1915,11 +1634,9 @@ pub const cpu = struct {
1915 .@"3e3r2",1634 .@"3e3r2",
1916 .@"3e3r3",1635 .@"3e3r3",
1917 .btst16,1636 .btst16,
1918 .ck803,
1919 .dspv2,1637 .dspv2,
1920 .hwdiv,1638 .hwdiv,
1921 .mp,1639 .mp,
1922 .nvic,
1923 .trust,1640 .trust,
1924 }),1641 }),
1925 };1642 };
...@@ -1930,11 +1647,9 @@ pub const cpu = struct {...@@ -1930,11 +1647,9 @@ pub const cpu = struct {
1930 .@"3e3r2",1647 .@"3e3r2",
1931 .@"3e3r3",1648 .@"3e3r3",
1932 .btst16,1649 .btst16,
1933 .ck803,
1934 .dspv2,1650 .dspv2,
1935 .hwdiv,1651 .hwdiv,
1936 .mp,1652 .mp,
1937 .nvic,
1938 .trust,1653 .trust,
1939 }),1654 }),
1940 };1655 };
...@@ -1945,11 +1660,8 @@ pub const cpu = struct {...@@ -1945,11 +1660,8 @@ pub const cpu = struct {
1945 .@"3e3r2",1660 .@"3e3r2",
1946 .@"3e3r3",1661 .@"3e3r3",
1947 .btst16,1662 .btst16,
1948 .ck803,
1949 .ck804,
1950 .hwdiv,1663 .hwdiv,
1951 .mp,1664 .mp,
1952 .nvic,
1953 .trust,1665 .trust,
1954 }),1666 }),
1955 };1667 };
...@@ -1960,13 +1672,10 @@ pub const cpu = struct {...@@ -1960,13 +1672,10 @@ pub const cpu = struct {
1960 .@"3e3r2",1672 .@"3e3r2",
1961 .@"3e3r3",1673 .@"3e3r3",
1962 .btst16,1674 .btst16,
1963 .ck803,
1964 .ck804,
1965 .dspv2,1675 .dspv2,
1966 .high_registers,1676 .high_registers,
1967 .hwdiv,1677 .hwdiv,
1968 .mp,1678 .mp,
1969 .nvic,
1970 .trust,1679 .trust,
1971 }),1680 }),
1972 };1681 };
...@@ -1977,8 +1686,6 @@ pub const cpu = struct {...@@ -1977,8 +1686,6 @@ pub const cpu = struct {
1977 .@"3e3r2",1686 .@"3e3r2",
1978 .@"3e3r3",1687 .@"3e3r3",
1979 .btst16,1688 .btst16,
1980 .ck803,
1981 .ck804,
1982 .dspv2,1689 .dspv2,
1983 .float1e3,1690 .float1e3,
1984 .floate1,1691 .floate1,
...@@ -1986,7 +1693,6 @@ pub const cpu = struct {...@@ -1986,7 +1693,6 @@ pub const cpu = struct {
1986 .high_registers,1693 .high_registers,
1987 .hwdiv,1694 .hwdiv,
1988 .mp,1695 .mp,
1989 .nvic,
1990 .trust,1696 .trust,
1991 }),1697 }),
1992 };1698 };
...@@ -1997,8 +1703,6 @@ pub const cpu = struct {...@@ -1997,8 +1703,6 @@ pub const cpu = struct {
1997 .@"3e3r2",1703 .@"3e3r2",
1998 .@"3e3r3",1704 .@"3e3r3",
1999 .btst16,1705 .btst16,
2000 .ck803,
2001 .ck804,
2002 .dspv2,1706 .dspv2,
2003 .float1e3,1707 .float1e3,
2004 .floate1,1708 .floate1,
...@@ -2006,7 +1710,6 @@ pub const cpu = struct {...@@ -2006,7 +1710,6 @@ pub const cpu = struct {
2006 .high_registers,1710 .high_registers,
2007 .hwdiv,1711 .hwdiv,
2008 .mp,1712 .mp,
2009 .nvic,
2010 .trust,1713 .trust,
2011 }),1714 }),
2012 };1715 };
...@@ -2017,8 +1720,6 @@ pub const cpu = struct {...@@ -2017,8 +1720,6 @@ pub const cpu = struct {
2017 .@"3e3r2",1720 .@"3e3r2",
2018 .@"3e3r3",1721 .@"3e3r3",
2019 .btst16,1722 .btst16,
2020 .ck803,
2021 .ck804,
2022 .dspv2,1723 .dspv2,
2023 .float1e3,1724 .float1e3,
2024 .floate1,1725 .floate1,
...@@ -2026,7 +1727,6 @@ pub const cpu = struct {...@@ -2026,7 +1727,6 @@ pub const cpu = struct {
2026 .high_registers,1727 .high_registers,
2027 .hwdiv,1728 .hwdiv,
2028 .mp,1729 .mp,
2029 .nvic,
2030 .trust,1730 .trust,
2031 }),1731 }),
2032 };1732 };
...@@ -2037,8 +1737,6 @@ pub const cpu = struct {...@@ -2037,8 +1737,6 @@ pub const cpu = struct {
2037 .@"3e3r2",1737 .@"3e3r2",
2038 .@"3e3r3",1738 .@"3e3r3",
2039 .btst16,1739 .btst16,
2040 .ck803,
2041 .ck804,
2042 .dspv2,1740 .dspv2,
2043 .float1e3,1741 .float1e3,
2044 .floate1,1742 .floate1,
...@@ -2046,7 +1744,6 @@ pub const cpu = struct {...@@ -2046,7 +1744,6 @@ pub const cpu = struct {
2046 .high_registers,1744 .high_registers,
2047 .hwdiv,1745 .hwdiv,
2048 .mp,1746 .mp,
2049 .nvic,
2050 .trust,1747 .trust,
2051 }),1748 }),
2052 };1749 };
...@@ -2057,13 +1754,10 @@ pub const cpu = struct {...@@ -2057,13 +1754,10 @@ pub const cpu = struct {
2057 .@"3e3r2",1754 .@"3e3r2",
2058 .@"3e3r3",1755 .@"3e3r3",
2059 .btst16,1756 .btst16,
2060 .ck803,
2061 .ck804,
2062 .dspv2,1757 .dspv2,
2063 .high_registers,1758 .high_registers,
2064 .hwdiv,1759 .hwdiv,
2065 .mp,1760 .mp,
2066 .nvic,
2067 .trust,1761 .trust,
2068 }),1762 }),
2069 };1763 };
...@@ -2074,13 +1768,10 @@ pub const cpu = struct {...@@ -2074,13 +1768,10 @@ pub const cpu = struct {
2074 .@"3e3r2",1768 .@"3e3r2",
2075 .@"3e3r3",1769 .@"3e3r3",
2076 .btst16,1770 .btst16,
2077 .ck803,
2078 .ck804,
2079 .dspv2,1771 .dspv2,
2080 .high_registers,1772 .high_registers,
2081 .hwdiv,1773 .hwdiv,
2082 .mp,1774 .mp,
2083 .nvic,
2084 .trust,1775 .trust,
2085 }),1776 }),
2086 };1777 };
...@@ -2091,13 +1782,10 @@ pub const cpu = struct {...@@ -2091,13 +1782,10 @@ pub const cpu = struct {
2091 .@"3e3r2",1782 .@"3e3r2",
2092 .@"3e3r3",1783 .@"3e3r3",
2093 .btst16,1784 .btst16,
2094 .ck803,
2095 .ck804,
2096 .dspv2,1785 .dspv2,
2097 .high_registers,1786 .high_registers,
2098 .hwdiv,1787 .hwdiv,
2099 .mp,1788 .mp,
2100 .nvic,
2101 .trust,1789 .trust,
2102 }),1790 }),
2103 };1791 };
...@@ -2108,14 +1796,11 @@ pub const cpu = struct {...@@ -2108,14 +1796,11 @@ pub const cpu = struct {
2108 .@"3e3r2",1796 .@"3e3r2",
2109 .@"3e3r3",1797 .@"3e3r3",
2110 .btst16,1798 .btst16,
2111 .ck803,
2112 .ck804,
2113 .float1e3,1799 .float1e3,
2114 .floate1,1800 .floate1,
2115 .fpuv2_sf,1801 .fpuv2_sf,
2116 .hwdiv,1802 .hwdiv,
2117 .mp,1803 .mp,
2118 .nvic,
2119 .trust,1804 .trust,
2120 }),1805 }),
2121 };1806 };
...@@ -2126,14 +1811,11 @@ pub const cpu = struct {...@@ -2126,14 +1811,11 @@ pub const cpu = struct {
2126 .@"3e3r2",1811 .@"3e3r2",
2127 .@"3e3r3",1812 .@"3e3r3",
2128 .btst16,1813 .btst16,
2129 .ck803,
2130 .ck804,
2131 .float1e3,1814 .float1e3,
2132 .floate1,1815 .floate1,
2133 .fpuv2_sf,1816 .fpuv2_sf,
2134 .hwdiv,1817 .hwdiv,
2135 .mp,1818 .mp,
2136 .nvic,
2137 .trust,1819 .trust,
2138 }),1820 }),
2139 };1821 };
...@@ -2144,14 +1826,11 @@ pub const cpu = struct {...@@ -2144,14 +1826,11 @@ pub const cpu = struct {
2144 .@"3e3r2",1826 .@"3e3r2",
2145 .@"3e3r3",1827 .@"3e3r3",
2146 .btst16,1828 .btst16,
2147 .ck803,
2148 .ck804,
2149 .float1e3,1829 .float1e3,
2150 .floate1,1830 .floate1,
2151 .fpuv2_sf,1831 .fpuv2_sf,
2152 .hwdiv,1832 .hwdiv,
2153 .mp,1833 .mp,
2154 .nvic,
2155 .trust,1834 .trust,
2156 }),1835 }),
2157 };1836 };
...@@ -2162,11 +1841,8 @@ pub const cpu = struct {...@@ -2162,11 +1841,8 @@ pub const cpu = struct {
2162 .@"3e3r2",1841 .@"3e3r2",
2163 .@"3e3r3",1842 .@"3e3r3",
2164 .btst16,1843 .btst16,
2165 .ck803,
2166 .ck804,
2167 .hwdiv,1844 .hwdiv,
2168 .mp,1845 .mp,
2169 .nvic,
2170 .trust,1846 .trust,
2171 }),1847 }),
2172 };1848 };
...@@ -2177,11 +1853,8 @@ pub const cpu = struct {...@@ -2177,11 +1853,8 @@ pub const cpu = struct {
2177 .@"3e3r2",1853 .@"3e3r2",
2178 .@"3e3r3",1854 .@"3e3r3",
2179 .btst16,1855 .btst16,
2180 .ck803,
2181 .ck804,
2182 .hwdiv,1856 .hwdiv,
2183 .mp,1857 .mp,
2184 .nvic,
2185 .trust,1858 .trust,
2186 }),1859 }),
2187 };1860 };
...@@ -2192,11 +1865,8 @@ pub const cpu = struct {...@@ -2192,11 +1865,8 @@ pub const cpu = struct {
2192 .@"3e3r2",1865 .@"3e3r2",
2193 .@"3e3r3",1866 .@"3e3r3",
2194 .btst16,1867 .btst16,
2195 .ck803,
2196 .ck804,
2197 .hwdiv,1868 .hwdiv,
2198 .mp,1869 .mp,
2199 .nvic,
2200 .trust,1870 .trust,
2201 }),1871 }),
2202 };1872 };
...@@ -2207,12 +1877,9 @@ pub const cpu = struct {...@@ -2207,12 +1877,9 @@ pub const cpu = struct {
2207 .@"3e3r2",1877 .@"3e3r2",
2208 .@"3e3r3",1878 .@"3e3r3",
2209 .btst16,1879 .btst16,
2210 .ck803,
2211 .ck805,
2212 .high_registers,1880 .high_registers,
2213 .hwdiv,1881 .hwdiv,
2214 .mp,1882 .mp,
2215 .nvic,
2216 .trust,1883 .trust,
2217 .vdsp2e3,1884 .vdsp2e3,
2218 .vdspv2,1885 .vdspv2,
...@@ -2225,13 +1892,10 @@ pub const cpu = struct {...@@ -2225,13 +1892,10 @@ pub const cpu = struct {
2225 .@"3e3r2",1892 .@"3e3r2",
2226 .@"3e3r3",1893 .@"3e3r3",
2227 .btst16,1894 .btst16,
2228 .ck803,
2229 .ck805,
2230 .dspv2,1895 .dspv2,
2231 .high_registers,1896 .high_registers,
2232 .hwdiv,1897 .hwdiv,
2233 .mp,1898 .mp,
2234 .nvic,
2235 .trust,1899 .trust,
2236 .vdsp2e3,1900 .vdsp2e3,
2237 .vdspv2,1901 .vdspv2,
...@@ -2244,8 +1908,6 @@ pub const cpu = struct {...@@ -2244,8 +1908,6 @@ pub const cpu = struct {
2244 .@"3e3r2",1908 .@"3e3r2",
2245 .@"3e3r3",1909 .@"3e3r3",
2246 .btst16,1910 .btst16,
2247 .ck803,
2248 .ck805,
2249 .dspv2,1911 .dspv2,
2250 .float1e3,1912 .float1e3,
2251 .floate1,1913 .floate1,
...@@ -2253,7 +1915,6 @@ pub const cpu = struct {...@@ -2253,7 +1915,6 @@ pub const cpu = struct {
2253 .high_registers,1915 .high_registers,
2254 .hwdiv,1916 .hwdiv,
2255 .mp,1917 .mp,
2256 .nvic,
2257 .trust,1918 .trust,
2258 .vdsp2e3,1919 .vdsp2e3,
2259 .vdspv2,1920 .vdspv2,
...@@ -2266,8 +1927,6 @@ pub const cpu = struct {...@@ -2266,8 +1927,6 @@ pub const cpu = struct {
2266 .@"3e3r2",1927 .@"3e3r2",
2267 .@"3e3r3",1928 .@"3e3r3",
2268 .btst16,1929 .btst16,
2269 .ck803,
2270 .ck805,
2271 .dspv2,1930 .dspv2,
2272 .float1e3,1931 .float1e3,
2273 .floate1,1932 .floate1,
...@@ -2275,7 +1934,6 @@ pub const cpu = struct {...@@ -2275,7 +1934,6 @@ pub const cpu = struct {
2275 .high_registers,1934 .high_registers,
2276 .hwdiv,1935 .hwdiv,
2277 .mp,1936 .mp,
2278 .nvic,
2279 .trust,1937 .trust,
2280 .vdsp2e3,1938 .vdsp2e3,
2281 .vdspv2,1939 .vdspv2,
...@@ -2288,13 +1946,10 @@ pub const cpu = struct {...@@ -2288,13 +1946,10 @@ pub const cpu = struct {
2288 .@"3e3r2",1946 .@"3e3r2",
2289 .@"3e3r3",1947 .@"3e3r3",
2290 .btst16,1948 .btst16,
2291 .ck803,
2292 .ck805,
2293 .dspv2,1949 .dspv2,
2294 .high_registers,1950 .high_registers,
2295 .hwdiv,1951 .hwdiv,
2296 .mp,1952 .mp,
2297 .nvic,
2298 .trust,1953 .trust,
2299 .vdsp2e3,1954 .vdsp2e3,
2300 .vdspv2,1955 .vdspv2,
...@@ -2307,15 +1962,12 @@ pub const cpu = struct {...@@ -2307,15 +1962,12 @@ pub const cpu = struct {
2307 .@"3e3r2",1962 .@"3e3r2",
2308 .@"3e3r3",1963 .@"3e3r3",
2309 .btst16,1964 .btst16,
2310 .ck803,
2311 .ck805,
2312 .float1e3,1965 .float1e3,
2313 .floate1,1966 .floate1,
2314 .fpuv2_sf,1967 .fpuv2_sf,
2315 .high_registers,1968 .high_registers,
2316 .hwdiv,1969 .hwdiv,
2317 .mp,1970 .mp,
2318 .nvic,
2319 .trust,1971 .trust,
2320 .vdsp2e3,1972 .vdsp2e3,
2321 .vdspv2,1973 .vdspv2,
...@@ -2328,15 +1980,12 @@ pub const cpu = struct {...@@ -2328,15 +1980,12 @@ pub const cpu = struct {
2328 .@"3e3r2",1980 .@"3e3r2",
2329 .@"3e3r3",1981 .@"3e3r3",
2330 .btst16,1982 .btst16,
2331 .ck803,
2332 .ck805,
2333 .float1e3,1983 .float1e3,
2334 .floate1,1984 .floate1,
2335 .fpuv2_sf,1985 .fpuv2_sf,
2336 .high_registers,1986 .high_registers,
2337 .hwdiv,1987 .hwdiv,
2338 .mp,1988 .mp,
2339 .nvic,
2340 .trust,1989 .trust,
2341 .vdsp2e3,1990 .vdsp2e3,
2342 .vdspv2,1991 .vdspv2,
...@@ -2349,12 +1998,9 @@ pub const cpu = struct {...@@ -2349,12 +1998,9 @@ pub const cpu = struct {
2349 .@"3e3r2",1998 .@"3e3r2",
2350 .@"3e3r3",1999 .@"3e3r3",
2351 .btst16,2000 .btst16,
2352 .ck803,
2353 .ck805,
2354 .high_registers,2001 .high_registers,
2355 .hwdiv,2002 .hwdiv,
2356 .mp,2003 .mp,
2357 .nvic,
2358 .trust,2004 .trust,
2359 .vdsp2e3,2005 .vdsp2e3,
2360 .vdspv2,2006 .vdspv2,
...@@ -2365,7 +2011,6 @@ pub const cpu = struct {...@@ -2365,7 +2011,6 @@ pub const cpu = struct {
2365 .llvm_name = "ck807",2011 .llvm_name = "ck807",
2366 .features = featureSet(&[_]Feature{2012 .features = featureSet(&[_]Feature{
2367 .cache,2013 .cache,
2368 .ck807,
2369 .dsp1e2,2014 .dsp1e2,
2370 .dspe60,2015 .dspe60,
2371 .edsp,2016 .edsp,
...@@ -2374,7 +2019,6 @@ pub const cpu = struct {...@@ -2374,7 +2019,6 @@ pub const cpu = struct {
2374 .hwdiv,2019 .hwdiv,
2375 .mp,2020 .mp,
2376 .mp1e2,2021 .mp1e2,
2377 .nvic,
2378 .trust,2022 .trust,
2379 }),2023 }),
2380 };2024 };
...@@ -2383,7 +2027,6 @@ pub const cpu = struct {...@@ -2383,7 +2027,6 @@ pub const cpu = struct {
2383 .llvm_name = "ck807e",2027 .llvm_name = "ck807e",
2384 .features = featureSet(&[_]Feature{2028 .features = featureSet(&[_]Feature{
2385 .cache,2029 .cache,
2386 .ck807,
2387 .dsp1e2,2030 .dsp1e2,
2388 .dspe60,2031 .dspe60,
2389 .edsp,2032 .edsp,
...@@ -2392,7 +2035,6 @@ pub const cpu = struct {...@@ -2392,7 +2035,6 @@ pub const cpu = struct {
2392 .hwdiv,2035 .hwdiv,
2393 .mp,2036 .mp,
2394 .mp1e2,2037 .mp1e2,
2395 .nvic,
2396 .trust,2038 .trust,
2397 }),2039 }),
2398 };2040 };
...@@ -2401,7 +2043,6 @@ pub const cpu = struct {...@@ -2401,7 +2043,6 @@ pub const cpu = struct {
2401 .llvm_name = "ck807ef",2043 .llvm_name = "ck807ef",
2402 .features = featureSet(&[_]Feature{2044 .features = featureSet(&[_]Feature{
2403 .cache,2045 .cache,
2404 .ck807,
2405 .dsp1e2,2046 .dsp1e2,
2406 .dspe60,2047 .dspe60,
2407 .edsp,2048 .edsp,
...@@ -2417,7 +2058,6 @@ pub const cpu = struct {...@@ -2417,7 +2058,6 @@ pub const cpu = struct {
2417 .hwdiv,2058 .hwdiv,
2418 .mp,2059 .mp,
2419 .mp1e2,2060 .mp1e2,
2420 .nvic,
2421 .trust,2061 .trust,
2422 }),2062 }),
2423 };2063 };
...@@ -2426,7 +2066,6 @@ pub const cpu = struct {...@@ -2426,7 +2066,6 @@ pub const cpu = struct {
2426 .llvm_name = "ck807f",2066 .llvm_name = "ck807f",
2427 .features = featureSet(&[_]Feature{2067 .features = featureSet(&[_]Feature{
2428 .cache,2068 .cache,
2429 .ck807,
2430 .dsp1e2,2069 .dsp1e2,
2431 .dspe60,2070 .dspe60,
2432 .edsp,2071 .edsp,
...@@ -2442,7 +2081,6 @@ pub const cpu = struct {...@@ -2442,7 +2081,6 @@ pub const cpu = struct {
2442 .hwdiv,2081 .hwdiv,
2443 .mp,2082 .mp,
2444 .mp1e2,2083 .mp1e2,
2445 .nvic,
2446 .trust,2084 .trust,
2447 }),2085 }),
2448 };2086 };
...@@ -2452,7 +2090,6 @@ pub const cpu = struct {...@@ -2452,7 +2090,6 @@ pub const cpu = struct {
2452 .features = featureSet(&[_]Feature{2090 .features = featureSet(&[_]Feature{
2453 .@"7e10",2091 .@"7e10",
2454 .cache,2092 .cache,
2455 .ck810,
2456 .dsp1e2,2093 .dsp1e2,
2457 .dspe60,2094 .dspe60,
2458 .edsp,2095 .edsp,
...@@ -2461,7 +2098,6 @@ pub const cpu = struct {...@@ -2461,7 +2098,6 @@ pub const cpu = struct {
2461 .hwdiv,2098 .hwdiv,
2462 .mp,2099 .mp,
2463 .mp1e2,2100 .mp1e2,
2464 .nvic,
2465 .trust,2101 .trust,
2466 }),2102 }),
2467 };2103 };
...@@ -2471,7 +2107,6 @@ pub const cpu = struct {...@@ -2471,7 +2107,6 @@ pub const cpu = struct {
2471 .features = featureSet(&[_]Feature{2107 .features = featureSet(&[_]Feature{
2472 .@"7e10",2108 .@"7e10",
2473 .cache,2109 .cache,
2474 .ck810,
2475 .dsp1e2,2110 .dsp1e2,
2476 .dspe60,2111 .dspe60,
2477 .edsp,2112 .edsp,
...@@ -2480,7 +2115,6 @@ pub const cpu = struct {...@@ -2480,7 +2115,6 @@ pub const cpu = struct {
2480 .hwdiv,2115 .hwdiv,
2481 .mp,2116 .mp,
2482 .mp1e2,2117 .mp1e2,
2483 .nvic,
2484 .trust,2118 .trust,
2485 }),2119 }),
2486 };2120 };
...@@ -2490,7 +2124,6 @@ pub const cpu = struct {...@@ -2490,7 +2124,6 @@ pub const cpu = struct {
2490 .features = featureSet(&[_]Feature{2124 .features = featureSet(&[_]Feature{
2491 .@"7e10",2125 .@"7e10",
2492 .cache,2126 .cache,
2493 .ck810,
2494 .dsp1e2,2127 .dsp1e2,
2495 .dspe60,2128 .dspe60,
2496 .edsp,2129 .edsp,
...@@ -2504,7 +2137,6 @@ pub const cpu = struct {...@@ -2504,7 +2137,6 @@ pub const cpu = struct {
2504 .hwdiv,2137 .hwdiv,
2505 .mp,2138 .mp,
2506 .mp1e2,2139 .mp1e2,
2507 .nvic,
2508 .trust,2140 .trust,
2509 }),2141 }),
2510 };2142 };
...@@ -2514,7 +2146,6 @@ pub const cpu = struct {...@@ -2514,7 +2146,6 @@ pub const cpu = struct {
2514 .features = featureSet(&[_]Feature{2146 .features = featureSet(&[_]Feature{
2515 .@"7e10",2147 .@"7e10",
2516 .cache,2148 .cache,
2517 .ck810,
2518 .dsp1e2,2149 .dsp1e2,
2519 .dspe60,2150 .dspe60,
2520 .edsp,2151 .edsp,
...@@ -2528,7 +2159,6 @@ pub const cpu = struct {...@@ -2528,7 +2159,6 @@ pub const cpu = struct {
2528 .hwdiv,2159 .hwdiv,
2529 .mp,2160 .mp,
2530 .mp1e2,2161 .mp1e2,
2531 .nvic,
2532 .trust,2162 .trust,
2533 }),2163 }),
2534 };2164 };
...@@ -2538,8 +2168,6 @@ pub const cpu = struct {...@@ -2538,8 +2168,6 @@ pub const cpu = struct {
2538 .features = featureSet(&[_]Feature{2168 .features = featureSet(&[_]Feature{
2539 .@"7e10",2169 .@"7e10",
2540 .cache,2170 .cache,
2541 .ck810,
2542 .ck810v,
2543 .dsp1e2,2171 .dsp1e2,
2544 .dspe60,2172 .dspe60,
2545 .edsp,2173 .edsp,
...@@ -2553,7 +2181,6 @@ pub const cpu = struct {...@@ -2553,7 +2181,6 @@ pub const cpu = struct {
2553 .hwdiv,2181 .hwdiv,
2554 .mp,2182 .mp,
2555 .mp1e2,2183 .mp1e2,
2556 .nvic,
2557 .trust,2184 .trust,
2558 .vdspv1,2185 .vdspv1,
2559 }),2186 }),
...@@ -2564,8 +2191,6 @@ pub const cpu = struct {...@@ -2564,8 +2191,6 @@ pub const cpu = struct {
2564 .features = featureSet(&[_]Feature{2191 .features = featureSet(&[_]Feature{
2565 .@"7e10",2192 .@"7e10",
2566 .cache,2193 .cache,
2567 .ck810,
2568 .ck810v,
2569 .dsp1e2,2194 .dsp1e2,
2570 .dspe60,2195 .dspe60,
2571 .edsp,2196 .edsp,
...@@ -2579,7 +2204,6 @@ pub const cpu = struct {...@@ -2579,7 +2204,6 @@ pub const cpu = struct {
2579 .hwdiv,2204 .hwdiv,
2580 .mp,2205 .mp,
2581 .mp1e2,2206 .mp1e2,
2582 .nvic,
2583 .trust,2207 .trust,
2584 .vdspv1,2208 .vdspv1,
2585 }),2209 }),
...@@ -2590,7 +2214,6 @@ pub const cpu = struct {...@@ -2590,7 +2214,6 @@ pub const cpu = struct {
2590 .features = featureSet(&[_]Feature{2214 .features = featureSet(&[_]Feature{
2591 .@"7e10",2215 .@"7e10",
2592 .cache,2216 .cache,
2593 .ck810,
2594 .dsp1e2,2217 .dsp1e2,
2595 .dspe60,2218 .dspe60,
2596 .edsp,2219 .edsp,
...@@ -2599,7 +2222,6 @@ pub const cpu = struct {...@@ -2599,7 +2222,6 @@ pub const cpu = struct {
2599 .hwdiv,2222 .hwdiv,
2600 .mp,2223 .mp,
2601 .mp1e2,2224 .mp1e2,
2602 .nvic,
2603 .trust,2225 .trust,
2604 }),2226 }),
2605 };2227 };
...@@ -2609,8 +2231,6 @@ pub const cpu = struct {...@@ -2609,8 +2231,6 @@ pub const cpu = struct {
2609 .features = featureSet(&[_]Feature{2231 .features = featureSet(&[_]Feature{
2610 .@"7e10",2232 .@"7e10",
2611 .cache,2233 .cache,
2612 .ck810,
2613 .ck810v,
2614 .dsp1e2,2234 .dsp1e2,
2615 .dspe60,2235 .dspe60,
2616 .edsp,2236 .edsp,
...@@ -2619,7 +2239,6 @@ pub const cpu = struct {...@@ -2619,7 +2239,6 @@ pub const cpu = struct {
2619 .hwdiv,2239 .hwdiv,
2620 .mp,2240 .mp,
2621 .mp1e2,2241 .mp1e2,
2622 .nvic,
2623 .trust,2242 .trust,
2624 .vdspv1,2243 .vdspv1,
2625 }),2244 }),
...@@ -2630,8 +2249,6 @@ pub const cpu = struct {...@@ -2630,8 +2249,6 @@ pub const cpu = struct {
2630 .features = featureSet(&[_]Feature{2249 .features = featureSet(&[_]Feature{
2631 .@"7e10",2250 .@"7e10",
2632 .cache,2251 .cache,
2633 .ck810,
2634 .ck810v,
2635 .dsp1e2,2252 .dsp1e2,
2636 .dspe60,2253 .dspe60,
2637 .edsp,2254 .edsp,
...@@ -2640,7 +2257,6 @@ pub const cpu = struct {...@@ -2640,7 +2257,6 @@ pub const cpu = struct {
2640 .hwdiv,2257 .hwdiv,
2641 .mp,2258 .mp,
2642 .mp1e2,2259 .mp1e2,
2643 .nvic,
2644 .trust,2260 .trust,
2645 .vdspv1,2261 .vdspv1,
2646 }),2262 }),
...@@ -2651,7 +2267,6 @@ pub const cpu = struct {...@@ -2651,7 +2267,6 @@ pub const cpu = struct {
2651 .features = featureSet(&[_]Feature{2267 .features = featureSet(&[_]Feature{
2652 .@"7e10",2268 .@"7e10",
2653 .cache,2269 .cache,
2654 .ck810,
2655 .dsp1e2,2270 .dsp1e2,
2656 .dspe60,2271 .dspe60,
2657 .edsp,2272 .edsp,
...@@ -2665,7 +2280,6 @@ pub const cpu = struct {...@@ -2665,7 +2280,6 @@ pub const cpu = struct {
2665 .hwdiv,2280 .hwdiv,
2666 .mp,2281 .mp,
2667 .mp1e2,2282 .mp1e2,
2668 .nvic,
2669 .trust,2283 .trust,
2670 }),2284 }),
2671 };2285 };
...@@ -2675,7 +2289,6 @@ pub const cpu = struct {...@@ -2675,7 +2289,6 @@ pub const cpu = struct {
2675 .features = featureSet(&[_]Feature{2289 .features = featureSet(&[_]Feature{
2676 .@"7e10",2290 .@"7e10",
2677 .cache,2291 .cache,
2678 .ck810,
2679 .dsp1e2,2292 .dsp1e2,
2680 .dspe60,2293 .dspe60,
2681 .edsp,2294 .edsp,
...@@ -2689,7 +2302,6 @@ pub const cpu = struct {...@@ -2689,7 +2302,6 @@ pub const cpu = struct {
2689 .hwdiv,2302 .hwdiv,
2690 .mp,2303 .mp,
2691 .mp1e2,2304 .mp1e2,
2692 .nvic,
2693 .trust,2305 .trust,
2694 }),2306 }),
2695 };2307 };
...@@ -2699,8 +2311,6 @@ pub const cpu = struct {...@@ -2699,8 +2311,6 @@ pub const cpu = struct {
2699 .features = featureSet(&[_]Feature{2311 .features = featureSet(&[_]Feature{
2700 .@"7e10",2312 .@"7e10",
2701 .cache,2313 .cache,
2702 .ck810,
2703 .ck810v,
2704 .dsp1e2,2314 .dsp1e2,
2705 .dspe60,2315 .dspe60,
2706 .edsp,2316 .edsp,
...@@ -2714,7 +2324,6 @@ pub const cpu = struct {...@@ -2714,7 +2324,6 @@ pub const cpu = struct {
2714 .hwdiv,2324 .hwdiv,
2715 .mp,2325 .mp,
2716 .mp1e2,2326 .mp1e2,
2717 .nvic,
2718 .trust,2327 .trust,
2719 .vdspv1,2328 .vdspv1,
2720 }),2329 }),
...@@ -2725,8 +2334,6 @@ pub const cpu = struct {...@@ -2725,8 +2334,6 @@ pub const cpu = struct {
2725 .features = featureSet(&[_]Feature{2334 .features = featureSet(&[_]Feature{
2726 .@"7e10",2335 .@"7e10",
2727 .cache,2336 .cache,
2728 .ck810,
2729 .ck810v,
2730 .dsp1e2,2337 .dsp1e2,
2731 .dspe60,2338 .dspe60,
2732 .edsp,2339 .edsp,
...@@ -2740,7 +2347,6 @@ pub const cpu = struct {...@@ -2740,7 +2347,6 @@ pub const cpu = struct {
2740 .hwdiv,2347 .hwdiv,
2741 .mp,2348 .mp,
2742 .mp1e2,2349 .mp1e2,
2743 .nvic,
2744 .trust,2350 .trust,
2745 .vdspv1,2351 .vdspv1,
2746 }),2352 }),
...@@ -2751,7 +2357,6 @@ pub const cpu = struct {...@@ -2751,7 +2357,6 @@ pub const cpu = struct {
2751 .features = featureSet(&[_]Feature{2357 .features = featureSet(&[_]Feature{
2752 .@"7e10",2358 .@"7e10",
2753 .cache,2359 .cache,
2754 .ck810,
2755 .dsp1e2,2360 .dsp1e2,
2756 .dspe60,2361 .dspe60,
2757 .edsp,2362 .edsp,
...@@ -2760,7 +2365,6 @@ pub const cpu = struct {...@@ -2760,7 +2365,6 @@ pub const cpu = struct {
2760 .hwdiv,2365 .hwdiv,
2761 .mp,2366 .mp,
2762 .mp1e2,2367 .mp1e2,
2763 .nvic,
2764 .trust,2368 .trust,
2765 }),2369 }),
2766 };2370 };
...@@ -2770,8 +2374,6 @@ pub const cpu = struct {...@@ -2770,8 +2374,6 @@ pub const cpu = struct {
2770 .features = featureSet(&[_]Feature{2374 .features = featureSet(&[_]Feature{
2771 .@"7e10",2375 .@"7e10",
2772 .cache,2376 .cache,
2773 .ck810,
2774 .ck810v,
2775 .dsp1e2,2377 .dsp1e2,
2776 .dspe60,2378 .dspe60,
2777 .edsp,2379 .edsp,
...@@ -2780,7 +2382,6 @@ pub const cpu = struct {...@@ -2780,7 +2382,6 @@ pub const cpu = struct {
2780 .hwdiv,2382 .hwdiv,
2781 .mp,2383 .mp,
2782 .mp1e2,2384 .mp1e2,
2783 .nvic,
2784 .trust,2385 .trust,
2785 .vdspv1,2386 .vdspv1,
2786 }),2387 }),
...@@ -2791,8 +2392,6 @@ pub const cpu = struct {...@@ -2791,8 +2392,6 @@ pub const cpu = struct {
2791 .features = featureSet(&[_]Feature{2392 .features = featureSet(&[_]Feature{
2792 .@"7e10",2393 .@"7e10",
2793 .cache,2394 .cache,
2794 .ck810,
2795 .ck810v,
2796 .dsp1e2,2395 .dsp1e2,
2797 .dspe60,2396 .dspe60,
2798 .edsp,2397 .edsp,
...@@ -2801,7 +2400,6 @@ pub const cpu = struct {...@@ -2801,7 +2400,6 @@ pub const cpu = struct {
2801 .hwdiv,2400 .hwdiv,
2802 .mp,2401 .mp,
2803 .mp1e2,2402 .mp1e2,
2804 .nvic,
2805 .trust,2403 .trust,
2806 .vdspv1,2404 .vdspv1,
2807 }),2405 }),
...@@ -2815,14 +2413,12 @@ pub const cpu = struct {...@@ -2815,14 +2413,12 @@ pub const cpu = struct {
2815 .@"3e3r3",2413 .@"3e3r3",
2816 .btst16,2414 .btst16,
2817 .cache,2415 .cache,
2818 .ck860,
2819 .dspe60,2416 .dspe60,
2820 .hard_tp,2417 .hard_tp,
2821 .high_registers,2418 .high_registers,
2822 .hwdiv,2419 .hwdiv,
2823 .mp,2420 .mp,
2824 .mp1e2,2421 .mp1e2,
2825 .nvic,
2826 .trust,2422 .trust,
2827 }),2423 }),
2828 };2424 };
...@@ -2835,7 +2431,6 @@ pub const cpu = struct {...@@ -2835,7 +2431,6 @@ pub const cpu = struct {
2835 .@"3e3r3",2431 .@"3e3r3",
2836 .btst16,2432 .btst16,
2837 .cache,2433 .cache,
2838 .ck860,
2839 .dspe60,2434 .dspe60,
2840 .float7e60,2435 .float7e60,
2841 .fpuv3_df,2436 .fpuv3_df,
...@@ -2847,7 +2442,6 @@ pub const cpu = struct {...@@ -2847,7 +2442,6 @@ pub const cpu = struct {
2847 .hwdiv,2442 .hwdiv,
2848 .mp,2443 .mp,
2849 .mp1e2,2444 .mp1e2,
2850 .nvic,
2851 .trust,2445 .trust,
2852 }),2446 }),
2853 };2447 };
...@@ -2860,8 +2454,6 @@ pub const cpu = struct {...@@ -2860,8 +2454,6 @@ pub const cpu = struct {
2860 .@"3e3r3",2454 .@"3e3r3",
2861 .btst16,2455 .btst16,
2862 .cache,2456 .cache,
2863 .ck860,
2864 .ck860v,
2865 .dspe60,2457 .dspe60,
2866 .float7e60,2458 .float7e60,
2867 .fpuv3_df,2459 .fpuv3_df,
...@@ -2873,7 +2465,6 @@ pub const cpu = struct {...@@ -2873,7 +2465,6 @@ pub const cpu = struct {
2873 .hwdiv,2465 .hwdiv,
2874 .mp,2466 .mp,
2875 .mp1e2,2467 .mp1e2,
2876 .nvic,
2877 .trust,2468 .trust,
2878 .vdsp2e60f,2469 .vdsp2e60f,
2879 .vdspv2,2470 .vdspv2,
...@@ -2888,15 +2479,12 @@ pub const cpu = struct {...@@ -2888,15 +2479,12 @@ pub const cpu = struct {
2888 .@"3e3r3",2479 .@"3e3r3",
2889 .btst16,2480 .btst16,
2890 .cache,2481 .cache,
2891 .ck860,
2892 .ck860v,
2893 .dspe60,2482 .dspe60,
2894 .hard_tp,2483 .hard_tp,
2895 .high_registers,2484 .high_registers,
2896 .hwdiv,2485 .hwdiv,
2897 .mp,2486 .mp,
2898 .mp1e2,2487 .mp1e2,
2899 .nvic,
2900 .trust,2488 .trust,
2901 .vdsp2e60f,2489 .vdsp2e60f,
2902 .vdspv2,2490 .vdspv2,
...@@ -2907,7 +2495,6 @@ pub const cpu = struct {...@@ -2907,7 +2495,6 @@ pub const cpu = struct {
2907 .llvm_name = "e801",2495 .llvm_name = "e801",
2908 .features = featureSet(&[_]Feature{2496 .features = featureSet(&[_]Feature{
2909 .btst16,2497 .btst16,
2910 .ck801,
2911 .e1,2498 .e1,
2912 .trust,2499 .trust,
2913 }),2500 }),
...@@ -2917,9 +2504,7 @@ pub const cpu = struct {...@@ -2917,9 +2504,7 @@ pub const cpu = struct {
2917 .llvm_name = "e802",2504 .llvm_name = "e802",
2918 .features = featureSet(&[_]Feature{2505 .features = featureSet(&[_]Feature{
2919 .btst16,2506 .btst16,
2920 .ck802,
2921 .e2,2507 .e2,
2922 .nvic,
2923 .trust,2508 .trust,
2924 }),2509 }),
2925 };2510 };
...@@ -2928,9 +2513,7 @@ pub const cpu = struct {...@@ -2928,9 +2513,7 @@ pub const cpu = struct {
2928 .llvm_name = "e802t",2513 .llvm_name = "e802t",
2929 .features = featureSet(&[_]Feature{2514 .features = featureSet(&[_]Feature{
2930 .btst16,2515 .btst16,
2931 .ck802,
2932 .e2,2516 .e2,
2933 .nvic,
2934 .trust,2517 .trust,
2935 }),2518 }),
2936 };2519 };
...@@ -2941,10 +2524,8 @@ pub const cpu = struct {...@@ -2941,10 +2524,8 @@ pub const cpu = struct {
2941 .@"3e3r2",2524 .@"3e3r2",
2942 .@"3e3r3",2525 .@"3e3r3",
2943 .btst16,2526 .btst16,
2944 .ck803,
2945 .hwdiv,2527 .hwdiv,
2946 .mp,2528 .mp,
2947 .nvic,
2948 .trust,2529 .trust,
2949 }),2530 }),
2950 };2531 };
...@@ -2955,10 +2536,8 @@ pub const cpu = struct {...@@ -2955,10 +2536,8 @@ pub const cpu = struct {
2955 .@"3e3r2",2536 .@"3e3r2",
2956 .@"3e3r3",2537 .@"3e3r3",
2957 .btst16,2538 .btst16,
2958 .ck803,
2959 .hwdiv,2539 .hwdiv,
2960 .mp,2540 .mp,
2961 .nvic,
2962 .trust,2541 .trust,
2963 }),2542 }),
2964 };2543 };
...@@ -2969,13 +2548,10 @@ pub const cpu = struct {...@@ -2969,13 +2548,10 @@ pub const cpu = struct {
2969 .@"3e3r2",2548 .@"3e3r2",
2970 .@"3e3r3",2549 .@"3e3r3",
2971 .btst16,2550 .btst16,
2972 .ck803,
2973 .ck804,
2974 .dspv2,2551 .dspv2,
2975 .high_registers,2552 .high_registers,
2976 .hwdiv,2553 .hwdiv,
2977 .mp,2554 .mp,
2978 .nvic,
2979 .trust,2555 .trust,
2980 }),2556 }),
2981 };2557 };
...@@ -2986,8 +2562,6 @@ pub const cpu = struct {...@@ -2986,8 +2562,6 @@ pub const cpu = struct {
2986 .@"3e3r2",2562 .@"3e3r2",
2987 .@"3e3r3",2563 .@"3e3r3",
2988 .btst16,2564 .btst16,
2989 .ck803,
2990 .ck804,
2991 .dspv2,2565 .dspv2,
2992 .float1e3,2566 .float1e3,
2993 .floate1,2567 .floate1,
...@@ -2995,7 +2569,6 @@ pub const cpu = struct {...@@ -2995,7 +2569,6 @@ pub const cpu = struct {
2995 .high_registers,2569 .high_registers,
2996 .hwdiv,2570 .hwdiv,
2997 .mp,2571 .mp,
2998 .nvic,
2999 .trust,2572 .trust,
3000 }),2573 }),
3001 };2574 };
...@@ -3006,8 +2579,6 @@ pub const cpu = struct {...@@ -3006,8 +2579,6 @@ pub const cpu = struct {
3006 .@"3e3r2",2579 .@"3e3r2",
3007 .@"3e3r3",2580 .@"3e3r3",
3008 .btst16,2581 .btst16,
3009 .ck803,
3010 .ck804,
3011 .dspv2,2582 .dspv2,
3012 .float1e3,2583 .float1e3,
3013 .floate1,2584 .floate1,
...@@ -3015,7 +2586,6 @@ pub const cpu = struct {...@@ -3015,7 +2586,6 @@ pub const cpu = struct {
3015 .high_registers,2586 .high_registers,
3016 .hwdiv,2587 .hwdiv,
3017 .mp,2588 .mp,
3018 .nvic,
3019 .trust,2589 .trust,
3020 }),2590 }),
3021 };2591 };
...@@ -3026,13 +2596,10 @@ pub const cpu = struct {...@@ -3026,13 +2596,10 @@ pub const cpu = struct {
3026 .@"3e3r2",2596 .@"3e3r2",
3027 .@"3e3r3",2597 .@"3e3r3",
3028 .btst16,2598 .btst16,
3029 .ck803,
3030 .ck804,
3031 .dspv2,2599 .dspv2,
3032 .high_registers,2600 .high_registers,
3033 .hwdiv,2601 .hwdiv,
3034 .mp,2602 .mp,
3035 .nvic,
3036 .trust,2603 .trust,
3037 }),2604 }),
3038 };2605 };
...@@ -3043,14 +2610,11 @@ pub const cpu = struct {...@@ -3043,14 +2610,11 @@ pub const cpu = struct {
3043 .@"3e3r2",2610 .@"3e3r2",
3044 .@"3e3r3",2611 .@"3e3r3",
3045 .btst16,2612 .btst16,
3046 .ck803,
3047 .ck804,
3048 .float1e3,2613 .float1e3,
3049 .floate1,2614 .floate1,
3050 .fpuv2_sf,2615 .fpuv2_sf,
3051 .hwdiv,2616 .hwdiv,
3052 .mp,2617 .mp,
3053 .nvic,
3054 .trust,2618 .trust,
3055 }),2619 }),
3056 };2620 };
...@@ -3061,14 +2625,11 @@ pub const cpu = struct {...@@ -3061,14 +2625,11 @@ pub const cpu = struct {
3061 .@"3e3r2",2625 .@"3e3r2",
3062 .@"3e3r3",2626 .@"3e3r3",
3063 .btst16,2627 .btst16,
3064 .ck803,
3065 .ck804,
3066 .float1e3,2628 .float1e3,
3067 .floate1,2629 .floate1,
3068 .fpuv2_sf,2630 .fpuv2_sf,
3069 .hwdiv,2631 .hwdiv,
3070 .mp,2632 .mp,
3071 .nvic,
3072 .trust,2633 .trust,
3073 }),2634 }),
3074 };2635 };
...@@ -3086,12 +2647,9 @@ pub const cpu = struct {...@@ -3086,12 +2647,9 @@ pub const cpu = struct {
3086 .@"3e3r2",2647 .@"3e3r2",
3087 .@"3e3r3",2648 .@"3e3r3",
3088 .btst16,2649 .btst16,
3089 .ck803,
3090 .ck805,
3091 .high_registers,2650 .high_registers,
3092 .hwdiv,2651 .hwdiv,
3093 .mp,2652 .mp,
3094 .nvic,
3095 .trust,2653 .trust,
3096 .vdsp2e3,2654 .vdsp2e3,
3097 .vdspv2,2655 .vdspv2,
...@@ -3104,15 +2662,12 @@ pub const cpu = struct {...@@ -3104,15 +2662,12 @@ pub const cpu = struct {
3104 .@"3e3r2",2662 .@"3e3r2",
3105 .@"3e3r3",2663 .@"3e3r3",
3106 .btst16,2664 .btst16,
3107 .ck803,
3108 .ck805,
3109 .float1e3,2665 .float1e3,
3110 .floate1,2666 .floate1,
3111 .fpuv2_sf,2667 .fpuv2_sf,
3112 .high_registers,2668 .high_registers,
3113 .hwdiv,2669 .hwdiv,
3114 .mp,2670 .mp,
3115 .nvic,
3116 .trust,2671 .trust,
3117 .vdsp2e3,2672 .vdsp2e3,
3118 .vdspv2,2673 .vdspv2,
...@@ -3123,7 +2678,6 @@ pub const cpu = struct {...@@ -3123,7 +2678,6 @@ pub const cpu = struct {
3123 .llvm_name = "r807",2678 .llvm_name = "r807",
3124 .features = featureSet(&[_]Feature{2679 .features = featureSet(&[_]Feature{
3125 .cache,2680 .cache,
3126 .ck807,
3127 .dsp1e2,2681 .dsp1e2,
3128 .dspe60,2682 .dspe60,
3129 .edsp,2683 .edsp,
...@@ -3132,7 +2686,6 @@ pub const cpu = struct {...@@ -3132,7 +2686,6 @@ pub const cpu = struct {
3132 .hwdiv,2686 .hwdiv,
3133 .mp,2687 .mp,
3134 .mp1e2,2688 .mp1e2,
3135 .nvic,
3136 .trust,2689 .trust,
3137 }),2690 }),
3138 };2691 };
...@@ -3141,7 +2694,6 @@ pub const cpu = struct {...@@ -3141,7 +2694,6 @@ pub const cpu = struct {
3141 .llvm_name = "r807f",2694 .llvm_name = "r807f",
3142 .features = featureSet(&[_]Feature{2695 .features = featureSet(&[_]Feature{
3143 .cache,2696 .cache,
3144 .ck807,
3145 .dsp1e2,2697 .dsp1e2,
3146 .dspe60,2698 .dspe60,
3147 .edsp,2699 .edsp,
...@@ -3157,7 +2709,6 @@ pub const cpu = struct {...@@ -3157,7 +2709,6 @@ pub const cpu = struct {
3157 .hwdiv,2709 .hwdiv,
3158 .mp,2710 .mp,
3159 .mp1e2,2711 .mp1e2,
3160 .nvic,
3161 .trust,2712 .trust,
3162 }),2713 }),
3163 };2714 };
...@@ -3166,9 +2717,7 @@ pub const cpu = struct {...@@ -3166,9 +2717,7 @@ pub const cpu = struct {
3166 .llvm_name = "s802",2717 .llvm_name = "s802",
3167 .features = featureSet(&[_]Feature{2718 .features = featureSet(&[_]Feature{
3168 .btst16,2719 .btst16,
3169 .ck802,
3170 .e2,2720 .e2,
3171 .nvic,
3172 .trust,2721 .trust,
3173 }),2722 }),
3174 };2723 };
...@@ -3177,9 +2726,7 @@ pub const cpu = struct {...@@ -3177,9 +2726,7 @@ pub const cpu = struct {
3177 .llvm_name = "s802t",2726 .llvm_name = "s802t",
3178 .features = featureSet(&[_]Feature{2727 .features = featureSet(&[_]Feature{
3179 .btst16,2728 .btst16,
3180 .ck802,
3181 .e2,2729 .e2,
3182 .nvic,
3183 .trust,2730 .trust,
3184 }),2731 }),
3185 };2732 };
...@@ -3190,10 +2737,8 @@ pub const cpu = struct {...@@ -3190,10 +2737,8 @@ pub const cpu = struct {
3190 .@"3e3r2",2737 .@"3e3r2",
3191 .@"3e3r3",2738 .@"3e3r3",
3192 .btst16,2739 .btst16,
3193 .ck803,
3194 .hwdiv,2740 .hwdiv,
3195 .mp,2741 .mp,
3196 .nvic,
3197 .trust,2742 .trust,
3198 }),2743 }),
3199 };2744 };
...@@ -3204,10 +2749,8 @@ pub const cpu = struct {...@@ -3204,10 +2749,8 @@ pub const cpu = struct {
3204 .@"3e3r2",2749 .@"3e3r2",
3205 .@"3e3r3",2750 .@"3e3r3",
3206 .btst16,2751 .btst16,
3207 .ck803,
3208 .hwdiv,2752 .hwdiv,
3209 .mp,2753 .mp,
3210 .nvic,
3211 .trust,2754 .trust,
3212 }),2755 }),
3213 };2756 };
lib/std/Target/hppa.zig+7-15
...@@ -5,7 +5,6 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -5,7 +5,6 @@ const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;5const CpuModel = std.Target.Cpu.Model;
66
7pub const Feature = enum {7pub const Feature = enum {
8 @"64bit",
9 max_1,8 max_1,
10 max_2,9 max_2,
11 v1_1,10 v1_1,
...@@ -21,13 +20,6 @@ pub const all_features = blk: {...@@ -21,13 +20,6 @@ pub const all_features = blk: {
21 const len = @typeInfo(Feature).@"enum".field_names.len;20 const len = @typeInfo(Feature).@"enum".field_names.len;
22 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);21 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
23 var result: [len]CpuFeature = undefined;22 var result: [len]CpuFeature = undefined;
24 result[@backingInt(Feature.@"64bit")] = .{
25 .llvm_name = null,
26 .description = "Enable 64-bit PA-RISC 2.0",
27 .dependencies = featureSet(&[_]Feature{
28 .v2_0,
29 }),
30 };
31 result[@backingInt(Feature.max_1)] = .{23 result[@backingInt(Feature.max_1)] = .{
32 .llvm_name = null,24 .llvm_name = null,
33 .description = "Enable MAX-1 multimedia acceleration extensions",25 .description = "Enable MAX-1 multimedia acceleration extensions",
...@@ -120,49 +112,49 @@ pub const cpu = struct {...@@ -120,49 +112,49 @@ pub const cpu = struct {
120 .name = "pa_8000",112 .name = "pa_8000",
121 .llvm_name = null,113 .llvm_name = null,
122 .features = featureSet(&[_]Feature{114 .features = featureSet(&[_]Feature{
123 .@"64bit",115 .v2_0,
124 }),116 }),
125 };117 };
126 pub const pa_8200: CpuModel = .{118 pub const pa_8200: CpuModel = .{
127 .name = "pa_8200",119 .name = "pa_8200",
128 .llvm_name = null,120 .llvm_name = null,
129 .features = featureSet(&[_]Feature{121 .features = featureSet(&[_]Feature{
130 .@"64bit",122 .v2_0,
131 }),123 }),
132 };124 };
133 pub const pa_8500: CpuModel = .{125 pub const pa_8500: CpuModel = .{
134 .name = "pa_8500",126 .name = "pa_8500",
135 .llvm_name = null,127 .llvm_name = null,
136 .features = featureSet(&[_]Feature{128 .features = featureSet(&[_]Feature{
137 .@"64bit",129 .v2_0,
138 }),130 }),
139 };131 };
140 pub const pa_8600: CpuModel = .{132 pub const pa_8600: CpuModel = .{
141 .name = "pa_8600",133 .name = "pa_8600",
142 .llvm_name = null,134 .llvm_name = null,
143 .features = featureSet(&[_]Feature{135 .features = featureSet(&[_]Feature{
144 .@"64bit",136 .v2_0,
145 }),137 }),
146 };138 };
147 pub const pa_8700: CpuModel = .{139 pub const pa_8700: CpuModel = .{
148 .name = "pa_8700",140 .name = "pa_8700",
149 .llvm_name = null,141 .llvm_name = null,
150 .features = featureSet(&[_]Feature{142 .features = featureSet(&[_]Feature{
151 .@"64bit",143 .v2_0,
152 }),144 }),
153 };145 };
154 pub const pa_8800: CpuModel = .{146 pub const pa_8800: CpuModel = .{
155 .name = "pa_8800",147 .name = "pa_8800",
156 .llvm_name = null,148 .llvm_name = null,
157 .features = featureSet(&[_]Feature{149 .features = featureSet(&[_]Feature{
158 .@"64bit",150 .v2_0,
159 }),151 }),
160 };152 };
161 pub const pa_8900: CpuModel = .{153 pub const pa_8900: CpuModel = .{
162 .name = "pa_8900",154 .name = "pa_8900",
163 .llvm_name = null,155 .llvm_name = null,
164 .features = featureSet(&[_]Feature{156 .features = featureSet(&[_]Feature{
165 .@"64bit",157 .v2_0,
166 }),158 }),
167 };159 };
168 pub const pcx: CpuModel = .{160 pub const pcx: CpuModel = .{
lib/std/Target/kvx.zig+1-3
...@@ -27,9 +27,7 @@ pub const all_features = blk: {...@@ -27,9 +27,7 @@ pub const all_features = blk: {
27 result[@backingInt(Feature.v3_2)] = .{27 result[@backingInt(Feature.v3_2)] = .{
28 .llvm_name = null,28 .llvm_name = null,
29 .description = "Enable ISA v3.2",29 .description = "Enable ISA v3.2",
30 .dependencies = featureSet(&[_]Feature{30 .dependencies = featureSet(&[_]Feature{}),
31 .v3_1,
32 }),
33 };31 };
34 result[@backingInt(Feature.v4_1)] = .{32 result[@backingInt(Feature.v4_1)] = .{
35 .llvm_name = null,33 .llvm_name = null,
lib/std/Target/ve.zig+24-3
...@@ -5,6 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;...@@ -5,6 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;5const CpuModel = std.Target.Cpu.Model;
66
7pub const Feature = enum {7pub const Feature = enum {
8 ve3,
8 vpu,9 vpu,
9};10};
1011
...@@ -17,6 +18,11 @@ pub const all_features = blk: {...@@ -17,6 +18,11 @@ pub const all_features = blk: {
17 const len = @typeInfo(Feature).@"enum".field_names.len;18 const len = @typeInfo(Feature).@"enum".field_names.len;
18 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);19 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
19 var result: [len]CpuFeature = undefined;20 var result: [len]CpuFeature = undefined;
21 result[@backingInt(Feature.ve3)] = .{
22 .llvm_name = null,
23 .description = "Enable VE3 instructions",
24 .dependencies = featureSet(&[_]Feature{}),
25 };
20 result[@backingInt(Feature.vpu)] = .{26 result[@backingInt(Feature.vpu)] = .{
21 .llvm_name = "vpu",27 .llvm_name = "vpu",
22 .description = "Enable the VPU",28 .description = "Enable the VPU",
...@@ -31,10 +37,25 @@ pub const all_features = blk: {...@@ -31,10 +37,25 @@ pub const all_features = blk: {
31};37};
3238
33pub const cpu = struct {39pub const cpu = struct {
34 pub const generic: CpuModel = .{40 pub const ve10: CpuModel = .{
35 .name = "generic",41 .name = "ve10",
36 .llvm_name = "generic",42 .llvm_name = null,
43 .features = featureSet(&[_]Feature{
44 .vpu,
45 }),
46 };
47 pub const ve20: CpuModel = .{
48 .name = "ve20",
49 .llvm_name = null,
50 .features = featureSet(&[_]Feature{
51 .vpu,
52 }),
53 };
54 pub const ve30: CpuModel = .{
55 .name = "ve30",
56 .llvm_name = null,
37 .features = featureSet(&[_]Feature{57 .features = featureSet(&[_]Feature{
58 .ve3,
38 .vpu,59 .vpu,
39 }),60 }),
40 };61 };
lib/std/Target/wasm.zig+36-28
...@@ -114,6 +114,7 @@ pub const all_features = blk: {...@@ -114,6 +114,7 @@ pub const all_features = blk: {
114 .llvm_name = "reference-types",114 .llvm_name = "reference-types",
115 .description = "Enable reference types",115 .description = "Enable reference types",
116 .dependencies = featureSet(&[_]Feature{116 .dependencies = featureSet(&[_]Feature{
117 .bulk_memory,
117 .call_indirect_overlong,118 .call_indirect_overlong,
118 }),119 }),
119 };120 };
...@@ -125,7 +126,9 @@ pub const all_features = blk: {...@@ -125,7 +126,9 @@ pub const all_features = blk: {
125 result[@backingInt(Feature.relaxed_simd)] = .{126 result[@backingInt(Feature.relaxed_simd)] = .{
126 .llvm_name = "relaxed-simd",127 .llvm_name = "relaxed-simd",
127 .description = "Enable relaxed-simd instructions",128 .description = "Enable relaxed-simd instructions",
128 .dependencies = featureSet(&[_]Feature{}),129 .dependencies = featureSet(&[_]Feature{
130 .simd128,
131 }),
129 };132 };
130 result[@backingInt(Feature.sign_ext)] = .{133 result[@backingInt(Feature.sign_ext)] = .{
131 .llvm_name = "sign-ext",134 .llvm_name = "sign-ext",
...@@ -156,53 +159,58 @@ pub const all_features = blk: {...@@ -156,53 +159,58 @@ pub const all_features = blk: {
156};159};
157160
158pub const cpu = struct {161pub const cpu = struct {
159 pub const bleeding_edge: CpuModel = .{162 pub const lime1: CpuModel = .{
160 .name = "bleeding_edge",163 .name = "lime1",
161 .llvm_name = "bleeding-edge",164 .llvm_name = "lime1",
162 .features = featureSet(&[_]Feature{165 .features = featureSet(&[_]Feature{
163 .atomics,166 .bulk_memory_opt,
164 .bulk_memory,167 .call_indirect_overlong,
165 .exception_handling,
166 .extended_const,168 .extended_const,
167 .fp16,169 .multivalue,
168 .gc,
169 .multimemory,
170 .mutable_globals,170 .mutable_globals,
171 .nontrapping_fptoint,171 .nontrapping_fptoint,
172 .relaxed_simd,
173 .sign_ext,172 .sign_ext,
174 .simd128,
175 .tail_call,
176 }),173 }),
177 };174 };
178 pub const generic: CpuModel = .{175 pub const mvp: CpuModel = .{
179 .name = "generic",176 .name = "mvp",
180 .llvm_name = "generic",177 .llvm_name = "mvp",
178 .features = featureSet(&[_]Feature{}),
179 };
180 pub const wasm_v1_0: CpuModel = .{
181 .name = "wasm_v1_0",
182 .llvm_name = null,
183 .features = featureSet(&[_]Feature{
184 .mutable_globals,
185 }),
186 };
187 pub const wasm_v2_0: CpuModel = .{
188 .name = "wasm_v2_0",
189 .llvm_name = null,
181 .features = featureSet(&[_]Feature{190 .features = featureSet(&[_]Feature{
182 .bulk_memory,
183 .multivalue,191 .multivalue,
184 .mutable_globals,192 .mutable_globals,
185 .nontrapping_fptoint,193 .nontrapping_fptoint,
186 .reference_types,194 .reference_types,
187 .sign_ext,195 .sign_ext,
196 .simd128,
188 }),197 }),
189 };198 };
190 pub const lime1: CpuModel = .{199 pub const wasm_v3_0: CpuModel = .{
191 .name = "lime1",200 .name = "wasm_v3_0",
192 .llvm_name = "lime1",201 .llvm_name = null,
193 .features = featureSet(&[_]Feature{202 .features = featureSet(&[_]Feature{
194 .bulk_memory_opt,203 .atomics,
195 .call_indirect_overlong,204 .exception_handling,
196 .extended_const,205 .extended_const,
197 .multivalue,206 .fp16,
207 .gc,
208 .multimemory,
198 .mutable_globals,209 .mutable_globals,
199 .nontrapping_fptoint,210 .nontrapping_fptoint,
211 .relaxed_simd,
200 .sign_ext,212 .sign_ext,
213 .tail_call,
201 }),214 }),
202 };215 };
203 pub const mvp: CpuModel = .{
204 .name = "mvp",
205 .llvm_name = "mvp",
206 .features = featureSet(&[_]Feature{}),
207 };
208};216};
lib/std/Target/x86.zig+12-4
...@@ -3136,7 +3136,7 @@ pub const cpu = struct {...@@ -3136,7 +3136,7 @@ pub const cpu = struct {
3136 };3136 };
3137 pub const goldmont_plus: CpuModel = .{3137 pub const goldmont_plus: CpuModel = .{
3138 .name = "goldmont_plus",3138 .name = "goldmont_plus",
3139 .llvm_name = "goldmont-plus",3139 .llvm_name = "goldmont_plus",
3140 .features = featureSet(&[_]Feature{3140 .features = featureSet(&[_]Feature{
3141 .@"64bit",3141 .@"64bit",
3142 .aes,3142 .aes,
...@@ -3163,6 +3163,8 @@ pub const cpu = struct {...@@ -3163,6 +3163,8 @@ pub const cpu = struct {
3163 .slow_incdec,3163 .slow_incdec,
3164 .slow_lea,3164 .slow_lea,
3165 .slow_two_mem_ops,3165 .slow_two_mem_ops,
3166 .smap,
3167 .smep,
3166 .sse4_2,3168 .sse4_2,
3167 .use_glm_div_sqrt_costs,3169 .use_glm_div_sqrt_costs,
3168 .vzeroupper,3170 .vzeroupper,
...@@ -3564,7 +3566,7 @@ pub const cpu = struct {...@@ -3564,7 +3566,7 @@ pub const cpu = struct {
3564 };3566 };
3565 pub const icelake_client: CpuModel = .{3567 pub const icelake_client: CpuModel = .{
3566 .name = "icelake_client",3568 .name = "icelake_client",
3567 .llvm_name = "icelake-client",3569 .llvm_name = "icelake_client",
3568 .features = featureSet(&[_]Feature{3570 .features = featureSet(&[_]Feature{
3569 .@"64bit",3571 .@"64bit",
3570 .adx,3572 .adx,
...@@ -3615,6 +3617,8 @@ pub const cpu = struct {...@@ -3615,6 +3617,8 @@ pub const cpu = struct {
3615 .sahf,3617 .sahf,
3616 .sha,3618 .sha,
3617 .slow_pmullq,3619 .slow_pmullq,
3620 .smap,
3621 .smep,
3618 .tuning_fast_imm_vector_shift,3622 .tuning_fast_imm_vector_shift,
3619 .vaes,3623 .vaes,
3620 .vpclmulqdq,3624 .vpclmulqdq,
...@@ -3627,7 +3631,7 @@ pub const cpu = struct {...@@ -3627,7 +3631,7 @@ pub const cpu = struct {
3627 };3631 };
3628 pub const icelake_server: CpuModel = .{3632 pub const icelake_server: CpuModel = .{
3629 .name = "icelake_server",3633 .name = "icelake_server",
3630 .llvm_name = "icelake-server",3634 .llvm_name = "icelake_server",
3631 .features = featureSet(&[_]Feature{3635 .features = featureSet(&[_]Feature{
3632 .@"64bit",3636 .@"64bit",
3633 .adx,3637 .adx,
...@@ -3680,6 +3684,8 @@ pub const cpu = struct {...@@ -3680,6 +3684,8 @@ pub const cpu = struct {
3680 .sahf,3684 .sahf,
3681 .sha,3685 .sha,
3682 .slow_pmullq,3686 .slow_pmullq,
3687 .smap,
3688 .smep,
3683 .tuning_fast_imm_vector_shift,3689 .tuning_fast_imm_vector_shift,
3684 .vaes,3690 .vaes,
3685 .vpclmulqdq,3691 .vpclmulqdq,
...@@ -4872,7 +4878,7 @@ pub const cpu = struct {...@@ -4872,7 +4878,7 @@ pub const cpu = struct {
4872 };4878 };
4873 pub const skylake_avx512: CpuModel = .{4879 pub const skylake_avx512: CpuModel = .{
4874 .name = "skylake_avx512",4880 .name = "skylake_avx512",
4875 .llvm_name = "skylake-avx512",4881 .llvm_name = "skylake_avx512",
4876 .features = featureSet(&[_]Feature{4882 .features = featureSet(&[_]Feature{
4877 .@"64bit",4883 .@"64bit",
4878 .adx,4884 .adx,
...@@ -4919,6 +4925,8 @@ pub const cpu = struct {...@@ -4919,6 +4925,8 @@ pub const cpu = struct {
4919 .rdseed,4925 .rdseed,
4920 .sahf,4926 .sahf,
4921 .slow_3ops_lea,4927 .slow_3ops_lea,
4928 .smap,
4929 .smep,
4922 .tuning_fast_imm_vector_shift,4930 .tuning_fast_imm_vector_shift,
4923 .vzeroupper,4931 .vzeroupper,
4924 .x87,4932 .x87,
lib/std/Target/xcore.zig+49-8
...@@ -4,7 +4,12 @@ const std = @import("../std.zig");...@@ -4,7 +4,12 @@ const std = @import("../std.zig");
4const CpuFeature = std.Target.Cpu.Feature;4const CpuFeature = std.Target.Cpu.Feature;
5const CpuModel = std.Target.Cpu.Model;5const CpuModel = std.Target.Cpu.Model;
66
7pub const Feature = enum {};7pub const Feature = enum {
8 fpu,
9 vpu,
10 xs2,
11 xs3,
12};
813
9pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;14pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
10pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;15pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
...@@ -15,6 +20,32 @@ pub const all_features = blk: {...@@ -15,6 +20,32 @@ pub const all_features = blk: {
15 const len = @typeInfo(Feature).@"enum".field_names.len;20 const len = @typeInfo(Feature).@"enum".field_names.len;
16 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);21 std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
17 var result: [len]CpuFeature = undefined;22 var result: [len]CpuFeature = undefined;
23 result[@backingInt(Feature.fpu)] = .{
24 .llvm_name = null,
25 .description = "Enable single-precision floating point unit",
26 .dependencies = featureSet(&[_]Feature{
27 .xs3,
28 }),
29 };
30 result[@backingInt(Feature.vpu)] = .{
31 .llvm_name = null,
32 .description = "Enable vector processing unit",
33 .dependencies = featureSet(&[_]Feature{
34 .xs3,
35 }),
36 };
37 result[@backingInt(Feature.xs2)] = .{
38 .llvm_name = null,
39 .description = "Enable XS2 architecture",
40 .dependencies = featureSet(&[_]Feature{}),
41 };
42 result[@backingInt(Feature.xs3)] = .{
43 .llvm_name = null,
44 .description = "Enable XS3 architecture",
45 .dependencies = featureSet(&[_]Feature{
46 .xs2,
47 }),
48 };
18 const ti = @typeInfo(Feature);49 const ti = @typeInfo(Feature);
19 for (&result, 0..) |*elem, i| {50 for (&result, 0..) |*elem, i| {
20 elem.index = i;51 elem.index = i;
...@@ -24,14 +55,24 @@ pub const all_features = blk: {...@@ -24,14 +55,24 @@ pub const all_features = blk: {
24};55};
2556
26pub const cpu = struct {57pub const cpu = struct {
27 pub const generic: CpuModel = .{58 pub const xs1b: CpuModel = .{
28 .name = "generic",59 .name = "xs1b",
29 .llvm_name = "generic",60 .llvm_name = null,
30 .features = featureSet(&[_]Feature{}),61 .features = featureSet(&[_]Feature{}),
31 };62 };
32 pub const xs1b_generic: CpuModel = .{63 pub const xs2a: CpuModel = .{
33 .name = "xs1b_generic",64 .name = "xs2a",
34 .llvm_name = "xs1b-generic",65 .llvm_name = null,
35 .features = featureSet(&[_]Feature{}),66 .features = featureSet(&[_]Feature{
67 .xs2,
68 }),
69 };
70 pub const xs3a: CpuModel = .{
71 .name = "xs3a",
72 .llvm_name = null,
73 .features = featureSet(&[_]Feature{
74 .fpu,
75 .vpu,
76 }),
36 };77 };
37};78};
src/Type.zig+1-4
...@@ -1302,10 +1302,7 @@ pub fn abiSize(ty: Type, zcu: *const Zcu) u64 {...@@ -1302,10 +1302,7 @@ pub fn abiSize(ty: Type, zcu: *const Zcu) u64 {
1302}1302}
13031303
1304pub fn ptrAbiAlignment(target: *const Target) Alignment {1304pub fn ptrAbiAlignment(target: *const Target) Alignment {
1305 // The eZ80 has 24-bit pointers, which aren't exact powers of two, tripping1305 return .fromNonzeroByteUnits(std.zig.target.intAlignment(target, target.ptrBitWidth()));
1306 // the assert. The alignment of eZ80 pointers is 1, so we bypass the check.
1307 if (target.cpu.arch == .ez80) return .@"1";
1308 return .fromNonzeroByteUnits(@divExact(target.ptrBitWidth(), 8));
1309}1306}
1310pub fn ptrAbiSize(target: *const Target) u64 {1307pub fn ptrAbiSize(target: *const Target) u64 {
1311 return @divExact(target.ptrBitWidth(), 8);1308 return @divExact(target.ptrBitWidth(), 8);
test/c_abi/main.zig+6-6
...@@ -5032,7 +5032,7 @@ extern fn c_vector_6_u8(@Vector(6, u8), usize) void;...@@ -5032,7 +5032,7 @@ extern fn c_vector_6_u8(@Vector(6, u8), usize) void;
5032extern fn c_test_vector_6_u8() void;5032extern fn c_test_vector_6_u8() void;
50335033
5034test "@Vector(6, u8)" {5034test "@Vector(6, u8)" {
5035 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;5035 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5036 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;5036 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5037 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5037 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
5038 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;5038 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
...@@ -5110,7 +5110,7 @@ extern fn c_vector_12_u8(@Vector(12, u8), usize) void;...@@ -5110,7 +5110,7 @@ extern fn c_vector_12_u8(@Vector(12, u8), usize) void;
5110extern fn c_test_vector_12_u8() void;5110extern fn c_test_vector_12_u8() void;
51115111
5112test "@Vector(12, u8)" {5112test "@Vector(12, u8)" {
5113 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;5113 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
5114 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;5114 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
5115 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;5115 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
51165116
...@@ -9176,7 +9176,7 @@ extern fn c_vector_3_u16(@Vector(3, u16), usize) void;...@@ -9176,7 +9176,7 @@ extern fn c_vector_3_u16(@Vector(3, u16), usize) void;
9176extern fn c_test_vector_3_u16() void;9176extern fn c_test_vector_3_u16() void;
91779177
9178test "@Vector(3, u16)" {9178test "@Vector(3, u16)" {
9179 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;9179 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9180 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;9180 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9181 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;9181 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
9182 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;9182 if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
...@@ -9250,7 +9250,7 @@ extern fn c_vector_6_u16(@Vector(6, u16), usize) void;...@@ -9250,7 +9250,7 @@ extern fn c_vector_6_u16(@Vector(6, u16), usize) void;
9250extern fn c_test_vector_6_u16() void;9250extern fn c_test_vector_6_u16() void;
92519251
9252test "@Vector(6, u16)" {9252test "@Vector(6, u16)" {
9253 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;9253 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
9254 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;9254 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
9255 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;9255 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
92569256
...@@ -11439,7 +11439,7 @@ extern fn c_vector_3_u32(@Vector(3, u32), usize) void;...@@ -11439,7 +11439,7 @@ extern fn c_vector_3_u32(@Vector(3, u32), usize) void;
11439extern fn c_test_vector_3_u32() void;11439extern fn c_test_vector_3_u32() void;
1144011440
11441test "@Vector(3, u32)" {11441test "@Vector(3, u32)" {
11442 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;11442 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
11443 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;11443 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
11444 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;11444 if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
1144511445
...@@ -13424,7 +13424,7 @@ extern fn c_vector_3_f32(@Vector(3, f32), usize) void;...@@ -13424,7 +13424,7 @@ extern fn c_vector_3_f32(@Vector(3, f32), usize) void;
13424extern fn c_test_vector_3_f32() void;13424extern fn c_test_vector_3_f32() void;
1342513425
13426test "@Vector(3, f32)" {13426test "@Vector(3, f32)" {
13427 if (builtin.cpu.arch.isArm() and builtin.abi.float() == .soft) return error.SkipZigTest;13427 if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
13428 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;13428 if (builtin.cpu.arch == .loongarch64) return error.SkipZigTest;
13429 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;13429 if (builtin.cpu.arch.isMIPS64()) return error.SkipZigTest;
1343013430
tools/update_cpu_features.zig+854-348
...@@ -23,7 +23,17 @@ const FeatureOverride = struct {...@@ -23,7 +23,17 @@ const FeatureOverride = struct {
23 extra_deps: []const []const u8 = &.{},23 extra_deps: []const []const u8 = &.{},
24};24};
2525
26const Cpu = struct {26const ModelOverride = struct {
27 llvm_name: []const u8,
28 /// If true, completely omit the CPU; as if it does not exist.
29 omit: bool = false,
30 zig_name: ?[]const u8 = null,
31 desc: ?[]const u8 = null,
32 omit_deps: []const []const u8 = &.{},
33 extra_deps: []const []const u8 = &.{},
34};
35
36const Model = struct {
27 llvm_name: ?[]const u8,37 llvm_name: ?[]const u8,
28 zig_name: []const u8,38 zig_name: []const u8,
29 features: []const []const u8,39 features: []const []const u8,
...@@ -44,9 +54,9 @@ const ArchTarget = struct {...@@ -44,9 +54,9 @@ const ArchTarget = struct {
44 td_name: []const u8,54 td_name: []const u8,
45 },55 },
46 feature_overrides: []const FeatureOverride = &.{},56 feature_overrides: []const FeatureOverride = &.{},
47 extra_cpus: []const Cpu = &.{},
48 extra_features: []const Feature = &.{},57 extra_features: []const Feature = &.{},
49 omit_cpus: []const []const u8 = &.{},58 model_overrides: []const ModelOverride = &.{},
59 extra_models: []const Model = &.{},
50 branch_quota: ?usize = null,60 branch_quota: ?usize = null,
51};61};
5262
...@@ -432,7 +442,15 @@ const targets = [_]ArchTarget{...@@ -432,7 +442,15 @@ const targets = [_]ArchTarget{
432 .flatten = true,442 .flatten = true,
433 },443 },
434 },444 },
435 .extra_cpus = &.{445 .model_overrides = &.{
446 .{
447 // Who thought this alias was a good idea? Upgrade your compiler and suddenly your
448 // programs SIGILL because this changed meaning. Brilliant.
449 .llvm_name = "apple-latest",
450 .omit = true,
451 },
452 },
453 .extra_models = &.{
436 .{454 .{
437 .llvm_name = null,455 .llvm_name = null,
438 .zig_name = "exynos_m1",456 .zig_name = "exynos_m1",
...@@ -485,11 +503,6 @@ const targets = [_]ArchTarget{...@@ -485,11 +503,6 @@ const targets = [_]ArchTarget{
485 },503 },
486 },504 },
487 },505 },
488 .omit_cpus = &.{
489 // Who thought this alias was a good idea? Upgrade your compiler and suddenly your
490 // programs SIGILL because this changed meaning. Brilliant.
491 "apple-latest",
492 },
493 },506 },
494 .{507 .{
495 .zig_name = "alpha",508 .zig_name = "alpha",
...@@ -507,7 +520,7 @@ const targets = [_]ArchTarget{...@@ -507,7 +520,7 @@ const targets = [_]ArchTarget{
507 },520 },
508 .{521 .{
509 .zig_name = "fix",522 .zig_name = "fix",
510 .desc = "Enable floating point move and square root extensions",523 .desc = "Enable FPR-to-GPR move and square root extensions",
511 .deps = &.{},524 .deps = &.{},
512 },525 },
513 .{526 .{
...@@ -516,7 +529,7 @@ const targets = [_]ArchTarget{...@@ -516,7 +529,7 @@ const targets = [_]ArchTarget{
516 .deps = &.{},529 .deps = &.{},
517 },530 },
518 },531 },
519 .extra_cpus = &.{532 .extra_models = &.{
520 .{533 .{
521 .llvm_name = null,534 .llvm_name = null,
522 .zig_name = "ev4",535 .zig_name = "ev4",
...@@ -614,169 +627,146 @@ const targets = [_]ArchTarget{...@@ -614,169 +627,146 @@ const targets = [_]ArchTarget{
614 .branch_quota = 10000,627 .branch_quota = 10000,
615 .feature_overrides = &.{628 .feature_overrides = &.{
616 .{629 .{
617 .llvm_name = "exynos",630 .llvm_name = "a5",
618 .flatten = true,631 .flatten = true,
619 },632 },
620 .{633 .{
621 .llvm_name = "cortex-a78",634 .llvm_name = "a7",
622 .flatten = true,635 .flatten = true,
623 },636 },
624 .{637 .{
625 .llvm_name = "cortex-a78ae",638 .llvm_name = "a8",
626 .flatten = true,639 .flatten = true,
627 },640 },
628 .{641 .{
629 .llvm_name = "cortex-a710",642 .llvm_name = "a9",
630 .flatten = true,643 .flatten = true,
631 },644 },
632 .{645 .{
633 .llvm_name = "cortex-m4",646 .llvm_name = "a12",
634 .omit_deps = &.{"vfp4d16sp"},
635 },
636 .{
637 .llvm_name = "cortex-m7",
638 .omit_deps = &.{"fp_armv8d16"},
639 },
640 .{
641 .llvm_name = "cortex-m33",
642 .omit_deps = &.{ "fp_armv8d16sp", "dsp" },
643 },
644 .{
645 .llvm_name = "cortex-m35p",
646 .omit_deps = &.{ "fp_armv8d16sp", "dsp" },
647 },
648 .{
649 .llvm_name = "cortex-m55",
650 .omit_deps = &.{ "mve_fp", "fp_armv8d16" },
651 },
652 .{
653 .llvm_name = "cortex-m85",
654 .omit_deps = &.{ "mve_fp", "pacbti", "fp_armv8d16" },
655 },
656 .{
657 .llvm_name = "cortex-x1c",
658 .flatten = true,647 .flatten = true,
659 },648 },
660 .{649 .{
661 .llvm_name = "r4",650 .llvm_name = "a15",
662 .flatten = true,651 .flatten = true,
663 },652 },
664 .{653 .{
665 .llvm_name = "r52plus",654 .llvm_name = "a17",
666 .flatten = true,655 .flatten = true,
667 },656 },
668 .{657 .{
669 .llvm_name = "r5",658 .llvm_name = "a32",
670 .flatten = true,659 .flatten = true,
671 },660 },
672 .{661 .{
673 .llvm_name = "r52",662 .llvm_name = "a35",
674 .flatten = true,663 .flatten = true,
675 },664 },
676 .{665 .{
677 .llvm_name = "r7",666 .llvm_name = "a53",
678 .flatten = true,667 .flatten = true,
679 },668 },
680 .{669 .{
681 .llvm_name = "m3",670 .llvm_name = "a55",
682 .flatten = true,671 .flatten = true,
683 },672 },
684 .{673 .{
685 .llvm_name = "m7",674 .llvm_name = "a57",
686 .flatten = true,675 .flatten = true,
687 },676 },
688 .{677 .{
689 .llvm_name = "krait",678 .llvm_name = "a72",
690 .flatten = true,679 .flatten = true,
691 },680 },
692 .{681 .{
693 .llvm_name = "kryo",682 .llvm_name = "a73",
694 .flatten = true,683 .flatten = true,
695 },684 },
696 .{685 .{
697 .llvm_name = "swift",686 .llvm_name = "a75",
698 .flatten = true,687 .flatten = true,
699 },688 },
700 .{689 .{
701 .llvm_name = "cortex-x1",690 .llvm_name = "a76",
702 .flatten = true,691 .flatten = true,
703 },692 },
704 .{693 .{
705 .llvm_name = "neoverse-v1",694 .llvm_name = "a77",
706 .flatten = true,695 .flatten = true,
707 },696 },
708 .{697 .{
709 .llvm_name = "a5",698 .llvm_name = "a78c",
710 .flatten = true,699 .flatten = true,
711 },700 },
712 .{701 .{
713 .llvm_name = "a7",702 .llvm_name = "cortex-a78",
714 .flatten = true,703 .flatten = true,
715 },704 },
716 .{705 .{
717 .llvm_name = "a8",706 .llvm_name = "cortex-a78ae",
718 .flatten = true,707 .flatten = true,
719 },708 },
720 .{709 .{
721 .llvm_name = "a9",710 .llvm_name = "cortex-a710",
722 .flatten = true,711 .flatten = true,
723 },712 },
724 .{713 .{
725 .llvm_name = "a12",714 .llvm_name = "cortex-x1",
726 .flatten = true,715 .flatten = true,
727 },716 },
728 .{717 .{
729 .llvm_name = "a15",718 .llvm_name = "cortex-x1c",
730 .flatten = true,719 .flatten = true,
731 },720 },
732 .{721 .{
733 .llvm_name = "a17",722 .llvm_name = "exynos",
734 .flatten = true,723 .flatten = true,
735 },724 },
736 .{725 .{
737 .llvm_name = "a32",726 .llvm_name = "krait",
738 .flatten = true,727 .flatten = true,
739 },728 },
740 .{729 .{
741 .llvm_name = "a35",730 .llvm_name = "kryo",
742 .flatten = true,731 .flatten = true,
743 },732 },
744 .{733 .{
745 .llvm_name = "a53",734 .llvm_name = "m3",
746 .flatten = true,735 .flatten = true,
747 },736 },
748 .{737 .{
749 .llvm_name = "a55",738 .llvm_name = "m7",
750 .flatten = true,739 .flatten = true,
751 },740 },
752 .{741 .{
753 .llvm_name = "a57",742 .llvm_name = "neoverse-v1",
754 .flatten = true,743 .flatten = true,
755 },744 },
756 .{745 .{
757 .llvm_name = "a72",746 .llvm_name = "r4",
758 .flatten = true,747 .flatten = true,
759 },748 },
760 .{749 .{
761 .llvm_name = "a73",750 .llvm_name = "r5",
762 .flatten = true,751 .flatten = true,
763 },752 },
764 .{753 .{
765 .llvm_name = "a75",754 .llvm_name = "r7",
766 .flatten = true,755 .flatten = true,
767 },756 },
768 .{757 .{
769 .llvm_name = "a76",758 .llvm_name = "r52",
770 .flatten = true,759 .flatten = true,
771 },760 },
772 .{761 .{
773 .llvm_name = "a77",762 .llvm_name = "r52plus",
774 .flatten = true,763 .flatten = true,
775 },764 },
776 .{765 .{
777 .llvm_name = "a78c",766 .llvm_name = "swift",
778 .flatten = true,767 .flatten = true,
779 },768 },
769
780 .{770 .{
781 .llvm_name = "armv2",771 .llvm_name = "armv2",
782 .zig_name = "v2",772 .zig_name = "v2",
...@@ -853,6 +843,7 @@ const targets = [_]ArchTarget{...@@ -853,6 +843,7 @@ const targets = [_]ArchTarget{
853 .{843 .{
854 .llvm_name = "armv7-a",844 .llvm_name = "armv7-a",
855 .zig_name = "v7a",845 .zig_name = "v7a",
846 .omit_deps = &.{"neon"},
856 },847 },
857 .{848 .{
858 .llvm_name = "armv7-m",849 .llvm_name = "armv7-m",
...@@ -877,58 +868,72 @@ const targets = [_]ArchTarget{...@@ -877,58 +868,72 @@ const targets = [_]ArchTarget{
877 .{868 .{
878 .llvm_name = "armv7ve",869 .llvm_name = "armv7ve",
879 .zig_name = "v7ve",870 .zig_name = "v7ve",
871 .omit_deps = &.{"neon"},
880 },872 },
881 .{873 .{
882 .llvm_name = "armv8.1-a",874 .llvm_name = "armv8.1-a",
883 .zig_name = "v8_1a",875 .zig_name = "v8_1a",
876 .omit_deps = &.{"crypto"},
884 },877 },
885 .{878 .{
886 .llvm_name = "armv8.1-m.main",879 .llvm_name = "armv8.1-m.main",
887 .zig_name = "v8_1m_main",880 .zig_name = "v8_1m_main",
881 .omit_deps = &.{"8msecext"},
888 },882 },
889 .{883 .{
890 .llvm_name = "armv8.2-a",884 .llvm_name = "armv8.2-a",
891 .zig_name = "v8_2a",885 .zig_name = "v8_2a",
886 .omit_deps = &.{"crypto"},
892 },887 },
893 .{888 .{
894 .llvm_name = "armv8.3-a",889 .llvm_name = "armv8.3-a",
895 .zig_name = "v8_3a",890 .zig_name = "v8_3a",
891 .omit_deps = &.{"crypto"},
896 },892 },
897 .{893 .{
898 .llvm_name = "armv8.4-a",894 .llvm_name = "armv8.4-a",
899 .zig_name = "v8_4a",895 .zig_name = "v8_4a",
896 .omit_deps = &.{"crypto"},
900 },897 },
901 .{898 .{
902 .llvm_name = "armv8.5-a",899 .llvm_name = "armv8.5-a",
903 .zig_name = "v8_5a",900 .zig_name = "v8_5a",
901 .omit_deps = &.{"crypto"},
904 },902 },
905 .{903 .{
906 .llvm_name = "armv8.6-a",904 .llvm_name = "armv8.6-a",
907 .zig_name = "v8_6a",905 .zig_name = "v8_6a",
906 .omit_deps = &.{"crypto"},
908 },907 },
909 .{908 .{
910 .llvm_name = "armv8.7-a",909 .llvm_name = "armv8.7-a",
911 .zig_name = "v8_7a",910 .zig_name = "v8_7a",
911 .omit_deps = &.{"crypto"},
912 },912 },
913 .{913 .{
914 .llvm_name = "armv8.8-a",914 .llvm_name = "armv8.8-a",
915 .zig_name = "v8_8a",915 .zig_name = "v8_8a",
916 .omit_deps = &.{"crypto"},
916 },917 },
917 .{918 .{
918 .llvm_name = "armv8.9-a",919 .llvm_name = "armv8.9-a",
919 .zig_name = "v8_9a",920 .zig_name = "v8_9a",
921 .omit_deps = &.{"crypto"},
920 },922 },
921 .{923 .{
922 .llvm_name = "armv8-a",924 .llvm_name = "armv8-a",
923 .zig_name = "v8a",925 .zig_name = "v8a",
926 .omit_deps = &.{"crypto"},
924 },927 },
925 .{928 .{
926 .llvm_name = "armv8-m.base",929 .llvm_name = "armv8-m.base",
927 .zig_name = "v8m",930 .zig_name = "v8m",
931 .omit_deps = &.{"8msecext"},
928 },932 },
929 .{933 .{
930 .llvm_name = "armv8-m.main",934 .llvm_name = "armv8-m.main",
931 .zig_name = "v8m_main",935 .zig_name = "v8m_main",
936 .omit_deps = &.{"8msecext"},
932 },937 },
933 .{938 .{
934 .llvm_name = "armv8-r",939 .llvm_name = "armv8-r",
...@@ -945,6 +950,7 @@ const targets = [_]ArchTarget{...@@ -945,6 +950,7 @@ const targets = [_]ArchTarget{
945 .{950 .{
946 .llvm_name = "armv9.3-a",951 .llvm_name = "armv9.3-a",
947 .zig_name = "v9_3a",952 .zig_name = "v9_3a",
953 .omit_deps = &.{"crypto"},
948 },954 },
949 .{955 .{
950 .llvm_name = "armv9.4-a",956 .llvm_name = "armv9.4-a",
...@@ -1087,23 +1093,6 @@ const targets = [_]ArchTarget{...@@ -1087,23 +1093,6 @@ const targets = [_]ArchTarget{
1087 .zig_name = "has_v9_7a",1093 .zig_name = "has_v9_7a",
1088 },1094 },
1089 },1095 },
1090 .extra_cpus = &.{
1091 .{
1092 .llvm_name = "generic",
1093 .zig_name = "baseline",
1094 .features = &.{"v7a"},
1095 },
1096 .{
1097 .llvm_name = null,
1098 .zig_name = "exynos_m1",
1099 .features = &.{ "v8a", "exynos" },
1100 },
1101 .{
1102 .llvm_name = null,
1103 .zig_name = "exynos_m2",
1104 .features = &.{ "v8a", "exynos" },
1105 },
1106 },
1107 .extra_features = &.{1096 .extra_features = &.{
1108 // LLVM removed support for v2 and v3 but zig wants to support targeting old hardware1097 // LLVM removed support for v2 and v3 but zig wants to support targeting old hardware
1109 .{1098 .{
...@@ -1127,183 +1116,459 @@ const targets = [_]ArchTarget{...@@ -1127,183 +1116,459 @@ const targets = [_]ArchTarget{
1127 .deps = &.{"strict_align"},1116 .deps = &.{"strict_align"},
1128 },1117 },
1129 },1118 },
1130 },1119 .model_overrides = &.{
1131 .{
1132 .zig_name = "avr",
1133 .llvm = .{
1134 .name = "AVR",
1135 .td_name = "AVR",
1136 },
1137 },
1138 .{
1139 .zig_name = "bpf",
1140 .llvm = .{
1141 .name = "BPF",
1142 .td_name = "BPF",
1143 },
1144 },
1145 .{
1146 .zig_name = "csky",
1147 .llvm = .{
1148 .name = "CSKY",
1149 .td_name = "CSKY",
1150 },
1151 },
1152 .{
1153 .zig_name = "hexagon",
1154 .llvm = .{
1155 .name = "Hexagon",
1156 .td_name = "Hexagon",
1157 },
1158 },
1159 .{
1160 .zig_name = "hppa",
1161 .llvm = null,
1162 .extra_features = &.{
1163 .{1120 .{
1164 .zig_name = "64bit",1121 .llvm_name = "cortex-a5",
1165 .desc = "Enable 64-bit PA-RISC 2.0",1122 .omit_deps = &.{"vfp4"},
1166 .deps = &.{"v2_0"},
1167 },1123 },
1168 .{1124 .{
1169 .zig_name = "max_1",1125 .llvm_name = "cortex-a7",
1170 .desc = "Enable MAX-1 multimedia acceleration extensions",1126 .omit_deps = &.{"vfp4"},
1171 .deps = &.{},
1172 },1127 },
1173 .{1128 .{
1174 .zig_name = "max_2",1129 .llvm_name = "cortex-a9",
1175 .desc = "Enable MAX-2 multimedia acceleration extensions",1130 .omit_deps = &.{"fp16"},
1176 .deps = &.{"max_1"},
1177 },1131 },
1178 .{1132 .{
1179 .zig_name = "v1_1",1133 .llvm_name = "cortex-a12",
1180 .desc = "Enable ISA v1.1",1134 .omit_deps = &.{"vfp4"},
1181 .deps = &.{},
1182 },1135 },
1183 .{1136 .{
1184 .zig_name = "v2_0",1137 .llvm_name = "cortex-a15",
1185 .desc = "Enable ISA v2.0",1138 .omit_deps = &.{"vfp4"},
1186 .deps = &.{ "max_2", "v1_1" },
1187 },1139 },
1188 },
1189 .extra_cpus = &.{
1190 .{1140 .{
1191 .llvm_name = null,1141 .llvm_name = "cortex-a17",
1192 .zig_name = "ts_1",1142 .omit_deps = &.{"vfp4"},
1193 .features = &.{},
1194 },1143 },
1195 .{1144 .{
1196 .llvm_name = null,1145 .llvm_name = "cortex-a32",
1197 .zig_name = "ns_1",1146 .omit_deps = &.{"crypto"},
1198 .features = &.{},
1199 },1147 },
1200 .{1148 .{
1201 .llvm_name = null,1149 .llvm_name = "cortex-a35",
1202 .zig_name = "ns_2",1150 .omit_deps = &.{"crypto"},
1203 .features = &.{},
1204 },1151 },
1205 .{1152 .{
1206 .llvm_name = null,1153 .llvm_name = "cortex-a53",
1207 .zig_name = "pcx",1154 .omit_deps = &.{"crypto"},
1208 .features = &.{},
1209 },1155 },
1210 .{1156 .{
1211 .llvm_name = null,1157 .llvm_name = "cortex-a57",
1212 .zig_name = "pa_7000",1158 .omit_deps = &.{"crypto"},
1213 .features = &.{
1214 "v1_1",
1215 },
1216 },1159 },
1217 .{1160 .{
1218 .llvm_name = null,1161 .llvm_name = "cortex-a72",
1219 .zig_name = "pa_7100",1162 .omit_deps = &.{"crypto"},
1220 .features = &.{
1221 "v1_1",
1222 },
1223 },1163 },
1224 .{1164 .{
1225 .llvm_name = null,1165 .llvm_name = "cortex-a73",
1226 .zig_name = "pa_7150",1166 .omit_deps = &.{"crypto"},
1227 .features = &.{
1228 "v1_1",
1229 },
1230 },1167 },
1231 .{1168 .{
1232 .llvm_name = null,1169 .llvm_name = "cortex-a76",
1233 .zig_name = "pa_7100lc",1170 .omit_deps = &.{"crypto"},
1234 .features = &.{
1235 "max_1",
1236 "v1_1",
1237 },
1238 },1171 },
1239 .{1172 .{
1240 .llvm_name = null,1173 .llvm_name = "cortex-a76ae",
1241 .zig_name = "pa_7200",1174 .omit_deps = &.{"crypto"},
1242 .features = &.{
1243 "v1_1",
1244 },
1245 },1175 },
1246 .{1176 .{
1247 .llvm_name = null,1177 .llvm_name = "cortex-a77",
1248 .zig_name = "pa_7300lc",1178 .omit_deps = &.{"crypto"},
1249 .features = &.{
1250 "max_1",
1251 "v1_1",
1252 },
1253 },1179 },
1254 .{1180 .{
1255 .llvm_name = null,1181 .llvm_name = "cortex-a78",
1256 .zig_name = "pa_8000",1182 .omit_deps = &.{"crypto"},
1257 .features = &.{
1258 "64bit",
1259 },
1260 },1183 },
1261 .{1184 .{
1262 .llvm_name = null,1185 .llvm_name = "cortex-a78ae",
1263 .zig_name = "pa_8200",1186 .omit_deps = &.{"crypto"},
1264 .features = &.{
1265 "64bit",
1266 },
1267 },1187 },
1268 .{1188 .{
1269 .llvm_name = null,1189 .llvm_name = "cortex-a78c",
1270 .zig_name = "pa_8500",1190 .omit_deps = &.{"crypto"},
1271 .features = &.{
1272 "64bit",
1273 },
1274 },1191 },
1275 .{1192 .{
1276 .llvm_name = null,1193 .llvm_name = "cortex-m4",
1277 .zig_name = "pa_8600",1194 .omit_deps = &.{"vfp4d16sp"},
1278 .features = &.{
1279 "64bit",
1280 },
1281 },1195 },
1282 .{1196 .{
1283 .llvm_name = null,1197 .llvm_name = "cortex-m7",
1284 .zig_name = "pa_8700",1198 .omit_deps = &.{"fp_armv8d16"},
1285 .features = &.{
1286 "64bit",
1287 },
1288 },1199 },
1289 .{1200 .{
1290 .llvm_name = null,1201 .llvm_name = "cortex-m33",
1291 .zig_name = "pa_8800",1202 .omit_deps = &.{ "dsp", "fp_armv8d16sp" },
1292 .features = &.{
1293 "64bit",
1294 },
1295 },1203 },
1296 .{1204 .{
1297 .llvm_name = null,1205 .llvm_name = "cortex-m35p",
1298 .zig_name = "pa_8900",1206 .omit_deps = &.{ "dsp", "fp_armv8d16sp" },
1299 .features = &.{
1300 "64bit",
1301 },
1302 },1207 },
1303 },1208 .{
1304 },1209 .llvm_name = "cortex-m52",
1305 .{1210 .omit_deps = &.{ "fp_armv8d16", "mve_fp", "pacbti" },
1306 .zig_name = "kvx",1211 },
1212 .{
1213 .llvm_name = "cortex-m55",
1214 .omit_deps = &.{ "fp_armv8d16", "mve_fp" },
1215 },
1216 .{
1217 .llvm_name = "cortex-m85",
1218 .extra_deps = &.{"8msecext"},
1219 .omit_deps = &.{ "fp_armv8d16", "mve_fp", "pacbti" },
1220 },
1221 .{
1222 .llvm_name = "cortex-r5",
1223 .omit_deps = &.{"vfp3d16"},
1224 },
1225 .{
1226 .llvm_name = "cortex-r7",
1227 .omit_deps = &.{ "fp16", "vfp3d16" },
1228 },
1229 .{
1230 .llvm_name = "cortex-r8",
1231 .omit_deps = &.{ "fp16", "vfp3d16" },
1232 },
1233 .{
1234 .llvm_name = "cortex-r52",
1235 .omit_deps = &.{ "fp_armv8", "neon" },
1236 },
1237 .{
1238 .llvm_name = "cortex-r52plus",
1239 .omit_deps = &.{ "fp_armv8", "neon" },
1240 },
1241 .{
1242 .llvm_name = "cortex-x1",
1243 .omit_deps = &.{"crypto"},
1244 },
1245 .{
1246 .llvm_name = "cortex-x1c",
1247 .omit_deps = &.{"crypto"},
1248 },
1249 .{
1250 .llvm_name = "krait",
1251 .extra_deps = &.{"neon"},
1252 },
1253 .{
1254 .llvm_name = "neoverse-n1",
1255 .omit_deps = &.{"crypto"},
1256 },
1257 .{
1258 .llvm_name = "neoverse-v1",
1259 .omit_deps = &.{"crypto"},
1260 },
1261 .{
1262 .llvm_name = "star-mc1",
1263 .omit_deps = &.{ "dsp", "fp_armv8d16sp" },
1264 },
1265 .{
1266 .llvm_name = "star-mc3",
1267 .omit_deps = &.{ "fp_armv8d16", "mve_fp", "pacbti" },
1268 },
1269 .{
1270 .llvm_name = "swift",
1271 .extra_deps = &.{"neon"},
1272 },
1273 },
1274 .extra_models = &.{
1275 .{
1276 .llvm_name = "generic",
1277 .zig_name = "baseline",
1278 .features = &.{ "v7a", "vfp3d16" },
1279 },
1280 .{
1281 .llvm_name = null,
1282 .zig_name = "exynos_m1",
1283 .features = &.{ "v8a", "exynos" },
1284 },
1285 .{
1286 .llvm_name = null,
1287 .zig_name = "exynos_m2",
1288 .features = &.{ "v8a", "exynos" },
1289 },
1290 .{
1291 .llvm_name = "cortex-a9",
1292 .zig_name = "kermit",
1293 .features = &.{
1294 "avoid_partial_cpsr",
1295 "expand_fp_mlx",
1296 "fp16",
1297 "mp",
1298 "muxed_units",
1299 "neon",
1300 "neon_fpmovs",
1301 "prefer_vmovsr",
1302 "ret_addr_stack",
1303 "trustzone",
1304 "v7a",
1305 "vldn_align",
1306 "vmlx_forwarding",
1307 "vmlx_hazards",
1308 },
1309 },
1310 },
1311 },
1312 .{
1313 .zig_name = "avr",
1314 .llvm = .{
1315 .name = "AVR",
1316 .td_name = "AVR",
1317 },
1318 },
1319 .{
1320 .zig_name = "bpf",
1321 .llvm = .{
1322 .name = "BPF",
1323 .td_name = "BPF",
1324 },
1325 .feature_overrides = &.{
1326 .{
1327 .llvm_name = "dummy",
1328 .omit = true,
1329 },
1330 .{
1331 .llvm_name = "dwarfris",
1332 .omit = true,
1333 },
1334 },
1335 },
1336 .{
1337 .zig_name = "csky",
1338 .llvm = .{
1339 .name = "CSKY",
1340 .td_name = "CSKY",
1341 },
1342 .feature_overrides = &.{
1343 .{
1344 .llvm_name = "ccrt",
1345 .omit = true,
1346 },
1347 .{
1348 .llvm_name = "constpool",
1349 .omit = true,
1350 },
1351 .{
1352 .llvm_name = "multiple_stld",
1353 .omit = true,
1354 },
1355 .{
1356 .llvm_name = "nvic",
1357 .omit = true,
1358 },
1359 .{
1360 .llvm_name = "pushpop",
1361 .omit = true,
1362 },
1363 .{
1364 .llvm_name = "smart",
1365 .omit = true,
1366 },
1367 .{
1368 .llvm_name = "soft_tp",
1369 .omit = true,
1370 },
1371 .{
1372 .llvm_name = "stack_size",
1373 .omit = true,
1374 },
1375
1376 .{
1377 .llvm_name = "ck801",
1378 .flatten = true,
1379 },
1380 .{
1381 .llvm_name = "ck802",
1382 .flatten = true,
1383 },
1384 .{
1385 .llvm_name = "ck803",
1386 .flatten = true,
1387 },
1388 .{
1389 .llvm_name = "ck803s",
1390 .flatten = true,
1391 },
1392 .{
1393 .llvm_name = "ck804",
1394 .flatten = true,
1395 },
1396 .{
1397 .llvm_name = "ck805",
1398 .flatten = true,
1399 },
1400 .{
1401 .llvm_name = "ck807",
1402 .flatten = true,
1403 },
1404 .{
1405 .llvm_name = "ck810",
1406 .flatten = true,
1407 },
1408 .{
1409 .llvm_name = "ck810v",
1410 .flatten = true,
1411 },
1412 .{
1413 .llvm_name = "ck860",
1414 .flatten = true,
1415 },
1416 .{
1417 .llvm_name = "ck860v",
1418 .flatten = true,
1419 },
1420 },
1421 },
1422 .{
1423 .zig_name = "hexagon",
1424 .llvm = .{
1425 .name = "Hexagon",
1426 .td_name = "Hexagon",
1427 },
1428 },
1429 .{
1430 .zig_name = "hppa",
1431 .llvm = null,
1432 .extra_features = &.{
1433 .{
1434 .zig_name = "max_1",
1435 .desc = "Enable MAX-1 multimedia acceleration extensions",
1436 .deps = &.{},
1437 },
1438 .{
1439 .zig_name = "max_2",
1440 .desc = "Enable MAX-2 multimedia acceleration extensions",
1441 .deps = &.{"max_1"},
1442 },
1443 .{
1444 .zig_name = "v1_1",
1445 .desc = "Enable ISA v1.1",
1446 .deps = &.{},
1447 },
1448 .{
1449 .zig_name = "v2_0",
1450 .desc = "Enable ISA v2.0",
1451 .deps = &.{ "max_2", "v1_1" },
1452 },
1453 },
1454 .extra_models = &.{
1455 .{
1456 .llvm_name = null,
1457 .zig_name = "ts_1",
1458 .features = &.{},
1459 },
1460 .{
1461 .llvm_name = null,
1462 .zig_name = "ns_1",
1463 .features = &.{},
1464 },
1465 .{
1466 .llvm_name = null,
1467 .zig_name = "ns_2",
1468 .features = &.{},
1469 },
1470 .{
1471 .llvm_name = null,
1472 .zig_name = "pcx",
1473 .features = &.{},
1474 },
1475 .{
1476 .llvm_name = null,
1477 .zig_name = "pa_7000",
1478 .features = &.{
1479 "v1_1",
1480 },
1481 },
1482 .{
1483 .llvm_name = null,
1484 .zig_name = "pa_7100",
1485 .features = &.{
1486 "v1_1",
1487 },
1488 },
1489 .{
1490 .llvm_name = null,
1491 .zig_name = "pa_7150",
1492 .features = &.{
1493 "v1_1",
1494 },
1495 },
1496 .{
1497 .llvm_name = null,
1498 .zig_name = "pa_7100lc",
1499 .features = &.{
1500 "max_1",
1501 "v1_1",
1502 },
1503 },
1504 .{
1505 .llvm_name = null,
1506 .zig_name = "pa_7200",
1507 .features = &.{
1508 "v1_1",
1509 },
1510 },
1511 .{
1512 .llvm_name = null,
1513 .zig_name = "pa_7300lc",
1514 .features = &.{
1515 "max_1",
1516 "v1_1",
1517 },
1518 },
1519 .{
1520 .llvm_name = null,
1521 .zig_name = "pa_8000",
1522 .features = &.{
1523 "v2_0",
1524 },
1525 },
1526 .{
1527 .llvm_name = null,
1528 .zig_name = "pa_8200",
1529 .features = &.{
1530 "v2_0",
1531 },
1532 },
1533 .{
1534 .llvm_name = null,
1535 .zig_name = "pa_8500",
1536 .features = &.{
1537 "v2_0",
1538 },
1539 },
1540 .{
1541 .llvm_name = null,
1542 .zig_name = "pa_8600",
1543 .features = &.{
1544 "v2_0",
1545 },
1546 },
1547 .{
1548 .llvm_name = null,
1549 .zig_name = "pa_8700",
1550 .features = &.{
1551 "v2_0",
1552 },
1553 },
1554 .{
1555 .llvm_name = null,
1556 .zig_name = "pa_8800",
1557 .features = &.{
1558 "v2_0",
1559 },
1560 },
1561 .{
1562 .llvm_name = null,
1563 .zig_name = "pa_8900",
1564 .features = &.{
1565 "v2_0",
1566 },
1567 },
1568 },
1569 },
1570 .{
1571 .zig_name = "kvx",
1307 .llvm = null,1572 .llvm = null,
1308 .extra_features = &.{1573 .extra_features = &.{
1309 .{1574 .{
...@@ -1314,7 +1579,7 @@ const targets = [_]ArchTarget{...@@ -1314,7 +1579,7 @@ const targets = [_]ArchTarget{
1314 .{1579 .{
1315 .zig_name = "v3_2",1580 .zig_name = "v3_2",
1316 .desc = "Enable ISA v3.2",1581 .desc = "Enable ISA v3.2",
1317 .deps = &.{"v3_1"},1582 .deps = &.{},
1318 },1583 },
1319 .{1584 .{
1320 .zig_name = "v4_1",1585 .zig_name = "v4_1",
...@@ -1322,7 +1587,7 @@ const targets = [_]ArchTarget{...@@ -1322,7 +1587,7 @@ const targets = [_]ArchTarget{
1322 .deps = &.{"v3_2"},1587 .deps = &.{"v3_2"},
1323 },1588 },
1324 },1589 },
1325 .extra_cpus = &.{1590 .extra_models = &.{
1326 .{1591 .{
1327 .llvm_name = null,1592 .llvm_name = null,
1328 .zig_name = "coolidge_v1",1593 .zig_name = "coolidge_v1",
...@@ -1352,7 +1617,25 @@ const targets = [_]ArchTarget{...@@ -1352,7 +1617,25 @@ const targets = [_]ArchTarget{
1352 .name = "LoongArch",1617 .name = "LoongArch",
1353 .td_name = "LoongArch",1618 .td_name = "LoongArch",
1354 },1619 },
1355 .extra_cpus = &.{1620 .model_overrides = &.{
1621 .{
1622 .llvm_name = "generic",
1623 .omit = true,
1624 },
1625 .{
1626 .llvm_name = "generic-la64",
1627 .omit = true,
1628 },
1629 .{
1630 .llvm_name = "loongarch32",
1631 .omit = true,
1632 },
1633 .{
1634 .llvm_name = "loongarch64",
1635 .omit = true,
1636 },
1637 },
1638 .extra_models = &.{
1356 .{1639 .{
1357 .llvm_name = null,1640 .llvm_name = null,
1358 .zig_name = "generic_la64",1641 .zig_name = "generic_la64",
...@@ -1403,12 +1686,6 @@ const targets = [_]ArchTarget{...@@ -1403,12 +1686,6 @@ const targets = [_]ArchTarget{
1403 },1686 },
1404 },1687 },
1405 },1688 },
1406 .omit_cpus = &.{
1407 "generic",
1408 "generic-la64",
1409 "loongarch32",
1410 "loongarch64",
1411 },
1412 },1689 },
1413 .{1690 .{
1414 .zig_name = "m68k",1691 .zig_name = "m68k",
...@@ -1437,7 +1714,7 @@ const targets = [_]ArchTarget{...@@ -1437,7 +1714,7 @@ const targets = [_]ArchTarget{
1437 .deps = &.{},1714 .deps = &.{},
1438 },1715 },
1439 },1716 },
1440 .extra_cpus = &.{1717 .extra_models = &.{
1441 .{1718 .{
1442 .llvm_name = null,1719 .llvm_name = null,
1443 .zig_name = "r3000a",1720 .zig_name = "r3000a",
...@@ -1489,7 +1766,13 @@ const targets = [_]ArchTarget{...@@ -1489,7 +1766,13 @@ const targets = [_]ArchTarget{
1489 .omit = true,1766 .omit = true,
1490 },1767 },
1491 },1768 },
1492 .extra_cpus = &.{1769 .model_overrides = &.{
1770 .{
1771 .llvm_name = "ppc32",
1772 .omit = true,
1773 },
1774 },
1775 .extra_models = &.{
1493 .{1776 .{
1494 .llvm_name = null,1777 .llvm_name = null,
1495 .zig_name = "cell",1778 .zig_name = "cell",
...@@ -1525,9 +1808,6 @@ const targets = [_]ArchTarget{...@@ -1525,9 +1808,6 @@ const targets = [_]ArchTarget{
1525 },1808 },
1526 },1809 },
1527 },1810 },
1528 .omit_cpus = &.{
1529 "ppc32",
1530 },
1531 },1811 },
1532 .{1812 .{
1533 .zig_name = "propeller",1813 .zig_name = "propeller",
...@@ -1539,7 +1819,7 @@ const targets = [_]ArchTarget{...@@ -1539,7 +1819,7 @@ const targets = [_]ArchTarget{
1539 .deps = &.{},1819 .deps = &.{},
1540 },1820 },
1541 },1821 },
1542 .extra_cpus = &.{1822 .extra_models = &.{
1543 .{1823 .{
1544 .llvm_name = null,1824 .llvm_name = null,
1545 .zig_name = "p1",1825 .zig_name = "p1",
...@@ -1560,7 +1840,7 @@ const targets = [_]ArchTarget{...@@ -1560,7 +1840,7 @@ const targets = [_]ArchTarget{
1560 },1840 },
1561 .branch_quota = 2000,1841 .branch_quota = 2000,
1562 .extra_features = spirv_extra_features,1842 .extra_features = spirv_extra_features,
1563 .extra_cpus = &.{1843 .extra_models = &.{
1564 .{1844 .{
1565 .llvm_name = null,1845 .llvm_name = null,
1566 .zig_name = "vulkan_v1_2",1846 .zig_name = "vulkan_v1_2",
...@@ -1586,7 +1866,7 @@ const targets = [_]ArchTarget{...@@ -1586,7 +1866,7 @@ const targets = [_]ArchTarget{
1586 .flatten = true,1866 .flatten = true,
1587 },1867 },
1588 },1868 },
1589 .extra_cpus = &.{1869 .extra_models = &.{
1590 .{1870 .{
1591 .llvm_name = null,1871 .llvm_name = null,
1592 .zig_name = "baseline_rv32",1872 .zig_name = "baseline_rv32",
...@@ -1619,6 +1899,36 @@ const targets = [_]ArchTarget{...@@ -1619,6 +1899,36 @@ const targets = [_]ArchTarget{
1619 .name = "VE",1899 .name = "VE",
1620 .td_name = "VE",1900 .td_name = "VE",
1621 },1901 },
1902 .extra_features = &.{
1903 .{
1904 .zig_name = "ve3",
1905 .desc = "Enable VE3 instructions",
1906 .deps = &.{},
1907 },
1908 },
1909 .model_overrides = &.{
1910 .{
1911 .llvm_name = "generic",
1912 .omit = true,
1913 },
1914 },
1915 .extra_models = &.{
1916 .{
1917 .llvm_name = null,
1918 .zig_name = "ve10",
1919 .features = &.{"vpu"},
1920 },
1921 .{
1922 .llvm_name = null,
1923 .zig_name = "ve20",
1924 .features = &.{"vpu"},
1925 },
1926 .{
1927 .llvm_name = null,
1928 .zig_name = "ve30",
1929 .features = &.{ "ve3", "vpu" },
1930 },
1931 },
1622 },1932 },
1623 .{1933 .{
1624 .zig_name = "wasm",1934 .zig_name = "wasm",
...@@ -1633,9 +1943,17 @@ const targets = [_]ArchTarget{...@@ -1633,9 +1943,17 @@ const targets = [_]ArchTarget{
1633 .llvm_name = "bulk-memory",1943 .llvm_name = "bulk-memory",
1634 .extra_deps = &.{"bulk_memory_opt"},1944 .extra_deps = &.{"bulk_memory_opt"},
1635 },1945 },
1946 .{
1947 .llvm_name = "f16",
1948 .extra_deps = &.{"simd128"},
1949 },
1636 .{1950 .{
1637 .llvm_name = "reference-types",1951 .llvm_name = "reference-types",
1638 .extra_deps = &.{"call_indirect_overlong"},1952 .extra_deps = &.{ "bulk_memory", "call_indirect_overlong" },
1953 },
1954 .{
1955 .llvm_name = "relaxed-simd",
1956 .extra_deps = &.{"simd128"},
1639 },1957 },
1640 },1958 },
1641 .extra_features = &.{1959 .extra_features = &.{
...@@ -1645,6 +1963,54 @@ const targets = [_]ArchTarget{...@@ -1645,6 +1963,54 @@ const targets = [_]ArchTarget{
1645 .deps = &.{"bulk_memory_opt"},1963 .deps = &.{"bulk_memory_opt"},
1646 },1964 },
1647 },1965 },
1966 .model_overrides = &.{
1967 .{
1968 .llvm_name = "bleeding-edge",
1969 .omit = true,
1970 },
1971 .{
1972 .llvm_name = "generic",
1973 .omit = true,
1974 },
1975 },
1976 .extra_models = &.{
1977 .{
1978 .llvm_name = null,
1979 .zig_name = "wasm_v1_0",
1980 .features = &.{
1981 "mutable_globals",
1982 },
1983 },
1984 .{
1985 .llvm_name = null,
1986 .zig_name = "wasm_v2_0",
1987 .features = &.{
1988 "multivalue",
1989 "mutable_globals",
1990 "nontrapping_fptoint",
1991 "reference_types",
1992 "sign_ext",
1993 "simd128",
1994 },
1995 },
1996 .{
1997 .llvm_name = null,
1998 .zig_name = "wasm_v3_0",
1999 .features = &.{
2000 "atomics",
2001 "exception_handling",
2002 "extended_const",
2003 "fp16",
2004 "gc",
2005 "multimemory",
2006 "mutable_globals",
2007 "nontrapping_fptoint",
2008 "relaxed_simd",
2009 "sign_ext",
2010 "tail_call",
2011 },
2012 },
2013 },
1648 },2014 },
1649 .{2015 .{
1650 .zig_name = "x86",2016 .zig_name = "x86",
...@@ -1670,20 +2036,58 @@ const targets = [_]ArchTarget{...@@ -1670,20 +2036,58 @@ const targets = [_]ArchTarget{
1670 .omit = true,2036 .omit = true,
1671 },2037 },
1672 .{2038 .{
1673 .llvm_name = "alderlake",2039 .llvm_name = "sse4.2",
1674 .extra_deps = &.{ "smap", "smep" },2040 .extra_deps = &.{"crc32"},
1675 },2041 },
2042 },
2043 .extra_features = &.{
2044 // Features removed from LLVM
1676 .{2045 .{
1677 .llvm_name = "amdfam10",2046 .zig_name = "3dnow",
1678 .extra_deps = &.{"3dnowa"},2047 .desc = "Enable 3DNow! instructions",
2048 .deps = &.{"mmx"},
1679 },2049 },
1680 .{2050 .{
1681 .llvm_name = "arrowlake",2051 .zig_name = "3dnowa",
1682 .extra_deps = &.{ "smap", "smep" },2052 .desc = "Enable 3DNow! Athlon instructions",
2053 .deps = &.{"3dnow"},
1683 },2054 },
1684 .{2055 .{
1685 .llvm_name = "arrowlake-s",2056 .zig_name = "avx512er",
1686 .extra_deps = &.{ "smap", "smep" },2057 .desc = "Enable AVX-512 Exponential and Reciprocal Instructions",
2058 .deps = &.{"avx512f"},
2059 },
2060 .{
2061 .zig_name = "avx512pf",
2062 .desc = "Enable AVX-512 PreFetch Instructions",
2063 .deps = &.{"avx512f"},
2064 },
2065 .{
2066 .zig_name = "prefetchwt1",
2067 .desc = "Prefetch with Intent to Write and T1 Hint",
2068 .deps = &.{},
2069 },
2070 // Custom Zig features
2071 .{
2072 .zig_name = "bsf_bsr_0_clobbers_result",
2073 .desc = "BSF/BSR may clobber the lower 32-bits of the result register when the source is zero",
2074 .deps = &.{},
2075 },
2076 .{
2077 .zig_name = "smap",
2078 .desc = "Enable Supervisor Mode Access Prevention",
2079 .deps = &.{},
2080 },
2081 .{
2082 .zig_name = "smep",
2083 .desc = "Enable Supervisor Mode Execution Prevention",
2084 .deps = &.{},
2085 },
2086 },
2087 .model_overrides = &.{
2088 .{
2089 .llvm_name = "amdfam10",
2090 .extra_deps = &.{"3dnowa"},
1687 },2091 },
1688 .{2092 .{
1689 .llvm_name = "athlon",2093 .llvm_name = "athlon",
...@@ -1862,8 +2266,16 @@ const targets = [_]ArchTarget{...@@ -1862,8 +2266,16 @@ const targets = [_]ArchTarget{
1862 .extra_deps = &.{"3dnow"},2266 .extra_deps = &.{"3dnow"},
1863 },2267 },
1864 .{2268 .{
1865 .llvm_name = "sse4.2",2269 .llvm_name = "alderlake",
1866 .extra_deps = &.{"crc32"},2270 .extra_deps = &.{ "smap", "smep" },
2271 },
2272 .{
2273 .llvm_name = "arrowlake",
2274 .extra_deps = &.{ "smap", "smep" },
2275 },
2276 .{
2277 .llvm_name = "arrowlake-s",
2278 .extra_deps = &.{ "smap", "smep" },
1867 },2279 },
1868 .{2280 .{
1869 .llvm_name = "znver1",2281 .llvm_name = "znver1",
...@@ -1885,92 +2297,140 @@ const targets = [_]ArchTarget{...@@ -1885,92 +2297,140 @@ const targets = [_]ArchTarget{
1885 .llvm_name = "znver5",2297 .llvm_name = "znver5",
1886 .extra_deps = &.{ "smap", "smep" },2298 .extra_deps = &.{ "smap", "smep" },
1887 },2299 },
1888 },2300
1889 .extra_features = &.{2301 // LLVM defines a bunch of dumb aliases with foreach loops in X86.td.
1890 // Features removed from LLVM
1891 .{2302 .{
1892 .zig_name = "3dnow",2303 .llvm_name = "pentium_mmx",
1893 .desc = "Enable 3DNow! instructions",2304 .omit = true,
1894 .deps = &.{"mmx"},
1895 },2305 },
1896 .{2306 .{
1897 .zig_name = "3dnowa",2307 .llvm_name = "pentium_pro",
1898 .desc = "Enable 3DNow! Athlon instructions",2308 .omit = true,
1899 .deps = &.{"3dnow"},
1900 },2309 },
1901 .{2310 .{
1902 .zig_name = "avx512er",2311 .llvm_name = "pentium_ii",
1903 .desc = "Enable AVX-512 Exponential and Reciprocal Instructions",2312 .omit = true,
1904 .deps = &.{"avx512f"},
1905 },2313 },
1906 .{2314 .{
1907 .zig_name = "avx512pf",2315 .llvm_name = "pentium_3m",
1908 .desc = "Enable AVX-512 PreFetch Instructions",2316 .omit = true,
1909 .deps = &.{"avx512f"},
1910 },2317 },
1911 .{2318 .{
1912 .zig_name = "prefetchwt1",2319 .llvm_name = "pentium_iii",
1913 .desc = "Prefetch with Intent to Write and T1 Hint",2320 .omit = true,
1914 .deps = &.{},
1915 },2321 },
1916 // Custom Zig features
1917 .{2322 .{
1918 .zig_name = "bsf_bsr_0_clobbers_result",2323 .llvm_name = "pentium_iii_no_xmm_regs",
1919 .desc = "BSF/BSR may clobber the lower 32-bits of the result register when the source is zero",2324 .omit = true,
1920 .deps = &.{},
1921 },2325 },
1922 .{2326 .{
1923 .zig_name = "smap",2327 .llvm_name = "pentium_m",
1924 .desc = "Enable Supervisor Mode Access Prevention",2328 .omit = true,
1925 .deps = &.{},
1926 },2329 },
1927 .{2330 .{
1928 .zig_name = "smep",2331 .llvm_name = "pentium4m",
1929 .desc = "Enable Supervisor Mode Execution Prevention",2332 .omit = true,
1930 .deps = &.{},2333 },
2334 .{
2335 .llvm_name = "pentium_4",
2336 .omit = true,
2337 },
2338 .{
2339 .llvm_name = "pentium_4_sse3",
2340 .omit = true,
2341 },
2342 .{
2343 .llvm_name = "core_2_duo_ssse3",
2344 .omit = true,
2345 },
2346 .{
2347 .llvm_name = "core_2_duo_sse4_1",
2348 .omit = true,
2349 },
2350 .{
2351 .llvm_name = "atom_sse4_2",
2352 .omit = true,
2353 },
2354 .{
2355 .llvm_name = "goldmont-plus",
2356 .omit = true,
2357 },
2358 .{
2359 .llvm_name = "core_i7_sse4_2",
2360 .omit = true,
2361 },
2362 .{
2363 .llvm_name = "core_aes_pclmulqdq",
2364 .omit = true,
2365 },
2366 .{
2367 .llvm_name = "corei7-avx",
2368 .omit = true,
2369 },
2370 .{
2371 .llvm_name = "core_2nd_gen_avx",
2372 .omit = true,
2373 },
2374 .{
2375 .llvm_name = "core-avx-i",
2376 .omit = true,
2377 },
2378 .{
2379 .llvm_name = "core_3rd_gen_avx",
2380 .omit = true,
2381 },
2382 .{
2383 .llvm_name = "core-avx2",
2384 .omit = true,
2385 },
2386 .{
2387 .llvm_name = "core_4th_gen_avx",
2388 .omit = true,
2389 },
2390 .{
2391 .llvm_name = "core_4th_gen_avx_tsx",
2392 .omit = true,
2393 },
2394 .{
2395 .llvm_name = "core_5th_gen_avx",
2396 .omit = true,
2397 },
2398 .{
2399 .llvm_name = "core_5th_gen_avx_tsx",
2400 .omit = true,
2401 },
2402 .{
2403 .llvm_name = "mic_avx512",
2404 .omit = true,
2405 },
2406 .{
2407 .llvm_name = "skylake-avx512",
2408 .omit = true,
2409 },
2410 .{
2411 .llvm_name = "icelake-client",
2412 .omit = true,
2413 },
2414 .{
2415 .llvm_name = "icelake-server",
2416 .omit = true,
2417 },
2418 .{
2419 .llvm_name = "graniterapids_d",
2420 .omit = true,
2421 },
2422 .{
2423 .llvm_name = "arrowlake_s",
2424 .omit = true,
1931 },2425 },
1932 },2426 },
1933 .extra_cpus = &.{2427 .extra_models = &.{
1934 .{2428 .{
1935 .llvm_name = null,2429 .llvm_name = null,
1936 .zig_name = "i86",2430 .zig_name = "i86",
1937 .features = &.{"16bit_mode"},2431 .features = &.{"16bit_mode"},
1938 },2432 },
1939 },2433 },
1940 .omit_cpus = &.{
1941 // LLVM defines a bunch of dumb aliases with foreach loops in X86.td.
1942 "pentium_mmx",
1943 "pentium_pro",
1944 "pentium_ii",
1945 "pentium_3m",
1946 "pentium_iii_no_xmm_regs",
1947 "pentium_iii",
1948 "pentium_m",
1949 "pentium4m",
1950 "pentium_4",
1951 "pentium_4_sse3",
1952 "core_2_duo_ssse3",
1953 "core_2_duo_sse4_1",
1954 "atom_sse4_2",
1955 "goldmont_plus",
1956 "core_i7_sse4_2",
1957 "core_aes_pclmulqdq",
1958 "corei7-avx",
1959 "core_2nd_gen_avx",
1960 "core-avx-i",
1961 "core_3rd_gen_avx",
1962 "core-avx2",
1963 "core_4th_gen_avx",
1964 "core_4th_gen_avx_tsx",
1965 "core_5th_gen_avx",
1966 "core_5th_gen_avx_tsx",
1967 "mic_avx512",
1968 "skylake_avx512",
1969 "icelake_client",
1970 "icelake_server",
1971 "graniterapids_d",
1972 "arrowlake_s",
1973 },
1974 },2434 },
1975 .{2435 .{
1976 .zig_name = "xcore",2436 .zig_name = "xcore",
...@@ -1978,6 +2438,55 @@ const targets = [_]ArchTarget{...@@ -1978,6 +2438,55 @@ const targets = [_]ArchTarget{
1978 .name = "XCore",2438 .name = "XCore",
1979 .td_name = "XCore",2439 .td_name = "XCore",
1980 },2440 },
2441 .extra_features = &.{
2442 .{
2443 .zig_name = "xs2",
2444 .desc = "Enable XS2 architecture",
2445 .deps = &.{},
2446 },
2447 .{
2448 .zig_name = "xs3",
2449 .desc = "Enable XS3 architecture",
2450 .deps = &.{"xs2"},
2451 },
2452 .{
2453 .zig_name = "fpu",
2454 .desc = "Enable single-precision floating point unit",
2455 .deps = &.{"xs3"},
2456 },
2457 .{
2458 .zig_name = "vpu",
2459 .desc = "Enable vector processing unit",
2460 .deps = &.{"xs3"},
2461 },
2462 },
2463 .model_overrides = &.{
2464 .{
2465 .llvm_name = "generic",
2466 .omit = true,
2467 },
2468 .{
2469 .llvm_name = "xs1b-generic",
2470 .omit = true,
2471 },
2472 },
2473 .extra_models = &.{
2474 .{
2475 .llvm_name = null,
2476 .zig_name = "xs1b",
2477 .features = &.{},
2478 },
2479 .{
2480 .llvm_name = null,
2481 .zig_name = "xs2a",
2482 .features = &.{"xs2"},
2483 },
2484 .{
2485 .llvm_name = null,
2486 .zig_name = "xs3a",
2487 .features = &.{ "fpu", "vpu" },
2488 },
2489 },
1981 },2490 },
1982 .{2491 .{
1983 .zig_name = "xtensa",2492 .zig_name = "xtensa",
...@@ -2073,7 +2582,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2073,7 +2582,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {
20732582
2074 var features_table = std.StringHashMap(Feature).init(arena);2583 var features_table = std.StringHashMap(Feature).init(arena);
2075 var all_features = std.array_list.Managed(Feature).init(arena);2584 var all_features = std.array_list.Managed(Feature).init(arena);
2076 var all_cpus = std.array_list.Managed(Cpu).init(arena);2585 var all_models = std.array_list.Managed(Model).init(arena);
20772586
2078 if (target.llvm) |llvm| {2587 if (target.llvm) |llvm| {
2079 const tblgen_progress = progress_node.start("running llvm-tblgen", 0);2588 const tblgen_progress = progress_node.start("running llvm-tblgen", 0);
...@@ -2133,7 +2642,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2133,7 +2642,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2133 llvm: []const u8,2642 llvm: []const u8,
2134 zig: []const u8,2643 zig: []const u8,
2135 };2644 };
2136 var cpu_aliases = std.StringHashMap(std.ArrayList(*Alias)).init(arena);2645 var model_aliases = std.StringHashMap(std.ArrayList(*Alias)).init(arena);
21372646
2138 {2647 {
2139 var it = root_map.iterator();2648 var it = root_map.iterator();
...@@ -2147,7 +2656,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2147,7 +2656,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2147 const llvm_alias = kv.value_ptr.object.get("Name").?.string;2656 const llvm_alias = kv.value_ptr.object.get("Name").?.string;
2148 const llvm_name = kv.value_ptr.object.get("Alias").?.string;2657 const llvm_name = kv.value_ptr.object.get("Alias").?.string;
21492658
2150 const gop = try cpu_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name));2659 const gop = try model_aliases.getOrPut(try llvmNameToZigName(arena, llvm_name));
21512660
2152 if (!gop.found_existing) {2661 if (!gop.found_existing) {
2153 gop.value_ptr.* = .empty;2662 gop.value_ptr.* = .empty;
...@@ -2253,28 +2762,25 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2253,28 +2762,25 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2253 if (hasSuperclass(&kv.value_ptr.object, "Processor")) {2762 if (hasSuperclass(&kv.value_ptr.object, "Processor")) {
2254 const llvm_name = kv.value_ptr.object.get("Name").?.string;2763 const llvm_name = kv.value_ptr.object.get("Name").?.string;
2255 if (llvm_name.len == 0) continue;2764 if (llvm_name.len == 0) continue;
2256 const omitted = for (target.omit_cpus) |omit_cpu_name| {
2257 if (mem.eql(u8, omit_cpu_name, llvm_name)) break true;
2258 } else false;
2259 if (omitted) continue;
22602765
2261 var zig_name = try llvmNameToZigName(arena, llvm_name);2766 var zig_name = try llvmNameToZigName(arena, llvm_name);
2262 var deps = std.array_list.Managed([]const u8).init(arena);2767 var deps = std.array_list.Managed([]const u8).init(arena);
2263 var omit_deps: []const []const u8 = &.{};2768 var omit_deps: []const []const u8 = &.{};
2264 var extra_deps: []const []const u8 = &.{};2769 var extra_deps: []const []const u8 = &.{};
2265 for (target.feature_overrides) |feature_override| {2770 const omitted = for (target.model_overrides) |model_override| {
2266 if (mem.eql(u8, llvm_name, feature_override.llvm_name)) {2771 if (mem.eql(u8, llvm_name, model_override.llvm_name)) {
2267 if (feature_override.omit) {2772 if (model_override.omit) {
2268 continue;2773 break true;
2269 }2774 }
2270 if (feature_override.zig_name) |override_name| {2775 if (model_override.zig_name) |override_name| {
2271 zig_name = override_name;2776 zig_name = override_name;
2272 }2777 }
2273 omit_deps = feature_override.omit_deps;2778 omit_deps = model_override.omit_deps;
2274 extra_deps = feature_override.extra_deps;2779 extra_deps = model_override.extra_deps;
2275 break;2780 break false;
2276 }2781 }
2277 }2782 } else false;
2783 if (omitted) continue;
2278 const features = kv.value_ptr.object.get("Features").?.array;2784 const features = kv.value_ptr.object.get("Features").?.array;
2279 for (features.items) |feature| {2785 for (features.items) |feature| {
2280 const feature_key = feature.object.get("def").?.string;2786 const feature_key = feature.object.get("def").?.string;
...@@ -2308,19 +2814,19 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2308,19 +2814,19 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2308 )) orelse continue;2814 )) orelse continue;
2309 try deps.append(feature_zig_name);2815 try deps.append(feature_zig_name);
2310 }2816 }
2311 try all_cpus.append(.{2817 try all_models.append(.{
2312 .llvm_name = llvm_name,2818 .llvm_name = llvm_name,
2313 .zig_name = zig_name,2819 .zig_name = zig_name,
2314 .features = deps.items,2820 .features = deps.items,
2315 });2821 });
23162822
2317 if (cpu_aliases.get(zig_name)) |aliases| {2823 if (model_aliases.get(zig_name)) |aliases| {
2318 alias_it: for (aliases.items) |alias| {2824 alias_it: for (aliases.items) |alias| {
2319 for (target.omit_cpus) |omit_cpu_name| {2825 for (target.model_overrides) |model_override| {
2320 if (mem.eql(u8, omit_cpu_name, alias.llvm)) continue :alias_it;2826 if (mem.eql(u8, alias.llvm, model_override.llvm_name) and model_override.omit) continue :alias_it;
2321 }2827 }
23222828
2323 try all_cpus.append(.{2829 try all_models.append(.{
2324 .llvm_name = alias.llvm,2830 .llvm_name = alias.llvm,
2325 .zig_name = alias.zig,2831 .zig_name = alias.zig,
2326 .features = deps.items,2832 .features = deps.items,
...@@ -2338,11 +2844,11 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2338,11 +2844,11 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2338 try features_table.put(extra_feature.zig_name, extra_feature);2844 try features_table.put(extra_feature.zig_name, extra_feature);
2339 try all_features.append(extra_feature);2845 try all_features.append(extra_feature);
2340 }2846 }
2341 for (target.extra_cpus) |extra_cpu| {2847 for (target.extra_models) |extra_model| {
2342 try all_cpus.append(extra_cpu);2848 try all_models.append(extra_model);
2343 }2849 }
2344 mem.sort(Feature, all_features.items, {}, featureLessThan);2850 mem.sort(Feature, all_features.items, {}, featureLessThan);
2345 mem.sort(Cpu, all_cpus.items, {}, cpuLessThan);2851 mem.sort(Model, all_models.items, {}, modelLessThan);
23462852
2347 const render_progress = progress_node.start("rendering Zig code", 0);2853 const render_progress = progress_node.start("rendering Zig code", 0);
23482854
...@@ -2465,29 +2971,29 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2465,29 +2971,29 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2465 \\pub const cpu = struct {2971 \\pub const cpu = struct {
2466 \\2972 \\
2467 );2973 );
2468 for (all_cpus.items) |cpu| {2974 for (all_models.items) |model| {
2469 var deps_set = std.StringHashMap(void).init(arena);2975 var deps_set = std.StringHashMap(void).init(arena);
2470 for (cpu.features) |feature_zig_name| {2976 for (model.features) |feature_zig_name| {
2471 try putDep(&deps_set, features_table, feature_zig_name);2977 try putDep(&deps_set, features_table, feature_zig_name);
2472 }2978 }
2473 try pruneFeatures(arena, features_table, &deps_set);2979 try pruneFeatures(arena, features_table, &deps_set);
2474 var cpu_features = std.array_list.Managed([]const u8).init(arena);2980 var model_features = std.array_list.Managed([]const u8).init(arena);
2475 {2981 {
2476 var it = deps_set.keyIterator();2982 var it = deps_set.keyIterator();
2477 while (it.next()) |key| {2983 while (it.next()) |key| {
2478 try cpu_features.append(key.*);2984 try model_features.append(key.*);
2479 }2985 }
2480 }2986 }
2481 mem.sort([]const u8, cpu_features.items, {}, asciiLessThan);2987 mem.sort([]const u8, model_features.items, {}, asciiLessThan);
2482 if (cpu.llvm_name) |llvm_name| {2988 if (model.llvm_name) |llvm_name| {
2483 try w.print(2989 try w.print(
2484 \\ pub const {f}: CpuModel = .{{2990 \\ pub const {f}: CpuModel = .{{
2485 \\ .name = "{f}",2991 \\ .name = "{f}",
2486 \\ .llvm_name = "{f}",2992 \\ .llvm_name = "{f}",
2487 \\ .features = featureSet(&[_]Feature{{2993 \\ .features = featureSet(&[_]Feature{{
2488 , .{2994 , .{
2489 std.zig.fmtId(cpu.zig_name),2995 std.zig.fmtId(model.zig_name),
2490 std.zig.fmtString(cpu.zig_name),2996 std.zig.fmtString(model.zig_name),
2491 std.zig.fmtString(llvm_name),2997 std.zig.fmtString(llvm_name),
2492 });2998 });
2493 } else {2999 } else {
...@@ -2497,11 +3003,11 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2497,11 +3003,11 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2497 \\ .llvm_name = null,3003 \\ .llvm_name = null,
2498 \\ .features = featureSet(&[_]Feature{{3004 \\ .features = featureSet(&[_]Feature{{
2499 , .{3005 , .{
2500 std.zig.fmtId(cpu.zig_name),3006 std.zig.fmtId(model.zig_name),
2501 std.zig.fmtString(cpu.zig_name),3007 std.zig.fmtString(model.zig_name),
2502 });3008 });
2503 }3009 }
2504 if (cpu_features.items.len == 0) {3010 if (model_features.items.len == 0) {
2505 try w.writeAll(3011 try w.writeAll(
2506 \\}),3012 \\}),
2507 \\ };3013 \\ };
...@@ -2509,7 +3015,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {...@@ -2509,7 +3015,7 @@ fn processOneTargetInner(io: Io, job: Job) !void {
2509 );3015 );
2510 } else {3016 } else {
2511 try w.writeAll("\n");3017 try w.writeAll("\n");
2512 for (cpu_features.items) |feature_zig_name| {3018 for (model_features.items) |feature_zig_name| {
2513 try w.print(" .{f},\n", .{std.zig.fmtIdPU(feature_zig_name)});3019 try w.print(" .{f},\n", .{std.zig.fmtIdPU(feature_zig_name)});
2514 }3020 }
2515 try w.writeAll(3021 try w.writeAll(
...@@ -2547,7 +3053,7 @@ fn featureLessThan(_: void, a: Feature, b: Feature) bool {...@@ -2547,7 +3053,7 @@ fn featureLessThan(_: void, a: Feature, b: Feature) bool {
2547 return std.ascii.lessThanIgnoreCase(a.zig_name, b.zig_name);3053 return std.ascii.lessThanIgnoreCase(a.zig_name, b.zig_name);
2548}3054}
25493055
2550fn cpuLessThan(_: void, a: Cpu, b: Cpu) bool {3056fn modelLessThan(_: void, a: Model, b: Model) bool {
2551 return std.ascii.lessThanIgnoreCase(a.zig_name, b.zig_name);3057 return std.ascii.lessThanIgnoreCase(a.zig_name, b.zig_name);
2552}3058}
25533059