| ... | @@ -380,7 +380,7 @@ pub inline fn spinLoopHint() void { | ... | @@ -380,7 +380,7 @@ pub inline fn spinLoopHint() void { |
| 380 | // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html | 380 | // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html |
| 381 | .x86, | 381 | .x86, |
| 382 | .x86_64, | 382 | .x86_64, |
| 383 | => asm volatile ("pause" ::: "memory"), | 383 | => asm volatile ("pause"), |
| 384 | | 384 | |
| 385 | // No-op instruction that serves as a hardware-thread resource yield hint. | 385 | // No-op instruction that serves as a hardware-thread resource yield hint. |
| 386 | // https://stackoverflow.com/a/7588941 | 386 | // https://stackoverflow.com/a/7588941 |
| ... | @@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void { | ... | @@ -388,7 +388,7 @@ pub inline fn spinLoopHint() void { |
| 388 | .powerpcle, | 388 | .powerpcle, |
| 389 | .powerpc64, | 389 | .powerpc64, |
| 390 | .powerpc64le, | 390 | .powerpc64le, |
| 391 | => asm volatile ("or 27, 27, 27" ::: "memory"), | 391 | => asm volatile ("or 27, 27, 27"), |
| 392 | | 392 | |
| 393 | // `isb` appears more reliable for releasing execution resources than `yield` | 393 | // `isb` appears more reliable for releasing execution resources than `yield` |
| 394 | // on common aarch64 CPUs. | 394 | // on common aarch64 CPUs. |
| ... | @@ -396,7 +396,7 @@ pub inline fn spinLoopHint() void { | ... | @@ -396,7 +396,7 @@ pub inline fn spinLoopHint() void { |
| 396 | // https://bugs.mysql.com/bug.php?id=100664 | 396 | // https://bugs.mysql.com/bug.php?id=100664 |
| 397 | .aarch64, | 397 | .aarch64, |
| 398 | .aarch64_be, | 398 | .aarch64_be, |
| 399 | => asm volatile ("isb" ::: "memory"), | 399 | => asm volatile ("isb"), |
| 400 | | 400 | |
| 401 | // `yield` was introduced in v6k but is also available on v6m. | 401 | // `yield` was introduced in v6k but is also available on v6m. |
| 402 | // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm | 402 | // https://www.keil.com/support/man/docs/armasm/armasm_dom1361289926796.htm |
| ... | @@ -409,30 +409,22 @@ pub inline fn spinLoopHint() void { | ... | @@ -409,30 +409,22 @@ pub inline fn spinLoopHint() void { |
| 409 | .has_v6k, .has_v6m, | 409 | .has_v6k, .has_v6m, |
| 410 | }); | 410 | }); |
| 411 | if (can_yield) { | 411 | if (can_yield) { |
| 412 | asm volatile ("yield" ::: "memory"); | 412 | asm volatile ("yield"); |
| 413 | } else { | | |
| 414 | asm volatile ("" ::: "memory"); | | |
| 415 | } | 413 | } |
| 416 | }, | 414 | }, |
| 417 | | 415 | |
| 418 | // The 8-bit immediate specifies the amount of cycles to pause for. We can't really be too | 416 | // The 8-bit immediate specifies the amount of cycles to pause for. We can't really be too |
| 419 | // opinionated here. | 417 | // opinionated here. |
| 420 | .hexagon, | 418 | .hexagon, |
| 421 | => asm volatile ("pause(#1)" ::: "memory"), | 419 | => asm volatile ("pause(#1)"), |
| 422 | | 420 | |
| 423 | .riscv32, | 421 | .riscv32, |
| 424 | .riscv64, | 422 | .riscv64, |
| 425 | => { | 423 | => if (comptime std.Target.riscv.featureSetHas(builtin.target.cpu.features, .zihintpause)) { |
| 426 | if (comptime std.Target.riscv.featureSetHas(builtin.target.cpu.features, .zihintpause)) { | 424 | asm volatile ("pause"); |
| 427 | asm volatile ("pause" ::: "memory"); | | |
| 428 | } else { | | |
| 429 | asm volatile ("" ::: "memory"); | | |
| 430 | } | | |
| 431 | }, | 425 | }, |
| 432 | | 426 | |
| 433 | // Memory barrier to prevent the compiler from optimizing away the spin-loop | 427 | else => {}, |
| 434 | // even if no hint_instruction was provided. | | |
| 435 | else => asm volatile ("" ::: "memory"), | | |
| 436 | } | 428 | } |
| 437 | } | 429 | } |
| 438 | | 430 | |