authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2021-06-23 18:34:01-07:00
committergravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2021-07-02 13:26:50-07:00
log527c55aa5671381a7e6652fba237279453e0bb6e
tree183f7d30cc9696642a474f940cbddc52032a3e86
parent125b85d7375b96b4847f6ead51c853cdc0567506

stage1: get rid of the is_noreturn flag on IrInstSrc

One more step towards lowering the memory footprint of stage1. This flag was hiding in padding but now that it is gone we can re-arrange the memory layout more easily.

3 files changed, 12 insertions(+), 11 deletions(-)

src/stage1/all_types.hpp-1
......@@ -2733,7 +2733,6 @@ struct IrInstSrc {
27332733 IrInst base;
27342734
27352735 IrInstSrcId id;
2736 bool is_noreturn;
27372736
27382737 // When analyzing IR, instructions that point to this instruction in the "old ir"
27392738 // can find the instruction that corresponds to this value in the "new ir"
src/stage1/astgen.cpp+12-8
......@@ -55,7 +55,17 @@ static ErrorMsg *exec_add_error_node(CodeGen *codegen, Stage1Zir *exec, AstNode
5555
5656
5757static bool instr_is_unreachable(IrInstSrc *instruction) {
58 return instruction->is_noreturn;
58 switch (instruction->id) {
59 case IrInstSrcIdCondBr:
60 case IrInstSrcIdReturn:
61 case IrInstSrcIdBr:
62 case IrInstSrcIdUnreachable:
63 case IrInstSrcIdSwitchBr:
64 case IrInstSrcIdPanic:
65 return true;
66 default:
67 return false;
68 }
5969}
6070
6171void destroy_instruction_src(IrInstSrc *inst) {
......@@ -947,7 +957,6 @@ static IrInstSrc *ir_build_cond_br(Stage1AstGen *ag, Scope *scope, AstNode *sour
947957 Stage1ZirBasicBlock *then_block, Stage1ZirBasicBlock *else_block, IrInstSrc *is_comptime)
948958{
949959 IrInstSrcCondBr *inst = ir_build_instruction<IrInstSrcCondBr>(ag, scope, source_node);
950 inst->base.is_noreturn = true;
951960 inst->condition = condition;
952961 inst->then_block = then_block;
953962 inst->else_block = else_block;
......@@ -963,7 +972,6 @@ static IrInstSrc *ir_build_cond_br(Stage1AstGen *ag, Scope *scope, AstNode *sour
963972
964973static IrInstSrc *ir_build_return_src(Stage1AstGen *ag, Scope *scope, AstNode *source_node, IrInstSrc *operand) {
965974 IrInstSrcReturn *inst = ir_build_instruction<IrInstSrcReturn>(ag, scope, source_node);
966 inst->base.is_noreturn = true;
967975 inst->operand = operand;
968976
969977 if (operand != nullptr) ir_ref_instruction(operand, ag->current_basic_block);
......@@ -1303,7 +1311,6 @@ static IrInstSrc *ir_build_br(Stage1AstGen *ag, Scope *scope, AstNode *source_no
13031311 Stage1ZirBasicBlock *dest_block, IrInstSrc *is_comptime)
13041312{
13051313 IrInstSrcBr *inst = ir_build_instruction<IrInstSrcBr>(ag, scope, source_node);
1306 inst->base.is_noreturn = true;
13071314 inst->dest_block = dest_block;
13081315 inst->is_comptime = is_comptime;
13091316
......@@ -1418,7 +1425,6 @@ static IrInstSrc *ir_build_container_init_fields(Stage1AstGen *ag, Scope *scope,
14181425
14191426static IrInstSrc *ir_build_unreachable(Stage1AstGen *ag, Scope *scope, AstNode *source_node) {
14201427 IrInstSrcUnreachable *inst = ir_build_instruction<IrInstSrcUnreachable>(ag, scope, source_node);
1421 inst->base.is_noreturn = true;
14221428 return &inst->base;
14231429}
14241430
......@@ -1718,7 +1724,6 @@ static IrInstSrcSwitchBr *ir_build_switch_br_src(Stage1AstGen *ag, Scope *scope,
17181724 IrInstSrc *is_comptime, IrInstSrc *switch_prongs_void)
17191725{
17201726 IrInstSrcSwitchBr *instruction = ir_build_instruction<IrInstSrcSwitchBr>(ag, scope, source_node);
1721 instruction->base.is_noreturn = true;
17221727 instruction->target_value = target_value;
17231728 instruction->else_block = else_block;
17241729 instruction->case_count = case_count;
......@@ -2439,7 +2444,6 @@ static IrInstSrc *ir_build_decl_ref(Stage1AstGen *ag, Scope *scope, AstNode *sou
24392444
24402445static IrInstSrc *ir_build_panic_src(Stage1AstGen *ag, Scope *scope, AstNode *source_node, IrInstSrc *msg) {
24412446 IrInstSrcPanic *instruction = ir_build_instruction<IrInstSrcPanic>(ag, scope, source_node);
2442 instruction->base.is_noreturn = true;
24432447 instruction->msg = msg;
24442448
24452449 ir_ref_instruction(msg, ag->current_basic_block);
......@@ -2937,7 +2941,7 @@ static bool astgen_defers_for_block(Stage1AstGen *ag, Scope *inner_scope, Scope
29372941 if (defer_expr_value == ag->codegen->invalid_inst_src)
29382942 return ag->codegen->invalid_inst_src;
29392943
2940 if (defer_expr_value->is_noreturn) {
2944 if (instr_is_unreachable(defer_expr_value)) {
29412945 if (is_noreturn != nullptr) *is_noreturn = true;
29422946 } else {
29432947 ir_build_check_statement_is_void(ag, defer_expr_scope, defer_expr_node,
src/stage1/ir_print.cpp-2
......@@ -577,8 +577,6 @@ static void ir_print_prefix_src(IrPrintSrc *irp, IrInstSrc *instruction, bool tr
577577 const char *type_name;
578578 if (instruction->id == IrInstSrcIdConst) {
579579 type_name = buf_ptr(&reinterpret_cast<IrInstSrcConst *>(instruction)->value->type->name);
580 } else if (instruction->is_noreturn) {
581 type_name = "noreturn";
582580 } else {
583581 type_name = "(unknown)";
584582 }